; --------------------------------------------------------------------------------
; @Title: TegraX2 On-Chip Peripherals
; @Props: Released
; @Author: BFG, MJE, PCC, MJW, SIK, DRE, JAM, KOL
; @Changelog: 2018-06-07 PCC
;             2018-07-27 MJW
; @Manufacturer: NVIDIA - NVIDIA Corporation
; @Doc: Parker_TRM_DP07821001p.pdf (ver. v1.0p, 2017-06-21)
; @Core: Cortex-A57, Denver2
; @Chip: TEGRAX2
; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pertegrax2.per 15981 2023-04-17 07:25:16Z bschroefel $

; Known problems:
; Module                Register                                        Description
; ---------------------------------------------------------------------------------
; VIC                   NV_PVIC_FALCON_ITFEN                            Missing description of bit 2.
; ADSP                  All                                             Not sure base address
; Core DENVER2          All registers                                   Missing implementation
; GPIO                  Controlers 0 - 5                                No cleary informations about offsets for
;                                                                       GPIO_%(3)_ENABLE_CONFIG_$2_0, GPIO_%(3)_DEBOUNCE_THRESHOLD_$2_0,
;                                                                       GPIO_%(3)_INPUT_$2_0, GPIO_%(3)_OUTPUT_CONTROL_$2_0,
;                                                                       GPIO_%(3)_OUTPUT_VALUE_$2_0, GPIO_%(3)_INTERRUPT_CLEAR_$2_0,
;                                                                       GPIO_%(3)_INTERRUPT_STATUS_G$2_0. Addresses repeat for different ports
; CLK                                                                   RST_DEV_DTV_0_CLR;RST_DEV_BPMP_PM_0;RST_DEV_I2C2_0;CLK_OUT_ENB_GPU_SET have probably incorrect offset in document
; CLK                                                                   AUDIO_SYNC_CLK_I2S5_0;CLR_CLK_ENB_SATA have probably incorrect offset in document
; CLK                                                                   Missing name register for address 0xA7000C
config 16. 8.
sif CPUIS64BIT()
tree "Core Registers (Cortex-A57)"
AUTOINDENT.ON center tree
tree.open "AArch64"
tree "ID Registers"
rgroup.quad spr:0x30000++0x0
line.long 0x0 "MIDR_EL1,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
bitfld.long 0x0 20.--23.  "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19.  "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
newline
hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number"
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x30005++0x00
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
newline
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4"
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30005++0x00
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field"
newline
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
newline
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
endif
rgroup.quad SPR:0x30006++0x0
line.long 0x0 "REVIDR_EL1,Revision ID Register"
rgroup.quad SPR:0x30014++0x00
line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30015++0x00
line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.quad SPR:0x30016++0x00
line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.quad SPR:0x30017++0x00
line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30026++0x00
line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
newline
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
newline
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..."
endif
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30071++0x00
line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1"
endif
rgroup.quad SPR:0x30020++0x00
line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.quad SPR:0x30021++0x00
line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30022++0x00
line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30023++0x00
line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30024++0x00
line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30025++0x00
line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30060++0x00
line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0"
bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..."
bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..."
bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..."
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30061++0x00
line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1"
endif
rgroup.quad SPR:0x30010++0x00
line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30011++0x00
line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..."
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..."
newline
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
newline
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
newline
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
newline
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
endif
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30041++0x00
line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1"
endif
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x30012++0x00
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x30012++0x00
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
endif
rgroup.quad spr:0x30050++0x00
line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..."
bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..."
bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
newline
bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..."
bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..."
bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..."
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30051++0x00
line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1"
rgroup.quad spr:0x30054++0x00
line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0"
rgroup.quad spr:0x30055++0x00
line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1"
endif
rgroup.quad SPR:0x30013++0x00
line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0"
rgroup.quad SPR:0x31007++0x00
line.long 0x00 "AIDR_EL1,Auxiliary ID Register"
rgroup.quad SPR:0x33007++0x00
line.long 0x00 "DCZID_EL0,Data Cache Zero ID"
bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited"
bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
tree.end
tree "System Control and Configuration"
group.quad spr:0x36111++0x00
line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register"
bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled"
bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled"
group.quad SPR:0x30100++0x0
line.long 0x00 "SCTLR_EL1,System Control Register (EL1)"
bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad SPR:0x34100++0x0
line.long 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad SPR:0x36100++0x0
line.long 0x00 "SCTLR_EL3,System Control Register (EL3)"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
rgroup.quad SPR:0x30101++0x0
line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)"
group.quad SPR:0x34101++0x0
line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad SPR:0x36101++0x0
line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad SPR:0x30102++0x00
line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register"
bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..."
bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped"
group.quad SPR:0x36110++0x0
line.long 0x0 "SCR_EL3,Secure Configuration Register"
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled"
bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64"
newline
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
newline
bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes"
bitfld.long 0x00 3. "EA,External Abort  exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
newline
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
group.quad spr:0x30510++0x00
line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
group.quad spr:0x30511++0x00
line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
group.quad spr:0x34510++0x00
line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
group.quad spr:0x34511++0x00
line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
group.quad spr:0x36510++0x00
line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
group.quad spr:0x36511++0x00
line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
tree.open "Exception Syndrome Registers"
if (CORENAME()=="CORTEXA57")
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
elif (CORENAME()=="CORTEXA53")
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External,"
newline
hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
endif
tree.end
newline
if (CORENAME()=="CORTEXA57")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif (CORENAME()=="CORTEXA53")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
group.quad spr:0x30600++0x00
line.quad 0x00 "FAR_EL1,Fault Address Register"
group.quad spr:0x34600++0x00
line.quad 0x00 "FAR_EL2,Fault Address Register"
group.quad spr:0x36600++0x00
line.quad 0x00 "FAR_EL3,Fault Address Register"
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
group.quad spr:0x30C00++0x00
line.quad 0x00 "VBAR_EL1,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
group.quad spr:0x34C00++0x00
line.quad 0x00 "VBAR_EL2,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
group.quad spr:0x36C00++0x00
line.quad 0x00 "VBAR_EL3,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
rgroup.quad spr:0x36C01++0x00
line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"
hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address"
rgroup.quad SPR:0x30C10++0x00
line.long 0x00 "ISR_EL1,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
newline
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.quad SPR:0x36C02++0x00
line.long 0x00 "RMR_EL3,Reset Management Register"
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x31F30++0x00
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]"
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x31F30++0x00
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]"
endif
group.quad spr:0x30D01++0x00
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
group.quad spr:0x33D02++0x00
line.quad 0x00 "TPIDR_EL0,Software Thread ID Register"
group.quad spr:0x33D03++0x00
line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register"
group.quad spr:0x30D04++0x00
line.quad 0x00 "TPIDR_EL1,Software Thread ID Register"
group.quad spr:0x34D02++0x00
line.quad 0x00 "TPIDR_EL2,Software Thread ID Register"
group.quad spr:0x36D02++0x00
line.quad 0x00 "TPIDR_EL3,Software Thread ID Register"
tree.end
tree "Memory Management Unit"
group.quad spr:0x30100++0x0
line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)"
bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x36100++0x0
line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x30200++0x00
line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x30201++0x00
line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte"
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB"
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x34200++0x00
line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x36200++0x00
line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad SPR:0x34300++0x00
line.long 0x00 "DACR32_EL2,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if (CORENAME()=="CORTEXA57")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif (CORENAME()=="CORTEXA53")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
rgroup.quad SPR:0x30510++0x00
line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
rgroup.quad SPR:0x34510++0x00
line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
rgroup.quad SPR:0x36510++0x00
line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
rgroup.quad SPR:0x30511++0x00
line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
rgroup.quad SPR:0x34511++0x00
line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
rgroup.quad SPR:0x36511++0x00
line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..."
newline
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif (((per.q(spr:0x30740))&0x01)==0x00)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
newline
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
newline
bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
newline
bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..."
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
tree.open "Memory Attribute Indirection Registers"
group.quad spr:0x30A20++0x00
line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
group.quad spr:0x34A20++0x00
line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
group.quad spr:0x36A20++0x00
line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
rgroup.quad spr:0x30A30++0x00
line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)"
rgroup.quad spr:0x34A30++0x00
line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)"
rgroup.quad spr:0x36A30++0x00
line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)"
tree.end
newline
group.quad SPR:0x30D01++0x00
line.long 0x0 "CONTEXTIDR_EL1,Context ID Register"
tree.end
tree "Virtualization Extensions"
group.quad SPR:0x34000++0x0
line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x34005++0x00
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x34005++0x00
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
endif
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x34111++0x00
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
newline
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x34111++0x00
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
newline
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6"
endif
group.quad SPR:0x34112++0x00
line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad SPR:0x36131++0x00
line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)"
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes"
bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
group.quad SPR:0x36112++0x00
line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad SPR:0x34113++0x00
line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register"
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..."
bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped"
bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped"
newline
bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped"
bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped"
bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped"
newline
bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped"
bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped"
bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped"
newline
bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped"
bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped"
bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped"
newline
bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped"
bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped"
bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped"
rgroup.quad SPR:0x34117++0x00
line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register"
group.quad spr:0x34210++0x00
line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x34212++0x00
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..."
bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x34212++0x00
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..."
bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..."
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits"
tree.end
tree "Cache Control and Configuration"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
group.quad SPR:0x32000++0x0
line.long 0x0 "CSSELR_EL1,Cache Size Selection Register"
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x31001++0x0
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
newline
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
rgroup.quad SPR:0x31000++0x0
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported"
newline
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x31001++0x0
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
rgroup.quad SPR:0x31000++0x0
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
newline
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..."
endif
tree "Level 1 memory system"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x30F10++0x00
line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register"
group.quad SPR:0x30F11++0x00
line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register"
group.quad SPR:0x30F12++0x00
line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register"
group.quad SPR:0x30F13++0x00
line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register"
group.quad SPR:0x30F00++0x00
line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register"
group.quad SPR:0x30F01++0x00
line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register"
group.quad SPR:0x30F02++0x00
line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register"
group.quad SPR:0x30F03++0x00
line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register"
group.quad spr:0x31F20++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
newline
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
newline
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
newline
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
newline
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
newline
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
newline
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
newline
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad spr:0x31F21++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
newline
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x31F20++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
newline
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
newline
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
newline
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
newline
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8"
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled"
group.quad spr:0x31F21++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
endif
if (CORENAME()=="CORTEXA57")
group.quad spr:0x31F22++0x00
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x31F22++0x00
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
newline
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
endif
tree.end
tree "Level 2 memory system"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x31B02++0x0
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled"
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented"
newline
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented"
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..."
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
newline
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
group.quad SPR:0x31B03++0x0
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad SPR:0x31F00++0x00
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
newline
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
newline
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
newline
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
newline
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
newline
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad spr:0x31F23++0x00
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x31B02++0x0
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
newline
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
group.quad SPR:0x31B03++0x0
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad SPR:0x31F00++0x00
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3"
bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled"
bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled"
newline
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
group.quad spr:0x31F23++0x00
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
endif
tree.end
tree.end
tree "System Performance Monitor"
group.quad SPR:0x339C0++0x00
line.long 0x0 "PMCR_EL0,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
group.quad SPR:0x339C1++0x00
line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00  30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
bitfld.long 0x00  29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
bitfld.long 0x00  28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
bitfld.long 0x00  26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
bitfld.long 0x00  25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
bitfld.long 0x00  24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
bitfld.long 0x00  22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
bitfld.long 0x00  21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
bitfld.long 0x00  20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
bitfld.long 0x00  18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
bitfld.long 0x00  17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
bitfld.long 0x00  16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
bitfld.long 0x00  14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
bitfld.long 0x00  13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
bitfld.long 0x00  12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
bitfld.long 0x00  10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
bitfld.long 0x00  9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
bitfld.long 0x00  8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
bitfld.long 0x00  6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
bitfld.long 0x00  5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.long 0x00  4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00  2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
bitfld.long 0x00  1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00  0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.quad SPR:0x339C2++0x00
line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00  30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Event Counter 28 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Event Counter 27 clear bit" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Event Counter 26 clear bit" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Event Counter 25 clear bit" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Event Counter 24 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Event Counter 23 clear bit" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Event Counter 22 clear bit" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Event Counter 21 clear bit" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Event Counter 20 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Event Counter 19 clear bit" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Event Counter 18 clear bit" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Event Counter 17 clear bit" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Event Counter 16 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
group.quad SPR:0x339C3++0x00
line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register"
bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
eventfld.long 0x00  30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled"
wgroup.quad SPR:0x339C4++0x00
line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment"
bitfld.long 0x00  30. "P30,Increment PMN30" "No action,Increment"
bitfld.long 0x00  29. "P29,Increment PMN29" "No action,Increment"
bitfld.long 0x00  28. "P28,Increment PMN28" "No action,Increment"
bitfld.long 0x00  27. "P27,Increment PMN27" "No action,Increment"
newline
bitfld.long 0x00  26. "P26,Increment PMN26" "No action,Increment"
bitfld.long 0x00  25. "P25,Increment PMN25" "No action,Increment"
bitfld.long 0x00  24. "P24,Increment PMN24" "No action,Increment"
bitfld.long 0x00  23. "P23,Increment PMN23" "No action,Increment"
newline
bitfld.long 0x00  22. "P22,Increment PMN22" "No action,Increment"
bitfld.long 0x00  21. "P21,Increment PMN21" "No action,Increment"
bitfld.long 0x00  20. "P20,Increment PMN20" "No action,Increment"
bitfld.long 0x00  19. "P19,Increment PMN19" "No action,Increment"
newline
bitfld.long 0x00  18. "P18,Increment PMN18" "No action,Increment"
bitfld.long 0x00  17. "P17,Increment PMN17" "No action,Increment"
bitfld.long 0x00  16. "P16,Increment PMN16" "No action,Increment"
bitfld.long 0x00  15. "P15,Increment PMN15" "No action,Increment"
newline
bitfld.long 0x00  14. "P14,Increment PMN14" "No action,Increment"
bitfld.long 0x00  13. "P13,Increment PMN13" "No action,Increment"
bitfld.long 0x00  12. "P12,Increment PMN12" "No action,Increment"
bitfld.long 0x00  11. "P11,Increment PMN11" "No action,Increment"
newline
bitfld.long 0x00  10. "P10,Increment PMN10" "No action,Increment"
bitfld.long 0x00  9. "P9,Increment PMN9" "No action,Increment"
bitfld.long 0x00  8. "P8,Increment PMN8" "No action,Increment"
bitfld.long 0x00  7. "P7,Increment PMN7" "No action,Increment"
newline
bitfld.long 0x00  6. "P6,Increment PMN6" "No action,Increment"
bitfld.long 0x00  5. "P5,Increment PMN5" "No action,Increment"
bitfld.long 0x00  4. "P4,Increment PMN4" "No action,Increment"
bitfld.long 0x00  3. "P3,Increment PMN3" "No action,Increment"
newline
bitfld.long 0x00  2. "P2,Increment PMN2" "No action,Increment"
bitfld.long 0x00  1. "P1,Increment PMN1" "No action,Increment"
bitfld.long 0x00  0. "P0,Increment PMN0" "No action,Increment"
group.quad SPR:0x339C5++0x00
line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.open "Common Event Identification Registers"
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x339C6++0x0
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
newline
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
newline
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
newline
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
newline
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
newline
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
newline
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x339C6++0x0
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
newline
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
newline
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
newline
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
newline
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
newline
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
endif
rgroup.quad SPR:0x339C7++0x0
line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1"
bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented"
tree.end
newline
group.quad spr:0x339D0++0x00
line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register"
group.quad SPR:0x339D1++0x00
line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register"
group.quad SPR:0x339D2++0x00
line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register"
group.quad SPR:0x339E0++0x00
line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.quad SPR:0x309E1++0x00
line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set"
bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled"
bitfld.long 0x00  30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.quad SPR:0x309E2++0x00
line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00  30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
group.quad SPR:0x339E3++0x00
line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register"
group.quad SPR:(0x33E80+0x0)++0x00
line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0"
group.quad SPR:(0x33EC0+0x0)++0x00
line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x1)++0x00
line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1"
group.quad SPR:(0x33EC0+0x1)++0x00
line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x2)++0x00
line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2"
group.quad SPR:(0x33EC0+0x2)++0x00
line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x3)++0x00
line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3"
group.quad SPR:(0x33EC0+0x3)++0x00
line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x4)++0x00
line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4"
group.quad SPR:(0x33EC0+0x4)++0x00
line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x5)++0x00
line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5"
group.quad SPR:(0x33EC0+0x5)++0x00
line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:0x33EF7++0x00
line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.quad SPR:0x33E00++0x00
line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register"
rgroup.quad spr:0x33E01++0x00
line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register"
group.quad SPR:0x30E10++0x00
line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad SPR:0x33E20++0x00
line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register"
group.quad SPR:0x33E21++0x00
line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad SPR:0x33E30++0x00
line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register"
group.quad SPR:0x33E31++0x00
line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E02++0x00
line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register"
group.quad spr:0x33E22++0x00
line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register"
group.quad spr:0x33E32++0x00
line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register"
group.quad spr:0x34E03++0x00
line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register"
group.quad SPR:0x34E10++0x00
line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad SPR:0x34E20++0x00
line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register"
group.quad SPR:0x34E21++0x00
line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x34E22++0x00
line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register"
group.quad SPR:0x37E20++0x00
line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register"
group.quad SPR:0x37E21++0x00
line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x37E22++0x00
line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch64 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.quad spr:0x30C84++0x00
line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)"
bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x30C90++0x00
line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)"
bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
if (((per.q(spr:0x30CB6))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
group.quad spr:0x30C83++0x00
line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
group.quad spr:0x30CC3++0x00
line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
group.quad spr:0x30CC4++0x00
line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)"
rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported"
rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled"
bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register"
group.quad spr:0x36CC4++0x00
line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)"
rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported"
rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
newline
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled"
newline
bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register"
bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register"
if (((per.q(spr:0x30CC4))&0x3800)==0x00)
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
elif (((per.q(spr:0x30CC4))&0x3800)==0x800)
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
endif
hgroup.quad spr:0x30C80++0x00
hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
in
hgroup.quad spr:0x30CC0++0x00
hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
in
newline
group.quad SPR:0x30CC6++0x00
line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad SPR:0x30CC7++0x00
line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)"
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad SPR:0x36CC7++0x00
line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)"
bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
group.quad SPR:0x30460++0x00
line.long 0x00 "ICC_PMR_EL1,Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.quad SPR:0x30CB3++0x00
line.long 0x00 "ICC_RPR_EL1,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
if (((per.q(spr:0x30CB7))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated."
else
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
if (((per.q(spr:0x30CB5))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
group.quad SPR:0x30CC5++0x00
line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad SPR:0x34C95++0x00
line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad SPR:0x36CC5++0x00
line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
tree.end
tree "AArch64 Virtual Interface Control System Registers"
tree.open "Hypervisor Active Priorities Registers"
group.quad SPR:0x34C80++0x00
line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
if (CORENAME()=="CORTEXA53")
group.quad SPR:0x34C90++0x00
line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
endif
tree.end
newline
rgroup.quad SPR:0x34CB3++0x00
line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.quad SPR:0x34CB5++0x00
line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.quad SPR:0x34CB0++0x00
line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
rgroup.quad SPR:0x34CB2++0x00
line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register"
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.quad SPR:0x34CB7++0x00
line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.quad SPR:0x34C94++0x00
line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register"
rgroup.quad SPR:0x34CB1++0x00
line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
rgroup.quad SPR:0x23010++0x00
line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
group.quad SPR:0x20020++0x00
line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register"
bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled"
group.quad spr:0x23040++0x00
line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
rgroup.quad SPR:0x23050++0x00
line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"
wgroup.quad SPR:0x23050++0x00
line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"
group.quad SPR:0x24070++0x00
line.long 0x00 "DBGVCR32_EL2,Vector Catch Register"
bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High"
newline
bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High"
newline
bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High"
group.quad SPR:0x20002++0x00
line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
group.quad SPR:0x20022++0x00
line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High"
bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High"
newline
bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3"
bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High"
bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High"
newline
bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High"
bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled"
group.quad SPR:0x20032++0x00
line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
group.quad SPR:0x20062++0x00
line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
rgroup.quad spr:0x20100++0x00
line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address"
bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid"
wgroup.quad SPR:0x20104++0x00
line.long 0x00 "OSLAR_EL1,OS Lock Access Register"
bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock"
rgroup.quad SPR:0x20114++0x00
line.long 0x00 "OSLSR_EL1,OS Lock Status Register"
bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High"
bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked"
bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..."
group.quad SPR:0x20134++0x00
line.long 0x00 "OSDLR_EL1,OS Double-lock Register"
bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
group.quad SPR:0x20144++0x00
line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes"
group.quad SPR:0x20786++0x00
line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
newline
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.quad SPR:0x20796++0x00
line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.quad SPR:0x207E6++0x00
line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
group.quad SPR:0x33450++0x00
line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register"
group.quad spr:0x33451++0x00
line.quad 0x00 "DLR_EL0,Debug Link Register"
tree.end
tree "Breakpoint Registers"
if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x0)++0x0
line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x10)++0x0
line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x20)++0x0
line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x30)++0x0
line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x40)++0x0
line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x50)++0x0
line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoint Control Registers"
group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0"
line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1"
line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2"
line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3"
line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree.end
tree.open "AArch32"
tree "ID Registers"
rgroup.long c15:0x0000++0x0
line.long 0x0 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8"
newline
hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number"
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (CORENAME()=="CORTEXA57")
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
if corename()=="CORTEXA57"
rgroup.long c15:0x0300++0x0
line.long 0x0 "TLBTR,TLB Type Register"
endif
if corename()=="CORTEXA57"
rgroup.long c15:0x0500++0x0
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
newline
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4"
elif corename()=="CORTEXA53"
rgroup.long c15:0x0500++0x0
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
newline
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..."
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
endif
rgroup.long c15:0x0600++0x0
line.long 0x0 "REVIDR,Revision ID Register"
rgroup.long c15:0x0410++0x00
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0510++0x00
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.long c15:0x0610++0x00
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.long c15:0x0710++0x00
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.long c15:0x0620++0x00
line.long 0x00 "ID_MMFR4,ID_MMFR4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
rgroup.long c15:0x0020++0x00
line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.long c15:0x0120++0x00
line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0220++0x00
line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0320++0x00
line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0420++0x00
line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0520++0x00
line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.long c15:0x0110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
newline
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
if corename()=="CORTEXA57"
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
elif corename()=="CORTEXA53"
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
endif
group.long c15:0x0310++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
if corename()=="CORTEXA57"
rgroup.long c15:0x6C9++0x0
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
newline
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
newline
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
newline
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
newline
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
newline
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
rgroup.long c15:0x7C9++0x0
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
elif corename()=="CORTEXA53"
rgroup.long c15:0x6C9++0x0
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
newline
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
newline
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
newline
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
newline
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
newline
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
rgroup.long c15:0x7C9++0x0
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented"
endif
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
tree.end
tree "System Control and Configuration"
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,System Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
else
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
endif
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
newline
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
newline
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
newline
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
newline
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
newline
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
newline
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
newline
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
newline
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
newline
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
newline
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
newline
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
newline
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
newline
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
newline
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
newline
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad c15:0x110F0++0x01
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
newline
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad c15:0x120F0++0x01
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
group.long c15:0x0101++0x0
line.long 0x0 "ACTLR,Auxiliary Control Register"
elif corename()=="CORTEXA53"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
newline
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
newline
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
newline
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
newline
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
group.quad c15:0x110F0++0x01
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad c15:0x120F0++0x01
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
newline
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
group.long c15:0x0101++0x0
line.long 0x0 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
endif
if corename()=="CORTEXA57"
group.long c15:0x0201++0x00
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes"
newline
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
elif corename()=="CORTEXA53"
group.long c15:0x201++0x00
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
newline
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
endif
group.long c15:0x0011++0x0
line.long 0x00 "SCR,Secure Configuration Register"
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
newline
bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes"
bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
newline
bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
bitfld.long 0x00 3. "EA,External Abort  exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
newline
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure"
group.long c15:0x0111++0x00
line.long 0x00 "SDER,Secure Debug Enable Register"
bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted"
group.long c15:0x0131++0x00
line.long 0x00 "SDCR,Secure Debug Control Register"
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
newline
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
group.long c15:0x0211++0x00
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
newline
bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
if corename()=="CORTEXA57"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
group.long c15:0x010C++0x00
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
elif corename()=="CORTEXA53"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
group.long c15:0x010C++0x00
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
endif
rgroup.long c15:0x001C++0x00
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
newline
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.long c15:0x020C++0x00
line.long 0x00 "RMR,Reset Management Register"
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"
group.long c15:0x0015++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
group.long c15:0x0115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
endif
elif corename()=="CORTEXA53"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..."
else
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
endif
endif
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif corename()=="CORTEXA53"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
group.long c15:0x0006++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
group.long c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
if corename()=="CORTEXA57"
rgroup.long c15:0x103F++0x00
line.long 0x00 "CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]"
elif corename()=="CORTEXA53"
rgroup.long c15:0x103F++0x00
line.long 0x00 "CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]"
endif
group.long c15:0x000D++0x00
line.long 0x00 "FCSEIDR,FCSE Process ID register"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register"
tree.end
tree "Memory Management Unit"
if corename()=="CORTEXA57"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
// MPIDR[31]==1 case is missing here for TTBR0 and TTBR1
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
else
group.quad c15:0x10020++0x01
line.quad 0x00 "TTBR0,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad c15:0x11020++0x01
line.quad 0x00 "TTBR1,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
endif
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
newline
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
else
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
newline
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
newline
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
newline
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
endif
elif corename()=="CORTEXA53"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.quad c15:0x10020++0x01
line.quad 0x00 "TTBR0,Translation Table Base Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad c15:0x11020++0x01
line.quad 0x00 "TTBR1,Translation Table Base Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
newline
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
newline
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
else
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Register 0"
hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address"
bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base Register 1"
hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address"
bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
newline
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
endif
endif
if corename()=="CORTEXA57"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
elif corename()=="CORTEXA53"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
group.long c15:0x0003++0x00
line.long 0x00 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
else
group.long c15:0x0047++0x00
line.long 0x00 "PAR,Physical Address Register"
endif
tree.open "Memory Attribute Indirection Registers"
group.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x003A++0x00
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x013A++0x00
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x002A++0x0
line.long 0x00 "PRRR,Primary Region Remap Register"
bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
newline
bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
newline
bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
group.long c15:0x012A++0x0
line.long 0x00 "NMRR,Normal Memory Remap Register"
bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
endif
tree.end
newline
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
else
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier"
hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier"
endif
tree.end
tree "Virtualization Extensions"
group.long c15:0x4000++0x0
line.long 0x00 "VPIDR,Virtualization Processor ID Register"
group.long c15:0x4500++0x00
line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
group.long c15:0x4101++0x00
line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
if corename()=="CORTEXA57"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
newline
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
newline
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
newline
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted"
newline
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed"
newline
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
elif corename()=="CORTEXA53"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
newline
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
newline
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
newline
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
newline
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted"
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override"
newline
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override"
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override"
newline
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
newline
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
endif
group.long c15:0x4411++0x00
line.long 0x00 "HCR2,Hypervisor Configuration Register 2"
bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes"
group.long c15:0x4111++0x00
line.long 0x00 "HDCR,Hypervisor Debug Control Register"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
newline
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long c15:0x4211++0x00
line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..."
newline
bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped"
bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped"
newline
bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped"
group.long c15:0x4311++0x00
line.long 0x00 "HSTR,Hypervisor System Trap Register"
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled"
bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..."
newline
hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13"
bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x4711++0x00
line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register"
if corename()=="CORTEXA57"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
elif corename()=="CORTEXA53"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
group.long c15:0x4212++0x00
line.long 0x00 "VTCR,Virtualization Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High"
bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x4015++0x00
line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register"
group.long c15:0x4115++0x00
line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register"
group.long c15:0x4006++0x00
line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register"
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..."
bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit"
newline
hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome"
group.long c15:0x4206++0x00
line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register"
group.long c15:0x4406++0x00
line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register"
hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address"
tree.open "Hypervisor Memory Attribute Indirection Registers"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
tree.end
newline
group.long c15:0x400C++0x00
line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address"
tree.end
tree "Cache Control and Configuration"
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT"
newline
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
if corename()=="CORTEXA57"
rgroup.long c15:0x1100++0x0
line.long 0x0 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
newline
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
elif corename()=="CORTEXA53"
rgroup.long c15:0x1100++0x0
line.long 0x0 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
endif
rgroup.long c15:0x1700++0x0
line.long 0x00 "AIDR,Auxiliary ID Register"
rgroup.long c15:0x1000++0x0
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported"
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
newline
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
newline
hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..."
group.long c15:0x2000++0x0
line.long 0x0 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
tree "Level 1 memory system"
if corename()=="CORTEXA57"
group.long c15:0x001F++0x00
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
group.long c15:0x011F++0x00
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
group.long c15:0x021F++0x00
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
group.long c15:0x031F++0x00
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
group.long c15:0x000F++0x00
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
group.long c15:0x010F++0x00
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
group.long c15:0x020F++0x00
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
group.long c15:0x030F++0x00
line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register"
wgroup.long c15:0x04F++0x00
line.long 0x00 "RAMINDEX,RAM Index Operation Register"
elif corename()=="CORTEXA53"
rgroup.long c15:0x300F++0x00
line.long 0x00 "CDBGDR0,Cache Debug Data Register 0"
rgroup.long c15:0x310F++0x00
line.long 0x00 "CDBGDR1,Cache Debug Data Register 1"
rgroup.long c15:0x320F++0x00
line.long 0x00 "CDBGDR2,Cache Debug Data Register 2"
rgroup.long c15:0x330F++0x00
line.long 0x00 "CDBGDR3,Cache Debug Data Register 3"
wgroup.long c15:0x302F++0x00
line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register"
wgroup.long c15:0x312F++0x00
line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register"
wgroup.long c15:0x304F++0x00
line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register"
wgroup.long c15:0x314F++0x00
line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register"
wgroup.long c15:0x324F++0x00
line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register"
endif
tree.end
tree "Level 2 memory system"
if corename()=="CORTEXA57"
group.long c15:0x1209++0x0
line.long 0x00 "L2CTLR,L2 Control Register"
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
newline
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported"
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled"
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present"
newline
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present"
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present"
newline
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
newline
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle"
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
group.long c15:0x1309++0x0
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
newline
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.long c15:0x100F++0x00
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
newline
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
newline
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
newline
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
newline
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
newline
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
newline
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad c15:0x130F0++0x01
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
elif corename()=="CORTEXA53"
group.long c15:0x1209++0x0
line.long 0x00 "L2CTLR,L2 Control Register"
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
newline
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
newline
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
group.long c15:0x1309++0x0
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
newline
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.long c15:0x100F++0x00
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
group.quad c15:0x110F0++0x01
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
endif
tree.end
tree.end
tree "System Performance Monitor"
group.long c15:0xc9++0x00
line.long 0x0 "PMCR,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
newline
group.long c15:0x1c9++0x00
line.long 0x00 "PMNCNTENSET,Count Enable Set Register "
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.long c15:0x2c9++0x00
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled"
eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled"
eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled"
eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled"
eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled"
eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled"
eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled"
eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled"
eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled"
eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled"
eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled"
eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
group.long c15:0x3c9++0x00
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow"
eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow"
eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow"
eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow"
eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow"
eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow"
eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow"
eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow"
eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow"
eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow"
eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow"
eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow"
eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow"
eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow"
eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow"
eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow"
eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow"
eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow"
eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow"
eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow"
eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow"
eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow"
eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow"
eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow"
eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow"
group.long c15:0x4c9++0x00
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment"
bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment"
bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment"
bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment"
bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment"
newline
bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment"
bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment"
bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment"
bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment"
bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment"
newline
bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment"
bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment"
bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment"
bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment"
bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment"
newline
bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment"
bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment"
bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment"
bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment"
bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment"
newline
bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment"
bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment"
bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment"
bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment"
bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment"
newline
bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment"
bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment"
bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment"
bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment"
bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment"
newline
bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment"
group.long c15:0x5c9++0x00
line.long 0x00 "PMSELR,Performance Monitor Select Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
group.long c15:0xd9++0x00
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
group.long c15:0x1d9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
group.long c15:0x2d9++0x00
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
group.long c15:0xe9++0x00
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.long c15:0x1e9++0x00
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.long c15:0x2e9++0x00
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
group.long c15:0x3e9++0x00
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
group.long c15:0x8E++0x00
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
group.long c15:(0x8E+0x40)++0x00
line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x18E++0x00
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
group.long c15:(0x18E+0x40)++0x00
line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x28E++0x00
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
group.long c15:(0x28E+0x40)++0x00
line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x38E++0x00
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
group.long c15:(0x38E+0x40)++0x00
line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x48E++0x00
line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4"
group.long c15:(0x48E+0x40)++0x00
line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x58E++0x00
line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5"
group.long c15:(0x58E+0x40)++0x00
line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x07FE++0x00
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.long c15:0x000E++0x00
line.long 0x00 "CNTFRQ,Counter Frequency Register"
rgroup.quad c15:0x100E0++0x01
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
group.long c15:0x001E++0x00
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.long c15:0x002E++0x00
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register"
group.long c15:0x012E++0x00
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.long c15:0x003E++0x00
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
group.long c15:0x013E++0x00
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x110E0++0x01
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
group.quad c15:0x120E0++0x01
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
group.quad c15:0x130E0++0x01
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
group.quad c15:0x140E0++0x01
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
group.long c15:0x401E++0x00
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
group.long c15:0x402E++0x00
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
group.long c15:0x412E++0x00
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x160E0++0x01
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch32 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.long c15:0x048C++0x00
line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x009C++0x00
line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
wgroup.quad c15:0x110C0++0x01
line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x038C++0x00
line.long 0x00 "ICC_BPR0,Binary Point Register 0"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x03CC++0x00
line.long 0x00 "ICC_BPR1,Binary Point Register 1"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x04CC++0x00
line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1"
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
newline
bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1"
group.long c15:0x64CC++0x00
line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3"
rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
newline
rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled"
bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled"
bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled"
newline
bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register"
bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register"
if (((per.l(c15:0x4CC))&0x3800)==0x00)
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.long c15:0x018C++0x00
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.long c15:0x01CC++0x00
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.long c15:0x028C++0x00
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.long c15:0x02CC++0x00
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
elif (((per.l(c15:0x4CC))&0x3800)==0x800)
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.long c15:0x018C++0x00
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.long c15:0x01CC++0x00
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.long c15:0x028C++0x00
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.long c15:0x02CC++0x00
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
endif
hgroup.long c15:0x008C++0x00
hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0"
in
hgroup.long c15:0x00CC++0x00
hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1"
in
group.long c15:0x06CC++0x00
line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
group.long c15:0x07CC++0x00
line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1"
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
group.long c15:0x0064++0x00
line.long 0x00 "ICC_PMR,Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.long c15:0x03BC++0x00
line.long 0x00 "ICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
wgroup.quad c15:0x120C0++0x01
line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
wgroup.quad c15:0x100C0++0x01
line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x05CC++0x00
line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
if corename()=="CORTEXA53"
group.long c15:0x459C++0x00
line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
endif
group.long c15:0x65CC++0x00
line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.long c15:0x67CC++0x00
line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable"
bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
tree.end
tree "AArch32 Virtual Interface Control System Registers"
tree.open "Hypervisor Active Priorities Registers"
group.long c15:0x408C++0x00
line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x409C++0x00
line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
rgroup.long c15:0x43BC++0x00
line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.long c15:0x45BC++0x00
line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.long c15:0x40BC++0x00
line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
group.long c15:(0x40CC+0x0)++0x00
line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x100)++0x00
line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x200)++0x00
line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x300)++0x00
line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40EC+0x0)++0x00
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x100)++0x00
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x200)++0x00
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x300)++0x00
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
rgroup.long c15:0x42BC++0x00
line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register"
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.long c15:0x459C++0x00
line.long 0x00 "ICH_SRE,Hypervisor System Register"
group.long c15:0x47BC++0x00
line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.long c15:0x449C++0x00
line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register"
rgroup.long c15:0x41BC++0x00
line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
tree "Coresight Management Registers"
if corename()=="CORTEXA57"
rgroup.long c14:0x0000++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
elif corename()=="CORTEXA53"
rgroup.long c14:0x0000++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High"
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
newline
bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented"
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number"
newline
hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number"
endif
rgroup.long c14:0x0060++0x0
line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"
group.long c14:0x0070++0x0
line.long 0x00 "DBGVCR,Debug Vector Catch register"
bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled"
bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
group.long c14:0x0020++0x00
line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register"
bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled"
group.long c14:0x0200++0x0
line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)"
group.long c14:0x0220++0x0
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled"
bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled"
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
newline
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled"
newline
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
rgroup.long c14:0x0010++0x0
line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
newline
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
wgroup.long c14:0x0230++0x0
line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)"
group.long c14:0x0050++0x0
line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)"
group.long c14:0x0687++0x0
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.long c14:0x0697++0x0
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.long c14:0x06E7++0x0
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented"
bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented"
newline
bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1"
newline
bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1"
rgroup.long c14:0x0707++0x0
line.long 0x0 "DBGDEVID2,Debug Device ID Register 2"
rgroup.long c14:0x0717++0x0
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c14:0x0727++0x00
line.long 0x00 "DBGDEVID,Debug Device ID Register 0"
bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..."
bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..."
bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..."
bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented"
newline
bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
tree.end
newline
rgroup.quad c14:0x10010++0x1
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address"
hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address"
bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid"
newline
bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid"
rgroup.quad c14:0x10020++0x1
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
wgroup.long c14:0x0401++0x00
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
rgroup.long c14:0x0411++0x00
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required"
bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked"
bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..."
if (((per.l(c14:0x0411))&0x2)==0x2)
group.long c14:0x0260++0x00
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
else
hgroup.long c14:0x0260++0x00
hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
endif
group.long c14:0x0431++0x00
line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register"
bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked"
group.long c14:0x0441++0x00
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High"
tree.end
tree "Breakpoint Registers"
if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x0)++0x0
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x10)++0x0
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x20)++0x0
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x30)++0x0
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x40)++0x0
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x50)++0x0
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
group.long c14:0x0141++0x0
line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4"
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
group.long c14:0x0151++0x0
line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5"
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
tree.end
tree "Watchpoint Control Registers"
group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0"
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1"
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2"
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3"
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree.end
AUTOINDENT.OFF
tree.open "Interrupt Controller (GIC-400)"
width 17.
width 17.
base AD:0x03881000
tree "Distributor Interface"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
if PER.ADDRESS.isSECUREEX(AD:0x03881000)
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
bitfld.long 0x00 1. " ENABLEGRP1    ,Global Interrupt Enable Group 1" "Disabled,Enabled"
bitfld.long 0x00 0. "         ENABLEGRP0    ,Global Interrupt Enable Group 1" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
bitfld.long 0x00 0. " ENABLE        ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
endif
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register"
bitfld.long 0x00 0. " ENABLE        ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled"
endif
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 11.--15. " LSPI          ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10. "               SECURITYEXTN  ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented"
textline "                          "
bitfld.long 0x00 5.--7. " CPUNUMBER     ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
bitfld.long 0x00 0.--4. "                ITLN          ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
else
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 10. " SECURITYEXTN  ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
textline "                          "
bitfld.long 0x00 5.--7. " CPUNUMBER     ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..."
bitfld.long 0x00 0.--4. "                ITLN          ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020"
endif
rgroup.long 0x0008++0x03
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. " PRODID        ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..."
bitfld.long 0x00 16.--19. "           VAR           ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x00 12.--15. " REV           ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "               IMP           ,Implementer"
sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure)
width 17.
tree "Group/Security Registers"
if PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0080)
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
bitfld.long 0x00 31. " GSB31   ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB30   ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB29   ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB28   ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB27   ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB26   ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB25   ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB24   ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB23   ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB22   ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB21   ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB20   ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB19   ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB18   ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB17   ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB16   ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB15   ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB14   ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB13   ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB12   ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB11   ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB10   ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB9    ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB8    ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB7    ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB6    ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB5    ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB4    ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB3    ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB2    ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB1    ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB0    ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)"
else
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
bitfld.long 0x00 31. " GSB31   ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB30   ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB29   ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28   ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB27   ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB26   ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25   ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB24   ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB23   ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22   ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB21   ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB20   ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19   ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB18   ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB17   ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16   ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB15   ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB14   ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13   ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB12   ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB11   ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10   ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB9    ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB8    ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7    ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB6    ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB5    ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4    ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB3    ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB2    ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1    ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB0    ,Group Status Bit 0" "Group 0,Group 1"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0084))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)"
bitfld.long 0x00 31. " GSB63   ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB62   ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB61   ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB60   ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB59   ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB58   ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB57   ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB56   ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB55   ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB54   ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB53   ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB52   ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB51   ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB50   ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB49   ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB48   ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB47   ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB46   ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB45   ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB44   ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB43   ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB42   ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB41   ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB40   ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB39   ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB38   ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB37   ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB36   ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB35   ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB34   ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB33   ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB32   ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)"
bitfld.long 0x00 31. " GSB63   ,Group Status Bit 63" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB62   ,Group Status Bit 62" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB61   ,Group Status Bit 61" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60   ,Group Status Bit 60" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB59   ,Group Status Bit 59" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB58   ,Group Status Bit 58" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57   ,Group Status Bit 57" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB56   ,Group Status Bit 56" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB55   ,Group Status Bit 55" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54   ,Group Status Bit 54" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB53   ,Group Status Bit 53" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB52   ,Group Status Bit 52" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51   ,Group Status Bit 51" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB50   ,Group Status Bit 50" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB49   ,Group Status Bit 49" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48   ,Group Status Bit 48" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB47   ,Group Status Bit 47" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB46   ,Group Status Bit 46" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45   ,Group Status Bit 45" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB44   ,Group Status Bit 44" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB43   ,Group Status Bit 43" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42   ,Group Status Bit 42" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB41   ,Group Status Bit 41" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB40   ,Group Status Bit 40" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39   ,Group Status Bit 39" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB38   ,Group Status Bit 38" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB37   ,Group Status Bit 37" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36   ,Group Status Bit 36" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB35   ,Group Status Bit 35" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB34   ,Group Status Bit 34" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33   ,Group Status Bit 33" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB32   ,Group Status Bit 32" "Group 0,Group 1"
else
rgroup.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0088))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)"
bitfld.long 0x00 31. " GSB95   ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB94   ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB93   ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB92   ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB91   ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB90   ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB89   ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB88   ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB87   ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB86   ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB85   ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB84   ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB83   ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB82   ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB81   ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB80   ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB79   ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB78   ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB77   ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB76   ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB75   ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB74   ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB73   ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB72   ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB71   ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB70   ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB69   ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB68   ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB67   ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB66   ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB65   ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB64   ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)"
bitfld.long 0x00 31. " GSB95   ,Group Status Bit 95" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB94   ,Group Status Bit 94" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB93   ,Group Status Bit 93" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92   ,Group Status Bit 92" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB91   ,Group Status Bit 91" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB90   ,Group Status Bit 90" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89   ,Group Status Bit 89" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB88   ,Group Status Bit 88" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB87   ,Group Status Bit 87" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86   ,Group Status Bit 86" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB85   ,Group Status Bit 85" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB84   ,Group Status Bit 84" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83   ,Group Status Bit 83" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB82   ,Group Status Bit 82" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB81   ,Group Status Bit 81" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80   ,Group Status Bit 80" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB79   ,Group Status Bit 79" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB78   ,Group Status Bit 78" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77   ,Group Status Bit 77" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB76   ,Group Status Bit 76" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB75   ,Group Status Bit 75" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74   ,Group Status Bit 74" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB73   ,Group Status Bit 73" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB72   ,Group Status Bit 72" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71   ,Group Status Bit 71" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB70   ,Group Status Bit 70" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB69   ,Group Status Bit 69" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68   ,Group Status Bit 68" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB67   ,Group Status Bit 67" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB66   ,Group Status Bit 66" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65   ,Group Status Bit 65" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB64   ,Group Status Bit 64" "Group 0,Group 1"
else
rgroup.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x008C))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)"
bitfld.long 0x00 31. " GSB127  ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB126  ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB125  ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB124  ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB123  ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB122  ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB121  ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB120  ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB119  ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB118  ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB117  ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB116  ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB115  ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB114  ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB113  ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB112  ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB111  ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB110  ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB109  ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB108  ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB107  ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB106  ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB105  ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB104  ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB103  ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB102  ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB101  ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB100  ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB99   ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB98   ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB97   ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB96   ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)"
bitfld.long 0x00 31. " GSB127  ,Group Status Bit 127" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB126  ,Group Status Bit 126" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB125  ,Group Status Bit 125" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124  ,Group Status Bit 124" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB123  ,Group Status Bit 123" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB122  ,Group Status Bit 122" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121  ,Group Status Bit 121" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB120  ,Group Status Bit 120" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB119  ,Group Status Bit 119" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118  ,Group Status Bit 118" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB117  ,Group Status Bit 117" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB116  ,Group Status Bit 116" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115  ,Group Status Bit 115" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB114  ,Group Status Bit 114" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB113  ,Group Status Bit 113" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112  ,Group Status Bit 112" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB111  ,Group Status Bit 111" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB110  ,Group Status Bit 110" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109  ,Group Status Bit 109" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB108  ,Group Status Bit 108" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB107  ,Group Status Bit 107" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106  ,Group Status Bit 106" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB105  ,Group Status Bit 105" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB104  ,Group Status Bit 104" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103  ,Group Status Bit 103" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB102  ,Group Status Bit 102" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB101  ,Group Status Bit 101" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100  ,Group Status Bit 100" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB99   ,Group Status Bit 99" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB98   ,Group Status Bit 98" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97   ,Group Status Bit 97" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB96   ,Group Status Bit 96" "Group 0,Group 1"
else
rgroup.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0090))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)"
bitfld.long 0x00 31. " GSB159  ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB158  ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB157  ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB156  ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB155  ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB154  ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB153  ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB152  ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB151  ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB150  ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB149  ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB148  ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB147  ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB146  ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB145  ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB144  ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB143  ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB142  ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB141  ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB140  ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB139  ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB138  ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB137  ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB136  ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB135  ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB134  ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB133  ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB132  ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB131  ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB130  ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB129  ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB128  ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)"
bitfld.long 0x00 31. " GSB159  ,Group Status Bit 159" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB158  ,Group Status Bit 158" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB157  ,Group Status Bit 157" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156  ,Group Status Bit 156" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB155  ,Group Status Bit 155" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB154  ,Group Status Bit 154" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153  ,Group Status Bit 153" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB152  ,Group Status Bit 152" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB151  ,Group Status Bit 151" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150  ,Group Status Bit 150" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB149  ,Group Status Bit 149" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB148  ,Group Status Bit 148" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147  ,Group Status Bit 147" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB146  ,Group Status Bit 146" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB145  ,Group Status Bit 145" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144  ,Group Status Bit 144" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB143  ,Group Status Bit 143" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB142  ,Group Status Bit 142" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141  ,Group Status Bit 141" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB140  ,Group Status Bit 140" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB139  ,Group Status Bit 139" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138  ,Group Status Bit 138" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB137  ,Group Status Bit 137" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB136  ,Group Status Bit 136" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135  ,Group Status Bit 135" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB134  ,Group Status Bit 134" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB133  ,Group Status Bit 133" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132  ,Group Status Bit 132" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB131  ,Group Status Bit 131" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB130  ,Group Status Bit 130" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129  ,Group Status Bit 129" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB128  ,Group Status Bit 128" "Group 0,Group 1"
else
rgroup.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0094))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)"
bitfld.long 0x00 31. " GSB191  ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB190  ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB189  ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB188  ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB187  ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB186  ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB185  ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB184  ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB183  ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB182  ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB181  ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB180  ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB179  ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB178  ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB177  ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB176  ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB175  ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB174  ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB173  ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB172  ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB171  ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB170  ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB169  ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB168  ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB167  ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB166  ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB165  ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB164  ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB163  ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB162  ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB161  ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB160  ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)"
bitfld.long 0x00 31. " GSB191  ,Group Status Bit 191" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB190  ,Group Status Bit 190" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB189  ,Group Status Bit 189" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188  ,Group Status Bit 188" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB187  ,Group Status Bit 187" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB186  ,Group Status Bit 186" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185  ,Group Status Bit 185" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB184  ,Group Status Bit 184" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB183  ,Group Status Bit 183" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182  ,Group Status Bit 182" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB181  ,Group Status Bit 181" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB180  ,Group Status Bit 180" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179  ,Group Status Bit 179" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB178  ,Group Status Bit 178" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB177  ,Group Status Bit 177" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176  ,Group Status Bit 176" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB175  ,Group Status Bit 175" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB174  ,Group Status Bit 174" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173  ,Group Status Bit 173" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB172  ,Group Status Bit 172" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB171  ,Group Status Bit 171" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170  ,Group Status Bit 170" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB169  ,Group Status Bit 169" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB168  ,Group Status Bit 168" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167  ,Group Status Bit 167" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB166  ,Group Status Bit 166" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB165  ,Group Status Bit 165" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164  ,Group Status Bit 164" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB163  ,Group Status Bit 163" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB162  ,Group Status Bit 162" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161  ,Group Status Bit 161" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB160  ,Group Status Bit 160" "Group 0,Group 1"
else
rgroup.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x0098))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)"
bitfld.long 0x00 31. " GSB223  ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB222  ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB221  ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB220  ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB219  ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB218  ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB217  ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB216  ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB215  ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB214  ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB213  ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB212  ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB211  ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB210  ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB209  ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB208  ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB207  ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB206  ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB205  ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB204  ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB203  ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB202  ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB201  ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB200  ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB199  ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB198  ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB197  ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB196  ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB195  ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB194  ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB193  ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB192  ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)"
bitfld.long 0x00 31. " GSB223  ,Group Status Bit 223" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB222  ,Group Status Bit 222" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB221  ,Group Status Bit 221" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220  ,Group Status Bit 220" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB219  ,Group Status Bit 219" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB218  ,Group Status Bit 218" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217  ,Group Status Bit 217" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB216  ,Group Status Bit 216" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB215  ,Group Status Bit 215" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214  ,Group Status Bit 214" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB213  ,Group Status Bit 213" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB212  ,Group Status Bit 212" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211  ,Group Status Bit 211" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB210  ,Group Status Bit 210" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB209  ,Group Status Bit 209" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208  ,Group Status Bit 208" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB207  ,Group Status Bit 207" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB206  ,Group Status Bit 206" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205  ,Group Status Bit 205" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB204  ,Group Status Bit 204" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB203  ,Group Status Bit 203" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202  ,Group Status Bit 202" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB201  ,Group Status Bit 201" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB200  ,Group Status Bit 200" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199  ,Group Status Bit 199" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB198  ,Group Status Bit 198" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB197  ,Group Status Bit 197" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196  ,Group Status Bit 196" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB195  ,Group Status Bit 195" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB194  ,Group Status Bit 194" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193  ,Group Status Bit 193" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB192  ,Group Status Bit 192" "Group 0,Group 1"
else
rgroup.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x009C))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)"
bitfld.long 0x00 31. " GSB255  ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB254  ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB253  ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB252  ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB251  ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB250  ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB249  ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB248  ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB247  ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB246  ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB245  ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB244  ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB243  ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB242  ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB241  ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB240  ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB239  ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB238  ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB237  ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB236  ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB235  ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB234  ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB233  ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB232  ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB231  ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB230  ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB229  ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB228  ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB227  ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB226  ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB225  ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB224  ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)"
bitfld.long 0x00 31. " GSB255  ,Group Status Bit 255" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB254  ,Group Status Bit 254" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB253  ,Group Status Bit 253" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252  ,Group Status Bit 252" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB251  ,Group Status Bit 251" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB250  ,Group Status Bit 250" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249  ,Group Status Bit 249" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB248  ,Group Status Bit 248" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB247  ,Group Status Bit 247" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246  ,Group Status Bit 246" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB245  ,Group Status Bit 245" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB244  ,Group Status Bit 244" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243  ,Group Status Bit 243" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB242  ,Group Status Bit 242" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB241  ,Group Status Bit 241" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240  ,Group Status Bit 240" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB239  ,Group Status Bit 239" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB238  ,Group Status Bit 238" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237  ,Group Status Bit 237" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB236  ,Group Status Bit 236" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB235  ,Group Status Bit 235" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234  ,Group Status Bit 234" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB233  ,Group Status Bit 233" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB232  ,Group Status Bit 232" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231  ,Group Status Bit 231" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB230  ,Group Status Bit 230" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB229  ,Group Status Bit 229" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228  ,Group Status Bit 228" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB227  ,Group Status Bit 227" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB226  ,Group Status Bit 226" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225  ,Group Status Bit 225" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB224  ,Group Status Bit 224" "Group 0,Group 1"
else
rgroup.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00A0))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)"
bitfld.long 0x00 31. " GSB287  ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB286  ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB285  ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB284  ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB283  ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB282  ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB281  ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB280  ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB279  ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB278  ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB277  ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB276  ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB275  ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB274  ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB273  ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB272  ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB271  ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB270  ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB269  ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB268  ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB267  ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB266  ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB265  ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB264  ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB263  ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB262  ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB261  ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB260  ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB259  ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB258  ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB257  ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB256  ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)"
bitfld.long 0x00 31. " GSB287  ,Group Status Bit 287" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB286  ,Group Status Bit 286" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB285  ,Group Status Bit 285" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284  ,Group Status Bit 284" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB283  ,Group Status Bit 283" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB282  ,Group Status Bit 282" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281  ,Group Status Bit 281" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB280  ,Group Status Bit 280" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB279  ,Group Status Bit 279" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278  ,Group Status Bit 278" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB277  ,Group Status Bit 277" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB276  ,Group Status Bit 276" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275  ,Group Status Bit 275" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB274  ,Group Status Bit 274" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB273  ,Group Status Bit 273" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272  ,Group Status Bit 272" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB271  ,Group Status Bit 271" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB270  ,Group Status Bit 270" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269  ,Group Status Bit 269" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB268  ,Group Status Bit 268" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB267  ,Group Status Bit 267" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266  ,Group Status Bit 266" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB265  ,Group Status Bit 265" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB264  ,Group Status Bit 264" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263  ,Group Status Bit 263" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB262  ,Group Status Bit 262" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB261  ,Group Status Bit 261" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260  ,Group Status Bit 260" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB259  ,Group Status Bit 259" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB258  ,Group Status Bit 258" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257  ,Group Status Bit 257" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB256  ,Group Status Bit 256" "Group 0,Group 1"
else
rgroup.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00A4))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)"
bitfld.long 0x00 31. " GSB319  ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB318  ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB317  ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB316  ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB315  ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB314  ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB313  ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB312  ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB311  ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB310  ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB309  ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB308  ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB307  ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB306  ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB305  ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB304  ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB303  ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB302  ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB301  ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB300  ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB299  ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB298  ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB297  ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB296  ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB295  ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB294  ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB293  ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB292  ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB291  ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB290  ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB289  ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB288  ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)"
bitfld.long 0x00 31. " GSB319  ,Group Status Bit 319" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB318  ,Group Status Bit 318" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB317  ,Group Status Bit 317" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316  ,Group Status Bit 316" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB315  ,Group Status Bit 315" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB314  ,Group Status Bit 314" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313  ,Group Status Bit 313" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB312  ,Group Status Bit 312" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB311  ,Group Status Bit 311" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310  ,Group Status Bit 310" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB309  ,Group Status Bit 309" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB308  ,Group Status Bit 308" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307  ,Group Status Bit 307" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB306  ,Group Status Bit 306" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB305  ,Group Status Bit 305" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304  ,Group Status Bit 304" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB303  ,Group Status Bit 303" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB302  ,Group Status Bit 302" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301  ,Group Status Bit 301" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB300  ,Group Status Bit 300" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB299  ,Group Status Bit 299" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298  ,Group Status Bit 298" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB297  ,Group Status Bit 297" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB296  ,Group Status Bit 296" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295  ,Group Status Bit 295" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB294  ,Group Status Bit 294" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB293  ,Group Status Bit 293" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292  ,Group Status Bit 292" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB291  ,Group Status Bit 291" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB290  ,Group Status Bit 290" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289  ,Group Status Bit 289" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB288  ,Group Status Bit 288" "Group 0,Group 1"
else
rgroup.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00A8))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)"
bitfld.long 0x00 31. " GSB351  ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB350  ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB349  ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB348  ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB347  ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB346  ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB345  ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB344  ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB343  ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB342  ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB341  ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB340  ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB339  ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB338  ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB337  ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB336  ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB335  ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB334  ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB333  ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB332  ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB331  ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB330  ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB329  ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB328  ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB327  ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB326  ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB325  ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB324  ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB323  ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB322  ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB321  ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB320  ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)"
bitfld.long 0x00 31. " GSB351  ,Group Status Bit 351" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB350  ,Group Status Bit 350" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB349  ,Group Status Bit 349" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348  ,Group Status Bit 348" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB347  ,Group Status Bit 347" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB346  ,Group Status Bit 346" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345  ,Group Status Bit 345" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB344  ,Group Status Bit 344" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB343  ,Group Status Bit 343" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342  ,Group Status Bit 342" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB341  ,Group Status Bit 341" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB340  ,Group Status Bit 340" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339  ,Group Status Bit 339" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB338  ,Group Status Bit 338" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB337  ,Group Status Bit 337" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336  ,Group Status Bit 336" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB335  ,Group Status Bit 335" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB334  ,Group Status Bit 334" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333  ,Group Status Bit 333" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB332  ,Group Status Bit 332" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB331  ,Group Status Bit 331" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330  ,Group Status Bit 330" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB329  ,Group Status Bit 329" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB328  ,Group Status Bit 328" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327  ,Group Status Bit 327" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB326  ,Group Status Bit 326" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB325  ,Group Status Bit 325" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324  ,Group Status Bit 324" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB323  ,Group Status Bit 323" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB322  ,Group Status Bit 322" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321  ,Group Status Bit 321" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB320  ,Group Status Bit 320" "Group 0,Group 1"
else
rgroup.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00AC))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)"
bitfld.long 0x00 31. " GSB383  ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB382  ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB381  ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB380  ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB379  ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB378  ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB377  ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB376  ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB375  ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB374  ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB373  ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB372  ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB371  ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB370  ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB369  ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB368  ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB367  ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB366  ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB365  ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB364  ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB363  ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB362  ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB361  ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB360  ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB359  ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB358  ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB357  ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB356  ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB355  ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB354  ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB353  ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB352  ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)"
bitfld.long 0x00 31. " GSB383  ,Group Status Bit 383" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB382  ,Group Status Bit 382" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB381  ,Group Status Bit 381" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380  ,Group Status Bit 380" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB379  ,Group Status Bit 379" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB378  ,Group Status Bit 378" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377  ,Group Status Bit 377" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB376  ,Group Status Bit 376" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB375  ,Group Status Bit 375" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374  ,Group Status Bit 374" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB373  ,Group Status Bit 373" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB372  ,Group Status Bit 372" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371  ,Group Status Bit 371" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB370  ,Group Status Bit 370" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB369  ,Group Status Bit 369" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368  ,Group Status Bit 368" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB367  ,Group Status Bit 367" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB366  ,Group Status Bit 366" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365  ,Group Status Bit 365" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB364  ,Group Status Bit 364" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB363  ,Group Status Bit 363" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362  ,Group Status Bit 362" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB361  ,Group Status Bit 361" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB360  ,Group Status Bit 360" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359  ,Group Status Bit 359" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB358  ,Group Status Bit 358" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB357  ,Group Status Bit 357" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356  ,Group Status Bit 356" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB355  ,Group Status Bit 355" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB354  ,Group Status Bit 354" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353  ,Group Status Bit 353" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB352  ,Group Status Bit 352" "Group 0,Group 1"
else
rgroup.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00B0))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)"
bitfld.long 0x00 31. " GSB415  ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB414  ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB413  ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB412  ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB411  ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB410  ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB409  ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB408  ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB407  ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB406  ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB405  ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB404  ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB403  ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB402  ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB401  ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB400  ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB399  ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB398  ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB397  ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB396  ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB395  ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB394  ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB393  ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB392  ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB391  ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB390  ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB389  ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB388  ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB387  ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB386  ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB385  ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB384  ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)"
bitfld.long 0x00 31. " GSB415  ,Group Status Bit 415" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB414  ,Group Status Bit 414" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB413  ,Group Status Bit 413" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412  ,Group Status Bit 412" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB411  ,Group Status Bit 411" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB410  ,Group Status Bit 410" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409  ,Group Status Bit 409" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB408  ,Group Status Bit 408" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB407  ,Group Status Bit 407" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406  ,Group Status Bit 406" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB405  ,Group Status Bit 405" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB404  ,Group Status Bit 404" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403  ,Group Status Bit 403" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB402  ,Group Status Bit 402" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB401  ,Group Status Bit 401" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400  ,Group Status Bit 400" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB399  ,Group Status Bit 399" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB398  ,Group Status Bit 398" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397  ,Group Status Bit 397" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB396  ,Group Status Bit 396" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB395  ,Group Status Bit 395" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394  ,Group Status Bit 394" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB393  ,Group Status Bit 393" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB392  ,Group Status Bit 392" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391  ,Group Status Bit 391" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB390  ,Group Status Bit 390" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB389  ,Group Status Bit 389" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388  ,Group Status Bit 388" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB387  ,Group Status Bit 387" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB386  ,Group Status Bit 386" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385  ,Group Status Bit 385" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB384  ,Group Status Bit 384" "Group 0,Group 1"
else
rgroup.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00B4))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)"
bitfld.long 0x00 31. " GSB447  ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB446  ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB445  ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB444  ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB443  ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB442  ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB441  ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB440  ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB439  ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB438  ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB437  ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB436  ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB435  ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB434  ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB433  ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB432  ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB431  ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB430  ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB429  ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB428  ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB427  ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB426  ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB425  ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB424  ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB423  ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB422  ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB421  ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB420  ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB419  ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB418  ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB417  ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB416  ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)"
bitfld.long 0x00 31. " GSB447  ,Group Status Bit 447" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB446  ,Group Status Bit 446" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB445  ,Group Status Bit 445" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444  ,Group Status Bit 444" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB443  ,Group Status Bit 443" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB442  ,Group Status Bit 442" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441  ,Group Status Bit 441" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB440  ,Group Status Bit 440" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB439  ,Group Status Bit 439" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438  ,Group Status Bit 438" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB437  ,Group Status Bit 437" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB436  ,Group Status Bit 436" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435  ,Group Status Bit 435" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB434  ,Group Status Bit 434" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB433  ,Group Status Bit 433" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432  ,Group Status Bit 432" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB431  ,Group Status Bit 431" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB430  ,Group Status Bit 430" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429  ,Group Status Bit 429" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB428  ,Group Status Bit 428" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB427  ,Group Status Bit 427" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426  ,Group Status Bit 426" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB425  ,Group Status Bit 425" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB424  ,Group Status Bit 424" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423  ,Group Status Bit 423" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB422  ,Group Status Bit 422" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB421  ,Group Status Bit 421" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420  ,Group Status Bit 420" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB419  ,Group Status Bit 419" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB418  ,Group Status Bit 418" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417  ,Group Status Bit 417" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB416  ,Group Status Bit 416" "Group 0,Group 1"
else
rgroup.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00B8))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)"
bitfld.long 0x00 31. " GSB479  ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB478  ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB477  ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB476  ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB475  ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB474  ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB473  ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB472  ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB471  ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB470  ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB469  ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB468  ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB467  ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB466  ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB465  ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB464  ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB463  ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB462  ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB461  ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB460  ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB459  ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB458  ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB457  ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB456  ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB455  ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB454  ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB453  ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB452  ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB451  ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB450  ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB449  ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB448  ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)"
bitfld.long 0x00 31. " GSB479  ,Group Status Bit 479" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB478  ,Group Status Bit 478" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB477  ,Group Status Bit 477" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476  ,Group Status Bit 476" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB475  ,Group Status Bit 475" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB474  ,Group Status Bit 474" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473  ,Group Status Bit 473" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB472  ,Group Status Bit 472" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB471  ,Group Status Bit 471" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470  ,Group Status Bit 470" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB469  ,Group Status Bit 469" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB468  ,Group Status Bit 468" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467  ,Group Status Bit 467" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB466  ,Group Status Bit 466" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB465  ,Group Status Bit 465" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464  ,Group Status Bit 464" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB463  ,Group Status Bit 463" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB462  ,Group Status Bit 462" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461  ,Group Status Bit 461" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB460  ,Group Status Bit 460" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB459  ,Group Status Bit 459" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458  ,Group Status Bit 458" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB457  ,Group Status Bit 457" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB456  ,Group Status Bit 456" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455  ,Group Status Bit 455" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB454  ,Group Status Bit 454" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB453  ,Group Status Bit 453" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452  ,Group Status Bit 452" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB451  ,Group Status Bit 451" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB450  ,Group Status Bit 450" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449  ,Group Status Bit 449" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB448  ,Group Status Bit 448" "Group 0,Group 1"
else
rgroup.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00BC))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)"
bitfld.long 0x00 31. " GSB511  ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB510  ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB509  ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB508  ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB507  ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB506  ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB505  ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB504  ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB503  ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB502  ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB501  ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB500  ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB499  ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB498  ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB497  ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB496  ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB495  ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB494  ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB493  ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB492  ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB491  ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB490  ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB489  ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB488  ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB487  ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB486  ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB485  ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB484  ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB483  ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB482  ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB481  ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB480  ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)"
bitfld.long 0x00 31. " GSB511  ,Group Status Bit 511" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB510  ,Group Status Bit 510" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB509  ,Group Status Bit 509" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508  ,Group Status Bit 508" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB507  ,Group Status Bit 507" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB506  ,Group Status Bit 506" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505  ,Group Status Bit 505" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB504  ,Group Status Bit 504" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB503  ,Group Status Bit 503" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502  ,Group Status Bit 502" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB501  ,Group Status Bit 501" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB500  ,Group Status Bit 500" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499  ,Group Status Bit 499" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB498  ,Group Status Bit 498" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB497  ,Group Status Bit 497" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496  ,Group Status Bit 496" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB495  ,Group Status Bit 495" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB494  ,Group Status Bit 494" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493  ,Group Status Bit 493" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB492  ,Group Status Bit 492" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB491  ,Group Status Bit 491" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490  ,Group Status Bit 490" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB489  ,Group Status Bit 489" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB488  ,Group Status Bit 488" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487  ,Group Status Bit 487" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB486  ,Group Status Bit 486" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB485  ,Group Status Bit 485" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484  ,Group Status Bit 484" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB483  ,Group Status Bit 483" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB482  ,Group Status Bit 482" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481  ,Group Status Bit 481" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB480  ,Group Status Bit 480" "Group 0,Group 1"
else
rgroup.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00C0))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)"
bitfld.long 0x00 31. " GSB543  ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB542  ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB541  ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB540  ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB539  ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB538  ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB537  ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB536  ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB535  ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB534  ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB533  ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB532  ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB531  ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB530  ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB529  ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB528  ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB527  ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB526  ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB525  ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB524  ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB523  ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB522  ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB521  ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB520  ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB519  ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB518  ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB517  ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB516  ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB515  ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB514  ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB513  ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB512  ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)"
bitfld.long 0x00 31. " GSB543  ,Group Status Bit 543" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB542  ,Group Status Bit 542" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB541  ,Group Status Bit 541" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540  ,Group Status Bit 540" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB539  ,Group Status Bit 539" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB538  ,Group Status Bit 538" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537  ,Group Status Bit 537" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB536  ,Group Status Bit 536" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB535  ,Group Status Bit 535" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534  ,Group Status Bit 534" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB533  ,Group Status Bit 533" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB532  ,Group Status Bit 532" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531  ,Group Status Bit 531" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB530  ,Group Status Bit 530" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB529  ,Group Status Bit 529" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528  ,Group Status Bit 528" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB527  ,Group Status Bit 527" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB526  ,Group Status Bit 526" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525  ,Group Status Bit 525" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB524  ,Group Status Bit 524" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB523  ,Group Status Bit 523" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522  ,Group Status Bit 522" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB521  ,Group Status Bit 521" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB520  ,Group Status Bit 520" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519  ,Group Status Bit 519" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB518  ,Group Status Bit 518" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB517  ,Group Status Bit 517" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516  ,Group Status Bit 516" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB515  ,Group Status Bit 515" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB514  ,Group Status Bit 514" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513  ,Group Status Bit 513" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB512  ,Group Status Bit 512" "Group 0,Group 1"
else
rgroup.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00C4))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)"
bitfld.long 0x00 31. " GSB575  ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB574  ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB573  ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB572  ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB571  ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB570  ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB569  ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB568  ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB567  ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB566  ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB565  ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB564  ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB563  ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB562  ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB561  ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB560  ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB559  ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB558  ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB557  ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB556  ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB555  ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB554  ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB553  ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB552  ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB551  ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB550  ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB549  ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB548  ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB547  ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB546  ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB545  ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB544  ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)"
bitfld.long 0x00 31. " GSB575  ,Group Status Bit 575" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB574  ,Group Status Bit 574" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB573  ,Group Status Bit 573" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572  ,Group Status Bit 572" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB571  ,Group Status Bit 571" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB570  ,Group Status Bit 570" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569  ,Group Status Bit 569" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB568  ,Group Status Bit 568" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB567  ,Group Status Bit 567" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566  ,Group Status Bit 566" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB565  ,Group Status Bit 565" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB564  ,Group Status Bit 564" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563  ,Group Status Bit 563" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB562  ,Group Status Bit 562" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB561  ,Group Status Bit 561" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560  ,Group Status Bit 560" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB559  ,Group Status Bit 559" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB558  ,Group Status Bit 558" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557  ,Group Status Bit 557" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB556  ,Group Status Bit 556" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB555  ,Group Status Bit 555" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554  ,Group Status Bit 554" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB553  ,Group Status Bit 553" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB552  ,Group Status Bit 552" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551  ,Group Status Bit 551" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB550  ,Group Status Bit 550" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB549  ,Group Status Bit 549" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548  ,Group Status Bit 548" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB547  ,Group Status Bit 547" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB546  ,Group Status Bit 546" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545  ,Group Status Bit 545" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB544  ,Group Status Bit 544" "Group 0,Group 1"
else
rgroup.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00C8))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)"
bitfld.long 0x00 31. " GSB607  ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB606  ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB605  ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB604  ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB603  ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB602  ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB601  ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB600  ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB599  ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB598  ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB597  ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB596  ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB595  ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB594  ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB593  ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB592  ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB591  ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB590  ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB589  ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB588  ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB587  ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB586  ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB585  ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB584  ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB583  ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB582  ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB581  ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB580  ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB579  ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB578  ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB577  ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB576  ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)"
bitfld.long 0x00 31. " GSB607  ,Group Status Bit 607" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB606  ,Group Status Bit 606" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB605  ,Group Status Bit 605" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604  ,Group Status Bit 604" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB603  ,Group Status Bit 603" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB602  ,Group Status Bit 602" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601  ,Group Status Bit 601" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB600  ,Group Status Bit 600" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB599  ,Group Status Bit 599" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598  ,Group Status Bit 598" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB597  ,Group Status Bit 597" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB596  ,Group Status Bit 596" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595  ,Group Status Bit 595" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB594  ,Group Status Bit 594" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB593  ,Group Status Bit 593" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592  ,Group Status Bit 592" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB591  ,Group Status Bit 591" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB590  ,Group Status Bit 590" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589  ,Group Status Bit 589" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB588  ,Group Status Bit 588" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB587  ,Group Status Bit 587" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586  ,Group Status Bit 586" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB585  ,Group Status Bit 585" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB584  ,Group Status Bit 584" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583  ,Group Status Bit 583" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB582  ,Group Status Bit 582" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB581  ,Group Status Bit 581" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580  ,Group Status Bit 580" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB579  ,Group Status Bit 579" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB578  ,Group Status Bit 578" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577  ,Group Status Bit 577" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB576  ,Group Status Bit 576" "Group 0,Group 1"
else
rgroup.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00CC))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)"
bitfld.long 0x00 31. " GSB639  ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB638  ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB637  ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB636  ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB635  ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB634  ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB633  ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB632  ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB631  ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB630  ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB629  ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB628  ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB627  ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB626  ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB625  ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB624  ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB623  ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB622  ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB621  ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB620  ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB619  ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB618  ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB617  ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB616  ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB615  ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB614  ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB613  ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB612  ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB611  ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB610  ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB609  ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB608  ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)"
bitfld.long 0x00 31. " GSB639  ,Group Status Bit 639" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB638  ,Group Status Bit 638" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB637  ,Group Status Bit 637" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636  ,Group Status Bit 636" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB635  ,Group Status Bit 635" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB634  ,Group Status Bit 634" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633  ,Group Status Bit 633" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB632  ,Group Status Bit 632" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB631  ,Group Status Bit 631" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630  ,Group Status Bit 630" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB629  ,Group Status Bit 629" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB628  ,Group Status Bit 628" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627  ,Group Status Bit 627" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB626  ,Group Status Bit 626" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB625  ,Group Status Bit 625" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624  ,Group Status Bit 624" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB623  ,Group Status Bit 623" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB622  ,Group Status Bit 622" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621  ,Group Status Bit 621" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB620  ,Group Status Bit 620" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB619  ,Group Status Bit 619" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618  ,Group Status Bit 618" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB617  ,Group Status Bit 617" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB616  ,Group Status Bit 616" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615  ,Group Status Bit 615" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB614  ,Group Status Bit 614" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB613  ,Group Status Bit 613" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612  ,Group Status Bit 612" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB611  ,Group Status Bit 611" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB610  ,Group Status Bit 610" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609  ,Group Status Bit 609" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB608  ,Group Status Bit 608" "Group 0,Group 1"
else
rgroup.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00D0))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)"
bitfld.long 0x00 31. " GSB671  ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB670  ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB669  ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB668  ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB667  ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB666  ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB665  ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB664  ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB663  ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB662  ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB661  ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB660  ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB659  ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB658  ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB657  ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB656  ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB655  ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB654  ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB653  ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB652  ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB651  ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB650  ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB649  ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB648  ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB647  ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB646  ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB645  ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB644  ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB643  ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB642  ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB641  ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB640  ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)"
bitfld.long 0x00 31. " GSB671  ,Group Status Bit 671" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB670  ,Group Status Bit 670" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB669  ,Group Status Bit 669" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668  ,Group Status Bit 668" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB667  ,Group Status Bit 667" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB666  ,Group Status Bit 666" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665  ,Group Status Bit 665" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB664  ,Group Status Bit 664" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB663  ,Group Status Bit 663" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662  ,Group Status Bit 662" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB661  ,Group Status Bit 661" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB660  ,Group Status Bit 660" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659  ,Group Status Bit 659" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB658  ,Group Status Bit 658" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB657  ,Group Status Bit 657" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656  ,Group Status Bit 656" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB655  ,Group Status Bit 655" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB654  ,Group Status Bit 654" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653  ,Group Status Bit 653" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB652  ,Group Status Bit 652" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB651  ,Group Status Bit 651" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650  ,Group Status Bit 650" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB649  ,Group Status Bit 649" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB648  ,Group Status Bit 648" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647  ,Group Status Bit 647" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB646  ,Group Status Bit 646" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB645  ,Group Status Bit 645" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644  ,Group Status Bit 644" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB643  ,Group Status Bit 643" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB642  ,Group Status Bit 642" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641  ,Group Status Bit 641" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB640  ,Group Status Bit 640" "Group 0,Group 1"
else
rgroup.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00D4))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)"
bitfld.long 0x00 31. " GSB703  ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB702  ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB701  ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB700  ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB699  ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB698  ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB697  ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB696  ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB695  ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB694  ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB693  ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB692  ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB691  ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB690  ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB689  ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB688  ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB687  ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB686  ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB685  ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB684  ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB683  ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB682  ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB681  ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB680  ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB679  ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB678  ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB677  ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB676  ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB675  ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB674  ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB673  ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB672  ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)"
bitfld.long 0x00 31. " GSB703  ,Group Status Bit 703" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB702  ,Group Status Bit 702" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB701  ,Group Status Bit 701" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700  ,Group Status Bit 700" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB699  ,Group Status Bit 699" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB698  ,Group Status Bit 698" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697  ,Group Status Bit 697" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB696  ,Group Status Bit 696" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB695  ,Group Status Bit 695" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694  ,Group Status Bit 694" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB693  ,Group Status Bit 693" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB692  ,Group Status Bit 692" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691  ,Group Status Bit 691" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB690  ,Group Status Bit 690" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB689  ,Group Status Bit 689" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688  ,Group Status Bit 688" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB687  ,Group Status Bit 687" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB686  ,Group Status Bit 686" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685  ,Group Status Bit 685" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB684  ,Group Status Bit 684" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB683  ,Group Status Bit 683" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682  ,Group Status Bit 682" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB681  ,Group Status Bit 681" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB680  ,Group Status Bit 680" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679  ,Group Status Bit 679" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB678  ,Group Status Bit 678" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB677  ,Group Status Bit 677" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676  ,Group Status Bit 676" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB675  ,Group Status Bit 675" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB674  ,Group Status Bit 674" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673  ,Group Status Bit 673" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB672  ,Group Status Bit 672" "Group 0,Group 1"
else
rgroup.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00D8))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)"
bitfld.long 0x00 31. " GSB735  ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB734  ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB733  ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB732  ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB731  ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB730  ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB729  ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB728  ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB727  ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB726  ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB725  ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB724  ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB723  ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB722  ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB721  ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB720  ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB719  ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB718  ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB717  ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB716  ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB715  ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB714  ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB713  ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB712  ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB711  ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB710  ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB709  ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB708  ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB707  ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB706  ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB705  ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB704  ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)"
bitfld.long 0x00 31. " GSB735  ,Group Status Bit 735" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB734  ,Group Status Bit 734" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB733  ,Group Status Bit 733" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732  ,Group Status Bit 732" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB731  ,Group Status Bit 731" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB730  ,Group Status Bit 730" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729  ,Group Status Bit 729" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB728  ,Group Status Bit 728" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB727  ,Group Status Bit 727" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726  ,Group Status Bit 726" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB725  ,Group Status Bit 725" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB724  ,Group Status Bit 724" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723  ,Group Status Bit 723" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB722  ,Group Status Bit 722" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB721  ,Group Status Bit 721" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720  ,Group Status Bit 720" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB719  ,Group Status Bit 719" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB718  ,Group Status Bit 718" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717  ,Group Status Bit 717" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB716  ,Group Status Bit 716" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB715  ,Group Status Bit 715" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714  ,Group Status Bit 714" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB713  ,Group Status Bit 713" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB712  ,Group Status Bit 712" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711  ,Group Status Bit 711" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB710  ,Group Status Bit 710" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB709  ,Group Status Bit 709" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708  ,Group Status Bit 708" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB707  ,Group Status Bit 707" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB706  ,Group Status Bit 706" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705  ,Group Status Bit 705" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB704  ,Group Status Bit 704" "Group 0,Group 1"
else
rgroup.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00DC))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)"
bitfld.long 0x00 31. " GSB767  ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB766  ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB765  ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB764  ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB763  ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB762  ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB761  ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB760  ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB759  ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB758  ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB757  ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB756  ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB755  ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB754  ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB753  ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB752  ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB751  ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB750  ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB749  ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB748  ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB747  ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB746  ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB745  ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB744  ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB743  ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB742  ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB741  ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB740  ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB739  ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB738  ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB737  ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB736  ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)"
bitfld.long 0x00 31. " GSB767  ,Group Status Bit 767" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB766  ,Group Status Bit 766" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB765  ,Group Status Bit 765" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764  ,Group Status Bit 764" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB763  ,Group Status Bit 763" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB762  ,Group Status Bit 762" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761  ,Group Status Bit 761" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB760  ,Group Status Bit 760" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB759  ,Group Status Bit 759" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758  ,Group Status Bit 758" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB757  ,Group Status Bit 757" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB756  ,Group Status Bit 756" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755  ,Group Status Bit 755" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB754  ,Group Status Bit 754" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB753  ,Group Status Bit 753" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752  ,Group Status Bit 752" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB751  ,Group Status Bit 751" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB750  ,Group Status Bit 750" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749  ,Group Status Bit 749" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB748  ,Group Status Bit 748" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB747  ,Group Status Bit 747" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746  ,Group Status Bit 746" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB745  ,Group Status Bit 745" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB744  ,Group Status Bit 744" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743  ,Group Status Bit 743" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB742  ,Group Status Bit 742" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB741  ,Group Status Bit 741" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740  ,Group Status Bit 740" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB739  ,Group Status Bit 739" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB738  ,Group Status Bit 738" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737  ,Group Status Bit 737" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB736  ,Group Status Bit 736" "Group 0,Group 1"
else
rgroup.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00E0))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)"
bitfld.long 0x00 31. " GSB799  ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB798  ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB797  ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB796  ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB795  ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB794  ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB793  ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB792  ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB791  ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB790  ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB789  ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB788  ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB787  ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB786  ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB785  ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB784  ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB783  ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB782  ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB781  ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB780  ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB779  ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB778  ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB777  ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB776  ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB775  ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB774  ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB773  ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB772  ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB771  ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB770  ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB769  ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB768  ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)"
bitfld.long 0x00 31. " GSB799  ,Group Status Bit 799" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB798  ,Group Status Bit 798" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB797  ,Group Status Bit 797" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796  ,Group Status Bit 796" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB795  ,Group Status Bit 795" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB794  ,Group Status Bit 794" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793  ,Group Status Bit 793" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB792  ,Group Status Bit 792" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB791  ,Group Status Bit 791" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790  ,Group Status Bit 790" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB789  ,Group Status Bit 789" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB788  ,Group Status Bit 788" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787  ,Group Status Bit 787" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB786  ,Group Status Bit 786" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB785  ,Group Status Bit 785" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784  ,Group Status Bit 784" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB783  ,Group Status Bit 783" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB782  ,Group Status Bit 782" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781  ,Group Status Bit 781" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB780  ,Group Status Bit 780" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB779  ,Group Status Bit 779" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778  ,Group Status Bit 778" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB777  ,Group Status Bit 777" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB776  ,Group Status Bit 776" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775  ,Group Status Bit 775" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB774  ,Group Status Bit 774" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB773  ,Group Status Bit 773" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772  ,Group Status Bit 772" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB771  ,Group Status Bit 771" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB770  ,Group Status Bit 770" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769  ,Group Status Bit 769" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB768  ,Group Status Bit 768" "Group 0,Group 1"
else
rgroup.long 0x0E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00E4))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)"
bitfld.long 0x00 31. " GSB831  ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB830  ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB829  ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB828  ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB827  ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB826  ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB825  ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB824  ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB823  ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB822  ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB821  ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB820  ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB819  ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB818  ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB817  ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB816  ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB815  ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB814  ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB813  ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB812  ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB811  ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB810  ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB809  ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB808  ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB807  ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB806  ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB805  ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB804  ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB803  ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB802  ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB801  ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB800  ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)"
bitfld.long 0x00 31. " GSB831  ,Group Status Bit 831" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB830  ,Group Status Bit 830" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB829  ,Group Status Bit 829" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828  ,Group Status Bit 828" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB827  ,Group Status Bit 827" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB826  ,Group Status Bit 826" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825  ,Group Status Bit 825" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB824  ,Group Status Bit 824" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB823  ,Group Status Bit 823" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822  ,Group Status Bit 822" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB821  ,Group Status Bit 821" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB820  ,Group Status Bit 820" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819  ,Group Status Bit 819" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB818  ,Group Status Bit 818" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB817  ,Group Status Bit 817" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816  ,Group Status Bit 816" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB815  ,Group Status Bit 815" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB814  ,Group Status Bit 814" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813  ,Group Status Bit 813" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB812  ,Group Status Bit 812" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB811  ,Group Status Bit 811" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810  ,Group Status Bit 810" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB809  ,Group Status Bit 809" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB808  ,Group Status Bit 808" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807  ,Group Status Bit 807" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB806  ,Group Status Bit 806" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB805  ,Group Status Bit 805" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804  ,Group Status Bit 804" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB803  ,Group Status Bit 803" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB802  ,Group Status Bit 802" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801  ,Group Status Bit 801" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB800  ,Group Status Bit 800" "Group 0,Group 1"
else
rgroup.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00E8))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)"
bitfld.long 0x00 31. " GSB863  ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB862  ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB861  ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB860  ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB859  ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB858  ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB857  ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB856  ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB855  ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB854  ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB853  ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB852  ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB851  ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB850  ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB849  ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB848  ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB847  ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB846  ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB845  ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB844  ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB843  ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB842  ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB841  ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB840  ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB839  ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB838  ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB837  ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB836  ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB835  ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB834  ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB833  ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB832  ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)"
bitfld.long 0x00 31. " GSB863  ,Group Status Bit 863" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB862  ,Group Status Bit 862" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB861  ,Group Status Bit 861" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860  ,Group Status Bit 860" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB859  ,Group Status Bit 859" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB858  ,Group Status Bit 858" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857  ,Group Status Bit 857" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB856  ,Group Status Bit 856" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB855  ,Group Status Bit 855" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854  ,Group Status Bit 854" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB853  ,Group Status Bit 853" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB852  ,Group Status Bit 852" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851  ,Group Status Bit 851" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB850  ,Group Status Bit 850" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB849  ,Group Status Bit 849" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848  ,Group Status Bit 848" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB847  ,Group Status Bit 847" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB846  ,Group Status Bit 846" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845  ,Group Status Bit 845" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB844  ,Group Status Bit 844" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB843  ,Group Status Bit 843" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842  ,Group Status Bit 842" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB841  ,Group Status Bit 841" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB840  ,Group Status Bit 840" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839  ,Group Status Bit 839" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB838  ,Group Status Bit 838" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB837  ,Group Status Bit 837" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836  ,Group Status Bit 836" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB835  ,Group Status Bit 835" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB834  ,Group Status Bit 834" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833  ,Group Status Bit 833" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB832  ,Group Status Bit 832" "Group 0,Group 1"
else
rgroup.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00EC))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)"
bitfld.long 0x00 31. " GSB895  ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB894  ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB893  ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB892  ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB891  ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB890  ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB889  ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB888  ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB887  ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB886  ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB885  ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB884  ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB883  ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB882  ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB881  ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB880  ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB879  ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB878  ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB877  ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB876  ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB875  ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB874  ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB873  ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB872  ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB871  ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB870  ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB869  ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB868  ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB867  ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB866  ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB865  ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB864  ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)"
bitfld.long 0x00 31. " GSB895  ,Group Status Bit 895" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB894  ,Group Status Bit 894" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB893  ,Group Status Bit 893" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892  ,Group Status Bit 892" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB891  ,Group Status Bit 891" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB890  ,Group Status Bit 890" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889  ,Group Status Bit 889" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB888  ,Group Status Bit 888" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB887  ,Group Status Bit 887" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886  ,Group Status Bit 886" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB885  ,Group Status Bit 885" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB884  ,Group Status Bit 884" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883  ,Group Status Bit 883" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB882  ,Group Status Bit 882" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB881  ,Group Status Bit 881" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880  ,Group Status Bit 880" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB879  ,Group Status Bit 879" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB878  ,Group Status Bit 878" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877  ,Group Status Bit 877" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB876  ,Group Status Bit 876" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB875  ,Group Status Bit 875" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874  ,Group Status Bit 874" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB873  ,Group Status Bit 873" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB872  ,Group Status Bit 872" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871  ,Group Status Bit 871" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB870  ,Group Status Bit 870" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB869  ,Group Status Bit 869" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868  ,Group Status Bit 868" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB867  ,Group Status Bit 867" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB866  ,Group Status Bit 866" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865  ,Group Status Bit 865" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB864  ,Group Status Bit 864" "Group 0,Group 1"
else
rgroup.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00F0))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)"
bitfld.long 0x00 31. " GSB927  ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB926  ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB925  ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB924  ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB923  ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB922  ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB921  ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB920  ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB919  ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB918  ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB917  ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB916  ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB915  ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB914  ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB913  ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB912  ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB911  ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB910  ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB909  ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB908  ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB907  ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB906  ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB905  ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB904  ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB903  ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB902  ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB901  ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB900  ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB899  ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB898  ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB897  ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB896  ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)"
bitfld.long 0x00 31. " GSB927  ,Group Status Bit 927" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB926  ,Group Status Bit 926" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB925  ,Group Status Bit 925" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924  ,Group Status Bit 924" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB923  ,Group Status Bit 923" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB922  ,Group Status Bit 922" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921  ,Group Status Bit 921" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB920  ,Group Status Bit 920" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB919  ,Group Status Bit 919" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918  ,Group Status Bit 918" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB917  ,Group Status Bit 917" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB916  ,Group Status Bit 916" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915  ,Group Status Bit 915" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB914  ,Group Status Bit 914" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB913  ,Group Status Bit 913" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912  ,Group Status Bit 912" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB911  ,Group Status Bit 911" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB910  ,Group Status Bit 910" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909  ,Group Status Bit 909" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB908  ,Group Status Bit 908" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB907  ,Group Status Bit 907" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906  ,Group Status Bit 906" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB905  ,Group Status Bit 905" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB904  ,Group Status Bit 904" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903  ,Group Status Bit 903" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB902  ,Group Status Bit 902" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB901  ,Group Status Bit 901" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900  ,Group Status Bit 900" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB899  ,Group Status Bit 899" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB898  ,Group Status Bit 898" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897  ,Group Status Bit 897" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB896  ,Group Status Bit 896" "Group 0,Group 1"
else
rgroup.long 0x0F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00F4))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)"
bitfld.long 0x00 31. " GSB959  ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB958  ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB957  ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB956  ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB955  ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB954  ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB953  ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB952  ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB951  ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB950  ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB949  ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB948  ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB947  ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB946  ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB945  ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB944  ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB943  ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB942  ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB941  ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB940  ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB939  ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB938  ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB937  ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB936  ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB935  ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB934  ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB933  ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB932  ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB931  ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB930  ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB929  ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB928  ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)"
bitfld.long 0x00 31. " GSB959  ,Group Status Bit 959" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB958  ,Group Status Bit 958" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB957  ,Group Status Bit 957" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956  ,Group Status Bit 956" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB955  ,Group Status Bit 955" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB954  ,Group Status Bit 954" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953  ,Group Status Bit 953" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB952  ,Group Status Bit 952" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB951  ,Group Status Bit 951" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950  ,Group Status Bit 950" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB949  ,Group Status Bit 949" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB948  ,Group Status Bit 948" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947  ,Group Status Bit 947" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB946  ,Group Status Bit 946" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB945  ,Group Status Bit 945" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944  ,Group Status Bit 944" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB943  ,Group Status Bit 943" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB942  ,Group Status Bit 942" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941  ,Group Status Bit 941" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB940  ,Group Status Bit 940" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB939  ,Group Status Bit 939" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938  ,Group Status Bit 938" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB937  ,Group Status Bit 937" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB936  ,Group Status Bit 936" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935  ,Group Status Bit 935" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB934  ,Group Status Bit 934" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB933  ,Group Status Bit 933" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932  ,Group Status Bit 932" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB931  ,Group Status Bit 931" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB930  ,Group Status Bit 930" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929  ,Group Status Bit 929" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB928  ,Group Status Bit 928" "Group 0,Group 1"
else
rgroup.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00F8))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)"
bitfld.long 0x00 31. " GSB991  ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 30. "  GSB990  ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 29. "  GSB989  ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 28. " GSB988  ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 27. "  GSB987  ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB986  ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB985  ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB984  ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB983  ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB982  ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB981  ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB980  ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB979  ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB978  ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB977  ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB976  ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB975  ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB974  ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB973  ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB972  ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB971  ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB970  ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB969  ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB968  ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB967  ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB966  ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB965  ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB964  ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB963  ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB962  ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB961  ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB960  ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)"
bitfld.long 0x00 31. " GSB991  ,Group Status Bit 991" "Group 0,Group 1"
bitfld.long 0x00 30. "  GSB990  ,Group Status Bit 990" "Group 0,Group 1"
bitfld.long 0x00 29. "  GSB989  ,Group Status Bit 989" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988  ,Group Status Bit 988" "Group 0,Group 1"
bitfld.long 0x00 27. "  GSB987  ,Group Status Bit 987" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB986  ,Group Status Bit 986" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985  ,Group Status Bit 985" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB984  ,Group Status Bit 984" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB983  ,Group Status Bit 983" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982  ,Group Status Bit 982" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB981  ,Group Status Bit 981" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB980  ,Group Status Bit 980" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979  ,Group Status Bit 979" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB978  ,Group Status Bit 978" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB977  ,Group Status Bit 977" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976  ,Group Status Bit 976" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB975  ,Group Status Bit 975" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB974  ,Group Status Bit 974" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973  ,Group Status Bit 973" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB972  ,Group Status Bit 972" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB971  ,Group Status Bit 971" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970  ,Group Status Bit 970" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB969  ,Group Status Bit 969" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB968  ,Group Status Bit 968" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967  ,Group Status Bit 967" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB966  ,Group Status Bit 966" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB965  ,Group Status Bit 965" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964  ,Group Status Bit 964" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB963  ,Group Status Bit 963" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB962  ,Group Status Bit 962" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961  ,Group Status Bit 961" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB960  ,Group Status Bit 960" "Group 0,Group 1"
else
rgroup.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(AD:0x03881000+0x00FC))
group.long 0x00FC++0x03
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)"
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 26. "  GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 24. "  GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 23. "  GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 21. "  GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 20. "  GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 18. "  GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 17. "  GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 15. "  GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 14. "  GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 12. "  GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 11. "  GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 9. "  GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 8. "  GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 7. " GSB999  ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 6. "  GSB998  ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 5. "  GSB997  ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 4. " GSB996  ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 3. "  GSB995  ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 2. "  GSB994  ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)"
textline "                          "
bitfld.long 0x00 1. " GSB993  ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)"
bitfld.long 0x00 0. "  GSB992  ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)"
elif (((per.l(AD:0x03881000+0x04))&0x0000001F)==0x1F)
group.long 0x00FC++0x03
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)"
bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1"
bitfld.long 0x00 26. "  GSB1018 ,Group Status Bit 1018" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1"
bitfld.long 0x00 24. "  GSB1016 ,Group Status Bit 1016" "Group 0,Group 1"
bitfld.long 0x00 23. "  GSB1015 ,Group Status Bit 1015" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1"
bitfld.long 0x00 21. "  GSB1013 ,Group Status Bit 1013" "Group 0,Group 1"
bitfld.long 0x00 20. "  GSB1012 ,Group Status Bit 1012" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1"
bitfld.long 0x00 18. "  GSB1010 ,Group Status Bit 1010" "Group 0,Group 1"
bitfld.long 0x00 17. "  GSB1009 ,Group Status Bit 1009" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1"
bitfld.long 0x00 15. "  GSB1007 ,Group Status Bit 1007" "Group 0,Group 1"
bitfld.long 0x00 14. "  GSB1006 ,Group Status Bit 1006" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1"
bitfld.long 0x00 12. "  GSB1004 ,Group Status Bit 1004" "Group 0,Group 1"
bitfld.long 0x00 11. "  GSB1003 ,Group Status Bit 1003" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1"
bitfld.long 0x00 9. "  GSB1001 ,Group Status Bit 1001" "Group 0,Group 1"
bitfld.long 0x00 8. "  GSB1000 ,Group Status Bit 1000" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB999  ,Group Status Bit 999" "Group 0,Group 1"
bitfld.long 0x00 6. "  GSB998  ,Group Status Bit 998" "Group 0,Group 1"
bitfld.long 0x00 5. "  GSB997  ,Group Status Bit 997" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB996  ,Group Status Bit 996" "Group 0,Group 1"
bitfld.long 0x00 3. "  GSB995  ,Group Status Bit 995" "Group 0,Group 1"
bitfld.long 0x00 2. "  GSB994  ,Group Status Bit 994" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB993  ,Group Status Bit 993" "Group 0,Group 1"
bitfld.long 0x00 0. "  GSB992  ,Group Status Bit 992" "Group 0,Group 1"
else
rgroup.long 0x00FC++0x03
line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
tree.end
endif
width 24.
tree "Set/Clear Enable Registers"
group.long 0x0100++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31   ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB30   ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB29   ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28   ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB27   ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB26   ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25   ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB24   ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB23   ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22   ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB21   ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB20   ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19   ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB18   ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB17   ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16   ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB15   ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB14   ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13   ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB12   ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB11   ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10   ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB9    ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB8    ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7    ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB6    ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB5    ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4    ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB3    ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB2    ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1    ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB0    ,Set/Clear Enable Bit 0" "Disabled,Enabled"
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63   ,Set/Clear Enable Bit 63" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB62   ,Set/Clear Enable Bit 62" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB61   ,Set/Clear Enable Bit 61" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60   ,Set/Clear Enable Bit 60" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB59   ,Set/Clear Enable Bit 59" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB58   ,Set/Clear Enable Bit 58" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57   ,Set/Clear Enable Bit 57" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB56   ,Set/Clear Enable Bit 56" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB55   ,Set/Clear Enable Bit 55" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54   ,Set/Clear Enable Bit 54" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB53   ,Set/Clear Enable Bit 53" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB52   ,Set/Clear Enable Bit 52" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51   ,Set/Clear Enable Bit 51" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB50   ,Set/Clear Enable Bit 50" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB49   ,Set/Clear Enable Bit 49" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48   ,Set/Clear Enable Bit 48" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB47   ,Set/Clear Enable Bit 47" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB46   ,Set/Clear Enable Bit 46" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45   ,Set/Clear Enable Bit 45" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB44   ,Set/Clear Enable Bit 44" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB43   ,Set/Clear Enable Bit 43" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42   ,Set/Clear Enable Bit 42" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB41   ,Set/Clear Enable Bit 41" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB40   ,Set/Clear Enable Bit 40" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39   ,Set/Clear Enable Bit 39" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB38   ,Set/Clear Enable Bit 38" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB37   ,Set/Clear Enable Bit 37" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36   ,Set/Clear Enable Bit 36" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB35   ,Set/Clear Enable Bit 35" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB34   ,Set/Clear Enable Bit 34" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33   ,Set/Clear Enable Bit 33" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB32   ,Set/Clear Enable Bit 32" "Disabled,Enabled"
else
rgroup.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95   ,Set/Clear Enable Bit 95" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB94   ,Set/Clear Enable Bit 94" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB93   ,Set/Clear Enable Bit 93" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92   ,Set/Clear Enable Bit 92" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB91   ,Set/Clear Enable Bit 91" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB90   ,Set/Clear Enable Bit 90" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89   ,Set/Clear Enable Bit 89" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB88   ,Set/Clear Enable Bit 88" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB87   ,Set/Clear Enable Bit 87" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86   ,Set/Clear Enable Bit 86" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB85   ,Set/Clear Enable Bit 85" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB84   ,Set/Clear Enable Bit 84" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83   ,Set/Clear Enable Bit 83" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB82   ,Set/Clear Enable Bit 82" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB81   ,Set/Clear Enable Bit 81" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80   ,Set/Clear Enable Bit 80" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB79   ,Set/Clear Enable Bit 79" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB78   ,Set/Clear Enable Bit 78" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77   ,Set/Clear Enable Bit 77" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB76   ,Set/Clear Enable Bit 76" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB75   ,Set/Clear Enable Bit 75" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74   ,Set/Clear Enable Bit 74" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB73   ,Set/Clear Enable Bit 73" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB72   ,Set/Clear Enable Bit 72" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71   ,Set/Clear Enable Bit 71" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB70   ,Set/Clear Enable Bit 70" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB69   ,Set/Clear Enable Bit 69" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68   ,Set/Clear Enable Bit 68" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB67   ,Set/Clear Enable Bit 67" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB66   ,Set/Clear Enable Bit 66" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65   ,Set/Clear Enable Bit 65" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB64   ,Set/Clear Enable Bit 64" "Disabled,Enabled"
else
rgroup.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127  ,Set/Clear Enable Bit 127" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB126  ,Set/Clear Enable Bit 126" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB125  ,Set/Clear Enable Bit 125" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124  ,Set/Clear Enable Bit 124" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB123  ,Set/Clear Enable Bit 123" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB122  ,Set/Clear Enable Bit 122" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121  ,Set/Clear Enable Bit 121" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB120  ,Set/Clear Enable Bit 120" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB119  ,Set/Clear Enable Bit 119" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118  ,Set/Clear Enable Bit 118" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB117  ,Set/Clear Enable Bit 117" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB116  ,Set/Clear Enable Bit 116" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115  ,Set/Clear Enable Bit 115" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB114  ,Set/Clear Enable Bit 114" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB113  ,Set/Clear Enable Bit 113" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112  ,Set/Clear Enable Bit 112" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB111  ,Set/Clear Enable Bit 111" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB110  ,Set/Clear Enable Bit 110" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109  ,Set/Clear Enable Bit 109" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB108  ,Set/Clear Enable Bit 108" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB107  ,Set/Clear Enable Bit 107" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106  ,Set/Clear Enable Bit 106" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB105  ,Set/Clear Enable Bit 105" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB104  ,Set/Clear Enable Bit 104" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103  ,Set/Clear Enable Bit 103" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB102  ,Set/Clear Enable Bit 102" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB101  ,Set/Clear Enable Bit 101" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100  ,Set/Clear Enable Bit 100" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB99   ,Set/Clear Enable Bit 99" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB98   ,Set/Clear Enable Bit 98" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97   ,Set/Clear Enable Bit 97" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB96   ,Set/Clear Enable Bit 96" "Disabled,Enabled"
else
rgroup.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159  ,Set/Clear Enable Bit 159" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB158  ,Set/Clear Enable Bit 158" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB157  ,Set/Clear Enable Bit 157" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156  ,Set/Clear Enable Bit 156" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB155  ,Set/Clear Enable Bit 155" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB154  ,Set/Clear Enable Bit 154" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153  ,Set/Clear Enable Bit 153" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB152  ,Set/Clear Enable Bit 152" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB151  ,Set/Clear Enable Bit 151" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150  ,Set/Clear Enable Bit 150" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB149  ,Set/Clear Enable Bit 149" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB148  ,Set/Clear Enable Bit 148" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147  ,Set/Clear Enable Bit 147" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB146  ,Set/Clear Enable Bit 146" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB145  ,Set/Clear Enable Bit 145" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144  ,Set/Clear Enable Bit 144" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB143  ,Set/Clear Enable Bit 143" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB142  ,Set/Clear Enable Bit 142" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141  ,Set/Clear Enable Bit 141" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB140  ,Set/Clear Enable Bit 140" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB139  ,Set/Clear Enable Bit 139" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138  ,Set/Clear Enable Bit 138" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB137  ,Set/Clear Enable Bit 137" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB136  ,Set/Clear Enable Bit 136" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135  ,Set/Clear Enable Bit 135" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB134  ,Set/Clear Enable Bit 134" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB133  ,Set/Clear Enable Bit 133" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132  ,Set/Clear Enable Bit 132" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB131  ,Set/Clear Enable Bit 131" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB130  ,Set/Clear Enable Bit 130" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129  ,Set/Clear Enable Bit 129" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB128  ,Set/Clear Enable Bit 128" "Disabled,Enabled"
else
rgroup.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191  ,Set/Clear Enable Bit 191" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB190  ,Set/Clear Enable Bit 190" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB189  ,Set/Clear Enable Bit 189" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188  ,Set/Clear Enable Bit 188" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB187  ,Set/Clear Enable Bit 187" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB186  ,Set/Clear Enable Bit 186" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185  ,Set/Clear Enable Bit 185" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB184  ,Set/Clear Enable Bit 184" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB183  ,Set/Clear Enable Bit 183" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182  ,Set/Clear Enable Bit 182" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB181  ,Set/Clear Enable Bit 181" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB180  ,Set/Clear Enable Bit 180" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179  ,Set/Clear Enable Bit 179" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB178  ,Set/Clear Enable Bit 178" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB177  ,Set/Clear Enable Bit 177" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176  ,Set/Clear Enable Bit 176" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB175  ,Set/Clear Enable Bit 175" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB174  ,Set/Clear Enable Bit 174" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173  ,Set/Clear Enable Bit 173" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB172  ,Set/Clear Enable Bit 172" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB171  ,Set/Clear Enable Bit 171" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170  ,Set/Clear Enable Bit 170" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB169  ,Set/Clear Enable Bit 169" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB168  ,Set/Clear Enable Bit 168" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167  ,Set/Clear Enable Bit 167" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB166  ,Set/Clear Enable Bit 166" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB165  ,Set/Clear Enable Bit 165" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164  ,Set/Clear Enable Bit 164" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB163  ,Set/Clear Enable Bit 163" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB162  ,Set/Clear Enable Bit 162" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161  ,Set/Clear Enable Bit 161" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB160  ,Set/Clear Enable Bit 160" "Disabled,Enabled"
else
rgroup.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223  ,Set/Clear Enable Bit 223" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB222  ,Set/Clear Enable Bit 222" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB221  ,Set/Clear Enable Bit 221" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220  ,Set/Clear Enable Bit 220" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB219  ,Set/Clear Enable Bit 219" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB218  ,Set/Clear Enable Bit 218" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217  ,Set/Clear Enable Bit 217" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB216  ,Set/Clear Enable Bit 216" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB215  ,Set/Clear Enable Bit 215" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214  ,Set/Clear Enable Bit 214" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB213  ,Set/Clear Enable Bit 213" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB212  ,Set/Clear Enable Bit 212" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211  ,Set/Clear Enable Bit 211" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB210  ,Set/Clear Enable Bit 210" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB209  ,Set/Clear Enable Bit 209" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208  ,Set/Clear Enable Bit 208" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB207  ,Set/Clear Enable Bit 207" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB206  ,Set/Clear Enable Bit 206" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205  ,Set/Clear Enable Bit 205" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB204  ,Set/Clear Enable Bit 204" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB203  ,Set/Clear Enable Bit 203" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202  ,Set/Clear Enable Bit 202" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB201  ,Set/Clear Enable Bit 201" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB200  ,Set/Clear Enable Bit 200" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199  ,Set/Clear Enable Bit 199" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB198  ,Set/Clear Enable Bit 198" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB197  ,Set/Clear Enable Bit 197" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196  ,Set/Clear Enable Bit 196" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB195  ,Set/Clear Enable Bit 195" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB194  ,Set/Clear Enable Bit 194" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193  ,Set/Clear Enable Bit 193" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB192  ,Set/Clear Enable Bit 192" "Disabled,Enabled"
else
rgroup.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255  ,Set/Clear Enable Bit 255" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB254  ,Set/Clear Enable Bit 254" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB253  ,Set/Clear Enable Bit 253" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252  ,Set/Clear Enable Bit 252" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB251  ,Set/Clear Enable Bit 251" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB250  ,Set/Clear Enable Bit 250" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249  ,Set/Clear Enable Bit 249" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB248  ,Set/Clear Enable Bit 248" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB247  ,Set/Clear Enable Bit 247" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246  ,Set/Clear Enable Bit 246" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB245  ,Set/Clear Enable Bit 245" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB244  ,Set/Clear Enable Bit 244" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243  ,Set/Clear Enable Bit 243" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB242  ,Set/Clear Enable Bit 242" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB241  ,Set/Clear Enable Bit 241" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240  ,Set/Clear Enable Bit 240" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB239  ,Set/Clear Enable Bit 239" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB238  ,Set/Clear Enable Bit 238" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237  ,Set/Clear Enable Bit 237" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB236  ,Set/Clear Enable Bit 236" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB235  ,Set/Clear Enable Bit 235" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234  ,Set/Clear Enable Bit 234" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB233  ,Set/Clear Enable Bit 233" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB232  ,Set/Clear Enable Bit 232" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231  ,Set/Clear Enable Bit 231" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB230  ,Set/Clear Enable Bit 230" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB229  ,Set/Clear Enable Bit 229" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228  ,Set/Clear Enable Bit 228" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB227  ,Set/Clear Enable Bit 227" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB226  ,Set/Clear Enable Bit 226" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225  ,Set/Clear Enable Bit 225" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB224  ,Set/Clear Enable Bit 224" "Disabled,Enabled"
else
rgroup.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287  ,Set/Clear Enable Bit 287" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB286  ,Set/Clear Enable Bit 286" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB285  ,Set/Clear Enable Bit 285" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284  ,Set/Clear Enable Bit 284" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB283  ,Set/Clear Enable Bit 283" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB282  ,Set/Clear Enable Bit 282" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281  ,Set/Clear Enable Bit 281" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB280  ,Set/Clear Enable Bit 280" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB279  ,Set/Clear Enable Bit 279" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278  ,Set/Clear Enable Bit 278" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB277  ,Set/Clear Enable Bit 277" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB276  ,Set/Clear Enable Bit 276" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275  ,Set/Clear Enable Bit 275" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB274  ,Set/Clear Enable Bit 274" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB273  ,Set/Clear Enable Bit 273" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272  ,Set/Clear Enable Bit 272" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB271  ,Set/Clear Enable Bit 271" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB270  ,Set/Clear Enable Bit 270" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269  ,Set/Clear Enable Bit 269" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB268  ,Set/Clear Enable Bit 268" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB267  ,Set/Clear Enable Bit 267" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266  ,Set/Clear Enable Bit 266" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB265  ,Set/Clear Enable Bit 265" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB264  ,Set/Clear Enable Bit 264" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263  ,Set/Clear Enable Bit 263" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB262  ,Set/Clear Enable Bit 262" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB261  ,Set/Clear Enable Bit 261" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260  ,Set/Clear Enable Bit 260" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB259  ,Set/Clear Enable Bit 259" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB258  ,Set/Clear Enable Bit 258" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257  ,Set/Clear Enable Bit 257" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB256  ,Set/Clear Enable Bit 256" "Disabled,Enabled"
else
rgroup.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319  ,Set/Clear Enable Bit 319" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB318  ,Set/Clear Enable Bit 318" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB317  ,Set/Clear Enable Bit 317" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316  ,Set/Clear Enable Bit 316" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB315  ,Set/Clear Enable Bit 315" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB314  ,Set/Clear Enable Bit 314" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313  ,Set/Clear Enable Bit 313" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB312  ,Set/Clear Enable Bit 312" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB311  ,Set/Clear Enable Bit 311" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310  ,Set/Clear Enable Bit 310" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB309  ,Set/Clear Enable Bit 309" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB308  ,Set/Clear Enable Bit 308" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307  ,Set/Clear Enable Bit 307" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB306  ,Set/Clear Enable Bit 306" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB305  ,Set/Clear Enable Bit 305" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304  ,Set/Clear Enable Bit 304" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB303  ,Set/Clear Enable Bit 303" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB302  ,Set/Clear Enable Bit 302" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301  ,Set/Clear Enable Bit 301" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB300  ,Set/Clear Enable Bit 300" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB299  ,Set/Clear Enable Bit 299" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298  ,Set/Clear Enable Bit 298" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB297  ,Set/Clear Enable Bit 297" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB296  ,Set/Clear Enable Bit 296" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295  ,Set/Clear Enable Bit 295" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB294  ,Set/Clear Enable Bit 294" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB293  ,Set/Clear Enable Bit 293" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292  ,Set/Clear Enable Bit 292" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB291  ,Set/Clear Enable Bit 291" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB290  ,Set/Clear Enable Bit 290" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289  ,Set/Clear Enable Bit 289" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB288  ,Set/Clear Enable Bit 288" "Disabled,Enabled"
else
rgroup.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351  ,Set/Clear Enable Bit 351" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB350  ,Set/Clear Enable Bit 350" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB349  ,Set/Clear Enable Bit 349" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348  ,Set/Clear Enable Bit 348" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB347  ,Set/Clear Enable Bit 347" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB346  ,Set/Clear Enable Bit 346" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345  ,Set/Clear Enable Bit 345" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB344  ,Set/Clear Enable Bit 344" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB343  ,Set/Clear Enable Bit 343" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342  ,Set/Clear Enable Bit 342" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB341  ,Set/Clear Enable Bit 341" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB340  ,Set/Clear Enable Bit 340" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339  ,Set/Clear Enable Bit 339" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB338  ,Set/Clear Enable Bit 338" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB337  ,Set/Clear Enable Bit 337" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336  ,Set/Clear Enable Bit 336" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB335  ,Set/Clear Enable Bit 335" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB334  ,Set/Clear Enable Bit 334" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333  ,Set/Clear Enable Bit 333" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB332  ,Set/Clear Enable Bit 332" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB331  ,Set/Clear Enable Bit 331" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330  ,Set/Clear Enable Bit 330" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB329  ,Set/Clear Enable Bit 329" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB328  ,Set/Clear Enable Bit 328" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327  ,Set/Clear Enable Bit 327" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB326  ,Set/Clear Enable Bit 326" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB325  ,Set/Clear Enable Bit 325" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324  ,Set/Clear Enable Bit 324" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB323  ,Set/Clear Enable Bit 323" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB322  ,Set/Clear Enable Bit 322" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321  ,Set/Clear Enable Bit 321" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB320  ,Set/Clear Enable Bit 320" "Disabled,Enabled"
else
rgroup.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383  ,Set/Clear Enable Bit 383" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB382  ,Set/Clear Enable Bit 382" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB381  ,Set/Clear Enable Bit 381" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380  ,Set/Clear Enable Bit 380" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB379  ,Set/Clear Enable Bit 379" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB378  ,Set/Clear Enable Bit 378" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377  ,Set/Clear Enable Bit 377" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB376  ,Set/Clear Enable Bit 376" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB375  ,Set/Clear Enable Bit 375" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374  ,Set/Clear Enable Bit 374" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB373  ,Set/Clear Enable Bit 373" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB372  ,Set/Clear Enable Bit 372" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371  ,Set/Clear Enable Bit 371" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB370  ,Set/Clear Enable Bit 370" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB369  ,Set/Clear Enable Bit 369" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368  ,Set/Clear Enable Bit 368" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB367  ,Set/Clear Enable Bit 367" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB366  ,Set/Clear Enable Bit 366" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365  ,Set/Clear Enable Bit 365" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB364  ,Set/Clear Enable Bit 364" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB363  ,Set/Clear Enable Bit 363" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362  ,Set/Clear Enable Bit 362" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB361  ,Set/Clear Enable Bit 361" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB360  ,Set/Clear Enable Bit 360" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359  ,Set/Clear Enable Bit 359" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB358  ,Set/Clear Enable Bit 358" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB357  ,Set/Clear Enable Bit 357" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356  ,Set/Clear Enable Bit 356" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB355  ,Set/Clear Enable Bit 355" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB354  ,Set/Clear Enable Bit 354" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353  ,Set/Clear Enable Bit 353" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB352  ,Set/Clear Enable Bit 352" "Disabled,Enabled"
else
rgroup.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415  ,Set/Clear Enable Bit 415" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB414  ,Set/Clear Enable Bit 414" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB413  ,Set/Clear Enable Bit 413" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412  ,Set/Clear Enable Bit 412" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB411  ,Set/Clear Enable Bit 411" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB410  ,Set/Clear Enable Bit 410" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409  ,Set/Clear Enable Bit 409" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB408  ,Set/Clear Enable Bit 408" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB407  ,Set/Clear Enable Bit 407" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406  ,Set/Clear Enable Bit 406" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB405  ,Set/Clear Enable Bit 405" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB404  ,Set/Clear Enable Bit 404" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403  ,Set/Clear Enable Bit 403" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB402  ,Set/Clear Enable Bit 402" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB401  ,Set/Clear Enable Bit 401" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400  ,Set/Clear Enable Bit 400" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB399  ,Set/Clear Enable Bit 399" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB398  ,Set/Clear Enable Bit 398" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397  ,Set/Clear Enable Bit 397" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB396  ,Set/Clear Enable Bit 396" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB395  ,Set/Clear Enable Bit 395" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394  ,Set/Clear Enable Bit 394" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB393  ,Set/Clear Enable Bit 393" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB392  ,Set/Clear Enable Bit 392" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391  ,Set/Clear Enable Bit 391" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB390  ,Set/Clear Enable Bit 390" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB389  ,Set/Clear Enable Bit 389" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388  ,Set/Clear Enable Bit 388" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB387  ,Set/Clear Enable Bit 387" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB386  ,Set/Clear Enable Bit 386" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385  ,Set/Clear Enable Bit 385" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB384  ,Set/Clear Enable Bit 384" "Disabled,Enabled"
else
rgroup.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447  ,Set/Clear Enable Bit 447" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB446  ,Set/Clear Enable Bit 446" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB445  ,Set/Clear Enable Bit 445" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444  ,Set/Clear Enable Bit 444" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB443  ,Set/Clear Enable Bit 443" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB442  ,Set/Clear Enable Bit 442" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441  ,Set/Clear Enable Bit 441" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB440  ,Set/Clear Enable Bit 440" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB439  ,Set/Clear Enable Bit 439" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438  ,Set/Clear Enable Bit 438" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB437  ,Set/Clear Enable Bit 437" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB436  ,Set/Clear Enable Bit 436" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435  ,Set/Clear Enable Bit 435" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB434  ,Set/Clear Enable Bit 434" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB433  ,Set/Clear Enable Bit 433" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432  ,Set/Clear Enable Bit 432" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB431  ,Set/Clear Enable Bit 431" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB430  ,Set/Clear Enable Bit 430" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429  ,Set/Clear Enable Bit 429" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB428  ,Set/Clear Enable Bit 428" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB427  ,Set/Clear Enable Bit 427" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426  ,Set/Clear Enable Bit 426" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB425  ,Set/Clear Enable Bit 425" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB424  ,Set/Clear Enable Bit 424" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423  ,Set/Clear Enable Bit 423" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB422  ,Set/Clear Enable Bit 422" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB421  ,Set/Clear Enable Bit 421" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420  ,Set/Clear Enable Bit 420" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB419  ,Set/Clear Enable Bit 419" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB418  ,Set/Clear Enable Bit 418" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417  ,Set/Clear Enable Bit 417" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB416  ,Set/Clear Enable Bit 416" "Disabled,Enabled"
else
rgroup.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479  ,Set/Clear Enable Bit 479" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB478  ,Set/Clear Enable Bit 478" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB477  ,Set/Clear Enable Bit 477" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476  ,Set/Clear Enable Bit 476" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB475  ,Set/Clear Enable Bit 475" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB474  ,Set/Clear Enable Bit 474" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473  ,Set/Clear Enable Bit 473" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB472  ,Set/Clear Enable Bit 472" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB471  ,Set/Clear Enable Bit 471" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470  ,Set/Clear Enable Bit 470" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB469  ,Set/Clear Enable Bit 469" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB468  ,Set/Clear Enable Bit 468" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467  ,Set/Clear Enable Bit 467" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB466  ,Set/Clear Enable Bit 466" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB465  ,Set/Clear Enable Bit 465" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464  ,Set/Clear Enable Bit 464" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB463  ,Set/Clear Enable Bit 463" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB462  ,Set/Clear Enable Bit 462" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461  ,Set/Clear Enable Bit 461" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB460  ,Set/Clear Enable Bit 460" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB459  ,Set/Clear Enable Bit 459" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458  ,Set/Clear Enable Bit 458" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB457  ,Set/Clear Enable Bit 457" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB456  ,Set/Clear Enable Bit 456" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455  ,Set/Clear Enable Bit 455" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB454  ,Set/Clear Enable Bit 454" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB453  ,Set/Clear Enable Bit 453" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452  ,Set/Clear Enable Bit 452" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB451  ,Set/Clear Enable Bit 451" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB450  ,Set/Clear Enable Bit 450" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449  ,Set/Clear Enable Bit 449" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB448  ,Set/Clear Enable Bit 448" "Disabled,Enabled"
else
rgroup.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511  ,Set/Clear Enable Bit 511" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB510  ,Set/Clear Enable Bit 510" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB509  ,Set/Clear Enable Bit 509" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508  ,Set/Clear Enable Bit 508" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB507  ,Set/Clear Enable Bit 507" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB506  ,Set/Clear Enable Bit 506" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505  ,Set/Clear Enable Bit 505" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB504  ,Set/Clear Enable Bit 504" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB503  ,Set/Clear Enable Bit 503" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502  ,Set/Clear Enable Bit 502" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB501  ,Set/Clear Enable Bit 501" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB500  ,Set/Clear Enable Bit 500" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499  ,Set/Clear Enable Bit 499" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB498  ,Set/Clear Enable Bit 498" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB497  ,Set/Clear Enable Bit 497" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496  ,Set/Clear Enable Bit 496" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB495  ,Set/Clear Enable Bit 495" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB494  ,Set/Clear Enable Bit 494" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493  ,Set/Clear Enable Bit 493" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB492  ,Set/Clear Enable Bit 492" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB491  ,Set/Clear Enable Bit 491" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490  ,Set/Clear Enable Bit 490" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB489  ,Set/Clear Enable Bit 489" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB488  ,Set/Clear Enable Bit 488" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487  ,Set/Clear Enable Bit 487" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB486  ,Set/Clear Enable Bit 486" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB485  ,Set/Clear Enable Bit 485" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484  ,Set/Clear Enable Bit 484" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB483  ,Set/Clear Enable Bit 483" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB482  ,Set/Clear Enable Bit 482" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481  ,Set/Clear Enable Bit 481" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB480  ,Set/Clear Enable Bit 480" "Disabled,Enabled"
else
rgroup.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543  ,Set/Clear Enable Bit 543" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB542  ,Set/Clear Enable Bit 542" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB541  ,Set/Clear Enable Bit 541" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540  ,Set/Clear Enable Bit 540" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB539  ,Set/Clear Enable Bit 539" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB538  ,Set/Clear Enable Bit 538" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537  ,Set/Clear Enable Bit 537" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB536  ,Set/Clear Enable Bit 536" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB535  ,Set/Clear Enable Bit 535" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534  ,Set/Clear Enable Bit 534" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB533  ,Set/Clear Enable Bit 533" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB532  ,Set/Clear Enable Bit 532" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531  ,Set/Clear Enable Bit 531" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB530  ,Set/Clear Enable Bit 530" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB529  ,Set/Clear Enable Bit 529" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528  ,Set/Clear Enable Bit 528" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB527  ,Set/Clear Enable Bit 527" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB526  ,Set/Clear Enable Bit 526" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525  ,Set/Clear Enable Bit 525" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB524  ,Set/Clear Enable Bit 524" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB523  ,Set/Clear Enable Bit 523" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522  ,Set/Clear Enable Bit 522" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB521  ,Set/Clear Enable Bit 521" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB520  ,Set/Clear Enable Bit 520" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519  ,Set/Clear Enable Bit 519" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB518  ,Set/Clear Enable Bit 518" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB517  ,Set/Clear Enable Bit 517" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516  ,Set/Clear Enable Bit 516" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB515  ,Set/Clear Enable Bit 515" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB514  ,Set/Clear Enable Bit 514" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513  ,Set/Clear Enable Bit 513" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB512  ,Set/Clear Enable Bit 512" "Disabled,Enabled"
else
rgroup.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575  ,Set/Clear Enable Bit 575" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB574  ,Set/Clear Enable Bit 574" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB573  ,Set/Clear Enable Bit 573" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572  ,Set/Clear Enable Bit 572" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB571  ,Set/Clear Enable Bit 571" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB570  ,Set/Clear Enable Bit 570" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569  ,Set/Clear Enable Bit 569" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB568  ,Set/Clear Enable Bit 568" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB567  ,Set/Clear Enable Bit 567" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566  ,Set/Clear Enable Bit 566" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB565  ,Set/Clear Enable Bit 565" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB564  ,Set/Clear Enable Bit 564" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563  ,Set/Clear Enable Bit 563" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB562  ,Set/Clear Enable Bit 562" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB561  ,Set/Clear Enable Bit 561" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560  ,Set/Clear Enable Bit 560" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB559  ,Set/Clear Enable Bit 559" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB558  ,Set/Clear Enable Bit 558" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557  ,Set/Clear Enable Bit 557" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB556  ,Set/Clear Enable Bit 556" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB555  ,Set/Clear Enable Bit 555" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554  ,Set/Clear Enable Bit 554" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB553  ,Set/Clear Enable Bit 553" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB552  ,Set/Clear Enable Bit 552" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551  ,Set/Clear Enable Bit 551" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB550  ,Set/Clear Enable Bit 550" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB549  ,Set/Clear Enable Bit 549" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548  ,Set/Clear Enable Bit 548" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB547  ,Set/Clear Enable Bit 547" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB546  ,Set/Clear Enable Bit 546" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545  ,Set/Clear Enable Bit 545" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB544  ,Set/Clear Enable Bit 544" "Disabled,Enabled"
else
rgroup.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607  ,Set/Clear Enable Bit 607" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB606  ,Set/Clear Enable Bit 606" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB605  ,Set/Clear Enable Bit 605" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604  ,Set/Clear Enable Bit 604" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB603  ,Set/Clear Enable Bit 603" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB602  ,Set/Clear Enable Bit 602" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601  ,Set/Clear Enable Bit 601" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB600  ,Set/Clear Enable Bit 600" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB599  ,Set/Clear Enable Bit 599" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598  ,Set/Clear Enable Bit 598" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB597  ,Set/Clear Enable Bit 597" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB596  ,Set/Clear Enable Bit 596" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595  ,Set/Clear Enable Bit 595" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB594  ,Set/Clear Enable Bit 594" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB593  ,Set/Clear Enable Bit 593" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592  ,Set/Clear Enable Bit 592" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB591  ,Set/Clear Enable Bit 591" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB590  ,Set/Clear Enable Bit 590" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589  ,Set/Clear Enable Bit 589" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB588  ,Set/Clear Enable Bit 588" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB587  ,Set/Clear Enable Bit 587" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586  ,Set/Clear Enable Bit 586" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB585  ,Set/Clear Enable Bit 585" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB584  ,Set/Clear Enable Bit 584" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583  ,Set/Clear Enable Bit 583" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB582  ,Set/Clear Enable Bit 582" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB581  ,Set/Clear Enable Bit 581" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580  ,Set/Clear Enable Bit 580" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB579  ,Set/Clear Enable Bit 579" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB578  ,Set/Clear Enable Bit 578" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577  ,Set/Clear Enable Bit 577" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB576  ,Set/Clear Enable Bit 576" "Disabled,Enabled"
else
rgroup.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639  ,Set/Clear Enable Bit 639" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB638  ,Set/Clear Enable Bit 638" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB637  ,Set/Clear Enable Bit 637" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636  ,Set/Clear Enable Bit 636" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB635  ,Set/Clear Enable Bit 635" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB634  ,Set/Clear Enable Bit 634" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633  ,Set/Clear Enable Bit 633" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB632  ,Set/Clear Enable Bit 632" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB631  ,Set/Clear Enable Bit 631" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630  ,Set/Clear Enable Bit 630" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB629  ,Set/Clear Enable Bit 629" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB628  ,Set/Clear Enable Bit 628" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627  ,Set/Clear Enable Bit 627" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB626  ,Set/Clear Enable Bit 626" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB625  ,Set/Clear Enable Bit 625" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624  ,Set/Clear Enable Bit 624" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB623  ,Set/Clear Enable Bit 623" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB622  ,Set/Clear Enable Bit 622" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621  ,Set/Clear Enable Bit 621" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB620  ,Set/Clear Enable Bit 620" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB619  ,Set/Clear Enable Bit 619" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618  ,Set/Clear Enable Bit 618" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB617  ,Set/Clear Enable Bit 617" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB616  ,Set/Clear Enable Bit 616" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615  ,Set/Clear Enable Bit 615" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB614  ,Set/Clear Enable Bit 614" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB613  ,Set/Clear Enable Bit 613" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612  ,Set/Clear Enable Bit 612" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB611  ,Set/Clear Enable Bit 611" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB610  ,Set/Clear Enable Bit 610" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609  ,Set/Clear Enable Bit 609" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB608  ,Set/Clear Enable Bit 608" "Disabled,Enabled"
else
rgroup.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671  ,Set/Clear Enable Bit 671" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB670  ,Set/Clear Enable Bit 670" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB669  ,Set/Clear Enable Bit 669" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668  ,Set/Clear Enable Bit 668" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB667  ,Set/Clear Enable Bit 667" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB666  ,Set/Clear Enable Bit 666" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665  ,Set/Clear Enable Bit 665" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB664  ,Set/Clear Enable Bit 664" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB663  ,Set/Clear Enable Bit 663" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662  ,Set/Clear Enable Bit 662" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB661  ,Set/Clear Enable Bit 661" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB660  ,Set/Clear Enable Bit 660" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659  ,Set/Clear Enable Bit 659" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB658  ,Set/Clear Enable Bit 658" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB657  ,Set/Clear Enable Bit 657" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656  ,Set/Clear Enable Bit 656" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB655  ,Set/Clear Enable Bit 655" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB654  ,Set/Clear Enable Bit 654" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653  ,Set/Clear Enable Bit 653" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB652  ,Set/Clear Enable Bit 652" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB651  ,Set/Clear Enable Bit 651" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650  ,Set/Clear Enable Bit 650" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB649  ,Set/Clear Enable Bit 649" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB648  ,Set/Clear Enable Bit 648" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647  ,Set/Clear Enable Bit 647" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB646  ,Set/Clear Enable Bit 646" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB645  ,Set/Clear Enable Bit 645" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644  ,Set/Clear Enable Bit 644" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB643  ,Set/Clear Enable Bit 643" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB642  ,Set/Clear Enable Bit 642" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641  ,Set/Clear Enable Bit 641" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB640  ,Set/Clear Enable Bit 640" "Disabled,Enabled"
else
rgroup.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703  ,Set/Clear Enable Bit 703" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB702  ,Set/Clear Enable Bit 702" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB701  ,Set/Clear Enable Bit 701" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700  ,Set/Clear Enable Bit 700" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB699  ,Set/Clear Enable Bit 699" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB698  ,Set/Clear Enable Bit 698" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697  ,Set/Clear Enable Bit 697" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB696  ,Set/Clear Enable Bit 696" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB695  ,Set/Clear Enable Bit 695" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694  ,Set/Clear Enable Bit 694" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB693  ,Set/Clear Enable Bit 693" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB692  ,Set/Clear Enable Bit 692" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691  ,Set/Clear Enable Bit 691" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB690  ,Set/Clear Enable Bit 690" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB689  ,Set/Clear Enable Bit 689" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688  ,Set/Clear Enable Bit 688" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB687  ,Set/Clear Enable Bit 687" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB686  ,Set/Clear Enable Bit 686" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685  ,Set/Clear Enable Bit 685" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB684  ,Set/Clear Enable Bit 684" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB683  ,Set/Clear Enable Bit 683" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682  ,Set/Clear Enable Bit 682" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB681  ,Set/Clear Enable Bit 681" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB680  ,Set/Clear Enable Bit 680" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679  ,Set/Clear Enable Bit 679" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB678  ,Set/Clear Enable Bit 678" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB677  ,Set/Clear Enable Bit 677" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676  ,Set/Clear Enable Bit 676" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB675  ,Set/Clear Enable Bit 675" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB674  ,Set/Clear Enable Bit 674" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673  ,Set/Clear Enable Bit 673" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB672  ,Set/Clear Enable Bit 672" "Disabled,Enabled"
else
rgroup.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735  ,Set/Clear Enable Bit 735" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB734  ,Set/Clear Enable Bit 734" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB733  ,Set/Clear Enable Bit 733" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732  ,Set/Clear Enable Bit 732" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB731  ,Set/Clear Enable Bit 731" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB730  ,Set/Clear Enable Bit 730" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729  ,Set/Clear Enable Bit 729" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB728  ,Set/Clear Enable Bit 728" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB727  ,Set/Clear Enable Bit 727" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726  ,Set/Clear Enable Bit 726" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB725  ,Set/Clear Enable Bit 725" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB724  ,Set/Clear Enable Bit 724" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723  ,Set/Clear Enable Bit 723" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB722  ,Set/Clear Enable Bit 722" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB721  ,Set/Clear Enable Bit 721" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720  ,Set/Clear Enable Bit 720" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB719  ,Set/Clear Enable Bit 719" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB718  ,Set/Clear Enable Bit 718" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717  ,Set/Clear Enable Bit 717" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB716  ,Set/Clear Enable Bit 716" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB715  ,Set/Clear Enable Bit 715" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714  ,Set/Clear Enable Bit 714" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB713  ,Set/Clear Enable Bit 713" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB712  ,Set/Clear Enable Bit 712" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711  ,Set/Clear Enable Bit 711" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB710  ,Set/Clear Enable Bit 710" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB709  ,Set/Clear Enable Bit 709" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708  ,Set/Clear Enable Bit 708" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB707  ,Set/Clear Enable Bit 707" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB706  ,Set/Clear Enable Bit 706" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705  ,Set/Clear Enable Bit 705" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB704  ,Set/Clear Enable Bit 704" "Disabled,Enabled"
else
rgroup.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767  ,Set/Clear Enable Bit 767" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB766  ,Set/Clear Enable Bit 766" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB765  ,Set/Clear Enable Bit 765" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764  ,Set/Clear Enable Bit 764" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB763  ,Set/Clear Enable Bit 763" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB762  ,Set/Clear Enable Bit 762" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761  ,Set/Clear Enable Bit 761" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB760  ,Set/Clear Enable Bit 760" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB759  ,Set/Clear Enable Bit 759" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758  ,Set/Clear Enable Bit 758" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB757  ,Set/Clear Enable Bit 757" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB756  ,Set/Clear Enable Bit 756" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755  ,Set/Clear Enable Bit 755" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB754  ,Set/Clear Enable Bit 754" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB753  ,Set/Clear Enable Bit 753" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752  ,Set/Clear Enable Bit 752" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB751  ,Set/Clear Enable Bit 751" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB750  ,Set/Clear Enable Bit 750" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749  ,Set/Clear Enable Bit 749" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB748  ,Set/Clear Enable Bit 748" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB747  ,Set/Clear Enable Bit 747" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746  ,Set/Clear Enable Bit 746" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB745  ,Set/Clear Enable Bit 745" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB744  ,Set/Clear Enable Bit 744" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743  ,Set/Clear Enable Bit 743" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB742  ,Set/Clear Enable Bit 742" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB741  ,Set/Clear Enable Bit 741" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740  ,Set/Clear Enable Bit 740" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB739  ,Set/Clear Enable Bit 739" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB738  ,Set/Clear Enable Bit 738" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737  ,Set/Clear Enable Bit 737" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB736  ,Set/Clear Enable Bit 736" "Disabled,Enabled"
else
rgroup.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799  ,Set/Clear Enable Bit 799" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB798  ,Set/Clear Enable Bit 798" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB797  ,Set/Clear Enable Bit 797" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796  ,Set/Clear Enable Bit 796" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB795  ,Set/Clear Enable Bit 795" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB794  ,Set/Clear Enable Bit 794" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793  ,Set/Clear Enable Bit 793" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB792  ,Set/Clear Enable Bit 792" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB791  ,Set/Clear Enable Bit 791" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790  ,Set/Clear Enable Bit 790" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB789  ,Set/Clear Enable Bit 789" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB788  ,Set/Clear Enable Bit 788" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787  ,Set/Clear Enable Bit 787" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB786  ,Set/Clear Enable Bit 786" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB785  ,Set/Clear Enable Bit 785" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784  ,Set/Clear Enable Bit 784" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB783  ,Set/Clear Enable Bit 783" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB782  ,Set/Clear Enable Bit 782" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781  ,Set/Clear Enable Bit 781" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB780  ,Set/Clear Enable Bit 780" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB779  ,Set/Clear Enable Bit 779" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778  ,Set/Clear Enable Bit 778" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB777  ,Set/Clear Enable Bit 777" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB776  ,Set/Clear Enable Bit 776" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775  ,Set/Clear Enable Bit 775" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB774  ,Set/Clear Enable Bit 774" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB773  ,Set/Clear Enable Bit 773" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772  ,Set/Clear Enable Bit 772" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB771  ,Set/Clear Enable Bit 771" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB770  ,Set/Clear Enable Bit 770" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769  ,Set/Clear Enable Bit 769" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB768  ,Set/Clear Enable Bit 768" "Disabled,Enabled"
else
rgroup.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831  ,Set/Clear Enable Bit 831" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB830  ,Set/Clear Enable Bit 830" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB829  ,Set/Clear Enable Bit 829" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828  ,Set/Clear Enable Bit 828" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB827  ,Set/Clear Enable Bit 827" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB826  ,Set/Clear Enable Bit 826" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825  ,Set/Clear Enable Bit 825" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB824  ,Set/Clear Enable Bit 824" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB823  ,Set/Clear Enable Bit 823" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822  ,Set/Clear Enable Bit 822" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB821  ,Set/Clear Enable Bit 821" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB820  ,Set/Clear Enable Bit 820" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819  ,Set/Clear Enable Bit 819" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB818  ,Set/Clear Enable Bit 818" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB817  ,Set/Clear Enable Bit 817" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816  ,Set/Clear Enable Bit 816" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB815  ,Set/Clear Enable Bit 815" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB814  ,Set/Clear Enable Bit 814" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813  ,Set/Clear Enable Bit 813" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB812  ,Set/Clear Enable Bit 812" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB811  ,Set/Clear Enable Bit 811" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810  ,Set/Clear Enable Bit 810" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB809  ,Set/Clear Enable Bit 809" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB808  ,Set/Clear Enable Bit 808" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807  ,Set/Clear Enable Bit 807" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB806  ,Set/Clear Enable Bit 806" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB805  ,Set/Clear Enable Bit 805" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804  ,Set/Clear Enable Bit 804" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB803  ,Set/Clear Enable Bit 803" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB802  ,Set/Clear Enable Bit 802" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801  ,Set/Clear Enable Bit 801" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB800  ,Set/Clear Enable Bit 800" "Disabled,Enabled"
else
rgroup.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863  ,Set/Clear Enable Bit 863" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB862  ,Set/Clear Enable Bit 862" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB861  ,Set/Clear Enable Bit 861" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860  ,Set/Clear Enable Bit 860" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB859  ,Set/Clear Enable Bit 859" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB858  ,Set/Clear Enable Bit 858" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857  ,Set/Clear Enable Bit 857" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB856  ,Set/Clear Enable Bit 856" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB855  ,Set/Clear Enable Bit 855" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854  ,Set/Clear Enable Bit 854" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB853  ,Set/Clear Enable Bit 853" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB852  ,Set/Clear Enable Bit 852" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851  ,Set/Clear Enable Bit 851" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB850  ,Set/Clear Enable Bit 850" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB849  ,Set/Clear Enable Bit 849" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848  ,Set/Clear Enable Bit 848" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB847  ,Set/Clear Enable Bit 847" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB846  ,Set/Clear Enable Bit 846" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845  ,Set/Clear Enable Bit 845" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB844  ,Set/Clear Enable Bit 844" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB843  ,Set/Clear Enable Bit 843" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842  ,Set/Clear Enable Bit 842" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB841  ,Set/Clear Enable Bit 841" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB840  ,Set/Clear Enable Bit 840" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839  ,Set/Clear Enable Bit 839" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB838  ,Set/Clear Enable Bit 838" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB837  ,Set/Clear Enable Bit 837" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836  ,Set/Clear Enable Bit 836" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB835  ,Set/Clear Enable Bit 835" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB834  ,Set/Clear Enable Bit 834" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833  ,Set/Clear Enable Bit 833" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB832  ,Set/Clear Enable Bit 832" "Disabled,Enabled"
else
rgroup.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895  ,Set/Clear Enable Bit 895" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB894  ,Set/Clear Enable Bit 894" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB893  ,Set/Clear Enable Bit 893" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892  ,Set/Clear Enable Bit 892" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB891  ,Set/Clear Enable Bit 891" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB890  ,Set/Clear Enable Bit 890" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889  ,Set/Clear Enable Bit 889" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB888  ,Set/Clear Enable Bit 888" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB887  ,Set/Clear Enable Bit 887" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886  ,Set/Clear Enable Bit 886" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB885  ,Set/Clear Enable Bit 885" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB884  ,Set/Clear Enable Bit 884" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883  ,Set/Clear Enable Bit 883" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB882  ,Set/Clear Enable Bit 882" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB881  ,Set/Clear Enable Bit 881" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880  ,Set/Clear Enable Bit 880" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB879  ,Set/Clear Enable Bit 879" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB878  ,Set/Clear Enable Bit 878" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877  ,Set/Clear Enable Bit 877" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB876  ,Set/Clear Enable Bit 876" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB875  ,Set/Clear Enable Bit 875" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874  ,Set/Clear Enable Bit 874" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB873  ,Set/Clear Enable Bit 873" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB872  ,Set/Clear Enable Bit 872" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871  ,Set/Clear Enable Bit 871" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB870  ,Set/Clear Enable Bit 870" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB869  ,Set/Clear Enable Bit 869" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868  ,Set/Clear Enable Bit 868" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB867  ,Set/Clear Enable Bit 867" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB866  ,Set/Clear Enable Bit 866" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865  ,Set/Clear Enable Bit 865" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB864  ,Set/Clear Enable Bit 864" "Disabled,Enabled"
else
rgroup.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927  ,Set/Clear Enable Bit 927" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB926  ,Set/Clear Enable Bit 926" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB925  ,Set/Clear Enable Bit 925" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924  ,Set/Clear Enable Bit 924" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB923  ,Set/Clear Enable Bit 923" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB922  ,Set/Clear Enable Bit 922" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921  ,Set/Clear Enable Bit 921" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB920  ,Set/Clear Enable Bit 920" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB919  ,Set/Clear Enable Bit 919" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918  ,Set/Clear Enable Bit 918" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB917  ,Set/Clear Enable Bit 917" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB916  ,Set/Clear Enable Bit 916" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915  ,Set/Clear Enable Bit 915" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB914  ,Set/Clear Enable Bit 914" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB913  ,Set/Clear Enable Bit 913" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912  ,Set/Clear Enable Bit 912" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB911  ,Set/Clear Enable Bit 911" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB910  ,Set/Clear Enable Bit 910" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909  ,Set/Clear Enable Bit 909" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB908  ,Set/Clear Enable Bit 908" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB907  ,Set/Clear Enable Bit 907" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906  ,Set/Clear Enable Bit 906" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB905  ,Set/Clear Enable Bit 905" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB904  ,Set/Clear Enable Bit 904" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903  ,Set/Clear Enable Bit 903" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB902  ,Set/Clear Enable Bit 902" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB901  ,Set/Clear Enable Bit 901" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900  ,Set/Clear Enable Bit 900" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB899  ,Set/Clear Enable Bit 899" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB898  ,Set/Clear Enable Bit 898" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897  ,Set/Clear Enable Bit 897" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB896  ,Set/Clear Enable Bit 896" "Disabled,Enabled"
else
rgroup.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959  ,Set/Clear Enable Bit 959" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB958  ,Set/Clear Enable Bit 958" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB957  ,Set/Clear Enable Bit 957" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956  ,Set/Clear Enable Bit 956" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB955  ,Set/Clear Enable Bit 955" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB954  ,Set/Clear Enable Bit 954" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953  ,Set/Clear Enable Bit 953" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB952  ,Set/Clear Enable Bit 952" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB951  ,Set/Clear Enable Bit 951" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950  ,Set/Clear Enable Bit 950" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB949  ,Set/Clear Enable Bit 949" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB948  ,Set/Clear Enable Bit 948" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947  ,Set/Clear Enable Bit 947" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB946  ,Set/Clear Enable Bit 946" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB945  ,Set/Clear Enable Bit 945" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944  ,Set/Clear Enable Bit 944" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB943  ,Set/Clear Enable Bit 943" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB942  ,Set/Clear Enable Bit 942" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941  ,Set/Clear Enable Bit 941" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB940  ,Set/Clear Enable Bit 940" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB939  ,Set/Clear Enable Bit 939" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938  ,Set/Clear Enable Bit 938" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB937  ,Set/Clear Enable Bit 937" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB936  ,Set/Clear Enable Bit 936" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935  ,Set/Clear Enable Bit 935" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB934  ,Set/Clear Enable Bit 934" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB933  ,Set/Clear Enable Bit 933" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932  ,Set/Clear Enable Bit 932" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB931  ,Set/Clear Enable Bit 931" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB930  ,Set/Clear Enable Bit 930" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929  ,Set/Clear Enable Bit 929" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB928  ,Set/Clear Enable Bit 928" "Disabled,Enabled"
else
rgroup.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991  ,Set/Clear Enable Bit 991" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB990  ,Set/Clear Enable Bit 990" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB989  ,Set/Clear Enable Bit 989" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988  ,Set/Clear Enable Bit 988" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB987  ,Set/Clear Enable Bit 987" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB986  ,Set/Clear Enable Bit 986" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985  ,Set/Clear Enable Bit 985" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB984  ,Set/Clear Enable Bit 984" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB983  ,Set/Clear Enable Bit 983" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982  ,Set/Clear Enable Bit 982" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB981  ,Set/Clear Enable Bit 981" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB980  ,Set/Clear Enable Bit 980" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979  ,Set/Clear Enable Bit 979" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB978  ,Set/Clear Enable Bit 978" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB977  ,Set/Clear Enable Bit 977" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976  ,Set/Clear Enable Bit 976" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB975  ,Set/Clear Enable Bit 975" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB974  ,Set/Clear Enable Bit 974" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973  ,Set/Clear Enable Bit 973" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB972  ,Set/Clear Enable Bit 972" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB971  ,Set/Clear Enable Bit 971" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970  ,Set/Clear Enable Bit 970" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB969  ,Set/Clear Enable Bit 969" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB968  ,Set/Clear Enable Bit 968" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967  ,Set/Clear Enable Bit 967" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB966  ,Set/Clear Enable Bit 966" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB965  ,Set/Clear Enable Bit 965" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964  ,Set/Clear Enable Bit 964" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB963  ,Set/Clear Enable Bit 963" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB962  ,Set/Clear Enable Bit 962" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961  ,Set/Clear Enable Bit 961" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB960  ,Set/Clear Enable Bit 960" "Disabled,Enabled"
else
rgroup.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)==0x1F)
group.long 0x017C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999  ,Set/Clear Enable Bit 999" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB998  ,Set/Clear Enable Bit 998" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB997  ,Set/Clear Enable Bit 997" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996  ,Set/Clear Enable Bit 996" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB995  ,Set/Clear Enable Bit 995" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB994  ,Set/Clear Enable Bit 994" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993  ,Set/Clear Enable Bit 993" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB992  ,Set/Clear Enable Bit 992" "Disabled,Enabled"
else
rgroup.long 0x017C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
tree.end
width 22.
tree "Set/Clear Pending Registers"
group.long 0x0200++0x03
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63   ,Set/Clear Pending Bit 63" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND62   ,Set/Clear Pending Bit 62" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND61   ,Set/Clear Pending Bit 61" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60   ,Set/Clear Pending Bit 60" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND59   ,Set/Clear Pending Bit 59" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND58   ,Set/Clear Pending Bit 58" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57   ,Set/Clear Pending Bit 57" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND56   ,Set/Clear Pending Bit 56" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND55   ,Set/Clear Pending Bit 55" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54   ,Set/Clear Pending Bit 54" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND53   ,Set/Clear Pending Bit 53" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND52   ,Set/Clear Pending Bit 52" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51   ,Set/Clear Pending Bit 51" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND50   ,Set/Clear Pending Bit 50" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND49   ,Set/Clear Pending Bit 49" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48   ,Set/Clear Pending Bit 48" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND47   ,Set/Clear Pending Bit 47" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND46   ,Set/Clear Pending Bit 46" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45   ,Set/Clear Pending Bit 45" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND44   ,Set/Clear Pending Bit 44" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND43   ,Set/Clear Pending Bit 43" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42   ,Set/Clear Pending Bit 42" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND41   ,Set/Clear Pending Bit 41" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND40   ,Set/Clear Pending Bit 40" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39   ,Set/Clear Pending Bit 39" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND38   ,Set/Clear Pending Bit 38" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND37   ,Set/Clear Pending Bit 37" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36   ,Set/Clear Pending Bit 36" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND35   ,Set/Clear Pending Bit 35" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND34   ,Set/Clear Pending Bit 34" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33   ,Set/Clear Pending Bit 33" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND32   ,Set/Clear Pending Bit 32" "Not pending,Pending"
else
rgroup.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95   ,Set/Clear Pending Bit 95" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND94   ,Set/Clear Pending Bit 94" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND93   ,Set/Clear Pending Bit 93" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92   ,Set/Clear Pending Bit 92" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND91   ,Set/Clear Pending Bit 91" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND90   ,Set/Clear Pending Bit 90" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89   ,Set/Clear Pending Bit 89" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND88   ,Set/Clear Pending Bit 88" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND87   ,Set/Clear Pending Bit 87" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86   ,Set/Clear Pending Bit 86" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND85   ,Set/Clear Pending Bit 85" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND84   ,Set/Clear Pending Bit 84" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83   ,Set/Clear Pending Bit 83" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND82   ,Set/Clear Pending Bit 82" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND81   ,Set/Clear Pending Bit 81" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80   ,Set/Clear Pending Bit 80" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND79   ,Set/Clear Pending Bit 79" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND78   ,Set/Clear Pending Bit 78" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77   ,Set/Clear Pending Bit 77" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND76   ,Set/Clear Pending Bit 76" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND75   ,Set/Clear Pending Bit 75" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74   ,Set/Clear Pending Bit 74" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND73   ,Set/Clear Pending Bit 73" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND72   ,Set/Clear Pending Bit 72" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71   ,Set/Clear Pending Bit 71" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND70   ,Set/Clear Pending Bit 70" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND69   ,Set/Clear Pending Bit 69" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68   ,Set/Clear Pending Bit 68" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND67   ,Set/Clear Pending Bit 67" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND66   ,Set/Clear Pending Bit 66" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65   ,Set/Clear Pending Bit 65" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND64   ,Set/Clear Pending Bit 64" "Not pending,Pending"
else
rgroup.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127  ,Set/Clear Pending Bit 127" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND126  ,Set/Clear Pending Bit 126" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND125  ,Set/Clear Pending Bit 125" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124  ,Set/Clear Pending Bit 124" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND123  ,Set/Clear Pending Bit 123" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND122  ,Set/Clear Pending Bit 122" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121  ,Set/Clear Pending Bit 121" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND120  ,Set/Clear Pending Bit 120" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND119  ,Set/Clear Pending Bit 119" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118  ,Set/Clear Pending Bit 118" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND117  ,Set/Clear Pending Bit 117" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND116  ,Set/Clear Pending Bit 116" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115  ,Set/Clear Pending Bit 115" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND114  ,Set/Clear Pending Bit 114" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND113  ,Set/Clear Pending Bit 113" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112  ,Set/Clear Pending Bit 112" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND111  ,Set/Clear Pending Bit 111" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND110  ,Set/Clear Pending Bit 110" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109  ,Set/Clear Pending Bit 109" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND108  ,Set/Clear Pending Bit 108" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND107  ,Set/Clear Pending Bit 107" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106  ,Set/Clear Pending Bit 106" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND105  ,Set/Clear Pending Bit 105" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND104  ,Set/Clear Pending Bit 104" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103  ,Set/Clear Pending Bit 103" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND102  ,Set/Clear Pending Bit 102" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND101  ,Set/Clear Pending Bit 101" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100  ,Set/Clear Pending Bit 100" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND99   ,Set/Clear Pending Bit 99" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND98   ,Set/Clear Pending Bit 98" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97   ,Set/Clear Pending Bit 97" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND96   ,Set/Clear Pending Bit 96" "Not pending,Pending"
else
rgroup.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159  ,Set/Clear Pending Bit 159" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND158  ,Set/Clear Pending Bit 158" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND157  ,Set/Clear Pending Bit 157" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156  ,Set/Clear Pending Bit 156" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND155  ,Set/Clear Pending Bit 155" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND154  ,Set/Clear Pending Bit 154" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153  ,Set/Clear Pending Bit 153" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND152  ,Set/Clear Pending Bit 152" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND151  ,Set/Clear Pending Bit 151" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150  ,Set/Clear Pending Bit 150" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND149  ,Set/Clear Pending Bit 149" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND148  ,Set/Clear Pending Bit 148" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147  ,Set/Clear Pending Bit 147" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND146  ,Set/Clear Pending Bit 146" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND145  ,Set/Clear Pending Bit 145" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144  ,Set/Clear Pending Bit 144" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND143  ,Set/Clear Pending Bit 143" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND142  ,Set/Clear Pending Bit 142" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141  ,Set/Clear Pending Bit 141" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND140  ,Set/Clear Pending Bit 140" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND139  ,Set/Clear Pending Bit 139" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138  ,Set/Clear Pending Bit 138" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND137  ,Set/Clear Pending Bit 137" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND136  ,Set/Clear Pending Bit 136" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135  ,Set/Clear Pending Bit 135" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND134  ,Set/Clear Pending Bit 134" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND133  ,Set/Clear Pending Bit 133" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132  ,Set/Clear Pending Bit 132" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND131  ,Set/Clear Pending Bit 131" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND130  ,Set/Clear Pending Bit 130" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129  ,Set/Clear Pending Bit 129" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND128  ,Set/Clear Pending Bit 128" "Not pending,Pending"
else
rgroup.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191  ,Set/Clear Pending Bit 191" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND190  ,Set/Clear Pending Bit 190" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND189  ,Set/Clear Pending Bit 189" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188  ,Set/Clear Pending Bit 188" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND187  ,Set/Clear Pending Bit 187" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND186  ,Set/Clear Pending Bit 186" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185  ,Set/Clear Pending Bit 185" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND184  ,Set/Clear Pending Bit 184" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND183  ,Set/Clear Pending Bit 183" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182  ,Set/Clear Pending Bit 182" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND181  ,Set/Clear Pending Bit 181" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND180  ,Set/Clear Pending Bit 180" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179  ,Set/Clear Pending Bit 179" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND178  ,Set/Clear Pending Bit 178" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND177  ,Set/Clear Pending Bit 177" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176  ,Set/Clear Pending Bit 176" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND175  ,Set/Clear Pending Bit 175" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND174  ,Set/Clear Pending Bit 174" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173  ,Set/Clear Pending Bit 173" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND172  ,Set/Clear Pending Bit 172" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND171  ,Set/Clear Pending Bit 171" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170  ,Set/Clear Pending Bit 170" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND169  ,Set/Clear Pending Bit 169" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND168  ,Set/Clear Pending Bit 168" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167  ,Set/Clear Pending Bit 167" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND166  ,Set/Clear Pending Bit 166" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND165  ,Set/Clear Pending Bit 165" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164  ,Set/Clear Pending Bit 164" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND163  ,Set/Clear Pending Bit 163" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND162  ,Set/Clear Pending Bit 162" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161  ,Set/Clear Pending Bit 161" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND160  ,Set/Clear Pending Bit 160" "Not pending,Pending"
else
rgroup.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223  ,Set/Clear Pending Bit 223" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND222  ,Set/Clear Pending Bit 222" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND221  ,Set/Clear Pending Bit 221" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220  ,Set/Clear Pending Bit 220" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND219  ,Set/Clear Pending Bit 219" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND218  ,Set/Clear Pending Bit 218" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217  ,Set/Clear Pending Bit 217" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND216  ,Set/Clear Pending Bit 216" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND215  ,Set/Clear Pending Bit 215" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214  ,Set/Clear Pending Bit 214" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND213  ,Set/Clear Pending Bit 213" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND212  ,Set/Clear Pending Bit 212" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211  ,Set/Clear Pending Bit 211" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND210  ,Set/Clear Pending Bit 210" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND209  ,Set/Clear Pending Bit 209" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208  ,Set/Clear Pending Bit 208" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND207  ,Set/Clear Pending Bit 207" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND206  ,Set/Clear Pending Bit 206" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205  ,Set/Clear Pending Bit 205" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND204  ,Set/Clear Pending Bit 204" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND203  ,Set/Clear Pending Bit 203" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202  ,Set/Clear Pending Bit 202" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND201  ,Set/Clear Pending Bit 201" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND200  ,Set/Clear Pending Bit 200" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199  ,Set/Clear Pending Bit 199" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND198  ,Set/Clear Pending Bit 198" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND197  ,Set/Clear Pending Bit 197" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196  ,Set/Clear Pending Bit 196" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND195  ,Set/Clear Pending Bit 195" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND194  ,Set/Clear Pending Bit 194" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193  ,Set/Clear Pending Bit 193" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND192  ,Set/Clear Pending Bit 192" "Not pending,Pending"
else
rgroup.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255  ,Set/Clear Pending Bit 255" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND254  ,Set/Clear Pending Bit 254" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND253  ,Set/Clear Pending Bit 253" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252  ,Set/Clear Pending Bit 252" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND251  ,Set/Clear Pending Bit 251" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND250  ,Set/Clear Pending Bit 250" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249  ,Set/Clear Pending Bit 249" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND248  ,Set/Clear Pending Bit 248" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND247  ,Set/Clear Pending Bit 247" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246  ,Set/Clear Pending Bit 246" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND245  ,Set/Clear Pending Bit 245" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND244  ,Set/Clear Pending Bit 244" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243  ,Set/Clear Pending Bit 243" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND242  ,Set/Clear Pending Bit 242" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND241  ,Set/Clear Pending Bit 241" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240  ,Set/Clear Pending Bit 240" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND239  ,Set/Clear Pending Bit 239" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND238  ,Set/Clear Pending Bit 238" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237  ,Set/Clear Pending Bit 237" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND236  ,Set/Clear Pending Bit 236" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND235  ,Set/Clear Pending Bit 235" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234  ,Set/Clear Pending Bit 234" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND233  ,Set/Clear Pending Bit 233" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND232  ,Set/Clear Pending Bit 232" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231  ,Set/Clear Pending Bit 231" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND230  ,Set/Clear Pending Bit 230" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND229  ,Set/Clear Pending Bit 229" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228  ,Set/Clear Pending Bit 228" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND227  ,Set/Clear Pending Bit 227" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND226  ,Set/Clear Pending Bit 226" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225  ,Set/Clear Pending Bit 225" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND224  ,Set/Clear Pending Bit 224" "Not pending,Pending"
else
rgroup.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287  ,Set/Clear Pending Bit 287" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND286  ,Set/Clear Pending Bit 286" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND285  ,Set/Clear Pending Bit 285" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284  ,Set/Clear Pending Bit 284" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND283  ,Set/Clear Pending Bit 283" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND282  ,Set/Clear Pending Bit 282" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281  ,Set/Clear Pending Bit 281" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND280  ,Set/Clear Pending Bit 280" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND279  ,Set/Clear Pending Bit 279" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278  ,Set/Clear Pending Bit 278" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND277  ,Set/Clear Pending Bit 277" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND276  ,Set/Clear Pending Bit 276" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275  ,Set/Clear Pending Bit 275" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND274  ,Set/Clear Pending Bit 274" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND273  ,Set/Clear Pending Bit 273" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272  ,Set/Clear Pending Bit 272" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND271  ,Set/Clear Pending Bit 271" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND270  ,Set/Clear Pending Bit 270" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269  ,Set/Clear Pending Bit 269" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND268  ,Set/Clear Pending Bit 268" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND267  ,Set/Clear Pending Bit 267" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266  ,Set/Clear Pending Bit 266" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND265  ,Set/Clear Pending Bit 265" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND264  ,Set/Clear Pending Bit 264" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263  ,Set/Clear Pending Bit 263" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND262  ,Set/Clear Pending Bit 262" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND261  ,Set/Clear Pending Bit 261" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260  ,Set/Clear Pending Bit 260" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND259  ,Set/Clear Pending Bit 259" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND258  ,Set/Clear Pending Bit 258" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257  ,Set/Clear Pending Bit 257" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND256  ,Set/Clear Pending Bit 256" "Not pending,Pending"
else
rgroup.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319  ,Set/Clear Pending Bit 319" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND318  ,Set/Clear Pending Bit 318" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND317  ,Set/Clear Pending Bit 317" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316  ,Set/Clear Pending Bit 316" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND315  ,Set/Clear Pending Bit 315" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND314  ,Set/Clear Pending Bit 314" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313  ,Set/Clear Pending Bit 313" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND312  ,Set/Clear Pending Bit 312" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND311  ,Set/Clear Pending Bit 311" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310  ,Set/Clear Pending Bit 310" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND309  ,Set/Clear Pending Bit 309" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND308  ,Set/Clear Pending Bit 308" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307  ,Set/Clear Pending Bit 307" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND306  ,Set/Clear Pending Bit 306" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND305  ,Set/Clear Pending Bit 305" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304  ,Set/Clear Pending Bit 304" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND303  ,Set/Clear Pending Bit 303" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND302  ,Set/Clear Pending Bit 302" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301  ,Set/Clear Pending Bit 301" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND300  ,Set/Clear Pending Bit 300" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND299  ,Set/Clear Pending Bit 299" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298  ,Set/Clear Pending Bit 298" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND297  ,Set/Clear Pending Bit 297" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND296  ,Set/Clear Pending Bit 296" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295  ,Set/Clear Pending Bit 295" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND294  ,Set/Clear Pending Bit 294" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND293  ,Set/Clear Pending Bit 293" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292  ,Set/Clear Pending Bit 292" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND291  ,Set/Clear Pending Bit 291" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND290  ,Set/Clear Pending Bit 290" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289  ,Set/Clear Pending Bit 289" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND288  ,Set/Clear Pending Bit 288" "Not pending,Pending"
else
rgroup.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351  ,Set/Clear Pending Bit 351" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND350  ,Set/Clear Pending Bit 350" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND349  ,Set/Clear Pending Bit 349" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348  ,Set/Clear Pending Bit 348" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND347  ,Set/Clear Pending Bit 347" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND346  ,Set/Clear Pending Bit 346" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345  ,Set/Clear Pending Bit 345" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND344  ,Set/Clear Pending Bit 344" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND343  ,Set/Clear Pending Bit 343" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342  ,Set/Clear Pending Bit 342" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND341  ,Set/Clear Pending Bit 341" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND340  ,Set/Clear Pending Bit 340" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339  ,Set/Clear Pending Bit 339" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND338  ,Set/Clear Pending Bit 338" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND337  ,Set/Clear Pending Bit 337" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336  ,Set/Clear Pending Bit 336" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND335  ,Set/Clear Pending Bit 335" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND334  ,Set/Clear Pending Bit 334" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333  ,Set/Clear Pending Bit 333" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND332  ,Set/Clear Pending Bit 332" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND331  ,Set/Clear Pending Bit 331" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330  ,Set/Clear Pending Bit 330" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND329  ,Set/Clear Pending Bit 329" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND328  ,Set/Clear Pending Bit 328" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327  ,Set/Clear Pending Bit 327" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND326  ,Set/Clear Pending Bit 326" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND325  ,Set/Clear Pending Bit 325" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324  ,Set/Clear Pending Bit 324" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND323  ,Set/Clear Pending Bit 323" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND322  ,Set/Clear Pending Bit 322" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321  ,Set/Clear Pending Bit 321" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND320  ,Set/Clear Pending Bit 320" "Not pending,Pending"
else
rgroup.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383  ,Set/Clear Pending Bit 383" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND382  ,Set/Clear Pending Bit 382" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND381  ,Set/Clear Pending Bit 381" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380  ,Set/Clear Pending Bit 380" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND379  ,Set/Clear Pending Bit 379" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND378  ,Set/Clear Pending Bit 378" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377  ,Set/Clear Pending Bit 377" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND376  ,Set/Clear Pending Bit 376" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND375  ,Set/Clear Pending Bit 375" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374  ,Set/Clear Pending Bit 374" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND373  ,Set/Clear Pending Bit 373" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND372  ,Set/Clear Pending Bit 372" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371  ,Set/Clear Pending Bit 371" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND370  ,Set/Clear Pending Bit 370" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND369  ,Set/Clear Pending Bit 369" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368  ,Set/Clear Pending Bit 368" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND367  ,Set/Clear Pending Bit 367" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND366  ,Set/Clear Pending Bit 366" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365  ,Set/Clear Pending Bit 365" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND364  ,Set/Clear Pending Bit 364" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND363  ,Set/Clear Pending Bit 363" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362  ,Set/Clear Pending Bit 362" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND361  ,Set/Clear Pending Bit 361" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND360  ,Set/Clear Pending Bit 360" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359  ,Set/Clear Pending Bit 359" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND358  ,Set/Clear Pending Bit 358" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND357  ,Set/Clear Pending Bit 357" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356  ,Set/Clear Pending Bit 356" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND355  ,Set/Clear Pending Bit 355" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND354  ,Set/Clear Pending Bit 354" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353  ,Set/Clear Pending Bit 353" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND352  ,Set/Clear Pending Bit 352" "Not pending,Pending"
else
rgroup.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415  ,Set/Clear Pending Bit 415" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND414  ,Set/Clear Pending Bit 414" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND413  ,Set/Clear Pending Bit 413" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412  ,Set/Clear Pending Bit 412" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND411  ,Set/Clear Pending Bit 411" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND410  ,Set/Clear Pending Bit 410" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409  ,Set/Clear Pending Bit 409" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND408  ,Set/Clear Pending Bit 408" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND407  ,Set/Clear Pending Bit 407" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406  ,Set/Clear Pending Bit 406" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND405  ,Set/Clear Pending Bit 405" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND404  ,Set/Clear Pending Bit 404" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403  ,Set/Clear Pending Bit 403" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND402  ,Set/Clear Pending Bit 402" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND401  ,Set/Clear Pending Bit 401" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400  ,Set/Clear Pending Bit 400" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND399  ,Set/Clear Pending Bit 399" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND398  ,Set/Clear Pending Bit 398" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397  ,Set/Clear Pending Bit 397" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND396  ,Set/Clear Pending Bit 396" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND395  ,Set/Clear Pending Bit 395" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394  ,Set/Clear Pending Bit 394" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND393  ,Set/Clear Pending Bit 393" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND392  ,Set/Clear Pending Bit 392" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391  ,Set/Clear Pending Bit 391" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND390  ,Set/Clear Pending Bit 390" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND389  ,Set/Clear Pending Bit 389" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388  ,Set/Clear Pending Bit 388" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND387  ,Set/Clear Pending Bit 387" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND386  ,Set/Clear Pending Bit 386" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385  ,Set/Clear Pending Bit 385" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND384  ,Set/Clear Pending Bit 384" "Not pending,Pending"
else
rgroup.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447  ,Set/Clear Pending Bit 447" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND446  ,Set/Clear Pending Bit 446" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND445  ,Set/Clear Pending Bit 445" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444  ,Set/Clear Pending Bit 444" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND443  ,Set/Clear Pending Bit 443" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND442  ,Set/Clear Pending Bit 442" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441  ,Set/Clear Pending Bit 441" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND440  ,Set/Clear Pending Bit 440" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND439  ,Set/Clear Pending Bit 439" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438  ,Set/Clear Pending Bit 438" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND437  ,Set/Clear Pending Bit 437" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND436  ,Set/Clear Pending Bit 436" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435  ,Set/Clear Pending Bit 435" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND434  ,Set/Clear Pending Bit 434" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND433  ,Set/Clear Pending Bit 433" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432  ,Set/Clear Pending Bit 432" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND431  ,Set/Clear Pending Bit 431" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND430  ,Set/Clear Pending Bit 430" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429  ,Set/Clear Pending Bit 429" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND428  ,Set/Clear Pending Bit 428" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND427  ,Set/Clear Pending Bit 427" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426  ,Set/Clear Pending Bit 426" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND425  ,Set/Clear Pending Bit 425" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND424  ,Set/Clear Pending Bit 424" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423  ,Set/Clear Pending Bit 423" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND422  ,Set/Clear Pending Bit 422" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND421  ,Set/Clear Pending Bit 421" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420  ,Set/Clear Pending Bit 420" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND419  ,Set/Clear Pending Bit 419" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND418  ,Set/Clear Pending Bit 418" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417  ,Set/Clear Pending Bit 417" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND416  ,Set/Clear Pending Bit 416" "Not pending,Pending"
else
rgroup.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479  ,Set/Clear Pending Bit 479" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND478  ,Set/Clear Pending Bit 478" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND477  ,Set/Clear Pending Bit 477" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476  ,Set/Clear Pending Bit 476" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND475  ,Set/Clear Pending Bit 475" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND474  ,Set/Clear Pending Bit 474" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473  ,Set/Clear Pending Bit 473" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND472  ,Set/Clear Pending Bit 472" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND471  ,Set/Clear Pending Bit 471" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470  ,Set/Clear Pending Bit 470" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND469  ,Set/Clear Pending Bit 469" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND468  ,Set/Clear Pending Bit 468" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467  ,Set/Clear Pending Bit 467" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND466  ,Set/Clear Pending Bit 466" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND465  ,Set/Clear Pending Bit 465" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464  ,Set/Clear Pending Bit 464" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND463  ,Set/Clear Pending Bit 463" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND462  ,Set/Clear Pending Bit 462" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461  ,Set/Clear Pending Bit 461" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND460  ,Set/Clear Pending Bit 460" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND459  ,Set/Clear Pending Bit 459" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458  ,Set/Clear Pending Bit 458" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND457  ,Set/Clear Pending Bit 457" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND456  ,Set/Clear Pending Bit 456" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455  ,Set/Clear Pending Bit 455" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND454  ,Set/Clear Pending Bit 454" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND453  ,Set/Clear Pending Bit 453" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452  ,Set/Clear Pending Bit 452" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND451  ,Set/Clear Pending Bit 451" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND450  ,Set/Clear Pending Bit 450" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449  ,Set/Clear Pending Bit 449" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND448  ,Set/Clear Pending Bit 448" "Not pending,Pending"
else
rgroup.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511  ,Set/Clear Pending Bit 511" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND510  ,Set/Clear Pending Bit 510" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND509  ,Set/Clear Pending Bit 509" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508  ,Set/Clear Pending Bit 508" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND507  ,Set/Clear Pending Bit 507" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND506  ,Set/Clear Pending Bit 506" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505  ,Set/Clear Pending Bit 505" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND504  ,Set/Clear Pending Bit 504" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND503  ,Set/Clear Pending Bit 503" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502  ,Set/Clear Pending Bit 502" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND501  ,Set/Clear Pending Bit 501" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND500  ,Set/Clear Pending Bit 500" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499  ,Set/Clear Pending Bit 499" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND498  ,Set/Clear Pending Bit 498" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND497  ,Set/Clear Pending Bit 497" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496  ,Set/Clear Pending Bit 496" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND495  ,Set/Clear Pending Bit 495" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND494  ,Set/Clear Pending Bit 494" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493  ,Set/Clear Pending Bit 493" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND492  ,Set/Clear Pending Bit 492" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND491  ,Set/Clear Pending Bit 491" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490  ,Set/Clear Pending Bit 490" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND489  ,Set/Clear Pending Bit 489" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND488  ,Set/Clear Pending Bit 488" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487  ,Set/Clear Pending Bit 487" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND486  ,Set/Clear Pending Bit 486" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND485  ,Set/Clear Pending Bit 485" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484  ,Set/Clear Pending Bit 484" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND483  ,Set/Clear Pending Bit 483" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND482  ,Set/Clear Pending Bit 482" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481  ,Set/Clear Pending Bit 481" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND480  ,Set/Clear Pending Bit 480" "Not pending,Pending"
else
rgroup.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543  ,Set/Clear Pending Bit 543" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND542  ,Set/Clear Pending Bit 542" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND541  ,Set/Clear Pending Bit 541" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540  ,Set/Clear Pending Bit 540" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND539  ,Set/Clear Pending Bit 539" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND538  ,Set/Clear Pending Bit 538" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537  ,Set/Clear Pending Bit 537" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND536  ,Set/Clear Pending Bit 536" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND535  ,Set/Clear Pending Bit 535" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534  ,Set/Clear Pending Bit 534" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND533  ,Set/Clear Pending Bit 533" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND532  ,Set/Clear Pending Bit 532" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531  ,Set/Clear Pending Bit 531" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND530  ,Set/Clear Pending Bit 530" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND529  ,Set/Clear Pending Bit 529" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528  ,Set/Clear Pending Bit 528" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND527  ,Set/Clear Pending Bit 527" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND526  ,Set/Clear Pending Bit 526" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525  ,Set/Clear Pending Bit 525" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND524  ,Set/Clear Pending Bit 524" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND523  ,Set/Clear Pending Bit 523" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522  ,Set/Clear Pending Bit 522" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND521  ,Set/Clear Pending Bit 521" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND520  ,Set/Clear Pending Bit 520" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519  ,Set/Clear Pending Bit 519" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND518  ,Set/Clear Pending Bit 518" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND517  ,Set/Clear Pending Bit 517" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516  ,Set/Clear Pending Bit 516" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND515  ,Set/Clear Pending Bit 515" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND514  ,Set/Clear Pending Bit 514" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513  ,Set/Clear Pending Bit 513" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND512  ,Set/Clear Pending Bit 512" "Not pending,Pending"
else
rgroup.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575  ,Set/Clear Pending Bit 575" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND574  ,Set/Clear Pending Bit 574" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND573  ,Set/Clear Pending Bit 573" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572  ,Set/Clear Pending Bit 572" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND571  ,Set/Clear Pending Bit 571" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND570  ,Set/Clear Pending Bit 570" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569  ,Set/Clear Pending Bit 569" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND568  ,Set/Clear Pending Bit 568" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND567  ,Set/Clear Pending Bit 567" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566  ,Set/Clear Pending Bit 566" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND565  ,Set/Clear Pending Bit 565" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND564  ,Set/Clear Pending Bit 564" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563  ,Set/Clear Pending Bit 563" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND562  ,Set/Clear Pending Bit 562" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND561  ,Set/Clear Pending Bit 561" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560  ,Set/Clear Pending Bit 560" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND559  ,Set/Clear Pending Bit 559" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND558  ,Set/Clear Pending Bit 558" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557  ,Set/Clear Pending Bit 557" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND556  ,Set/Clear Pending Bit 556" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND555  ,Set/Clear Pending Bit 555" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554  ,Set/Clear Pending Bit 554" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND553  ,Set/Clear Pending Bit 553" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND552  ,Set/Clear Pending Bit 552" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551  ,Set/Clear Pending Bit 551" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND550  ,Set/Clear Pending Bit 550" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND549  ,Set/Clear Pending Bit 549" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548  ,Set/Clear Pending Bit 548" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND547  ,Set/Clear Pending Bit 547" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND546  ,Set/Clear Pending Bit 546" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545  ,Set/Clear Pending Bit 545" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND544  ,Set/Clear Pending Bit 544" "Not pending,Pending"
else
rgroup.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607  ,Set/Clear Pending Bit 607" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND606  ,Set/Clear Pending Bit 606" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND605  ,Set/Clear Pending Bit 605" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604  ,Set/Clear Pending Bit 604" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND603  ,Set/Clear Pending Bit 603" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND602  ,Set/Clear Pending Bit 602" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601  ,Set/Clear Pending Bit 601" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND600  ,Set/Clear Pending Bit 600" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND599  ,Set/Clear Pending Bit 599" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598  ,Set/Clear Pending Bit 598" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND597  ,Set/Clear Pending Bit 597" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND596  ,Set/Clear Pending Bit 596" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595  ,Set/Clear Pending Bit 595" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND594  ,Set/Clear Pending Bit 594" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND593  ,Set/Clear Pending Bit 593" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592  ,Set/Clear Pending Bit 592" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND591  ,Set/Clear Pending Bit 591" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND590  ,Set/Clear Pending Bit 590" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589  ,Set/Clear Pending Bit 589" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND588  ,Set/Clear Pending Bit 588" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND587  ,Set/Clear Pending Bit 587" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586  ,Set/Clear Pending Bit 586" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND585  ,Set/Clear Pending Bit 585" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND584  ,Set/Clear Pending Bit 584" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583  ,Set/Clear Pending Bit 583" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND582  ,Set/Clear Pending Bit 582" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND581  ,Set/Clear Pending Bit 581" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580  ,Set/Clear Pending Bit 580" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND579  ,Set/Clear Pending Bit 579" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND578  ,Set/Clear Pending Bit 578" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577  ,Set/Clear Pending Bit 577" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND576  ,Set/Clear Pending Bit 576" "Not pending,Pending"
else
rgroup.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639  ,Set/Clear Pending Bit 639" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND638  ,Set/Clear Pending Bit 638" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND637  ,Set/Clear Pending Bit 637" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636  ,Set/Clear Pending Bit 636" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND635  ,Set/Clear Pending Bit 635" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND634  ,Set/Clear Pending Bit 634" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633  ,Set/Clear Pending Bit 633" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND632  ,Set/Clear Pending Bit 632" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND631  ,Set/Clear Pending Bit 631" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630  ,Set/Clear Pending Bit 630" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND629  ,Set/Clear Pending Bit 629" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND628  ,Set/Clear Pending Bit 628" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627  ,Set/Clear Pending Bit 627" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND626  ,Set/Clear Pending Bit 626" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND625  ,Set/Clear Pending Bit 625" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624  ,Set/Clear Pending Bit 624" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND623  ,Set/Clear Pending Bit 623" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND622  ,Set/Clear Pending Bit 622" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621  ,Set/Clear Pending Bit 621" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND620  ,Set/Clear Pending Bit 620" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND619  ,Set/Clear Pending Bit 619" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618  ,Set/Clear Pending Bit 618" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND617  ,Set/Clear Pending Bit 617" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND616  ,Set/Clear Pending Bit 616" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615  ,Set/Clear Pending Bit 615" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND614  ,Set/Clear Pending Bit 614" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND613  ,Set/Clear Pending Bit 613" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612  ,Set/Clear Pending Bit 612" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND611  ,Set/Clear Pending Bit 611" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND610  ,Set/Clear Pending Bit 610" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609  ,Set/Clear Pending Bit 609" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND608  ,Set/Clear Pending Bit 608" "Not pending,Pending"
else
rgroup.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671  ,Set/Clear Pending Bit 671" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND670  ,Set/Clear Pending Bit 670" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND669  ,Set/Clear Pending Bit 669" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668  ,Set/Clear Pending Bit 668" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND667  ,Set/Clear Pending Bit 667" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND666  ,Set/Clear Pending Bit 666" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665  ,Set/Clear Pending Bit 665" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND664  ,Set/Clear Pending Bit 664" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND663  ,Set/Clear Pending Bit 663" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662  ,Set/Clear Pending Bit 662" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND661  ,Set/Clear Pending Bit 661" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND660  ,Set/Clear Pending Bit 660" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659  ,Set/Clear Pending Bit 659" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND658  ,Set/Clear Pending Bit 658" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND657  ,Set/Clear Pending Bit 657" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656  ,Set/Clear Pending Bit 656" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND655  ,Set/Clear Pending Bit 655" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND654  ,Set/Clear Pending Bit 654" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653  ,Set/Clear Pending Bit 653" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND652  ,Set/Clear Pending Bit 652" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND651  ,Set/Clear Pending Bit 651" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650  ,Set/Clear Pending Bit 650" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND649  ,Set/Clear Pending Bit 649" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND648  ,Set/Clear Pending Bit 648" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647  ,Set/Clear Pending Bit 647" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND646  ,Set/Clear Pending Bit 646" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND645  ,Set/Clear Pending Bit 645" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644  ,Set/Clear Pending Bit 644" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND643  ,Set/Clear Pending Bit 643" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND642  ,Set/Clear Pending Bit 642" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641  ,Set/Clear Pending Bit 641" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND640  ,Set/Clear Pending Bit 640" "Not pending,Pending"
else
rgroup.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703  ,Set/Clear Pending Bit 703" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND702  ,Set/Clear Pending Bit 702" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND701  ,Set/Clear Pending Bit 701" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700  ,Set/Clear Pending Bit 700" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND699  ,Set/Clear Pending Bit 699" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND698  ,Set/Clear Pending Bit 698" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697  ,Set/Clear Pending Bit 697" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND696  ,Set/Clear Pending Bit 696" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND695  ,Set/Clear Pending Bit 695" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694  ,Set/Clear Pending Bit 694" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND693  ,Set/Clear Pending Bit 693" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND692  ,Set/Clear Pending Bit 692" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691  ,Set/Clear Pending Bit 691" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND690  ,Set/Clear Pending Bit 690" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND689  ,Set/Clear Pending Bit 689" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688  ,Set/Clear Pending Bit 688" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND687  ,Set/Clear Pending Bit 687" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND686  ,Set/Clear Pending Bit 686" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685  ,Set/Clear Pending Bit 685" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND684  ,Set/Clear Pending Bit 684" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND683  ,Set/Clear Pending Bit 683" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682  ,Set/Clear Pending Bit 682" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND681  ,Set/Clear Pending Bit 681" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND680  ,Set/Clear Pending Bit 680" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679  ,Set/Clear Pending Bit 679" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND678  ,Set/Clear Pending Bit 678" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND677  ,Set/Clear Pending Bit 677" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676  ,Set/Clear Pending Bit 676" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND675  ,Set/Clear Pending Bit 675" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND674  ,Set/Clear Pending Bit 674" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673  ,Set/Clear Pending Bit 673" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND672  ,Set/Clear Pending Bit 672" "Not pending,Pending"
else
rgroup.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735  ,Set/Clear Pending Bit 735" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND734  ,Set/Clear Pending Bit 734" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND733  ,Set/Clear Pending Bit 733" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732  ,Set/Clear Pending Bit 732" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND731  ,Set/Clear Pending Bit 731" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND730  ,Set/Clear Pending Bit 730" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729  ,Set/Clear Pending Bit 729" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND728  ,Set/Clear Pending Bit 728" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND727  ,Set/Clear Pending Bit 727" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726  ,Set/Clear Pending Bit 726" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND725  ,Set/Clear Pending Bit 725" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND724  ,Set/Clear Pending Bit 724" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723  ,Set/Clear Pending Bit 723" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND722  ,Set/Clear Pending Bit 722" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND721  ,Set/Clear Pending Bit 721" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720  ,Set/Clear Pending Bit 720" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND719  ,Set/Clear Pending Bit 719" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND718  ,Set/Clear Pending Bit 718" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717  ,Set/Clear Pending Bit 717" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND716  ,Set/Clear Pending Bit 716" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND715  ,Set/Clear Pending Bit 715" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714  ,Set/Clear Pending Bit 714" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND713  ,Set/Clear Pending Bit 713" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND712  ,Set/Clear Pending Bit 712" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711  ,Set/Clear Pending Bit 711" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND710  ,Set/Clear Pending Bit 710" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND709  ,Set/Clear Pending Bit 709" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708  ,Set/Clear Pending Bit 708" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND707  ,Set/Clear Pending Bit 707" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND706  ,Set/Clear Pending Bit 706" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705  ,Set/Clear Pending Bit 705" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND704  ,Set/Clear Pending Bit 704" "Not pending,Pending"
else
rgroup.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767  ,Set/Clear Pending Bit 767" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND766  ,Set/Clear Pending Bit 766" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND765  ,Set/Clear Pending Bit 765" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764  ,Set/Clear Pending Bit 764" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND763  ,Set/Clear Pending Bit 763" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND762  ,Set/Clear Pending Bit 762" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761  ,Set/Clear Pending Bit 761" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND760  ,Set/Clear Pending Bit 760" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND759  ,Set/Clear Pending Bit 759" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758  ,Set/Clear Pending Bit 758" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND757  ,Set/Clear Pending Bit 757" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND756  ,Set/Clear Pending Bit 756" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755  ,Set/Clear Pending Bit 755" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND754  ,Set/Clear Pending Bit 754" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND753  ,Set/Clear Pending Bit 753" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752  ,Set/Clear Pending Bit 752" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND751  ,Set/Clear Pending Bit 751" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND750  ,Set/Clear Pending Bit 750" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749  ,Set/Clear Pending Bit 749" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND748  ,Set/Clear Pending Bit 748" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND747  ,Set/Clear Pending Bit 747" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746  ,Set/Clear Pending Bit 746" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND745  ,Set/Clear Pending Bit 745" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND744  ,Set/Clear Pending Bit 744" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743  ,Set/Clear Pending Bit 743" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND742  ,Set/Clear Pending Bit 742" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND741  ,Set/Clear Pending Bit 741" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740  ,Set/Clear Pending Bit 740" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND739  ,Set/Clear Pending Bit 739" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND738  ,Set/Clear Pending Bit 738" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737  ,Set/Clear Pending Bit 737" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND736  ,Set/Clear Pending Bit 736" "Not pending,Pending"
else
rgroup.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799  ,Set/Clear Pending Bit 799" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND798  ,Set/Clear Pending Bit 798" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND797  ,Set/Clear Pending Bit 797" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796  ,Set/Clear Pending Bit 796" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND795  ,Set/Clear Pending Bit 795" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND794  ,Set/Clear Pending Bit 794" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793  ,Set/Clear Pending Bit 793" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND792  ,Set/Clear Pending Bit 792" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND791  ,Set/Clear Pending Bit 791" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790  ,Set/Clear Pending Bit 790" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND789  ,Set/Clear Pending Bit 789" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND788  ,Set/Clear Pending Bit 788" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787  ,Set/Clear Pending Bit 787" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND786  ,Set/Clear Pending Bit 786" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND785  ,Set/Clear Pending Bit 785" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784  ,Set/Clear Pending Bit 784" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND783  ,Set/Clear Pending Bit 783" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND782  ,Set/Clear Pending Bit 782" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781  ,Set/Clear Pending Bit 781" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND780  ,Set/Clear Pending Bit 780" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND779  ,Set/Clear Pending Bit 779" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778  ,Set/Clear Pending Bit 778" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND777  ,Set/Clear Pending Bit 777" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND776  ,Set/Clear Pending Bit 776" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775  ,Set/Clear Pending Bit 775" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND774  ,Set/Clear Pending Bit 774" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND773  ,Set/Clear Pending Bit 773" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772  ,Set/Clear Pending Bit 772" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND771  ,Set/Clear Pending Bit 771" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND770  ,Set/Clear Pending Bit 770" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769  ,Set/Clear Pending Bit 769" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND768  ,Set/Clear Pending Bit 768" "Not pending,Pending"
else
rgroup.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831  ,Set/Clear Pending Bit 831" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND830  ,Set/Clear Pending Bit 830" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND829  ,Set/Clear Pending Bit 829" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828  ,Set/Clear Pending Bit 828" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND827  ,Set/Clear Pending Bit 827" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND826  ,Set/Clear Pending Bit 826" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825  ,Set/Clear Pending Bit 825" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND824  ,Set/Clear Pending Bit 824" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND823  ,Set/Clear Pending Bit 823" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822  ,Set/Clear Pending Bit 822" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND821  ,Set/Clear Pending Bit 821" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND820  ,Set/Clear Pending Bit 820" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819  ,Set/Clear Pending Bit 819" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND818  ,Set/Clear Pending Bit 818" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND817  ,Set/Clear Pending Bit 817" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816  ,Set/Clear Pending Bit 816" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND815  ,Set/Clear Pending Bit 815" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND814  ,Set/Clear Pending Bit 814" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813  ,Set/Clear Pending Bit 813" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND812  ,Set/Clear Pending Bit 812" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND811  ,Set/Clear Pending Bit 811" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810  ,Set/Clear Pending Bit 810" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND809  ,Set/Clear Pending Bit 809" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND808  ,Set/Clear Pending Bit 808" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807  ,Set/Clear Pending Bit 807" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND806  ,Set/Clear Pending Bit 806" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND805  ,Set/Clear Pending Bit 805" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804  ,Set/Clear Pending Bit 804" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND803  ,Set/Clear Pending Bit 803" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND802  ,Set/Clear Pending Bit 802" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801  ,Set/Clear Pending Bit 801" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND800  ,Set/Clear Pending Bit 800" "Not pending,Pending"
else
rgroup.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863  ,Set/Clear Pending Bit 863" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND862  ,Set/Clear Pending Bit 862" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND861  ,Set/Clear Pending Bit 861" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860  ,Set/Clear Pending Bit 860" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND859  ,Set/Clear Pending Bit 859" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND858  ,Set/Clear Pending Bit 858" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857  ,Set/Clear Pending Bit 857" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND856  ,Set/Clear Pending Bit 856" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND855  ,Set/Clear Pending Bit 855" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854  ,Set/Clear Pending Bit 854" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND853  ,Set/Clear Pending Bit 853" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND852  ,Set/Clear Pending Bit 852" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851  ,Set/Clear Pending Bit 851" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND850  ,Set/Clear Pending Bit 850" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND849  ,Set/Clear Pending Bit 849" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848  ,Set/Clear Pending Bit 848" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND847  ,Set/Clear Pending Bit 847" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND846  ,Set/Clear Pending Bit 846" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845  ,Set/Clear Pending Bit 845" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND844  ,Set/Clear Pending Bit 844" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND843  ,Set/Clear Pending Bit 843" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842  ,Set/Clear Pending Bit 842" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND841  ,Set/Clear Pending Bit 841" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND840  ,Set/Clear Pending Bit 840" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839  ,Set/Clear Pending Bit 839" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND838  ,Set/Clear Pending Bit 838" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND837  ,Set/Clear Pending Bit 837" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836  ,Set/Clear Pending Bit 836" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND835  ,Set/Clear Pending Bit 835" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND834  ,Set/Clear Pending Bit 834" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833  ,Set/Clear Pending Bit 833" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND832  ,Set/Clear Pending Bit 832" "Not pending,Pending"
else
rgroup.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895  ,Set/Clear Pending Bit 895" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND894  ,Set/Clear Pending Bit 894" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND893  ,Set/Clear Pending Bit 893" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892  ,Set/Clear Pending Bit 892" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND891  ,Set/Clear Pending Bit 891" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND890  ,Set/Clear Pending Bit 890" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889  ,Set/Clear Pending Bit 889" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND888  ,Set/Clear Pending Bit 888" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND887  ,Set/Clear Pending Bit 887" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886  ,Set/Clear Pending Bit 886" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND885  ,Set/Clear Pending Bit 885" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND884  ,Set/Clear Pending Bit 884" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883  ,Set/Clear Pending Bit 883" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND882  ,Set/Clear Pending Bit 882" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND881  ,Set/Clear Pending Bit 881" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880  ,Set/Clear Pending Bit 880" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND879  ,Set/Clear Pending Bit 879" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND878  ,Set/Clear Pending Bit 878" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877  ,Set/Clear Pending Bit 877" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND876  ,Set/Clear Pending Bit 876" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND875  ,Set/Clear Pending Bit 875" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874  ,Set/Clear Pending Bit 874" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND873  ,Set/Clear Pending Bit 873" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND872  ,Set/Clear Pending Bit 872" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871  ,Set/Clear Pending Bit 871" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND870  ,Set/Clear Pending Bit 870" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND869  ,Set/Clear Pending Bit 869" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868  ,Set/Clear Pending Bit 868" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND867  ,Set/Clear Pending Bit 867" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND866  ,Set/Clear Pending Bit 866" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865  ,Set/Clear Pending Bit 865" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND864  ,Set/Clear Pending Bit 864" "Not pending,Pending"
else
rgroup.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927  ,Set/Clear Pending Bit 927" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND926  ,Set/Clear Pending Bit 926" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND925  ,Set/Clear Pending Bit 925" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924  ,Set/Clear Pending Bit 924" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND923  ,Set/Clear Pending Bit 923" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND922  ,Set/Clear Pending Bit 922" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921  ,Set/Clear Pending Bit 921" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND920  ,Set/Clear Pending Bit 920" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND919  ,Set/Clear Pending Bit 919" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918  ,Set/Clear Pending Bit 918" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND917  ,Set/Clear Pending Bit 917" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND916  ,Set/Clear Pending Bit 916" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915  ,Set/Clear Pending Bit 915" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND914  ,Set/Clear Pending Bit 914" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND913  ,Set/Clear Pending Bit 913" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912  ,Set/Clear Pending Bit 912" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND911  ,Set/Clear Pending Bit 911" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND910  ,Set/Clear Pending Bit 910" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909  ,Set/Clear Pending Bit 909" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND908  ,Set/Clear Pending Bit 908" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND907  ,Set/Clear Pending Bit 907" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906  ,Set/Clear Pending Bit 906" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND905  ,Set/Clear Pending Bit 905" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND904  ,Set/Clear Pending Bit 904" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903  ,Set/Clear Pending Bit 903" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND902  ,Set/Clear Pending Bit 902" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND901  ,Set/Clear Pending Bit 901" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900  ,Set/Clear Pending Bit 900" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND899  ,Set/Clear Pending Bit 899" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND898  ,Set/Clear Pending Bit 898" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897  ,Set/Clear Pending Bit 897" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND896  ,Set/Clear Pending Bit 896" "Not pending,Pending"
else
rgroup.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959  ,Set/Clear Pending Bit 959" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND958  ,Set/Clear Pending Bit 958" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND957  ,Set/Clear Pending Bit 957" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956  ,Set/Clear Pending Bit 956" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND955  ,Set/Clear Pending Bit 955" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND954  ,Set/Clear Pending Bit 954" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953  ,Set/Clear Pending Bit 953" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND952  ,Set/Clear Pending Bit 952" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND951  ,Set/Clear Pending Bit 951" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950  ,Set/Clear Pending Bit 950" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND949  ,Set/Clear Pending Bit 949" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND948  ,Set/Clear Pending Bit 948" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947  ,Set/Clear Pending Bit 947" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND946  ,Set/Clear Pending Bit 946" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND945  ,Set/Clear Pending Bit 945" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944  ,Set/Clear Pending Bit 944" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND943  ,Set/Clear Pending Bit 943" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND942  ,Set/Clear Pending Bit 942" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941  ,Set/Clear Pending Bit 941" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND940  ,Set/Clear Pending Bit 940" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND939  ,Set/Clear Pending Bit 939" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938  ,Set/Clear Pending Bit 938" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND937  ,Set/Clear Pending Bit 937" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND936  ,Set/Clear Pending Bit 936" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935  ,Set/Clear Pending Bit 935" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND934  ,Set/Clear Pending Bit 934" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND933  ,Set/Clear Pending Bit 933" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932  ,Set/Clear Pending Bit 932" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND931  ,Set/Clear Pending Bit 931" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND930  ,Set/Clear Pending Bit 930" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929  ,Set/Clear Pending Bit 929" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND928  ,Set/Clear Pending Bit 928" "Not pending,Pending"
else
rgroup.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991  ,Set/Clear Pending Bit 991" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND990  ,Set/Clear Pending Bit 990" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND989  ,Set/Clear Pending Bit 989" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988  ,Set/Clear Pending Bit 988" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND987  ,Set/Clear Pending Bit 987" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND986  ,Set/Clear Pending Bit 986" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985  ,Set/Clear Pending Bit 985" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND984  ,Set/Clear Pending Bit 984" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND983  ,Set/Clear Pending Bit 983" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982  ,Set/Clear Pending Bit 982" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND981  ,Set/Clear Pending Bit 981" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND980  ,Set/Clear Pending Bit 980" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979  ,Set/Clear Pending Bit 979" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND978  ,Set/Clear Pending Bit 978" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND977  ,Set/Clear Pending Bit 977" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976  ,Set/Clear Pending Bit 976" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND975  ,Set/Clear Pending Bit 975" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND974  ,Set/Clear Pending Bit 974" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973  ,Set/Clear Pending Bit 973" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND972  ,Set/Clear Pending Bit 972" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND971  ,Set/Clear Pending Bit 971" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970  ,Set/Clear Pending Bit 970" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND969  ,Set/Clear Pending Bit 969" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND968  ,Set/Clear Pending Bit 968" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967  ,Set/Clear Pending Bit 967" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND966  ,Set/Clear Pending Bit 966" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND965  ,Set/Clear Pending Bit 965" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964  ,Set/Clear Pending Bit 964" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND963  ,Set/Clear Pending Bit 963" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND962  ,Set/Clear Pending Bit 962" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961  ,Set/Clear Pending Bit 961" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND960  ,Set/Clear Pending Bit 960" "Not pending,Pending"
else
rgroup.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)==0x1F)
group.long 0x027C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999  ,Set/Clear Pending Bit 999" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND998  ,Set/Clear Pending Bit 998" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND997  ,Set/Clear Pending Bit 997" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996  ,Set/Clear Pending Bit 996" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND995  ,Set/Clear Pending Bit 995" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND994  ,Set/Clear Pending Bit 994" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993  ,Set/Clear Pending Bit 993" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND992  ,Set/Clear Pending Bit 992" "Not pending,Pending"
else
rgroup.long 0x027C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
width 24.
tree "Set/Clear Active Registers"
if (((per.l(AD:0x03881000+0x08))&0xFF000000)==(0x0000000||0x1000000))
rgroup.long 0x0300++0x03
line.long 0x0 "GICD_ICDABR0,Active Status Register 0"
bitfld.long 0x00 31. " ASB31   ,Active Status Bit 31" "Not active,Active"
bitfld.long 0x00 30. "  ASB30   ,Active Status Bit 30" "Not active,Active"
bitfld.long 0x00 29. "  ASB29   ,Active Status Bit 29" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB28   ,Active Status Bit 28" "Not active,Active"
bitfld.long 0x00 27. "  ASB27   ,Active Status Bit 27" "Not active,Active"
bitfld.long 0x00 26. "  ASB26   ,Active Status Bit 26" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB25   ,Active Status Bit 25" "Not active,Active"
bitfld.long 0x00 24. "  ASB24   ,Active Status Bit 24" "Not active,Active"
bitfld.long 0x00 23. "  ASB23   ,Active Status Bit 23" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB22   ,Active Status Bit 22" "Not active,Active"
bitfld.long 0x00 21. "  ASB21   ,Active Status Bit 21" "Not active,Active"
bitfld.long 0x00 20. "  ASB20   ,Active Status Bit 20" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB19   ,Active Status Bit 19" "Not active,Active"
bitfld.long 0x00 18. "  ASB18   ,Active Status Bit 18" "Not active,Active"
bitfld.long 0x00 17. "  ASB17   ,Active Status Bit 17" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB16   ,Active Status Bit 16" "Not active,Active"
bitfld.long 0x00 15. "  ASB15   ,Active Status Bit 15" "Not active,Active"
bitfld.long 0x00 14. "  ASB14   ,Active Status Bit 14" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB13   ,Active Status Bit 13" "Not active,Active"
bitfld.long 0x00 12. "  ASB12   ,Active Status Bit 12" "Not active,Active"
bitfld.long 0x00 11. "  ASB11   ,Active Status Bit 11" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB10   ,Active Status Bit 10" "Not active,Active"
bitfld.long 0x00 9. "  ASB9    ,Active Status Bit 9" "Not active,Active"
bitfld.long 0x00 8. "  ASB8    ,Active Status Bit 8" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB7    ,Active Status Bit 7" "Not active,Active"
bitfld.long 0x00 6. "  ASB6    ,Active Status Bit 6" "Not active,Active"
bitfld.long 0x00 5. "  ASB5    ,Active Status Bit 5" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB4    ,Active Status Bit 4" "Not active,Active"
bitfld.long 0x00 3. "  ASB3    ,Active Status Bit 3" "Not active,Active"
bitfld.long 0x00 2. "  ASB2    ,Active Status Bit 2" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB1    ,Active Status Bit 1" "Not active,Active"
bitfld.long 0x00 0. "  ASB0    ,Active Status Bit 0" "Not active,Active"
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
rgroup.long 0x0304++0x03
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
bitfld.long 0x00 31. " ASB63   ,Active Status Bit 63" "Not active,Active"
bitfld.long 0x00 30. "  ASB62   ,Active Status Bit 62" "Not active,Active"
bitfld.long 0x00 29. "  ASB61   ,Active Status Bit 61" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB60   ,Active Status Bit 60" "Not active,Active"
bitfld.long 0x00 27. "  ASB59   ,Active Status Bit 59" "Not active,Active"
bitfld.long 0x00 26. "  ASB58   ,Active Status Bit 58" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB57   ,Active Status Bit 57" "Not active,Active"
bitfld.long 0x00 24. "  ASB56   ,Active Status Bit 56" "Not active,Active"
bitfld.long 0x00 23. "  ASB55   ,Active Status Bit 55" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB54   ,Active Status Bit 54" "Not active,Active"
bitfld.long 0x00 21. "  ASB53   ,Active Status Bit 53" "Not active,Active"
bitfld.long 0x00 20. "  ASB52   ,Active Status Bit 52" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB51   ,Active Status Bit 51" "Not active,Active"
bitfld.long 0x00 18. "  ASB50   ,Active Status Bit 50" "Not active,Active"
bitfld.long 0x00 17. "  ASB49   ,Active Status Bit 49" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB48   ,Active Status Bit 48" "Not active,Active"
bitfld.long 0x00 15. "  ASB47   ,Active Status Bit 47" "Not active,Active"
bitfld.long 0x00 14. "  ASB46   ,Active Status Bit 46" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB45   ,Active Status Bit 45" "Not active,Active"
bitfld.long 0x00 12. "  ASB44   ,Active Status Bit 44" "Not active,Active"
bitfld.long 0x00 11. "  ASB43   ,Active Status Bit 43" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB42   ,Active Status Bit 42" "Not active,Active"
bitfld.long 0x00 9. "  ASB41   ,Active Status Bit 41" "Not active,Active"
bitfld.long 0x00 8. "  ASB40   ,Active Status Bit 40" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB39   ,Active Status Bit 39" "Not active,Active"
bitfld.long 0x00 6. "  ASB38   ,Active Status Bit 38" "Not active,Active"
bitfld.long 0x00 5. "  ASB37   ,Active Status Bit 37" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB36   ,Active Status Bit 36" "Not active,Active"
bitfld.long 0x00 3. "  ASB35   ,Active Status Bit 35" "Not active,Active"
bitfld.long 0x00 2. "  ASB34   ,Active Status Bit 34" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB33   ,Active Status Bit 33" "Not active,Active"
bitfld.long 0x00 0. "  ASB32   ,Active Status Bit 32" "Not active,Active"
else
rgroup.long 0x0304++0x03
line.long 0x0 "GICD_ICDABR1,Active Status Register 1"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
rgroup.long 0x0308++0x03
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
bitfld.long 0x00 31. " ASB95   ,Active Status Bit 95" "Not active,Active"
bitfld.long 0x00 30. "  ASB94   ,Active Status Bit 94" "Not active,Active"
bitfld.long 0x00 29. "  ASB93   ,Active Status Bit 93" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB92   ,Active Status Bit 92" "Not active,Active"
bitfld.long 0x00 27. "  ASB91   ,Active Status Bit 91" "Not active,Active"
bitfld.long 0x00 26. "  ASB90   ,Active Status Bit 90" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB89   ,Active Status Bit 89" "Not active,Active"
bitfld.long 0x00 24. "  ASB88   ,Active Status Bit 88" "Not active,Active"
bitfld.long 0x00 23. "  ASB87   ,Active Status Bit 87" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB86   ,Active Status Bit 86" "Not active,Active"
bitfld.long 0x00 21. "  ASB85   ,Active Status Bit 85" "Not active,Active"
bitfld.long 0x00 20. "  ASB84   ,Active Status Bit 84" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB83   ,Active Status Bit 83" "Not active,Active"
bitfld.long 0x00 18. "  ASB82   ,Active Status Bit 82" "Not active,Active"
bitfld.long 0x00 17. "  ASB81   ,Active Status Bit 81" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB80   ,Active Status Bit 80" "Not active,Active"
bitfld.long 0x00 15. "  ASB79   ,Active Status Bit 79" "Not active,Active"
bitfld.long 0x00 14. "  ASB78   ,Active Status Bit 78" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB77   ,Active Status Bit 77" "Not active,Active"
bitfld.long 0x00 12. "  ASB76   ,Active Status Bit 76" "Not active,Active"
bitfld.long 0x00 11. "  ASB75   ,Active Status Bit 75" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB74   ,Active Status Bit 74" "Not active,Active"
bitfld.long 0x00 9. "  ASB73   ,Active Status Bit 73" "Not active,Active"
bitfld.long 0x00 8. "  ASB72   ,Active Status Bit 72" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB71   ,Active Status Bit 71" "Not active,Active"
bitfld.long 0x00 6. "  ASB70   ,Active Status Bit 70" "Not active,Active"
bitfld.long 0x00 5. "  ASB69   ,Active Status Bit 69" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB68   ,Active Status Bit 68" "Not active,Active"
bitfld.long 0x00 3. "  ASB67   ,Active Status Bit 67" "Not active,Active"
bitfld.long 0x00 2. "  ASB66   ,Active Status Bit 66" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB65   ,Active Status Bit 65" "Not active,Active"
bitfld.long 0x00 0. "  ASB64   ,Active Status Bit 64" "Not active,Active"
else
rgroup.long 0x0308++0x03
line.long 0x0 "GICD_ICDABR2,Active Status Register 2"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
rgroup.long 0x030C++0x03
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
bitfld.long 0x00 31. " ASB127  ,Active Status Bit 127" "Not active,Active"
bitfld.long 0x00 30. "  ASB126  ,Active Status Bit 126" "Not active,Active"
bitfld.long 0x00 29. "  ASB125  ,Active Status Bit 125" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB124  ,Active Status Bit 124" "Not active,Active"
bitfld.long 0x00 27. "  ASB123  ,Active Status Bit 123" "Not active,Active"
bitfld.long 0x00 26. "  ASB122  ,Active Status Bit 122" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB121  ,Active Status Bit 121" "Not active,Active"
bitfld.long 0x00 24. "  ASB120  ,Active Status Bit 120" "Not active,Active"
bitfld.long 0x00 23. "  ASB119  ,Active Status Bit 119" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB118  ,Active Status Bit 118" "Not active,Active"
bitfld.long 0x00 21. "  ASB117  ,Active Status Bit 117" "Not active,Active"
bitfld.long 0x00 20. "  ASB116  ,Active Status Bit 116" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB115  ,Active Status Bit 115" "Not active,Active"
bitfld.long 0x00 18. "  ASB114  ,Active Status Bit 114" "Not active,Active"
bitfld.long 0x00 17. "  ASB113  ,Active Status Bit 113" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB112  ,Active Status Bit 112" "Not active,Active"
bitfld.long 0x00 15. "  ASB111  ,Active Status Bit 111" "Not active,Active"
bitfld.long 0x00 14. "  ASB110  ,Active Status Bit 110" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB109  ,Active Status Bit 109" "Not active,Active"
bitfld.long 0x00 12. "  ASB108  ,Active Status Bit 108" "Not active,Active"
bitfld.long 0x00 11. "  ASB107  ,Active Status Bit 107" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB106  ,Active Status Bit 106" "Not active,Active"
bitfld.long 0x00 9. "  ASB105  ,Active Status Bit 105" "Not active,Active"
bitfld.long 0x00 8. "  ASB104  ,Active Status Bit 104" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB103  ,Active Status Bit 103" "Not active,Active"
bitfld.long 0x00 6. "  ASB102  ,Active Status Bit 102" "Not active,Active"
bitfld.long 0x00 5. "  ASB101  ,Active Status Bit 101" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB100  ,Active Status Bit 100" "Not active,Active"
bitfld.long 0x00 3. "  ASB99   ,Active Status Bit 99" "Not active,Active"
bitfld.long 0x00 2. "  ASB98   ,Active Status Bit 98" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB97   ,Active Status Bit 97" "Not active,Active"
bitfld.long 0x00 0. "  ASB96   ,Active Status Bit 96" "Not active,Active"
else
rgroup.long 0x030C++0x03
line.long 0x0 "GICD_ICDABR3,Active Status Register 3"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
rgroup.long 0x0310++0x03
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
bitfld.long 0x00 31. " ASB159  ,Active Status Bit 159" "Not active,Active"
bitfld.long 0x00 30. "  ASB158  ,Active Status Bit 158" "Not active,Active"
bitfld.long 0x00 29. "  ASB157  ,Active Status Bit 157" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB156  ,Active Status Bit 156" "Not active,Active"
bitfld.long 0x00 27. "  ASB155  ,Active Status Bit 155" "Not active,Active"
bitfld.long 0x00 26. "  ASB154  ,Active Status Bit 154" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB153  ,Active Status Bit 153" "Not active,Active"
bitfld.long 0x00 24. "  ASB152  ,Active Status Bit 152" "Not active,Active"
bitfld.long 0x00 23. "  ASB151  ,Active Status Bit 151" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB150  ,Active Status Bit 150" "Not active,Active"
bitfld.long 0x00 21. "  ASB149  ,Active Status Bit 149" "Not active,Active"
bitfld.long 0x00 20. "  ASB148  ,Active Status Bit 148" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB147  ,Active Status Bit 147" "Not active,Active"
bitfld.long 0x00 18. "  ASB146  ,Active Status Bit 146" "Not active,Active"
bitfld.long 0x00 17. "  ASB145  ,Active Status Bit 145" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB144  ,Active Status Bit 144" "Not active,Active"
bitfld.long 0x00 15. "  ASB143  ,Active Status Bit 143" "Not active,Active"
bitfld.long 0x00 14. "  ASB142  ,Active Status Bit 142" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB141  ,Active Status Bit 141" "Not active,Active"
bitfld.long 0x00 12. "  ASB140  ,Active Status Bit 140" "Not active,Active"
bitfld.long 0x00 11. "  ASB139  ,Active Status Bit 139" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB138  ,Active Status Bit 138" "Not active,Active"
bitfld.long 0x00 9. "  ASB137  ,Active Status Bit 137" "Not active,Active"
bitfld.long 0x00 8. "  ASB136  ,Active Status Bit 136" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB135  ,Active Status Bit 135" "Not active,Active"
bitfld.long 0x00 6. "  ASB134  ,Active Status Bit 134" "Not active,Active"
bitfld.long 0x00 5. "  ASB133  ,Active Status Bit 133" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB132  ,Active Status Bit 132" "Not active,Active"
bitfld.long 0x00 3. "  ASB131  ,Active Status Bit 131" "Not active,Active"
bitfld.long 0x00 2. "  ASB130  ,Active Status Bit 130" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB129  ,Active Status Bit 129" "Not active,Active"
bitfld.long 0x00 0. "  ASB128  ,Active Status Bit 128" "Not active,Active"
else
rgroup.long 0x0310++0x03
line.long 0x0 "GICD_ICDABR4,Active Status Register 4"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
rgroup.long 0x0314++0x03
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
bitfld.long 0x00 31. " ASB191  ,Active Status Bit 191" "Not active,Active"
bitfld.long 0x00 30. "  ASB190  ,Active Status Bit 190" "Not active,Active"
bitfld.long 0x00 29. "  ASB189  ,Active Status Bit 189" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB188  ,Active Status Bit 188" "Not active,Active"
bitfld.long 0x00 27. "  ASB187  ,Active Status Bit 187" "Not active,Active"
bitfld.long 0x00 26. "  ASB186  ,Active Status Bit 186" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB185  ,Active Status Bit 185" "Not active,Active"
bitfld.long 0x00 24. "  ASB184  ,Active Status Bit 184" "Not active,Active"
bitfld.long 0x00 23. "  ASB183  ,Active Status Bit 183" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB182  ,Active Status Bit 182" "Not active,Active"
bitfld.long 0x00 21. "  ASB181  ,Active Status Bit 181" "Not active,Active"
bitfld.long 0x00 20. "  ASB180  ,Active Status Bit 180" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB179  ,Active Status Bit 179" "Not active,Active"
bitfld.long 0x00 18. "  ASB178  ,Active Status Bit 178" "Not active,Active"
bitfld.long 0x00 17. "  ASB177  ,Active Status Bit 177" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB176  ,Active Status Bit 176" "Not active,Active"
bitfld.long 0x00 15. "  ASB175  ,Active Status Bit 175" "Not active,Active"
bitfld.long 0x00 14. "  ASB174  ,Active Status Bit 174" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB173  ,Active Status Bit 173" "Not active,Active"
bitfld.long 0x00 12. "  ASB172  ,Active Status Bit 172" "Not active,Active"
bitfld.long 0x00 11. "  ASB171  ,Active Status Bit 171" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB170  ,Active Status Bit 170" "Not active,Active"
bitfld.long 0x00 9. "  ASB169  ,Active Status Bit 169" "Not active,Active"
bitfld.long 0x00 8. "  ASB168  ,Active Status Bit 168" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB167  ,Active Status Bit 167" "Not active,Active"
bitfld.long 0x00 6. "  ASB166  ,Active Status Bit 166" "Not active,Active"
bitfld.long 0x00 5. "  ASB165  ,Active Status Bit 165" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB164  ,Active Status Bit 164" "Not active,Active"
bitfld.long 0x00 3. "  ASB163  ,Active Status Bit 163" "Not active,Active"
bitfld.long 0x00 2. "  ASB162  ,Active Status Bit 162" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB161  ,Active Status Bit 161" "Not active,Active"
bitfld.long 0x00 0. "  ASB160  ,Active Status Bit 160" "Not active,Active"
else
rgroup.long 0x0314++0x03
line.long 0x0 "GICD_ICDABR5,Active Status Register 5"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
rgroup.long 0x0318++0x03
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
bitfld.long 0x00 31. " ASB223  ,Active Status Bit 223" "Not active,Active"
bitfld.long 0x00 30. "  ASB222  ,Active Status Bit 222" "Not active,Active"
bitfld.long 0x00 29. "  ASB221  ,Active Status Bit 221" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB220  ,Active Status Bit 220" "Not active,Active"
bitfld.long 0x00 27. "  ASB219  ,Active Status Bit 219" "Not active,Active"
bitfld.long 0x00 26. "  ASB218  ,Active Status Bit 218" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB217  ,Active Status Bit 217" "Not active,Active"
bitfld.long 0x00 24. "  ASB216  ,Active Status Bit 216" "Not active,Active"
bitfld.long 0x00 23. "  ASB215  ,Active Status Bit 215" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB214  ,Active Status Bit 214" "Not active,Active"
bitfld.long 0x00 21. "  ASB213  ,Active Status Bit 213" "Not active,Active"
bitfld.long 0x00 20. "  ASB212  ,Active Status Bit 212" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB211  ,Active Status Bit 211" "Not active,Active"
bitfld.long 0x00 18. "  ASB210  ,Active Status Bit 210" "Not active,Active"
bitfld.long 0x00 17. "  ASB209  ,Active Status Bit 209" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB208  ,Active Status Bit 208" "Not active,Active"
bitfld.long 0x00 15. "  ASB207  ,Active Status Bit 207" "Not active,Active"
bitfld.long 0x00 14. "  ASB206  ,Active Status Bit 206" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB205  ,Active Status Bit 205" "Not active,Active"
bitfld.long 0x00 12. "  ASB204  ,Active Status Bit 204" "Not active,Active"
bitfld.long 0x00 11. "  ASB203  ,Active Status Bit 203" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB202  ,Active Status Bit 202" "Not active,Active"
bitfld.long 0x00 9. "  ASB201  ,Active Status Bit 201" "Not active,Active"
bitfld.long 0x00 8. "  ASB200  ,Active Status Bit 200" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB199  ,Active Status Bit 199" "Not active,Active"
bitfld.long 0x00 6. "  ASB198  ,Active Status Bit 198" "Not active,Active"
bitfld.long 0x00 5. "  ASB197  ,Active Status Bit 197" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB196  ,Active Status Bit 196" "Not active,Active"
bitfld.long 0x00 3. "  ASB195  ,Active Status Bit 195" "Not active,Active"
bitfld.long 0x00 2. "  ASB194  ,Active Status Bit 194" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB193  ,Active Status Bit 193" "Not active,Active"
bitfld.long 0x00 0. "  ASB192  ,Active Status Bit 192" "Not active,Active"
else
rgroup.long 0x0318++0x03
line.long 0x0 "GICD_ICDABR6,Active Status Register 6"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
rgroup.long 0x031C++0x03
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
bitfld.long 0x00 31. " ASB255  ,Active Status Bit 255" "Not active,Active"
bitfld.long 0x00 30. "  ASB254  ,Active Status Bit 254" "Not active,Active"
bitfld.long 0x00 29. "  ASB253  ,Active Status Bit 253" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB252  ,Active Status Bit 252" "Not active,Active"
bitfld.long 0x00 27. "  ASB251  ,Active Status Bit 251" "Not active,Active"
bitfld.long 0x00 26. "  ASB250  ,Active Status Bit 250" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB249  ,Active Status Bit 249" "Not active,Active"
bitfld.long 0x00 24. "  ASB248  ,Active Status Bit 248" "Not active,Active"
bitfld.long 0x00 23. "  ASB247  ,Active Status Bit 247" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB246  ,Active Status Bit 246" "Not active,Active"
bitfld.long 0x00 21. "  ASB245  ,Active Status Bit 245" "Not active,Active"
bitfld.long 0x00 20. "  ASB244  ,Active Status Bit 244" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB243  ,Active Status Bit 243" "Not active,Active"
bitfld.long 0x00 18. "  ASB242  ,Active Status Bit 242" "Not active,Active"
bitfld.long 0x00 17. "  ASB241  ,Active Status Bit 241" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB240  ,Active Status Bit 240" "Not active,Active"
bitfld.long 0x00 15. "  ASB239  ,Active Status Bit 239" "Not active,Active"
bitfld.long 0x00 14. "  ASB238  ,Active Status Bit 238" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB237  ,Active Status Bit 237" "Not active,Active"
bitfld.long 0x00 12. "  ASB236  ,Active Status Bit 236" "Not active,Active"
bitfld.long 0x00 11. "  ASB235  ,Active Status Bit 235" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB234  ,Active Status Bit 234" "Not active,Active"
bitfld.long 0x00 9. "  ASB233  ,Active Status Bit 233" "Not active,Active"
bitfld.long 0x00 8. "  ASB232  ,Active Status Bit 232" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB231  ,Active Status Bit 231" "Not active,Active"
bitfld.long 0x00 6. "  ASB230  ,Active Status Bit 230" "Not active,Active"
bitfld.long 0x00 5. "  ASB229  ,Active Status Bit 229" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB228  ,Active Status Bit 228" "Not active,Active"
bitfld.long 0x00 3. "  ASB227  ,Active Status Bit 227" "Not active,Active"
bitfld.long 0x00 2. "  ASB226  ,Active Status Bit 226" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB225  ,Active Status Bit 225" "Not active,Active"
bitfld.long 0x00 0. "  ASB224  ,Active Status Bit 224" "Not active,Active"
else
rgroup.long 0x031C++0x03
line.long 0x0 "GICD_ICDABR7,Active Status Register 7"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
rgroup.long 0x0320++0x03
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
bitfld.long 0x00 31. " ASB287  ,Active Status Bit 287" "Not active,Active"
bitfld.long 0x00 30. "  ASB286  ,Active Status Bit 286" "Not active,Active"
bitfld.long 0x00 29. "  ASB285  ,Active Status Bit 285" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB284  ,Active Status Bit 284" "Not active,Active"
bitfld.long 0x00 27. "  ASB283  ,Active Status Bit 283" "Not active,Active"
bitfld.long 0x00 26. "  ASB282  ,Active Status Bit 282" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB281  ,Active Status Bit 281" "Not active,Active"
bitfld.long 0x00 24. "  ASB280  ,Active Status Bit 280" "Not active,Active"
bitfld.long 0x00 23. "  ASB279  ,Active Status Bit 279" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB278  ,Active Status Bit 278" "Not active,Active"
bitfld.long 0x00 21. "  ASB277  ,Active Status Bit 277" "Not active,Active"
bitfld.long 0x00 20. "  ASB276  ,Active Status Bit 276" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB275  ,Active Status Bit 275" "Not active,Active"
bitfld.long 0x00 18. "  ASB274  ,Active Status Bit 274" "Not active,Active"
bitfld.long 0x00 17. "  ASB273  ,Active Status Bit 273" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB272  ,Active Status Bit 272" "Not active,Active"
bitfld.long 0x00 15. "  ASB271  ,Active Status Bit 271" "Not active,Active"
bitfld.long 0x00 14. "  ASB270  ,Active Status Bit 270" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB269  ,Active Status Bit 269" "Not active,Active"
bitfld.long 0x00 12. "  ASB268  ,Active Status Bit 268" "Not active,Active"
bitfld.long 0x00 11. "  ASB267  ,Active Status Bit 267" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB266  ,Active Status Bit 266" "Not active,Active"
bitfld.long 0x00 9. "  ASB265  ,Active Status Bit 265" "Not active,Active"
bitfld.long 0x00 8. "  ASB264  ,Active Status Bit 264" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB263  ,Active Status Bit 263" "Not active,Active"
bitfld.long 0x00 6. "  ASB262  ,Active Status Bit 262" "Not active,Active"
bitfld.long 0x00 5. "  ASB261  ,Active Status Bit 261" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB260  ,Active Status Bit 260" "Not active,Active"
bitfld.long 0x00 3. "  ASB259  ,Active Status Bit 259" "Not active,Active"
bitfld.long 0x00 2. "  ASB258  ,Active Status Bit 258" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB257  ,Active Status Bit 257" "Not active,Active"
bitfld.long 0x00 0. "  ASB256  ,Active Status Bit 256" "Not active,Active"
else
rgroup.long 0x0320++0x03
line.long 0x0 "GICD_ICDABR8,Active Status Register 8"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
rgroup.long 0x0324++0x03
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
bitfld.long 0x00 31. " ASB319  ,Active Status Bit 319" "Not active,Active"
bitfld.long 0x00 30. "  ASB318  ,Active Status Bit 318" "Not active,Active"
bitfld.long 0x00 29. "  ASB317  ,Active Status Bit 317" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB316  ,Active Status Bit 316" "Not active,Active"
bitfld.long 0x00 27. "  ASB315  ,Active Status Bit 315" "Not active,Active"
bitfld.long 0x00 26. "  ASB314  ,Active Status Bit 314" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB313  ,Active Status Bit 313" "Not active,Active"
bitfld.long 0x00 24. "  ASB312  ,Active Status Bit 312" "Not active,Active"
bitfld.long 0x00 23. "  ASB311  ,Active Status Bit 311" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB310  ,Active Status Bit 310" "Not active,Active"
bitfld.long 0x00 21. "  ASB309  ,Active Status Bit 309" "Not active,Active"
bitfld.long 0x00 20. "  ASB308  ,Active Status Bit 308" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB307  ,Active Status Bit 307" "Not active,Active"
bitfld.long 0x00 18. "  ASB306  ,Active Status Bit 306" "Not active,Active"
bitfld.long 0x00 17. "  ASB305  ,Active Status Bit 305" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB304  ,Active Status Bit 304" "Not active,Active"
bitfld.long 0x00 15. "  ASB303  ,Active Status Bit 303" "Not active,Active"
bitfld.long 0x00 14. "  ASB302  ,Active Status Bit 302" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB301  ,Active Status Bit 301" "Not active,Active"
bitfld.long 0x00 12. "  ASB300  ,Active Status Bit 300" "Not active,Active"
bitfld.long 0x00 11. "  ASB299  ,Active Status Bit 299" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB298  ,Active Status Bit 298" "Not active,Active"
bitfld.long 0x00 9. "  ASB297  ,Active Status Bit 297" "Not active,Active"
bitfld.long 0x00 8. "  ASB296  ,Active Status Bit 296" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB295  ,Active Status Bit 295" "Not active,Active"
bitfld.long 0x00 6. "  ASB294  ,Active Status Bit 294" "Not active,Active"
bitfld.long 0x00 5. "  ASB293  ,Active Status Bit 293" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB292  ,Active Status Bit 292" "Not active,Active"
bitfld.long 0x00 3. "  ASB291  ,Active Status Bit 291" "Not active,Active"
bitfld.long 0x00 2. "  ASB290  ,Active Status Bit 290" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB289  ,Active Status Bit 289" "Not active,Active"
bitfld.long 0x00 0. "  ASB288  ,Active Status Bit 288" "Not active,Active"
else
rgroup.long 0x0324++0x03
line.long 0x0 "GICD_ICDABR9,Active Status Register 9"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
rgroup.long 0x0328++0x03
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
bitfld.long 0x00 31. " ASB351  ,Active Status Bit 351" "Not active,Active"
bitfld.long 0x00 30. "  ASB350  ,Active Status Bit 350" "Not active,Active"
bitfld.long 0x00 29. "  ASB349  ,Active Status Bit 349" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB348  ,Active Status Bit 348" "Not active,Active"
bitfld.long 0x00 27. "  ASB347  ,Active Status Bit 347" "Not active,Active"
bitfld.long 0x00 26. "  ASB346  ,Active Status Bit 346" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB345  ,Active Status Bit 345" "Not active,Active"
bitfld.long 0x00 24. "  ASB344  ,Active Status Bit 344" "Not active,Active"
bitfld.long 0x00 23. "  ASB343  ,Active Status Bit 343" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB342  ,Active Status Bit 342" "Not active,Active"
bitfld.long 0x00 21. "  ASB341  ,Active Status Bit 341" "Not active,Active"
bitfld.long 0x00 20. "  ASB340  ,Active Status Bit 340" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB339  ,Active Status Bit 339" "Not active,Active"
bitfld.long 0x00 18. "  ASB338  ,Active Status Bit 338" "Not active,Active"
bitfld.long 0x00 17. "  ASB337  ,Active Status Bit 337" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB336  ,Active Status Bit 336" "Not active,Active"
bitfld.long 0x00 15. "  ASB335  ,Active Status Bit 335" "Not active,Active"
bitfld.long 0x00 14. "  ASB334  ,Active Status Bit 334" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB333  ,Active Status Bit 333" "Not active,Active"
bitfld.long 0x00 12. "  ASB332  ,Active Status Bit 332" "Not active,Active"
bitfld.long 0x00 11. "  ASB331  ,Active Status Bit 331" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB330  ,Active Status Bit 330" "Not active,Active"
bitfld.long 0x00 9. "  ASB329  ,Active Status Bit 329" "Not active,Active"
bitfld.long 0x00 8. "  ASB328  ,Active Status Bit 328" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB327  ,Active Status Bit 327" "Not active,Active"
bitfld.long 0x00 6. "  ASB326  ,Active Status Bit 326" "Not active,Active"
bitfld.long 0x00 5. "  ASB325  ,Active Status Bit 325" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB324  ,Active Status Bit 324" "Not active,Active"
bitfld.long 0x00 3. "  ASB323  ,Active Status Bit 323" "Not active,Active"
bitfld.long 0x00 2. "  ASB322  ,Active Status Bit 322" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB321  ,Active Status Bit 321" "Not active,Active"
bitfld.long 0x00 0. "  ASB320  ,Active Status Bit 320" "Not active,Active"
else
rgroup.long 0x0328++0x03
line.long 0x0 "GICD_ICDABR10,Active Status Register 10"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
rgroup.long 0x032C++0x03
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
bitfld.long 0x00 31. " ASB383  ,Active Status Bit 383" "Not active,Active"
bitfld.long 0x00 30. "  ASB382  ,Active Status Bit 382" "Not active,Active"
bitfld.long 0x00 29. "  ASB381  ,Active Status Bit 381" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB380  ,Active Status Bit 380" "Not active,Active"
bitfld.long 0x00 27. "  ASB379  ,Active Status Bit 379" "Not active,Active"
bitfld.long 0x00 26. "  ASB378  ,Active Status Bit 378" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB377  ,Active Status Bit 377" "Not active,Active"
bitfld.long 0x00 24. "  ASB376  ,Active Status Bit 376" "Not active,Active"
bitfld.long 0x00 23. "  ASB375  ,Active Status Bit 375" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB374  ,Active Status Bit 374" "Not active,Active"
bitfld.long 0x00 21. "  ASB373  ,Active Status Bit 373" "Not active,Active"
bitfld.long 0x00 20. "  ASB372  ,Active Status Bit 372" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB371  ,Active Status Bit 371" "Not active,Active"
bitfld.long 0x00 18. "  ASB370  ,Active Status Bit 370" "Not active,Active"
bitfld.long 0x00 17. "  ASB369  ,Active Status Bit 369" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB368  ,Active Status Bit 368" "Not active,Active"
bitfld.long 0x00 15. "  ASB367  ,Active Status Bit 367" "Not active,Active"
bitfld.long 0x00 14. "  ASB366  ,Active Status Bit 366" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB365  ,Active Status Bit 365" "Not active,Active"
bitfld.long 0x00 12. "  ASB364  ,Active Status Bit 364" "Not active,Active"
bitfld.long 0x00 11. "  ASB363  ,Active Status Bit 363" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB362  ,Active Status Bit 362" "Not active,Active"
bitfld.long 0x00 9. "  ASB361  ,Active Status Bit 361" "Not active,Active"
bitfld.long 0x00 8. "  ASB360  ,Active Status Bit 360" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB359  ,Active Status Bit 359" "Not active,Active"
bitfld.long 0x00 6. "  ASB358  ,Active Status Bit 358" "Not active,Active"
bitfld.long 0x00 5. "  ASB357  ,Active Status Bit 357" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB356  ,Active Status Bit 356" "Not active,Active"
bitfld.long 0x00 3. "  ASB355  ,Active Status Bit 355" "Not active,Active"
bitfld.long 0x00 2. "  ASB354  ,Active Status Bit 354" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB353  ,Active Status Bit 353" "Not active,Active"
bitfld.long 0x00 0. "  ASB352  ,Active Status Bit 352" "Not active,Active"
else
rgroup.long 0x032C++0x03
line.long 0x0 "GICD_ICDABR11,Active Status Register 11"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
rgroup.long 0x0330++0x03
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
bitfld.long 0x00 31. " ASB415  ,Active Status Bit 415" "Not active,Active"
bitfld.long 0x00 30. "  ASB414  ,Active Status Bit 414" "Not active,Active"
bitfld.long 0x00 29. "  ASB413  ,Active Status Bit 413" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB412  ,Active Status Bit 412" "Not active,Active"
bitfld.long 0x00 27. "  ASB411  ,Active Status Bit 411" "Not active,Active"
bitfld.long 0x00 26. "  ASB410  ,Active Status Bit 410" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB409  ,Active Status Bit 409" "Not active,Active"
bitfld.long 0x00 24. "  ASB408  ,Active Status Bit 408" "Not active,Active"
bitfld.long 0x00 23. "  ASB407  ,Active Status Bit 407" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB406  ,Active Status Bit 406" "Not active,Active"
bitfld.long 0x00 21. "  ASB405  ,Active Status Bit 405" "Not active,Active"
bitfld.long 0x00 20. "  ASB404  ,Active Status Bit 404" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB403  ,Active Status Bit 403" "Not active,Active"
bitfld.long 0x00 18. "  ASB402  ,Active Status Bit 402" "Not active,Active"
bitfld.long 0x00 17. "  ASB401  ,Active Status Bit 401" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB400  ,Active Status Bit 400" "Not active,Active"
bitfld.long 0x00 15. "  ASB399  ,Active Status Bit 399" "Not active,Active"
bitfld.long 0x00 14. "  ASB398  ,Active Status Bit 398" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB397  ,Active Status Bit 397" "Not active,Active"
bitfld.long 0x00 12. "  ASB396  ,Active Status Bit 396" "Not active,Active"
bitfld.long 0x00 11. "  ASB395  ,Active Status Bit 395" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB394  ,Active Status Bit 394" "Not active,Active"
bitfld.long 0x00 9. "  ASB393  ,Active Status Bit 393" "Not active,Active"
bitfld.long 0x00 8. "  ASB392  ,Active Status Bit 392" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB391  ,Active Status Bit 391" "Not active,Active"
bitfld.long 0x00 6. "  ASB390  ,Active Status Bit 390" "Not active,Active"
bitfld.long 0x00 5. "  ASB389  ,Active Status Bit 389" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB388  ,Active Status Bit 388" "Not active,Active"
bitfld.long 0x00 3. "  ASB387  ,Active Status Bit 387" "Not active,Active"
bitfld.long 0x00 2. "  ASB386  ,Active Status Bit 386" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB385  ,Active Status Bit 385" "Not active,Active"
bitfld.long 0x00 0. "  ASB384  ,Active Status Bit 384" "Not active,Active"
else
rgroup.long 0x0330++0x03
line.long 0x0 "GICD_ICDABR12,Active Status Register 12"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
rgroup.long 0x0334++0x03
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
bitfld.long 0x00 31. " ASB447  ,Active Status Bit 447" "Not active,Active"
bitfld.long 0x00 30. "  ASB446  ,Active Status Bit 446" "Not active,Active"
bitfld.long 0x00 29. "  ASB445  ,Active Status Bit 445" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB444  ,Active Status Bit 444" "Not active,Active"
bitfld.long 0x00 27. "  ASB443  ,Active Status Bit 443" "Not active,Active"
bitfld.long 0x00 26. "  ASB442  ,Active Status Bit 442" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB441  ,Active Status Bit 441" "Not active,Active"
bitfld.long 0x00 24. "  ASB440  ,Active Status Bit 440" "Not active,Active"
bitfld.long 0x00 23. "  ASB439  ,Active Status Bit 439" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB438  ,Active Status Bit 438" "Not active,Active"
bitfld.long 0x00 21. "  ASB437  ,Active Status Bit 437" "Not active,Active"
bitfld.long 0x00 20. "  ASB436  ,Active Status Bit 436" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB435  ,Active Status Bit 435" "Not active,Active"
bitfld.long 0x00 18. "  ASB434  ,Active Status Bit 434" "Not active,Active"
bitfld.long 0x00 17. "  ASB433  ,Active Status Bit 433" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB432  ,Active Status Bit 432" "Not active,Active"
bitfld.long 0x00 15. "  ASB431  ,Active Status Bit 431" "Not active,Active"
bitfld.long 0x00 14. "  ASB430  ,Active Status Bit 430" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB429  ,Active Status Bit 429" "Not active,Active"
bitfld.long 0x00 12. "  ASB428  ,Active Status Bit 428" "Not active,Active"
bitfld.long 0x00 11. "  ASB427  ,Active Status Bit 427" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB426  ,Active Status Bit 426" "Not active,Active"
bitfld.long 0x00 9. "  ASB425  ,Active Status Bit 425" "Not active,Active"
bitfld.long 0x00 8. "  ASB424  ,Active Status Bit 424" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB423  ,Active Status Bit 423" "Not active,Active"
bitfld.long 0x00 6. "  ASB422  ,Active Status Bit 422" "Not active,Active"
bitfld.long 0x00 5. "  ASB421  ,Active Status Bit 421" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB420  ,Active Status Bit 420" "Not active,Active"
bitfld.long 0x00 3. "  ASB419  ,Active Status Bit 419" "Not active,Active"
bitfld.long 0x00 2. "  ASB418  ,Active Status Bit 418" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB417  ,Active Status Bit 417" "Not active,Active"
bitfld.long 0x00 0. "  ASB416  ,Active Status Bit 416" "Not active,Active"
else
rgroup.long 0x0334++0x03
line.long 0x0 "GICD_ICDABR13,Active Status Register 13"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
rgroup.long 0x0338++0x03
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
bitfld.long 0x00 31. " ASB479  ,Active Status Bit 479" "Not active,Active"
bitfld.long 0x00 30. "  ASB478  ,Active Status Bit 478" "Not active,Active"
bitfld.long 0x00 29. "  ASB477  ,Active Status Bit 477" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB476  ,Active Status Bit 476" "Not active,Active"
bitfld.long 0x00 27. "  ASB475  ,Active Status Bit 475" "Not active,Active"
bitfld.long 0x00 26. "  ASB474  ,Active Status Bit 474" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB473  ,Active Status Bit 473" "Not active,Active"
bitfld.long 0x00 24. "  ASB472  ,Active Status Bit 472" "Not active,Active"
bitfld.long 0x00 23. "  ASB471  ,Active Status Bit 471" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB470  ,Active Status Bit 470" "Not active,Active"
bitfld.long 0x00 21. "  ASB469  ,Active Status Bit 469" "Not active,Active"
bitfld.long 0x00 20. "  ASB468  ,Active Status Bit 468" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB467  ,Active Status Bit 467" "Not active,Active"
bitfld.long 0x00 18. "  ASB466  ,Active Status Bit 466" "Not active,Active"
bitfld.long 0x00 17. "  ASB465  ,Active Status Bit 465" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB464  ,Active Status Bit 464" "Not active,Active"
bitfld.long 0x00 15. "  ASB463  ,Active Status Bit 463" "Not active,Active"
bitfld.long 0x00 14. "  ASB462  ,Active Status Bit 462" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB461  ,Active Status Bit 461" "Not active,Active"
bitfld.long 0x00 12. "  ASB460  ,Active Status Bit 460" "Not active,Active"
bitfld.long 0x00 11. "  ASB459  ,Active Status Bit 459" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB458  ,Active Status Bit 458" "Not active,Active"
bitfld.long 0x00 9. "  ASB457  ,Active Status Bit 457" "Not active,Active"
bitfld.long 0x00 8. "  ASB456  ,Active Status Bit 456" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB455  ,Active Status Bit 455" "Not active,Active"
bitfld.long 0x00 6. "  ASB454  ,Active Status Bit 454" "Not active,Active"
bitfld.long 0x00 5. "  ASB453  ,Active Status Bit 453" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB452  ,Active Status Bit 452" "Not active,Active"
bitfld.long 0x00 3. "  ASB451  ,Active Status Bit 451" "Not active,Active"
bitfld.long 0x00 2. "  ASB450  ,Active Status Bit 450" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB449  ,Active Status Bit 449" "Not active,Active"
bitfld.long 0x00 0. "  ASB448  ,Active Status Bit 448" "Not active,Active"
else
rgroup.long 0x0338++0x03
line.long 0x0 "GICD_ICDABR14,Active Status Register 14"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
rgroup.long 0x033C++0x03
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
bitfld.long 0x00 31. " ASB511  ,Active Status Bit 511" "Not active,Active"
bitfld.long 0x00 30. "  ASB510  ,Active Status Bit 510" "Not active,Active"
bitfld.long 0x00 29. "  ASB509  ,Active Status Bit 509" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB508  ,Active Status Bit 508" "Not active,Active"
bitfld.long 0x00 27. "  ASB507  ,Active Status Bit 507" "Not active,Active"
bitfld.long 0x00 26. "  ASB506  ,Active Status Bit 506" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB505  ,Active Status Bit 505" "Not active,Active"
bitfld.long 0x00 24. "  ASB504  ,Active Status Bit 504" "Not active,Active"
bitfld.long 0x00 23. "  ASB503  ,Active Status Bit 503" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB502  ,Active Status Bit 502" "Not active,Active"
bitfld.long 0x00 21. "  ASB501  ,Active Status Bit 501" "Not active,Active"
bitfld.long 0x00 20. "  ASB500  ,Active Status Bit 500" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB499  ,Active Status Bit 499" "Not active,Active"
bitfld.long 0x00 18. "  ASB498  ,Active Status Bit 498" "Not active,Active"
bitfld.long 0x00 17. "  ASB497  ,Active Status Bit 497" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB496  ,Active Status Bit 496" "Not active,Active"
bitfld.long 0x00 15. "  ASB495  ,Active Status Bit 495" "Not active,Active"
bitfld.long 0x00 14. "  ASB494  ,Active Status Bit 494" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB493  ,Active Status Bit 493" "Not active,Active"
bitfld.long 0x00 12. "  ASB492  ,Active Status Bit 492" "Not active,Active"
bitfld.long 0x00 11. "  ASB491  ,Active Status Bit 491" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB490  ,Active Status Bit 490" "Not active,Active"
bitfld.long 0x00 9. "  ASB489  ,Active Status Bit 489" "Not active,Active"
bitfld.long 0x00 8. "  ASB488  ,Active Status Bit 488" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB487  ,Active Status Bit 487" "Not active,Active"
bitfld.long 0x00 6. "  ASB486  ,Active Status Bit 486" "Not active,Active"
bitfld.long 0x00 5. "  ASB485  ,Active Status Bit 485" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB484  ,Active Status Bit 484" "Not active,Active"
bitfld.long 0x00 3. "  ASB483  ,Active Status Bit 483" "Not active,Active"
bitfld.long 0x00 2. "  ASB482  ,Active Status Bit 482" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB481  ,Active Status Bit 481" "Not active,Active"
bitfld.long 0x00 0. "  ASB480  ,Active Status Bit 480" "Not active,Active"
else
rgroup.long 0x033C++0x03
line.long 0x0 "GICD_ICDABR15,Active Status Register 15"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
rgroup.long 0x0340++0x03
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
bitfld.long 0x00 31. " ASB543  ,Active Status Bit 543" "Not active,Active"
bitfld.long 0x00 30. "  ASB542  ,Active Status Bit 542" "Not active,Active"
bitfld.long 0x00 29. "  ASB541  ,Active Status Bit 541" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB540  ,Active Status Bit 540" "Not active,Active"
bitfld.long 0x00 27. "  ASB539  ,Active Status Bit 539" "Not active,Active"
bitfld.long 0x00 26. "  ASB538  ,Active Status Bit 538" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB537  ,Active Status Bit 537" "Not active,Active"
bitfld.long 0x00 24. "  ASB536  ,Active Status Bit 536" "Not active,Active"
bitfld.long 0x00 23. "  ASB535  ,Active Status Bit 535" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB534  ,Active Status Bit 534" "Not active,Active"
bitfld.long 0x00 21. "  ASB533  ,Active Status Bit 533" "Not active,Active"
bitfld.long 0x00 20. "  ASB532  ,Active Status Bit 532" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB531  ,Active Status Bit 531" "Not active,Active"
bitfld.long 0x00 18. "  ASB530  ,Active Status Bit 530" "Not active,Active"
bitfld.long 0x00 17. "  ASB529  ,Active Status Bit 529" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB528  ,Active Status Bit 528" "Not active,Active"
bitfld.long 0x00 15. "  ASB527  ,Active Status Bit 527" "Not active,Active"
bitfld.long 0x00 14. "  ASB526  ,Active Status Bit 526" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB525  ,Active Status Bit 525" "Not active,Active"
bitfld.long 0x00 12. "  ASB524  ,Active Status Bit 524" "Not active,Active"
bitfld.long 0x00 11. "  ASB523  ,Active Status Bit 523" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB522  ,Active Status Bit 522" "Not active,Active"
bitfld.long 0x00 9. "  ASB521  ,Active Status Bit 521" "Not active,Active"
bitfld.long 0x00 8. "  ASB520  ,Active Status Bit 520" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB519  ,Active Status Bit 519" "Not active,Active"
bitfld.long 0x00 6. "  ASB518  ,Active Status Bit 518" "Not active,Active"
bitfld.long 0x00 5. "  ASB517  ,Active Status Bit 517" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB516  ,Active Status Bit 516" "Not active,Active"
bitfld.long 0x00 3. "  ASB515  ,Active Status Bit 515" "Not active,Active"
bitfld.long 0x00 2. "  ASB514  ,Active Status Bit 514" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB513  ,Active Status Bit 513" "Not active,Active"
bitfld.long 0x00 0. "  ASB512  ,Active Status Bit 512" "Not active,Active"
else
rgroup.long 0x0340++0x03
line.long 0x0 "GICD_ICDABR16,Active Status Register 16"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
rgroup.long 0x0344++0x03
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
bitfld.long 0x00 31. " ASB575  ,Active Status Bit 575" "Not active,Active"
bitfld.long 0x00 30. "  ASB574  ,Active Status Bit 574" "Not active,Active"
bitfld.long 0x00 29. "  ASB573  ,Active Status Bit 573" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB572  ,Active Status Bit 572" "Not active,Active"
bitfld.long 0x00 27. "  ASB571  ,Active Status Bit 571" "Not active,Active"
bitfld.long 0x00 26. "  ASB570  ,Active Status Bit 570" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB569  ,Active Status Bit 569" "Not active,Active"
bitfld.long 0x00 24. "  ASB568  ,Active Status Bit 568" "Not active,Active"
bitfld.long 0x00 23. "  ASB567  ,Active Status Bit 567" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB566  ,Active Status Bit 566" "Not active,Active"
bitfld.long 0x00 21. "  ASB565  ,Active Status Bit 565" "Not active,Active"
bitfld.long 0x00 20. "  ASB564  ,Active Status Bit 564" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB563  ,Active Status Bit 563" "Not active,Active"
bitfld.long 0x00 18. "  ASB562  ,Active Status Bit 562" "Not active,Active"
bitfld.long 0x00 17. "  ASB561  ,Active Status Bit 561" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB560  ,Active Status Bit 560" "Not active,Active"
bitfld.long 0x00 15. "  ASB559  ,Active Status Bit 559" "Not active,Active"
bitfld.long 0x00 14. "  ASB558  ,Active Status Bit 558" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB557  ,Active Status Bit 557" "Not active,Active"
bitfld.long 0x00 12. "  ASB556  ,Active Status Bit 556" "Not active,Active"
bitfld.long 0x00 11. "  ASB555  ,Active Status Bit 555" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB554  ,Active Status Bit 554" "Not active,Active"
bitfld.long 0x00 9. "  ASB553  ,Active Status Bit 553" "Not active,Active"
bitfld.long 0x00 8. "  ASB552  ,Active Status Bit 552" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB551  ,Active Status Bit 551" "Not active,Active"
bitfld.long 0x00 6. "  ASB550  ,Active Status Bit 550" "Not active,Active"
bitfld.long 0x00 5. "  ASB549  ,Active Status Bit 549" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB548  ,Active Status Bit 548" "Not active,Active"
bitfld.long 0x00 3. "  ASB547  ,Active Status Bit 547" "Not active,Active"
bitfld.long 0x00 2. "  ASB546  ,Active Status Bit 546" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB545  ,Active Status Bit 545" "Not active,Active"
bitfld.long 0x00 0. "  ASB544  ,Active Status Bit 544" "Not active,Active"
else
rgroup.long 0x0344++0x03
line.long 0x0 "GICD_ICDABR17,Active Status Register 17"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
rgroup.long 0x0348++0x03
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
bitfld.long 0x00 31. " ASB607  ,Active Status Bit 607" "Not active,Active"
bitfld.long 0x00 30. "  ASB606  ,Active Status Bit 606" "Not active,Active"
bitfld.long 0x00 29. "  ASB605  ,Active Status Bit 605" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB604  ,Active Status Bit 604" "Not active,Active"
bitfld.long 0x00 27. "  ASB603  ,Active Status Bit 603" "Not active,Active"
bitfld.long 0x00 26. "  ASB602  ,Active Status Bit 602" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB601  ,Active Status Bit 601" "Not active,Active"
bitfld.long 0x00 24. "  ASB600  ,Active Status Bit 600" "Not active,Active"
bitfld.long 0x00 23. "  ASB599  ,Active Status Bit 599" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB598  ,Active Status Bit 598" "Not active,Active"
bitfld.long 0x00 21. "  ASB597  ,Active Status Bit 597" "Not active,Active"
bitfld.long 0x00 20. "  ASB596  ,Active Status Bit 596" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB595  ,Active Status Bit 595" "Not active,Active"
bitfld.long 0x00 18. "  ASB594  ,Active Status Bit 594" "Not active,Active"
bitfld.long 0x00 17. "  ASB593  ,Active Status Bit 593" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB592  ,Active Status Bit 592" "Not active,Active"
bitfld.long 0x00 15. "  ASB591  ,Active Status Bit 591" "Not active,Active"
bitfld.long 0x00 14. "  ASB590  ,Active Status Bit 590" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB589  ,Active Status Bit 589" "Not active,Active"
bitfld.long 0x00 12. "  ASB588  ,Active Status Bit 588" "Not active,Active"
bitfld.long 0x00 11. "  ASB587  ,Active Status Bit 587" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB586  ,Active Status Bit 586" "Not active,Active"
bitfld.long 0x00 9. "  ASB585  ,Active Status Bit 585" "Not active,Active"
bitfld.long 0x00 8. "  ASB584  ,Active Status Bit 584" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB583  ,Active Status Bit 583" "Not active,Active"
bitfld.long 0x00 6. "  ASB582  ,Active Status Bit 582" "Not active,Active"
bitfld.long 0x00 5. "  ASB581  ,Active Status Bit 581" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB580  ,Active Status Bit 580" "Not active,Active"
bitfld.long 0x00 3. "  ASB579  ,Active Status Bit 579" "Not active,Active"
bitfld.long 0x00 2. "  ASB578  ,Active Status Bit 578" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB577  ,Active Status Bit 577" "Not active,Active"
bitfld.long 0x00 0. "  ASB576  ,Active Status Bit 576" "Not active,Active"
else
rgroup.long 0x0348++0x03
line.long 0x0 "GICD_ICDABR18,Active Status Register 18"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
rgroup.long 0x034C++0x03
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
bitfld.long 0x00 31. " ASB639  ,Active Status Bit 639" "Not active,Active"
bitfld.long 0x00 30. "  ASB638  ,Active Status Bit 638" "Not active,Active"
bitfld.long 0x00 29. "  ASB637  ,Active Status Bit 637" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB636  ,Active Status Bit 636" "Not active,Active"
bitfld.long 0x00 27. "  ASB635  ,Active Status Bit 635" "Not active,Active"
bitfld.long 0x00 26. "  ASB634  ,Active Status Bit 634" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB633  ,Active Status Bit 633" "Not active,Active"
bitfld.long 0x00 24. "  ASB632  ,Active Status Bit 632" "Not active,Active"
bitfld.long 0x00 23. "  ASB631  ,Active Status Bit 631" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB630  ,Active Status Bit 630" "Not active,Active"
bitfld.long 0x00 21. "  ASB629  ,Active Status Bit 629" "Not active,Active"
bitfld.long 0x00 20. "  ASB628  ,Active Status Bit 628" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB627  ,Active Status Bit 627" "Not active,Active"
bitfld.long 0x00 18. "  ASB626  ,Active Status Bit 626" "Not active,Active"
bitfld.long 0x00 17. "  ASB625  ,Active Status Bit 625" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB624  ,Active Status Bit 624" "Not active,Active"
bitfld.long 0x00 15. "  ASB623  ,Active Status Bit 623" "Not active,Active"
bitfld.long 0x00 14. "  ASB622  ,Active Status Bit 622" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB621  ,Active Status Bit 621" "Not active,Active"
bitfld.long 0x00 12. "  ASB620  ,Active Status Bit 620" "Not active,Active"
bitfld.long 0x00 11. "  ASB619  ,Active Status Bit 619" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB618  ,Active Status Bit 618" "Not active,Active"
bitfld.long 0x00 9. "  ASB617  ,Active Status Bit 617" "Not active,Active"
bitfld.long 0x00 8. "  ASB616  ,Active Status Bit 616" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB615  ,Active Status Bit 615" "Not active,Active"
bitfld.long 0x00 6. "  ASB614  ,Active Status Bit 614" "Not active,Active"
bitfld.long 0x00 5. "  ASB613  ,Active Status Bit 613" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB612  ,Active Status Bit 612" "Not active,Active"
bitfld.long 0x00 3. "  ASB611  ,Active Status Bit 611" "Not active,Active"
bitfld.long 0x00 2. "  ASB610  ,Active Status Bit 610" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB609  ,Active Status Bit 609" "Not active,Active"
bitfld.long 0x00 0. "  ASB608  ,Active Status Bit 608" "Not active,Active"
else
rgroup.long 0x034C++0x03
line.long 0x0 "GICD_ICDABR19,Active Status Register 19"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
rgroup.long 0x0350++0x03
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
bitfld.long 0x00 31. " ASB671  ,Active Status Bit 671" "Not active,Active"
bitfld.long 0x00 30. "  ASB670  ,Active Status Bit 670" "Not active,Active"
bitfld.long 0x00 29. "  ASB669  ,Active Status Bit 669" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB668  ,Active Status Bit 668" "Not active,Active"
bitfld.long 0x00 27. "  ASB667  ,Active Status Bit 667" "Not active,Active"
bitfld.long 0x00 26. "  ASB666  ,Active Status Bit 666" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB665  ,Active Status Bit 665" "Not active,Active"
bitfld.long 0x00 24. "  ASB664  ,Active Status Bit 664" "Not active,Active"
bitfld.long 0x00 23. "  ASB663  ,Active Status Bit 663" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB662  ,Active Status Bit 662" "Not active,Active"
bitfld.long 0x00 21. "  ASB661  ,Active Status Bit 661" "Not active,Active"
bitfld.long 0x00 20. "  ASB660  ,Active Status Bit 660" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB659  ,Active Status Bit 659" "Not active,Active"
bitfld.long 0x00 18. "  ASB658  ,Active Status Bit 658" "Not active,Active"
bitfld.long 0x00 17. "  ASB657  ,Active Status Bit 657" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB656  ,Active Status Bit 656" "Not active,Active"
bitfld.long 0x00 15. "  ASB655  ,Active Status Bit 655" "Not active,Active"
bitfld.long 0x00 14. "  ASB654  ,Active Status Bit 654" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB653  ,Active Status Bit 653" "Not active,Active"
bitfld.long 0x00 12. "  ASB652  ,Active Status Bit 652" "Not active,Active"
bitfld.long 0x00 11. "  ASB651  ,Active Status Bit 651" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB650  ,Active Status Bit 650" "Not active,Active"
bitfld.long 0x00 9. "  ASB649  ,Active Status Bit 649" "Not active,Active"
bitfld.long 0x00 8. "  ASB648  ,Active Status Bit 648" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB647  ,Active Status Bit 647" "Not active,Active"
bitfld.long 0x00 6. "  ASB646  ,Active Status Bit 646" "Not active,Active"
bitfld.long 0x00 5. "  ASB645  ,Active Status Bit 645" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB644  ,Active Status Bit 644" "Not active,Active"
bitfld.long 0x00 3. "  ASB643  ,Active Status Bit 643" "Not active,Active"
bitfld.long 0x00 2. "  ASB642  ,Active Status Bit 642" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB641  ,Active Status Bit 641" "Not active,Active"
bitfld.long 0x00 0. "  ASB640  ,Active Status Bit 640" "Not active,Active"
else
rgroup.long 0x0350++0x03
line.long 0x0 "GICD_ICDABR20,Active Status Register 20"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
rgroup.long 0x0354++0x03
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
bitfld.long 0x00 31. " ASB703  ,Active Status Bit 703" "Not active,Active"
bitfld.long 0x00 30. "  ASB702  ,Active Status Bit 702" "Not active,Active"
bitfld.long 0x00 29. "  ASB701  ,Active Status Bit 701" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB700  ,Active Status Bit 700" "Not active,Active"
bitfld.long 0x00 27. "  ASB699  ,Active Status Bit 699" "Not active,Active"
bitfld.long 0x00 26. "  ASB698  ,Active Status Bit 698" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB697  ,Active Status Bit 697" "Not active,Active"
bitfld.long 0x00 24. "  ASB696  ,Active Status Bit 696" "Not active,Active"
bitfld.long 0x00 23. "  ASB695  ,Active Status Bit 695" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB694  ,Active Status Bit 694" "Not active,Active"
bitfld.long 0x00 21. "  ASB693  ,Active Status Bit 693" "Not active,Active"
bitfld.long 0x00 20. "  ASB692  ,Active Status Bit 692" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB691  ,Active Status Bit 691" "Not active,Active"
bitfld.long 0x00 18. "  ASB690  ,Active Status Bit 690" "Not active,Active"
bitfld.long 0x00 17. "  ASB689  ,Active Status Bit 689" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB688  ,Active Status Bit 688" "Not active,Active"
bitfld.long 0x00 15. "  ASB687  ,Active Status Bit 687" "Not active,Active"
bitfld.long 0x00 14. "  ASB686  ,Active Status Bit 686" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB685  ,Active Status Bit 685" "Not active,Active"
bitfld.long 0x00 12. "  ASB684  ,Active Status Bit 684" "Not active,Active"
bitfld.long 0x00 11. "  ASB683  ,Active Status Bit 683" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB682  ,Active Status Bit 682" "Not active,Active"
bitfld.long 0x00 9. "  ASB681  ,Active Status Bit 681" "Not active,Active"
bitfld.long 0x00 8. "  ASB680  ,Active Status Bit 680" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB679  ,Active Status Bit 679" "Not active,Active"
bitfld.long 0x00 6. "  ASB678  ,Active Status Bit 678" "Not active,Active"
bitfld.long 0x00 5. "  ASB677  ,Active Status Bit 677" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB676  ,Active Status Bit 676" "Not active,Active"
bitfld.long 0x00 3. "  ASB675  ,Active Status Bit 675" "Not active,Active"
bitfld.long 0x00 2. "  ASB674  ,Active Status Bit 674" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB673  ,Active Status Bit 673" "Not active,Active"
bitfld.long 0x00 0. "  ASB672  ,Active Status Bit 672" "Not active,Active"
else
rgroup.long 0x0354++0x03
line.long 0x0 "GICD_ICDABR21,Active Status Register 21"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
rgroup.long 0x0358++0x03
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
bitfld.long 0x00 31. " ASB735  ,Active Status Bit 735" "Not active,Active"
bitfld.long 0x00 30. "  ASB734  ,Active Status Bit 734" "Not active,Active"
bitfld.long 0x00 29. "  ASB733  ,Active Status Bit 733" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB732  ,Active Status Bit 732" "Not active,Active"
bitfld.long 0x00 27. "  ASB731  ,Active Status Bit 731" "Not active,Active"
bitfld.long 0x00 26. "  ASB730  ,Active Status Bit 730" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB729  ,Active Status Bit 729" "Not active,Active"
bitfld.long 0x00 24. "  ASB728  ,Active Status Bit 728" "Not active,Active"
bitfld.long 0x00 23. "  ASB727  ,Active Status Bit 727" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB726  ,Active Status Bit 726" "Not active,Active"
bitfld.long 0x00 21. "  ASB725  ,Active Status Bit 725" "Not active,Active"
bitfld.long 0x00 20. "  ASB724  ,Active Status Bit 724" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB723  ,Active Status Bit 723" "Not active,Active"
bitfld.long 0x00 18. "  ASB722  ,Active Status Bit 722" "Not active,Active"
bitfld.long 0x00 17. "  ASB721  ,Active Status Bit 721" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB720  ,Active Status Bit 720" "Not active,Active"
bitfld.long 0x00 15. "  ASB719  ,Active Status Bit 719" "Not active,Active"
bitfld.long 0x00 14. "  ASB718  ,Active Status Bit 718" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB717  ,Active Status Bit 717" "Not active,Active"
bitfld.long 0x00 12. "  ASB716  ,Active Status Bit 716" "Not active,Active"
bitfld.long 0x00 11. "  ASB715  ,Active Status Bit 715" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB714  ,Active Status Bit 714" "Not active,Active"
bitfld.long 0x00 9. "  ASB713  ,Active Status Bit 713" "Not active,Active"
bitfld.long 0x00 8. "  ASB712  ,Active Status Bit 712" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB711  ,Active Status Bit 711" "Not active,Active"
bitfld.long 0x00 6. "  ASB710  ,Active Status Bit 710" "Not active,Active"
bitfld.long 0x00 5. "  ASB709  ,Active Status Bit 709" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB708  ,Active Status Bit 708" "Not active,Active"
bitfld.long 0x00 3. "  ASB707  ,Active Status Bit 707" "Not active,Active"
bitfld.long 0x00 2. "  ASB706  ,Active Status Bit 706" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB705  ,Active Status Bit 705" "Not active,Active"
bitfld.long 0x00 0. "  ASB704  ,Active Status Bit 704" "Not active,Active"
else
rgroup.long 0x0358++0x03
line.long 0x0 "GICD_ICDABR22,Active Status Register 22"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
rgroup.long 0x035C++0x03
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
bitfld.long 0x00 31. " ASB767  ,Active Status Bit 767" "Not active,Active"
bitfld.long 0x00 30. "  ASB766  ,Active Status Bit 766" "Not active,Active"
bitfld.long 0x00 29. "  ASB765  ,Active Status Bit 765" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB764  ,Active Status Bit 764" "Not active,Active"
bitfld.long 0x00 27. "  ASB763  ,Active Status Bit 763" "Not active,Active"
bitfld.long 0x00 26. "  ASB762  ,Active Status Bit 762" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB761  ,Active Status Bit 761" "Not active,Active"
bitfld.long 0x00 24. "  ASB760  ,Active Status Bit 760" "Not active,Active"
bitfld.long 0x00 23. "  ASB759  ,Active Status Bit 759" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB758  ,Active Status Bit 758" "Not active,Active"
bitfld.long 0x00 21. "  ASB757  ,Active Status Bit 757" "Not active,Active"
bitfld.long 0x00 20. "  ASB756  ,Active Status Bit 756" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB755  ,Active Status Bit 755" "Not active,Active"
bitfld.long 0x00 18. "  ASB754  ,Active Status Bit 754" "Not active,Active"
bitfld.long 0x00 17. "  ASB753  ,Active Status Bit 753" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB752  ,Active Status Bit 752" "Not active,Active"
bitfld.long 0x00 15. "  ASB751  ,Active Status Bit 751" "Not active,Active"
bitfld.long 0x00 14. "  ASB750  ,Active Status Bit 750" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB749  ,Active Status Bit 749" "Not active,Active"
bitfld.long 0x00 12. "  ASB748  ,Active Status Bit 748" "Not active,Active"
bitfld.long 0x00 11. "  ASB747  ,Active Status Bit 747" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB746  ,Active Status Bit 746" "Not active,Active"
bitfld.long 0x00 9. "  ASB745  ,Active Status Bit 745" "Not active,Active"
bitfld.long 0x00 8. "  ASB744  ,Active Status Bit 744" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB743  ,Active Status Bit 743" "Not active,Active"
bitfld.long 0x00 6. "  ASB742  ,Active Status Bit 742" "Not active,Active"
bitfld.long 0x00 5. "  ASB741  ,Active Status Bit 741" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB740  ,Active Status Bit 740" "Not active,Active"
bitfld.long 0x00 3. "  ASB739  ,Active Status Bit 739" "Not active,Active"
bitfld.long 0x00 2. "  ASB738  ,Active Status Bit 738" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB737  ,Active Status Bit 737" "Not active,Active"
bitfld.long 0x00 0. "  ASB736  ,Active Status Bit 736" "Not active,Active"
else
rgroup.long 0x035C++0x03
line.long 0x0 "GICD_ICDABR23,Active Status Register 23"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
rgroup.long 0x0360++0x03
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
bitfld.long 0x00 31. " ASB799  ,Active Status Bit 799" "Not active,Active"
bitfld.long 0x00 30. "  ASB798  ,Active Status Bit 798" "Not active,Active"
bitfld.long 0x00 29. "  ASB797  ,Active Status Bit 797" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB796  ,Active Status Bit 796" "Not active,Active"
bitfld.long 0x00 27. "  ASB795  ,Active Status Bit 795" "Not active,Active"
bitfld.long 0x00 26. "  ASB794  ,Active Status Bit 794" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB793  ,Active Status Bit 793" "Not active,Active"
bitfld.long 0x00 24. "  ASB792  ,Active Status Bit 792" "Not active,Active"
bitfld.long 0x00 23. "  ASB791  ,Active Status Bit 791" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB790  ,Active Status Bit 790" "Not active,Active"
bitfld.long 0x00 21. "  ASB789  ,Active Status Bit 789" "Not active,Active"
bitfld.long 0x00 20. "  ASB788  ,Active Status Bit 788" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB787  ,Active Status Bit 787" "Not active,Active"
bitfld.long 0x00 18. "  ASB786  ,Active Status Bit 786" "Not active,Active"
bitfld.long 0x00 17. "  ASB785  ,Active Status Bit 785" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB784  ,Active Status Bit 784" "Not active,Active"
bitfld.long 0x00 15. "  ASB783  ,Active Status Bit 783" "Not active,Active"
bitfld.long 0x00 14. "  ASB782  ,Active Status Bit 782" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB781  ,Active Status Bit 781" "Not active,Active"
bitfld.long 0x00 12. "  ASB780  ,Active Status Bit 780" "Not active,Active"
bitfld.long 0x00 11. "  ASB779  ,Active Status Bit 779" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB778  ,Active Status Bit 778" "Not active,Active"
bitfld.long 0x00 9. "  ASB777  ,Active Status Bit 777" "Not active,Active"
bitfld.long 0x00 8. "  ASB776  ,Active Status Bit 776" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB775  ,Active Status Bit 775" "Not active,Active"
bitfld.long 0x00 6. "  ASB774  ,Active Status Bit 774" "Not active,Active"
bitfld.long 0x00 5. "  ASB773  ,Active Status Bit 773" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB772  ,Active Status Bit 772" "Not active,Active"
bitfld.long 0x00 3. "  ASB771  ,Active Status Bit 771" "Not active,Active"
bitfld.long 0x00 2. "  ASB770  ,Active Status Bit 770" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB769  ,Active Status Bit 769" "Not active,Active"
bitfld.long 0x00 0. "  ASB768  ,Active Status Bit 768" "Not active,Active"
else
rgroup.long 0x0360++0x03
line.long 0x0 "GICD_ICDABR24,Active Status Register 24"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
rgroup.long 0x0364++0x03
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
bitfld.long 0x00 31. " ASB831  ,Active Status Bit 831" "Not active,Active"
bitfld.long 0x00 30. "  ASB830  ,Active Status Bit 830" "Not active,Active"
bitfld.long 0x00 29. "  ASB829  ,Active Status Bit 829" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB828  ,Active Status Bit 828" "Not active,Active"
bitfld.long 0x00 27. "  ASB827  ,Active Status Bit 827" "Not active,Active"
bitfld.long 0x00 26. "  ASB826  ,Active Status Bit 826" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB825  ,Active Status Bit 825" "Not active,Active"
bitfld.long 0x00 24. "  ASB824  ,Active Status Bit 824" "Not active,Active"
bitfld.long 0x00 23. "  ASB823  ,Active Status Bit 823" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB822  ,Active Status Bit 822" "Not active,Active"
bitfld.long 0x00 21. "  ASB821  ,Active Status Bit 821" "Not active,Active"
bitfld.long 0x00 20. "  ASB820  ,Active Status Bit 820" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB819  ,Active Status Bit 819" "Not active,Active"
bitfld.long 0x00 18. "  ASB818  ,Active Status Bit 818" "Not active,Active"
bitfld.long 0x00 17. "  ASB817  ,Active Status Bit 817" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB816  ,Active Status Bit 816" "Not active,Active"
bitfld.long 0x00 15. "  ASB815  ,Active Status Bit 815" "Not active,Active"
bitfld.long 0x00 14. "  ASB814  ,Active Status Bit 814" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB813  ,Active Status Bit 813" "Not active,Active"
bitfld.long 0x00 12. "  ASB812  ,Active Status Bit 812" "Not active,Active"
bitfld.long 0x00 11. "  ASB811  ,Active Status Bit 811" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB810  ,Active Status Bit 810" "Not active,Active"
bitfld.long 0x00 9. "  ASB809  ,Active Status Bit 809" "Not active,Active"
bitfld.long 0x00 8. "  ASB808  ,Active Status Bit 808" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB807  ,Active Status Bit 807" "Not active,Active"
bitfld.long 0x00 6. "  ASB806  ,Active Status Bit 806" "Not active,Active"
bitfld.long 0x00 5. "  ASB805  ,Active Status Bit 805" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB804  ,Active Status Bit 804" "Not active,Active"
bitfld.long 0x00 3. "  ASB803  ,Active Status Bit 803" "Not active,Active"
bitfld.long 0x00 2. "  ASB802  ,Active Status Bit 802" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB801  ,Active Status Bit 801" "Not active,Active"
bitfld.long 0x00 0. "  ASB800  ,Active Status Bit 800" "Not active,Active"
else
rgroup.long 0x0364++0x03
line.long 0x0 "GICD_ICDABR25,Active Status Register 25"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
rgroup.long 0x0368++0x03
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
bitfld.long 0x00 31. " ASB863  ,Active Status Bit 863" "Not active,Active"
bitfld.long 0x00 30. "  ASB862  ,Active Status Bit 862" "Not active,Active"
bitfld.long 0x00 29. "  ASB861  ,Active Status Bit 861" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB860  ,Active Status Bit 860" "Not active,Active"
bitfld.long 0x00 27. "  ASB859  ,Active Status Bit 859" "Not active,Active"
bitfld.long 0x00 26. "  ASB858  ,Active Status Bit 858" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB857  ,Active Status Bit 857" "Not active,Active"
bitfld.long 0x00 24. "  ASB856  ,Active Status Bit 856" "Not active,Active"
bitfld.long 0x00 23. "  ASB855  ,Active Status Bit 855" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB854  ,Active Status Bit 854" "Not active,Active"
bitfld.long 0x00 21. "  ASB853  ,Active Status Bit 853" "Not active,Active"
bitfld.long 0x00 20. "  ASB852  ,Active Status Bit 852" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB851  ,Active Status Bit 851" "Not active,Active"
bitfld.long 0x00 18. "  ASB850  ,Active Status Bit 850" "Not active,Active"
bitfld.long 0x00 17. "  ASB849  ,Active Status Bit 849" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB848  ,Active Status Bit 848" "Not active,Active"
bitfld.long 0x00 15. "  ASB847  ,Active Status Bit 847" "Not active,Active"
bitfld.long 0x00 14. "  ASB846  ,Active Status Bit 846" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB845  ,Active Status Bit 845" "Not active,Active"
bitfld.long 0x00 12. "  ASB844  ,Active Status Bit 844" "Not active,Active"
bitfld.long 0x00 11. "  ASB843  ,Active Status Bit 843" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB842  ,Active Status Bit 842" "Not active,Active"
bitfld.long 0x00 9. "  ASB841  ,Active Status Bit 841" "Not active,Active"
bitfld.long 0x00 8. "  ASB840  ,Active Status Bit 840" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB839  ,Active Status Bit 839" "Not active,Active"
bitfld.long 0x00 6. "  ASB838  ,Active Status Bit 838" "Not active,Active"
bitfld.long 0x00 5. "  ASB837  ,Active Status Bit 837" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB836  ,Active Status Bit 836" "Not active,Active"
bitfld.long 0x00 3. "  ASB835  ,Active Status Bit 835" "Not active,Active"
bitfld.long 0x00 2. "  ASB834  ,Active Status Bit 834" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB833  ,Active Status Bit 833" "Not active,Active"
bitfld.long 0x00 0. "  ASB832  ,Active Status Bit 832" "Not active,Active"
else
rgroup.long 0x0368++0x03
line.long 0x0 "GICD_ICDABR26,Active Status Register 26"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
rgroup.long 0x036C++0x03
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
bitfld.long 0x00 31. " ASB895  ,Active Status Bit 895" "Not active,Active"
bitfld.long 0x00 30. "  ASB894  ,Active Status Bit 894" "Not active,Active"
bitfld.long 0x00 29. "  ASB893  ,Active Status Bit 893" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB892  ,Active Status Bit 892" "Not active,Active"
bitfld.long 0x00 27. "  ASB891  ,Active Status Bit 891" "Not active,Active"
bitfld.long 0x00 26. "  ASB890  ,Active Status Bit 890" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB889  ,Active Status Bit 889" "Not active,Active"
bitfld.long 0x00 24. "  ASB888  ,Active Status Bit 888" "Not active,Active"
bitfld.long 0x00 23. "  ASB887  ,Active Status Bit 887" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB886  ,Active Status Bit 886" "Not active,Active"
bitfld.long 0x00 21. "  ASB885  ,Active Status Bit 885" "Not active,Active"
bitfld.long 0x00 20. "  ASB884  ,Active Status Bit 884" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB883  ,Active Status Bit 883" "Not active,Active"
bitfld.long 0x00 18. "  ASB882  ,Active Status Bit 882" "Not active,Active"
bitfld.long 0x00 17. "  ASB881  ,Active Status Bit 881" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB880  ,Active Status Bit 880" "Not active,Active"
bitfld.long 0x00 15. "  ASB879  ,Active Status Bit 879" "Not active,Active"
bitfld.long 0x00 14. "  ASB878  ,Active Status Bit 878" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB877  ,Active Status Bit 877" "Not active,Active"
bitfld.long 0x00 12. "  ASB876  ,Active Status Bit 876" "Not active,Active"
bitfld.long 0x00 11. "  ASB875  ,Active Status Bit 875" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB874  ,Active Status Bit 874" "Not active,Active"
bitfld.long 0x00 9. "  ASB873  ,Active Status Bit 873" "Not active,Active"
bitfld.long 0x00 8. "  ASB872  ,Active Status Bit 872" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB871  ,Active Status Bit 871" "Not active,Active"
bitfld.long 0x00 6. "  ASB870  ,Active Status Bit 870" "Not active,Active"
bitfld.long 0x00 5. "  ASB869  ,Active Status Bit 869" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB868  ,Active Status Bit 868" "Not active,Active"
bitfld.long 0x00 3. "  ASB867  ,Active Status Bit 867" "Not active,Active"
bitfld.long 0x00 2. "  ASB866  ,Active Status Bit 866" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB865  ,Active Status Bit 865" "Not active,Active"
bitfld.long 0x00 0. "  ASB864  ,Active Status Bit 864" "Not active,Active"
else
rgroup.long 0x036C++0x03
line.long 0x0 "GICD_ICDABR27,Active Status Register 27"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
rgroup.long 0x0370++0x03
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
bitfld.long 0x00 31. " ASB927  ,Active Status Bit 927" "Not active,Active"
bitfld.long 0x00 30. "  ASB926  ,Active Status Bit 926" "Not active,Active"
bitfld.long 0x00 29. "  ASB925  ,Active Status Bit 925" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB924  ,Active Status Bit 924" "Not active,Active"
bitfld.long 0x00 27. "  ASB923  ,Active Status Bit 923" "Not active,Active"
bitfld.long 0x00 26. "  ASB922  ,Active Status Bit 922" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB921  ,Active Status Bit 921" "Not active,Active"
bitfld.long 0x00 24. "  ASB920  ,Active Status Bit 920" "Not active,Active"
bitfld.long 0x00 23. "  ASB919  ,Active Status Bit 919" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB918  ,Active Status Bit 918" "Not active,Active"
bitfld.long 0x00 21. "  ASB917  ,Active Status Bit 917" "Not active,Active"
bitfld.long 0x00 20. "  ASB916  ,Active Status Bit 916" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB915  ,Active Status Bit 915" "Not active,Active"
bitfld.long 0x00 18. "  ASB914  ,Active Status Bit 914" "Not active,Active"
bitfld.long 0x00 17. "  ASB913  ,Active Status Bit 913" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB912  ,Active Status Bit 912" "Not active,Active"
bitfld.long 0x00 15. "  ASB911  ,Active Status Bit 911" "Not active,Active"
bitfld.long 0x00 14. "  ASB910  ,Active Status Bit 910" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB909  ,Active Status Bit 909" "Not active,Active"
bitfld.long 0x00 12. "  ASB908  ,Active Status Bit 908" "Not active,Active"
bitfld.long 0x00 11. "  ASB907  ,Active Status Bit 907" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB906  ,Active Status Bit 906" "Not active,Active"
bitfld.long 0x00 9. "  ASB905  ,Active Status Bit 905" "Not active,Active"
bitfld.long 0x00 8. "  ASB904  ,Active Status Bit 904" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB903  ,Active Status Bit 903" "Not active,Active"
bitfld.long 0x00 6. "  ASB902  ,Active Status Bit 902" "Not active,Active"
bitfld.long 0x00 5. "  ASB901  ,Active Status Bit 901" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB900  ,Active Status Bit 900" "Not active,Active"
bitfld.long 0x00 3. "  ASB899  ,Active Status Bit 899" "Not active,Active"
bitfld.long 0x00 2. "  ASB898  ,Active Status Bit 898" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB897  ,Active Status Bit 897" "Not active,Active"
bitfld.long 0x00 0. "  ASB896  ,Active Status Bit 896" "Not active,Active"
else
rgroup.long 0x0370++0x03
line.long 0x0 "GICD_ICDABR28,Active Status Register 28"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
rgroup.long 0x0374++0x03
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
bitfld.long 0x00 31. " ASB959  ,Active Status Bit 959" "Not active,Active"
bitfld.long 0x00 30. "  ASB958  ,Active Status Bit 958" "Not active,Active"
bitfld.long 0x00 29. "  ASB957  ,Active Status Bit 957" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB956  ,Active Status Bit 956" "Not active,Active"
bitfld.long 0x00 27. "  ASB955  ,Active Status Bit 955" "Not active,Active"
bitfld.long 0x00 26. "  ASB954  ,Active Status Bit 954" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB953  ,Active Status Bit 953" "Not active,Active"
bitfld.long 0x00 24. "  ASB952  ,Active Status Bit 952" "Not active,Active"
bitfld.long 0x00 23. "  ASB951  ,Active Status Bit 951" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB950  ,Active Status Bit 950" "Not active,Active"
bitfld.long 0x00 21. "  ASB949  ,Active Status Bit 949" "Not active,Active"
bitfld.long 0x00 20. "  ASB948  ,Active Status Bit 948" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB947  ,Active Status Bit 947" "Not active,Active"
bitfld.long 0x00 18. "  ASB946  ,Active Status Bit 946" "Not active,Active"
bitfld.long 0x00 17. "  ASB945  ,Active Status Bit 945" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB944  ,Active Status Bit 944" "Not active,Active"
bitfld.long 0x00 15. "  ASB943  ,Active Status Bit 943" "Not active,Active"
bitfld.long 0x00 14. "  ASB942  ,Active Status Bit 942" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB941  ,Active Status Bit 941" "Not active,Active"
bitfld.long 0x00 12. "  ASB940  ,Active Status Bit 940" "Not active,Active"
bitfld.long 0x00 11. "  ASB939  ,Active Status Bit 939" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB938  ,Active Status Bit 938" "Not active,Active"
bitfld.long 0x00 9. "  ASB937  ,Active Status Bit 937" "Not active,Active"
bitfld.long 0x00 8. "  ASB936  ,Active Status Bit 936" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB935  ,Active Status Bit 935" "Not active,Active"
bitfld.long 0x00 6. "  ASB934  ,Active Status Bit 934" "Not active,Active"
bitfld.long 0x00 5. "  ASB933  ,Active Status Bit 933" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB932  ,Active Status Bit 932" "Not active,Active"
bitfld.long 0x00 3. "  ASB931  ,Active Status Bit 931" "Not active,Active"
bitfld.long 0x00 2. "  ASB930  ,Active Status Bit 930" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB929  ,Active Status Bit 929" "Not active,Active"
bitfld.long 0x00 0. "  ASB928  ,Active Status Bit 928" "Not active,Active"
else
rgroup.long 0x0374++0x03
line.long 0x0 "GICD_ICDABR29,Active Status Register 29"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
rgroup.long 0x0378++0x03
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
bitfld.long 0x00 31. " ASB991  ,Active Status Bit 991" "Not active,Active"
bitfld.long 0x00 30. "  ASB990  ,Active Status Bit 990" "Not active,Active"
bitfld.long 0x00 29. "  ASB989  ,Active Status Bit 989" "Not active,Active"
textline "                                 "
bitfld.long 0x00 28. " ASB988  ,Active Status Bit 988" "Not active,Active"
bitfld.long 0x00 27. "  ASB987  ,Active Status Bit 987" "Not active,Active"
bitfld.long 0x00 26. "  ASB986  ,Active Status Bit 986" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB985  ,Active Status Bit 985" "Not active,Active"
bitfld.long 0x00 24. "  ASB984  ,Active Status Bit 984" "Not active,Active"
bitfld.long 0x00 23. "  ASB983  ,Active Status Bit 983" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB982  ,Active Status Bit 982" "Not active,Active"
bitfld.long 0x00 21. "  ASB981  ,Active Status Bit 981" "Not active,Active"
bitfld.long 0x00 20. "  ASB980  ,Active Status Bit 980" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB979  ,Active Status Bit 979" "Not active,Active"
bitfld.long 0x00 18. "  ASB978  ,Active Status Bit 978" "Not active,Active"
bitfld.long 0x00 17. "  ASB977  ,Active Status Bit 977" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB976  ,Active Status Bit 976" "Not active,Active"
bitfld.long 0x00 15. "  ASB975  ,Active Status Bit 975" "Not active,Active"
bitfld.long 0x00 14. "  ASB974  ,Active Status Bit 974" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB973  ,Active Status Bit 973" "Not active,Active"
bitfld.long 0x00 12. "  ASB972  ,Active Status Bit 972" "Not active,Active"
bitfld.long 0x00 11. "  ASB971  ,Active Status Bit 971" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB970  ,Active Status Bit 970" "Not active,Active"
bitfld.long 0x00 9. "  ASB969  ,Active Status Bit 969" "Not active,Active"
bitfld.long 0x00 8. "  ASB968  ,Active Status Bit 968" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB967  ,Active Status Bit 967" "Not active,Active"
bitfld.long 0x00 6. "  ASB966  ,Active Status Bit 966" "Not active,Active"
bitfld.long 0x00 5. "  ASB965  ,Active Status Bit 965" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB964  ,Active Status Bit 964" "Not active,Active"
bitfld.long 0x00 3. "  ASB963  ,Active Status Bit 963" "Not active,Active"
bitfld.long 0x00 2. "  ASB962  ,Active Status Bit 962" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB961  ,Active Status Bit 961" "Not active,Active"
bitfld.long 0x00 0. "  ASB960  ,Active Status Bit 960" "Not active,Active"
else
rgroup.long 0x0378++0x03
line.long 0x0 "GICD_ICDABR30,Active Status Register 30"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)==0x1F)
rgroup.long 0x037C++0x03
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active"
bitfld.long 0x00 26. "  ASB1018 ,Active Status Bit 1018" "Not active,Active"
textline "                                 "
bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active"
bitfld.long 0x00 24. "  ASB1016 ,Active Status Bit 1016" "Not active,Active"
bitfld.long 0x00 23. "  ASB1015 ,Active Status Bit 1015" "Not active,Active"
textline "                                 "
bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active"
bitfld.long 0x00 21. "  ASB1013 ,Active Status Bit 1013" "Not active,Active"
bitfld.long 0x00 20. "  ASB1012 ,Active Status Bit 1012" "Not active,Active"
textline "                                 "
bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active"
bitfld.long 0x00 18. "  ASB1010 ,Active Status Bit 1010" "Not active,Active"
bitfld.long 0x00 17. "  ASB1009 ,Active Status Bit 1009" "Not active,Active"
textline "                                 "
bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active"
bitfld.long 0x00 15. "  ASB1007 ,Active Status Bit 1007" "Not active,Active"
bitfld.long 0x00 14. "  ASB1006 ,Active Status Bit 1006" "Not active,Active"
textline "                                 "
bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active"
bitfld.long 0x00 12. "  ASB1004 ,Active Status Bit 1004" "Not active,Active"
bitfld.long 0x00 11. "  ASB1003 ,Active Status Bit 1003" "Not active,Active"
textline "                                 "
bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active"
bitfld.long 0x00 9. "  ASB1001 ,Active Status Bit 1001" "Not active,Active"
bitfld.long 0x00 8. "  ASB1000 ,Active Status Bit 1000" "Not active,Active"
textline "                                 "
bitfld.long 0x00 7. " ASB999  ,Active Status Bit 999" "Not active,Active"
bitfld.long 0x00 6. "  ASB998  ,Active Status Bit 998" "Not active,Active"
bitfld.long 0x00 5. "  ASB997  ,Active Status Bit 997" "Not active,Active"
textline "                                 "
bitfld.long 0x00 4. " ASB996  ,Active Status Bit 996" "Not active,Active"
bitfld.long 0x00 3. "  ASB995  ,Active Status Bit 995" "Not active,Active"
bitfld.long 0x00 2. "  ASB994  ,Active Status Bit 994" "Not active,Active"
textline "                                 "
bitfld.long 0x00 1. " ASB993  ,Active Status Bit 993" "Not active,Active"
bitfld.long 0x00 0. "  ASB992  ,Active Status Bit 992" "Not active,Active"
else
rgroup.long 0x037C++0x03
line.long 0x0 "GICD_ICDABR31,Active Status Register 31"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
else
group.long 0x0300++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31  ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE30  ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE29  ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28  ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE27  ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE26  ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25  ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE24  ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE23  ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22  ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE21  ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE20  ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19  ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE18  ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE17  ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16  ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE15  ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE14  ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13  ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE12  ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE11  ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10  ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE9   ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE8   ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7   ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE6   ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE5   ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4   ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE3   ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE2   ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1   ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE0   ,Set/Clear Active Bit 0" "Not active,Active"
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63  ,Set/Clear Active Bit 63" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE62  ,Set/Clear Active Bit 62" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE61  ,Set/Clear Active Bit 61" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60  ,Set/Clear Active Bit 60" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE59  ,Set/Clear Active Bit 59" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE58  ,Set/Clear Active Bit 58" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57  ,Set/Clear Active Bit 57" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE56  ,Set/Clear Active Bit 56" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE55  ,Set/Clear Active Bit 55" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54  ,Set/Clear Active Bit 54" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE53  ,Set/Clear Active Bit 53" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE52  ,Set/Clear Active Bit 52" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51  ,Set/Clear Active Bit 51" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE50  ,Set/Clear Active Bit 50" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE49  ,Set/Clear Active Bit 49" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48  ,Set/Clear Active Bit 48" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE47  ,Set/Clear Active Bit 47" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE46  ,Set/Clear Active Bit 46" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45  ,Set/Clear Active Bit 45" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE44  ,Set/Clear Active Bit 44" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE43  ,Set/Clear Active Bit 43" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42  ,Set/Clear Active Bit 42" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE41  ,Set/Clear Active Bit 41" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE40  ,Set/Clear Active Bit 40" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39  ,Set/Clear Active Bit 39" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE38  ,Set/Clear Active Bit 38" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE37  ,Set/Clear Active Bit 37" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36  ,Set/Clear Active Bit 36" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE35  ,Set/Clear Active Bit 35" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE34  ,Set/Clear Active Bit 34" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33  ,Set/Clear Active Bit 33" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE32  ,Set/Clear Active Bit 32" "Not active,Active"
else
rgroup.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95  ,Set/Clear Active Bit 95" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE94  ,Set/Clear Active Bit 94" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE93  ,Set/Clear Active Bit 93" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92  ,Set/Clear Active Bit 92" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE91  ,Set/Clear Active Bit 91" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE90  ,Set/Clear Active Bit 90" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89  ,Set/Clear Active Bit 89" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE88  ,Set/Clear Active Bit 88" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE87  ,Set/Clear Active Bit 87" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86  ,Set/Clear Active Bit 86" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE85  ,Set/Clear Active Bit 85" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE84  ,Set/Clear Active Bit 84" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83  ,Set/Clear Active Bit 83" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE82  ,Set/Clear Active Bit 82" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE81  ,Set/Clear Active Bit 81" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80  ,Set/Clear Active Bit 80" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE79  ,Set/Clear Active Bit 79" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE78  ,Set/Clear Active Bit 78" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77  ,Set/Clear Active Bit 77" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE76  ,Set/Clear Active Bit 76" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE75  ,Set/Clear Active Bit 75" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74  ,Set/Clear Active Bit 74" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE73  ,Set/Clear Active Bit 73" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE72  ,Set/Clear Active Bit 72" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71  ,Set/Clear Active Bit 71" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE70  ,Set/Clear Active Bit 70" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE69  ,Set/Clear Active Bit 69" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68  ,Set/Clear Active Bit 68" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE67  ,Set/Clear Active Bit 67" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE66  ,Set/Clear Active Bit 66" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65  ,Set/Clear Active Bit 65" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE64  ,Set/Clear Active Bit 64" "Not active,Active"
else
rgroup.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE99  ,Set/Clear Active Bit 99" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE98  ,Set/Clear Active Bit 98" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97  ,Set/Clear Active Bit 97" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE96  ,Set/Clear Active Bit 96" "Not active,Active"
else
rgroup.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
else
rgroup.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
else
rgroup.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
else
rgroup.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
else
rgroup.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
else
rgroup.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
else
rgroup.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
else
rgroup.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
else
rgroup.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
else
rgroup.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
else
rgroup.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
else
rgroup.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
else
rgroup.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
rgroup.long 0x0340++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0344++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0348++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x034C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0350++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0354++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0358++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x035C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0360++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0364++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0368++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x036C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0370++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0374++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x0378++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
rgroup.long 0x037C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31"
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
textline "                                 "
endif
tree.end
tree "Priority Registers"
group.long 0x400++0x03
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID2    ,Interrupt ID2     Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID0    ,Interrupt ID0     Priority/Priority Byte Offset 0   "
group.long 0x404++0x03
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID6    ,Interrupt ID6     Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID4    ,Interrupt ID4     Priority/Priority Byte Offset 4   "
group.long 0x408++0x03
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID10   ,Interrupt ID10    Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID8    ,Interrupt ID8     Priority/Priority Byte Offset 8   "
group.long 0x40C++0x03
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID14   ,Interrupt ID14    Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID12   ,Interrupt ID12    Priority/Priority Byte Offset 12  "
group.long 0x410++0x03
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID18   ,Interrupt ID18    Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID16   ,Interrupt ID16    Priority/Priority Byte Offset 16  "
group.long 0x414++0x03
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID22   ,Interrupt ID22    Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID20   ,Interrupt ID20    Priority/Priority Byte Offset 20  "
group.long 0x418++0x03
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID26   ,Interrupt ID26    Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID24   ,Interrupt ID24    Priority/Priority Byte Offset 24  "
group.long 0x41C++0x03
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID30   ,Interrupt ID30    Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID28   ,Interrupt ID28    Priority/Priority Byte Offset 28  "
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hexmask.long.byte 0x00 24.--31. 1. " INTID35   ,Interrupt ID35   Priority/Priority Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID34   ,Interrupt ID34    Priority/Priority Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID33   ,Interrupt ID33   Priority/Priority Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID32   ,Interrupt ID32    Priority/Priority Byte Offset 32  "
group.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hexmask.long.byte 0x00 24.--31. 1. " INTID39   ,Interrupt ID39   Priority/Priority Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID38   ,Interrupt ID38    Priority/Priority Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID37   ,Interrupt ID37   Priority/Priority Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID36   ,Interrupt ID36    Priority/Priority Byte Offset 36  "
group.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hexmask.long.byte 0x00 24.--31. 1. " INTID43   ,Interrupt ID43   Priority/Priority Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID42   ,Interrupt ID42    Priority/Priority Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID41   ,Interrupt ID41   Priority/Priority Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID40   ,Interrupt ID40    Priority/Priority Byte Offset 40  "
group.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hexmask.long.byte 0x00 24.--31. 1. " INTID47   ,Interrupt ID47   Priority/Priority Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID46   ,Interrupt ID46    Priority/Priority Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID45   ,Interrupt ID45   Priority/Priority Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID44   ,Interrupt ID44    Priority/Priority Byte Offset 44  "
group.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hexmask.long.byte 0x00 24.--31. 1. " INTID51   ,Interrupt ID51   Priority/Priority Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID50   ,Interrupt ID50    Priority/Priority Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID49   ,Interrupt ID49   Priority/Priority Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID48   ,Interrupt ID48    Priority/Priority Byte Offset 48  "
group.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hexmask.long.byte 0x00 24.--31. 1. " INTID55   ,Interrupt ID55   Priority/Priority Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID54   ,Interrupt ID54    Priority/Priority Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID53   ,Interrupt ID53   Priority/Priority Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID52   ,Interrupt ID52    Priority/Priority Byte Offset 52  "
group.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hexmask.long.byte 0x00 24.--31. 1. " INTID59   ,Interrupt ID59   Priority/Priority Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID58   ,Interrupt ID58    Priority/Priority Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID57   ,Interrupt ID57   Priority/Priority Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID56   ,Interrupt ID56    Priority/Priority Byte Offset 56  "
group.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
hexmask.long.byte 0x00 24.--31. 1. " INTID63   ,Interrupt ID63   Priority/Priority Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID62   ,Interrupt ID62    Priority/Priority Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID61   ,Interrupt ID61   Priority/Priority Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID60   ,Interrupt ID60    Priority/Priority Byte Offset 60  "
else
rgroup.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
rgroup.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
rgroup.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
rgroup.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
rgroup.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
rgroup.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
rgroup.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
rgroup.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hexmask.long.byte 0x00 24.--31. 1. " INTID67   ,Interrupt ID67   Priority/Priority Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID66   ,Interrupt ID66    Priority/Priority Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID65   ,Interrupt ID65   Priority/Priority Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID64   ,Interrupt ID64    Priority/Priority Byte Offset 64  "
group.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hexmask.long.byte 0x00 24.--31. 1. " INTID71   ,Interrupt ID71   Priority/Priority Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID70   ,Interrupt ID70    Priority/Priority Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID69   ,Interrupt ID69   Priority/Priority Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID68   ,Interrupt ID68    Priority/Priority Byte Offset 68  "
group.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hexmask.long.byte 0x00 24.--31. 1. " INTID75   ,Interrupt ID75   Priority/Priority Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID74   ,Interrupt ID74    Priority/Priority Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID73   ,Interrupt ID73   Priority/Priority Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID72   ,Interrupt ID72    Priority/Priority Byte Offset 72  "
group.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hexmask.long.byte 0x00 24.--31. 1. " INTID79   ,Interrupt ID79   Priority/Priority Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID78   ,Interrupt ID78    Priority/Priority Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID77   ,Interrupt ID77   Priority/Priority Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID76   ,Interrupt ID76    Priority/Priority Byte Offset 76  "
group.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hexmask.long.byte 0x00 24.--31. 1. " INTID83   ,Interrupt ID83   Priority/Priority Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID82   ,Interrupt ID82    Priority/Priority Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID81   ,Interrupt ID81   Priority/Priority Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID80   ,Interrupt ID80    Priority/Priority Byte Offset 80  "
group.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hexmask.long.byte 0x00 24.--31. 1. " INTID87   ,Interrupt ID87   Priority/Priority Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID86   ,Interrupt ID86    Priority/Priority Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID85   ,Interrupt ID85   Priority/Priority Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID84   ,Interrupt ID84    Priority/Priority Byte Offset 84  "
group.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hexmask.long.byte 0x00 24.--31. 1. " INTID91   ,Interrupt ID91   Priority/Priority Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID90   ,Interrupt ID90    Priority/Priority Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID89   ,Interrupt ID89   Priority/Priority Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID88   ,Interrupt ID88    Priority/Priority Byte Offset 88  "
group.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
hexmask.long.byte 0x00 24.--31. 1. " INTID95   ,Interrupt ID95   Priority/Priority Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID94   ,Interrupt ID94    Priority/Priority Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID93   ,Interrupt ID93   Priority/Priority Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID92   ,Interrupt ID92    Priority/Priority Byte Offset 92  "
else
rgroup.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
rgroup.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
rgroup.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
rgroup.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
rgroup.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
rgroup.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
rgroup.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
rgroup.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hexmask.long.byte 0x00 24.--31. 1. " INTID99   ,Interrupt ID99   Priority/Priority Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID98   ,Interrupt ID98    Priority/Priority Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID97   ,Interrupt ID97   Priority/Priority Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID96   ,Interrupt ID96    Priority/Priority Byte Offset 96  "
group.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hexmask.long.byte 0x00 24.--31. 1. " INTID103  ,Interrupt ID103  Priority/Priority Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID102  ,Interrupt ID102   Priority/Priority Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID101  ,Interrupt ID101  Priority/Priority Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID100  ,Interrupt ID100   Priority/Priority Byte Offset 100 "
group.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hexmask.long.byte 0x00 24.--31. 1. " INTID107  ,Interrupt ID107  Priority/Priority Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID106  ,Interrupt ID106   Priority/Priority Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID105  ,Interrupt ID105  Priority/Priority Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID104  ,Interrupt ID104   Priority/Priority Byte Offset 104 "
group.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hexmask.long.byte 0x00 24.--31. 1. " INTID111  ,Interrupt ID111  Priority/Priority Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID110  ,Interrupt ID110   Priority/Priority Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID109  ,Interrupt ID109  Priority/Priority Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID108  ,Interrupt ID108   Priority/Priority Byte Offset 108 "
group.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hexmask.long.byte 0x00 24.--31. 1. " INTID115  ,Interrupt ID115  Priority/Priority Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID114  ,Interrupt ID114   Priority/Priority Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID113  ,Interrupt ID113  Priority/Priority Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID112  ,Interrupt ID112   Priority/Priority Byte Offset 112 "
group.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hexmask.long.byte 0x00 24.--31. 1. " INTID119  ,Interrupt ID119  Priority/Priority Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID118  ,Interrupt ID118   Priority/Priority Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID117  ,Interrupt ID117  Priority/Priority Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID116  ,Interrupt ID116   Priority/Priority Byte Offset 116 "
group.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hexmask.long.byte 0x00 24.--31. 1. " INTID123  ,Interrupt ID123  Priority/Priority Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID122  ,Interrupt ID122   Priority/Priority Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID121  ,Interrupt ID121  Priority/Priority Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID120  ,Interrupt ID120   Priority/Priority Byte Offset 120 "
group.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
hexmask.long.byte 0x00 24.--31. 1. " INTID127  ,Interrupt ID127  Priority/Priority Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID126  ,Interrupt ID126   Priority/Priority Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID125  ,Interrupt ID125  Priority/Priority Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID124  ,Interrupt ID124   Priority/Priority Byte Offset 124 "
else
rgroup.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
rgroup.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
rgroup.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
rgroup.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
rgroup.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
rgroup.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
rgroup.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
rgroup.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hexmask.long.byte 0x00 24.--31. 1. " INTID131  ,Interrupt ID131  Priority/Priority Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID130  ,Interrupt ID130   Priority/Priority Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID129  ,Interrupt ID129  Priority/Priority Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID128  ,Interrupt ID128   Priority/Priority Byte Offset 128 "
group.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hexmask.long.byte 0x00 24.--31. 1. " INTID135  ,Interrupt ID135  Priority/Priority Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID134  ,Interrupt ID134   Priority/Priority Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID133  ,Interrupt ID133  Priority/Priority Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID132  ,Interrupt ID132   Priority/Priority Byte Offset 132 "
group.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hexmask.long.byte 0x00 24.--31. 1. " INTID139  ,Interrupt ID139  Priority/Priority Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID138  ,Interrupt ID138   Priority/Priority Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID137  ,Interrupt ID137  Priority/Priority Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID136  ,Interrupt ID136   Priority/Priority Byte Offset 136 "
group.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hexmask.long.byte 0x00 24.--31. 1. " INTID143  ,Interrupt ID143  Priority/Priority Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID142  ,Interrupt ID142   Priority/Priority Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID141  ,Interrupt ID141  Priority/Priority Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID140  ,Interrupt ID140   Priority/Priority Byte Offset 140 "
group.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hexmask.long.byte 0x00 24.--31. 1. " INTID147  ,Interrupt ID147  Priority/Priority Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID146  ,Interrupt ID146   Priority/Priority Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID145  ,Interrupt ID145  Priority/Priority Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID144  ,Interrupt ID144   Priority/Priority Byte Offset 144 "
group.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hexmask.long.byte 0x00 24.--31. 1. " INTID151  ,Interrupt ID151  Priority/Priority Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID150  ,Interrupt ID150   Priority/Priority Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID149  ,Interrupt ID149  Priority/Priority Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID148  ,Interrupt ID148   Priority/Priority Byte Offset 148 "
group.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hexmask.long.byte 0x00 24.--31. 1. " INTID155  ,Interrupt ID155  Priority/Priority Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID154  ,Interrupt ID154   Priority/Priority Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID153  ,Interrupt ID153  Priority/Priority Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID152  ,Interrupt ID152   Priority/Priority Byte Offset 152 "
group.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
hexmask.long.byte 0x00 24.--31. 1. " INTID159  ,Interrupt ID159  Priority/Priority Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID158  ,Interrupt ID158   Priority/Priority Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID157  ,Interrupt ID157  Priority/Priority Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID156  ,Interrupt ID156   Priority/Priority Byte Offset 156 "
else
rgroup.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
rgroup.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
rgroup.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
rgroup.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
rgroup.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
rgroup.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
rgroup.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
rgroup.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hexmask.long.byte 0x00 24.--31. 1. " INTID163  ,Interrupt ID163  Priority/Priority Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID162  ,Interrupt ID162   Priority/Priority Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID161  ,Interrupt ID161  Priority/Priority Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID160  ,Interrupt ID160   Priority/Priority Byte Offset 160 "
group.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hexmask.long.byte 0x00 24.--31. 1. " INTID167  ,Interrupt ID167  Priority/Priority Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID166  ,Interrupt ID166   Priority/Priority Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID165  ,Interrupt ID165  Priority/Priority Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID164  ,Interrupt ID164   Priority/Priority Byte Offset 164 "
group.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hexmask.long.byte 0x00 24.--31. 1. " INTID171  ,Interrupt ID171  Priority/Priority Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID170  ,Interrupt ID170   Priority/Priority Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID169  ,Interrupt ID169  Priority/Priority Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID168  ,Interrupt ID168   Priority/Priority Byte Offset 168 "
group.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hexmask.long.byte 0x00 24.--31. 1. " INTID175  ,Interrupt ID175  Priority/Priority Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID174  ,Interrupt ID174   Priority/Priority Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID173  ,Interrupt ID173  Priority/Priority Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID172  ,Interrupt ID172   Priority/Priority Byte Offset 172 "
group.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hexmask.long.byte 0x00 24.--31. 1. " INTID179  ,Interrupt ID179  Priority/Priority Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID178  ,Interrupt ID178   Priority/Priority Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID177  ,Interrupt ID177  Priority/Priority Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID176  ,Interrupt ID176   Priority/Priority Byte Offset 176 "
group.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hexmask.long.byte 0x00 24.--31. 1. " INTID183  ,Interrupt ID183  Priority/Priority Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID182  ,Interrupt ID182   Priority/Priority Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID181  ,Interrupt ID181  Priority/Priority Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID180  ,Interrupt ID180   Priority/Priority Byte Offset 180 "
group.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hexmask.long.byte 0x00 24.--31. 1. " INTID187  ,Interrupt ID187  Priority/Priority Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID186  ,Interrupt ID186   Priority/Priority Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID185  ,Interrupt ID185  Priority/Priority Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID184  ,Interrupt ID184   Priority/Priority Byte Offset 184 "
group.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
hexmask.long.byte 0x00 24.--31. 1. " INTID191  ,Interrupt ID191  Priority/Priority Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID190  ,Interrupt ID190   Priority/Priority Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID189  ,Interrupt ID189  Priority/Priority Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID188  ,Interrupt ID188   Priority/Priority Byte Offset 188 "
else
rgroup.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
rgroup.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
rgroup.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
rgroup.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
rgroup.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
rgroup.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
rgroup.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
rgroup.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hexmask.long.byte 0x00 24.--31. 1. " INTID195  ,Interrupt ID195  Priority/Priority Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID194  ,Interrupt ID194   Priority/Priority Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID193  ,Interrupt ID193  Priority/Priority Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID192  ,Interrupt ID192   Priority/Priority Byte Offset 192 "
group.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hexmask.long.byte 0x00 24.--31. 1. " INTID199  ,Interrupt ID199  Priority/Priority Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID198  ,Interrupt ID198   Priority/Priority Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID197  ,Interrupt ID197  Priority/Priority Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID196  ,Interrupt ID196   Priority/Priority Byte Offset 196 "
group.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hexmask.long.byte 0x00 24.--31. 1. " INTID203  ,Interrupt ID203  Priority/Priority Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID202  ,Interrupt ID202   Priority/Priority Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID201  ,Interrupt ID201  Priority/Priority Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID200  ,Interrupt ID200   Priority/Priority Byte Offset 200 "
group.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hexmask.long.byte 0x00 24.--31. 1. " INTID207  ,Interrupt ID207  Priority/Priority Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID206  ,Interrupt ID206   Priority/Priority Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID205  ,Interrupt ID205  Priority/Priority Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID204  ,Interrupt ID204   Priority/Priority Byte Offset 204 "
group.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hexmask.long.byte 0x00 24.--31. 1. " INTID211  ,Interrupt ID211  Priority/Priority Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID210  ,Interrupt ID210   Priority/Priority Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID209  ,Interrupt ID209  Priority/Priority Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID208  ,Interrupt ID208   Priority/Priority Byte Offset 208 "
group.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hexmask.long.byte 0x00 24.--31. 1. " INTID215  ,Interrupt ID215  Priority/Priority Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID214  ,Interrupt ID214   Priority/Priority Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID213  ,Interrupt ID213  Priority/Priority Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID212  ,Interrupt ID212   Priority/Priority Byte Offset 212 "
group.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hexmask.long.byte 0x00 24.--31. 1. " INTID219  ,Interrupt ID219  Priority/Priority Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID218  ,Interrupt ID218   Priority/Priority Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID217  ,Interrupt ID217  Priority/Priority Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID216  ,Interrupt ID216   Priority/Priority Byte Offset 216 "
group.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
hexmask.long.byte 0x00 24.--31. 1. " INTID223  ,Interrupt ID223  Priority/Priority Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID222  ,Interrupt ID222   Priority/Priority Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID221  ,Interrupt ID221  Priority/Priority Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID220  ,Interrupt ID220   Priority/Priority Byte Offset 220 "
else
rgroup.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
rgroup.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
rgroup.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
rgroup.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
rgroup.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
rgroup.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
rgroup.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
rgroup.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hexmask.long.byte 0x00 24.--31. 1. " INTID227  ,Interrupt ID227  Priority/Priority Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID226  ,Interrupt ID226   Priority/Priority Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID225  ,Interrupt ID225  Priority/Priority Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID224  ,Interrupt ID224   Priority/Priority Byte Offset 224 "
group.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hexmask.long.byte 0x00 24.--31. 1. " INTID231  ,Interrupt ID231  Priority/Priority Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID230  ,Interrupt ID230   Priority/Priority Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID229  ,Interrupt ID229  Priority/Priority Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID228  ,Interrupt ID228   Priority/Priority Byte Offset 228 "
group.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hexmask.long.byte 0x00 24.--31. 1. " INTID235  ,Interrupt ID235  Priority/Priority Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID234  ,Interrupt ID234   Priority/Priority Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID233  ,Interrupt ID233  Priority/Priority Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID232  ,Interrupt ID232   Priority/Priority Byte Offset 232 "
group.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hexmask.long.byte 0x00 24.--31. 1. " INTID239  ,Interrupt ID239  Priority/Priority Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID238  ,Interrupt ID238   Priority/Priority Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID237  ,Interrupt ID237  Priority/Priority Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID236  ,Interrupt ID236   Priority/Priority Byte Offset 236 "
group.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hexmask.long.byte 0x00 24.--31. 1. " INTID243  ,Interrupt ID243  Priority/Priority Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID242  ,Interrupt ID242   Priority/Priority Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID241  ,Interrupt ID241  Priority/Priority Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID240  ,Interrupt ID240   Priority/Priority Byte Offset 240 "
group.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hexmask.long.byte 0x00 24.--31. 1. " INTID247  ,Interrupt ID247  Priority/Priority Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID246  ,Interrupt ID246   Priority/Priority Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID245  ,Interrupt ID245  Priority/Priority Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID244  ,Interrupt ID244   Priority/Priority Byte Offset 244 "
group.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hexmask.long.byte 0x00 24.--31. 1. " INTID251  ,Interrupt ID251  Priority/Priority Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID250  ,Interrupt ID250   Priority/Priority Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID249  ,Interrupt ID249  Priority/Priority Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID248  ,Interrupt ID248   Priority/Priority Byte Offset 248 "
group.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
hexmask.long.byte 0x00 24.--31. 1. " INTID255  ,Interrupt ID255  Priority/Priority Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID254  ,Interrupt ID254   Priority/Priority Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID253  ,Interrupt ID253  Priority/Priority Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID252  ,Interrupt ID252   Priority/Priority Byte Offset 252 "
else
rgroup.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
rgroup.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
rgroup.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
rgroup.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
rgroup.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
rgroup.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
rgroup.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
rgroup.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hexmask.long.byte 0x00 24.--31. 1. " INTID259  ,Interrupt ID259  Priority/Priority Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID258  ,Interrupt ID258   Priority/Priority Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID257  ,Interrupt ID257  Priority/Priority Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID256  ,Interrupt ID256   Priority/Priority Byte Offset 256 "
group.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hexmask.long.byte 0x00 24.--31. 1. " INTID263  ,Interrupt ID263  Priority/Priority Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID262  ,Interrupt ID262   Priority/Priority Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID261  ,Interrupt ID261  Priority/Priority Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID260  ,Interrupt ID260   Priority/Priority Byte Offset 260 "
group.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hexmask.long.byte 0x00 24.--31. 1. " INTID267  ,Interrupt ID267  Priority/Priority Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID266  ,Interrupt ID266   Priority/Priority Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID265  ,Interrupt ID265  Priority/Priority Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID264  ,Interrupt ID264   Priority/Priority Byte Offset 264 "
group.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hexmask.long.byte 0x00 24.--31. 1. " INTID271  ,Interrupt ID271  Priority/Priority Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID270  ,Interrupt ID270   Priority/Priority Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID269  ,Interrupt ID269  Priority/Priority Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID268  ,Interrupt ID268   Priority/Priority Byte Offset 268 "
group.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hexmask.long.byte 0x00 24.--31. 1. " INTID275  ,Interrupt ID275  Priority/Priority Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID274  ,Interrupt ID274   Priority/Priority Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID273  ,Interrupt ID273  Priority/Priority Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID272  ,Interrupt ID272   Priority/Priority Byte Offset 272 "
group.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hexmask.long.byte 0x00 24.--31. 1. " INTID279  ,Interrupt ID279  Priority/Priority Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID278  ,Interrupt ID278   Priority/Priority Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID277  ,Interrupt ID277  Priority/Priority Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID276  ,Interrupt ID276   Priority/Priority Byte Offset 276 "
group.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hexmask.long.byte 0x00 24.--31. 1. " INTID283  ,Interrupt ID283  Priority/Priority Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID282  ,Interrupt ID282   Priority/Priority Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID281  ,Interrupt ID281  Priority/Priority Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID280  ,Interrupt ID280   Priority/Priority Byte Offset 280 "
group.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
hexmask.long.byte 0x00 24.--31. 1. " INTID287  ,Interrupt ID287  Priority/Priority Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID286  ,Interrupt ID286   Priority/Priority Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID285  ,Interrupt ID285  Priority/Priority Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID284  ,Interrupt ID284   Priority/Priority Byte Offset 284 "
else
rgroup.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
rgroup.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
rgroup.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
rgroup.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
rgroup.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
rgroup.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
rgroup.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
rgroup.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hexmask.long.byte 0x00 24.--31. 1. " INTID291  ,Interrupt ID291  Priority/Priority Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID290  ,Interrupt ID290   Priority/Priority Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID289  ,Interrupt ID289  Priority/Priority Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID288  ,Interrupt ID288   Priority/Priority Byte Offset 288 "
group.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hexmask.long.byte 0x00 24.--31. 1. " INTID295  ,Interrupt ID295  Priority/Priority Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID294  ,Interrupt ID294   Priority/Priority Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID293  ,Interrupt ID293  Priority/Priority Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID292  ,Interrupt ID292   Priority/Priority Byte Offset 292 "
group.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hexmask.long.byte 0x00 24.--31. 1. " INTID299  ,Interrupt ID299  Priority/Priority Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID298  ,Interrupt ID298   Priority/Priority Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID297  ,Interrupt ID297  Priority/Priority Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID296  ,Interrupt ID296   Priority/Priority Byte Offset 296 "
group.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hexmask.long.byte 0x00 24.--31. 1. " INTID303  ,Interrupt ID303  Priority/Priority Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID302  ,Interrupt ID302   Priority/Priority Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID301  ,Interrupt ID301  Priority/Priority Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID300  ,Interrupt ID300   Priority/Priority Byte Offset 300 "
group.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hexmask.long.byte 0x00 24.--31. 1. " INTID307  ,Interrupt ID307  Priority/Priority Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID306  ,Interrupt ID306   Priority/Priority Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID305  ,Interrupt ID305  Priority/Priority Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID304  ,Interrupt ID304   Priority/Priority Byte Offset 304 "
group.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hexmask.long.byte 0x00 24.--31. 1. " INTID311  ,Interrupt ID311  Priority/Priority Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID310  ,Interrupt ID310   Priority/Priority Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID309  ,Interrupt ID309  Priority/Priority Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID308  ,Interrupt ID308   Priority/Priority Byte Offset 308 "
group.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hexmask.long.byte 0x00 24.--31. 1. " INTID315  ,Interrupt ID315  Priority/Priority Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID314  ,Interrupt ID314   Priority/Priority Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID313  ,Interrupt ID313  Priority/Priority Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID312  ,Interrupt ID312   Priority/Priority Byte Offset 312 "
group.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
hexmask.long.byte 0x00 24.--31. 1. " INTID319  ,Interrupt ID319  Priority/Priority Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID318  ,Interrupt ID318   Priority/Priority Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID317  ,Interrupt ID317  Priority/Priority Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID316  ,Interrupt ID316   Priority/Priority Byte Offset 316 "
else
rgroup.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
rgroup.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
rgroup.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
rgroup.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
rgroup.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
rgroup.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
rgroup.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
rgroup.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hexmask.long.byte 0x00 24.--31. 1. " INTID323  ,Interrupt ID323  Priority/Priority Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID322  ,Interrupt ID322   Priority/Priority Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID321  ,Interrupt ID321  Priority/Priority Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID320  ,Interrupt ID320   Priority/Priority Byte Offset 320 "
group.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hexmask.long.byte 0x00 24.--31. 1. " INTID327  ,Interrupt ID327  Priority/Priority Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID326  ,Interrupt ID326   Priority/Priority Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID325  ,Interrupt ID325  Priority/Priority Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID324  ,Interrupt ID324   Priority/Priority Byte Offset 324 "
group.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hexmask.long.byte 0x00 24.--31. 1. " INTID331  ,Interrupt ID331  Priority/Priority Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID330  ,Interrupt ID330   Priority/Priority Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID329  ,Interrupt ID329  Priority/Priority Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID328  ,Interrupt ID328   Priority/Priority Byte Offset 328 "
group.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hexmask.long.byte 0x00 24.--31. 1. " INTID335  ,Interrupt ID335  Priority/Priority Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID334  ,Interrupt ID334   Priority/Priority Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID333  ,Interrupt ID333  Priority/Priority Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID332  ,Interrupt ID332   Priority/Priority Byte Offset 332 "
group.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hexmask.long.byte 0x00 24.--31. 1. " INTID339  ,Interrupt ID339  Priority/Priority Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID338  ,Interrupt ID338   Priority/Priority Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID337  ,Interrupt ID337  Priority/Priority Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID336  ,Interrupt ID336   Priority/Priority Byte Offset 336 "
group.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hexmask.long.byte 0x00 24.--31. 1. " INTID343  ,Interrupt ID343  Priority/Priority Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID342  ,Interrupt ID342   Priority/Priority Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID341  ,Interrupt ID341  Priority/Priority Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID340  ,Interrupt ID340   Priority/Priority Byte Offset 340 "
group.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hexmask.long.byte 0x00 24.--31. 1. " INTID347  ,Interrupt ID347  Priority/Priority Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID346  ,Interrupt ID346   Priority/Priority Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID345  ,Interrupt ID345  Priority/Priority Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID344  ,Interrupt ID344   Priority/Priority Byte Offset 344 "
group.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
hexmask.long.byte 0x00 24.--31. 1. " INTID351  ,Interrupt ID351  Priority/Priority Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID350  ,Interrupt ID350   Priority/Priority Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID349  ,Interrupt ID349  Priority/Priority Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID348  ,Interrupt ID348   Priority/Priority Byte Offset 348 "
else
rgroup.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
rgroup.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
rgroup.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
rgroup.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
rgroup.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
rgroup.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
rgroup.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
rgroup.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hexmask.long.byte 0x00 24.--31. 1. " INTID355  ,Interrupt ID355  Priority/Priority Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID354  ,Interrupt ID354   Priority/Priority Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID353  ,Interrupt ID353  Priority/Priority Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID352  ,Interrupt ID352   Priority/Priority Byte Offset 352 "
group.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hexmask.long.byte 0x00 24.--31. 1. " INTID359  ,Interrupt ID359  Priority/Priority Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID358  ,Interrupt ID358   Priority/Priority Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID357  ,Interrupt ID357  Priority/Priority Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID356  ,Interrupt ID356   Priority/Priority Byte Offset 356 "
group.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hexmask.long.byte 0x00 24.--31. 1. " INTID363  ,Interrupt ID363  Priority/Priority Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID362  ,Interrupt ID362   Priority/Priority Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID361  ,Interrupt ID361  Priority/Priority Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID360  ,Interrupt ID360   Priority/Priority Byte Offset 360 "
group.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hexmask.long.byte 0x00 24.--31. 1. " INTID367  ,Interrupt ID367  Priority/Priority Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID366  ,Interrupt ID366   Priority/Priority Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID365  ,Interrupt ID365  Priority/Priority Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID364  ,Interrupt ID364   Priority/Priority Byte Offset 364 "
group.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hexmask.long.byte 0x00 24.--31. 1. " INTID371  ,Interrupt ID371  Priority/Priority Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID370  ,Interrupt ID370   Priority/Priority Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID369  ,Interrupt ID369  Priority/Priority Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID368  ,Interrupt ID368   Priority/Priority Byte Offset 368 "
group.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hexmask.long.byte 0x00 24.--31. 1. " INTID375  ,Interrupt ID375  Priority/Priority Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID374  ,Interrupt ID374   Priority/Priority Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID373  ,Interrupt ID373  Priority/Priority Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID372  ,Interrupt ID372   Priority/Priority Byte Offset 372 "
group.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hexmask.long.byte 0x00 24.--31. 1. " INTID379  ,Interrupt ID379  Priority/Priority Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID378  ,Interrupt ID378   Priority/Priority Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID377  ,Interrupt ID377  Priority/Priority Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID376  ,Interrupt ID376   Priority/Priority Byte Offset 376 "
group.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
hexmask.long.byte 0x00 24.--31. 1. " INTID383  ,Interrupt ID383  Priority/Priority Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID382  ,Interrupt ID382   Priority/Priority Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID381  ,Interrupt ID381  Priority/Priority Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID380  ,Interrupt ID380   Priority/Priority Byte Offset 380 "
else
rgroup.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
rgroup.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
rgroup.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
rgroup.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
rgroup.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
rgroup.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
rgroup.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
rgroup.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hexmask.long.byte 0x00 24.--31. 1. " INTID387  ,Interrupt ID387  Priority/Priority Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID386  ,Interrupt ID386   Priority/Priority Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID385  ,Interrupt ID385  Priority/Priority Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID384  ,Interrupt ID384   Priority/Priority Byte Offset 384 "
group.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hexmask.long.byte 0x00 24.--31. 1. " INTID391  ,Interrupt ID391  Priority/Priority Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID390  ,Interrupt ID390   Priority/Priority Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID389  ,Interrupt ID389  Priority/Priority Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID388  ,Interrupt ID388   Priority/Priority Byte Offset 388 "
group.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hexmask.long.byte 0x00 24.--31. 1. " INTID395  ,Interrupt ID395  Priority/Priority Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID394  ,Interrupt ID394   Priority/Priority Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID393  ,Interrupt ID393  Priority/Priority Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID392  ,Interrupt ID392   Priority/Priority Byte Offset 392 "
group.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hexmask.long.byte 0x00 24.--31. 1. " INTID399  ,Interrupt ID399  Priority/Priority Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID398  ,Interrupt ID398   Priority/Priority Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID397  ,Interrupt ID397  Priority/Priority Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID396  ,Interrupt ID396   Priority/Priority Byte Offset 396 "
group.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hexmask.long.byte 0x00 24.--31. 1. " INTID403  ,Interrupt ID403  Priority/Priority Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID402  ,Interrupt ID402   Priority/Priority Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID401  ,Interrupt ID401  Priority/Priority Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID400  ,Interrupt ID400   Priority/Priority Byte Offset 400 "
group.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hexmask.long.byte 0x00 24.--31. 1. " INTID407  ,Interrupt ID407  Priority/Priority Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID406  ,Interrupt ID406   Priority/Priority Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID405  ,Interrupt ID405  Priority/Priority Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID404  ,Interrupt ID404   Priority/Priority Byte Offset 404 "
group.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hexmask.long.byte 0x00 24.--31. 1. " INTID411  ,Interrupt ID411  Priority/Priority Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID410  ,Interrupt ID410   Priority/Priority Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID409  ,Interrupt ID409  Priority/Priority Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID408  ,Interrupt ID408   Priority/Priority Byte Offset 408 "
group.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
hexmask.long.byte 0x00 24.--31. 1. " INTID415  ,Interrupt ID415  Priority/Priority Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID414  ,Interrupt ID414   Priority/Priority Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID413  ,Interrupt ID413  Priority/Priority Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID412  ,Interrupt ID412   Priority/Priority Byte Offset 412 "
else
rgroup.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
rgroup.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
rgroup.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
rgroup.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
rgroup.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
rgroup.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
rgroup.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
rgroup.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hexmask.long.byte 0x00 24.--31. 1. " INTID419  ,Interrupt ID419  Priority/Priority Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID418  ,Interrupt ID418   Priority/Priority Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID417  ,Interrupt ID417  Priority/Priority Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID416  ,Interrupt ID416   Priority/Priority Byte Offset 416 "
group.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hexmask.long.byte 0x00 24.--31. 1. " INTID423  ,Interrupt ID423  Priority/Priority Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID422  ,Interrupt ID422   Priority/Priority Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID421  ,Interrupt ID421  Priority/Priority Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID420  ,Interrupt ID420   Priority/Priority Byte Offset 420 "
group.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hexmask.long.byte 0x00 24.--31. 1. " INTID427  ,Interrupt ID427  Priority/Priority Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID426  ,Interrupt ID426   Priority/Priority Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID425  ,Interrupt ID425  Priority/Priority Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID424  ,Interrupt ID424   Priority/Priority Byte Offset 424 "
group.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hexmask.long.byte 0x00 24.--31. 1. " INTID431  ,Interrupt ID431  Priority/Priority Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID430  ,Interrupt ID430   Priority/Priority Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID429  ,Interrupt ID429  Priority/Priority Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID428  ,Interrupt ID428   Priority/Priority Byte Offset 428 "
group.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hexmask.long.byte 0x00 24.--31. 1. " INTID435  ,Interrupt ID435  Priority/Priority Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID434  ,Interrupt ID434   Priority/Priority Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID433  ,Interrupt ID433  Priority/Priority Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID432  ,Interrupt ID432   Priority/Priority Byte Offset 432 "
group.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hexmask.long.byte 0x00 24.--31. 1. " INTID439  ,Interrupt ID439  Priority/Priority Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID438  ,Interrupt ID438   Priority/Priority Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID437  ,Interrupt ID437  Priority/Priority Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID436  ,Interrupt ID436   Priority/Priority Byte Offset 436 "
group.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hexmask.long.byte 0x00 24.--31. 1. " INTID443  ,Interrupt ID443  Priority/Priority Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID442  ,Interrupt ID442   Priority/Priority Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID441  ,Interrupt ID441  Priority/Priority Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID440  ,Interrupt ID440   Priority/Priority Byte Offset 440 "
group.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
hexmask.long.byte 0x00 24.--31. 1. " INTID447  ,Interrupt ID447  Priority/Priority Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID446  ,Interrupt ID446   Priority/Priority Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID445  ,Interrupt ID445  Priority/Priority Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID444  ,Interrupt ID444   Priority/Priority Byte Offset 444 "
else
rgroup.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
rgroup.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
rgroup.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
rgroup.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
rgroup.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
rgroup.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
rgroup.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
rgroup.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hexmask.long.byte 0x00 24.--31. 1. " INTID451  ,Interrupt ID451  Priority/Priority Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID450  ,Interrupt ID450   Priority/Priority Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID449  ,Interrupt ID449  Priority/Priority Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID448  ,Interrupt ID448   Priority/Priority Byte Offset 448 "
group.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hexmask.long.byte 0x00 24.--31. 1. " INTID455  ,Interrupt ID455  Priority/Priority Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID454  ,Interrupt ID454   Priority/Priority Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID453  ,Interrupt ID453  Priority/Priority Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID452  ,Interrupt ID452   Priority/Priority Byte Offset 452 "
group.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hexmask.long.byte 0x00 24.--31. 1. " INTID459  ,Interrupt ID459  Priority/Priority Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID458  ,Interrupt ID458   Priority/Priority Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID457  ,Interrupt ID457  Priority/Priority Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID456  ,Interrupt ID456   Priority/Priority Byte Offset 456 "
group.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hexmask.long.byte 0x00 24.--31. 1. " INTID463  ,Interrupt ID463  Priority/Priority Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID462  ,Interrupt ID462   Priority/Priority Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID461  ,Interrupt ID461  Priority/Priority Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID460  ,Interrupt ID460   Priority/Priority Byte Offset 460 "
group.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hexmask.long.byte 0x00 24.--31. 1. " INTID467  ,Interrupt ID467  Priority/Priority Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID466  ,Interrupt ID466   Priority/Priority Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID465  ,Interrupt ID465  Priority/Priority Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID464  ,Interrupt ID464   Priority/Priority Byte Offset 464 "
group.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hexmask.long.byte 0x00 24.--31. 1. " INTID471  ,Interrupt ID471  Priority/Priority Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID470  ,Interrupt ID470   Priority/Priority Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID469  ,Interrupt ID469  Priority/Priority Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID468  ,Interrupt ID468   Priority/Priority Byte Offset 468 "
group.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hexmask.long.byte 0x00 24.--31. 1. " INTID475  ,Interrupt ID475  Priority/Priority Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID474  ,Interrupt ID474   Priority/Priority Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID473  ,Interrupt ID473  Priority/Priority Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID472  ,Interrupt ID472   Priority/Priority Byte Offset 472 "
group.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
hexmask.long.byte 0x00 24.--31. 1. " INTID479  ,Interrupt ID479  Priority/Priority Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID478  ,Interrupt ID478   Priority/Priority Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID477  ,Interrupt ID477  Priority/Priority Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID476  ,Interrupt ID476   Priority/Priority Byte Offset 476 "
else
rgroup.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
rgroup.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
rgroup.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
rgroup.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
rgroup.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
rgroup.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
rgroup.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
rgroup.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hexmask.long.byte 0x00 24.--31. 1. " INTID483  ,Interrupt ID483  Priority/Priority Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID482  ,Interrupt ID482   Priority/Priority Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID481  ,Interrupt ID481  Priority/Priority Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID480  ,Interrupt ID480   Priority/Priority Byte Offset 480 "
group.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hexmask.long.byte 0x00 24.--31. 1. " INTID487  ,Interrupt ID487  Priority/Priority Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID486  ,Interrupt ID486   Priority/Priority Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID485  ,Interrupt ID485  Priority/Priority Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID484  ,Interrupt ID484   Priority/Priority Byte Offset 484 "
group.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hexmask.long.byte 0x00 24.--31. 1. " INTID491  ,Interrupt ID491  Priority/Priority Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID490  ,Interrupt ID490   Priority/Priority Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID489  ,Interrupt ID489  Priority/Priority Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID488  ,Interrupt ID488   Priority/Priority Byte Offset 488 "
group.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hexmask.long.byte 0x00 24.--31. 1. " INTID495  ,Interrupt ID495  Priority/Priority Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID494  ,Interrupt ID494   Priority/Priority Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID493  ,Interrupt ID493  Priority/Priority Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID492  ,Interrupt ID492   Priority/Priority Byte Offset 492 "
group.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hexmask.long.byte 0x00 24.--31. 1. " INTID499  ,Interrupt ID499  Priority/Priority Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID498  ,Interrupt ID498   Priority/Priority Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID497  ,Interrupt ID497  Priority/Priority Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID496  ,Interrupt ID496   Priority/Priority Byte Offset 496 "
group.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hexmask.long.byte 0x00 24.--31. 1. " INTID503  ,Interrupt ID503  Priority/Priority Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID502  ,Interrupt ID502   Priority/Priority Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID501  ,Interrupt ID501  Priority/Priority Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID500  ,Interrupt ID500   Priority/Priority Byte Offset 500 "
group.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hexmask.long.byte 0x00 24.--31. 1. " INTID507  ,Interrupt ID507  Priority/Priority Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID506  ,Interrupt ID506   Priority/Priority Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID505  ,Interrupt ID505  Priority/Priority Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID504  ,Interrupt ID504   Priority/Priority Byte Offset 504 "
group.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
hexmask.long.byte 0x00 24.--31. 1. " INTID511  ,Interrupt ID511  Priority/Priority Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID510  ,Interrupt ID510   Priority/Priority Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID509  ,Interrupt ID509  Priority/Priority Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID508  ,Interrupt ID508   Priority/Priority Byte Offset 508 "
else
rgroup.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
rgroup.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
rgroup.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
rgroup.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
rgroup.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
rgroup.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
rgroup.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
rgroup.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hexmask.long.byte 0x00 24.--31. 1. " INTID515  ,Interrupt ID515  Priority/Priority Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID514  ,Interrupt ID514   Priority/Priority Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID513  ,Interrupt ID513  Priority/Priority Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID512  ,Interrupt ID512   Priority/Priority Byte Offset 512 "
group.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hexmask.long.byte 0x00 24.--31. 1. " INTID519  ,Interrupt ID519  Priority/Priority Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID518  ,Interrupt ID518   Priority/Priority Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID517  ,Interrupt ID517  Priority/Priority Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID516  ,Interrupt ID516   Priority/Priority Byte Offset 516 "
group.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hexmask.long.byte 0x00 24.--31. 1. " INTID523  ,Interrupt ID523  Priority/Priority Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID522  ,Interrupt ID522   Priority/Priority Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID521  ,Interrupt ID521  Priority/Priority Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID520  ,Interrupt ID520   Priority/Priority Byte Offset 520 "
group.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hexmask.long.byte 0x00 24.--31. 1. " INTID527  ,Interrupt ID527  Priority/Priority Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID526  ,Interrupt ID526   Priority/Priority Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID525  ,Interrupt ID525  Priority/Priority Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID524  ,Interrupt ID524   Priority/Priority Byte Offset 524 "
group.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hexmask.long.byte 0x00 24.--31. 1. " INTID531  ,Interrupt ID531  Priority/Priority Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID530  ,Interrupt ID530   Priority/Priority Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID529  ,Interrupt ID529  Priority/Priority Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID528  ,Interrupt ID528   Priority/Priority Byte Offset 528 "
group.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hexmask.long.byte 0x00 24.--31. 1. " INTID535  ,Interrupt ID535  Priority/Priority Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID534  ,Interrupt ID534   Priority/Priority Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID533  ,Interrupt ID533  Priority/Priority Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID532  ,Interrupt ID532   Priority/Priority Byte Offset 532 "
group.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hexmask.long.byte 0x00 24.--31. 1. " INTID539  ,Interrupt ID539  Priority/Priority Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID538  ,Interrupt ID538   Priority/Priority Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID537  ,Interrupt ID537  Priority/Priority Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID536  ,Interrupt ID536   Priority/Priority Byte Offset 536 "
group.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
hexmask.long.byte 0x00 24.--31. 1. " INTID543  ,Interrupt ID543  Priority/Priority Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID542  ,Interrupt ID542   Priority/Priority Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID541  ,Interrupt ID541  Priority/Priority Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID540  ,Interrupt ID540   Priority/Priority Byte Offset 540 "
else
rgroup.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
rgroup.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
rgroup.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
rgroup.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
rgroup.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
rgroup.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
rgroup.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
rgroup.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hexmask.long.byte 0x00 24.--31. 1. " INTID547  ,Interrupt ID547  Priority/Priority Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID546  ,Interrupt ID546   Priority/Priority Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID545  ,Interrupt ID545  Priority/Priority Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID544  ,Interrupt ID544   Priority/Priority Byte Offset 544 "
group.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hexmask.long.byte 0x00 24.--31. 1. " INTID551  ,Interrupt ID551  Priority/Priority Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID550  ,Interrupt ID550   Priority/Priority Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID549  ,Interrupt ID549  Priority/Priority Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID548  ,Interrupt ID548   Priority/Priority Byte Offset 548 "
group.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hexmask.long.byte 0x00 24.--31. 1. " INTID555  ,Interrupt ID555  Priority/Priority Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID554  ,Interrupt ID554   Priority/Priority Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID553  ,Interrupt ID553  Priority/Priority Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID552  ,Interrupt ID552   Priority/Priority Byte Offset 552 "
group.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hexmask.long.byte 0x00 24.--31. 1. " INTID559  ,Interrupt ID559  Priority/Priority Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID558  ,Interrupt ID558   Priority/Priority Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID557  ,Interrupt ID557  Priority/Priority Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID556  ,Interrupt ID556   Priority/Priority Byte Offset 556 "
group.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hexmask.long.byte 0x00 24.--31. 1. " INTID563  ,Interrupt ID563  Priority/Priority Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID562  ,Interrupt ID562   Priority/Priority Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID561  ,Interrupt ID561  Priority/Priority Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID560  ,Interrupt ID560   Priority/Priority Byte Offset 560 "
group.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hexmask.long.byte 0x00 24.--31. 1. " INTID567  ,Interrupt ID567  Priority/Priority Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID566  ,Interrupt ID566   Priority/Priority Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID565  ,Interrupt ID565  Priority/Priority Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID564  ,Interrupt ID564   Priority/Priority Byte Offset 564 "
group.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hexmask.long.byte 0x00 24.--31. 1. " INTID571  ,Interrupt ID571  Priority/Priority Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID570  ,Interrupt ID570   Priority/Priority Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID569  ,Interrupt ID569  Priority/Priority Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID568  ,Interrupt ID568   Priority/Priority Byte Offset 568 "
group.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
hexmask.long.byte 0x00 24.--31. 1. " INTID575  ,Interrupt ID575  Priority/Priority Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID574  ,Interrupt ID574   Priority/Priority Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID573  ,Interrupt ID573  Priority/Priority Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID572  ,Interrupt ID572   Priority/Priority Byte Offset 572 "
else
rgroup.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
rgroup.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
rgroup.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
rgroup.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
rgroup.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
rgroup.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
rgroup.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
rgroup.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hexmask.long.byte 0x00 24.--31. 1. " INTID579  ,Interrupt ID579  Priority/Priority Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID578  ,Interrupt ID578   Priority/Priority Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID577  ,Interrupt ID577  Priority/Priority Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID576  ,Interrupt ID576   Priority/Priority Byte Offset 576 "
group.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hexmask.long.byte 0x00 24.--31. 1. " INTID583  ,Interrupt ID583  Priority/Priority Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID582  ,Interrupt ID582   Priority/Priority Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID581  ,Interrupt ID581  Priority/Priority Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID580  ,Interrupt ID580   Priority/Priority Byte Offset 580 "
group.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hexmask.long.byte 0x00 24.--31. 1. " INTID587  ,Interrupt ID587  Priority/Priority Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID586  ,Interrupt ID586   Priority/Priority Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID585  ,Interrupt ID585  Priority/Priority Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID584  ,Interrupt ID584   Priority/Priority Byte Offset 584 "
group.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hexmask.long.byte 0x00 24.--31. 1. " INTID591  ,Interrupt ID591  Priority/Priority Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID590  ,Interrupt ID590   Priority/Priority Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID589  ,Interrupt ID589  Priority/Priority Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID588  ,Interrupt ID588   Priority/Priority Byte Offset 588 "
group.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hexmask.long.byte 0x00 24.--31. 1. " INTID595  ,Interrupt ID595  Priority/Priority Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID594  ,Interrupt ID594   Priority/Priority Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID593  ,Interrupt ID593  Priority/Priority Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID592  ,Interrupt ID592   Priority/Priority Byte Offset 592 "
group.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hexmask.long.byte 0x00 24.--31. 1. " INTID599  ,Interrupt ID599  Priority/Priority Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID598  ,Interrupt ID598   Priority/Priority Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID597  ,Interrupt ID597  Priority/Priority Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID596  ,Interrupt ID596   Priority/Priority Byte Offset 596 "
group.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hexmask.long.byte 0x00 24.--31. 1. " INTID603  ,Interrupt ID603  Priority/Priority Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID602  ,Interrupt ID602   Priority/Priority Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID601  ,Interrupt ID601  Priority/Priority Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID600  ,Interrupt ID600   Priority/Priority Byte Offset 600 "
group.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
hexmask.long.byte 0x00 24.--31. 1. " INTID607  ,Interrupt ID607  Priority/Priority Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID606  ,Interrupt ID606   Priority/Priority Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID605  ,Interrupt ID605  Priority/Priority Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID604  ,Interrupt ID604   Priority/Priority Byte Offset 604 "
else
rgroup.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
rgroup.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
rgroup.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
rgroup.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
rgroup.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
rgroup.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
rgroup.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
rgroup.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hexmask.long.byte 0x00 24.--31. 1. " INTID611  ,Interrupt ID611  Priority/Priority Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID610  ,Interrupt ID610   Priority/Priority Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID609  ,Interrupt ID609  Priority/Priority Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID608  ,Interrupt ID608   Priority/Priority Byte Offset 608 "
group.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hexmask.long.byte 0x00 24.--31. 1. " INTID615  ,Interrupt ID615  Priority/Priority Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID614  ,Interrupt ID614   Priority/Priority Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID613  ,Interrupt ID613  Priority/Priority Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID612  ,Interrupt ID612   Priority/Priority Byte Offset 612 "
group.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hexmask.long.byte 0x00 24.--31. 1. " INTID619  ,Interrupt ID619  Priority/Priority Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID618  ,Interrupt ID618   Priority/Priority Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID617  ,Interrupt ID617  Priority/Priority Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID616  ,Interrupt ID616   Priority/Priority Byte Offset 616 "
group.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hexmask.long.byte 0x00 24.--31. 1. " INTID623  ,Interrupt ID623  Priority/Priority Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID622  ,Interrupt ID622   Priority/Priority Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID621  ,Interrupt ID621  Priority/Priority Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID620  ,Interrupt ID620   Priority/Priority Byte Offset 620 "
group.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hexmask.long.byte 0x00 24.--31. 1. " INTID627  ,Interrupt ID627  Priority/Priority Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID626  ,Interrupt ID626   Priority/Priority Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID625  ,Interrupt ID625  Priority/Priority Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID624  ,Interrupt ID624   Priority/Priority Byte Offset 624 "
group.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hexmask.long.byte 0x00 24.--31. 1. " INTID631  ,Interrupt ID631  Priority/Priority Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID630  ,Interrupt ID630   Priority/Priority Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID629  ,Interrupt ID629  Priority/Priority Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID628  ,Interrupt ID628   Priority/Priority Byte Offset 628 "
group.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hexmask.long.byte 0x00 24.--31. 1. " INTID635  ,Interrupt ID635  Priority/Priority Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID634  ,Interrupt ID634   Priority/Priority Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID633  ,Interrupt ID633  Priority/Priority Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID632  ,Interrupt ID632   Priority/Priority Byte Offset 632 "
group.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
hexmask.long.byte 0x00 24.--31. 1. " INTID639  ,Interrupt ID639  Priority/Priority Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID638  ,Interrupt ID638   Priority/Priority Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID637  ,Interrupt ID637  Priority/Priority Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID636  ,Interrupt ID636   Priority/Priority Byte Offset 636 "
else
rgroup.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
rgroup.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
rgroup.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
rgroup.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
rgroup.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
rgroup.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
rgroup.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
rgroup.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hexmask.long.byte 0x00 24.--31. 1. " INTID643  ,Interrupt ID643  Priority/Priority Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID642  ,Interrupt ID642   Priority/Priority Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID641  ,Interrupt ID641  Priority/Priority Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID640  ,Interrupt ID640   Priority/Priority Byte Offset 640 "
group.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hexmask.long.byte 0x00 24.--31. 1. " INTID647  ,Interrupt ID647  Priority/Priority Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID646  ,Interrupt ID646   Priority/Priority Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID645  ,Interrupt ID645  Priority/Priority Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID644  ,Interrupt ID644   Priority/Priority Byte Offset 644 "
group.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hexmask.long.byte 0x00 24.--31. 1. " INTID651  ,Interrupt ID651  Priority/Priority Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID650  ,Interrupt ID650   Priority/Priority Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID649  ,Interrupt ID649  Priority/Priority Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID648  ,Interrupt ID648   Priority/Priority Byte Offset 648 "
group.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hexmask.long.byte 0x00 24.--31. 1. " INTID655  ,Interrupt ID655  Priority/Priority Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID654  ,Interrupt ID654   Priority/Priority Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID653  ,Interrupt ID653  Priority/Priority Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID652  ,Interrupt ID652   Priority/Priority Byte Offset 652 "
group.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hexmask.long.byte 0x00 24.--31. 1. " INTID659  ,Interrupt ID659  Priority/Priority Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID658  ,Interrupt ID658   Priority/Priority Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID657  ,Interrupt ID657  Priority/Priority Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID656  ,Interrupt ID656   Priority/Priority Byte Offset 656 "
group.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hexmask.long.byte 0x00 24.--31. 1. " INTID663  ,Interrupt ID663  Priority/Priority Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID662  ,Interrupt ID662   Priority/Priority Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID661  ,Interrupt ID661  Priority/Priority Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID660  ,Interrupt ID660   Priority/Priority Byte Offset 660 "
group.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hexmask.long.byte 0x00 24.--31. 1. " INTID667  ,Interrupt ID667  Priority/Priority Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID666  ,Interrupt ID666   Priority/Priority Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID665  ,Interrupt ID665  Priority/Priority Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID664  ,Interrupt ID664   Priority/Priority Byte Offset 664 "
group.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
hexmask.long.byte 0x00 24.--31. 1. " INTID671  ,Interrupt ID671  Priority/Priority Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID670  ,Interrupt ID670   Priority/Priority Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID669  ,Interrupt ID669  Priority/Priority Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID668  ,Interrupt ID668   Priority/Priority Byte Offset 668 "
else
rgroup.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
rgroup.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
rgroup.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
rgroup.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
rgroup.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
rgroup.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
rgroup.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
rgroup.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hexmask.long.byte 0x00 24.--31. 1. " INTID675  ,Interrupt ID675  Priority/Priority Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID674  ,Interrupt ID674   Priority/Priority Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID673  ,Interrupt ID673  Priority/Priority Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID672  ,Interrupt ID672   Priority/Priority Byte Offset 672 "
group.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hexmask.long.byte 0x00 24.--31. 1. " INTID679  ,Interrupt ID679  Priority/Priority Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID678  ,Interrupt ID678   Priority/Priority Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID677  ,Interrupt ID677  Priority/Priority Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID676  ,Interrupt ID676   Priority/Priority Byte Offset 676 "
group.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hexmask.long.byte 0x00 24.--31. 1. " INTID683  ,Interrupt ID683  Priority/Priority Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID682  ,Interrupt ID682   Priority/Priority Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID681  ,Interrupt ID681  Priority/Priority Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID680  ,Interrupt ID680   Priority/Priority Byte Offset 680 "
group.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hexmask.long.byte 0x00 24.--31. 1. " INTID687  ,Interrupt ID687  Priority/Priority Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID686  ,Interrupt ID686   Priority/Priority Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID685  ,Interrupt ID685  Priority/Priority Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID684  ,Interrupt ID684   Priority/Priority Byte Offset 684 "
group.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hexmask.long.byte 0x00 24.--31. 1. " INTID691  ,Interrupt ID691  Priority/Priority Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID690  ,Interrupt ID690   Priority/Priority Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID689  ,Interrupt ID689  Priority/Priority Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID688  ,Interrupt ID688   Priority/Priority Byte Offset 688 "
group.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hexmask.long.byte 0x00 24.--31. 1. " INTID695  ,Interrupt ID695  Priority/Priority Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID694  ,Interrupt ID694   Priority/Priority Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID693  ,Interrupt ID693  Priority/Priority Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID692  ,Interrupt ID692   Priority/Priority Byte Offset 692 "
group.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hexmask.long.byte 0x00 24.--31. 1. " INTID699  ,Interrupt ID699  Priority/Priority Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID698  ,Interrupt ID698   Priority/Priority Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID697  ,Interrupt ID697  Priority/Priority Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID696  ,Interrupt ID696   Priority/Priority Byte Offset 696 "
group.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
hexmask.long.byte 0x00 24.--31. 1. " INTID703  ,Interrupt ID703  Priority/Priority Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID702  ,Interrupt ID702   Priority/Priority Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID701  ,Interrupt ID701  Priority/Priority Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID700  ,Interrupt ID700   Priority/Priority Byte Offset 700 "
else
rgroup.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
rgroup.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
rgroup.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
rgroup.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
rgroup.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
rgroup.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
rgroup.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
rgroup.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hexmask.long.byte 0x00 24.--31. 1. " INTID707  ,Interrupt ID707  Priority/Priority Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID706  ,Interrupt ID706   Priority/Priority Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID705  ,Interrupt ID705  Priority/Priority Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID704  ,Interrupt ID704   Priority/Priority Byte Offset 704 "
group.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hexmask.long.byte 0x00 24.--31. 1. " INTID711  ,Interrupt ID711  Priority/Priority Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID710  ,Interrupt ID710   Priority/Priority Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID709  ,Interrupt ID709  Priority/Priority Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID708  ,Interrupt ID708   Priority/Priority Byte Offset 708 "
group.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hexmask.long.byte 0x00 24.--31. 1. " INTID715  ,Interrupt ID715  Priority/Priority Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID714  ,Interrupt ID714   Priority/Priority Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID713  ,Interrupt ID713  Priority/Priority Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID712  ,Interrupt ID712   Priority/Priority Byte Offset 712 "
group.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hexmask.long.byte 0x00 24.--31. 1. " INTID719  ,Interrupt ID719  Priority/Priority Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID718  ,Interrupt ID718   Priority/Priority Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID717  ,Interrupt ID717  Priority/Priority Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID716  ,Interrupt ID716   Priority/Priority Byte Offset 716 "
group.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hexmask.long.byte 0x00 24.--31. 1. " INTID723  ,Interrupt ID723  Priority/Priority Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID722  ,Interrupt ID722   Priority/Priority Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID721  ,Interrupt ID721  Priority/Priority Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID720  ,Interrupt ID720   Priority/Priority Byte Offset 720 "
group.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hexmask.long.byte 0x00 24.--31. 1. " INTID727  ,Interrupt ID727  Priority/Priority Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID726  ,Interrupt ID726   Priority/Priority Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID725  ,Interrupt ID725  Priority/Priority Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID724  ,Interrupt ID724   Priority/Priority Byte Offset 724 "
group.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hexmask.long.byte 0x00 24.--31. 1. " INTID731  ,Interrupt ID731  Priority/Priority Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID730  ,Interrupt ID730   Priority/Priority Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID729  ,Interrupt ID729  Priority/Priority Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID728  ,Interrupt ID728   Priority/Priority Byte Offset 728 "
group.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
hexmask.long.byte 0x00 24.--31. 1. " INTID735  ,Interrupt ID735  Priority/Priority Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID734  ,Interrupt ID734   Priority/Priority Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID733  ,Interrupt ID733  Priority/Priority Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID732  ,Interrupt ID732   Priority/Priority Byte Offset 732 "
else
rgroup.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
rgroup.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
rgroup.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
rgroup.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
rgroup.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
rgroup.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
rgroup.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
rgroup.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hexmask.long.byte 0x00 24.--31. 1. " INTID739  ,Interrupt ID739  Priority/Priority Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID738  ,Interrupt ID738   Priority/Priority Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID737  ,Interrupt ID737  Priority/Priority Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID736  ,Interrupt ID736   Priority/Priority Byte Offset 736 "
group.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hexmask.long.byte 0x00 24.--31. 1. " INTID743  ,Interrupt ID743  Priority/Priority Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID742  ,Interrupt ID742   Priority/Priority Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID741  ,Interrupt ID741  Priority/Priority Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID740  ,Interrupt ID740   Priority/Priority Byte Offset 740 "
group.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hexmask.long.byte 0x00 24.--31. 1. " INTID747  ,Interrupt ID747  Priority/Priority Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID746  ,Interrupt ID746   Priority/Priority Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID745  ,Interrupt ID745  Priority/Priority Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID744  ,Interrupt ID744   Priority/Priority Byte Offset 744 "
group.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hexmask.long.byte 0x00 24.--31. 1. " INTID751  ,Interrupt ID751  Priority/Priority Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID750  ,Interrupt ID750   Priority/Priority Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID749  ,Interrupt ID749  Priority/Priority Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID748  ,Interrupt ID748   Priority/Priority Byte Offset 748 "
group.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hexmask.long.byte 0x00 24.--31. 1. " INTID755  ,Interrupt ID755  Priority/Priority Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID754  ,Interrupt ID754   Priority/Priority Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID753  ,Interrupt ID753  Priority/Priority Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID752  ,Interrupt ID752   Priority/Priority Byte Offset 752 "
group.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hexmask.long.byte 0x00 24.--31. 1. " INTID759  ,Interrupt ID759  Priority/Priority Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID758  ,Interrupt ID758   Priority/Priority Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID757  ,Interrupt ID757  Priority/Priority Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID756  ,Interrupt ID756   Priority/Priority Byte Offset 756 "
group.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hexmask.long.byte 0x00 24.--31. 1. " INTID763  ,Interrupt ID763  Priority/Priority Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID762  ,Interrupt ID762   Priority/Priority Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID761  ,Interrupt ID761  Priority/Priority Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID760  ,Interrupt ID760   Priority/Priority Byte Offset 760 "
group.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
hexmask.long.byte 0x00 24.--31. 1. " INTID767  ,Interrupt ID767  Priority/Priority Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID766  ,Interrupt ID766   Priority/Priority Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID765  ,Interrupt ID765  Priority/Priority Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID764  ,Interrupt ID764   Priority/Priority Byte Offset 764 "
else
rgroup.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
rgroup.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
rgroup.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
rgroup.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
rgroup.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
rgroup.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
rgroup.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
rgroup.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hexmask.long.byte 0x00 24.--31. 1. " INTID771  ,Interrupt ID771  Priority/Priority Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID770  ,Interrupt ID770   Priority/Priority Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID769  ,Interrupt ID769  Priority/Priority Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID768  ,Interrupt ID768   Priority/Priority Byte Offset 768 "
group.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hexmask.long.byte 0x00 24.--31. 1. " INTID775  ,Interrupt ID775  Priority/Priority Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID774  ,Interrupt ID774   Priority/Priority Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID773  ,Interrupt ID773  Priority/Priority Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID772  ,Interrupt ID772   Priority/Priority Byte Offset 772 "
group.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hexmask.long.byte 0x00 24.--31. 1. " INTID779  ,Interrupt ID779  Priority/Priority Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID778  ,Interrupt ID778   Priority/Priority Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID777  ,Interrupt ID777  Priority/Priority Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID776  ,Interrupt ID776   Priority/Priority Byte Offset 776 "
group.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hexmask.long.byte 0x00 24.--31. 1. " INTID783  ,Interrupt ID783  Priority/Priority Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID782  ,Interrupt ID782   Priority/Priority Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID781  ,Interrupt ID781  Priority/Priority Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID780  ,Interrupt ID780   Priority/Priority Byte Offset 780 "
group.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hexmask.long.byte 0x00 24.--31. 1. " INTID787  ,Interrupt ID787  Priority/Priority Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID786  ,Interrupt ID786   Priority/Priority Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID785  ,Interrupt ID785  Priority/Priority Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID784  ,Interrupt ID784   Priority/Priority Byte Offset 784 "
group.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hexmask.long.byte 0x00 24.--31. 1. " INTID791  ,Interrupt ID791  Priority/Priority Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID790  ,Interrupt ID790   Priority/Priority Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID789  ,Interrupt ID789  Priority/Priority Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID788  ,Interrupt ID788   Priority/Priority Byte Offset 788 "
group.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hexmask.long.byte 0x00 24.--31. 1. " INTID795  ,Interrupt ID795  Priority/Priority Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID794  ,Interrupt ID794   Priority/Priority Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID793  ,Interrupt ID793  Priority/Priority Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID792  ,Interrupt ID792   Priority/Priority Byte Offset 792 "
group.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
hexmask.long.byte 0x00 24.--31. 1. " INTID799  ,Interrupt ID799  Priority/Priority Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID798  ,Interrupt ID798   Priority/Priority Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID797  ,Interrupt ID797  Priority/Priority Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID796  ,Interrupt ID796   Priority/Priority Byte Offset 796 "
else
rgroup.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
rgroup.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
rgroup.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
rgroup.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
rgroup.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
rgroup.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
rgroup.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
rgroup.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hexmask.long.byte 0x00 24.--31. 1. " INTID803  ,Interrupt ID803  Priority/Priority Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID802  ,Interrupt ID802   Priority/Priority Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID801  ,Interrupt ID801  Priority/Priority Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID800  ,Interrupt ID800   Priority/Priority Byte Offset 800 "
group.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hexmask.long.byte 0x00 24.--31. 1. " INTID807  ,Interrupt ID807  Priority/Priority Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID806  ,Interrupt ID806   Priority/Priority Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID805  ,Interrupt ID805  Priority/Priority Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID804  ,Interrupt ID804   Priority/Priority Byte Offset 804 "
group.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hexmask.long.byte 0x00 24.--31. 1. " INTID811  ,Interrupt ID811  Priority/Priority Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID810  ,Interrupt ID810   Priority/Priority Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID809  ,Interrupt ID809  Priority/Priority Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID808  ,Interrupt ID808   Priority/Priority Byte Offset 808 "
group.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hexmask.long.byte 0x00 24.--31. 1. " INTID815  ,Interrupt ID815  Priority/Priority Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID814  ,Interrupt ID814   Priority/Priority Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID813  ,Interrupt ID813  Priority/Priority Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID812  ,Interrupt ID812   Priority/Priority Byte Offset 812 "
group.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hexmask.long.byte 0x00 24.--31. 1. " INTID819  ,Interrupt ID819  Priority/Priority Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID818  ,Interrupt ID818   Priority/Priority Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID817  ,Interrupt ID817  Priority/Priority Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID816  ,Interrupt ID816   Priority/Priority Byte Offset 816 "
group.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hexmask.long.byte 0x00 24.--31. 1. " INTID823  ,Interrupt ID823  Priority/Priority Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID822  ,Interrupt ID822   Priority/Priority Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID821  ,Interrupt ID821  Priority/Priority Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID820  ,Interrupt ID820   Priority/Priority Byte Offset 820 "
group.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hexmask.long.byte 0x00 24.--31. 1. " INTID827  ,Interrupt ID827  Priority/Priority Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID826  ,Interrupt ID826   Priority/Priority Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID825  ,Interrupt ID825  Priority/Priority Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID824  ,Interrupt ID824   Priority/Priority Byte Offset 824 "
group.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
hexmask.long.byte 0x00 24.--31. 1. " INTID831  ,Interrupt ID831  Priority/Priority Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID830  ,Interrupt ID830   Priority/Priority Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID829  ,Interrupt ID829  Priority/Priority Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID828  ,Interrupt ID828   Priority/Priority Byte Offset 828 "
else
rgroup.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
rgroup.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
rgroup.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
rgroup.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
rgroup.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
rgroup.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
rgroup.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
rgroup.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hexmask.long.byte 0x00 24.--31. 1. " INTID835  ,Interrupt ID835  Priority/Priority Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID834  ,Interrupt ID834   Priority/Priority Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID833  ,Interrupt ID833  Priority/Priority Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID832  ,Interrupt ID832   Priority/Priority Byte Offset 832 "
group.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hexmask.long.byte 0x00 24.--31. 1. " INTID839  ,Interrupt ID839  Priority/Priority Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID838  ,Interrupt ID838   Priority/Priority Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID837  ,Interrupt ID837  Priority/Priority Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID836  ,Interrupt ID836   Priority/Priority Byte Offset 836 "
group.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hexmask.long.byte 0x00 24.--31. 1. " INTID843  ,Interrupt ID843  Priority/Priority Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID842  ,Interrupt ID842   Priority/Priority Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID841  ,Interrupt ID841  Priority/Priority Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID840  ,Interrupt ID840   Priority/Priority Byte Offset 840 "
group.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hexmask.long.byte 0x00 24.--31. 1. " INTID847  ,Interrupt ID847  Priority/Priority Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID846  ,Interrupt ID846   Priority/Priority Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID845  ,Interrupt ID845  Priority/Priority Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID844  ,Interrupt ID844   Priority/Priority Byte Offset 844 "
group.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hexmask.long.byte 0x00 24.--31. 1. " INTID851  ,Interrupt ID851  Priority/Priority Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID850  ,Interrupt ID850   Priority/Priority Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID849  ,Interrupt ID849  Priority/Priority Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID848  ,Interrupt ID848   Priority/Priority Byte Offset 848 "
group.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hexmask.long.byte 0x00 24.--31. 1. " INTID855  ,Interrupt ID855  Priority/Priority Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID854  ,Interrupt ID854   Priority/Priority Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID853  ,Interrupt ID853  Priority/Priority Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID852  ,Interrupt ID852   Priority/Priority Byte Offset 852 "
group.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hexmask.long.byte 0x00 24.--31. 1. " INTID859  ,Interrupt ID859  Priority/Priority Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID858  ,Interrupt ID858   Priority/Priority Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID857  ,Interrupt ID857  Priority/Priority Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID856  ,Interrupt ID856   Priority/Priority Byte Offset 856 "
group.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
hexmask.long.byte 0x00 24.--31. 1. " INTID863  ,Interrupt ID863  Priority/Priority Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID862  ,Interrupt ID862   Priority/Priority Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID861  ,Interrupt ID861  Priority/Priority Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID860  ,Interrupt ID860   Priority/Priority Byte Offset 860 "
else
rgroup.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
rgroup.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
rgroup.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
rgroup.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
rgroup.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
rgroup.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
rgroup.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
rgroup.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hexmask.long.byte 0x00 24.--31. 1. " INTID867  ,Interrupt ID867  Priority/Priority Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID866  ,Interrupt ID866   Priority/Priority Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID865  ,Interrupt ID865  Priority/Priority Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID864  ,Interrupt ID864   Priority/Priority Byte Offset 864 "
group.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hexmask.long.byte 0x00 24.--31. 1. " INTID871  ,Interrupt ID871  Priority/Priority Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID870  ,Interrupt ID870   Priority/Priority Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID869  ,Interrupt ID869  Priority/Priority Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID868  ,Interrupt ID868   Priority/Priority Byte Offset 868 "
group.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hexmask.long.byte 0x00 24.--31. 1. " INTID875  ,Interrupt ID875  Priority/Priority Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID874  ,Interrupt ID874   Priority/Priority Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID873  ,Interrupt ID873  Priority/Priority Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID872  ,Interrupt ID872   Priority/Priority Byte Offset 872 "
group.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hexmask.long.byte 0x00 24.--31. 1. " INTID879  ,Interrupt ID879  Priority/Priority Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID878  ,Interrupt ID878   Priority/Priority Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID877  ,Interrupt ID877  Priority/Priority Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID876  ,Interrupt ID876   Priority/Priority Byte Offset 876 "
group.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hexmask.long.byte 0x00 24.--31. 1. " INTID883  ,Interrupt ID883  Priority/Priority Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID882  ,Interrupt ID882   Priority/Priority Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID881  ,Interrupt ID881  Priority/Priority Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID880  ,Interrupt ID880   Priority/Priority Byte Offset 880 "
group.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hexmask.long.byte 0x00 24.--31. 1. " INTID887  ,Interrupt ID887  Priority/Priority Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID886  ,Interrupt ID886   Priority/Priority Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID885  ,Interrupt ID885  Priority/Priority Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID884  ,Interrupt ID884   Priority/Priority Byte Offset 884 "
group.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hexmask.long.byte 0x00 24.--31. 1. " INTID891  ,Interrupt ID891  Priority/Priority Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID890  ,Interrupt ID890   Priority/Priority Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID889  ,Interrupt ID889  Priority/Priority Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID888  ,Interrupt ID888   Priority/Priority Byte Offset 888 "
group.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
hexmask.long.byte 0x00 24.--31. 1. " INTID895  ,Interrupt ID895  Priority/Priority Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID894  ,Interrupt ID894   Priority/Priority Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID893  ,Interrupt ID893  Priority/Priority Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID892  ,Interrupt ID892   Priority/Priority Byte Offset 892 "
else
rgroup.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
rgroup.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
rgroup.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
rgroup.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
rgroup.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
rgroup.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
rgroup.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
rgroup.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hexmask.long.byte 0x00 24.--31. 1. " INTID899  ,Interrupt ID899  Priority/Priority Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID898  ,Interrupt ID898   Priority/Priority Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID897  ,Interrupt ID897  Priority/Priority Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID896  ,Interrupt ID896   Priority/Priority Byte Offset 896 "
group.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hexmask.long.byte 0x00 24.--31. 1. " INTID903  ,Interrupt ID903  Priority/Priority Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID902  ,Interrupt ID902   Priority/Priority Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID901  ,Interrupt ID901  Priority/Priority Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID900  ,Interrupt ID900   Priority/Priority Byte Offset 900 "
group.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hexmask.long.byte 0x00 24.--31. 1. " INTID907  ,Interrupt ID907  Priority/Priority Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID906  ,Interrupt ID906   Priority/Priority Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID905  ,Interrupt ID905  Priority/Priority Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID904  ,Interrupt ID904   Priority/Priority Byte Offset 904 "
group.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hexmask.long.byte 0x00 24.--31. 1. " INTID911  ,Interrupt ID911  Priority/Priority Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID910  ,Interrupt ID910   Priority/Priority Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID909  ,Interrupt ID909  Priority/Priority Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID908  ,Interrupt ID908   Priority/Priority Byte Offset 908 "
group.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hexmask.long.byte 0x00 24.--31. 1. " INTID915  ,Interrupt ID915  Priority/Priority Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID914  ,Interrupt ID914   Priority/Priority Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID913  ,Interrupt ID913  Priority/Priority Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID912  ,Interrupt ID912   Priority/Priority Byte Offset 912 "
group.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hexmask.long.byte 0x00 24.--31. 1. " INTID919  ,Interrupt ID919  Priority/Priority Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID918  ,Interrupt ID918   Priority/Priority Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID917  ,Interrupt ID917  Priority/Priority Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID916  ,Interrupt ID916   Priority/Priority Byte Offset 916 "
group.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hexmask.long.byte 0x00 24.--31. 1. " INTID923  ,Interrupt ID923  Priority/Priority Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID922  ,Interrupt ID922   Priority/Priority Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID921  ,Interrupt ID921  Priority/Priority Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID920  ,Interrupt ID920   Priority/Priority Byte Offset 920 "
group.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
hexmask.long.byte 0x00 24.--31. 1. " INTID927  ,Interrupt ID927  Priority/Priority Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID926  ,Interrupt ID926   Priority/Priority Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID925  ,Interrupt ID925  Priority/Priority Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID924  ,Interrupt ID924   Priority/Priority Byte Offset 924 "
else
rgroup.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
rgroup.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
rgroup.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
rgroup.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
rgroup.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
rgroup.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
rgroup.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
rgroup.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hexmask.long.byte 0x00 24.--31. 1. " INTID931  ,Interrupt ID931  Priority/Priority Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID930  ,Interrupt ID930   Priority/Priority Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID929  ,Interrupt ID929  Priority/Priority Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID928  ,Interrupt ID928   Priority/Priority Byte Offset 928 "
group.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hexmask.long.byte 0x00 24.--31. 1. " INTID935  ,Interrupt ID935  Priority/Priority Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID934  ,Interrupt ID934   Priority/Priority Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID933  ,Interrupt ID933  Priority/Priority Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID932  ,Interrupt ID932   Priority/Priority Byte Offset 932 "
group.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hexmask.long.byte 0x00 24.--31. 1. " INTID939  ,Interrupt ID939  Priority/Priority Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID938  ,Interrupt ID938   Priority/Priority Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID937  ,Interrupt ID937  Priority/Priority Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID936  ,Interrupt ID936   Priority/Priority Byte Offset 936 "
group.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hexmask.long.byte 0x00 24.--31. 1. " INTID943  ,Interrupt ID943  Priority/Priority Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID942  ,Interrupt ID942   Priority/Priority Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID941  ,Interrupt ID941  Priority/Priority Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID940  ,Interrupt ID940   Priority/Priority Byte Offset 940 "
group.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hexmask.long.byte 0x00 24.--31. 1. " INTID947  ,Interrupt ID947  Priority/Priority Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID946  ,Interrupt ID946   Priority/Priority Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID945  ,Interrupt ID945  Priority/Priority Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID944  ,Interrupt ID944   Priority/Priority Byte Offset 944 "
group.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hexmask.long.byte 0x00 24.--31. 1. " INTID951  ,Interrupt ID951  Priority/Priority Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID950  ,Interrupt ID950   Priority/Priority Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID949  ,Interrupt ID949  Priority/Priority Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID948  ,Interrupt ID948   Priority/Priority Byte Offset 948 "
group.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hexmask.long.byte 0x00 24.--31. 1. " INTID955  ,Interrupt ID955  Priority/Priority Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID954  ,Interrupt ID954   Priority/Priority Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID953  ,Interrupt ID953  Priority/Priority Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID952  ,Interrupt ID952   Priority/Priority Byte Offset 952 "
group.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
hexmask.long.byte 0x00 24.--31. 1. " INTID959  ,Interrupt ID959  Priority/Priority Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID958  ,Interrupt ID958   Priority/Priority Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID957  ,Interrupt ID957  Priority/Priority Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID956  ,Interrupt ID956   Priority/Priority Byte Offset 956 "
else
rgroup.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
rgroup.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
rgroup.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
rgroup.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
rgroup.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
rgroup.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
rgroup.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
rgroup.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hexmask.long.byte 0x00 24.--31. 1. " INTID963  ,Interrupt ID963  Priority/Priority Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID962  ,Interrupt ID962   Priority/Priority Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID961  ,Interrupt ID961  Priority/Priority Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID960  ,Interrupt ID960   Priority/Priority Byte Offset 960 "
group.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hexmask.long.byte 0x00 24.--31. 1. " INTID967  ,Interrupt ID967  Priority/Priority Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID966  ,Interrupt ID966   Priority/Priority Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID965  ,Interrupt ID965  Priority/Priority Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID964  ,Interrupt ID964   Priority/Priority Byte Offset 964 "
group.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hexmask.long.byte 0x00 24.--31. 1. " INTID971  ,Interrupt ID971  Priority/Priority Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID970  ,Interrupt ID970   Priority/Priority Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID969  ,Interrupt ID969  Priority/Priority Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID968  ,Interrupt ID968   Priority/Priority Byte Offset 968 "
group.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hexmask.long.byte 0x00 24.--31. 1. " INTID975  ,Interrupt ID975  Priority/Priority Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID974  ,Interrupt ID974   Priority/Priority Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID973  ,Interrupt ID973  Priority/Priority Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID972  ,Interrupt ID972   Priority/Priority Byte Offset 972 "
group.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hexmask.long.byte 0x00 24.--31. 1. " INTID979  ,Interrupt ID979  Priority/Priority Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID978  ,Interrupt ID978   Priority/Priority Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID977  ,Interrupt ID977  Priority/Priority Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID976  ,Interrupt ID976   Priority/Priority Byte Offset 976 "
group.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hexmask.long.byte 0x00 24.--31. 1. " INTID983  ,Interrupt ID983  Priority/Priority Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID982  ,Interrupt ID982   Priority/Priority Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID981  ,Interrupt ID981  Priority/Priority Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID980  ,Interrupt ID980   Priority/Priority Byte Offset 980 "
group.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hexmask.long.byte 0x00 24.--31. 1. " INTID987  ,Interrupt ID987  Priority/Priority Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID986  ,Interrupt ID986   Priority/Priority Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID985  ,Interrupt ID985  Priority/Priority Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID984  ,Interrupt ID984   Priority/Priority Byte Offset 984 "
group.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
hexmask.long.byte 0x00 24.--31. 1. " INTID991  ,Interrupt ID991  Priority/Priority Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID990  ,Interrupt ID990   Priority/Priority Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID989  ,Interrupt ID989  Priority/Priority Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID988  ,Interrupt ID988   Priority/Priority Byte Offset 988 "
else
rgroup.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
rgroup.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
rgroup.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
rgroup.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
rgroup.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
rgroup.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
rgroup.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
rgroup.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1F)
group.long 0x7E0++0x03
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
hexmask.long.byte 0x00 24.--31. 1. " INTID995  ,Interrupt ID995  Priority/Priority Byte Offset 995 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID994  ,Interrupt ID994   Priority/Priority Byte Offset 994 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID993  ,Interrupt ID993  Priority/Priority Byte Offset 993 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID992  ,Interrupt ID992   Priority/Priority Byte Offset 992 "
group.long 0x7E4++0x03
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
hexmask.long.byte 0x00 24.--31. 1. " INTID999  ,Interrupt ID999  Priority/Priority Byte Offset 999 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID998  ,Interrupt ID998   Priority/Priority Byte Offset 998 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID997  ,Interrupt ID997  Priority/Priority Byte Offset 997 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID996  ,Interrupt ID996   Priority/Priority Byte Offset 996 "
group.long 0x7E8++0x03
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003"
hexmask.long.byte 0x00 16.--23. 1. "  INTID1002 ,Interrupt ID1002  Priority/Priority Byte Offset 1002"
hexmask.long.byte 0x00 8.--15. 1. "  INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001"
hexmask.long.byte 0x00 0.--7. 1. "  INTID1000 ,Interrupt ID1000  Priority/Priority Byte Offset 1000"
group.long 0x7EC++0x03
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007"
hexmask.long.byte 0x00 16.--23. 1. "  INTID1006 ,Interrupt ID1006  Priority/Priority Byte Offset 1006"
hexmask.long.byte 0x00 8.--15. 1. "  INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005"
hexmask.long.byte 0x00 0.--7. 1. "  INTID1004 ,Interrupt ID1004  Priority/Priority Byte Offset 1004"
group.long 0x7F0++0x03
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011"
hexmask.long.byte 0x00 16.--23. 1. "  INTID1010 ,Interrupt ID1010  Priority/Priority Byte Offset 1010"
hexmask.long.byte 0x00 8.--15. 1. "  INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009"
hexmask.long.byte 0x00 0.--7. 1. "  INTID1008 ,Interrupt ID1008  Priority/Priority Byte Offset 1008"
group.long 0x7F4++0x03
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015"
hexmask.long.byte 0x00 16.--23. 1. "  INTID1014 ,Interrupt ID1014  Priority/Priority Byte Offset 1014"
hexmask.long.byte 0x00 8.--15. 1. "  INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013"
hexmask.long.byte 0x00 0.--7. 1. "  INTID1012 ,Interrupt ID1012  Priority/Priority Byte Offset 1012"
group.long 0x7F8++0x03
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019"
hexmask.long.byte 0x00 16.--23. 1. "  INTID1018 ,Interrupt ID1018  Priority/Priority Byte Offset 1018"
hexmask.long.byte 0x00 8.--15. 1. "  INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017"
hexmask.long.byte 0x00 0.--7. 1. "  INTID1016 ,Interrupt ID1016  Priority/Priority Byte Offset 1016"
else
rgroup.long 0x7E0++0x03
line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248"
rgroup.long 0x7E4++0x03
line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249"
rgroup.long 0x7E8++0x03
line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250"
rgroup.long 0x7EC++0x03
line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251"
rgroup.long 0x7F0++0x03
line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252"
rgroup.long 0x7F4++0x03
line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253"
rgroup.long 0x7F8++0x03
line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254"
endif
tree.end
width 19.
tree "Processor Targets Registers"
if (((per.l(AD:0x03881000+0x04))&0x000000E0)>0x1)
rgroup.long 0x800++0x03
line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3    ,CPU Targets Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO2    ,CPU Targets Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1    ,CPU Targets Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO0    ,CPU Targets Byte Offset 0   "
rgroup.long 0x804++0x03
line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7    ,CPU Targets Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO6    ,CPU Targets Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO5    ,CPU Targets Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO4    ,CPU Targets Byte Offset 4   "
rgroup.long 0x808++0x03
line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11   ,CPU Targets Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO10   ,CPU Targets Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO9    ,CPU Targets Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO8    ,CPU Targets Byte Offset 8   "
rgroup.long 0x80C++0x03
line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15   ,CPU Targets Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO14   ,CPU Targets Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO13   ,CPU Targets Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO12   ,CPU Targets Byte Offset 12  "
rgroup.long 0x810++0x03
line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19   ,CPU Targets Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO18   ,CPU Targets Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO17   ,CPU Targets Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO16   ,CPU Targets Byte Offset 16  "
rgroup.long 0x814++0x03
line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23   ,CPU Targets Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO22   ,CPU Targets Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO21   ,CPU Targets Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO20   ,CPU Targets Byte Offset 20  "
rgroup.long 0x818++0x03
line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27   ,CPU Targets Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO26   ,CPU Targets Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO25   ,CPU Targets Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO24   ,CPU Targets Byte Offset 24  "
rgroup.long 0x81C++0x03
line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31   ,CPU Targets Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO30   ,CPU Targets Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO29   ,CPU Targets Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO28   ,CPU Targets Byte Offset 28  "
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
group.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35   ,CPU Targets Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO34   ,CPU Targets Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO33   ,CPU Targets Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO32   ,CPU Targets Byte Offset 32  "
group.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39   ,CPU Targets Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO38   ,CPU Targets Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO37   ,CPU Targets Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO36   ,CPU Targets Byte Offset 36  "
group.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43   ,CPU Targets Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO42   ,CPU Targets Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO41   ,CPU Targets Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO40   ,CPU Targets Byte Offset 40  "
group.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47   ,CPU Targets Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO46   ,CPU Targets Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO45   ,CPU Targets Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO44   ,CPU Targets Byte Offset 44  "
group.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51   ,CPU Targets Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO50   ,CPU Targets Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO49   ,CPU Targets Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO48   ,CPU Targets Byte Offset 48  "
group.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55   ,CPU Targets Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO54   ,CPU Targets Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO53   ,CPU Targets Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO52   ,CPU Targets Byte Offset 52  "
group.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59   ,CPU Targets Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO58   ,CPU Targets Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO57   ,CPU Targets Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO56   ,CPU Targets Byte Offset 56  "
group.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63   ,CPU Targets Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO62   ,CPU Targets Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO61   ,CPU Targets Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO60   ,CPU Targets Byte Offset 60  "
else
rgroup.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
rgroup.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
rgroup.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
rgroup.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
rgroup.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
rgroup.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
rgroup.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
rgroup.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
group.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67   ,CPU Targets Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO66   ,CPU Targets Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO65   ,CPU Targets Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO64   ,CPU Targets Byte Offset 64  "
group.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71   ,CPU Targets Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO70   ,CPU Targets Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO69   ,CPU Targets Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO68   ,CPU Targets Byte Offset 68  "
group.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75   ,CPU Targets Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO74   ,CPU Targets Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO73   ,CPU Targets Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO72   ,CPU Targets Byte Offset 72  "
group.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79   ,CPU Targets Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO78   ,CPU Targets Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO77   ,CPU Targets Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO76   ,CPU Targets Byte Offset 76  "
group.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83   ,CPU Targets Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO82   ,CPU Targets Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO81   ,CPU Targets Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO80   ,CPU Targets Byte Offset 80  "
group.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87   ,CPU Targets Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO86   ,CPU Targets Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO85   ,CPU Targets Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO84   ,CPU Targets Byte Offset 84  "
group.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91   ,CPU Targets Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO90   ,CPU Targets Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO89   ,CPU Targets Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO88   ,CPU Targets Byte Offset 88  "
group.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95   ,CPU Targets Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO94   ,CPU Targets Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO93   ,CPU Targets Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO92   ,CPU Targets Byte Offset 92  "
else
rgroup.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
rgroup.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
rgroup.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
rgroup.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
rgroup.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
rgroup.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
rgroup.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
rgroup.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
group.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99   ,CPU Targets Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO98   ,CPU Targets Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO97   ,CPU Targets Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO96   ,CPU Targets Byte Offset 96  "
group.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103  ,CPU Targets Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO102  ,CPU Targets Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO101  ,CPU Targets Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO100  ,CPU Targets Byte Offset 100 "
group.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107  ,CPU Targets Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO106  ,CPU Targets Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO105  ,CPU Targets Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO104  ,CPU Targets Byte Offset 104 "
group.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111  ,CPU Targets Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO110  ,CPU Targets Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO109  ,CPU Targets Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO108  ,CPU Targets Byte Offset 108 "
group.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115  ,CPU Targets Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO114  ,CPU Targets Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO113  ,CPU Targets Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO112  ,CPU Targets Byte Offset 112 "
group.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119  ,CPU Targets Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO118  ,CPU Targets Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO117  ,CPU Targets Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO116  ,CPU Targets Byte Offset 116 "
group.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123  ,CPU Targets Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO122  ,CPU Targets Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO121  ,CPU Targets Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO120  ,CPU Targets Byte Offset 120 "
group.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127  ,CPU Targets Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO126  ,CPU Targets Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO125  ,CPU Targets Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO124  ,CPU Targets Byte Offset 124 "
else
rgroup.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
rgroup.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
rgroup.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
rgroup.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
rgroup.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
rgroup.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
rgroup.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
rgroup.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
group.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131  ,CPU Targets Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO130  ,CPU Targets Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO129  ,CPU Targets Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO128  ,CPU Targets Byte Offset 128 "
group.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135  ,CPU Targets Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO134  ,CPU Targets Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO133  ,CPU Targets Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO132  ,CPU Targets Byte Offset 132 "
group.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139  ,CPU Targets Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO138  ,CPU Targets Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO137  ,CPU Targets Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO136  ,CPU Targets Byte Offset 136 "
group.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143  ,CPU Targets Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO142  ,CPU Targets Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO141  ,CPU Targets Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO140  ,CPU Targets Byte Offset 140 "
group.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147  ,CPU Targets Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO146  ,CPU Targets Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO145  ,CPU Targets Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO144  ,CPU Targets Byte Offset 144 "
group.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151  ,CPU Targets Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO150  ,CPU Targets Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO149  ,CPU Targets Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO148  ,CPU Targets Byte Offset 148 "
group.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155  ,CPU Targets Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO154  ,CPU Targets Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO153  ,CPU Targets Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO152  ,CPU Targets Byte Offset 152 "
group.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159  ,CPU Targets Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO158  ,CPU Targets Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO157  ,CPU Targets Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO156  ,CPU Targets Byte Offset 156 "
else
rgroup.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
rgroup.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
rgroup.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
rgroup.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
rgroup.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
rgroup.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
rgroup.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
rgroup.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
group.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163  ,CPU Targets Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO162  ,CPU Targets Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO161  ,CPU Targets Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO160  ,CPU Targets Byte Offset 160 "
group.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167  ,CPU Targets Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO166  ,CPU Targets Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO165  ,CPU Targets Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO164  ,CPU Targets Byte Offset 164 "
group.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171  ,CPU Targets Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO170  ,CPU Targets Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO169  ,CPU Targets Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO168  ,CPU Targets Byte Offset 168 "
group.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175  ,CPU Targets Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO174  ,CPU Targets Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO173  ,CPU Targets Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO172  ,CPU Targets Byte Offset 172 "
group.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179  ,CPU Targets Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO178  ,CPU Targets Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO177  ,CPU Targets Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO176  ,CPU Targets Byte Offset 176 "
group.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183  ,CPU Targets Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO182  ,CPU Targets Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO181  ,CPU Targets Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO180  ,CPU Targets Byte Offset 180 "
group.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187  ,CPU Targets Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO186  ,CPU Targets Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO185  ,CPU Targets Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO184  ,CPU Targets Byte Offset 184 "
group.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191  ,CPU Targets Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO190  ,CPU Targets Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO189  ,CPU Targets Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO188  ,CPU Targets Byte Offset 188 "
else
rgroup.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
rgroup.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
rgroup.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
rgroup.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
rgroup.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
rgroup.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
rgroup.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
rgroup.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
group.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195  ,CPU Targets Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO194  ,CPU Targets Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO193  ,CPU Targets Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO192  ,CPU Targets Byte Offset 192 "
group.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199  ,CPU Targets Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO198  ,CPU Targets Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO197  ,CPU Targets Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO196  ,CPU Targets Byte Offset 196 "
group.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203  ,CPU Targets Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO202  ,CPU Targets Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO201  ,CPU Targets Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO200  ,CPU Targets Byte Offset 200 "
group.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207  ,CPU Targets Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO206  ,CPU Targets Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO205  ,CPU Targets Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO204  ,CPU Targets Byte Offset 204 "
group.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211  ,CPU Targets Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO210  ,CPU Targets Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO209  ,CPU Targets Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO208  ,CPU Targets Byte Offset 208 "
group.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215  ,CPU Targets Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO214  ,CPU Targets Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO213  ,CPU Targets Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO212  ,CPU Targets Byte Offset 212 "
group.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219  ,CPU Targets Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO218  ,CPU Targets Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO217  ,CPU Targets Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO216  ,CPU Targets Byte Offset 216 "
group.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223  ,CPU Targets Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO222  ,CPU Targets Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO221  ,CPU Targets Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO220  ,CPU Targets Byte Offset 220 "
else
rgroup.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
rgroup.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
rgroup.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
rgroup.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
rgroup.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
rgroup.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
rgroup.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
rgroup.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
group.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227  ,CPU Targets Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO226  ,CPU Targets Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO225  ,CPU Targets Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO224  ,CPU Targets Byte Offset 224 "
group.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231  ,CPU Targets Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO230  ,CPU Targets Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO229  ,CPU Targets Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO228  ,CPU Targets Byte Offset 228 "
group.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235  ,CPU Targets Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO234  ,CPU Targets Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO233  ,CPU Targets Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO232  ,CPU Targets Byte Offset 232 "
group.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239  ,CPU Targets Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO238  ,CPU Targets Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO237  ,CPU Targets Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO236  ,CPU Targets Byte Offset 236 "
group.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243  ,CPU Targets Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO242  ,CPU Targets Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO241  ,CPU Targets Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO240  ,CPU Targets Byte Offset 240 "
group.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247  ,CPU Targets Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO246  ,CPU Targets Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO245  ,CPU Targets Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO244  ,CPU Targets Byte Offset 244 "
group.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251  ,CPU Targets Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO250  ,CPU Targets Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO249  ,CPU Targets Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO248  ,CPU Targets Byte Offset 248 "
group.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255  ,CPU Targets Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO254  ,CPU Targets Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO253  ,CPU Targets Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO252  ,CPU Targets Byte Offset 252 "
else
rgroup.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
rgroup.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
rgroup.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
rgroup.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
rgroup.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
rgroup.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
rgroup.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
rgroup.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
group.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259  ,CPU Targets Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO258  ,CPU Targets Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO257  ,CPU Targets Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO256  ,CPU Targets Byte Offset 256 "
group.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263  ,CPU Targets Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO262  ,CPU Targets Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO261  ,CPU Targets Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO260  ,CPU Targets Byte Offset 260 "
group.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267  ,CPU Targets Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO266  ,CPU Targets Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO265  ,CPU Targets Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO264  ,CPU Targets Byte Offset 264 "
group.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271  ,CPU Targets Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO270  ,CPU Targets Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO269  ,CPU Targets Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO268  ,CPU Targets Byte Offset 268 "
group.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275  ,CPU Targets Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO274  ,CPU Targets Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO273  ,CPU Targets Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO272  ,CPU Targets Byte Offset 272 "
group.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279  ,CPU Targets Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO278  ,CPU Targets Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO277  ,CPU Targets Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO276  ,CPU Targets Byte Offset 276 "
group.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283  ,CPU Targets Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO282  ,CPU Targets Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO281  ,CPU Targets Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO280  ,CPU Targets Byte Offset 280 "
group.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287  ,CPU Targets Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO286  ,CPU Targets Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO285  ,CPU Targets Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO284  ,CPU Targets Byte Offset 284 "
else
rgroup.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
rgroup.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
rgroup.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
rgroup.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
rgroup.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
rgroup.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
rgroup.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
rgroup.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
group.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291  ,CPU Targets Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO290  ,CPU Targets Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO289  ,CPU Targets Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO288  ,CPU Targets Byte Offset 288 "
group.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295  ,CPU Targets Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO294  ,CPU Targets Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO293  ,CPU Targets Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO292  ,CPU Targets Byte Offset 292 "
group.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299  ,CPU Targets Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO298  ,CPU Targets Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO297  ,CPU Targets Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO296  ,CPU Targets Byte Offset 296 "
group.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303  ,CPU Targets Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO302  ,CPU Targets Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO301  ,CPU Targets Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO300  ,CPU Targets Byte Offset 300 "
group.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307  ,CPU Targets Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO306  ,CPU Targets Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO305  ,CPU Targets Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO304  ,CPU Targets Byte Offset 304 "
group.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311  ,CPU Targets Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO310  ,CPU Targets Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO309  ,CPU Targets Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO308  ,CPU Targets Byte Offset 308 "
group.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315  ,CPU Targets Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO314  ,CPU Targets Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO313  ,CPU Targets Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO312  ,CPU Targets Byte Offset 312 "
group.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319  ,CPU Targets Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO318  ,CPU Targets Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO317  ,CPU Targets Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO316  ,CPU Targets Byte Offset 316 "
else
rgroup.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
rgroup.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
rgroup.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
rgroup.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
rgroup.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
rgroup.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
rgroup.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
rgroup.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
group.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323  ,CPU Targets Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO322  ,CPU Targets Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO321  ,CPU Targets Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO320  ,CPU Targets Byte Offset 320 "
group.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327  ,CPU Targets Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO326  ,CPU Targets Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO325  ,CPU Targets Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO324  ,CPU Targets Byte Offset 324 "
group.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331  ,CPU Targets Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO330  ,CPU Targets Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO329  ,CPU Targets Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO328  ,CPU Targets Byte Offset 328 "
group.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335  ,CPU Targets Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO334  ,CPU Targets Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO333  ,CPU Targets Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO332  ,CPU Targets Byte Offset 332 "
group.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339  ,CPU Targets Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO338  ,CPU Targets Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO337  ,CPU Targets Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO336  ,CPU Targets Byte Offset 336 "
group.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343  ,CPU Targets Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO342  ,CPU Targets Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO341  ,CPU Targets Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO340  ,CPU Targets Byte Offset 340 "
group.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347  ,CPU Targets Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO346  ,CPU Targets Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO345  ,CPU Targets Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO344  ,CPU Targets Byte Offset 344 "
group.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351  ,CPU Targets Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO350  ,CPU Targets Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO349  ,CPU Targets Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO348  ,CPU Targets Byte Offset 348 "
else
rgroup.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
rgroup.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
rgroup.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
rgroup.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
rgroup.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
rgroup.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
rgroup.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
rgroup.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
group.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355  ,CPU Targets Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO354  ,CPU Targets Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO353  ,CPU Targets Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO352  ,CPU Targets Byte Offset 352 "
group.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359  ,CPU Targets Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO358  ,CPU Targets Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO357  ,CPU Targets Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO356  ,CPU Targets Byte Offset 356 "
group.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363  ,CPU Targets Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO362  ,CPU Targets Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO361  ,CPU Targets Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO360  ,CPU Targets Byte Offset 360 "
group.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367  ,CPU Targets Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO366  ,CPU Targets Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO365  ,CPU Targets Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO364  ,CPU Targets Byte Offset 364 "
group.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371  ,CPU Targets Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO370  ,CPU Targets Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO369  ,CPU Targets Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO368  ,CPU Targets Byte Offset 368 "
group.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375  ,CPU Targets Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO374  ,CPU Targets Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO373  ,CPU Targets Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO372  ,CPU Targets Byte Offset 372 "
group.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379  ,CPU Targets Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO378  ,CPU Targets Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO377  ,CPU Targets Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO376  ,CPU Targets Byte Offset 376 "
group.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383  ,CPU Targets Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO382  ,CPU Targets Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO381  ,CPU Targets Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO380  ,CPU Targets Byte Offset 380 "
else
rgroup.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
rgroup.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
rgroup.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
rgroup.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
rgroup.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
rgroup.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
rgroup.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
rgroup.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
group.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387  ,CPU Targets Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO386  ,CPU Targets Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO385  ,CPU Targets Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO384  ,CPU Targets Byte Offset 384 "
group.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391  ,CPU Targets Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO390  ,CPU Targets Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO389  ,CPU Targets Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO388  ,CPU Targets Byte Offset 388 "
group.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395  ,CPU Targets Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO394  ,CPU Targets Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO393  ,CPU Targets Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO392  ,CPU Targets Byte Offset 392 "
group.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399  ,CPU Targets Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO398  ,CPU Targets Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO397  ,CPU Targets Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO396  ,CPU Targets Byte Offset 396 "
group.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403  ,CPU Targets Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO402  ,CPU Targets Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO401  ,CPU Targets Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO400  ,CPU Targets Byte Offset 400 "
group.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407  ,CPU Targets Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO406  ,CPU Targets Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO405  ,CPU Targets Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO404  ,CPU Targets Byte Offset 404 "
group.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411  ,CPU Targets Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO410  ,CPU Targets Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO409  ,CPU Targets Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO408  ,CPU Targets Byte Offset 408 "
group.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415  ,CPU Targets Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO414  ,CPU Targets Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO413  ,CPU Targets Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO412  ,CPU Targets Byte Offset 412 "
else
rgroup.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
rgroup.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
rgroup.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
rgroup.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
rgroup.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
rgroup.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
rgroup.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
rgroup.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
group.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419  ,CPU Targets Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO418  ,CPU Targets Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO417  ,CPU Targets Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO416  ,CPU Targets Byte Offset 416 "
group.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423  ,CPU Targets Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO422  ,CPU Targets Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO421  ,CPU Targets Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO420  ,CPU Targets Byte Offset 420 "
group.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427  ,CPU Targets Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO426  ,CPU Targets Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO425  ,CPU Targets Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO424  ,CPU Targets Byte Offset 424 "
group.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431  ,CPU Targets Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO430  ,CPU Targets Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO429  ,CPU Targets Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO428  ,CPU Targets Byte Offset 428 "
group.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435  ,CPU Targets Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO434  ,CPU Targets Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO433  ,CPU Targets Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO432  ,CPU Targets Byte Offset 432 "
group.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439  ,CPU Targets Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO438  ,CPU Targets Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO437  ,CPU Targets Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO436  ,CPU Targets Byte Offset 436 "
group.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443  ,CPU Targets Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO442  ,CPU Targets Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO441  ,CPU Targets Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO440  ,CPU Targets Byte Offset 440 "
group.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447  ,CPU Targets Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO446  ,CPU Targets Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO445  ,CPU Targets Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO444  ,CPU Targets Byte Offset 444 "
else
rgroup.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
rgroup.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
rgroup.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
rgroup.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
rgroup.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
rgroup.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
rgroup.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
rgroup.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
group.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451  ,CPU Targets Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO450  ,CPU Targets Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO449  ,CPU Targets Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO448  ,CPU Targets Byte Offset 448 "
group.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455  ,CPU Targets Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO454  ,CPU Targets Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO453  ,CPU Targets Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO452  ,CPU Targets Byte Offset 452 "
group.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459  ,CPU Targets Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO458  ,CPU Targets Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO457  ,CPU Targets Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO456  ,CPU Targets Byte Offset 456 "
group.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463  ,CPU Targets Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO462  ,CPU Targets Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO461  ,CPU Targets Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO460  ,CPU Targets Byte Offset 460 "
group.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467  ,CPU Targets Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO466  ,CPU Targets Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO465  ,CPU Targets Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO464  ,CPU Targets Byte Offset 464 "
group.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471  ,CPU Targets Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO470  ,CPU Targets Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO469  ,CPU Targets Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO468  ,CPU Targets Byte Offset 468 "
group.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475  ,CPU Targets Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO474  ,CPU Targets Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO473  ,CPU Targets Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO472  ,CPU Targets Byte Offset 472 "
group.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479  ,CPU Targets Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO478  ,CPU Targets Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO477  ,CPU Targets Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO476  ,CPU Targets Byte Offset 476 "
else
rgroup.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
rgroup.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
rgroup.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
rgroup.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
rgroup.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
rgroup.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
rgroup.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
rgroup.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
group.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483  ,CPU Targets Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO482  ,CPU Targets Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO481  ,CPU Targets Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO480  ,CPU Targets Byte Offset 480 "
group.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487  ,CPU Targets Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO486  ,CPU Targets Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO485  ,CPU Targets Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO484  ,CPU Targets Byte Offset 484 "
group.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491  ,CPU Targets Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO490  ,CPU Targets Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO489  ,CPU Targets Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO488  ,CPU Targets Byte Offset 488 "
group.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495  ,CPU Targets Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO494  ,CPU Targets Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO493  ,CPU Targets Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO492  ,CPU Targets Byte Offset 492 "
group.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499  ,CPU Targets Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO498  ,CPU Targets Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO497  ,CPU Targets Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO496  ,CPU Targets Byte Offset 496 "
group.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503  ,CPU Targets Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO502  ,CPU Targets Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO501  ,CPU Targets Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO500  ,CPU Targets Byte Offset 500 "
group.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507  ,CPU Targets Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO506  ,CPU Targets Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO505  ,CPU Targets Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO504  ,CPU Targets Byte Offset 504 "
group.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511  ,CPU Targets Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO510  ,CPU Targets Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO509  ,CPU Targets Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO508  ,CPU Targets Byte Offset 508 "
else
rgroup.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
rgroup.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
rgroup.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
rgroup.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
rgroup.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
rgroup.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
rgroup.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
rgroup.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515  ,CPU Targets Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO514  ,CPU Targets Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO513  ,CPU Targets Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO512  ,CPU Targets Byte Offset 512 "
group.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519  ,CPU Targets Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO518  ,CPU Targets Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO517  ,CPU Targets Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO516  ,CPU Targets Byte Offset 516 "
group.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523  ,CPU Targets Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO522  ,CPU Targets Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO521  ,CPU Targets Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO520  ,CPU Targets Byte Offset 520 "
group.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527  ,CPU Targets Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO526  ,CPU Targets Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO525  ,CPU Targets Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO524  ,CPU Targets Byte Offset 524 "
group.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531  ,CPU Targets Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO530  ,CPU Targets Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO529  ,CPU Targets Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO528  ,CPU Targets Byte Offset 528 "
group.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535  ,CPU Targets Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO534  ,CPU Targets Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO533  ,CPU Targets Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO532  ,CPU Targets Byte Offset 532 "
group.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539  ,CPU Targets Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO538  ,CPU Targets Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO537  ,CPU Targets Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO536  ,CPU Targets Byte Offset 536 "
group.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543  ,CPU Targets Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO542  ,CPU Targets Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO541  ,CPU Targets Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO540  ,CPU Targets Byte Offset 540 "
else
rgroup.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
rgroup.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
rgroup.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
rgroup.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
rgroup.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
rgroup.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
rgroup.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
rgroup.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547  ,CPU Targets Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO546  ,CPU Targets Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO545  ,CPU Targets Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO544  ,CPU Targets Byte Offset 544 "
group.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551  ,CPU Targets Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO550  ,CPU Targets Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO549  ,CPU Targets Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO548  ,CPU Targets Byte Offset 548 "
group.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555  ,CPU Targets Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO554  ,CPU Targets Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO553  ,CPU Targets Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO552  ,CPU Targets Byte Offset 552 "
group.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559  ,CPU Targets Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO558  ,CPU Targets Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO557  ,CPU Targets Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO556  ,CPU Targets Byte Offset 556 "
group.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563  ,CPU Targets Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO562  ,CPU Targets Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO561  ,CPU Targets Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO560  ,CPU Targets Byte Offset 560 "
group.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567  ,CPU Targets Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO566  ,CPU Targets Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO565  ,CPU Targets Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO564  ,CPU Targets Byte Offset 564 "
group.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571  ,CPU Targets Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO570  ,CPU Targets Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO569  ,CPU Targets Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO568  ,CPU Targets Byte Offset 568 "
group.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575  ,CPU Targets Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO574  ,CPU Targets Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO573  ,CPU Targets Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO572  ,CPU Targets Byte Offset 572 "
else
rgroup.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
rgroup.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
rgroup.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
rgroup.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
rgroup.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
rgroup.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
rgroup.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
rgroup.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579  ,CPU Targets Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO578  ,CPU Targets Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO577  ,CPU Targets Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO576  ,CPU Targets Byte Offset 576 "
group.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583  ,CPU Targets Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO582  ,CPU Targets Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO581  ,CPU Targets Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO580  ,CPU Targets Byte Offset 580 "
group.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587  ,CPU Targets Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO586  ,CPU Targets Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO585  ,CPU Targets Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO584  ,CPU Targets Byte Offset 584 "
group.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591  ,CPU Targets Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO590  ,CPU Targets Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO589  ,CPU Targets Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO588  ,CPU Targets Byte Offset 588 "
group.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595  ,CPU Targets Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO594  ,CPU Targets Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO593  ,CPU Targets Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO592  ,CPU Targets Byte Offset 592 "
group.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599  ,CPU Targets Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO598  ,CPU Targets Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO597  ,CPU Targets Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO596  ,CPU Targets Byte Offset 596 "
group.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603  ,CPU Targets Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO602  ,CPU Targets Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO601  ,CPU Targets Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO600  ,CPU Targets Byte Offset 600 "
group.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607  ,CPU Targets Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO606  ,CPU Targets Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO605  ,CPU Targets Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO604  ,CPU Targets Byte Offset 604 "
else
rgroup.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
rgroup.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
rgroup.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
rgroup.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
rgroup.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
rgroup.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
rgroup.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
rgroup.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611  ,CPU Targets Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO610  ,CPU Targets Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO609  ,CPU Targets Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO608  ,CPU Targets Byte Offset 608 "
group.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615  ,CPU Targets Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO614  ,CPU Targets Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO613  ,CPU Targets Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO612  ,CPU Targets Byte Offset 612 "
group.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619  ,CPU Targets Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO618  ,CPU Targets Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO617  ,CPU Targets Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO616  ,CPU Targets Byte Offset 616 "
group.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623  ,CPU Targets Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO622  ,CPU Targets Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO621  ,CPU Targets Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO620  ,CPU Targets Byte Offset 620 "
group.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627  ,CPU Targets Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO626  ,CPU Targets Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO625  ,CPU Targets Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO624  ,CPU Targets Byte Offset 624 "
group.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631  ,CPU Targets Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO630  ,CPU Targets Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO629  ,CPU Targets Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO628  ,CPU Targets Byte Offset 628 "
group.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635  ,CPU Targets Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO634  ,CPU Targets Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO633  ,CPU Targets Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO632  ,CPU Targets Byte Offset 632 "
group.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639  ,CPU Targets Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO638  ,CPU Targets Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO637  ,CPU Targets Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO636  ,CPU Targets Byte Offset 636 "
else
rgroup.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
rgroup.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
rgroup.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
rgroup.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
rgroup.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
rgroup.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
rgroup.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
rgroup.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643  ,CPU Targets Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO642  ,CPU Targets Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO641  ,CPU Targets Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO640  ,CPU Targets Byte Offset 640 "
group.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647  ,CPU Targets Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO646  ,CPU Targets Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO645  ,CPU Targets Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO644  ,CPU Targets Byte Offset 644 "
group.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651  ,CPU Targets Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO650  ,CPU Targets Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO649  ,CPU Targets Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO648  ,CPU Targets Byte Offset 648 "
group.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655  ,CPU Targets Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO654  ,CPU Targets Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO653  ,CPU Targets Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO652  ,CPU Targets Byte Offset 652 "
group.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659  ,CPU Targets Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO658  ,CPU Targets Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO657  ,CPU Targets Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO656  ,CPU Targets Byte Offset 656 "
group.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663  ,CPU Targets Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO662  ,CPU Targets Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO661  ,CPU Targets Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO660  ,CPU Targets Byte Offset 660 "
group.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667  ,CPU Targets Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO666  ,CPU Targets Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO665  ,CPU Targets Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO664  ,CPU Targets Byte Offset 664 "
group.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671  ,CPU Targets Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO670  ,CPU Targets Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO669  ,CPU Targets Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO668  ,CPU Targets Byte Offset 668 "
else
rgroup.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
rgroup.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
rgroup.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
rgroup.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
rgroup.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
rgroup.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
rgroup.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
rgroup.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675  ,CPU Targets Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO674  ,CPU Targets Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO673  ,CPU Targets Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO672  ,CPU Targets Byte Offset 672 "
group.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679  ,CPU Targets Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO678  ,CPU Targets Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO677  ,CPU Targets Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO676  ,CPU Targets Byte Offset 676 "
group.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683  ,CPU Targets Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO682  ,CPU Targets Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO681  ,CPU Targets Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO680  ,CPU Targets Byte Offset 680 "
group.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687  ,CPU Targets Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO686  ,CPU Targets Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO685  ,CPU Targets Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO684  ,CPU Targets Byte Offset 684 "
group.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691  ,CPU Targets Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO690  ,CPU Targets Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO689  ,CPU Targets Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO688  ,CPU Targets Byte Offset 688 "
group.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695  ,CPU Targets Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO694  ,CPU Targets Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO693  ,CPU Targets Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO692  ,CPU Targets Byte Offset 692 "
group.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699  ,CPU Targets Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO698  ,CPU Targets Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO697  ,CPU Targets Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO696  ,CPU Targets Byte Offset 696 "
group.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703  ,CPU Targets Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO702  ,CPU Targets Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO701  ,CPU Targets Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO700  ,CPU Targets Byte Offset 700 "
else
rgroup.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
rgroup.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
rgroup.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
rgroup.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
rgroup.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
rgroup.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
rgroup.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
rgroup.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707  ,CPU Targets Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO706  ,CPU Targets Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO705  ,CPU Targets Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO704  ,CPU Targets Byte Offset 704 "
group.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711  ,CPU Targets Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO710  ,CPU Targets Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO709  ,CPU Targets Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO708  ,CPU Targets Byte Offset 708 "
group.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715  ,CPU Targets Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO714  ,CPU Targets Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO713  ,CPU Targets Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO712  ,CPU Targets Byte Offset 712 "
group.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719  ,CPU Targets Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO718  ,CPU Targets Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO717  ,CPU Targets Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO716  ,CPU Targets Byte Offset 716 "
group.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723  ,CPU Targets Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO722  ,CPU Targets Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO721  ,CPU Targets Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO720  ,CPU Targets Byte Offset 720 "
group.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727  ,CPU Targets Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO726  ,CPU Targets Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO725  ,CPU Targets Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO724  ,CPU Targets Byte Offset 724 "
group.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731  ,CPU Targets Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO730  ,CPU Targets Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO729  ,CPU Targets Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO728  ,CPU Targets Byte Offset 728 "
group.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735  ,CPU Targets Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO734  ,CPU Targets Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO733  ,CPU Targets Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO732  ,CPU Targets Byte Offset 732 "
else
rgroup.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
rgroup.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
rgroup.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
rgroup.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
rgroup.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
rgroup.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
rgroup.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
rgroup.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739  ,CPU Targets Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO738  ,CPU Targets Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO737  ,CPU Targets Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO736  ,CPU Targets Byte Offset 736 "
group.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743  ,CPU Targets Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO742  ,CPU Targets Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO741  ,CPU Targets Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO740  ,CPU Targets Byte Offset 740 "
group.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747  ,CPU Targets Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO746  ,CPU Targets Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO745  ,CPU Targets Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO744  ,CPU Targets Byte Offset 744 "
group.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751  ,CPU Targets Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO750  ,CPU Targets Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO749  ,CPU Targets Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO748  ,CPU Targets Byte Offset 748 "
group.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755  ,CPU Targets Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO754  ,CPU Targets Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO753  ,CPU Targets Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO752  ,CPU Targets Byte Offset 752 "
group.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759  ,CPU Targets Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO758  ,CPU Targets Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO757  ,CPU Targets Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO756  ,CPU Targets Byte Offset 756 "
group.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763  ,CPU Targets Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO762  ,CPU Targets Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO761  ,CPU Targets Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO760  ,CPU Targets Byte Offset 760 "
group.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767  ,CPU Targets Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO766  ,CPU Targets Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO765  ,CPU Targets Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO764  ,CPU Targets Byte Offset 764 "
else
rgroup.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
rgroup.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
rgroup.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
rgroup.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
rgroup.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
rgroup.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
rgroup.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
rgroup.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771  ,CPU Targets Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO770  ,CPU Targets Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO769  ,CPU Targets Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO768  ,CPU Targets Byte Offset 768 "
group.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775  ,CPU Targets Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO774  ,CPU Targets Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO773  ,CPU Targets Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO772  ,CPU Targets Byte Offset 772 "
group.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779  ,CPU Targets Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO778  ,CPU Targets Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO777  ,CPU Targets Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO776  ,CPU Targets Byte Offset 776 "
group.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783  ,CPU Targets Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO782  ,CPU Targets Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO781  ,CPU Targets Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO780  ,CPU Targets Byte Offset 780 "
group.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787  ,CPU Targets Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO786  ,CPU Targets Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO785  ,CPU Targets Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO784  ,CPU Targets Byte Offset 784 "
group.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791  ,CPU Targets Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO790  ,CPU Targets Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO789  ,CPU Targets Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO788  ,CPU Targets Byte Offset 788 "
group.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795  ,CPU Targets Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO794  ,CPU Targets Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO793  ,CPU Targets Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO792  ,CPU Targets Byte Offset 792 "
group.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799  ,CPU Targets Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO798  ,CPU Targets Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO797  ,CPU Targets Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO796  ,CPU Targets Byte Offset 796 "
else
rgroup.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
rgroup.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
rgroup.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
rgroup.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
rgroup.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
rgroup.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
rgroup.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
rgroup.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803  ,CPU Targets Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO802  ,CPU Targets Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO801  ,CPU Targets Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO800  ,CPU Targets Byte Offset 800 "
group.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807  ,CPU Targets Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO806  ,CPU Targets Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO805  ,CPU Targets Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO804  ,CPU Targets Byte Offset 804 "
group.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811  ,CPU Targets Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO810  ,CPU Targets Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO809  ,CPU Targets Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO808  ,CPU Targets Byte Offset 808 "
group.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815  ,CPU Targets Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO814  ,CPU Targets Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO813  ,CPU Targets Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO812  ,CPU Targets Byte Offset 812 "
group.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819  ,CPU Targets Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO818  ,CPU Targets Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO817  ,CPU Targets Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO816  ,CPU Targets Byte Offset 816 "
group.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823  ,CPU Targets Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO822  ,CPU Targets Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO821  ,CPU Targets Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO820  ,CPU Targets Byte Offset 820 "
group.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827  ,CPU Targets Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO826  ,CPU Targets Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO825  ,CPU Targets Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO824  ,CPU Targets Byte Offset 824 "
group.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831  ,CPU Targets Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO830  ,CPU Targets Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO829  ,CPU Targets Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO828  ,CPU Targets Byte Offset 828 "
else
rgroup.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
rgroup.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
rgroup.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
rgroup.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
rgroup.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
rgroup.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
rgroup.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
rgroup.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835  ,CPU Targets Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO834  ,CPU Targets Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO833  ,CPU Targets Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO832  ,CPU Targets Byte Offset 832 "
group.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839  ,CPU Targets Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO838  ,CPU Targets Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO837  ,CPU Targets Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO836  ,CPU Targets Byte Offset 836 "
group.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843  ,CPU Targets Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO842  ,CPU Targets Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO841  ,CPU Targets Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO840  ,CPU Targets Byte Offset 840 "
group.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847  ,CPU Targets Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO846  ,CPU Targets Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO845  ,CPU Targets Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO844  ,CPU Targets Byte Offset 844 "
group.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851  ,CPU Targets Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO850  ,CPU Targets Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO849  ,CPU Targets Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO848  ,CPU Targets Byte Offset 848 "
group.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855  ,CPU Targets Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO854  ,CPU Targets Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO853  ,CPU Targets Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO852  ,CPU Targets Byte Offset 852 "
group.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859  ,CPU Targets Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO858  ,CPU Targets Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO857  ,CPU Targets Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO856  ,CPU Targets Byte Offset 856 "
group.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863  ,CPU Targets Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO862  ,CPU Targets Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO861  ,CPU Targets Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO860  ,CPU Targets Byte Offset 860 "
else
rgroup.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
rgroup.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
rgroup.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
rgroup.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
rgroup.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
rgroup.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
rgroup.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
rgroup.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867  ,CPU Targets Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO866  ,CPU Targets Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO865  ,CPU Targets Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO864  ,CPU Targets Byte Offset 864 "
group.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871  ,CPU Targets Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO870  ,CPU Targets Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO869  ,CPU Targets Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO868  ,CPU Targets Byte Offset 868 "
group.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875  ,CPU Targets Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO874  ,CPU Targets Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO873  ,CPU Targets Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO872  ,CPU Targets Byte Offset 872 "
group.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879  ,CPU Targets Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO878  ,CPU Targets Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO877  ,CPU Targets Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO876  ,CPU Targets Byte Offset 876 "
group.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883  ,CPU Targets Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO882  ,CPU Targets Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO881  ,CPU Targets Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO880  ,CPU Targets Byte Offset 880 "
group.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887  ,CPU Targets Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO886  ,CPU Targets Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO885  ,CPU Targets Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO884  ,CPU Targets Byte Offset 884 "
group.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891  ,CPU Targets Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO890  ,CPU Targets Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO889  ,CPU Targets Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO888  ,CPU Targets Byte Offset 888 "
group.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895  ,CPU Targets Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO894  ,CPU Targets Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO893  ,CPU Targets Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO892  ,CPU Targets Byte Offset 892 "
else
rgroup.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
rgroup.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
rgroup.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
rgroup.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
rgroup.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
rgroup.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
rgroup.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
rgroup.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899  ,CPU Targets Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO898  ,CPU Targets Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO897  ,CPU Targets Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO896  ,CPU Targets Byte Offset 896 "
group.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903  ,CPU Targets Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO902  ,CPU Targets Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO901  ,CPU Targets Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO900  ,CPU Targets Byte Offset 900 "
group.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907  ,CPU Targets Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO906  ,CPU Targets Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO905  ,CPU Targets Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO904  ,CPU Targets Byte Offset 904 "
group.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911  ,CPU Targets Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO910  ,CPU Targets Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO909  ,CPU Targets Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO908  ,CPU Targets Byte Offset 908 "
group.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915  ,CPU Targets Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO914  ,CPU Targets Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO913  ,CPU Targets Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO912  ,CPU Targets Byte Offset 912 "
group.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919  ,CPU Targets Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO918  ,CPU Targets Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO917  ,CPU Targets Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO916  ,CPU Targets Byte Offset 916 "
group.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923  ,CPU Targets Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO922  ,CPU Targets Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO921  ,CPU Targets Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO920  ,CPU Targets Byte Offset 920 "
group.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927  ,CPU Targets Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO926  ,CPU Targets Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO925  ,CPU Targets Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO924  ,CPU Targets Byte Offset 924 "
else
rgroup.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
rgroup.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
rgroup.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
rgroup.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
rgroup.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
rgroup.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
rgroup.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
rgroup.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931  ,CPU Targets Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO930  ,CPU Targets Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO929  ,CPU Targets Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO928  ,CPU Targets Byte Offset 928 "
group.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935  ,CPU Targets Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO934  ,CPU Targets Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO933  ,CPU Targets Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO932  ,CPU Targets Byte Offset 932 "
group.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939  ,CPU Targets Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO938  ,CPU Targets Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO937  ,CPU Targets Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO936  ,CPU Targets Byte Offset 936 "
group.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943  ,CPU Targets Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO942  ,CPU Targets Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO941  ,CPU Targets Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO940  ,CPU Targets Byte Offset 940 "
group.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947  ,CPU Targets Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO946  ,CPU Targets Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO945  ,CPU Targets Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO944  ,CPU Targets Byte Offset 944 "
group.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951  ,CPU Targets Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO950  ,CPU Targets Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO949  ,CPU Targets Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO948  ,CPU Targets Byte Offset 948 "
group.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955  ,CPU Targets Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO954  ,CPU Targets Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO953  ,CPU Targets Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO952  ,CPU Targets Byte Offset 952 "
group.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959  ,CPU Targets Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO958  ,CPU Targets Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO957  ,CPU Targets Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO956  ,CPU Targets Byte Offset 956 "
else
rgroup.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
rgroup.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
rgroup.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
rgroup.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
rgroup.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
rgroup.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
rgroup.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
rgroup.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963  ,CPU Targets Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO962  ,CPU Targets Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO961  ,CPU Targets Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO960  ,CPU Targets Byte Offset 960 "
group.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967  ,CPU Targets Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO966  ,CPU Targets Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO965  ,CPU Targets Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO964  ,CPU Targets Byte Offset 964 "
group.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971  ,CPU Targets Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO970  ,CPU Targets Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO969  ,CPU Targets Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO968  ,CPU Targets Byte Offset 968 "
group.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975  ,CPU Targets Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO974  ,CPU Targets Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO973  ,CPU Targets Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO972  ,CPU Targets Byte Offset 972 "
group.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979  ,CPU Targets Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO978  ,CPU Targets Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO977  ,CPU Targets Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO976  ,CPU Targets Byte Offset 976 "
group.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983  ,CPU Targets Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO982  ,CPU Targets Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO981  ,CPU Targets Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO980  ,CPU Targets Byte Offset 980 "
group.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987  ,CPU Targets Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO986  ,CPU Targets Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO985  ,CPU Targets Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO984  ,CPU Targets Byte Offset 984 "
group.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991  ,CPU Targets Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO990  ,CPU Targets Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO989  ,CPU Targets Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO988  ,CPU Targets Byte Offset 988 "
else
rgroup.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
rgroup.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
rgroup.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
rgroup.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
rgroup.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
rgroup.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
rgroup.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
rgroup.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1F)
group.long 0xBE0++0x03
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995  ,CPU Targets Byte Offset 995 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO994  ,CPU Targets Byte Offset 994 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO993  ,CPU Targets Byte Offset 993 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO992  ,CPU Targets Byte Offset 992 "
group.long 0xBE4++0x03
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999  ,CPU Targets Byte Offset 999 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO998  ,CPU Targets Byte Offset 998 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO997  ,CPU Targets Byte Offset 997 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO996  ,CPU Targets Byte Offset 996 "
group.long 0xBE8++0x03
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003"
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO1002 ,CPU Targets Byte Offset 1002"
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1001 ,CPU Targets Byte Offset 1001"
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO1000 ,CPU Targets Byte Offset 1000"
group.long 0xBEC++0x03
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007"
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO1006 ,CPU Targets Byte Offset 1006"
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1005 ,CPU Targets Byte Offset 1005"
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO1004 ,CPU Targets Byte Offset 1004"
group.long 0xBF0++0x03
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011"
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO1010 ,CPU Targets Byte Offset 1010"
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1009 ,CPU Targets Byte Offset 1009"
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO1008 ,CPU Targets Byte Offset 1008"
group.long 0xBF4++0x03
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015"
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO1014 ,CPU Targets Byte Offset 1014"
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1013 ,CPU Targets Byte Offset 1013"
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO1012 ,CPU Targets Byte Offset 1012"
group.long 0xBF8++0x03
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019"
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO1018 ,CPU Targets Byte Offset 1018"
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO1017 ,CPU Targets Byte Offset 1017"
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO1016 ,CPU Targets Byte Offset 1016"
else
rgroup.long 0xBE0++0x03
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
rgroup.long 0xBE4++0x03
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
rgroup.long 0xBE8++0x03
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
rgroup.long 0xBEC++0x03
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
rgroup.long 0xBF0++0x03
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
rgroup.long 0xBF4++0x03
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
rgroup.long 0xBF8++0x03
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
endif
else
rgroup.long 0x800++0x03
line.long 0x00 "GICD_ITARGETSR0  ,Interrupt Processor Targets Register 0  "
rgroup.long 0x804++0x03
line.long 0x00 "GICD_ITARGETSR1  ,Interrupt Processor Targets Register 1  "
rgroup.long 0x808++0x03
line.long 0x00 "GICD_ITARGETSR2  ,Interrupt Processor Targets Register 2  "
rgroup.long 0x80C++0x03
line.long 0x00 "GICD_ITARGETSR3  ,Interrupt Processor Targets Register 3  "
rgroup.long 0x810++0x03
line.long 0x00 "GICD_ITARGETSR4  ,Interrupt Processor Targets Register 4  "
rgroup.long 0x814++0x03
line.long 0x00 "GICD_ITARGETSR5  ,Interrupt Processor Targets Register 5  "
rgroup.long 0x818++0x03
line.long 0x00 "GICD_ITARGETSR6  ,Interrupt Processor Targets Register 6  "
rgroup.long 0x81C++0x03
line.long 0x00 "GICD_ITARGETSR7  ,Interrupt Processor Targets Register 7  "
rgroup.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8  ,Interrupt Processor Targets Register 8  "
rgroup.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9  ,Interrupt Processor Targets Register 9  "
rgroup.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
rgroup.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
rgroup.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
rgroup.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
rgroup.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
rgroup.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
rgroup.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
rgroup.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
rgroup.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
rgroup.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
rgroup.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
rgroup.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
rgroup.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
rgroup.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
rgroup.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
rgroup.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
rgroup.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
rgroup.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
rgroup.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
rgroup.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
rgroup.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
rgroup.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
rgroup.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
rgroup.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
rgroup.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
rgroup.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
rgroup.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
rgroup.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
rgroup.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
rgroup.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
rgroup.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
rgroup.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
rgroup.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
rgroup.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
rgroup.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
rgroup.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
rgroup.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
rgroup.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
rgroup.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
rgroup.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
rgroup.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
rgroup.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
rgroup.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
rgroup.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
rgroup.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
rgroup.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
rgroup.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
rgroup.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
rgroup.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
rgroup.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
rgroup.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
rgroup.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
rgroup.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
rgroup.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
rgroup.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
rgroup.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
rgroup.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
rgroup.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
rgroup.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
rgroup.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
rgroup.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
rgroup.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
rgroup.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
rgroup.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
rgroup.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
rgroup.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
rgroup.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
rgroup.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
rgroup.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
rgroup.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
rgroup.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
rgroup.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
rgroup.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
rgroup.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
rgroup.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
rgroup.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
rgroup.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
rgroup.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
rgroup.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
rgroup.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
rgroup.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
rgroup.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
rgroup.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
rgroup.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
rgroup.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
rgroup.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
rgroup.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
rgroup.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
rgroup.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
rgroup.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
rgroup.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
rgroup.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
rgroup.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
rgroup.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
rgroup.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
rgroup.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
rgroup.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
rgroup.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
rgroup.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
rgroup.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
rgroup.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
rgroup.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
rgroup.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
rgroup.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
rgroup.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
rgroup.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
rgroup.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
rgroup.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
rgroup.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
rgroup.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
rgroup.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
rgroup.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
rgroup.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
rgroup.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
rgroup.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
rgroup.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
rgroup.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
rgroup.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
rgroup.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
rgroup.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
rgroup.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
rgroup.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
rgroup.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
rgroup.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
rgroup.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
rgroup.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
rgroup.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
rgroup.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
rgroup.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
rgroup.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
rgroup.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
rgroup.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
rgroup.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
rgroup.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
rgroup.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
rgroup.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
rgroup.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
rgroup.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
rgroup.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
rgroup.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
rgroup.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
rgroup.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
rgroup.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
rgroup.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
rgroup.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
rgroup.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
rgroup.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
rgroup.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
rgroup.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
rgroup.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
rgroup.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
rgroup.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
rgroup.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
rgroup.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
rgroup.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
rgroup.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
rgroup.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
rgroup.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
rgroup.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
rgroup.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
rgroup.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
rgroup.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
rgroup.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
rgroup.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
rgroup.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
rgroup.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
rgroup.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
rgroup.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
rgroup.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
rgroup.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
rgroup.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
rgroup.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
rgroup.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
rgroup.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
rgroup.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
rgroup.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
rgroup.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
rgroup.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
rgroup.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
rgroup.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
rgroup.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
rgroup.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
rgroup.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
rgroup.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
rgroup.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
rgroup.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
rgroup.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
rgroup.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
rgroup.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
rgroup.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
rgroup.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
rgroup.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
rgroup.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
rgroup.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
rgroup.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
rgroup.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
rgroup.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
rgroup.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
rgroup.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
rgroup.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
rgroup.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
rgroup.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
rgroup.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
rgroup.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
rgroup.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
rgroup.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
rgroup.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
rgroup.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
rgroup.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
rgroup.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
rgroup.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
rgroup.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
rgroup.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
rgroup.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
rgroup.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
rgroup.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
rgroup.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
rgroup.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
rgroup.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
rgroup.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
rgroup.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
rgroup.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
rgroup.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
rgroup.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
rgroup.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
rgroup.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
rgroup.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
rgroup.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
rgroup.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
rgroup.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
rgroup.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
rgroup.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
rgroup.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
rgroup.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
rgroup.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
rgroup.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
rgroup.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
rgroup.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
rgroup.long 0xBE0++0x03
line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248"
rgroup.long 0xBE4++0x03
line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249"
rgroup.long 0xBE8++0x03
line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250"
rgroup.long 0xBEC++0x03
line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251"
rgroup.long 0xBF0++0x03
line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252"
rgroup.long 0xBF4++0x03
line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253"
rgroup.long 0xBF8++0x03
line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254"
endif
tree.end
width 14.
tree "Configuration Registers"
rgroup.long 0xC00++0x03
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
textline "                       "
rgroup.long 0xC04++0x03
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1)
group.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
rgroup.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x2)
group.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
rgroup.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x3)
group.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
rgroup.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x4)
group.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
rgroup.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x5)
group.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
rgroup.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x6)
group.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
rgroup.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x7)
group.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
rgroup.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x8)
group.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
rgroup.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x9)
group.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
rgroup.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xA)
group.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
rgroup.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xB)
group.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
rgroup.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xC)
group.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
rgroup.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xD)
group.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
rgroup.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xE)
group.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
rgroup.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0xF)
group.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
rgroup.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
group.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
rgroup.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
group.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
rgroup.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
group.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
rgroup.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
group.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
rgroup.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
group.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
rgroup.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
group.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
rgroup.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
group.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
rgroup.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
group.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
rgroup.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
group.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
rgroup.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
group.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
rgroup.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
group.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
rgroup.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
group.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
rgroup.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
group.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
rgroup.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
group.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
rgroup.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
group.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
rgroup.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1F)
group.long 0xCF8++0x03
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
group.long 0xCFC++0x03
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0" "Level,Edge"
else
rgroup.long 0xCF8++0x03
line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62"
rgroup.long 0xCFC++0x03
line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63"
endif
tree.end
width 12.
tree "Peripheral Interrupt Status Registers"
rgroup.long 0x0D00++0x03
line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register"
bitfld.long 0x00 15. " PPI3S     ,nIRQ pin status" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  PPI2S     ,Non-secure Physical Timer event status" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 13. " PPI1S     ,Secure Physical Timer event status" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  PPI0S     ,nFIQ pin status" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 11. " PPI4S     ,Virtual Timer event status" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  PPI5S     ,Hypervisor Timer event status" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 9. " PPI6S     ,Virtual Maintenance Status" "No interrupt,Interrupt"
textline "                               "
width 22.
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x01)
rgroup.long 0x0D04++0x03
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
bitfld.long 0x00 31. " IRQS31  ,IRQS Status Bit 31" "Low,High"
bitfld.long 0x00 30. "  IRQS30  ,IRQS Status Bit 30" "Low,High"
bitfld.long 0x00 29. "  IRQS29  ,IRQS Status Bit 29" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS28  ,IRQS Status Bit 28" "Low,High"
bitfld.long 0x00 27. "  IRQS27  ,IRQS Status Bit 27" "Low,High"
bitfld.long 0x00 26. "  IRQS26  ,IRQS Status Bit 26" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS25  ,IRQS Status Bit 25" "Low,High"
bitfld.long 0x00 24. "  IRQS24  ,IRQS Status Bit 24" "Low,High"
bitfld.long 0x00 23. "  IRQS23  ,IRQS Status Bit 23" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS22  ,IRQS Status Bit 22" "Low,High"
bitfld.long 0x00 21. "  IRQS21  ,IRQS Status Bit 21" "Low,High"
bitfld.long 0x00 20. "  IRQS20  ,IRQS Status Bit 20" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS19  ,IRQS Status Bit 19" "Low,High"
bitfld.long 0x00 18. "  IRQS18  ,IRQS Status Bit 18" "Low,High"
bitfld.long 0x00 17. "  IRQS17  ,IRQS Status Bit 17" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS16  ,IRQS Status Bit 16" "Low,High"
bitfld.long 0x00 15. "  IRQS15  ,IRQS Status Bit 15" "Low,High"
bitfld.long 0x00 14. "  IRQS14  ,IRQS Status Bit 14" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS13  ,IRQS Status Bit 13" "Low,High"
bitfld.long 0x00 12. "  IRQS12  ,IRQS Status Bit 12" "Low,High"
bitfld.long 0x00 11. "  IRQS11  ,IRQS Status Bit 11" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS10  ,IRQS Status Bit 10" "Low,High"
bitfld.long 0x00 9. "  IRQS9   ,IRQS Status Bit 9" "Low,High"
bitfld.long 0x00 8. "  IRQS8   ,IRQS Status Bit 8" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS7   ,IRQS Status Bit 7" "Low,High"
bitfld.long 0x00 6. "  IRQS6   ,IRQS Status Bit 6" "Low,High"
bitfld.long 0x00 5. "  IRQS5   ,IRQS Status Bit 5" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS4   ,IRQS Status Bit 4" "Low,High"
bitfld.long 0x00 3. "  IRQS3   ,IRQS Status Bit 3" "Low,High"
bitfld.long 0x00 2. "  IRQS2   ,IRQS Status Bit 2" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS1   ,IRQS Status Bit 1" "Low,High"
bitfld.long 0x00 0. "  IRQS0   ,IRQS Status Bit 0" "Low,High"
else
rgroup.long 0x0D04++0x03
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x02)
rgroup.long 0x0D08++0x03
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
bitfld.long 0x00 31. " IRQS63  ,IRQS Status Bit 63" "Low,High"
bitfld.long 0x00 30. "  IRQS62  ,IRQS Status Bit 62" "Low,High"
bitfld.long 0x00 29. "  IRQS61  ,IRQS Status Bit 61" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS60  ,IRQS Status Bit 60" "Low,High"
bitfld.long 0x00 27. "  IRQS59  ,IRQS Status Bit 59" "Low,High"
bitfld.long 0x00 26. "  IRQS58  ,IRQS Status Bit 58" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS57  ,IRQS Status Bit 57" "Low,High"
bitfld.long 0x00 24. "  IRQS56  ,IRQS Status Bit 56" "Low,High"
bitfld.long 0x00 23. "  IRQS55  ,IRQS Status Bit 55" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS54  ,IRQS Status Bit 54" "Low,High"
bitfld.long 0x00 21. "  IRQS53  ,IRQS Status Bit 53" "Low,High"
bitfld.long 0x00 20. "  IRQS52  ,IRQS Status Bit 52" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS51  ,IRQS Status Bit 51" "Low,High"
bitfld.long 0x00 18. "  IRQS50  ,IRQS Status Bit 50" "Low,High"
bitfld.long 0x00 17. "  IRQS49  ,IRQS Status Bit 49" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS48  ,IRQS Status Bit 48" "Low,High"
bitfld.long 0x00 15. "  IRQS47  ,IRQS Status Bit 47" "Low,High"
bitfld.long 0x00 14. "  IRQS46  ,IRQS Status Bit 46" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS45  ,IRQS Status Bit 45" "Low,High"
bitfld.long 0x00 12. "  IRQS44  ,IRQS Status Bit 44" "Low,High"
bitfld.long 0x00 11. "  IRQS43  ,IRQS Status Bit 43" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS42  ,IRQS Status Bit 42" "Low,High"
bitfld.long 0x00 9. "  IRQS41  ,IRQS Status Bit 41" "Low,High"
bitfld.long 0x00 8. "  IRQS40  ,IRQS Status Bit 40" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS39  ,IRQS Status Bit 39" "Low,High"
bitfld.long 0x00 6. "  IRQS38  ,IRQS Status Bit 38" "Low,High"
bitfld.long 0x00 5. "  IRQS37  ,IRQS Status Bit 37" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS36  ,IRQS Status Bit 36" "Low,High"
bitfld.long 0x00 3. "  IRQS35  ,IRQS Status Bit 35" "Low,High"
bitfld.long 0x00 2. "  IRQS34  ,IRQS Status Bit 34" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS33  ,IRQS Status Bit 33" "Low,High"
bitfld.long 0x00 0. "  IRQS32  ,IRQS Status Bit 32" "Low,High"
else
rgroup.long 0x0D08++0x03
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x03)
rgroup.long 0x0D0C++0x03
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
bitfld.long 0x00 31. " IRQS95  ,IRQS Status Bit 95" "Low,High"
bitfld.long 0x00 30. "  IRQS94  ,IRQS Status Bit 94" "Low,High"
bitfld.long 0x00 29. "  IRQS93  ,IRQS Status Bit 93" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS92  ,IRQS Status Bit 92" "Low,High"
bitfld.long 0x00 27. "  IRQS91  ,IRQS Status Bit 91" "Low,High"
bitfld.long 0x00 26. "  IRQS90  ,IRQS Status Bit 90" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS89  ,IRQS Status Bit 89" "Low,High"
bitfld.long 0x00 24. "  IRQS88  ,IRQS Status Bit 88" "Low,High"
bitfld.long 0x00 23. "  IRQS87  ,IRQS Status Bit 87" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS86  ,IRQS Status Bit 86" "Low,High"
bitfld.long 0x00 21. "  IRQS85  ,IRQS Status Bit 85" "Low,High"
bitfld.long 0x00 20. "  IRQS84  ,IRQS Status Bit 84" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS83  ,IRQS Status Bit 83" "Low,High"
bitfld.long 0x00 18. "  IRQS82  ,IRQS Status Bit 82" "Low,High"
bitfld.long 0x00 17. "  IRQS81  ,IRQS Status Bit 81" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS80  ,IRQS Status Bit 80" "Low,High"
bitfld.long 0x00 15. "  IRQS79  ,IRQS Status Bit 79" "Low,High"
bitfld.long 0x00 14. "  IRQS78  ,IRQS Status Bit 78" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS77  ,IRQS Status Bit 77" "Low,High"
bitfld.long 0x00 12. "  IRQS76  ,IRQS Status Bit 76" "Low,High"
bitfld.long 0x00 11. "  IRQS75  ,IRQS Status Bit 75" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS74  ,IRQS Status Bit 74" "Low,High"
bitfld.long 0x00 9. "  IRQS73  ,IRQS Status Bit 73" "Low,High"
bitfld.long 0x00 8. "  IRQS72  ,IRQS Status Bit 72" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS71  ,IRQS Status Bit 71" "Low,High"
bitfld.long 0x00 6. "  IRQS70  ,IRQS Status Bit 70" "Low,High"
bitfld.long 0x00 5. "  IRQS69  ,IRQS Status Bit 69" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS68  ,IRQS Status Bit 68" "Low,High"
bitfld.long 0x00 3. "  IRQS67  ,IRQS Status Bit 67" "Low,High"
bitfld.long 0x00 2. "  IRQS66  ,IRQS Status Bit 66" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS65  ,IRQS Status Bit 65" "Low,High"
bitfld.long 0x00 0. "  IRQS64  ,IRQS Status Bit 64" "Low,High"
else
rgroup.long 0x0D0C++0x03
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x04)
rgroup.long 0x0D10++0x03
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High"
bitfld.long 0x00 30. "  IRQS126 ,IRQS Status Bit 126" "Low,High"
bitfld.long 0x00 29. "  IRQS125 ,IRQS Status Bit 125" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High"
bitfld.long 0x00 27. "  IRQS123 ,IRQS Status Bit 123" "Low,High"
bitfld.long 0x00 26. "  IRQS122 ,IRQS Status Bit 122" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High"
bitfld.long 0x00 24. "  IRQS120 ,IRQS Status Bit 120" "Low,High"
bitfld.long 0x00 23. "  IRQS119 ,IRQS Status Bit 119" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High"
bitfld.long 0x00 21. "  IRQS117 ,IRQS Status Bit 117" "Low,High"
bitfld.long 0x00 20. "  IRQS116 ,IRQS Status Bit 116" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High"
bitfld.long 0x00 18. "  IRQS114 ,IRQS Status Bit 114" "Low,High"
bitfld.long 0x00 17. "  IRQS113 ,IRQS Status Bit 113" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High"
bitfld.long 0x00 15. "  IRQS111 ,IRQS Status Bit 111" "Low,High"
bitfld.long 0x00 14. "  IRQS110 ,IRQS Status Bit 110" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High"
bitfld.long 0x00 12. "  IRQS108 ,IRQS Status Bit 108" "Low,High"
bitfld.long 0x00 11. "  IRQS107 ,IRQS Status Bit 107" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High"
bitfld.long 0x00 9. "  IRQS105 ,IRQS Status Bit 105" "Low,High"
bitfld.long 0x00 8. "  IRQS104 ,IRQS Status Bit 104" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High"
bitfld.long 0x00 6. "  IRQS102 ,IRQS Status Bit 102" "Low,High"
bitfld.long 0x00 5. "  IRQS101 ,IRQS Status Bit 101" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High"
bitfld.long 0x00 3. "  IRQS99  ,IRQS Status Bit 99" "Low,High"
bitfld.long 0x00 2. "  IRQS98  ,IRQS Status Bit 98" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS97  ,IRQS Status Bit 97" "Low,High"
bitfld.long 0x00 0. "  IRQS96  ,IRQS Status Bit 96" "Low,High"
else
rgroup.long 0x0D10++0x03
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x05)
rgroup.long 0x0D14++0x03
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High"
bitfld.long 0x00 30. "  IRQS158 ,IRQS Status Bit 158" "Low,High"
bitfld.long 0x00 29. "  IRQS157 ,IRQS Status Bit 157" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High"
bitfld.long 0x00 27. "  IRQS155 ,IRQS Status Bit 155" "Low,High"
bitfld.long 0x00 26. "  IRQS154 ,IRQS Status Bit 154" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High"
bitfld.long 0x00 24. "  IRQS152 ,IRQS Status Bit 152" "Low,High"
bitfld.long 0x00 23. "  IRQS151 ,IRQS Status Bit 151" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High"
bitfld.long 0x00 21. "  IRQS149 ,IRQS Status Bit 149" "Low,High"
bitfld.long 0x00 20. "  IRQS148 ,IRQS Status Bit 148" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High"
bitfld.long 0x00 18. "  IRQS146 ,IRQS Status Bit 146" "Low,High"
bitfld.long 0x00 17. "  IRQS145 ,IRQS Status Bit 145" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High"
bitfld.long 0x00 15. "  IRQS143 ,IRQS Status Bit 143" "Low,High"
bitfld.long 0x00 14. "  IRQS142 ,IRQS Status Bit 142" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High"
bitfld.long 0x00 12. "  IRQS140 ,IRQS Status Bit 140" "Low,High"
bitfld.long 0x00 11. "  IRQS139 ,IRQS Status Bit 139" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High"
bitfld.long 0x00 9. "  IRQS137 ,IRQS Status Bit 137" "Low,High"
bitfld.long 0x00 8. "  IRQS136 ,IRQS Status Bit 136" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High"
bitfld.long 0x00 6. "  IRQS134 ,IRQS Status Bit 134" "Low,High"
bitfld.long 0x00 5. "  IRQS133 ,IRQS Status Bit 133" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High"
bitfld.long 0x00 3. "  IRQS131 ,IRQS Status Bit 131" "Low,High"
bitfld.long 0x00 2. "  IRQS130 ,IRQS Status Bit 130" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High"
bitfld.long 0x00 0. "  IRQS128 ,IRQS Status Bit 128" "Low,High"
else
rgroup.long 0x0D14++0x03
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x06)
rgroup.long 0x0D18++0x03
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High"
bitfld.long 0x00 30. "  IRQS190 ,IRQS Status Bit 190" "Low,High"
bitfld.long 0x00 29. "  IRQS189 ,IRQS Status Bit 189" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High"
bitfld.long 0x00 27. "  IRQS187 ,IRQS Status Bit 187" "Low,High"
bitfld.long 0x00 26. "  IRQS186 ,IRQS Status Bit 186" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High"
bitfld.long 0x00 24. "  IRQS184 ,IRQS Status Bit 184" "Low,High"
bitfld.long 0x00 23. "  IRQS183 ,IRQS Status Bit 183" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High"
bitfld.long 0x00 21. "  IRQS181 ,IRQS Status Bit 181" "Low,High"
bitfld.long 0x00 20. "  IRQS180 ,IRQS Status Bit 180" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High"
bitfld.long 0x00 18. "  IRQS178 ,IRQS Status Bit 178" "Low,High"
bitfld.long 0x00 17. "  IRQS177 ,IRQS Status Bit 177" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High"
bitfld.long 0x00 15. "  IRQS175 ,IRQS Status Bit 175" "Low,High"
bitfld.long 0x00 14. "  IRQS174 ,IRQS Status Bit 174" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High"
bitfld.long 0x00 12. "  IRQS172 ,IRQS Status Bit 172" "Low,High"
bitfld.long 0x00 11. "  IRQS171 ,IRQS Status Bit 171" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High"
bitfld.long 0x00 9. "  IRQS169 ,IRQS Status Bit 169" "Low,High"
bitfld.long 0x00 8. "  IRQS168 ,IRQS Status Bit 168" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High"
bitfld.long 0x00 6. "  IRQS166 ,IRQS Status Bit 166" "Low,High"
bitfld.long 0x00 5. "  IRQS165 ,IRQS Status Bit 165" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High"
bitfld.long 0x00 3. "  IRQS163 ,IRQS Status Bit 163" "Low,High"
bitfld.long 0x00 2. "  IRQS162 ,IRQS Status Bit 162" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High"
bitfld.long 0x00 0. "  IRQS160 ,IRQS Status Bit 160" "Low,High"
else
rgroup.long 0x0D18++0x03
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x07)
rgroup.long 0x0D1C++0x03
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High"
bitfld.long 0x00 30. "  IRQS222 ,IRQS Status Bit 222" "Low,High"
bitfld.long 0x00 29. "  IRQS221 ,IRQS Status Bit 221" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High"
bitfld.long 0x00 27. "  IRQS219 ,IRQS Status Bit 219" "Low,High"
bitfld.long 0x00 26. "  IRQS218 ,IRQS Status Bit 218" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High"
bitfld.long 0x00 24. "  IRQS216 ,IRQS Status Bit 216" "Low,High"
bitfld.long 0x00 23. "  IRQS215 ,IRQS Status Bit 215" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High"
bitfld.long 0x00 21. "  IRQS213 ,IRQS Status Bit 213" "Low,High"
bitfld.long 0x00 20. "  IRQS212 ,IRQS Status Bit 212" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High"
bitfld.long 0x00 18. "  IRQS210 ,IRQS Status Bit 210" "Low,High"
bitfld.long 0x00 17. "  IRQS209 ,IRQS Status Bit 209" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High"
bitfld.long 0x00 15. "  IRQS207 ,IRQS Status Bit 207" "Low,High"
bitfld.long 0x00 14. "  IRQS206 ,IRQS Status Bit 206" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High"
bitfld.long 0x00 12. "  IRQS204 ,IRQS Status Bit 204" "Low,High"
bitfld.long 0x00 11. "  IRQS203 ,IRQS Status Bit 203" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High"
bitfld.long 0x00 9. "  IRQS201 ,IRQS Status Bit 201" "Low,High"
bitfld.long 0x00 8. "  IRQS200 ,IRQS Status Bit 200" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High"
bitfld.long 0x00 6. "  IRQS198 ,IRQS Status Bit 198" "Low,High"
bitfld.long 0x00 5. "  IRQS197 ,IRQS Status Bit 197" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High"
bitfld.long 0x00 3. "  IRQS195 ,IRQS Status Bit 195" "Low,High"
bitfld.long 0x00 2. "  IRQS194 ,IRQS Status Bit 194" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High"
bitfld.long 0x00 0. "  IRQS192 ,IRQS Status Bit 192" "Low,High"
else
rgroup.long 0x0D1C++0x03
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x08)
rgroup.long 0x0D20++0x03
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High"
bitfld.long 0x00 30. "  IRQS254 ,IRQS Status Bit 254" "Low,High"
bitfld.long 0x00 29. "  IRQS253 ,IRQS Status Bit 253" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High"
bitfld.long 0x00 27. "  IRQS251 ,IRQS Status Bit 251" "Low,High"
bitfld.long 0x00 26. "  IRQS250 ,IRQS Status Bit 250" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High"
bitfld.long 0x00 24. "  IRQS248 ,IRQS Status Bit 248" "Low,High"
bitfld.long 0x00 23. "  IRQS247 ,IRQS Status Bit 247" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High"
bitfld.long 0x00 21. "  IRQS245 ,IRQS Status Bit 245" "Low,High"
bitfld.long 0x00 20. "  IRQS244 ,IRQS Status Bit 244" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High"
bitfld.long 0x00 18. "  IRQS242 ,IRQS Status Bit 242" "Low,High"
bitfld.long 0x00 17. "  IRQS241 ,IRQS Status Bit 241" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High"
bitfld.long 0x00 15. "  IRQS239 ,IRQS Status Bit 239" "Low,High"
bitfld.long 0x00 14. "  IRQS238 ,IRQS Status Bit 238" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High"
bitfld.long 0x00 12. "  IRQS236 ,IRQS Status Bit 236" "Low,High"
bitfld.long 0x00 11. "  IRQS235 ,IRQS Status Bit 235" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High"
bitfld.long 0x00 9. "  IRQS233 ,IRQS Status Bit 233" "Low,High"
bitfld.long 0x00 8. "  IRQS232 ,IRQS Status Bit 232" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High"
bitfld.long 0x00 6. "  IRQS230 ,IRQS Status Bit 230" "Low,High"
bitfld.long 0x00 5. "  IRQS229 ,IRQS Status Bit 229" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High"
bitfld.long 0x00 3. "  IRQS227 ,IRQS Status Bit 227" "Low,High"
bitfld.long 0x00 2. "  IRQS226 ,IRQS Status Bit 226" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High"
bitfld.long 0x00 0. "  IRQS224 ,IRQS Status Bit 224" "Low,High"
else
rgroup.long 0x0D20++0x03
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x09)
rgroup.long 0x0D24++0x03
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High"
bitfld.long 0x00 30. "  IRQS286 ,IRQS Status Bit 286" "Low,High"
bitfld.long 0x00 29. "  IRQS285 ,IRQS Status Bit 285" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High"
bitfld.long 0x00 27. "  IRQS283 ,IRQS Status Bit 283" "Low,High"
bitfld.long 0x00 26. "  IRQS282 ,IRQS Status Bit 282" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High"
bitfld.long 0x00 24. "  IRQS280 ,IRQS Status Bit 280" "Low,High"
bitfld.long 0x00 23. "  IRQS279 ,IRQS Status Bit 279" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High"
bitfld.long 0x00 21. "  IRQS277 ,IRQS Status Bit 277" "Low,High"
bitfld.long 0x00 20. "  IRQS276 ,IRQS Status Bit 276" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High"
bitfld.long 0x00 18. "  IRQS274 ,IRQS Status Bit 274" "Low,High"
bitfld.long 0x00 17. "  IRQS273 ,IRQS Status Bit 273" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High"
bitfld.long 0x00 15. "  IRQS271 ,IRQS Status Bit 271" "Low,High"
bitfld.long 0x00 14. "  IRQS270 ,IRQS Status Bit 270" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High"
bitfld.long 0x00 12. "  IRQS268 ,IRQS Status Bit 268" "Low,High"
bitfld.long 0x00 11. "  IRQS267 ,IRQS Status Bit 267" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High"
bitfld.long 0x00 9. "  IRQS265 ,IRQS Status Bit 265" "Low,High"
bitfld.long 0x00 8. "  IRQS264 ,IRQS Status Bit 264" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High"
bitfld.long 0x00 6. "  IRQS262 ,IRQS Status Bit 262" "Low,High"
bitfld.long 0x00 5. "  IRQS261 ,IRQS Status Bit 261" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High"
bitfld.long 0x00 3. "  IRQS259 ,IRQS Status Bit 259" "Low,High"
bitfld.long 0x00 2. "  IRQS258 ,IRQS Status Bit 258" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High"
bitfld.long 0x00 0. "  IRQS256 ,IRQS Status Bit 256" "Low,High"
else
rgroup.long 0x0D24++0x03
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0A)
rgroup.long 0x0D28++0x03
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High"
bitfld.long 0x00 30. "  IRQS318 ,IRQS Status Bit 318" "Low,High"
bitfld.long 0x00 29. "  IRQS317 ,IRQS Status Bit 317" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High"
bitfld.long 0x00 27. "  IRQS315 ,IRQS Status Bit 315" "Low,High"
bitfld.long 0x00 26. "  IRQS314 ,IRQS Status Bit 314" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High"
bitfld.long 0x00 24. "  IRQS312 ,IRQS Status Bit 312" "Low,High"
bitfld.long 0x00 23. "  IRQS311 ,IRQS Status Bit 311" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High"
bitfld.long 0x00 21. "  IRQS309 ,IRQS Status Bit 309" "Low,High"
bitfld.long 0x00 20. "  IRQS308 ,IRQS Status Bit 308" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High"
bitfld.long 0x00 18. "  IRQS306 ,IRQS Status Bit 306" "Low,High"
bitfld.long 0x00 17. "  IRQS305 ,IRQS Status Bit 305" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High"
bitfld.long 0x00 15. "  IRQS303 ,IRQS Status Bit 303" "Low,High"
bitfld.long 0x00 14. "  IRQS302 ,IRQS Status Bit 302" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High"
bitfld.long 0x00 12. "  IRQS300 ,IRQS Status Bit 300" "Low,High"
bitfld.long 0x00 11. "  IRQS299 ,IRQS Status Bit 299" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High"
bitfld.long 0x00 9. "  IRQS297 ,IRQS Status Bit 297" "Low,High"
bitfld.long 0x00 8. "  IRQS296 ,IRQS Status Bit 296" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High"
bitfld.long 0x00 6. "  IRQS294 ,IRQS Status Bit 294" "Low,High"
bitfld.long 0x00 5. "  IRQS293 ,IRQS Status Bit 293" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High"
bitfld.long 0x00 3. "  IRQS291 ,IRQS Status Bit 291" "Low,High"
bitfld.long 0x00 2. "  IRQS290 ,IRQS Status Bit 290" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High"
bitfld.long 0x00 0. "  IRQS288 ,IRQS Status Bit 288" "Low,High"
else
rgroup.long 0x0D28++0x03
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0B)
rgroup.long 0x0D2C++0x03
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High"
bitfld.long 0x00 30. "  IRQS350 ,IRQS Status Bit 350" "Low,High"
bitfld.long 0x00 29. "  IRQS349 ,IRQS Status Bit 349" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High"
bitfld.long 0x00 27. "  IRQS347 ,IRQS Status Bit 347" "Low,High"
bitfld.long 0x00 26. "  IRQS346 ,IRQS Status Bit 346" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High"
bitfld.long 0x00 24. "  IRQS344 ,IRQS Status Bit 344" "Low,High"
bitfld.long 0x00 23. "  IRQS343 ,IRQS Status Bit 343" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High"
bitfld.long 0x00 21. "  IRQS341 ,IRQS Status Bit 341" "Low,High"
bitfld.long 0x00 20. "  IRQS340 ,IRQS Status Bit 340" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High"
bitfld.long 0x00 18. "  IRQS338 ,IRQS Status Bit 338" "Low,High"
bitfld.long 0x00 17. "  IRQS337 ,IRQS Status Bit 337" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High"
bitfld.long 0x00 15. "  IRQS335 ,IRQS Status Bit 335" "Low,High"
bitfld.long 0x00 14. "  IRQS334 ,IRQS Status Bit 334" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High"
bitfld.long 0x00 12. "  IRQS332 ,IRQS Status Bit 332" "Low,High"
bitfld.long 0x00 11. "  IRQS331 ,IRQS Status Bit 331" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High"
bitfld.long 0x00 9. "  IRQS329 ,IRQS Status Bit 329" "Low,High"
bitfld.long 0x00 8. "  IRQS328 ,IRQS Status Bit 328" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High"
bitfld.long 0x00 6. "  IRQS326 ,IRQS Status Bit 326" "Low,High"
bitfld.long 0x00 5. "  IRQS325 ,IRQS Status Bit 325" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High"
bitfld.long 0x00 3. "  IRQS323 ,IRQS Status Bit 323" "Low,High"
bitfld.long 0x00 2. "  IRQS322 ,IRQS Status Bit 322" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High"
bitfld.long 0x00 0. "  IRQS320 ,IRQS Status Bit 320" "Low,High"
else
rgroup.long 0x0D2C++0x03
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0C)
rgroup.long 0x0D30++0x03
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High"
bitfld.long 0x00 30. "  IRQS382 ,IRQS Status Bit 382" "Low,High"
bitfld.long 0x00 29. "  IRQS381 ,IRQS Status Bit 381" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High"
bitfld.long 0x00 27. "  IRQS379 ,IRQS Status Bit 379" "Low,High"
bitfld.long 0x00 26. "  IRQS378 ,IRQS Status Bit 378" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High"
bitfld.long 0x00 24. "  IRQS376 ,IRQS Status Bit 376" "Low,High"
bitfld.long 0x00 23. "  IRQS375 ,IRQS Status Bit 375" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High"
bitfld.long 0x00 21. "  IRQS373 ,IRQS Status Bit 373" "Low,High"
bitfld.long 0x00 20. "  IRQS372 ,IRQS Status Bit 372" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High"
bitfld.long 0x00 18. "  IRQS370 ,IRQS Status Bit 370" "Low,High"
bitfld.long 0x00 17. "  IRQS369 ,IRQS Status Bit 369" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High"
bitfld.long 0x00 15. "  IRQS367 ,IRQS Status Bit 367" "Low,High"
bitfld.long 0x00 14. "  IRQS366 ,IRQS Status Bit 366" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High"
bitfld.long 0x00 12. "  IRQS364 ,IRQS Status Bit 364" "Low,High"
bitfld.long 0x00 11. "  IRQS363 ,IRQS Status Bit 363" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High"
bitfld.long 0x00 9. "  IRQS361 ,IRQS Status Bit 361" "Low,High"
bitfld.long 0x00 8. "  IRQS360 ,IRQS Status Bit 360" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High"
bitfld.long 0x00 6. "  IRQS358 ,IRQS Status Bit 358" "Low,High"
bitfld.long 0x00 5. "  IRQS357 ,IRQS Status Bit 357" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High"
bitfld.long 0x00 3. "  IRQS355 ,IRQS Status Bit 355" "Low,High"
bitfld.long 0x00 2. "  IRQS354 ,IRQS Status Bit 354" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High"
bitfld.long 0x00 0. "  IRQS352 ,IRQS Status Bit 352" "Low,High"
else
rgroup.long 0x0D30++0x03
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0D)
rgroup.long 0x0D34++0x03
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High"
bitfld.long 0x00 30. "  IRQS414 ,IRQS Status Bit 414" "Low,High"
bitfld.long 0x00 29. "  IRQS413 ,IRQS Status Bit 413" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High"
bitfld.long 0x00 27. "  IRQS411 ,IRQS Status Bit 411" "Low,High"
bitfld.long 0x00 26. "  IRQS410 ,IRQS Status Bit 410" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High"
bitfld.long 0x00 24. "  IRQS408 ,IRQS Status Bit 408" "Low,High"
bitfld.long 0x00 23. "  IRQS407 ,IRQS Status Bit 407" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High"
bitfld.long 0x00 21. "  IRQS405 ,IRQS Status Bit 405" "Low,High"
bitfld.long 0x00 20. "  IRQS404 ,IRQS Status Bit 404" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High"
bitfld.long 0x00 18. "  IRQS402 ,IRQS Status Bit 402" "Low,High"
bitfld.long 0x00 17. "  IRQS401 ,IRQS Status Bit 401" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High"
bitfld.long 0x00 15. "  IRQS399 ,IRQS Status Bit 399" "Low,High"
bitfld.long 0x00 14. "  IRQS398 ,IRQS Status Bit 398" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High"
bitfld.long 0x00 12. "  IRQS396 ,IRQS Status Bit 396" "Low,High"
bitfld.long 0x00 11. "  IRQS395 ,IRQS Status Bit 395" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High"
bitfld.long 0x00 9. "  IRQS393 ,IRQS Status Bit 393" "Low,High"
bitfld.long 0x00 8. "  IRQS392 ,IRQS Status Bit 392" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High"
bitfld.long 0x00 6. "  IRQS390 ,IRQS Status Bit 390" "Low,High"
bitfld.long 0x00 5. "  IRQS389 ,IRQS Status Bit 389" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High"
bitfld.long 0x00 3. "  IRQS387 ,IRQS Status Bit 387" "Low,High"
bitfld.long 0x00 2. "  IRQS386 ,IRQS Status Bit 386" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High"
bitfld.long 0x00 0. "  IRQS384 ,IRQS Status Bit 384" "Low,High"
else
rgroup.long 0x0D34++0x03
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0E)
rgroup.long 0x0D38++0x03
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High"
bitfld.long 0x00 30. "  IRQS446 ,IRQS Status Bit 446" "Low,High"
bitfld.long 0x00 29. "  IRQS445 ,IRQS Status Bit 445" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High"
bitfld.long 0x00 27. "  IRQS443 ,IRQS Status Bit 443" "Low,High"
bitfld.long 0x00 26. "  IRQS442 ,IRQS Status Bit 442" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High"
bitfld.long 0x00 24. "  IRQS440 ,IRQS Status Bit 440" "Low,High"
bitfld.long 0x00 23. "  IRQS439 ,IRQS Status Bit 439" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High"
bitfld.long 0x00 21. "  IRQS437 ,IRQS Status Bit 437" "Low,High"
bitfld.long 0x00 20. "  IRQS436 ,IRQS Status Bit 436" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High"
bitfld.long 0x00 18. "  IRQS434 ,IRQS Status Bit 434" "Low,High"
bitfld.long 0x00 17. "  IRQS433 ,IRQS Status Bit 433" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High"
bitfld.long 0x00 15. "  IRQS431 ,IRQS Status Bit 431" "Low,High"
bitfld.long 0x00 14. "  IRQS430 ,IRQS Status Bit 430" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High"
bitfld.long 0x00 12. "  IRQS428 ,IRQS Status Bit 428" "Low,High"
bitfld.long 0x00 11. "  IRQS427 ,IRQS Status Bit 427" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High"
bitfld.long 0x00 9. "  IRQS425 ,IRQS Status Bit 425" "Low,High"
bitfld.long 0x00 8. "  IRQS424 ,IRQS Status Bit 424" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High"
bitfld.long 0x00 6. "  IRQS422 ,IRQS Status Bit 422" "Low,High"
bitfld.long 0x00 5. "  IRQS421 ,IRQS Status Bit 421" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High"
bitfld.long 0x00 3. "  IRQS419 ,IRQS Status Bit 419" "Low,High"
bitfld.long 0x00 2. "  IRQS418 ,IRQS Status Bit 418" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High"
bitfld.long 0x00 0. "  IRQS416 ,IRQS Status Bit 416" "Low,High"
else
rgroup.long 0x0D38++0x03
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x0F)
rgroup.long 0x0D3C++0x03
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High"
bitfld.long 0x00 30. "  IRQS478 ,IRQS Status Bit 478" "Low,High"
bitfld.long 0x00 29. "  IRQS477 ,IRQS Status Bit 477" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High"
bitfld.long 0x00 27. "  IRQS475 ,IRQS Status Bit 475" "Low,High"
bitfld.long 0x00 26. "  IRQS474 ,IRQS Status Bit 474" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High"
bitfld.long 0x00 24. "  IRQS472 ,IRQS Status Bit 472" "Low,High"
bitfld.long 0x00 23. "  IRQS471 ,IRQS Status Bit 471" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High"
bitfld.long 0x00 21. "  IRQS469 ,IRQS Status Bit 469" "Low,High"
bitfld.long 0x00 20. "  IRQS468 ,IRQS Status Bit 468" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High"
bitfld.long 0x00 18. "  IRQS466 ,IRQS Status Bit 466" "Low,High"
bitfld.long 0x00 17. "  IRQS465 ,IRQS Status Bit 465" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High"
bitfld.long 0x00 15. "  IRQS463 ,IRQS Status Bit 463" "Low,High"
bitfld.long 0x00 14. "  IRQS462 ,IRQS Status Bit 462" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High"
bitfld.long 0x00 12. "  IRQS460 ,IRQS Status Bit 460" "Low,High"
bitfld.long 0x00 11. "  IRQS459 ,IRQS Status Bit 459" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High"
bitfld.long 0x00 9. "  IRQS457 ,IRQS Status Bit 457" "Low,High"
bitfld.long 0x00 8. "  IRQS456 ,IRQS Status Bit 456" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High"
bitfld.long 0x00 6. "  IRQS454 ,IRQS Status Bit 454" "Low,High"
bitfld.long 0x00 5. "  IRQS453 ,IRQS Status Bit 453" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High"
bitfld.long 0x00 3. "  IRQS451 ,IRQS Status Bit 451" "Low,High"
bitfld.long 0x00 2. "  IRQS450 ,IRQS Status Bit 450" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High"
bitfld.long 0x00 0. "  IRQS448 ,IRQS Status Bit 448" "Low,High"
else
rgroup.long 0x0D3C++0x03
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x10)
rgroup.long 0x0D40++0x03
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High"
bitfld.long 0x00 30. "  IRQS510 ,IRQS Status Bit 510" "Low,High"
bitfld.long 0x00 29. "  IRQS509 ,IRQS Status Bit 509" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High"
bitfld.long 0x00 27. "  IRQS507 ,IRQS Status Bit 507" "Low,High"
bitfld.long 0x00 26. "  IRQS506 ,IRQS Status Bit 506" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High"
bitfld.long 0x00 24. "  IRQS504 ,IRQS Status Bit 504" "Low,High"
bitfld.long 0x00 23. "  IRQS503 ,IRQS Status Bit 503" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High"
bitfld.long 0x00 21. "  IRQS501 ,IRQS Status Bit 501" "Low,High"
bitfld.long 0x00 20. "  IRQS500 ,IRQS Status Bit 500" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High"
bitfld.long 0x00 18. "  IRQS498 ,IRQS Status Bit 498" "Low,High"
bitfld.long 0x00 17. "  IRQS497 ,IRQS Status Bit 497" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High"
bitfld.long 0x00 15. "  IRQS495 ,IRQS Status Bit 495" "Low,High"
bitfld.long 0x00 14. "  IRQS494 ,IRQS Status Bit 494" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High"
bitfld.long 0x00 12. "  IRQS492 ,IRQS Status Bit 492" "Low,High"
bitfld.long 0x00 11. "  IRQS491 ,IRQS Status Bit 491" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High"
bitfld.long 0x00 9. "  IRQS489 ,IRQS Status Bit 489" "Low,High"
bitfld.long 0x00 8. "  IRQS488 ,IRQS Status Bit 488" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High"
bitfld.long 0x00 6. "  IRQS486 ,IRQS Status Bit 486" "Low,High"
bitfld.long 0x00 5. "  IRQS485 ,IRQS Status Bit 485" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High"
bitfld.long 0x00 3. "  IRQS483 ,IRQS Status Bit 483" "Low,High"
bitfld.long 0x00 2. "  IRQS482 ,IRQS Status Bit 482" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High"
bitfld.long 0x00 0. "  IRQS480 ,IRQS Status Bit 480" "Low,High"
else
rgroup.long 0x0D40++0x03
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x11)
rgroup.long 0x0D44++0x03
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High"
bitfld.long 0x00 30. "  IRQS542 ,IRQS Status Bit 542" "Low,High"
bitfld.long 0x00 29. "  IRQS541 ,IRQS Status Bit 541" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High"
bitfld.long 0x00 27. "  IRQS539 ,IRQS Status Bit 539" "Low,High"
bitfld.long 0x00 26. "  IRQS538 ,IRQS Status Bit 538" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High"
bitfld.long 0x00 24. "  IRQS536 ,IRQS Status Bit 536" "Low,High"
bitfld.long 0x00 23. "  IRQS535 ,IRQS Status Bit 535" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High"
bitfld.long 0x00 21. "  IRQS533 ,IRQS Status Bit 533" "Low,High"
bitfld.long 0x00 20. "  IRQS532 ,IRQS Status Bit 532" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High"
bitfld.long 0x00 18. "  IRQS530 ,IRQS Status Bit 530" "Low,High"
bitfld.long 0x00 17. "  IRQS529 ,IRQS Status Bit 529" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High"
bitfld.long 0x00 15. "  IRQS527 ,IRQS Status Bit 527" "Low,High"
bitfld.long 0x00 14. "  IRQS526 ,IRQS Status Bit 526" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High"
bitfld.long 0x00 12. "  IRQS524 ,IRQS Status Bit 524" "Low,High"
bitfld.long 0x00 11. "  IRQS523 ,IRQS Status Bit 523" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High"
bitfld.long 0x00 9. "  IRQS521 ,IRQS Status Bit 521" "Low,High"
bitfld.long 0x00 8. "  IRQS520 ,IRQS Status Bit 520" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High"
bitfld.long 0x00 6. "  IRQS518 ,IRQS Status Bit 518" "Low,High"
bitfld.long 0x00 5. "  IRQS517 ,IRQS Status Bit 517" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High"
bitfld.long 0x00 3. "  IRQS515 ,IRQS Status Bit 515" "Low,High"
bitfld.long 0x00 2. "  IRQS514 ,IRQS Status Bit 514" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High"
bitfld.long 0x00 0. "  IRQS512 ,IRQS Status Bit 512" "Low,High"
else
rgroup.long 0x0D44++0x03
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x12)
rgroup.long 0x0D48++0x03
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High"
bitfld.long 0x00 30. "  IRQS574 ,IRQS Status Bit 574" "Low,High"
bitfld.long 0x00 29. "  IRQS573 ,IRQS Status Bit 573" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High"
bitfld.long 0x00 27. "  IRQS571 ,IRQS Status Bit 571" "Low,High"
bitfld.long 0x00 26. "  IRQS570 ,IRQS Status Bit 570" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High"
bitfld.long 0x00 24. "  IRQS568 ,IRQS Status Bit 568" "Low,High"
bitfld.long 0x00 23. "  IRQS567 ,IRQS Status Bit 567" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High"
bitfld.long 0x00 21. "  IRQS565 ,IRQS Status Bit 565" "Low,High"
bitfld.long 0x00 20. "  IRQS564 ,IRQS Status Bit 564" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High"
bitfld.long 0x00 18. "  IRQS562 ,IRQS Status Bit 562" "Low,High"
bitfld.long 0x00 17. "  IRQS561 ,IRQS Status Bit 561" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High"
bitfld.long 0x00 15. "  IRQS559 ,IRQS Status Bit 559" "Low,High"
bitfld.long 0x00 14. "  IRQS558 ,IRQS Status Bit 558" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High"
bitfld.long 0x00 12. "  IRQS556 ,IRQS Status Bit 556" "Low,High"
bitfld.long 0x00 11. "  IRQS555 ,IRQS Status Bit 555" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High"
bitfld.long 0x00 9. "  IRQS553 ,IRQS Status Bit 553" "Low,High"
bitfld.long 0x00 8. "  IRQS552 ,IRQS Status Bit 552" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High"
bitfld.long 0x00 6. "  IRQS550 ,IRQS Status Bit 550" "Low,High"
bitfld.long 0x00 5. "  IRQS549 ,IRQS Status Bit 549" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High"
bitfld.long 0x00 3. "  IRQS547 ,IRQS Status Bit 547" "Low,High"
bitfld.long 0x00 2. "  IRQS546 ,IRQS Status Bit 546" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High"
bitfld.long 0x00 0. "  IRQS544 ,IRQS Status Bit 544" "Low,High"
else
rgroup.long 0x0D48++0x03
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x13)
rgroup.long 0x0D4C++0x03
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High"
bitfld.long 0x00 30. "  IRQS606 ,IRQS Status Bit 606" "Low,High"
bitfld.long 0x00 29. "  IRQS605 ,IRQS Status Bit 605" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High"
bitfld.long 0x00 27. "  IRQS603 ,IRQS Status Bit 603" "Low,High"
bitfld.long 0x00 26. "  IRQS602 ,IRQS Status Bit 602" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High"
bitfld.long 0x00 24. "  IRQS600 ,IRQS Status Bit 600" "Low,High"
bitfld.long 0x00 23. "  IRQS599 ,IRQS Status Bit 599" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High"
bitfld.long 0x00 21. "  IRQS597 ,IRQS Status Bit 597" "Low,High"
bitfld.long 0x00 20. "  IRQS596 ,IRQS Status Bit 596" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High"
bitfld.long 0x00 18. "  IRQS594 ,IRQS Status Bit 594" "Low,High"
bitfld.long 0x00 17. "  IRQS593 ,IRQS Status Bit 593" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High"
bitfld.long 0x00 15. "  IRQS591 ,IRQS Status Bit 591" "Low,High"
bitfld.long 0x00 14. "  IRQS590 ,IRQS Status Bit 590" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High"
bitfld.long 0x00 12. "  IRQS588 ,IRQS Status Bit 588" "Low,High"
bitfld.long 0x00 11. "  IRQS587 ,IRQS Status Bit 587" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High"
bitfld.long 0x00 9. "  IRQS585 ,IRQS Status Bit 585" "Low,High"
bitfld.long 0x00 8. "  IRQS584 ,IRQS Status Bit 584" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High"
bitfld.long 0x00 6. "  IRQS582 ,IRQS Status Bit 582" "Low,High"
bitfld.long 0x00 5. "  IRQS581 ,IRQS Status Bit 581" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High"
bitfld.long 0x00 3. "  IRQS579 ,IRQS Status Bit 579" "Low,High"
bitfld.long 0x00 2. "  IRQS578 ,IRQS Status Bit 578" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High"
bitfld.long 0x00 0. "  IRQS576 ,IRQS Status Bit 576" "Low,High"
else
rgroup.long 0x0D4C++0x03
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x14)
rgroup.long 0x0D50++0x03
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High"
bitfld.long 0x00 30. "  IRQS638 ,IRQS Status Bit 638" "Low,High"
bitfld.long 0x00 29. "  IRQS637 ,IRQS Status Bit 637" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High"
bitfld.long 0x00 27. "  IRQS635 ,IRQS Status Bit 635" "Low,High"
bitfld.long 0x00 26. "  IRQS634 ,IRQS Status Bit 634" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High"
bitfld.long 0x00 24. "  IRQS632 ,IRQS Status Bit 632" "Low,High"
bitfld.long 0x00 23. "  IRQS631 ,IRQS Status Bit 631" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High"
bitfld.long 0x00 21. "  IRQS629 ,IRQS Status Bit 629" "Low,High"
bitfld.long 0x00 20. "  IRQS628 ,IRQS Status Bit 628" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High"
bitfld.long 0x00 18. "  IRQS626 ,IRQS Status Bit 626" "Low,High"
bitfld.long 0x00 17. "  IRQS625 ,IRQS Status Bit 625" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High"
bitfld.long 0x00 15. "  IRQS623 ,IRQS Status Bit 623" "Low,High"
bitfld.long 0x00 14. "  IRQS622 ,IRQS Status Bit 622" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High"
bitfld.long 0x00 12. "  IRQS620 ,IRQS Status Bit 620" "Low,High"
bitfld.long 0x00 11. "  IRQS619 ,IRQS Status Bit 619" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High"
bitfld.long 0x00 9. "  IRQS617 ,IRQS Status Bit 617" "Low,High"
bitfld.long 0x00 8. "  IRQS616 ,IRQS Status Bit 616" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High"
bitfld.long 0x00 6. "  IRQS614 ,IRQS Status Bit 614" "Low,High"
bitfld.long 0x00 5. "  IRQS613 ,IRQS Status Bit 613" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High"
bitfld.long 0x00 3. "  IRQS611 ,IRQS Status Bit 611" "Low,High"
bitfld.long 0x00 2. "  IRQS610 ,IRQS Status Bit 610" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High"
bitfld.long 0x00 0. "  IRQS608 ,IRQS Status Bit 608" "Low,High"
else
rgroup.long 0x0D50++0x03
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x15)
rgroup.long 0x0D54++0x03
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High"
bitfld.long 0x00 30. "  IRQS670 ,IRQS Status Bit 670" "Low,High"
bitfld.long 0x00 29. "  IRQS669 ,IRQS Status Bit 669" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High"
bitfld.long 0x00 27. "  IRQS667 ,IRQS Status Bit 667" "Low,High"
bitfld.long 0x00 26. "  IRQS666 ,IRQS Status Bit 666" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High"
bitfld.long 0x00 24. "  IRQS664 ,IRQS Status Bit 664" "Low,High"
bitfld.long 0x00 23. "  IRQS663 ,IRQS Status Bit 663" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High"
bitfld.long 0x00 21. "  IRQS661 ,IRQS Status Bit 661" "Low,High"
bitfld.long 0x00 20. "  IRQS660 ,IRQS Status Bit 660" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High"
bitfld.long 0x00 18. "  IRQS658 ,IRQS Status Bit 658" "Low,High"
bitfld.long 0x00 17. "  IRQS657 ,IRQS Status Bit 657" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High"
bitfld.long 0x00 15. "  IRQS655 ,IRQS Status Bit 655" "Low,High"
bitfld.long 0x00 14. "  IRQS654 ,IRQS Status Bit 654" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High"
bitfld.long 0x00 12. "  IRQS652 ,IRQS Status Bit 652" "Low,High"
bitfld.long 0x00 11. "  IRQS651 ,IRQS Status Bit 651" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High"
bitfld.long 0x00 9. "  IRQS649 ,IRQS Status Bit 649" "Low,High"
bitfld.long 0x00 8. "  IRQS648 ,IRQS Status Bit 648" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High"
bitfld.long 0x00 6. "  IRQS646 ,IRQS Status Bit 646" "Low,High"
bitfld.long 0x00 5. "  IRQS645 ,IRQS Status Bit 645" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High"
bitfld.long 0x00 3. "  IRQS643 ,IRQS Status Bit 643" "Low,High"
bitfld.long 0x00 2. "  IRQS642 ,IRQS Status Bit 642" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High"
bitfld.long 0x00 0. "  IRQS640 ,IRQS Status Bit 640" "Low,High"
else
rgroup.long 0x0D54++0x03
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x16)
rgroup.long 0x0D58++0x03
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High"
bitfld.long 0x00 30. "  IRQS702 ,IRQS Status Bit 702" "Low,High"
bitfld.long 0x00 29. "  IRQS701 ,IRQS Status Bit 701" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High"
bitfld.long 0x00 27. "  IRQS699 ,IRQS Status Bit 699" "Low,High"
bitfld.long 0x00 26. "  IRQS698 ,IRQS Status Bit 698" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High"
bitfld.long 0x00 24. "  IRQS696 ,IRQS Status Bit 696" "Low,High"
bitfld.long 0x00 23. "  IRQS695 ,IRQS Status Bit 695" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High"
bitfld.long 0x00 21. "  IRQS693 ,IRQS Status Bit 693" "Low,High"
bitfld.long 0x00 20. "  IRQS692 ,IRQS Status Bit 692" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High"
bitfld.long 0x00 18. "  IRQS690 ,IRQS Status Bit 690" "Low,High"
bitfld.long 0x00 17. "  IRQS689 ,IRQS Status Bit 689" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High"
bitfld.long 0x00 15. "  IRQS687 ,IRQS Status Bit 687" "Low,High"
bitfld.long 0x00 14. "  IRQS686 ,IRQS Status Bit 686" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High"
bitfld.long 0x00 12. "  IRQS684 ,IRQS Status Bit 684" "Low,High"
bitfld.long 0x00 11. "  IRQS683 ,IRQS Status Bit 683" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High"
bitfld.long 0x00 9. "  IRQS681 ,IRQS Status Bit 681" "Low,High"
bitfld.long 0x00 8. "  IRQS680 ,IRQS Status Bit 680" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High"
bitfld.long 0x00 6. "  IRQS678 ,IRQS Status Bit 678" "Low,High"
bitfld.long 0x00 5. "  IRQS677 ,IRQS Status Bit 677" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High"
bitfld.long 0x00 3. "  IRQS675 ,IRQS Status Bit 675" "Low,High"
bitfld.long 0x00 2. "  IRQS674 ,IRQS Status Bit 674" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High"
bitfld.long 0x00 0. "  IRQS672 ,IRQS Status Bit 672" "Low,High"
else
rgroup.long 0x0D58++0x03
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x17)
rgroup.long 0x0D5C++0x03
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High"
bitfld.long 0x00 30. "  IRQS734 ,IRQS Status Bit 734" "Low,High"
bitfld.long 0x00 29. "  IRQS733 ,IRQS Status Bit 733" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High"
bitfld.long 0x00 27. "  IRQS731 ,IRQS Status Bit 731" "Low,High"
bitfld.long 0x00 26. "  IRQS730 ,IRQS Status Bit 730" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High"
bitfld.long 0x00 24. "  IRQS728 ,IRQS Status Bit 728" "Low,High"
bitfld.long 0x00 23. "  IRQS727 ,IRQS Status Bit 727" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High"
bitfld.long 0x00 21. "  IRQS725 ,IRQS Status Bit 725" "Low,High"
bitfld.long 0x00 20. "  IRQS724 ,IRQS Status Bit 724" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High"
bitfld.long 0x00 18. "  IRQS722 ,IRQS Status Bit 722" "Low,High"
bitfld.long 0x00 17. "  IRQS721 ,IRQS Status Bit 721" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High"
bitfld.long 0x00 15. "  IRQS719 ,IRQS Status Bit 719" "Low,High"
bitfld.long 0x00 14. "  IRQS718 ,IRQS Status Bit 718" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High"
bitfld.long 0x00 12. "  IRQS716 ,IRQS Status Bit 716" "Low,High"
bitfld.long 0x00 11. "  IRQS715 ,IRQS Status Bit 715" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High"
bitfld.long 0x00 9. "  IRQS713 ,IRQS Status Bit 713" "Low,High"
bitfld.long 0x00 8. "  IRQS712 ,IRQS Status Bit 712" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High"
bitfld.long 0x00 6. "  IRQS710 ,IRQS Status Bit 710" "Low,High"
bitfld.long 0x00 5. "  IRQS709 ,IRQS Status Bit 709" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High"
bitfld.long 0x00 3. "  IRQS707 ,IRQS Status Bit 707" "Low,High"
bitfld.long 0x00 2. "  IRQS706 ,IRQS Status Bit 706" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High"
bitfld.long 0x00 0. "  IRQS704 ,IRQS Status Bit 704" "Low,High"
else
rgroup.long 0x0D5C++0x03
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x18)
rgroup.long 0x060++0x03
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High"
bitfld.long 0x00 30. "  IRQS766 ,IRQS Status Bit 766" "Low,High"
bitfld.long 0x00 29. "  IRQS765 ,IRQS Status Bit 765" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High"
bitfld.long 0x00 27. "  IRQS763 ,IRQS Status Bit 763" "Low,High"
bitfld.long 0x00 26. "  IRQS762 ,IRQS Status Bit 762" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High"
bitfld.long 0x00 24. "  IRQS760 ,IRQS Status Bit 760" "Low,High"
bitfld.long 0x00 23. "  IRQS759 ,IRQS Status Bit 759" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High"
bitfld.long 0x00 21. "  IRQS757 ,IRQS Status Bit 757" "Low,High"
bitfld.long 0x00 20. "  IRQS756 ,IRQS Status Bit 756" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High"
bitfld.long 0x00 18. "  IRQS754 ,IRQS Status Bit 754" "Low,High"
bitfld.long 0x00 17. "  IRQS753 ,IRQS Status Bit 753" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High"
bitfld.long 0x00 15. "  IRQS751 ,IRQS Status Bit 751" "Low,High"
bitfld.long 0x00 14. "  IRQS750 ,IRQS Status Bit 750" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High"
bitfld.long 0x00 12. "  IRQS748 ,IRQS Status Bit 748" "Low,High"
bitfld.long 0x00 11. "  IRQS747 ,IRQS Status Bit 747" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High"
bitfld.long 0x00 9. "  IRQS745 ,IRQS Status Bit 745" "Low,High"
bitfld.long 0x00 8. "  IRQS744 ,IRQS Status Bit 744" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High"
bitfld.long 0x00 6. "  IRQS742 ,IRQS Status Bit 742" "Low,High"
bitfld.long 0x00 5. "  IRQS741 ,IRQS Status Bit 741" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High"
bitfld.long 0x00 3. "  IRQS739 ,IRQS Status Bit 739" "Low,High"
bitfld.long 0x00 2. "  IRQS738 ,IRQS Status Bit 738" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High"
bitfld.long 0x00 0. "  IRQS736 ,IRQS Status Bit 736" "Low,High"
else
rgroup.long 0x0D60++0x03
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x19)
rgroup.long 0x0D64++0x03
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High"
bitfld.long 0x00 30. "  IRQS798 ,IRQS Status Bit 798" "Low,High"
bitfld.long 0x00 29. "  IRQS797 ,IRQS Status Bit 797" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High"
bitfld.long 0x00 27. "  IRQS795 ,IRQS Status Bit 795" "Low,High"
bitfld.long 0x00 26. "  IRQS794 ,IRQS Status Bit 794" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High"
bitfld.long 0x00 24. "  IRQS792 ,IRQS Status Bit 792" "Low,High"
bitfld.long 0x00 23. "  IRQS791 ,IRQS Status Bit 791" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High"
bitfld.long 0x00 21. "  IRQS789 ,IRQS Status Bit 789" "Low,High"
bitfld.long 0x00 20. "  IRQS788 ,IRQS Status Bit 788" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High"
bitfld.long 0x00 18. "  IRQS786 ,IRQS Status Bit 786" "Low,High"
bitfld.long 0x00 17. "  IRQS785 ,IRQS Status Bit 785" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High"
bitfld.long 0x00 15. "  IRQS783 ,IRQS Status Bit 783" "Low,High"
bitfld.long 0x00 14. "  IRQS782 ,IRQS Status Bit 782" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High"
bitfld.long 0x00 12. "  IRQS780 ,IRQS Status Bit 780" "Low,High"
bitfld.long 0x00 11. "  IRQS779 ,IRQS Status Bit 779" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High"
bitfld.long 0x00 9. "  IRQS777 ,IRQS Status Bit 777" "Low,High"
bitfld.long 0x00 8. "  IRQS776 ,IRQS Status Bit 776" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High"
bitfld.long 0x00 6. "  IRQS774 ,IRQS Status Bit 774" "Low,High"
bitfld.long 0x00 5. "  IRQS773 ,IRQS Status Bit 773" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High"
bitfld.long 0x00 3. "  IRQS771 ,IRQS Status Bit 771" "Low,High"
bitfld.long 0x00 2. "  IRQS770 ,IRQS Status Bit 770" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High"
bitfld.long 0x00 0. "  IRQS768 ,IRQS Status Bit 768" "Low,High"
else
rgroup.long 0x0D64++0x03
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1A)
rgroup.long 0x0D68++0x03
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High"
bitfld.long 0x00 30. "  IRQS830 ,IRQS Status Bit 830" "Low,High"
bitfld.long 0x00 29. "  IRQS829 ,IRQS Status Bit 829" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High"
bitfld.long 0x00 27. "  IRQS827 ,IRQS Status Bit 827" "Low,High"
bitfld.long 0x00 26. "  IRQS826 ,IRQS Status Bit 826" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High"
bitfld.long 0x00 24. "  IRQS824 ,IRQS Status Bit 824" "Low,High"
bitfld.long 0x00 23. "  IRQS823 ,IRQS Status Bit 823" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High"
bitfld.long 0x00 21. "  IRQS821 ,IRQS Status Bit 821" "Low,High"
bitfld.long 0x00 20. "  IRQS820 ,IRQS Status Bit 820" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High"
bitfld.long 0x00 18. "  IRQS818 ,IRQS Status Bit 818" "Low,High"
bitfld.long 0x00 17. "  IRQS817 ,IRQS Status Bit 817" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High"
bitfld.long 0x00 15. "  IRQS815 ,IRQS Status Bit 815" "Low,High"
bitfld.long 0x00 14. "  IRQS814 ,IRQS Status Bit 814" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High"
bitfld.long 0x00 12. "  IRQS812 ,IRQS Status Bit 812" "Low,High"
bitfld.long 0x00 11. "  IRQS811 ,IRQS Status Bit 811" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High"
bitfld.long 0x00 9. "  IRQS809 ,IRQS Status Bit 809" "Low,High"
bitfld.long 0x00 8. "  IRQS808 ,IRQS Status Bit 808" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High"
bitfld.long 0x00 6. "  IRQS806 ,IRQS Status Bit 806" "Low,High"
bitfld.long 0x00 5. "  IRQS805 ,IRQS Status Bit 805" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High"
bitfld.long 0x00 3. "  IRQS803 ,IRQS Status Bit 803" "Low,High"
bitfld.long 0x00 2. "  IRQS802 ,IRQS Status Bit 802" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High"
bitfld.long 0x00 0. "  IRQS800 ,IRQS Status Bit 800" "Low,High"
else
rgroup.long 0x0D68++0x03
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1B)
rgroup.long 0x0D6C++0x03
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High"
bitfld.long 0x00 30. "  IRQS862 ,IRQS Status Bit 862" "Low,High"
bitfld.long 0x00 29. "  IRQS861 ,IRQS Status Bit 861" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High"
bitfld.long 0x00 27. "  IRQS859 ,IRQS Status Bit 859" "Low,High"
bitfld.long 0x00 26. "  IRQS858 ,IRQS Status Bit 858" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High"
bitfld.long 0x00 24. "  IRQS856 ,IRQS Status Bit 856" "Low,High"
bitfld.long 0x00 23. "  IRQS855 ,IRQS Status Bit 855" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High"
bitfld.long 0x00 21. "  IRQS853 ,IRQS Status Bit 853" "Low,High"
bitfld.long 0x00 20. "  IRQS852 ,IRQS Status Bit 852" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High"
bitfld.long 0x00 18. "  IRQS850 ,IRQS Status Bit 850" "Low,High"
bitfld.long 0x00 17. "  IRQS849 ,IRQS Status Bit 849" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High"
bitfld.long 0x00 15. "  IRQS847 ,IRQS Status Bit 847" "Low,High"
bitfld.long 0x00 14. "  IRQS846 ,IRQS Status Bit 846" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High"
bitfld.long 0x00 12. "  IRQS844 ,IRQS Status Bit 844" "Low,High"
bitfld.long 0x00 11. "  IRQS843 ,IRQS Status Bit 843" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High"
bitfld.long 0x00 9. "  IRQS841 ,IRQS Status Bit 841" "Low,High"
bitfld.long 0x00 8. "  IRQS840 ,IRQS Status Bit 840" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High"
bitfld.long 0x00 6. "  IRQS838 ,IRQS Status Bit 838" "Low,High"
bitfld.long 0x00 5. "  IRQS837 ,IRQS Status Bit 837" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High"
bitfld.long 0x00 3. "  IRQS835 ,IRQS Status Bit 835" "Low,High"
bitfld.long 0x00 2. "  IRQS834 ,IRQS Status Bit 834" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High"
bitfld.long 0x00 0. "  IRQS832 ,IRQS Status Bit 832" "Low,High"
else
rgroup.long 0x0D6C++0x03
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1C)
rgroup.long 0x0D70++0x03
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High"
bitfld.long 0x00 30. "  IRQS894 ,IRQS Status Bit 894" "Low,High"
bitfld.long 0x00 29. "  IRQS893 ,IRQS Status Bit 893" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High"
bitfld.long 0x00 27. "  IRQS891 ,IRQS Status Bit 891" "Low,High"
bitfld.long 0x00 26. "  IRQS890 ,IRQS Status Bit 890" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High"
bitfld.long 0x00 24. "  IRQS888 ,IRQS Status Bit 888" "Low,High"
bitfld.long 0x00 23. "  IRQS887 ,IRQS Status Bit 887" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High"
bitfld.long 0x00 21. "  IRQS885 ,IRQS Status Bit 885" "Low,High"
bitfld.long 0x00 20. "  IRQS884 ,IRQS Status Bit 884" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High"
bitfld.long 0x00 18. "  IRQS882 ,IRQS Status Bit 882" "Low,High"
bitfld.long 0x00 17. "  IRQS881 ,IRQS Status Bit 881" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High"
bitfld.long 0x00 15. "  IRQS879 ,IRQS Status Bit 879" "Low,High"
bitfld.long 0x00 14. "  IRQS878 ,IRQS Status Bit 878" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High"
bitfld.long 0x00 12. "  IRQS876 ,IRQS Status Bit 876" "Low,High"
bitfld.long 0x00 11. "  IRQS875 ,IRQS Status Bit 875" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High"
bitfld.long 0x00 9. "  IRQS873 ,IRQS Status Bit 873" "Low,High"
bitfld.long 0x00 8. "  IRQS872 ,IRQS Status Bit 872" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High"
bitfld.long 0x00 6. "  IRQS870 ,IRQS Status Bit 870" "Low,High"
bitfld.long 0x00 5. "  IRQS869 ,IRQS Status Bit 869" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High"
bitfld.long 0x00 3. "  IRQS867 ,IRQS Status Bit 867" "Low,High"
bitfld.long 0x00 2. "  IRQS866 ,IRQS Status Bit 866" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High"
bitfld.long 0x00 0. "  IRQS864 ,IRQS Status Bit 864" "Low,High"
else
rgroup.long 0x0D70++0x03
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1D)
rgroup.long 0x0D74++0x03
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High"
bitfld.long 0x00 30. "  IRQS926 ,IRQS Status Bit 926" "Low,High"
bitfld.long 0x00 29. "  IRQS925 ,IRQS Status Bit 925" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High"
bitfld.long 0x00 27. "  IRQS923 ,IRQS Status Bit 923" "Low,High"
bitfld.long 0x00 26. "  IRQS922 ,IRQS Status Bit 922" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High"
bitfld.long 0x00 24. "  IRQS920 ,IRQS Status Bit 920" "Low,High"
bitfld.long 0x00 23. "  IRQS919 ,IRQS Status Bit 919" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High"
bitfld.long 0x00 21. "  IRQS917 ,IRQS Status Bit 917" "Low,High"
bitfld.long 0x00 20. "  IRQS916 ,IRQS Status Bit 916" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High"
bitfld.long 0x00 18. "  IRQS914 ,IRQS Status Bit 914" "Low,High"
bitfld.long 0x00 17. "  IRQS913 ,IRQS Status Bit 913" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High"
bitfld.long 0x00 15. "  IRQS911 ,IRQS Status Bit 911" "Low,High"
bitfld.long 0x00 14. "  IRQS910 ,IRQS Status Bit 910" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High"
bitfld.long 0x00 12. "  IRQS908 ,IRQS Status Bit 908" "Low,High"
bitfld.long 0x00 11. "  IRQS907 ,IRQS Status Bit 907" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High"
bitfld.long 0x00 9. "  IRQS905 ,IRQS Status Bit 905" "Low,High"
bitfld.long 0x00 8. "  IRQS904 ,IRQS Status Bit 904" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High"
bitfld.long 0x00 6. "  IRQS902 ,IRQS Status Bit 902" "Low,High"
bitfld.long 0x00 5. "  IRQS901 ,IRQS Status Bit 901" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High"
bitfld.long 0x00 3. "  IRQS899 ,IRQS Status Bit 899" "Low,High"
bitfld.long 0x00 2. "  IRQS898 ,IRQS Status Bit 898" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High"
bitfld.long 0x00 0. "  IRQS896 ,IRQS Status Bit 896" "Low,High"
else
rgroup.long 0x0D74++0x03
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1E)
rgroup.long 0x0D78++0x03
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High"
bitfld.long 0x00 30. "  IRQS958 ,IRQS Status Bit 958" "Low,High"
bitfld.long 0x00 29. "  IRQS957 ,IRQS Status Bit 957" "Low,High"
textline "                               "
bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High"
bitfld.long 0x00 27. "  IRQS955 ,IRQS Status Bit 955" "Low,High"
bitfld.long 0x00 26. "  IRQS954 ,IRQS Status Bit 954" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High"
bitfld.long 0x00 24. "  IRQS952 ,IRQS Status Bit 952" "Low,High"
bitfld.long 0x00 23. "  IRQS951 ,IRQS Status Bit 951" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High"
bitfld.long 0x00 21. "  IRQS949 ,IRQS Status Bit 949" "Low,High"
bitfld.long 0x00 20. "  IRQS948 ,IRQS Status Bit 948" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High"
bitfld.long 0x00 18. "  IRQS946 ,IRQS Status Bit 946" "Low,High"
bitfld.long 0x00 17. "  IRQS945 ,IRQS Status Bit 945" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High"
bitfld.long 0x00 15. "  IRQS943 ,IRQS Status Bit 943" "Low,High"
bitfld.long 0x00 14. "  IRQS942 ,IRQS Status Bit 942" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High"
bitfld.long 0x00 12. "  IRQS940 ,IRQS Status Bit 940" "Low,High"
bitfld.long 0x00 11. "  IRQS939 ,IRQS Status Bit 939" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High"
bitfld.long 0x00 9. "  IRQS937 ,IRQS Status Bit 937" "Low,High"
bitfld.long 0x00 8. "  IRQS936 ,IRQS Status Bit 936" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High"
bitfld.long 0x00 6. "  IRQS934 ,IRQS Status Bit 934" "Low,High"
bitfld.long 0x00 5. "  IRQS933 ,IRQS Status Bit 933" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High"
bitfld.long 0x00 3. "  IRQS931 ,IRQS Status Bit 931" "Low,High"
bitfld.long 0x00 2. "  IRQS930 ,IRQS Status Bit 930" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High"
bitfld.long 0x00 0. "  IRQS928 ,IRQS Status Bit 928" "Low,High"
else
rgroup.long 0x0D78++0x03
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(AD:0x03881000+0x04))&0x0000001F)>=0x1F)
rgroup.long 0x0D7C++0x03
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High"
bitfld.long 0x00 26. "  IRQS986 ,IRQS Status Bit 986" "Low,High"
textline "                               "
bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High"
bitfld.long 0x00 24. "  IRQS984 ,IRQS Status Bit 984" "Low,High"
bitfld.long 0x00 23. "  IRQS983 ,IRQS Status Bit 983" "Low,High"
textline "                               "
bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High"
bitfld.long 0x00 21. "  IRQS981 ,IRQS Status Bit 981" "Low,High"
bitfld.long 0x00 20. "  IRQS980 ,IRQS Status Bit 980" "Low,High"
textline "                               "
bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High"
bitfld.long 0x00 18. "  IRQS978 ,IRQS Status Bit 978" "Low,High"
bitfld.long 0x00 17. "  IRQS977 ,IRQS Status Bit 977" "Low,High"
textline "                               "
bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High"
bitfld.long 0x00 15. "  IRQS975 ,IRQS Status Bit 975" "Low,High"
bitfld.long 0x00 14. "  IRQS974 ,IRQS Status Bit 974" "Low,High"
textline "                               "
bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High"
bitfld.long 0x00 12. "  IRQS972 ,IRQS Status Bit 972" "Low,High"
bitfld.long 0x00 11. "  IRQS971 ,IRQS Status Bit 971" "Low,High"
textline "                               "
bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High"
bitfld.long 0x00 9. "  IRQS969 ,IRQS Status Bit 969" "Low,High"
bitfld.long 0x00 8. "  IRQS968 ,IRQS Status Bit 968" "Low,High"
textline "                               "
bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High"
bitfld.long 0x00 6. "  IRQS966 ,IRQS Status Bit 966" "Low,High"
bitfld.long 0x00 5. "  IRQS965 ,IRQS Status Bit 965" "Low,High"
textline "                               "
bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High"
bitfld.long 0x00 3. "  IRQS963 ,IRQS Status Bit 963" "Low,High"
bitfld.long 0x00 2. "  IRQS962 ,IRQS Status Bit 962" "Low,High"
textline "                               "
bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High"
bitfld.long 0x00 0. "  IRQS960 ,IRQS Status Bit 960" "Low,High"
else
rgroup.long 0x0D7C++0x03
line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
tree.end
width 25.
tree "Software Generated Interrupt"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
bitfld.long 0x00 24.--25. " TLF           ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
hexmask.long.byte 0x00 16.--23. 1. "  CPUTL         ,CPU Target List"
textline "                                  "
bitfld.long 0x00 15. " NSATT         ,NSATT" "Secure,Non-secure"
bitfld.long 0x00 0.--3. "   SGINTID       ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
bitfld.long 0x00 24.--25. " TLF           ,Target List Filter" "TargetList,All CPUs,Request CPU,?..."
hexmask.long.byte 0x00 16.--23. 1. "  CPUTL         ,CPU Target List"
textline "                                  "
bitfld.long 0x00 0.--3. " SGINTID       ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x0F20++0x03
line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. -0x10 30. "     SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. -0x10 29. "  SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. -0x10 27. "     SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. -0x10 26. "  SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. -0x10 24. "     SET/CLR_SGI0  ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. -0x10 23. "  SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. -0x10 21. "     SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. -0x10 20. "  SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. -0x10 18. "     SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. -0x10 17. "  SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1  ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. -0x10 15. "     SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. -0x10 14. "  SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. -0x10 12. "     SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. -0x10 11. "  SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. -0x10 9. "     SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. -0x10 8. "  SET/CLR_SGI2  ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. -0x10 6. "     SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. -0x10 5. "  SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. -0x10 3. "     SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. -0x10 2. "  SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. -0x10 0. "     SET/CLR_SGI3  ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled"
group.long 0x0F24++0x03
line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. -0x10 30. "     SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. -0x10 29. "  SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. -0x10 27. "     SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. -0x10 26. "  SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. -0x10 24. "     SET/CLR_SGI4  ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. -0x10 23. "  SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. -0x10 21. "     SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. -0x10 20. "  SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. -0x10 18. "     SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. -0x10 17. "  SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5  ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. -0x10 15. "     SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. -0x10 14. "  SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. -0x10 12. "     SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. -0x10 11. "  SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. -0x10 9. "     SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. -0x10 8. "  SET/CLR_SGI6  ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. -0x10 6. "     SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. -0x10 5. "  SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. -0x10 3. "     SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. -0x10 2. "  SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. -0x10 0. "     SET/CLR_SGI7  ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled"
group.long 0x0F28++0x03
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. -0x10 30. "     SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. -0x10 29. "  SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. -0x10 27. "     SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. -0x10 26. "  SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. -0x10 24. "     SET/CLR_SGI8  ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. -0x10 23. "  SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. -0x10 21. "     SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. -0x10 20. "  SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. -0x10 18. "     SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. -0x10 17. "  SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9  ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. -0x10 15. "     SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. -0x10 14. "  SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. -0x10 12. "     SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. -0x10 11. "  SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. -0x10 9. "     SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. -0x10 8. "  SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. -0x10 6. "     SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. -0x10 5. "  SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. -0x10 3. "     SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. -0x10 2. "  SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. -0x10 0. "     SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled"
group.long 0x0F2C++0x03
line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. -0x10 30. "     SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. -0x10 29. "  SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. -0x10 27. "     SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. -0x10 26. "  SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. -0x10 24. "     SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. -0x10 23. "  SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. -0x10 21. "     SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. -0x10 20. "  SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. -0x10 18. "     SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. -0x10 17. "  SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. -0x10 15. "     SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. -0x10 14. "  SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. -0x10 12. "     SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. -0x10 11. "  SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. -0x10 9. "     SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. -0x10 8. "  SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. -0x10 6. "     SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. -0x10 5. "  SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. -0x10 3. "     SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. -0x10 2. "  SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
textline "                                  "
setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. -0x10 0. "     SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled"
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.byte 0x0FE0++0x00
line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register"
hexmask.byte 0x00 0.--7. 1. " DEVID         ,DevID field"
rgroup.byte 0x0FE4++0x00
line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register"
bitfld.byte 0x00 4.--7. " ARCHID        ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x00 0.--3. "             DEVID         ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.byte 0x0FE8++0x00
line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register"
bitfld.byte 0x00 4.--7. " ARCHREV       ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.byte 0x00 3. "             UJEPCODE      ,UsesJEPcode field" "Low,High"
bitfld.byte 0x00 0.--2. "           ARCHID         ,ArchID field" "0,1,2,3,4,5,6,7"
rgroup.byte 0x0FEC++0x00
line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register"
bitfld.byte 0x00 4.--7. " REVID         ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.byte 0x0FD0++0x00
line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register"
bitfld.byte 0x00 0.--3. " CC            ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.byte 0xFD4++0x00
line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register"
rgroup.byte 0xFD8++0x00
line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register"
rgroup.byte 0xFDC++0x00
line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register"
textline "                 "
rgroup.byte 0xFF0++0x00
line.byte 0x00 "GICD_CIDR0,Component ID0 Register"
hexmask.byte 0x00 0.--7. 1. " FIXVAL        ,ARM-defined fixed values for the preamble for component discovery"
rgroup.byte 0xFF4++0x00
line.byte 0x00 "GICD_CIDR1,Component ID1 Register"
hexmask.byte 0x00 0.--7. 1. " FIXVAL        ,ARM-defined fixed values for the preamble for component discovery"
rgroup.byte 0xFF8++0x00
line.byte 0x00 "GICD_CIDR2,Component ID2 Register"
hexmask.byte 0x00 0.--7. 1. " FIXVAL        ,ARM-defined fixed values for the preamble for component discovery"
rgroup.byte 0xFFC++0x00
line.byte 0x00 "GICD_CIDR3,Component ID3 Register"
hexmask.byte 0x00 0.--7. 1. " FIXVAL        ,ARM-defined fixed values for the preamble for component discovery"
textline "                 "
tree.end
tree.end
width 0x0B
base AD:0x03882000
width 17.
tree "CPU Interface"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x0)
group.long 0x0000++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
bitfld.long 0x00 5. "              FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
textline "                          "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
textline "                          "
textline "                          "
else
if PER.ADDRESS.isSECUREEX(AD:0x03882000)
group.long 0x0000++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)"
bitfld.long 0x00 10. " EOIMODENS     ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
bitfld.long 0x00 9. "  EOIMODES      ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
textline "                          "
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
bitfld.long 0x00 6. "              IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
bitfld.long 0x00 5. "              FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
textline "                          "
bitfld.long 0x00 4. " CBPR          ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common"
bitfld.long 0x00 3. "            FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 2. "                       ACKCTL        ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1    ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
bitfld.long 0x00 0. "                  ENABLEGRP0    ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register  (Non-secure access)"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled"
bitfld.long 0x00 5. "              FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled"
textline "                          "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled"
textline "                          "
textline "                          "
endif
endif
group.long 0x0004++0x03
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY      ,Priority mask level for CPU interface"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
if PER.ADDRESS.isSECUREEX(AD:0x03882000+0x0008)
group.long 0x0008++0x03
line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)"
bitfld.long 0x00 0.--2. " BINARY_POINT  ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
else
group.long 0x0008++0x03
line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)"
bitfld.long 0x00 0.--2. " BINARY_POINT  ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
endif
else
group.long 0x0008++0x03
line.long 0x00 "GICC_BPR,Binary Point Register"
bitfld.long 0x00 0.--2. " BINARY_POINT  ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
endif
hgroup.long 0x000C++0x03
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
in
wgroup.long 0x0010++0x03
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID         ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         EOIINTID      ,The Interrupt ID value from the corresponding GICC_IAR access"
rgroup.long 0x0014++0x03
line.long 0x00 "GICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY      ,The current running priority on the CPU interface"
rgroup.long 0x0018++0x03
line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID         ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         PENDINTID     ,The interrupt ID of the highest priority pending interrupt"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
group.long 0x001C++0x03
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BINARY_POINT  ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
else
hgroup.long 0x001C++0x03
hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
endif
hgroup.long 0x0020++0x003
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
in
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
wgroup.long 0x0024++0x03
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID         ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         EOIINTID      ,The Interrupt ID value from the corresponding GICC_IAR access"
rgroup.long 0x0028++0x03
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID         ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         PENDINTID     ,The interrupt ID of the highest priority pending interrupt"
else
hgroup.long 0x0024++0x03
hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
hgroup.long 0x0028++0x03
hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
endif
group.long 0x00D0++0x03
line.long 0x00 "GICC_APR0,Active Priorities Register"
if (((per.l(AD:0x03881000+0x04))&0x400)==0x400)
group.long 0x00E0++0x03
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
else
hgroup.long 0x00E0++0x03
hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register"
endif
rgroup.long 0x00FC++0x03
line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID        ,Product ID"
bitfld.long 0x00 16.--19. "  ARCH_VER        ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..."
textline "                     "
bitfld.long 0x00 12.--15. "      REV           ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "    IMP             ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID         ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "     INTID         ,The interrupt ID"
tree.end
sif CPU.FEATURE(hypervisor)
base AD:0x03884000
width 12.
tree "Virtual CPU Control Interface"
group.long 0x0000++0x03
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
bitfld.long 0x00 27.--31. " EOICOUNT  ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "                    VGRP1DIE   ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "      VGRP1EIE  ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 5. " VGRP0DIE  ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "              VGRP0EIE   ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      NPIE      ,No Pending Interrupt Enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 2. " LRENPIE   ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "              UIE        ,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      EN        ,Enable" "Disabled,Enabled"
rgroup.long 0x0004++0x03
line.long 0x00 "GICH_VTR,VGIC Type Register"
bitfld.long 0x00 29.--31. " PRIBITS   ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..."
textline "                     "
bitfld.long 0x00 26.--28. " PREBITS   ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..."
textline "                     "
bitfld.long 0x00 0.--5. " LISTREGS  ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..."
group.long 0x008++0x03
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 21.--23. "                    VMBP       ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "             VMABP     ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7"
textline "                     "
bitfld.long 0x00 9. " VEM       ,Alias of GICV_CTLR.EOImode" "0,1"
bitfld.long 0x00 4. "                     VMCBPR     ,Alias of GICV_CTLR.CBPR" "0,1"
bitfld.long 0x00 3. "             VMFIQEN   ,Alias of GICV_CTLR.FIQEn" "0,1"
textline "                     "
bitfld.long 0x00 2. " VMACKCTL  ,Alias of GICV_CTLR.AckCtl" "0,1"
bitfld.long 0x00 1. "                     VMGRP1EN   ,Alias of GICV_CTLR.EnableGrp1" "0,1"
bitfld.long 0x00 0. "             VMGRP0EN  ,Alias of GICV_CTLR.EnableGrp0" "0,1"
rgroup.long 0x0010++0x03
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
bitfld.long 0x00 7. " VGRP1D    ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "          VGRP1E     ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  VGRP0D    ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 4. " VGRP0E    ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "          NP         ,No Pending maintenance interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  LRENP     ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 1. " U         ,Underflow maintenance interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "          EOI        ,EOI maintenance interrupt" "No interrupt,Interrupt"
rgroup.long 0x020++0x03
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
bitfld.long 0x00 3. " STATUS3   ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "          STATUS2    ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1   ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
textline "                     "
bitfld.long 0x00 0. " STATUS0   ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
rgroup.long 0x0030++0x03
line.long 0x00 "GICH_ELSR0,Empty List register Status Register"
bitfld.long 0x00 3. " STATUS3   ,Emptiness status bit for List register 3" "Not empty,Empty"
bitfld.long 0x00 2. "             STATUS2    ,Emptiness status bit for List register 2" "Not empty,Empty"
bitfld.long 0x00 1. "     STATUS1   ,Emptiness status bit for List register 1" "Not empty,Empty"
textline "                     "
bitfld.long 0x00 0. " STATUS0   ,Emptiness status bit for List register 0" "Not empty,Empty"
group.long 0x00F0++0x03
line.long 0x00 "GICH_APR0,Active Priorities Register"
bitfld.long 0x00 31. " APB31     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 30. "            APB30      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 29. "    APB29     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 28. " APB28     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 27. "            APB27      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 26. "    APB26     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 25. " APB25     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 24. "            APB24      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 23. "    APB23     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 22. " APB22     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 21. "            APB21      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 20. "    APB20     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 19. " APB19     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 18. "            APB18      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 17. "    APB17     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 16. " APB16     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 15. "            APB15      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 14. "    APB14     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 13. " APB13     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 12. "            APB12      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 11. "    APB11     ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 10. " APB10     ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 9. "            APB9       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 8. "    APB8      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 7. " APB7      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 6. "            APB6       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 5. "    APB5      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 4. " APB4      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 3. "            APB3       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 2. "    APB2      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 1. " APB1      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 0. "            APB0       ,Determines whether the corresponding preemption level is active" "Not active,Active"
if (((per.l(AD:0x03884000+0x100))&0x80000000)==0x80000000)
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "                    PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
hexmask.long.word 0x00 0.--9. 1. "          VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
else
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 19. "                    EOI        ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
bitfld.long 0x00 10.--12. "  CPUID     ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
textline "                     "
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
endif
if (((per.l(AD:0x03884000+0x104))&0x80000000)==0x80000000)
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "                    PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
hexmask.long.word 0x00 0.--9. 1. "          VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
else
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 19. "                    EOI        ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
bitfld.long 0x00 10.--12. "  CPUID     ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
textline "                     "
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
endif
if (((per.l(AD:0x03884000+0x108))&0x80000000)==0x80000000)
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "                    PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
hexmask.long.word 0x00 0.--9. 1. "          VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
else
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 19. "                    EOI        ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
bitfld.long 0x00 10.--12. "  CPUID     ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
textline "                     "
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
endif
if (((per.l(AD:0x03884000+0x10C))&0x80000000)==0x80000000)
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "                    PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor"
hexmask.long.word 0x00 0.--9. 1. "          VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
else
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW        ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "              GRP1       ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "       STATE     ,The state of the interrupt" "Invalid,Pending,Active,Pending and active"
textline "                     "
bitfld.long 0x00 23.--27. " PRIORITY  ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 19. "                    EOI        ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted"
bitfld.long 0x00 10.--12. "  CPUID     ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7"
textline "                     "
hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR"
endif
tree.end
base AD:0x03886000
width 12.
tree "Virtual CPU Interface"
group.long 0x0000++0x03
line.long 0x00 "GICV_CTLR,Virtual Machine Control Register"
bitfld.long 0x00 9. " EOIMODE      ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop"
bitfld.long 0x00 4. "  CBPR       ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common"
bitfld.long 0x00 3. "  FIQEN      ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs"
textline "                     "
bitfld.long 0x00 2. " ACKCTL       ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt"
bitfld.long 0x00 1. "   ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
bitfld.long 0x00 0. "        ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled"
group.long 0x0004++0x03
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
bitfld.long 0x00 3.--7. " PRIORITY     ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x0008++0x03
line.long 0x00 "GICV_BPR,VM Binary Point Register"
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
hgroup.long 0x000C++0x03
hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
in
wgroup.long 0x0010++0x03
line.long 0x00 "GICV_EOIR,VM End of Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID        ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         EOIINTID   ,The Interrupt ID value from the corresponding GICC_IAR access"
rgroup.long 0x0014++0x03
line.long 0x00 "GICV_RPR,VM Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY     ,The current running priority on the Virtual CPU interface"
rgroup.long 0x0018++0x03
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID        ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         PENDINTID  ,The interrupt ID of the highest priority pending interrupt"
group.long 0x001C++0x03
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
hgroup.long 0x0020++0x03
hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
in
wgroup.long 0x0024++0x03
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID        ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         EOIINTID   ,The Interrupt ID value from the corresponding GICC_IAR access"
rgroup.long 0x0028++0x03
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID        ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         PENDINTID  ,The interrupt ID of the highest priority pending interrupt"
group.long 0x00D0++0x03
line.long 0x00 "GICV_APR0,VM Active Priority Register"
bitfld.long 0x00 31. " APB31        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 30. "                APB30      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 29. "  APB29      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 28. " APB28        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 27. "                APB27      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 26. "  APB26      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 25. " APB25        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 24. "                APB24      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 23. "  APB23      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 22. " APB22        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 21. "                APB21      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 20. "  APB20      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 19. " APB19        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 18. "                APB18      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 17. "  APB17      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 16. " APB16        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 15. "                APB15      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 14. "  APB14      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 13. " APB13        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 12. "                APB12      ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 11. "  APB11      ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 10. " APB10        ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 9. "                APB9       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 8. "  APB8       ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 7. " APB7         ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 6. "                APB6       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 5. "  APB5       ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 4. " APB4         ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 3. "                APB3       ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 2. "  APB2       ,Determines whether the corresponding preemption level is active" "Not active,Active"
textline "                     "
bitfld.long 0x00 1. " APB1         ,Determines whether the corresponding preemption level is active" "Not active,Active"
bitfld.long 0x00 0. "                APB0       ,Determines whether the corresponding preemption level is active" "Not active,Active"
rgroup.long 0x00FC++0x03
line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID       ,Product ID"
bitfld.long 0x00 16.--19. "                      ARCH_VER   ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..."
textline "                     "
bitfld.long 0x00 12.--15. " REV          ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                        IMP        ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
bitfld.long 0x00 10.--12. " CPUID        ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--9. 1. "                         INTID      ,The interrupt ID"
tree.end
endif
width 0x0B
tree.end
tree.end
else
tree "Core Registers (Cortex-R5F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
width 0x8
; --------------------------------------------------------------------------------
;    Identification registers
; --------------------------------------------------------------------------------
tree "ID Registers"
rgroup.long c15:0x00++0x00
line.long 0x00 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL     ,Implementer code"
bitfld.long 0x0 20.--23.  "           VAR      ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19.  "           ARCH     ,Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
textline "                 "
hexmask.long.word 0x0 4.--15. 0x1 " PART     ,Primary Part Number"
bitfld.long 0x0 0.--3. "         REV      ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c15:0x100++0x00
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 24.--27. " CWG      ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                 "
bitfld.long 0x00 20.--23. " ERG      ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19. "           DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
bitfld.long 0x0 14.--15. "  L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
textline "                 "
bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
rgroup.long c15:0x400--0x400
line.long 0x0 "MPUIR,MPU type register"
hexmask.long.byte 0x00 8.--15. 1. " REGNUM   ,Number of regions"
bitfld.long 0x00 0. "           TYPE     ,Type of MPU regions" "Unified,Seperated"
rgroup.long c15:0x500++0x00
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30.--31. " MULT_EXT ,Multiprocessing extensions" "No extensions,Reserved,Reserved,Part of a uniprocessor system"
textline "                 "
hexmask.long.byte 0x00 16.--23. 1. " AFFL2    ,Affitnity Level 2"
hexmask.long.byte 0x00 8.--15. 1. "           AFFL1    ,Affitnity Level 1"
hexmask.long.byte 0x00 0.--7. 1. "           AFFL0    ,Affitnity Level 0"
textline "                 "
rgroup.long c15:0x0410++0x00
line.long 0x00 "MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. " IT         ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "      FCSE       ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " ACR        ,Auxiliary Control Register Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      TCM        ,TCM and Associated DMA Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " SL         ,Number of Shareability levels implemented" "1,?..."
bitfld.long 0x00 8.--11. "              OS         ,Outermost Shareability domain support" "Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " PMSA       ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "  VMSA       ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0510++0x00
line.long 0x00 "MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. " BTB        ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
bitfld.long 0x00 24.--27. "   L1TCO      ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " L1UCMO     ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "  L1HCMO     ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " L1UCLMOSW  ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "  L1HCLMOSW  ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "  L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
rgroup.long c15:0x0610++0x00
line.long 0x00 "MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. " HAF        ,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "  WFI        ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " MBF        ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      UTLBMO     ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " HTLBMO     ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "      HL1CMRO    ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " HL1BPCRO   ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "  HL1FPCRO   ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.long c15:0x0710++0x00
line.long 0x00 "MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. " SS         ,Supersection support" "Supported,?..."
bitfld.long 0x00 20.--23. "      CW         ,Coherent walk" "Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " MB         ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " HCMOSW     ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      HCMOMVA    ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
rgroup.long c15:0x020++0x00
line.long 0x00 "ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVI       ,Divide Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "  DEBI       ,Debug Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 16.--19. " CI         ,Coprocessor Instructions Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "  CBI        ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 8.--11. " BI         ,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "      BCI        ,Bit Counting Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 0.--3. " SI         ,Swap Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x120++0x00
line.long 0x00 "ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 28.--31. " JI         ,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "      INTI       ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " IMMI       ,Immediate Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      ITEI       ,If Then Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " EXTI       ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "      E2I        ,Exception 2 Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " E1I        ,Exception 1 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      ENDI       ,Endianness Control Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x220++0x00
line.long 0x00 "ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " RI         ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "      PSRI       ,PSR Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " UMI        ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      SMI        ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " MI         ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "      II         ,Multi-Access Interruptible Instructions Support" "Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " MHI        ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      LSI        ,Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x320++0x00
line.long 0x00 "ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 28.--31. " T2E        ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "      NOPI       ,True NOP Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " TCI        ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      TBI        ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " SPI        ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "      SVCI       ,SVC Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " SIMDI      ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      SI         ,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x420++0x00
line.long 0x00 "ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 28.--31. " SWP_FRAC   ,SWAP_frac" "Supported,?..."
bitfld.long 0x00 24.--27. "      PSR_M_I    ,PSR_M Instructions Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 20.--23. " EI         ,Exclusive Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "      BI         ,Barrier Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 12.--15. " SMII       ,SMI Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "      WBI        ,Write-Back Instructions Support" "Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 4.--7. " WSI        ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      UI         ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0520++0x00
line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)"
rgroup.long c15:0x0620++0x00
line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)"
rgroup.long c15:0x0720++0x00
line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)"
rgroup.long c15:0x010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "  STATE2 ,Java Extension Interface Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "  STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
textline "                 "
bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.long c15:0x110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 8.--11. " MPM    ,Microcontroller Programmer's Model Support" "Supported,?..."
bitfld.long 0x00 4.--7. "  SE     ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "      PM     ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
textline "                 "
rgroup.long c15:0x210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "  TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "      TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
textline "                 "
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "      SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "  CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..."
rgroup.long c15:0x310++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long c15:0x02f++0x00
line.long 0x00 "BO1R,Build Options 1 Register"
hexmask.long.long 0x00 12.--31. 0x1000 " TCM_HI_INIT_ADDR    ,Default high address for the TCM"
bitfld.long 0x00 1. "                  FLOAT_PRECISION ,Indicate whether double-precision floating point is implemented" "Not implemented,Implemented"
textline "                 "
bitfld.long 0x00 0. " PP_BUS_ECC          ,Indicate whether bus-ECC is implemented" "Not implemented,Implemented"
group.long c15:0x12f++0x00
line.long 0x00 "BO2R,Build Options 2 Register"
bitfld.long 0x00 31. " NUM_CPU             ,Number of CPUs" "1,2"
bitfld.long 0x00 30. "                       LOCK_STEP       ,Indicate whether the CPU has redundant logic running in lock step for checking purposes" "Not included,Included"
textline "                 "
bitfld.long 0x00 29. " NO_ICACHE           ,Indicate whether the CPU contains instruction cache" "Yes,No"
bitfld.long 0x00 28. "                     NO_DCACHE       ,Indicate whether the CPU contains data cache" "Yes,No"
textline "                 "
bitfld.long 0x00 26.--27. " ATCM_ES             ,Indicate whether an error scheme is implemented on the ATCM interface" "No error scheme,32 bit error detection,Reserved,64 bit error detection"
bitfld.long 0x00 23.--25. "  BTCM_ES         ,Indicate whether an error scheme is implemented on the BTCM interface" "No error scheme,32 bit error detection,Reserved,64 bit error detection,?..."
textline "                 "
bitfld.long 0x00 23. " NO_IE               ,Indicate whether the processor supports big-endian instructions" "Yes,No"
bitfld.long 0x00 22. "                     NO_FPU          ,Indicate whether the CPU contains a floating point unit" "Yes,No"
textline "                 "
bitfld.long 0x00 20.--21. " MPU_REGIONS         ,Indicates the number of regions in the included CPU MPU" "No region,Reserved,12 regions,16 regions"
bitfld.long 0x00 17.--19. "              BREAK_POINTS    ,Indicate the number of break points implemented in each CPU in the processor minus 1" "0,1,2,3,4,5,6,7"
textline "                 "
bitfld.long 0x00 14.--16. " WATCH_POINTS        ,Indicate the number of watch points implemented in each CPU in the processor minus 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 13. "                       NO_A_TCM_INF    ,Indicate whether the CPUs contain ATCM ports" "Yes,No"
textline "                 "
bitfld.long 0x00 12. " NO_B0_TCM_INF       ,Indicate whether the CPUs contain B0TCM ports" "Yes,No"
bitfld.long 0x00 11. "                     NO_B1_TCM_INF   ,Indicate whether the CPUs contain B1TCM ports" "Yes,No"
textline "                 "
bitfld.long 0x00 10. " TCMBUSPARITY        ,Indicate whether the processor contains TCM address bus parity logic" "No,Yes"
bitfld.long 0x00 9. "                     NO_SLAVE        ,Indicate whether the CPU contains an AXI slave port" "Yes,No"
textline "                 "
bitfld.long 0x00 7.--8. " ICACHE_ES           ,Indicate whether an error scheme is implemented for the instruction cache" "No error scheme,8-bit parity,Reserved,64-bit ECC"
bitfld.long 0x00 5.--6. "         DCACHE_ES       ,Indicate whether an error scheme is implemented for the data cache" "No error scheme,8-bit parity,32-bit ECC,?..."
textline "                 "
bitfld.long 0x00 4. " NO_HARD_ERROR_CACHE ,Indicate whether the processor contains cache for corrected TCM errors" "Yes,No"
bitfld.long 0x00 3. "                     AXI_BUS_ECC     ,Indicate whether the processor contains AXI bus ECC logic" "No,Yes"
textline "                 "
bitfld.long 0x00 2. " SL                  ,Indicate whether the processor has been built with split/lock logic" "No,Yes"
bitfld.long 0x00 1. "                     AHB_PP          ,Indicate whether the CPU contain AHB peripheral interfaces" "No,Yes"
textline "                 "
bitfld.long 0x00 0. " MICRO_SCU           ,Indicate whether the processor contain an ACP interface" "No,Yes"
group.long c15:0x72f++0x00
line.long 0x00 "POR,Pin Options Register"
bitfld.long 0x00 4. " DBGNOCLKSTOP        ,Value of the DBGNOCLKSTOP pin" "Low,High"
bitfld.long 0x00 3. "                    INTSYNCEN       ,Value of the INTSYNCEN pin" "Low,High"
textline "                 "
bitfld.long 0x00 2. " IRQADDRVSYNCEN      ,Value of the IRQADDRVSYNCEN pin" "Low,High"
bitfld.long 0x00 1. "                    SLBTCMSB        ,Value of the SLBTCMSBm pin" "Low,High"
textline "                 "
bitfld.long 0x00 0. " PARITYLEVEL         ,Value of the PARITYLEVEL pin" "Low,High"
tree.end
width 0x8
tree "System Control and Configuration"
group.long c15:0x01++0x00
line.long 0x00 "SCTLR,Control Register"
bitfld.long 0x0 31. " IE  ,Instruction endianness" "Little,Big"
bitfld.long 0x0 30. "   TE  ,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 29. "    AFE ,Access Flag Enable" "Disable,Enable"
bitfld.long 0x0 28. "  TRE ,TEX remap enable" "Disable,Enable"
bitfld.long 0x0 27. "  NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
textline "                 "
bitfld.long 0x0 25. " EE  ,Exception endianess" "Little,Big"
bitfld.long 0x0 24. "   VE  ,Vector Enable" "Disable,Vectored"
bitfld.long 0x0 21. " FI  ,Fast Interrupts enable" "Disable,Enable"
textline "                 "
bitfld.long 0x0 19. " DZ  ,Divide by Zero exception bit" "Disable,Enable"
bitfld.long 0x0 17. "  BR  ,MPU Background region enable" "Disable,Enable"
bitfld.long 0x0 14. "  RR  ,Round-Robin bit" "Random,RRobin"
bitfld.long 0x0 13. "   V   ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
textline "                 "
bitfld.long 0x0 12. " I   ,Instruction Cache Enable" "Disable,Enable"
bitfld.long 0x0 11. "  Z   ,Branch Prediction Enable" "Disable,Enable"
bitfld.long 0x0 2. "  C   ,Enable data cache" "Disable,Enable"
bitfld.long 0x0 1. "  A   ,Strict Alignment" "Disable,Enable"
bitfld.long 0x0 0. "  M   ,MPU Enable" "Disable,Enable"
textline " "
group.long c15:0x101++0x00
line.long 0x0 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 31. " DICDI     ,Disable Case C dual issue control" "Enable,Disable"
bitfld.long 0x00 30. "    DIB2DI    ,Disable Case B2 dual issue control" "Enable,Disable"
bitfld.long 0x00 29. "    DIB1DI    ,Disable Case B1 dual issue control" "Enable,Disable"
textline "                 "
bitfld.long 0x00 28. " DIADI     ,Disable Case A dual issue control" "Enable,Disable"
bitfld.long 0x00 27. "    B1TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
bitfld.long 0x00 26. "    B0TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
textline "                 "
bitfld.long 0x00 25. " ATCMPCEN  ,B1TCM parity or ECC check enable" "Disable,Enable"
bitfld.long 0x00 24. "    AXISCEN   ,AXI slave cache access enable" "Disable,Enable"
bitfld.long 0x00 23. "    AXISCUEN  ,AXI slave cache User mode access enable" "Disable,Enable"
textline "                 "
bitfld.long 0x00 22. " DILSM     ,Disable LIL on load/store multiples" "Enable,Disable"
bitfld.long 0x00 21. "    DEOLP     ,Disable end of loop prediction" "Enable,Disable"
bitfld.long 0x00 20. "    DBHE      ,Disable BH extension" "Enable,Disable"
textline "                 "
bitfld.long 0x00 19. " FRCDIS    ,Fetch rate control disable" "Enable,Disable"
bitfld.long 0x00 17. "    RSDIS     ,Return stack disable" "Enable,Disable"
bitfld.long 0x00 15.--16. "    BP        ,Control of the branch prediction policy" "Normal,Taken,Not taken,?..."
textline "                 "
bitfld.long 0x00 14. " DBWR      ,Disable write_burst on AXI master" "Enable,Disable"
bitfld.long 0x00 13. "    DLFO      ,Disable linefill optimization in the AXI master" "Enable,Disable"
bitfld.long 0x00 12. "    ERPEG     ,Enable random parity error generation" "Disable,Enable"
textline "                 "
bitfld.long 0x00 11. " DNCH      ,Disable data forwarding for Non-cacheable accesses in the AXI master" "Enable,Disable"
bitfld.long 0x00 10. "    FORA      ,Force outer read allocate (ORA) for outer write allocate (OWA) regions" "Not forced,Forced"
bitfld.long 0x00 9. " FWT       ,Force write-through (WT) for write-back (WB) regions" "Not forced,Forced"
textline "                 "
bitfld.long 0x00 8. " FDSnS     ,Force D-side to not-shared when MPU is off" "Not forced,Forced"
bitfld.long 0x00 7. " SMOV      ,sMOV disabled" "Enabled,Disabled"
bitfld.long 0x0 6. "   DILS      ,Disable low interrupt latency on all load/store instructions" "Enable,Disable"
textline "                 "
bitfld.long 0x00 3.--5. " CEC       ,Cache error control for cache parity and ECC errors" "Generate abort,Generate abort,Generate abort,Reserved,Disabled parity checking,Not generate abort,Not generate abort,?..."
textline "                 "
bitfld.long 0x00 2. " B1TCMECEN ,B1TCM external error enable" "Disable,Enable"
bitfld.long 0x00 1. "    B0TCMECEN ,B0TCM external error enable" "Disable,Enable"
bitfld.long 0x00 0. "    ATCMECEN  ,ATCM external error enable" "Disable,Enable"
textline " "
group.long c15:0x0f++0x00
line.long 0x00 "SACTLR,Secondary Auxiliary Control Register"
bitfld.long 0x00 22. " DCHE      ,Disable hard-error support in the caches" "Enable,Disable"
bitfld.long 0x00 21. "    DR2B      ,Enable random 2-bit error genration in cache RAMs" "Disable,Enable"
bitfld.long 0x00 20. "    DF6DI     ,F6 dual issue control" "Enable,Disable"
textline "                 "
bitfld.long 0x00 19. " DF2DI     ,F2 dual issue control" "Enable,Disable"
bitfld.long 0x00 18. "    DDI       ,F1/F3/F4 dual issue control" "Enable,Disable"
bitfld.long 0x00 17. "    DOODPFP   ,Out-of-order Double Precision Floating-point control" "Enable,Disable"
textline "                 "
bitfld.long 0x00 16. " DOOFMACS  ,Out-of-order FMACS control" "Enable,Disable"
bitfld.long 0x00 13. "    IXC       ,Floating-point inexact exception output mask" "Mask,Propagate"
bitfld.long 0x00 12. "  OFC       ,Floating-point overflow exception output mask" "Mask,Propagate"
textline "                 "
bitfld.long 0x00 11. " UFC       ,Floating-point underflow exception output mask" "Mask,Propagate"
bitfld.long 0x00 10. "  IOC       ,Floating-point invalid operation exception output mask" "Mask,Propagate"
bitfld.long 0x00 9. "  DZC       ,Floating-point divide-by-zero exception output mask" "Mask,Propagate"
textline "                 "
bitfld.long 0x00 8. " IDC       ,Floating-point input denormal exception output mask" "Mask,Propagate"
bitfld.long 0x00 3. "  BTCMECC   ,Correction for internal ECC logic on BTCM ports" "Enable,Disable"
bitfld.long 0x00 2. "    ATCMECC   ,Correction for internal ECC logic on ATCM port" "Enable,Disable"
textline "                 "
bitfld.long 0x00 1. " BTCMRMW   ,Enable 64-bit stores on BTCMs" "Disable,Enable"
bitfld.long 0x00 0. "    ATCMRMW   ,Enable 64-bit stores on ATCM" "Disable,Enable"
textline " "
group.long c15:0x201++0x00
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 31. " ASEDIS    ,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x0 30. "        D32DIS    ,Disable use of D16-D31 of the VFP register file" "No,Yes"
textline "                 "
bitfld.long 0x0 26.--27. " CP13      ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 24.--25. " CP12      ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 22.--23. " CP11      ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 20.--21. " CP10      ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 18.--19. " CP9       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 16.--17. " CP8       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 14.--15. " CP7       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 12.--13. " CP6       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 10.--11. " CP5       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 8.--9. " CP4       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 6.--7. " CP3       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 4.--5. " CP2       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                 "
bitfld.long 0x0 2.--3. " CP1       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 0.--1. " CP0       ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline "                      "
group.long c15:0x000b++0x00
line.long 0x00 "SPCR,Slave Port Control Register"
bitfld.long 0x00 1. " PRIV    ,Privilege access only" "User/Privilege,Privilege only"
bitfld.long 0x00 0. "  AXISLEN ,AXI slave port disable" "Enabled,Disabled"
tree.end
width 0x8
tree "MPU Control and Configuration"
group.long c15:0x01++0x00
line.long 0x00 "SCTLR,Control Register"
bitfld.long 0x0 31. " IE  ,Instruction endianness" "Little,Big"
bitfld.long 0x0 30. "   TE  ,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 29. "    AFE ,Access Flag Enable" "Disable,Enable"
bitfld.long 0x0 28. "  TRE ,TEX remap enable" "Disable,Enable"
bitfld.long 0x0 27. "  NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
textline "                 "
bitfld.long 0x0 25. " EE  ,Exception endianess" "Little,Big"
bitfld.long 0x0 24. "   VE  ,Vector Enable" "Disable,Vectored"
bitfld.long 0x0 21. " FI  ,Fast Interrupts enable" "Disable,Enable"
textline "                 "
bitfld.long 0x0 19. " DZ  ,Divide by Zero exception bit" "Disable,Enable"
bitfld.long 0x0 17. "  BR  ,MPU Background region enable" "Disable,Enable"
bitfld.long 0x0 14. "  RR  ,Round-Robin bit" "Random,RRobin"
bitfld.long 0x0 13. "   V   ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
textline "                 "
bitfld.long 0x0 12. " I   ,Instruction Cache Enable" "Disable,Enable"
bitfld.long 0x0 11. "  Z   ,Branch Prediction Enable" "Disable,Enable"
bitfld.long 0x0 2. "  C   ,Enable data cache" "Disable,Enable"
bitfld.long 0x0 1. "  A   ,Strict Alignment" "Disable,Enable"
bitfld.long 0x0 0. "  M   ,MPU Enable" "Disable,Enable"
textline " "
group.long c15:0x05++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 12. " EXT      ,External Abort Qualifier" "DECERR,SLVERR"
bitfld.long 0x00 11. "            RW       ,Access Caused an Abort Type" "Read,Write"
textline "                 "
bitfld.long 0x00 4.--7. " DOMAIN   ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
bitfld.long 0x00 0.--3. 10.  "               STATUS   ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
group.long c15:0x15++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
bitfld.long 0x00 24.--27. " CACHEWAY ,Cache way or ways in which the error occurred" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 22.--23. 20. "                SIDE     ,Source of the error" "Cache/AXIM,ATCM,BTCM,Reserved,Reserved,AXI,AHB,Reserved"
textline "                 "
bitfld.long 0x00 21. " REC_ERR  ,Error recoverability indication" "Not recoverable,Recoverable"
bitfld.long 0x00 20. "   SIDE_EXT ,Source of the error" "Internal,External"
textline "                 "
hexmask.long.word 0x00 5.--13. 1. " INDEX    ,Index Value for The Access Giving the Error Register"
group.long c15:0x06++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
textline " "
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. " EXT      ,External Abort Qualifier" "DECERR,SLVERR"
bitfld.long 0x00 0.--3. 10. "            STATUS   ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
group.long c15:0x115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
bitfld.long 0x00 24.--27. " CACHEWAY ,Cache way or ways in which the error occurred" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 22.--23. 20. "                SIDE     ,Source of the error" "Cache/AXIM,ATCM,BTCM,Reserved,Reserved,AXI,AHB,Reserved"
textline "                 "
bitfld.long 0x00 21. " REC_ERR  ,Error recoverability indication" "Not recoverable,Recoverable"
bitfld.long 0x00 20. "   SIDE_EXT ,Source of the error" "Internal,External"
textline "                 "
hexmask.long.word 0x00 5.--13. 1. " INDEX    ,Index Value for The Access Giving the Error Register"
group.long c15:0x206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
textline " "
group.long c15:0x0016++0x00
line.long 0x00 "RBAR,Region Base Address Register"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group.long c15:0x0216++0x00
line.long 0x00 "RSER,Region Size and Enable Register"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group.long c15:0x0416++0x00
line.long 0x00 "RACR,Region Access Control Register"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " TYPE  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
group.long c15:0x0026++0x00
line.long 0x00 "MRNR,Memory Region Number Register"
bitfld.long 0x00 0.--3. " REGION  ,Defines the group of registers to be accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
group.long c15:0x010d++0x00
line.long 0x00 "CIDR,Context ID Register"
group.long c15:0x20d++0x00
line.long 0x00 "TIDRURW,User read/write Thread and Process ID Register"
group.long c15:0x30d++0x00
line.long 0x00 "TIDRURO,User read only Thread and Process ID Register"
group.long c15:0x40d++0x00
line.long 0x00 "TIDRPRW,Privileged Only Thread and Process ID Register"
width 0x08
tree "MPU regions"
group c15:0x0016++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RBAR0,Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RSER0,Region Size and Enable Register 0"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RACR0,Region Access Control Register 0"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RBAR1,Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RSER1,Region Size and Enable Register 1"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RACR1,Region Access Control Register 1"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RBAR2,Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RSER2,Region Size and Enable Register 2"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RACR2,Region Access Control Register 2"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RBAR3,Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RSER3,Region Size and Enable Register 3"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RACR3,Region Access Control Register 3"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RBAR4,Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RSER4,Region Size and Enable Register 4"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RACR4,Region Access Control Register 4"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RBAR5,Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RSER5,Region Size and Enable Register 5"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RACR5,Region Access Control Register 5"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RBAR6,Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RSER6,Region Size and Enable Register 6"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RACR6,Region Access Control Register 6"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RBAR7,Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RSER7,Region Size and Enable Register 7"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RACR7,Region Access Control Register 7"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RBAR8,Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RSER8,Region Size and Enable Register 8"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RACR8,Region Access Control Register 8"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RBAR9,Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RSER9,Region Size and Enable Register 9"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RACR9,Region Access Control Register 9"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RBAR10,Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RSER10,Region Size and Enable Register 10"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RACR10,Region Access Control Register 10"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RBAR11,Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RSER11,Region Size and Enable Register 11"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RACR11,Region Access Control Register 11"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xC
line.long 0x00 "RBAR12,Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xC
line.long 0x00 "RSER12,Region Size and Enable Register 12"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xC
line.long 0x00 "RACR12,Region Access Control Register 12"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xD
line.long 0x00 "RBAR13,Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xD
line.long 0x00 "RSER13,Region Size and Enable Register 13"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xD
line.long 0x00 "RACR13,Region Access Control Register 13"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xE
line.long 0x00 "RBAR14,Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xE
line.long 0x00 "RSER14,Region Size and Enable Register 14"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xE
line.long 0x00 "RACR14,Region Access Control Register 14"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xF
line.long 0x00 "RBAR15,Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " BA      ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xF
line.long 0x00 "RSER15,Region Size and Enable Register 15"
bitfld.long 0x00 15. " SD      ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. "   RS      ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. "   EN    ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xF
line.long 0x00 "RACR15,Region Access Control Register 15"
bitfld.long 0x00 12. " XN      ,Execute never" "-,NoExec"
bitfld.long 0x00 2. "  S  ,Share" "No,Yes"
bitfld.long 0x00 8.--10. "    AP      ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type  ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
tree.end
tree.end
width 0x9
tree "TCM Control and Configuration"
rgroup.long c15:0x200++0x00
line.long 0x00 "TCMTR,TCM Type Register"
bitfld.long 0x00 16.--18. " BTCM ,Number of BTCMs implemented" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         ATCM ,Number of ATCMs implemented" "0,1,2,3,4,5,6,7"
group.long c15:0x019++0x00
line.long 0x00 "BTCMRR,BTCM Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA   ,Base address (physical address)"
bitfld.long 0x00 2.--6. "  SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..."
bitfld.long 0x00 0. "  EN ,Enable instruction TCM" "Disabled,Enabled"
group.long c15:0x119++0x00
line.long 0x00 "ATCMRR,ATCM Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA   ,Base address (physical address)"
bitfld.long 0x00 2.--6. "  SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..."
bitfld.long 0x00 0. "  EN ,Enable instruction TCM" "Disabled,Enabled"
rgroup.long c15:0x29++0x00
line.long 0x00 "TCMSEL,TCM Selection Register"
textline " "
group.long c15:0x10f++0x00
line.long 0x00 "NAXIPIRR,Normal AXI Peripheral Interface Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA   ,Base address of the interface"
bitfld.long 0x00 2.--6. "  SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..."
bitfld.long 0x00 0. "  EN ,Interface enable" "Disabled,Enabled"
group.long c15:0x20f++0x00
line.long 0x00 "VAXIPIRR,Virtual AXI Peripheral Interface Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA   ,Base address of the interface"
bitfld.long 0x00 2.--6. "  SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..."
bitfld.long 0x00 0. "  EN ,Interface enable" "Disabled,Enabled"
group.long c15:0x30f++0x00
line.long 0x00 "AHBPIRR,AHB Peripheral Interface Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA   ,Base address of the interface"
bitfld.long 0x00 2.--6. "  SIZE ,Size of the interface configured during integration" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16M,32M,64M,128M,256M,512M,1G,2G,4G,?..."
bitfld.long 0x00 0. "  EN ,Interface enable" "Disabled,Enabled"
tree.end
width 0xC
tree "Cache Control and Configuration"
rgroup.long c15:0x1100++0x00
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 27.--29. " LOU      ,Level of Unification" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "  LOC       ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
textline "                     "
bitfld.long 0x00 21.--23. " CL8      ,Cache Level (CL) 8" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "  CL7       ,Cache Level (CL) 7" "0,1,2,3,4,5,6,7"
textline "                     "
bitfld.long 0x00 15.--17. " CL6      ,Cache Level (CL) 6" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "  CL5       ,Cache Level (CL) 5" "0,1,2,3,4,5,6,7"
textline "                     "
bitfld.long 0x00 9.--11. " CL4      ,Cache Level (CL) 4" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "  CL3       ,Cache Level (CL) 3" "0,1,2,3,4,5,6,7"
textline "                     "
bitfld.long 0x00 3.--5. " CL2      ,Cache Level (CL) 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "  CL1       ,Cache Level (CL) 1" "0,1,2,3,4,5,6,7"
rgroup.long c15:0x1700++0x00
line.long 0x00 "AIDR,Auxiliary ID Register"
rgroup.long c15:0x1000++0x00
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT       ,Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. "  WB     ,Write-Back" "Not supported,Supported"
textline "                     "
bitfld.long 0x00 29. " RA       ,Read-Allocate" "Not supported,Supported"
bitfld.long 0x00 28. "  WA     ,Write-Allocate" "Not supported,Supported"
textline "                     "
hexmask.long.word 0x00 13.--27. 1. " NUMSETS  ,Number of sets"
hexmask.long.word 0x00 3.--12. 1. "           ASSOCIATIVITY ,Associativity"
textline "                     "
bitfld.long 0x00 0.--2. " LINESIZE ,Number of words in each cache line" "0,1,2,3,4,5,6,7"
group.long c15:0x2000++0x00
line.long 0x0 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL    ,Cache level to select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "              IND    ,Instruction or data or unified cache to use" "Data/unified,Instruction"
group.long c15:0x03f++0x00
line.long 0x00 "CFLR,Correctable Fault Location Register"
bitfld.long 0x00 26.--29. " WAY      ,Way of the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--25. "             SIDE   ,Source of the error" "0,1,2,3"
textline "                     "
hexmask.long.word 0x00 5.--13. 1. " INDEX    ,index of the location where the error occurred"
bitfld.long 0x00 0.--1. "           TYPE   ,Type of access that caused the error" "Instruction cache,Data cache,Reserved,ACP"
group.long c15:0x5f++0x00
line.long 0x00 "IADCR,Invalidate All Data Cache Register"
bitfld.long 0x00 30.--31. " WAY      ,Cache way to invalidate or clean" "0,1,2,3"
hexmask.long.byte 0x00 5.--10. 1. "              SET    ,Cache set to invalidate or clean"
group.long c15:0xef++0x00
line.long 0x00 "CSOR,Cache Size Override Register"
bitfld.long 0x00 4.--7. " Dcache   ,Validation data cache size" "4kB,8kB,Reserved,16kB,Reserved,Reserved,Reserved,32kB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,64kB"
bitfld.long 0x00 0.--3. "       Icache ,Validation instruction cache size" "4kB,8kB,Reserved,16kB,Reserved,Reserved,Reserved,32kB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,64kB"
tree.end
width 12.
tree "System Performance Monitor"
group.long c15:0xc9++0x00
line.long 0x00 "PMCR,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "           IDCODE ,Identification code"
bitfld.long 0x00 11.--15. "           N  ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5. "           DP ,Disable PMCCNTR when prohibited" "No,Yes"
textline "                     "
bitfld.long 0x00 4. " X   ,Export enable" "Disabled,Enabled"
bitfld.long 0x00 3. "     D      ,Clock divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "  C  ,Clock counter reset" "No action,Reset"
bitfld.long 0x00 1. "    P  ,Event counter reset" "No action,Reset"
textline "                     "
bitfld.long 0x00 0. " E   ,Enable" "Disabled,Enabled"
group.long c15:0x1c9++0x00
line.long 0x00 "PMCNTENSET,Count Enable Set Register"
eventfld.long 0x00 31. " C   ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
eventfld.long 0x00  2. "     P2     ,PMN2 Enabled / Enable / Disable  counter" "Disabled,Enabled"
eventfld.long 0x00  1. "     P1 ,PMN1 Enabled / Enable / Disable  counter" "Disabled,Enabled"
eventfld.long 0x00  0. "     P0 ,PMN0 Enabled / Enable / Disable  counter" "Disabled,Enabled"
group.long c15:0x2c9++0x00
line.long 0x0 "PMCNTENCLR,Count Enable Clear Register"
eventfld.long 0x00 31. " C   ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
eventfld.long 0x00  2. "     P2     ,PMN2 Enabled / Enable / Disable  counter" "Disabled,Enabled"
eventfld.long 0x00  1. "     P1 ,PMN1 Enabled / Enable / Disable  counter" "Disabled,Enabled"
eventfld.long 0x00  0. "     P0 ,PMN0 Enabled / Enable / Disable  counter" "Disabled,Enabled"
group.long c15:0x3c9++0x00
line.long 0x0 "PMOVSR,Overflow Flag Status Register"
eventfld.long 0x00 31. " C   ,CCNT overflowed" "No overflow,Overflow"
eventfld.long 0x00  2. "  P2     ,PMN2 overflowed" "No overflow,Overflow"
eventfld.long 0x00  1. "  P1 ,PMN1 overflowed" "No overflow,Overflow"
eventfld.long 0x00  0. "  P0 ,PMN0 overflowed" "No overflow,Overflow"
group.long c15:0x4c9++0x00
line.long 0x0 "PMSWINC,Software Increment Register"
eventfld.long 0x00  2. " P2  ,Increment  PMN2" "No action,Increment"
eventfld.long 0x00  1. "    P1     ,Increment  PMN1" "No action,Increment"
eventfld.long 0x00  0. "    P0 ,Increment  PMN0" "No action,Increment"
group.long c15:0x01d9++0x00
line.long 0x00 "PMXEVTYPER,Event Type Selection Register"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event number selected"
group.long c15:0x02d9++0x00
line.long 0x00 "PMXEVCNTR,Event Count Register"
group.long c15:0x5c9++0x00
line.long 0x00 "PMSELR,Performance Counter Selection Register"
bitfld.long 0x00 0.--4. " SEL ,Counter select" "0,1,2,?..."
group.long c15:0xd9++0x00
line.long 0x00 "PMCCNTR,Cycle Count Register"
group.long c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x0
line.long 0x00 "ESR0,Event Selection Register 0"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group.long c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x0
line.long 0x00 "PMCR0,Performance Monitor Count Register 0"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group.long c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x1
line.long 0x00 "ESR1,Event Selection Register 1"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group.long c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x1
line.long 0x00 "PMCR1,Performance Monitor Count Register 1"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group.long c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x2
line.long 0x00 "ESR2,Event Selection Register 2"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group.long c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x2
line.long 0x00 "PMCR2,Performance Monitor Count Register 2"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group.long c15:0xe9++0x00
line.long 0x00 "PMUSERENR,User Enable Register"
bitfld.long 0x00  0. " EN  ,User mode access to performance monitor and validation registers" "Not allowed,Allowed"
group.long c15:0x1e9++0x00
line.long 0x00 "PMINTENSET,Interrupt Enable Set Register"
eventfld.long 0x00 31. " C   ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00  2. "     P2     ,Interrupt on PMN2 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
eventfld.long 0x00  1. "     P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
eventfld.long 0x00  0. "     P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
group.long c15:0x2e9++0x00
line.long 0x00 "PMINTENCLR,Interrupt Enable Clear Register"
eventfld.long 0x00 31. " C   ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00  2. "     P2     ,Interrupt on PMN2 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
eventfld.long 0x00  1. "     P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
eventfld.long 0x00  0. "     P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable  Interrupt" "Disabled,Enabled"
tree "Validation Registers"
group.long c15:0x01f++0x00
line.long 0x00 "IRQESR,nVAL IRQ Enable Set Register"
bitfld.long 0x00 31. " C  ,CCNT overflow IRQ request" "Not requested,Requested"
bitfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow IRQ request" "Not requested,Requested"
bitfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow IRQ request" "Not requested,Requested"
bitfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow IRQ request" "Not requested,Requested"
group.long c15:0x11f++0x00
line.long 0x00 "FIQESR,nVAL FIQ Enable Set Register"
bitfld.long 0x00 31. " C  ,CCNT overflow FIQ request" "Not requested,Requested"
bitfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow FIQ request" "Not requested,Requested"
bitfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow FIQ request" "Not requested,Requested"
bitfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow FIQ request" "Not requested,Requested"
group.long c15:0x21f++0x00
line.long 0x00 "RESR,nVAL Reset Enable Set Register"
bitfld.long 0x00 31. " C  ,CCNT overflow reset request" "Not requested,Requested"
bitfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow reset request" "Not requested,Requested"
bitfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow reset request" "Not requested,Requested"
bitfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow reset request" "Not requested,Requested"
group.long c15:0x31f++0x00
line.long 0x00 "RESR,VAL Debug Request Enable Set Register"
bitfld.long 0x00 31. " C  ,CCNT overflow debug request" "Not requested,Requested"
bitfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow debug request" "Not requested,Requested"
bitfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow debug request" "Not requested,Requested"
bitfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow debug request" "Not requested,Requested"
group.long c15:0x41f++0x00
line.long 0x00 "IRQECR,VAL IRQ Enable Clear Register"
eventfld.long 0x00 31. " C  ,CCNT overflow IRQ request" "Not requested,Requested"
eventfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow IRQ request" "Not requested,Requested"
eventfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow IRQ request" "Not requested,Requested"
eventfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow IRQ request" "Not requested,Requested"
group.long c15:0x51f++0x00
line.long 0x00 "FIQECR,VAL FIQ Enable Clear Register"
eventfld.long 0x00 31. " C  ,CCNT overflow FIQ request" "Not requested,Requested"
eventfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow FIQ request" "Not requested,Requested"
eventfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow FIQ request" "Not requested,Requested"
eventfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow FIQ request" "Not requested,Requested"
group.long c15:0x61f++0x00
line.long 0x00 "RECR,nVAL Reset Enable Clear Register"
eventfld.long 0x00 31. " C  ,CCNT overflow reset request" "Not requested,Requested"
eventfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow reset request" "Not requested,Requested"
eventfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow reset request" "Not requested,Requested"
eventfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow reset request" "Not requested,Requested"
group.long c15:0x71f++0x00
line.long 0x00 "DRECR,VAL Debug Request Enable Clear Register"
eventfld.long 0x00 31. " C  ,CCNT overflow debug request" "Not requested,Requested"
eventfld.long 0x00 2. "  P2 ,PMXEVCNTR2 overflow debug request" "Not requested,Requested"
eventfld.long 0x00 1. "  P1 ,PMXEVCNTR1 overflow debug request" "Not requested,Requested"
eventfld.long 0x00 0. "  P0 ,PMXEVCNTR0 overflow debug request" "Not requested,Requested"
tree.end
tree.end
width 11.
width 18.
tree "Debug Registers"
tree "Processor Identifier Registers"
rgroup.long c14:832.++0x00
line.long 0x00 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL       ,Implementer code"
hexmask.long.byte 0x0 20.--23. 0x1 "               SPECREV    ,Variant number"
textline "                           "
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH       ,Architecture"
hexmask.long.word 0x0 4.--15. 0x1 "               PARTNUM    ,Part Number"
textline "                           "
hexmask.long.byte 0x0 0.--3. 0x1 " REV        ,Layout Revision"
rgroup.long c14:833.++0x00
line.long 0x00 "CACHETYPE,Cache Type Register"
bitfld.long 0x00 16.--19. " DMINLINE   ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
bitfld.long 0x00 14.--15. "  L1_IPOLICY ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 0.--3. " IMINLINE   ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
rgroup.long c14:834.++0x00
line.long 0x00 "TCMTR,TCM Type Register"
group.long c14:835.++0x00
line.long 0x00 "AMIDR,Alias of MIDR"
rgroup.long c14:836.++0x00
line.long 0x00 "MPUTR,MPU Type Register"
rgroup.long c14:837.++0x00
line.long 0x00 "MPIDR,Multiprocessor Affinity Register"
group.long c14:838.++0x00
line.long 0x00 "AMIDR0,Alias of MIDR"
group.long c14:839.++0x00
line.long 0x00 "AMIDR1,Alias of MIDR"
rgroup.long c14:840.++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. " STATE3     ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        STATE2     ,Java Extension Interface Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " STATE1     ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        STATE0     ,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.long c14:841.++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 8.--11. " MPM        ,Microcontroller Programmer's Model Support" "Supported,?..."
bitfld.long 0x00 4.--7. "        SE         ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 0.--3. " PM         ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
rgroup.long c14:842.++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 20.--23. " MDM_MM     ,Microcontroller Debug Model Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "    TDM_MM     ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " TDM_CB     ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "    CDM_MM     ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " SDM_CB     ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "    CDM_CB     ,Coprocessor Debug Model Support" "Not supported,?..."
rgroup.long c14:843.++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long c14:844.++0x00
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
bitfld.long 0x00 28.--31. " IT         ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "        FCSE       ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " ACR        ,Auxiliary Control Register Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        TCM        ,TCM and Associated DMA Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " CC_PLEA    ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "    CC_CPUA    ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " PMSA       ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "    VMSA       ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c14:845.++0x00
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. " BTB        ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
bitfld.long 0x00 24.--27. "     L1TCO      ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " L1UCMO     ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "    L1HCMO     ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " L1UCLMOSW  ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "    L1HCLMOSW  ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "    L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
rgroup.long c14:846.++0x00
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
bitfld.long 0x00 28.--31. " HAF        ,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "    WFI        ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " MBF        ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        UTLBMO     ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " HTLBMO     ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        HL1CMRO    ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " HL1BPCRO   ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "    HL1FPCRO   ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.long c14:847.++0x00
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
bitfld.long 0x00 4.--7. " HCMOSW     ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        HCMOMVA    ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
rgroup.long c14:848.++0x00
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
bitfld.long 0x00 24.--27. " DIVI       ,Divide Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "    DEBI       ,Debug Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 16.--19. " CI         ,Coprocessor Instructions Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "    CBI        ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 8.--11. " BI         ,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "        BCI        ,Bit Counting Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 0.--3. " AI         ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup.long c14:849.++0x00
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
bitfld.long 0x00 28.--31. " JI         ,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "        INTI       ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " IMMI       ,Immediate Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        ITEI       ,If Then Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " EXTI       ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        E2I        ,Exception 2 Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " E1I        ,Exception 1 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        ENDI       ,Endianness Control Instructions Support" "Reserved,Supported,?..."
rgroup.long c14:850.++0x00
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
bitfld.long 0x00 28.--31. " RI         ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "        PSRI       ,PSR Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " UMI        ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        SMI        ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " MI         ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        II         ,Multi-Access Interruptible Instructions Support" "Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " MHI        ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        LSI        ,Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup.long c14:851.++0x00
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
bitfld.long 0x00 28.--31. " T2E        ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "        NOPI       ,True NOP Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 20.--23. " TCI        ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        TBI        ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " SPI        ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        SWII       ,SWI Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " SIMDI      ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        SI         ,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.long c14:852.++0x00
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
bitfld.long 0x00 20.--23. " EI         ,Exclusive Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "        BI         ,Barrier Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 12.--15. " SMII       ,SMI Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "        WBI        ,Write-Back Instructions Support" "Reserved,Supported,?..."
textline "                           "
bitfld.long 0x00 4.--7. " WSI        ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "        UI         ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c14:853.++0x00
line.long 0x00 "ID_ISAR5,ISA Feature Register 5"
tree.end
width 15.
tree "Coresight Management Registers"
group.long c14:960.++0x00
line.long 0x00 "DBGITCTRL,Integration Mode Control Register"
bitfld.long 0x00 0. " INTMODE      ,Processor integration mode" "Normal,Integration"
group.long c14:1000.++0x00
line.long 0x00 "DBGCLAIMSET,Claim Tag Set Register"
hexmask.long.byte 0x00 0.--7. 1. " CTS          ,Claim tag set"
group.long c14:1001.++0x00
line.long 0x00 "DBGCLAIMCLR,Claim Tag Clear Register"
hexmask.long.byte 0x00 0.--7. 1. " CTC          ,Claim tag clear"
wgroup.long c14:1004.++0x00
line.long 0x00 "DBGLAR,Lock Access Register"
rgroup.long c14:1005.++0x00
line.long 0x00 "DBGLSR,Lock Status Register"
bitfld.long 0x00 2. " 32BA         ,Indicate that a 32-bit access is required to write the key to the DBGLAR" "No,Yes"
textline "                        "
bitfld.long 0x00 1. " LB           ,Lock bit" "Not locked,Locked"
bitfld.long 0x00 0. "              LIB          ,Lock implemented bit" "Not locked,Locked"
rgroup.long c14:1006.++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status Register"
bitfld.long 0x00 7. " SNDFI        ,Secure non-invasive debug features implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "         SNDFE        ,Secure non-invasive debug features enable" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 5. " SIDFI        ,Secure invasive debug features implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "         SIDFE        ,Secure invasive debug features enabled" "Disabled,Enabled"
rgroup.long c14:1011.++0x00
line.long 0x00 "DBGDEVTYPE,Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUBTYPE      ,Subtype"
hexmask.long.byte 0x00 0.--3. 1. "                      MAIN_CLASS   ,Main class"
tree.end
textline "                     "
width 12.
rgroup.long c14:0.++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. " WRP          ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,?..."
bitfld.long 0x0 24.--27. "                       BRP          ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,?..."
textline "                     "
bitfld.long 0x0 20.--23. " CTX_CMP      ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
hexmask.long.byte 0x0 16.--19. 1. "                      VERSION      ,Debug Architecture Version"
textline "                     "
bitfld.long 0x0 15. " DEVID        ,Debug Device ID" "Low,High"
bitfld.long 0x0 14. "                    NSUHD        ,Secure User halting debug-mode" "Low,High"
textline "                     "
bitfld.long 0x0 13. " PCSR         ,PC Sample register implemented" "Low,High"
bitfld.long 0x0 12. "                    SE           ,Security Extensions implemented" "Low,High"
textline "                     "
hexmask.long.byte 0x0 4.--7. 1. " VARIANT      ,Implementation-defined Variant Number"
hexmask.long.byte 0x0 0.--3. 1. "                      REVISION     ,Implementation-defined Revision Number"
group.long c14:34.++0x0
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register"
bitfld.long 0x00 30. " RXFULL       ,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "                   TXFULL       ,DBGDTRTX Register full" "Empty,Full"
textline "                     "
bitfld.long 0x00 25. " PIPEADV      ,PIPEADV Processor Idle flag" "Not idle,Idle"
bitfld.long 0x00 24. "                INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed"
textline "                     "
bitfld.long 0x00 20.--21. " EXTDCCMODE   ,External DCC access mode field" "Non-blocking,Stall,Fast,?..."
bitfld.long 0x00 19. "            ADADISCARD   ,Asynchronous Data Aborts Discarded bit" "Normal,Abort"
bitfld.long 0x00 18. "         NS      ,Non-secure status bit" "Secure,Non-secure"
textline "                     "
bitfld.long 0x00 17. " SPNIDDIS     ,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "                     SPIDDIS      ,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "            MDBGEN  ,Monitor debug-mode enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 14. " HDBGEN       ,Halting debug-mode" "Disabled,Enabled"
bitfld.long 0x00 13. "                ITREN        ,Execute ARM instruction enable" "Disabled,Enabled"
bitfld.long 0x00 12. "       UDCCDIS ,User mode access to Communications Channel disable" "No,Yes"
textline "                     "
bitfld.long 0x00 11. " INTDIS       ,Interrupt disable" "No,Yes"
bitfld.long 0x00 10. "                     DBGACK       ,Force debug acknowledge" "Normal,Forced"
textline "                     "
bitfld.long 0x00 8. " UND_L        ,Sticky undefined bit" "Not occurred,Occurred"
bitfld.long 0x00 7. "            ADABORT      ,Asynchronous data abort" "Not aborted,Aborted"
bitfld.long 0x00 6. "    SDABORT ,Synchronous data abort" "Not aborted,Aborted"
textline "                     "
bitfld.long 0x00 2.--5. " MOE          ,Method of debug entry field" "Halt Request,Breakpoint,Reserved,BKPT Instruction,External Debug Request,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
bitfld.long 0x00 1. "  RESTARTED    ,Processor restarted" "Pending,Exited"
bitfld.long 0x00 0. "        HALTED  ,Processor halted" "Non-debug,Debug"
group.long c14:0x7++0x0
line.long 0x00 "DBGVCR,Debug Vector Catch register"
bitfld.long 0x00 7. " FIQVCE_S     ,FIQ vector catch in Secure state" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 6. " IRQVCE_S     ,IRQ vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 4. "                DAVCE_S      ,Data Abort vector catch in Secure state" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 3. " PAVCE_S      ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 2. "                SVCVCE_S     ,SVC vector catch in Secure state" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 1. " UIVCE_S      ,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "                RVCE         ,Reset vector catch enable" "Disabled,Enabled"
hgroup.long c14:32.++0x0
hide.long 0x00 "DTRRX,Target -> Host Data Transfer Register"
in
group.long c14:35.++0x00
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
hexmask.long 0x00 0.--31. 1. " HTD          ,Host -> target data"
group.long c14:10.++0x0
line.long 0x00 "DBGDSCCR,Debug State Cache Control Register"
bitfld.long 0x00 2. " NWT          ,Write through disable" "No,Yes"
bitfld.long 0x00 1. "                     NIL          ,L1 instruction cache line-fills disable" "No,Yes"
textline "                     "
bitfld.long 0x00 0. " NDL          ,L1 data cache line-fills disable" "No,Yes"
wgroup.long c14:33.++0x0
line.long 0x00 "DBGITR,Instruction Transfer Register"
wgroup.long c14:36.++0x0
line.long 0x00 "DBGDRCR,Debug Run Control Register"
bitfld.long 0x00 4. " CMR          ,Cancel memory requests" "Not cancel,Cancel"
bitfld.long 0x00 3. "              CSPA         ,Clear Sticky Pipeline Advance bit" "No effect,Clear"
textline "                     "
bitfld.long 0x00 2. " CSE          ,Clear Sticky Exceptions bits" "No effect,Clear"
bitfld.long 0x00 1. "               RR           ,Restart request" "No effect,Restart"
textline "                     "
bitfld.long 0x00 0. " HR           ,Halt request" "No effect,Halt"
textline "                     "
rgroup.long c14:193.++0x0
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
bitfld.long 0x00 1. " LOCK_IMP_BIT ,Indicate whether the OS lock functionality is implemented" "Not implemented,Implemented"
group.long c14:196.++0x0
line.long 0x00 "DBGPRCR,Device Power-down and Reset Control Register"
bitfld.long 0x00 2. " HCWR         ,Hold core warm reset" "Not held,Held"
textline "                     "
bitfld.long 0x00 1. " CWRR         ,Reset reguest" "Not requested,Requested"
bitfld.long 0x00 0. "    CORENPDRQ ,Core no powerdown request" "Power-down,Emulate"
rgroup.long c14:197.++0x0
line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register"
bitfld.long 0x00 3. " SR           ,Sticky Reset Status" "Not reset,Reset"
bitfld.long 0x00 2. "        R         ,Reset Status" "No reset,Reset"
textline "                     "
bitfld.long 0x00 1. " SPD          ,Sticky Power-down Status" "Not reset,Reset"
bitfld.long 0x00 0. "        PU        ,Power-up Status" "Powered down,Powered up"
tree.end
width 7.
tree "Breakpoint Registers"
group.long c14:64.++0x0
line.long 0x00 "BVR0,Breakpoint Value 0 Register"
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
group.long c14:80.++0x0
line.long 0x00 "BCR0,Breakpoint Control 0 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:65.++0x0
line.long 0x00 "BVR1,Breakpoint Value 1 Register"
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
group.long c14:81.++0x0
line.long 0x00 "BCR1,Breakpoint Control 1 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:66.++0x0
line.long 0x00 "BVR2,Breakpoint Value 2 Register"
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
group.long c14:82.++0x0
line.long 0x00 "BCR2,Breakpoint Control 2 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:67.++0x0
line.long 0x00 "BVR3,Breakpoint Value 3 Register"
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
group.long c14:83.++0x0
line.long 0x00 "BCR3,Breakpoint Control 3 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:68.++0x0
line.long 0x00 "BVR4,Breakpoint Value 4 Register"
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
group.long c14:84.++0x0
line.long 0x00 "BCR4,Breakpoint Control 4 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:69.++0x0
line.long 0x00 "BVR5,Breakpoint Value 5 Register"
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
group.long c14:85.++0x0
line.long 0x00 "BCR5,Breakpoint Control 5 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:70.++0x0
line.long 0x00 "BVR6,Breakpoint Value 6 Register"
hexmask.long 0x00 0.--31. 1. " BV6 ,Breakpoint Value 6"
group.long c14:86.++0x0
line.long 0x00 "BCR6,Breakpoint Control 6 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
group.long c14:71.++0x0
line.long 0x00 "BVR7,Breakpoint Value 7 Register"
hexmask.long 0x00 0.--31. 1. " BV7 ,Breakpoint Value 7"
group.long c14:87.++0x0
line.long 0x00 "BCR7,Breakpoint Control 7 Register"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. "  M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. "     LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. "     SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline "                "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. "        S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. "  B    ,Breakpoint Enable" "Disabled,Enabled"
tree.end
tree "Watchpoint Control Registers"
group.long c14:96.++0x0
line.long 0x00 "WVR0,Watchpoint Value 0 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:112.++0x0
line.long 0x00 "WCR0,Watchpoint Control 0 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:97.++0x0
line.long 0x00 "WVR1,Watchpoint Value 1 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:113.++0x0
line.long 0x00 "WCR1,Watchpoint Control 1 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:98.++0x0
line.long 0x00 "WVR2,Watchpoint Value 2 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:114.++0x0
line.long 0x00 "WCR2,Watchpoint Control 2 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:99.++0x0
line.long 0x00 "WVR3,Watchpoint Value 3 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:115.++0x0
line.long 0x00 "WCR3,Watchpoint Control 3 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:100.++0x0
line.long 0x00 "WVR4,Watchpoint Value 4 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:116.++0x0
line.long 0x00 "WCR4,Watchpoint Control 4 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:101.++0x0
line.long 0x00 "WVR5,Watchpoint Value 5 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:117.++0x0
line.long 0x00 "WCR5,Watchpoint Control 5 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:102.++0x0
line.long 0x00 "WVR6,Watchpoint Value 6 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:118.++0x0
line.long 0x00 "WCR6,Watchpoint Control 6 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:103.++0x0
line.long 0x00 "WVR7,Watchpoint Value 7 Register"
hexmask.long 0x00 2.--31. 0x04 " WA0   ,Watchpoint Address 0"
group.long c14:119.++0x0
line.long 0x00 "WCR7,Watchpoint Control 7 Register"
bitfld.long 0x0 24.--28. " WAM   ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "                  EL   ,Enable Linking" "Disabled,Enabled"
textline "                "
bitfld.long 0x0 16.--19. " LBN   ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. "                       SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline "                "
bitfld.long 0x0 12. " BAS   ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline "                "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "                    PAC  ,Privileged access control" "Reserved,Privileged,USR,Any"
textline "                "
bitfld.long 0x0 0. " WE    ,Watchpoint enable" "Disabled,Enabled"
group.long c14:6.++0x0
line.long 0x00 "WFAR ,Watchpoint Fault Address Register"
hexmask.long 0x00 1.--31. 0x2 " WFAR ,Address of the watchpointed instruction"
tree.end
width 11.
AUTOINDENT.POP
tree.end
endif
tree "INTC (Interrupt Controller)"
base ad:0x03000000
width 17.
tree "INTR_CTLR_CHANNEL0"
tree "SLICE0"
rgroup.long (0x0+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x0+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x0+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x0+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x0+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x0+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x0+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x0+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x0+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x0+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x0+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x0+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x0+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x0+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x0+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x0+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x0+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x0+0x7C0)++0x03 "SCR_CHANNEL0"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x0+0x7C4)++0x03 "SCR_CHANNEL0"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_CHANNEL1"
tree "SLICE0"
rgroup.long (0x800+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x800+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x800+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x800+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x800+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x800+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x800+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x800+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x800+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x800+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x800+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x800+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x800+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x800+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x800+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x800+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x800+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x800+0x7C0)++0x03 "SCR_CHANNEL1"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x800+0x7C4)++0x03 "SCR_CHANNEL1"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_CHANNEL2"
tree "SLICE0"
rgroup.long (0x1000+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x1000+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x1000+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x1000+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x1000+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x1000+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x1000+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x1000+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x1000+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1000+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1000+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x1000+0x7C0)++0x03 "SCR_CHANNEL2"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x1000+0x7C4)++0x03 "SCR_CHANNEL2"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_CHANNEL3"
tree "SLICE0"
rgroup.long (0x1800+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x1800+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x1800+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x1800+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x1800+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x1800+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x1800+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x1800+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x1800+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x1800+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x1800+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x1800+0x7C0)++0x03 "SCR_CHANNEL3"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x1800+0x7C4)++0x03 "SCR_CHANNEL3"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_CHANNEL4"
tree "SLICE0"
rgroup.long (0x2000+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x2000+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x2000+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x2000+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x2000+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x2000+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x2000+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x2000+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x2000+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2000+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2000+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x2000+0x7C0)++0x03 "SCR_CHANNEL4"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x2000+0x7C4)++0x03 "SCR_CHANNEL4"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_CHANNEL5"
tree "SLICE0"
rgroup.long (0x2800+0x00)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x08)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x14)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x18)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x1C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long (0x2800+0x40)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x48)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x54)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x58)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x5C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long (0x2800+0x80)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x88)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x94)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x98)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE_wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x9C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long (0x2800+0xC0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0xC8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0xD4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0xD8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0xDC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long (0x2800+0x100)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x108)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x114)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x118)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x11C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long (0x2800+0x140)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x148)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x154)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x158)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x15C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long (0x2800+0x180)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x188)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x194)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA_CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x198)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x19C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long (0x2800+0x1C0)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x1C8)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x1D4)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x1D8)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP_AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x1DC)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long (0x2800+0x200)++0x07
line.long 0x00 "VIRQ_0,Valid Interrupt Request Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
line.long 0x04 "VFIQ_0,FIQ Valid Interrupt Request Status Register"
bitfld.long 0x04 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x04 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x208)++0x03
line.long 0x00 "IER_0_SET/CLR,Interrupt Enable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x214)++0x03
line.long 0x00 "IEP_CLASS_0,Interrupt Enable Priority Class Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE_PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE_ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE_ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE_HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE_APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON_INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG_INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X_SYNCPT_CAMERAPROC_1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
rgroup.long (0x2800+0x218)++0x03
line.long 0x00 "ISR_0,Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long (0x2800+0x21C)++0x03
line.long 0x00 "IDR_0_SET/CLR,Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
group.long (0x2800+0x7C0)++0x03 "SCR_CHANNEL5"
line.long 0x00 "SCRD_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long (0x2800+0x7C4)++0x03 "SCR_CHANNEL5"
line.long 0x00 "SCRE_0,SCR protection disable registers"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
tree "INTR_CTLR_COMMON"
tree "SLICE0"
rgroup.long 0xF800++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long 0xF804++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
group.long 0xF810++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " I2C7                       ,I2C7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  I2C6                   ,I2C6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  I2C5                       ,I2C5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " I2C4                       ,I2C4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  I2C3                   ,I2C3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  I2C2                       ,I2C2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " I2C                        ,I2C1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  DSID                   ,DSID interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  DSIC                       ,DSIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " DSIB                       ,DSIB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  DSIA                   ,DSIA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  AOWDT_REMOTE               ,AOWDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " TOP_WDT_REMOTE             ,TOP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  SCE_WDT_REMOTE         ,SCE WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SPE_WDT_REMOTE             ,SPE WDT remote interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " BPMP_WDT_REMOTE            ,BPMP WDT remote interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  AON_GTE                ,AON GTE interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  LIC_GTE_1                  ,LIC GTE1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " LIC_GTE_0                  ,LIC GTE0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  RTC                    ,RTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_TKE_SHARED_9           ,TOP TKE shared 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " TOP_TKE_SHARED_8           ,TOP TKE shared 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  TOP_TKE_SHARED_7       ,TOP TKE shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_TKE_SHARED_6           ,TOP TKE shared 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TOP_TKE_SHARED_5           ,TOP TKE shared 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  TOP_TKE_SHARED_4       ,TOP TKE shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_TKE_SHARED_3           ,TOP TKE shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TOP_TKE_SHARED_2           ,TOP TKE shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  TOP_TKE_SHARED_1       ,TOP TKE shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_TKE_SHARED_0           ,TOP TKE shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE1"
rgroup.long 0xF840++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long 0xF844++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
group.long 0xF850++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SDMMC2                     ,SDMMC2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SDMMC1                 ,SDMMC1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  AON_GPIO_1                 ,AON GPIO 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " AON_GPIO_0                 ,AON GPIO 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  GPIO4_2                ,GPIO4 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  GPIO4_1                    ,GPIO4 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " GPIO4_0                    ,GPIO4 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  GPIO3_2                ,GPIO3 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  GPIO3_1                    ,GPIO3 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " GPIO3_0                    ,GPIO3 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  GPIO2_2                ,GPIO2 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO2_1                    ,GPIO2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " GPIO2_0                    ,GPIO2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  GPIO1_2                ,GPIO1 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  GPIO1_1                    ,GPIO1 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " GPIO1_0                    ,GPIO1 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  GPIO0_2                ,GPIO0 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  GPIO0_1                    ,GPIO0 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " GPIO0_0                    ,GPIO0 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  UFSHC                  ,UFSHC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CAN2_1                     ,CAN2 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CAN2_0                     ,CAN2 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CAN1_1                 ,CAN1 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CAN1_0                     ,CAN1 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SPI4                       ,SPI4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  SPI3                   ,SPI3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SPI2                       ,SPI2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SPI1                       ,SPI1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  QSPI                   ,QSPI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  I2C10                      ,I2C10 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " I2C9                       ,I2C9 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  I2C8                   ,I2C8 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE2"
rgroup.long 0xF880++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long 0xF884++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
group.long 0xF890++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CENTRAL_DMA_CH20           ,Central DMA CH20 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  CENTRAL_DMA_CH19       ,Central DMA CH19 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  CENTRAL_DMA_CH18           ,Central DMA CH18 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " CENTRAL_DMA_CH17           ,Central DMA CH17 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  CENTRAL_DMA_CH16       ,Central DMA CH16 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  CENTRAL_DMA_CH15           ,Central DMA CH15 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " CENTRAL_DMA_CH14           ,Central DMA CH14 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  CENTRAL_DMA_CH13       ,Central DMA CH13 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  CENTRAL_DMA_CH12           ,Central DMA CH12 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " CENTRAL_DMA_CH11           ,Central DMA CH11 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  CENTRAL_DMA_CH10       ,Central DMA CH10 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  CENTRAL_DMA_CH9            ,Central DMA CH9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CENTRAL_DMA_CH8            ,Central DMA CH8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  CENTRAL_DMA_CH7        ,Central DMA CH7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  CENTRAL_DMA_CH6            ,Central DMA CH6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CENTRAL_DMA_CH5            ,Central DMA CH5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  CENTRAL_DMA_CH4        ,Central DMA CH4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  CENTRAL_DMA_CH3            ,Central DMA CH3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " CENTRAL_DMA_CH2            ,Central DMA CH2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  CENTRAL_DMA_CH1        ,Central DMA CH1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_CH0            ,Central DMA CH0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " PCIE_WAKE                  ,PCIE wake interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  PCIE_MSI               ,PCIE MSI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  PCIE_INT                   ,PCIE INT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GPU_NONSTALL               ,GPU NONSTALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  GPU_STALL              ,GPU STALL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SDMMC4_SYS                 ,SDMMC4 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SDMMC3_SYS                 ,SDMMC3 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SDMMC2_SYS             ,SDMMC2 SYS interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SDMMC1_SYS                 ,SDMMC1 SYS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SDMMC4                     ,SDMMC4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SDMMC3                 ,SDMMC3 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE3"
rgroup.long 0xF8C0++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long 0xF8C4++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
group.long 0xF8D0++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " TOP_HSP0_SHARED_7          ,TOP HSP0 shared 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  TOP_HSP0_SHARED_6      ,TOP HSP0 shared 6 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  TOP_HSP0_SHARED_5          ,TOP HSP0 shared 5 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " TOP_HSP0_SHARED_4          ,TOP HSP0 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  TOP_HSP0_SHARED_3      ,TOP HSP0 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  TOP_HSP0_SHARED_2          ,TOP HSP0 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " TOP_HSP0_SHARED_1          ,TOP HSP0 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  TOP_HSP0_SHARED_0      ,TOP HSP0 shared 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  NVCSI                      ,NVCSI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " UARTG                      ,UARTG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  UARTF                  ,UARTF interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  UARTE                      ,UARTE interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " UARTD                      ,UARTD interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  UARTC                  ,UARTC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  UARTB                      ,UARTB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " UARTA                      ,UARTA interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SIMON3                 ,SIMON3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SIMON2                     ,SIMON2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SIMON1                     ,SIMON1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  SIMON0                 ,SIMON0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  CENTRAL_DMA_COMMON         ,Central DMA common interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CENTRAL_DMA_CH31           ,Central DMA CH31 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  CENTRAL_DMA_CH30       ,Central DMA CH30 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  CENTRAL_DMA_CH29           ,Central DMA CH29 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CENTRAL_DMA_CH28           ,Central DMA CH28 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  CENTRAL_DMA_CH27       ,Central DMA CH27 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  CENTRAL_DMA_CH26           ,Central DMA CH26 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CENTRAL_DMA_CH25           ,Central DMA CH25 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CENTRAL_DMA_CH24       ,Central DMA CH24 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CENTRAL_DMA_CH23           ,Central DMA CH23 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CENTRAL_DMA_CH22           ,Central DMA CH22 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CENTRAL_DMA_CH21       ,Central DMA CH21 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE4"
rgroup.long 0xF900++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long 0xF904++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
group.long 0xF910++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " DPAUX                      ,DPAUX interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SOR1                   ,SOR1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SOR                        ,SOR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " DISPLAY_TZ                 ,DISPLAY TZ interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  DISPLAY_HEAD2          ,DISPLAY HEAD2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  DISPLAY_HEAD1              ,DISPLAY HEAD1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " DISPLAY_HEAD0              ,DISPLAY HEAD0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  APE_FIQ3               ,APE FIQ3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  APE_FIQ2                   ,APE FIQ2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " APE_FIQ1                   ,APE FIQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  APE_FIQ0               ,APE FIQ0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  APE_IRQ3                   ,APE IRQ3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " APE_IRQ2                   ,APE IRQ2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  APE_IRQ1               ,APE IRQ1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  APE_IRQ0                   ,APE IRQ0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " SCE_MBOX_OUT_3             ,SCE MBOX OUT 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  SCE_MBOX_OUT_2         ,SCE MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SCE_MBOX_OUT_1             ,SCE MBOX OUT 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " SCE_MBOX_OUT_0             ,SCE MBOX OUT 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  BPMP_HSP_SHARED_4      ,BPMP HSP shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  BPMP_HSP_SHARED_3          ,BPMP HSP shared 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " BPMP_HSP_SHARED_2          ,BPMP HSP shared 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  BPMP_HSP_SHARED_1      ,BPMP HSP shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  AON_MBOX_OUT_3             ,AON MBOX OUT 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " AON_MBOX_OUT_2             ,AON MBOX OUT 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  AON_MBOX_OUT_1         ,AON MBOX OUT 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  AON_MBOX_OUT_0             ,AON MBOX OUT 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TOP_HSP1_SHARED_4          ,TOP HSP1 shared 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  TOP_HSP1_SHARED_3      ,TOP HSP1 shared 3 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  TOP_HSP1_SHARED_2          ,TOP HSP1 shared 2 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " TOP_HSP1_SHARED_1          ,TOP HSP1 shared 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  TOP_HSP1_SHARED_0      ,TOP HSP1 shared 0 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE5"
rgroup.long 0xF940++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC_ERR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long 0xF944++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
group.long 0xF950++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " EQOS_RX_1                  ,EQOS RX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  EQOS_RX_0              ,EQOS RX 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  EQOS_TX_3                  ,EQOS TX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " EQOS_TX_2                  ,EQOS TX 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EQOS_TX_1              ,EQOS TX 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  EQOS_TX_0                  ,EQOS TX 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " MPCORE_INTERRIRQ_1         ,MPCORE INTERRIRQ 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  MPCORE_INTERRIRQ_0     ,MPCORE INTERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  MPCORE_AXIERRIRQ_1         ,MPCORE AXIERRIRQ 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " MPCORE_AXIERRIRQ_0         ,MPCORE AXIERRIRQ 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  GPIO5_2                ,GPIO5 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  GPIO5_1                    ,GPIO5 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 18. 0x04 18. 0x08 18. " GPIO5_0                    ,GPIO5 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  DOORBELL_CCPLEX_SECURE ,DOORBELL CCPLEX secure interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  DOORBELL_CCPLEX_NOT_SECURE ,DOORBELL CCPLEX not secure interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " EMC_CORR_ECC_ERR           ,EMC CORR ECC ERR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  SECURE_BPMP_BRIDGE     ,SECURE BPMP bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  SECURE_SCE_BRIDGE          ,SECURE SCE bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 12. 0x04 12. 0x08 12. " SECURE_AON_BRIDGE          ,SECURE AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  SMMU_COMBINED_S        ,SMMU combined S interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  SMMU_COMBINED_NS           ,SMMU combined NS interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " USB3_DEV_PME               ,USB3 DEV PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  USB3_DEV_SMI           ,USB3 DEV SMI interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  XUSB_PADCTL                ,XUSB PADCTL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " USB3_DEV_INT               ,USB3 DEV INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  USB3_HOST_PME          ,USB3 HOST PME interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  USB3_HOST_SMI              ,USB3 HOST SMI interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " USB3_HOST_INT              ,USB3 HOST INT interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CEC                    ,CEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  HDA                        ,HDA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " DPAUX1                     ,DPAUX1 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE6"
rgroup.long 0xF880++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long 0xF984++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
group.long 0xF990++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " MC                         ,MC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  EDP                    ,EDP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  THERMAL                    ,THERMAL interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " BPMP_PM                    ,BPMP PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  AON_PM                 ,AON PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  AOVC_LIC_INTR              ,AOVC LIC INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " AON_WAKE_2                 ,AON wake 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  AON_WAKE_1             ,AON wake 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  AON_WAKE_0                 ,AON wake 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " PMC2LIC_INTR               ,PMC2LIC INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  ACTMON                 ,ACTMON interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  PMIC_EXT                   ,PMIC EXT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " CVC                        ,CVC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  DTV                    ,DTV interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  VIC                        ,VIC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " ISP                        ,ISP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  VI_2                   ,VI 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  VI_1                       ,VI 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " VI_0                       ,VI 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  NVENC                  ,NVENC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  NVDEC                      ,NVDEC interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " NVJPG                      ,NVJPG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  SATA_CTL               ,SATA CTL interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  SATA_RX_STAT               ,SATA RX STAT interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " EQOS_POWER                 ,EQOS power interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  EQOS_COMMON            ,EQOS common interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  EQOS_RX_3                  ,EQOS RX 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EQOS_RX_2                  ,EQOS RX 2 interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE7"
rgroup.long 0xF9C0++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long 0xF9C4++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
group.long 0xF9D0++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SECURE_TOP_AXIP2P_5        ,Secure TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "  SECURE_TOP_AXIP2P_4    ,Secure TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "  SECURE_TOP_AXIP2P_3        ,Secure TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 28. 0x04 28. 0x08 28. " SECURE_TOP_AXIP2P_2        ,Secure TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SECURE_TOP_AXIP2P_1    ,Secure TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "  SECURE_TOP_AXIP2P_0        ,Secure TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 25. 0x04 25. 0x08 25. " SECURE_TOP_BRIDGE_5        ,Secure TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  SECURE_TOP_BRIDGE_4    ,Secure TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "  SECURE_TOP_BRIDGE_3        ,Secure TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 22. 0x04 22. 0x08 22. " SECURE_TOP_BRIDGE_2        ,Secure TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  SECURE_TOP_BRIDGE_1    ,Secure TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "  TOP_AXIP2P_9               ,TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " TOP_AXIP2P_8               ,TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  TOP_AXIP2P_7           ,TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "  TOP_AXIP2P_6               ,TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 16. 0x04 16. 0x08 16. " TOP_AXIP2P_5               ,TOP AXIP2P 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  TOP_AXIP2P_4           ,TOP AXIP2P 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "  TOP_AXIP2P_3               ,TOP AXIP2P 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 13. 0x04 13. 0x08 13. " TOP_AXIP2P_2               ,TOP AXIP2P 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  TOP_AXIP2P_1           ,TOP AXIP2P 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "  TOP_AXIP2P_0               ,TOP AXIP2P 0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " TOP_BRIDGE_5               ,TOP bridge 5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  TOP_BRIDGE_4           ,TOP bridge 4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "  TOP_BRIDGE_3               ,TOP bridge 3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " TOP_BRIDGE_2               ,TOP bridge 2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  TOP_BRIDGE_1           ,TOP bridge 1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "  TSECB                      ,TSECB interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " TSEC                       ,TSEC interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  AON_CAR                ,AON CAR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  CAR                        ,CAR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " EMC                        ,EMC interrupt" "No interrupt,Interrupt"
tree.end
tree "SLICE8"
rgroup.long 0xFA00++0x03
line.long 0x00 "GISR_0,Global Interrupt Status Register"
bitfld.long 0x00 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
bitfld.long 0x00 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long 0xFA04++0x03
line.long 0x00 "FIR_0_SET/CLR,Force Interrupt Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
group.long 0xFA10++0x03
line.long 0x00 "CIDR_0_SET/CLR,CCPLEX Interrupt Disable Register SET/CLR"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SCE_PM                     ,SCE PM interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "  SE_ELPRNG              ,SE ELPRNG interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "  SE_ELPPKA                  ,SE ELPPKA interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 26. 0x04 26. 0x08 26. " SE_HOST1X                  ,SE HOST1X interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "  SE_APB                 ,SE APB interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "  VFMON_INTR                 ,VFMON INTR interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. " AOTAG_INTR                 ,AOTAG INTR interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "  GPMU                   ,GPMU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "  HOST1X_SYNCPT_CAMERAPROC_1 ,HOST1X SYNCPT CAMERAPROC 1 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HOST1X_SYNCPT_CAMERAPROC_0 ,HOST1X SYNCPT CAMERAPROC 0 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "  HOST1X_GEN_BPMP        ,HOST1X GEN BPMP interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "  HOST1X_TZ_SYNCPT_CPU       ,HOST1X TZ SYNCPT CPU interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HOST1X_TZ_GEN_CPU          ,HOST1X TZ GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "  HOST1X_SYNCPT_CPUOS7   ,HOST1X SYNCPT CPUOS7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "  HOST1X_SYNCPT_CPUOS6       ,HOST1X SYNCPT CPUOS6 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HOST1X_SYNCPT_CPUOS5       ,HOST1X SYNCPT CPUOS5 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "  HOST1X_SYNCPT_CPUOS4   ,HOST1X SYNCPT CPUOS4 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "  HOST1X_SYNCPT_CPUOS3       ,HOST1X SYNCPT CPUOS3 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HOST1X_SYNCPT_CPUOS2       ,HOST1X SYNCPT CPUOS2 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "  HOST1X_SYNCPT_CPUOS1   ,HOST1X SYNCPT CPUOS1 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "  HOST1X_SYNCPT_CPUOS0       ,HOST1X SYNCPT CPUOS0 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HOST1X_SYNCPT_CPU          ,HOST1X SYNCPT CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "  HOST1X_GEN_CPU         ,HOST1X GEN CPU interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "  BPMP_BRIDGE                ,BPMP bridge interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SCE_BRIDGE                 ,SCE bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "  AON_BRIDGE             ,AON bridge interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  SECURE_TOP_AXIP2P_9        ,Secure TOP AXIP2P 9 interrupt" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SECURE_TOP_AXIP2P_8        ,Secure TOP AXIP2P 8 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SECURE_TOP_AXIP2P_7    ,Secure TOP AXIP2P 7 interrupt" "No interrupt,Interrupt"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SECURE_TOP_AXIP2P_6        ,Secure TOP AXIP2P 6 interrupt" "No interrupt,Interrupt"
tree.end
textline "                          "
group.long 0xFFC0++0x03
line.long 0x00 "CTRL_0,LIC Common Registers"
bitfld.long 0x00 0. " ENABLE_TIMESTAMPING        ,Global enable for time stamping" "Disabled,Enabled"
group.long 0xFFC4++0x03
line.long 0x00 "SCR_COMMON_0,SCR Common Register"
bitfld.long 0x00 29. " SEC_LCK                    ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN                    ,R group control in the SCR" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 24.--26. " SEC_OWNER                  ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
bitfld.long 0x00 23. "          PR7                    ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                        ,Privileged mode bit 6" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 21. " PR5                        ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4                    ,Privileged mode bit 4" "Disabled,Enabled"
bitfld.long 0x00 19. "      PR3                        ,Privileged mode bit 3" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 18. " PR2                        ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0                        ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W                        ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                        ,Security group 5 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 12. " G4W                        ,Security group 4 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 11. "      G3W                    ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                        ,Security group 2 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 9. " G1W                        ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W                    ,Security group 0 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 7. "      G7R                        ,Security group 7 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 6. " G6R                        ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R                        ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R                        ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                        ,Security group 1 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 0. " G0R                        ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
width 0x0B
tree.end
tree.open "Clock And Reset Controller"
tree "Clock Controller"
base ad:0x05000000
tree "Reset Device"
width 33.
group.long 0x0++0x03
line.long 0x00 "TOP_GTE_0_SET/CLR,TOP GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC++0x03
line.long 0x00 "SHSP_0_SET/CLR,SHSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x18++0x03
line.long 0x00 "TOP_TKE_0_SET/CLR,TOP TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x24++0x03
line.long 0x00 "KFUSE_0_SET/CLR,KFUSE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x30++0x03
line.long 0x00 "GPU_0_SET/CLR,GPU"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4000C++0x03
line.long 0x00 "UPHY_0_SET/CLR,UPHY"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x110000++0x03
line.long 0x00 "SPI3_0_SET/CLR,SPI3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x120000++0x03
line.long 0x00 "I2C1_0_SET/CLR,I2C1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x130000++0x03
line.long 0x00 "I2C5_0_SET/CLR,I2C5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x140000++0x03
line.long 0x00 "SPI1_0_SET/CLR,SPI1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x170000++0x03
line.long 0x00 "ISP_0_SET/CLR,ISP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x180000++0x03
line.long 0x00 "VI_0_SET/CLR,VI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x18000C++0x03
line.long 0x00 "TSCTNVI_0_SET/CLR,TSCTNVI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x190000++0x03
line.long 0x00 "SDMMC1_0_SET/CLR,SDMMC1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1A0000++0x03
line.long 0x00 "SDMMC2_0_SET/CLR,SDMMC2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x250000++0x03
line.long 0x00 "SDMMC3_0_SET/CLR,SDMMC3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1B0000++0x03
line.long 0x00 "SDMM4_0_SET/CLR,SDMMC4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1C0000++0x03
line.long 0x00 "UARTA_0_SET/CLR,UARTA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1D0000++0x03
line.long 0x00 "UARTB_0_SET/CLR,UARTB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1E0000++0x03
line.long 0x00 "HOST1X_0_SET/CLR,HOST1X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x220000++0x03
line.long 0x00 "EXTPERIPH4_0_SET/CLR,EXTPERIPH4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x230000++0x03
line.long 0x00 "SPI4_0_SET/CLR,SPI4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x240000++0x03
line.long 0x00 "I2C3_0_SET/CLR,I2C3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x260000++0x03
line.long 0x00 "UARTD_0_SET/CLR,UARTD"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x280000++0x03
line.long 0x00 "CSITE_0_SET/CLR,CSITE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x2A0004++0x03
line.long 0x00 "DTV_0_SET/CLR,DTV"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x2B0000++0x03
line.long 0x00 "TSEC_0_SET/CLR,TSEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x320000++0x03
line.long 0x00 "I2C4_0_SET/CLR,I2C4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x340000++0x03
line.long 0x00 "HDA2CODEC_2X_0_SET/CLR,HDA2CODEC 2X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x360000++0x03
line.long 0x00 "EXTPERIPH1_0_SET/CLR,EXTPERIPH1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x370000++0x03
line.long 0x00 "EXTPERIPH2_0_SET/CLR,EXTPERIPH2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x380000++0x03
line.long 0x00 "EXTPERIPH3_0_SET/CLR,EXTPERIPH3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0000++0x03
line.long 0x00 "SOR0_0_SET/CLR,SOR0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3A0000++0x03
line.long 0x00 "SOR1_0_SET/CLR,SOR1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B000C++0x03
line.long 0x00 "DPAUX_0_SET/CLR,DPAUX"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0018++0x03
line.long 0x00 "DPAUX1_0_SET/CLR,DPAUX1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0024++0x03
line.long 0x00 "CEC_0_SET/CLR,CEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3D0000++0x03
line.long 0x00 "HDA_0_SET/CLR,HDA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x400000++0x03
line.long 0x00 "APE_0_SET/CLR,APE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B0000++0x03
line.long 0x00 "DSIPADCTL_0_SET/CLR,DSIPADCTL"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B000C++0x03
line.long 0x00 "DSI_0_SET/CLR,DSI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B0018++0x03
line.long 0x00 "MIPI_CAL_0_SET/CLR,MIPI CAL"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4D0000++0x03
line.long 0x00 "ENTROPHY_0_SET/CLR,ENTROPHY"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4E0000++0x03
line.long 0x00 "DVFS_0_SET/CLR,DVFS"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x520000++0x03
line.long 0x00 "AUD_MCLK_0_SET/CLR,AUD MCLK"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x530000++0x03
line.long 0x00 "I2C6_0_SET/CLR,I2C6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x580000++0x03
line.long 0x00 "NVDEC_0_SET/CLR,NVDEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x590000++0x03
line.long 0x00 "NVJPG_0_SET/CLR,NVJPG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5A0000++0x03
line.long 0x00 "NVENC_0_SET/CLR,NVENC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5C0000++0x03
line.long 0x00 "QSPI_0_SET/CLR,QSPI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5D0000++0x03
line.long 0x00 "VI_I2C_0_SET/CLR,VI I2C"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x610000++0x03
line.long 0x00 "TSECB_0_SET/CLR,TSECB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x840000++0x03
line.long 0x00 "GPIO_CTL0_0_SET/CLR,GPIO CTL0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x850000++0x03
line.long 0x00 "GPIO_CTL1_0_SET/CLR,GPIO CTL1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x860000++0x03
line.long 0x00 "GPIO_CTL2_0_SET/CLR,GPIO CTL2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x870000++0x03
line.long 0x00 "GPIO_CTL3_0_SET/CLR,GPIO CTL3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x880000++0x03
line.long 0x00 "GPIO_CTL4_0_SET/CLR,GPIO CTL4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x890000++0x03
line.long 0x00 "TACH_0_SET/CLR,TACH"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x8F0000++0x03
line.long 0x00 "I2C7_0_SET/CLR,I2C7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x900000++0x03
line.long 0x00 "I2C9_0_SET/CLR,I2C9"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x920000++0x03
line.long 0x00 "I2C12_0_SET/CLR,I2C12"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x930000++0x03
line.long 0x00 "I2C13_0_SET/CLR,I2C13"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x940000++0x03
line.long 0x00 "I2C14_0_SET/CLR,I2C14"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x950000++0x03
line.long 0x00 "PWM1_0_SET/CLR,PWM1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x960000++0x03
line.long 0x00 "PWM2_0_SET/CLR,PWM2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x970000++0x03
line.long 0x00 "PWM3_0_SET/CLR,PWM3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x990000++0x03
line.long 0x00 "PWM5_0_SET/CLR,PWM5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9A0000++0x03
line.long 0x00 "PWM6_0_SET/CLR,PWM6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9B0000++0x03
line.long 0x00 "PWM7_0_SET/CLR,PWM7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9C0000++0x03
line.long 0x00 "PWM8_0_SET/CLR,PWM8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9D0000++0x03
line.long 0x00 "UARTE_0_SET/CLR,UARTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9E0000++0x03
line.long 0x00 "UARTF_0_SET/CLR,UARTF"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA1000C++0x03
line.long 0x00 "BPMP_PM_0_SET/CLR,BPMP PM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10018++0x03
line.long 0x00 "BPMP_CVC_0_SET/CLR,BPMP CVC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10024++0x03
line.long 0x00 "BPMP_DMA_0_SET/CLR,BPMP DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10030++0x03
line.long 0x00 "BPMP_HSP_0_SET/CLR,BPMP HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA1003C++0x03
line.long 0x00 "TSCTNBPMP_0_SET/CLR,TSCTNBPMP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10048++0x03
line.long 0x00 "BPMP_TKE_0_SET/CLR,BPMP TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10054++0x03
line.long 0x00 "BPMP_GTE_0_SET/CLR,BPMP GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA20000++0x03
line.long 0x00 "BPMP_APB_0_SET/CLR,BPMP APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA30000++0x03
line.long 0x00 "SOC_THERM_0_SET/CLR,SOC THERM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB0000C++0x03
line.long 0x00 "UFS_AON_0_SET/CLR,UFS AON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00018++0x03
line.long 0x00 "XUSB_AON_0_SET/CLR,XUSB AON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00024++0x03
line.long 0x00 "AON_ACTMON_0_SET/CLR,AON ACTMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00030++0x03
line.long 0x00 "AOPM_0_SET/CLR,AOPM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB0003C++0x03
line.long 0x00 "AOVC_0_SET/CLR,AOVC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00048++0x03
line.long 0x00 "AON_DMA_0_SET/CLR,AON DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00054++0x03
line.long 0x00 "AON_GPIO_0_SET/CLR,AON GPIO"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00060++0x03
line.long 0x00 "AON_HSP_0_SET/CLR,AON HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB10000++0x03
line.long 0x00 "CAN1_0_SET/CLR,CAN1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB30000++0x03
line.long 0x00 "AON_APB_0_SET/CLR,AON APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB50000++0x03
line.long 0x00 "UARTG_0_SET/CLR,UARTG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB70000++0x03
line.long 0x00 "I2C2_0_SET/CLR,I2C2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB80000++0x03
line.long 0x00 "I2C8_0_SET/CLR,I2C8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB90000++0x03
line.long 0x00 "I2C10_0_SET/CLR,I2C10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xBB0000++0x03
line.long 0x00 "SPI2_0_SET/CLR,SPI2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xBC0000++0x03
line.long 0x00 "DMIC5_0_SET/CLR,DMIC5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC00000++0x03
line.long 0x00 "PWM4_0_SET/CLR,PWM4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC10000++0x03
line.long 0x00 "TSCTNAON_0_SET/CLR,TSCTNAON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC1000C++0x03
line.long 0x00 "AON_TKE_0_SET/CLR,AON TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC10018++0x03
line.long 0x00 "AON_GTE_0_SET/CLR,AON GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD0000C++0x03
line.long 0x00 "SCE_ACTMON_0_SET/CLR,SCE ACTMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00018++0x03
line.long 0x00 "SCE_PM_0_SET/CLR,SCE PM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00024++0x03
line.long 0x00 "SCE_DMA_0_SET/CLR,SCE DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00030++0x03
line.long 0x00 "SCE_HSP_0_SET/CLR,SCE HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD0003C++0x03
line.long 0x00 "TSCTNSCE_0_SET/CLR,TSCTNSCE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00048++0x03
line.long 0x00 "SCE_TKE_0_SET/CLR,SCE TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00054++0x03
line.long 0x00 "SCE_GTE_0_SET/CLR,SCE GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00060++0x03
line.long 0x00 "SCE_CFG_0_SET/CLR,SCE CFG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD10000++0x03
line.long 0x00 "SCE_APB_0_SET/CLR,SCE APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFA0000++0x03
line.long 0x00 "DSIC_0_SET/CLR,DSIC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFB0000++0x03
line.long 0x00 "DSID_0_SET/CLR,DSID"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFC0000++0x03
line.long 0x00 "GPIO_CTL5_0_SET/CLR,GPIO CTL5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
width 0x0B
tree.end
width 33.
tree "Clock Out Enable"
group.long 0x1000++0x03
line.long 0x00 "FUSE_0_SET/CLR,FUSE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_FUSE                              ,Enable clock to FUSE" "Disabled,Enabled"
group.long 0x100C++0x03
line.long 0x00 "GPU_0_SET/CLR,GPU"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPU                              ,Enable clock to GPU" "Disabled,Enabled"
group.long 0x41000++0x03
line.long 0x00 "PCIE_0_SET/CLR,PCIE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PCIE                              ,Enable clock to PCIE" "Disabled,Enabled"
group.long 0x50000++0x03
line.long 0x00 "PLLC_0_SET/CLR,PLLC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PLLC                              ,Enable clock to PLLC" "Disabled,Enabled"
group.long 0x70000++0x03
line.long 0x00 "PLLP_0_SET/CLR,PLLP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PLLP                              ,Enable clock to PLLP" "Disabled,Enabled"
group.long 0xA0000++0x03
line.long 0x00 "PLLD_0_SET/CLR,PLLD"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PLLD                              ,Enable clock to PLLD" "Disabled,Enabled"
group.long 0xC0000++0x03
line.long 0x00 "I2S2_0_SET/CLR,I2S2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S2                             ,Enable clock to I2S2" "Disabled,Enabled"
group.long 0xD0000++0x03
line.long 0x00 "I2S3_0_SET/CLR,I2S3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S3                             ,Enable clock to I2S3" "Disabled,Enabled"
group.long 0xE0000++0x03
line.long 0x00 "SPDIF_0_SET/CLR,SPDIF"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPDIF                             ,Enable clock to SPDIF" "Disabled,Enabled"
group.long 0x111000++0x03
line.long 0x00 "SPI3_0_SET/CLR,SPI3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPI3                              ,Enable clock to SPI3" "Disabled,Enabled"
group.long 0x121000++0x03
line.long 0x00 "I2C1_0_SET/CLR,I2C1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C1                              ,Enable clock to I2C1" "Disabled,Enabled"
group.long 0x131000++0x03
line.long 0x00 "I2C5_0_SET/CLR,I2C5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C5                              ,Enable clock to I2C5" "Disabled,Enabled"
group.long 0x141000++0x03
line.long 0x00 "SPI1_0_SET/CLR,SPI1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPI1                              ,Enable clock to SPI1" "Disabled,Enabled"
group.long 0x171000++0x03
line.long 0x00 "ISP_0_SET/CLR,ISP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_ISP                            ,Enable clock to ISP" "Disabled,Enabled"
group.long 0x181000++0x03
line.long 0x00 "VI_0_SET/CLR,VI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_VI                            ,Enable clock to VI" "Disabled,Enabled"
group.long 0x191000++0x03
line.long 0x00 "SDMMC1_0_SET/CLR,SDMMC1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SDMMC1                            ,Enable clock to SDMMC1" "Disabled,Enabled"
group.long 0x1A1000++0x03
line.long 0x00 "SDMMC2_0_SET/CLR,SDMMC2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SDMMC2                            ,Enable clock to SDMMC2" "Disabled,Enabled"
group.long 0x1B1000++0x03
line.long 0x00 "SDMMC4_0_SET/CLR,SDMMC4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SDMMC4                            ,Enable clock to SDMMC4" "Disabled,Enabled"
group.long 0x1C1000++0x03
line.long 0x00 "UARTA_0_SET/CLR,UARTA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTA                            ,Enable clock to UARTA" "Disabled,Enabled"
group.long 0x1D1000++0x03
line.long 0x00 "UARTB_0_SET/CLR,UARTB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTB                            ,Enable clock to UARTB" "Disabled,Enabled"
group.long 0x1E1000++0x03
line.long 0x00 "HOST1X_0_SET/CLR,HOST1X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_HOST1X                            ,Enable clock to HOST1X" "Disabled,Enabled"
group.long 0x221000++0x03
line.long 0x00 "EXTPERIPH4_0_SET/CLR,EXTPERIPH4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EXTPERIPH4                        ,Enable clock to EXTPERIPH4" "Disabled,Enabled"
group.long 0x231000++0x03
line.long 0x00 "SPI4_0_SET/CLR,SPI4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPI4                        ,Enable clock to SPI4" "Disabled,Enabled"
group.long 0x241000++0x03
line.long 0x00 "I2C3_0_SET/CLR,I2C3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C3                        ,Enable clock to I2C3" "Disabled,Enabled"
group.long 0x251000++0x03
line.long 0x00 "SDMMC3_SET/CLR,SDMMC3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SDMMC3                        ,Enable clock to SDMMC3" "Disabled,Enabled"
group.long 0x261000++0x03
line.long 0x00 "UARTD_0_SET/CLR,UARTD"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTD                        ,Enable clock to UARTD" "Disabled,Enabled"
group.long 0x281000++0x03
line.long 0x00 "CSITE_0_SET/CLR,CSITE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_CSITE                             ,Enable clock to CSITE" "Disabled,Enabled"
group.long 0x290000++0x03
line.long 0x00 "I2S1_0_SET/CLR,I2S1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S1                             ,Enable clock to I2S1" "Disabled,Enabled"
group.long 0x2A1000++0x03
line.long 0x00 "DTV_0_SET/CLR,DTV"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DTV                             ,Enable clock to DTV" "Disabled,Enabled"
group.long 0x2B1000++0x03
line.long 0x00 "TSEC_0_SET/CLR,TSEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_TSEC                             ,Enable clock to TSEC" "Disabled,Enabled"
group.long 0x300000++0x03
line.long 0x00 "I2S4_0_SET/CLR,I2S4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S4                      ,Enable clock to I2S4" "Disabled,Enabled"
group.long 0x310000++0x03
line.long 0x00 "I2S5_0_SET/CLR,I2S5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S5                      ,Enable clock to I2S5" "Disabled,Enabled"
group.long 0x321000++0x03
line.long 0x00 "I2C4_0_SET/CLR,I2C4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C4                      ,Enable clock to I2C4" "Disabled,Enabled"
group.long 0x330000++0x03
line.long 0x00 "AHUB_0_SET/CLR,AHUB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AHUB                      ,Enable clock to AHUB" "Disabled,Enabled"
group.long 0x341000++0x03
line.long 0x00 "HDA2CODEC_2X_0_SET/CLR,HDA2CODEC 2X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_HDA2CODEC_2X                      ,Enable clock to HDA2CODEC 2X" "Disabled,Enabled"
group.long 0x361000++0x03
line.long 0x00 "EXTPERIPH1_0_SET/CLR,EXTPERIPH1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EXTPERIPH1                        ,Enable clock to EXTPERIPH1" "Disabled,Enabled"
group.long 0x371000++0x03
line.long 0x00 "EXTPERIPH2_0_SET/CLR,EXTPERIPH2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EXTPERIPH2                        ,Enable clock to EXTPERIPH2" "Disabled,Enabled"
group.long 0x381000++0x03
line.long 0x00 "EXTPERIPH3_0_SET/CLR,EXTPERIPH3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EXTPERIPH3                        ,Enable clock to EXTPERIPH3" "Disabled,Enabled"
group.long 0x390000++0x03
line.long 0x00 "I2C_SLOW_0_SET/CLR,I2C Slow"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C_SLOW                          ,Enable clock to I2C_SLOW" "Disabled,Enabled"
group.long 0x3A1000++0x03
line.long 0x00 "SOR1_0_SET/CLR,SOR1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SOR1                              ,Enable clock to SOR1" "Disabled,Enabled"
group.long 0x3B1000++0x03
line.long 0x00 "SOR0_0_SET/CLR,SOR0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SOR0                            ,Enable clock to SOR0" "Disabled,Enabled"
group.long 0x3B100C++0x03
line.long 0x00 "DPAUX_0_SET/CLR,DPAUX"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DPAUX                            ,Enable clock to DPAUX" "Disabled,Enabled"
group.long 0x3B1018++0x03
line.long 0x00 "DPAUX1_0_SET/CLR,DPAUX1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DPAUX1                            ,Enable clock to DPAUX1" "Disabled,Enabled"
group.long 0x3B1024++0x03
line.long 0x00 "CEC_0_SET/CLR,CEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_CEC                            ,Enable clock to CEC" "Disabled,Enabled"
group.long 0x3D1000++0x03
line.long 0x00 "HDA_0_SET/CLR,HDA 0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_HDA                               ,Enable clock to HDA" "Disabled,Enabled"
group.long 0x401000++0x03
line.long 0x00 "APE_0_SET/CLR,APE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_APE                           ,Enable clock to APE" "Disabled,Enabled"
group.long 0x40100C++0x03
line.long 0x00 "APB2APE_0_SET/CLR,APB2APE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_APB2APE                           ,Enable clock to APB2APE" "Disabled,Enabled"
group.long 0x401018++0x03
line.long 0x00 "IQC1_0_SET/CLR,IQC1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_IQC1                           ,Enable clock to IQC1" "Disabled,Enabled"
group.long 0x401024++0x03
line.long 0x00 "IQC2_0_SET/CLR,IQC2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_IQC2                           ,Enable clock to IQC2" "Disabled,Enabled"
group.long 0x420000++0x03
line.long 0x00 "PLLREFE_0_SET/CLR,PLLREFE 0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PLLREFE                           ,Enable clock to PLLREFE" "Disabled,Enabled"
group.long 0x460000++0x03
line.long 0x00 "PLLC4_0_SET/CLR,PLLC4 0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PLLC4                             ,Enable clock to PLLC4" "Disabled,Enabled"
group.long 0x4B1000++0x03
line.long 0x00 "DSI_0_SET/CLR,DSI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DSI                              ,Enable clock to DSI" "Disabled,Enabled"
group.long 0x4B100C++0x03
line.long 0x00 "MIPI_0_SET/CLR,MIPI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_MIPI                              ,Enable clock to MIPI" "Disabled,Enabled"
group.long 0x4D1000++0x03
line.long 0x00 "ENTROPHY_0_SET/CLR,ENTROPHY"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_ENTROPHY                 ,Enable clock to ENTROPHY" "Disabled,Enabled"
group.long 0x4E1000++0x03
line.long 0x00 "DVFS_0_SET/CLR,DVFS"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DVFS                 ,Enable clock to DVFS" "Disabled,Enabled"
group.long 0x521000++0x03
line.long 0x00 "AUD_MCLK_0_SET/CLR,AUD MCLK"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AUD_MCLK                 ,Enable clock to AUD MCLK" "Disabled,Enabled"
group.long 0x531000++0x03
line.long 0x00 "I2C6_0_SET/CLR,I2C6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C6                 ,Enable clock to I2C6" "Disabled,Enabled"
group.long 0x550000++0x03
line.long 0x00 "UART_FST_MIPI_CAL_0_SET/CLR,UART FST MIPI CAL"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UART_FST_MIPI_CAL                 ,Enable clock to UART FST MIPI CAL" "Disabled,Enabled"
group.long 0x570000++0x03
line.long 0x00 "SDMMC_LEGACY_TM_0_SET/CLR,SDMMC LEGACY TM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SDMMC_LEGACY_TM                 ,Enable clock to SDMMC LEGACY TM" "Disabled,Enabled"
group.long 0x581000++0x03
line.long 0x00 "NVDEC_0_SET/CLR,NVDEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_NVDEC                             ,Enable clock to NVDEC" "Disabled,Enabled"
group.long 0x591000++0x03
line.long 0x00 "NVJPG_0_SET/CLR,NVJPG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_NVJPG                             ,Enable clock to NVJPG" "Disabled,Enabled"
group.long 0x5A1000++0x03
line.long 0x00 "NVENC_0_SET/CLR,NVENC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_NVENC                             ,Enable clock to NVENC" "Disabled,Enabled"
group.long 0x5C1000++0x03
line.long 0x00 "QSPI_0_SET/CLR,QSPI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_QSPI                            ,Enable clock to QSPI" "Disabled,Enabled"
group.long 0x5D1000++0x03
line.long 0x00 "VI_I2C_0_SET/CLR,VI I2C"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_VI_I2C                            ,Enable clock to VI I2C" "Disabled,Enabled"
group.long 0x5E0000++0x03
line.long 0x00 "USB2_HSIC_TRK_0_SET/CLR,USB2 HSIC TRK"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_USB2_HSIC_TRK                     ,Enable clock to USB2 HSIC TRK" "Disabled,Enabled"
group.long 0x600000++0x03
line.long 0x00 "MAUD_0_SET/CLR,MAUD"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_MAUD                     ,Enable clock to MAUD" "Disabled,Enabled"
group.long 0x611000++0x03
line.long 0x00 "TSECB_0_SET/CLR,TSECB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_TSECB                     ,Enable clock to TSECB" "Disabled,Enabled"
group.long 0x6A1000++0x03
line.long 0x00 "AXI_CBB_0_SET/CLR,AXI CBB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AXI_CBB                     ,Enable clock to AXI CBB" "Disabled,Enabled"
group.long 0x7B0000++0x03
line.long 0x00 "DMIC3_0_SET/CLR,DMIC3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DMIC3                             ,Enable clock to DMIC3" "Disabled,Enabled"
group.long 0x7C0000++0x03
line.long 0x00 "DMIC4_0_SET/CLR,DMIC4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DMIC4                             ,Enable clock to DMIC4" "Disabled,Enabled"
group.long 0x7D0000++0x03
line.long 0x00 "DSPK1_0_SET/CLR,DSPK1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DSPK1                             ,Enable clock to DSPK1" "Disabled,Enabled"
group.long 0x7E0000++0x03
line.long 0x00 "DSPK2_0_SET/CLR,DSPK2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DSPK2                             ,Enable clock to DSPK2" "Disabled,Enabled"
group.long 0x7F0000++0x03
line.long 0x00 "I2S6_0_SET/CLR,I2S6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2S6                             ,Enable clock to I2S6" "Disabled,Enabled"
group.long 0x810000++0x03
line.long 0x00 "NVDISPLAY1_0_SET/CLR,NVDISPLAY1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_NVDISPLAY1                        ,Enable clock to NVDISPLAY1" "Disabled,Enabled"
group.long 0x820000++0x03
line.long 0x00 "NVDISPLAY2_0_SET/CLR,NVDISPLAY2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_NVDISPLAY2                        ,Enable clock to NVDISPLAY2" "Disabled,Enabled"
group.long 0x841000++0x03
line.long 0x00 "GPIO_CTL0_0_SET/CLR,GPIO CTL0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL0                         ,Enable clock to GPIO CTL0" "Disabled,Enabled"
group.long 0x851000++0x03
line.long 0x00 "GPIO_CTL1_0_SET/CLR,GPIO CTL1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL1                         ,Enable clock to GPIO CTL1" "Disabled,Enabled"
group.long 0x861000++0x03
line.long 0x00 "GPIO_CTL2_0_SET/CLR,GPIO CTL2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL2                         ,Enable clock to GPIO CTL2" "Disabled,Enabled"
group.long 0x871000++0x03
line.long 0x00 "GPIO_CTL3_0_SET/CLR,GPIO CTL3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL3                         ,Enable clock to GPIO CTL3" "Disabled,Enabled"
group.long 0x881000++0x03
line.long 0x00 "GPIO_CTL4_0_SET/CLR,GPIO CTL4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL4                         ,Enable clock to GPIO CTL4" "Disabled,Enabled"
group.long 0x891000++0x03
line.long 0x00 "TACH_0_SET/CLR,TACH"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_TACH                         ,Enable clock to TACH" "Disabled,Enabled"
group.long 0x8B0000++0x03
line.long 0x00 "EQOS_RX_0_SET/CLR,EQOS RX"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EQOS_RX                           ,Enable clock to EQOS RX" "Disabled,Enabled"
group.long 0x8F1000++0x03
line.long 0x00 "I2C7_0_SET/CLR,I2C7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C7                           ,Enable clock to I2C7" "Disabled,Enabled"
group.long 0x901000++0x03
line.long 0x00 "I2C9_0_SET/CLR,I2C9"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C9                           ,Enable clock to I2C9" "Disabled,Enabled"
group.long 0x921000++0x03
line.long 0x00 "I2C12_0_SET/CLR,I2C12"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C12                             ,Enable clock to I2C12" "Disabled,Enabled"
group.long 0x931000++0x03
line.long 0x00 "I2C13_0_SET/CLR,I2C13"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C13                             ,Enable clock to I2C13" "Disabled,Enabled"
group.long 0x941000++0x03
line.long 0x00 "I2C14_0_SET/CLR,I2C14"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C14                             ,Enable clock to I2C14" "Disabled,Enabled"
group.long 0x951000++0x03
line.long 0x00 "PWM1_0_SET/CLR,PWM1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM1                             ,Enable clock to PWM1" "Disabled,Enabled"
group.long 0x961000++0x03
line.long 0x00 "PWM2_0_SET/CLR,PWM2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM2                             ,Enable clock to PWM2" "Disabled,Enabled"
group.long 0x971000++0x03
line.long 0x00 "PWM3_0_SET/CLR,PWM3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM3                             ,Enable clock to PWM3" "Disabled,Enabled"
group.long 0x991000++0x03
line.long 0x00 "PWM5_0_SET/CLR,PWM5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM5                             ,Enable clock to PWM5" "Disabled,Enabled"
group.long 0x9A1000++0x03
line.long 0x00 "PWM6_0_SET/CLR,PWM6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM6                             ,Enable clock to PWM6" "Disabled,Enabled"
group.long 0x9B1000++0x03
line.long 0x00 "PWM7_0_SET/CLR,PWM7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM7                             ,Enable clock to PWM7" "Disabled,Enabled"
group.long 0x9C1000++0x03
line.long 0x00 "PWM8_0_SET/CLR,PWM8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM8                             ,Enable clock to PWM8" "Disabled,Enabled"
group.long 0x9D1000++0x03
line.long 0x00 "UARTE_0_SET/CLR,UARTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTE                             ,Enable clock to UARTE" "Disabled,Enabled"
group.long 0x9E1000++0x03
line.long 0x00 "UARTF_0_SET/CLR,UARTF"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTF                             ,Enable clock to UARTF" "Disabled,Enabled"
group.long 0x9F0000++0x03
line.long 0x00 "DBGAPB_0_SET/CLR,DBGAPB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DBGAPB                            ,Enable clock to DBGAPB" "Disabled,Enabled"
group.long 0xA21000++0x03
line.long 0x00 "BPMP_APB_0_SET/CLR,BPMP APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_BPMP_APB                         ,Enable clock to BPMP APB" "Disabled,Enabled"
group.long 0xA31000++0x03
line.long 0x00 "SOC_THERM_0_SET/CLR,SOC THERM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SOC_THERM                         ,Enable clock to SOC THERM" "Disabled,Enabled"
group.long 0xA41000++0x03
line.long 0x00 "ACTMON_0_SET/CLR,ACTMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_ACTMON                         ,Enable clock to ACTMON" "Disabled,Enabled"
group.long 0xA50000++0x03
line.long 0x00 "TSENSOR_0_SET/CLR,TSENSOR"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_TSENSOR                           ,Enable clock to TSENSOR" "Disabled,Enabled"
group.long 0xAF0000++0x03
line.long 0x00 "SIMON_0_SET/CLR,SIMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SIMON                             ,Enable clock to SIMON" "Disabled,Enabled"
group.long 0xB11000++0x03
line.long 0x00 "CAN1_0_SET/CLR,CAN1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_CAN1                           ,Enable clock to CAN1" "Disabled,Enabled"
group.long 0xB31000++0x03
line.long 0x00 "AON_APB_0_SET/CLR,AON APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AON_APB                           ,Enable clock to AON APB" "Disabled,Enabled"
group.long 0xB51000++0x03
line.long 0x00 "UARTG_0_SET/CLR,UARTG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_UARTG                           ,Enable clock to UARTG" "Disabled,Enabled"
group.long 0xB60000++0x03
line.long 0x00 "AON_UART_FST_MIPI_CAL_0_SET/CLR,Always-On Cluster UART FST MIPI CAL 0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AON_UART_FST_MIPI_CAL             ,Enable clock to AON UART FST MIPI CAL" "Disabled,Enabled"
group.long 0xB71000++0x03
line.long 0x00 "I2C2_0_SET/CLR,I2C2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C2                             ,Enable clock to I2C2" "Disabled,Enabled"
group.long 0xB81000++0x03
line.long 0x00 "I2C8_0_SET/CLR,I2C8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C8                             ,Enable clock to I2C8" "Disabled,Enabled"
group.long 0xB91000++0x03
line.long 0x00 "I2C10_0_SET/CLR,I2C10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_I2C10                             ,Enable clock to I2C10" "Disabled,Enabled"
group.long 0xBA0000++0x03
line.long 0x00 "AON_I2C_SLOW_0_SET/CLR,AON I2C SLOW"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AON_I2C_SLOW                      ,Enable clock to AON I2C SLOW" "Disabled,Enabled"
group.long 0xBB1000++0x03
line.long 0x00 "SPI2_0_SET/CLR,SPI2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SPI2                      ,Enable clock to SPI2" "Disabled,Enabled"
group.long 0xBC1000++0x03
line.long 0x00 "DMIC5_0_SET/CLR,DMIC5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DMIC5                      ,Enable clock to DMIC5" "Disabled,Enabled"
group.long 0xBD0000++0x03
line.long 0x00 "AON_TOUCH_0_SET/CLR,AON TOUCH"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_AON_TOUCH                      ,Enable clock to AON TOUCH" "Disabled,Enabled"
group.long 0xC01000++0x03
line.long 0x00 "PWM4_0_SET/CLR,PWM4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_PWM4                      ,Enable clock to PWM4" "Disabled,Enabled"
group.long 0xC11000++0x03
line.long 0x00 "TSC_0_SET/CLR,TSC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_TSC                      ,Enable clock to TSC" "Disabled,Enabled"
group.long 0xC20000++0x03
line.long 0x00 "MSS_ENCRYPT_0_SET/CLR,MSS ENCRYPT"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_MSS_ENCRYPT                       ,Enable clock to MSS ENCRYPT" "Disabled,Enabled"
group.long 0xD11000++0x03
line.long 0x00 "SCE_APB_0_SET/CLR,SCE APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SCE_APB                       ,Enable clock to SCE APB" "Disabled,Enabled"
group.long 0xFB1000++0x03
line.long 0x00 "DSID_0_SET/CLR,DSID"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DSID                       ,Enable clock to DSID" "Disabled,Enabled"
group.long 0xFC1000++0x03
line.long 0x00 "GPIO_CTL5_0_SET/CLR,GPIO CTL5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_GPIO_CTL5                       ,Enable clock to GPIO CTL5" "Disabled,Enabled"
tree.end
textline "                                 "
width 33.
group.long 0x300C++0x03
line.long 0x00 "GPU_ISOB_CTRL_0,GPU ISOB Control"
bitfld.long 0x00 0. " CAR_ISOB_EN                          ,Enable/Disable the idle slowdown on boot(ISoB) to GPU" "Disabled,Enabled"
group.long 0x30BC++0x03
line.long 0x00 "MISC_CLK_ENB_0,MISC Clock Enable"
bitfld.long 0x00 22.--23. " DEV1_OSC_DIV_SEL                     ,DEV1 oscillator divider select" "/1,/2,/4,/8"
bitfld.long 0x00 20.--21. "                DEV2_OSC_DIV_SEL                     ,DEV2 oscillator divider select" "/1,/2,/4,/8"
group.long 0x30D4++0x07
line.long 0x00 "EMC_MISC_0,EMC MISC"
bitfld.long 0x00 1. " MCHUB_CLK_RATIO                      ,MC Hub clock divider ratio" "/1,/2"
bitfld.long 0x00 0. "                EMCHUB_CLK_SEL                       ,Hub clock mux source selection" "Side A,Side B"
line.long 0x04 "NAFLL_ADC_RDACK_OVERRIDE_0,NAFLL ADC RDACK Override"
bitfld.long 0x04 1. " NAFLL_ADC_RDACK_OVERRIDE_SELECT      ,NAFLL ADC RDACK override select" "No override,Override"
bitfld.long 0x04 0. "       NAFLL_ADC_RDACK_OVERRIDE_VALUE       ,NAFLL ADC RDACK override value" "No override,Override"
group.long 0x40000++0x03
line.long 0x00 "RST_DEV_PEX_USB_UPHY_0_SET/CLR,PEX USB UPHY"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " SWR_PEX_USB_UPHY_L5_RST              ,Reset UPHY lane 5" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "          SWR_PEX_USB_UPHY_L4_RST              ,Reset UPHY lane 4" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " SWR_PEX_USB_UPHY_L3_RST              ,Reset UPHY lane 3" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "          SWR_PEX_USB_UPHY_L2_RST              ,Reset UPHY lane 2" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " SWR_PEX_USB_UPHY_L1_RST              ,Reset UPHY lane 1" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "          SWR_PEX_USB_UPHY_L0_RST              ,Reset UPHY lane 0" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. " SWR_PEX_USB_UPHY_PLL1_RST            ,Reset UPHY PLL1" "Disabled,Enabled"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "          SWR_PEX_USB_UPHY_PLL0_RST            ,Reset UPHY PLL0" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_PEX_USB_UPHY_RST                 ,Reset all UPHY logic" "Disabled,Enabled"
group.long 0x40018++0x03
line.long 0x00 "RST_DEV_PCIE_0_SET/CLR,PCIE"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_PCIEXCLK_RST                     ,Reset PCIEXCLK logic" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "          SWR_AFI_RST                          ,Reset AFI controller" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_PCIE_RST                         ,Reset PCIE controller" "Disabled,Enabled"
group.long 0x41000++0x03
line.long 0x00 "CLK_OUT_ENB_PCIE_0_SET/CLR,PCIE"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CLK_ENB_PCIERX4                      ,Enable clock to PCIERX4" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "          CLK_ENB_PCIERX3                      ,Enable clock to PCIERX3" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CLK_ENB_PCIERX2                      ,Enable clock to PCIERX2" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "          CLK_ENB_PCIERX1                      ,Enable clock to PCIERX1" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_PCIERX0                      ,Enable clock to PCIERX0" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "          CLK_ENB_PCIE2_IOBIST                 ,Enable clock to PCIE2 IOBIST" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_AFI                          ,Enable clock to AFI" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "          CLK_ENB_PCIE                         ,Enable clock to PCIE" "Disabled,Enabled"
group.long 0x43004++0x0B
line.long 0x00 "PLLE_MISC1_0,PLLE MISC1"
rbitfld.long 0x00 5.--7. " PLLE_SDM_TEST_OUT                    ,PLLE SDM test out" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4. "                 PLLE_SDM_RESET                       ,PLLE SDM reset" "No reset,Reset"
textline "                                          "
bitfld.long 0x00 3. " PLLE_EN_DITHER2                      ,PLLE enable dither2" "Disabled,Enabled"
bitfld.long 0x00 2. "          PLLE_EN_DITHER                       ,PLLE enable dither" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 1. " PLLE_EN_SSC                          ,PLLE enable SSC" "Disabled,Enabled"
bitfld.long 0x00 0. "          PLLE_EN_SDM                          ,PLLE enable SDM" "Disabled,Enabled"
line.long 0x04 "PLLE_BASE_0,PLLE Base"
bitfld.long 0x04 31. " PLLE_ENABLE                          ,PLL enable" "Disabled,Enabled"
bitfld.long 0x04 30. "          PLLE_LOCK_OVERRIDE                   ,Forces PLL_LOCK and PLL_FREQLOCK to 1" "Not locked,Locked"
textline "                                          "
bitfld.long 0x04 29. " PLLE_FDIV4B                          ,Interpolator logic clock" "VCOCLK/4,VCOCLK/2"
bitfld.long 0x04 24.--28. "          PLLE_PLDIV_CML                       ,Divider control for CLOCKOUT_CML/CLOCKOUTB_CML" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x04 16.--23. 1. " PLLE_EXT_SETUP_23_16                 ,Base PLLE setup [19:16]"
hexmask.long.byte 0x04 8.--15. 1. "                PLLE_NDIV                            ,Feedback divider"
textline "                                          "
hexmask.long.byte 0x04 0.--7. 1. " PLLE_MDIV                            ,Input divider"
line.long 0x08 "PLLE_BASE1_0,PLLE BASE1"
bitfld.long 0x08 24.--28. " PLLE_PDIVB                           ,Divider control for CLKOUT2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
if (((per.l(ad:0x05000000+0x43008)&0x80000000)==0x80000000))
group.long 0x43010++0x03
line.long 0x00 "PLLE_MISC_0,PLLE MISC"
hexmask.long.word 0x00 16.--31. 1. " PLLE_SETUP                           ,Base PLLE setup [15:0]"
textline "                                          "
bitfld.long 0x00 14. " PLLE_IDDQ_SWCTL                      ,The PLLE is put in IDDQ" "Hardware,Software"
textline "                                          "
bitfld.long 0x00 13. " PLLE_IDDQ_OVERRIDE_VALUE             ,PLLE IDDQ override value" "No override,Override"
textline "                                          "
rbitfld.long 0x00 12. " PLLE_FREQLOCK                        ,PLLE frequency acquisition" "Not achieved,Happened"
textline "                                          "
rbitfld.long 0x00 11. " PLLE_LOCK                            ,PLLE lock" "Not locked,Locked"
textline "                                          "
bitfld.long 0x00 10. " PLLE_REF_DIS                         ,PLLE reference clock disable" "No,Yes"
textline "                                          "
bitfld.long 0x00 9. " PLLE_LOCK_ENABLE                     ,PLLE lock enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 8. " PLLE_PTS                             ,Bypass PLL" "PTO=PLLE CLOCKIN,PTO=PLLE FO"
textline "                                          "
bitfld.long 0x00 6.--7. " PLLE_KCP                             ,Base PLLE charge pump gain control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 4.--5. " PLLE_VREG14V_CTRL                    ,Base PLLE VREG control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 2.--3. " PLLE_VREG10V_CTRL                    ,Base PLLE VREG control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 1. " PLLE_BG_EN                           ,PLLE BG enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " PLLE_KVCO                            ,Base PLLE VCO gain" "0,1"
else
group.long 0x43010++0x03
line.long 0x00 "PLLE_MISC_0,PLLE MISC"
hexmask.long.word 0x00 16.--31. 1. " PLLE_SETUP                           ,Base PLLE setup [15:0]"
textline "                                          "
bitfld.long 0x00 14. " PLLE_IDDQ_SWCTL                      ,The PLLE is put in IDDQ" "Hardware,Software"
textline "                                          "
bitfld.long 0x00 13. " PLLE_IDDQ_OVERRIDE_VALUE             ,PLLE IDDQ override value" "No override,Override"
textline "                                          "
rbitfld.long 0x00 12. " PLLE_FREQLOCK                        ,PLLE frequency acquisition" "Not achieved,Happened"
textline "                                          "
rbitfld.long 0x00 11. " PLLE_LOCK                            ,PLLE lock" "Not locked,Locked"
textline "                                          "
bitfld.long 0x00 10. " PLLE_REF_DIS                         ,PLLE reference clock disable" "No,Yes"
textline "                                          "
bitfld.long 0x00 9. " PLLE_LOCK_ENABLE                     ,PLLE lock enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 8. " PLLE_PTS                             ,Bypass PLL" "PTO always 0,PTO=PLLE FO"
textline "                                          "
bitfld.long 0x00 6.--7. " PLLE_KCP                             ,Base PLLE charge pump gain control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 4.--5. " PLLE_VREG14V_CTRL                    ,Base PLLE VREG control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 2.--3. " PLLE_VREG10V_CTRL                    ,Base PLLE VREG control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 1. " PLLE_BG_EN                           ,PLLE BG enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " PLLE_KVCO                            ,Base PLLE VCO gain" "0,1"
endif
group.long 0x4301C++0x1B
line.long 0x00 "PLLE_AUX_0,PLLE AUX"
bitfld.long 0x00 31. " PLLE_SS_SEQ_INCLUDE                  ,PLLE SS sequence include" "Skip,Include"
bitfld.long 0x00 28. "           PLLE_REF_SEL_PLLREFE                 ,PLLE input reference clock source select2" "ARM,PLLREFE_VCOCLK"
textline "                                          "
rbitfld.long 0x00 26.--27. " PLLE_SEQ_STATE                       ,PLLE power sequencer state" "Off,On,Busy,?..."
bitfld.long 0x00 25. "              PLLE_SEQ_START_STATE                 ,PLLE power sequencer start state" "Sequence off,Sequence on"
textline "                                          "
bitfld.long 0x00 24. " PLLE_SEQ_ENABLE                      ,PLLE power sequencer enable" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "          PLLE_SS_DLY                          ,Delay between spread spectrum"
textline "                                          "
hexmask.long.byte 0x00 8.--15. 1. " PLLE_LOCK_DLY                        ,Delay from PLLE enable to lock"
bitfld.long 0x00 7. "                TEST_FAST_PT                         ,Test fast PT" "Normal,Fast"
textline "                                          "
bitfld.long 0x00 6. " PLLE_SS_SWCTL                        ,PLLE spread spectrum config setup" "Hardware,Software"
bitfld.long 0x00 5. "          PLLE_CONFIG_SWCTL                    ,PLLE config setup" "Hardware,Software"
textline "                                          "
bitfld.long 0x00 4. " PLLE_ENABLE_SWCTL                    ,PLLE enable by hardware/software" "Hardware,Software"
textline "                                          "
bitfld.long 0x00 3. " PLLE_USE_LOCKDET                     ,PLLE use lock detection" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 2. " PLLE_REF_SRC                         ,PLLE input reference clock Source select" "OSC_DIV,?..."
bitfld.long 0x00 1. "           PLLE_CML1_OEN                        ,PLLE CML1 clock out enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " PLLE_CML0_OEN                        ,PLLE CML0 clock out enable" "Disabled,Enabled"
line.long 0x04 "SATA_PLL_CFG0_0,SATA PLL Config 0"
bitfld.long 0x04 28.--31. " SATA_PADPLL_IDDQ2_PADPLL_RCAL_DLY    ,Delay from SATAX PAD PLL IDDQ DE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
rbitfld.long 0x04 26.--27. " SATA_SEQ_STATE                       ,SATA power sequencer state" "Off,On,Busy,?..."
bitfld.long 0x04 25. "              SATA_SEQ_START_STATE                 ,SATA power sequencer start state" "Off,On"
textline "                                          "
bitfld.long 0x04 24. " SATA_SEQ_ENABLE                      ,SATA power sequencer enable" "Disabled,Enabled"
rbitfld.long 0x04 16. "          SATA_PADPLL_CAL_VALID                ,Indicator that Brick PLL calibration was done and is valid" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 15. " SATA_PADPLL_REQ_PLL_RCAL_BYPASS      ,Resistor calibration bypass" "Not bypassed,Bypassed"
bitfld.long 0x04 14. "      SATA_PADPLL_REQ_PLL_RCAL             ,Rising edge for to force PLL resistor calibration" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 13. " SATA_PADPLL_SLEEP_IDDQ               ,IDDQ value during sleep mode" "Disabled,Enabled"
bitfld.long 0x04 11.--12. "          SATA_PADPLL_SLEEP_VAL                ,Select type of PLL sleep states from 1 to 3" ",1,2,3"
textline "                                          "
bitfld.long 0x04 10. " SATA_PADPLL_CAL_VALID_RST            ,SATA PADPLL CAL valid reset" "No reset,Reset"
bitfld.long 0x04 9. "          SATA_PADPLL_REQ_PLL_CAL_RESET        ,Rising edge for to reset PLL VCO calibration" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 8. " SATA_PADPLL_REQ_PLL_CAL              ,Rising edge for to Force PLL VCO Calibration" "Disabled,Enabled"
bitfld.long 0x04 7. "          SATA_SEQ_PADPLL_PD_INPUT_VALUE       ,SATA sequence PADPLL PD input value" "Powered up,Software control"
textline "                                          "
bitfld.long 0x04 6. " SATA_SEQ_LANE_PD_INPUT_VALUE         ,SATA sequence lane PD input value" "Powered up,Software control"
textline "                                          "
bitfld.long 0x04 5. " SATA_SEQ_RESET_INPUT_VALUE           ,SATA sequence reset input value" "Deasserted,Asserted"
textline "                                          "
bitfld.long 0x04 4. " SATA_SEQ_IN_SWCTL                    ,SATA sequence input" "Hardware,Software"
textline "                                          "
bitfld.long 0x04 2. " SATA_PADPLL_USE_LOCKDET              ,SATA PADPLL use lock detection" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 1. " SATA_PADPLL_RESET_OVERRIDE_VALUE     ,SATA PADPLL reset override value" "No override,Override"
bitfld.long 0x04 0. "       SATA_PADPLL_RESET_SWCTL              ,SATA PADPLL reset hardware/software" "Hardware,Software"
line.long 0x08 "SATA_PLL_CFG1_0,SATA PLL Config 1"
hexmask.long.byte 0x08 24.--31. 1. " SATA_LANE_IDDQ2_PADPLL_RESET_DLY     ,Delay from placing lane out of IDDQ to PAD PLL out of reset"
hexmask.long.byte 0x08 16.--23. 1. "                SATA_PADPLL_IDDQ2LANE_SLUMBER_DLY    ,Delay from SATA PAD PLL out of IDDQ to lane placed out of IDDQ"
textline "                                          "
hexmask.long.byte 0x08 8.--15. 1. " SATA_PADPLL_PU_POST_DLY              ,Delay from enable to SATA PAD PLL lock"
hexmask.long.byte 0x08 0.--7. 1. "                SATA_PADPLL_PU_POST_DLY              ,Delay from placing lane in IDDQ to PAD PLL in IDDQ"
line.long 0x0C "PCIE_PLL_CFG_0,PCIE PLL Config"
rbitfld.long 0x0C 26.--27. " PCIE_SEQ_STATE                       ,PCIe power sequencer state" "Off,On,Busy,?..."
bitfld.long 0x0C 25. "              PCIE_SEQ_START_STATE                 ,PCIe power sequencer start state" "Off,On"
textline "                                          "
bitfld.long 0x0C 24. " PCIE_SEQ_ENABLE                      ,PCIe power sequencer enable" "Disabled,Enabled"
bitfld.long 0x0C 5. "          PCIE_SEQ_RESET_INPUT_VALUE           ,PCIE sequence reset input value" "Deasserted,Asserted"
textline "                                          "
bitfld.long 0x0C 4. " PCIE_SEQ_IN_SWCTL                    ,PCIE sequence input hardware/software" "Hardware,Software"
bitfld.long 0x0C 3. "          PCIE_XCLK_ENABLE_OVERRIDE_VALUE      ,Override value used only when PCIE_XCLK_ENABLE_SWCTL is set" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 2. " PCIE_XCLK_ENABLE_SWCTL               ,PCIE XCLK enable hardware/software" "Hardware,Software"
line.long 0x10 "XUSBIO_PLL_CFG0_0,XUSBIO PLL Config 0"
bitfld.long 0x10 28.--31. " XUSBIO_PADPLL_IDDQ2_PADPLL_RCAL_DLY  ,Delay from XUSBIO PAD PLL IDDQ DE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x10 26.--27. "                XUSBIO_SEQ_STATE                     ,XUSBIO power sequencer state" "Off,On,Busy,?..."
textline "                                          "
bitfld.long 0x10 25. " XUSBIO_SEQ_START_STATE               ,XUSBIO power sequencer start state" "Off,On"
bitfld.long 0x10 24. "               XUSBIO_SEQ_ENABLE                    ,XUSBIO power sequencer enable" "Disabled,Enabled"
textline "                                          "
rbitfld.long 0x10 16. " XUSBIO_PADPLL_CAL_VALID              ,Indicator that Brick PLL calibration was done and is valid" "Disabled,Enabled"
bitfld.long 0x10 15. "          XUSBIO_PADPLL_REQ_PLL_RCAL_BYPASS    ,Resistor calibration bypass" "Not bypassed,Bypassed"
textline "                                          "
bitfld.long 0x10 14. " XUSBIO_PADPLL_REQ_PLL_RCAL           ,Rising edge for to force PLL resistor calibration" "Disabled,Enabled"
bitfld.long 0x10 13. "          XUSBIO_PADPLL_SLEEP_IDDQ             ,IDDQ value during sleep mode" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 11.--12. " XUSBIO_PADPLL_SLEEP_VAL              ,Select type of PLL sleep states from 1 to 3" ",1,2,3"
bitfld.long 0x10 10. "                 XUSBIO_PADPLL_CAL_VALID_RST          ,XUSBIO PADPLL CAL valid reset" "No reset,Reset"
textline "                                          "
bitfld.long 0x10 9. " XUSBIO_PADPLL_REQ_PLL_CAL_RESET      ,Rising edge for to reset PLL VCO calibration" "Disabled,Enabled"
bitfld.long 0x10 8. "          XUSBIO_PADPLL_REQ_PLL_CAL            ,Rising edge for to Force PLL VCO Calibration" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 6. " XUSBIO_PADPLL_USE_LOCKDET            ,XUSBIO PADPLL use lock detection" "Disabled,Enabled"
bitfld.long 0x10 5. "          XUSBIO_SEQ_RESET_INPUT_VALUE         ,XUSBIO sequence reset input value" "On,Off"
textline "                                          "
bitfld.long 0x10 4. " XUSBIO_SEQ_IN_SWCTL                  ,XUSBIO sequence input hardware/software" "Hardware,Software"
bitfld.long 0x10 3. "          XUSBIO_CLK_ENABLE_OVERRIDE_VALUE     ,Override value used only when XUSBIO_CLK_ENABLE_SWCTL is set" "No override,Override"
textline "                                          "
bitfld.long 0x10 2. " XUSBIO_CLK_ENABLE_SWCTL              ,IOCLKS enable hardware/software" "Hardware,Software"
bitfld.long 0x10 1. "          XUSBIO_PADPLL_RESET_OVERRIDE_VALUE   ,XUSBIO PADPLL reset override value" "No override,Override"
textline "                                          "
bitfld.long 0x10 0. " XUSBIO_PADPLL_RESET_SWCTL            ,XUSBIO PADPLL reset hardware/software" "Hardware,Software"
line.long 0x14 "XUSBIO_PLL_CFG1_0,XUSBIO PLL Config 1"
bitfld.long 0x14 31. " XUSBIO_PADPLL_MASTER                 ,XUSBIO PADPLL master" "0,1"
bitfld.long 0x14 29.--30. "                 XUSBIO_PADPLL_SLEEP_LOCAL_VAL        ,XUSBIO PADPLL sleep local value" "0,1,2,3"
textline "                                          "
hexmask.long.byte 0x14 16.--23. 1. " XUSBIO_PADPLL_RESET2_PADPLL_IDDQ_DLY , Delay from XUSBIO PAD PLL SLEEP"
hexmask.long.byte 0x14 8.--15. 1. "                XUSBIO_PADPLL_IDDQ2_PADPLL_RESET_DLY ,Delay from XUSBIO PAD PLL SLEEP"
textline "                                          "
hexmask.long.byte 0x14 0.--7. 1. " XUSBIO_PADPLL_PU_POST_DLY            ,Delay from XUSBIO PAD PLL ENABLE"
line.long 0x18 "PLLE_AUX1_0,PLLE AUX1"
hexmask.long.byte 0x18 8.--15. 1. " PLLE_INTreset_DLY                    ,Delay between PLLE SSC_BYP"
hexmask.long.byte 0x18 0.--7. 1. "                PLLE_ENABLE_DLY                      ,Delay from PLLE IDDQ deassertion to PLLE enable assertion"
group.long 0x44000++0x03
line.long 0x00 "CLK_SOURCE_IPFS_0,Clock Source IPFS"
bitfld.long 0x00 29.--31. " IPFS_CLK_SRC                         ,IPFS clock source" "PLLP_OUT0,PLLREFE_OUT,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       IPFS_CLK_DIVISOR                     ,IPFS clock divisor"
textline "                                          "
width 33.
group.long 0x5000C++0x17
line.long 0x00 "PLLC_BASE_0,PLLC Base"
bitfld.long 0x00 31. " PLLC_BYPASS                      ,PLLC bypass" "Disabled,Enabled"
bitfld.long 0x00 30. "       PLLC_ENABLE                       ,PLLC will invert and connect to IDDQ" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. " PLLC_REF_DIS                     ,PLLC reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "            PLLC_FREQ_LOCK                    ,PLLC frequency lock" "Not locked,Locked"
textline "                                          "
rbitfld.long 0x00 26. " PLLC_LOCK                        ,PLLC lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "     PLLC_DIVP                         ,Post divider (divide by N+1)" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32"
textline "                                          "
hexmask.long.byte 0x00 10.--17. 1. " PLLC_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "             PLLC_DIVM                         ,PLL input divider"
line.long 0x04 "PLLC_MISC_2_0,PLLC MISC 2"
hexmask.long.byte 0x04 24.--31. 1. " PLLC_PLL_LD_MEM                  ,PLLC PLL LD MEM"
hexmask.long.byte 0x04 16.--23. 1. "             PLLC_PLL_FRUG                     ,PLLC PLL FRUG"
textline "                                          "
hexmask.long.byte 0x04 8.--15. 1. " PLLC_FLL_LD_MEM                  ,PLLC FLL LD MEM"
bitfld.long 0x04 4. "             PLLC_FLL_DIV                      ,PLLC FLL divider" "0,1"
textline "                                          "
bitfld.long 0x04 0.--2. " PLLC_FLL_FRUG                    ,PLLC FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x08 "PLLC_MISC_3_0,PLLC MISC 3"
bitfld.long 0x08 24.--25. " PLLC_VREG10V_CTRL                ,PLLC VREG10V control" "0,1,2,3"
hexmask.long.word 0x08 8.--23. 1. "              PLLC_SETUP                        ,PLLC setup"
textline "                                          "
bitfld.long 0x08 4.--5. " PLLC_LDIV                        ,PLLC LDIV" "0,1,2,3"
bitfld.long 0x08 0.--3. "              PLLC_PLL_LD_TOL                   ,PLLC PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PLLC_MISC_0_0,PLLC MISC 0"
bitfld.long 0x0C 30. " PLLC_RESET                       ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x0C 4.--19. 1. "       PLLC_EXT_FRU                      ,PLLC EXT FRU"
textline "                                          "
bitfld.long 0x0C 3. " PLLC_PTS                         ,Base PLLC test output select" "Disable,FO"
bitfld.long 0x0C 0.--1. "        PLLC_LOOP_CTRL                    ,PLLC loop control" "0,1,2,3"
line.long 0x10 "PLLC_MISC_1_0,PLLC MISC 1"
bitfld.long 0x10 27. " PLLC_IDDQ                        ,PLLC IDDQ" "Off,On"
bitfld.long 0x10 16.--19. "            PLLC_EXT_SUBINT                   ,PLLC EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.long.word 0x10 0.--15. 1. " PLLC_DIVN_FRAC                   ,PLLC DIVN FRAC"
line.long 0x14 "PLLC_MISC_4_0,PLLC MISC 4"
bitfld.long 0x14 28. " PLLC_SEL_IREF                    ,PLLC select IREF" "0,1"
bitfld.long 0x14 25.--27. "              PLLC_KP_LO                        ,PLLC KP low" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.long 0x14 22.--24. " PLLC_KP_HI                       ,PLLC KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "              PLLC_KP_STEP_TIMER                ,PLLC KP step timer" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.long 0x14 16.--18. " PLLC_FRAC_STEP_TIMER             ,PLLC FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "              PLLC_FRAC_STEP                    ,PLLC FRAC step"
group.long 0x60000++0x03
line.long 0x00 "PLLM_BASE_0,PLLM Base"
bitfld.long 0x00 31. " PLLM_BYPASSPLL                   ,PLLM BYPASSPLL" "Disabled,Enabled"
bitfld.long 0x00 30. "       PLLM_ENABLE                       ,PLLM will invert and connect to IDDQ" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. " PLLM_REF_DIS                     ,PLLM reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "            PLLM_LOCK                         ,PLLM lock" "Not locked,Locked"
textline "                                          "
rbitfld.long 0x00 26. " PLLM_FREQ_LOCK                   ,PLLM frequency lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "     PLLM_DIVP                         ,PLL post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x00 8.--15. 1. " PLLM_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "             PLLM_DIVM                         ,PLL input divider"
group.long 0x60008++0x27
line.long 0x00 "PLLM_MISC1_0,PLLM MISC1"
hexmask.long.tbyte 0x00 0.--23. 1. " PLLM_SETUP                       ,Setup fields"
line.long 0x04 "PLLM_MISC2_0,PLLM MISC2"
bitfld.long 0x04 16.--17. " PLLM_VREG14V_CTRL                ,PLLM voltage regulator control" "0,1,2,3"
bitfld.long 0x04 14.--15. "              PLLM_VREG10V_CTRL                 ,PLLM voltage regulator control" "0,1,2,3"
textline "                                          "
bitfld.long 0x04 13. " PLLM_OVERRIDE_SYNCMUX            ,Overrides synchronization MUX gltchless mechanism" "No override,Override"
bitfld.long 0x04 12. "    PLLM_VCO_SEL                      ,Select b/w pllma pllmb using synchronization MUX control" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 11. " PLLM_SYNC_MUX_CTRL               ,Controls clkoutp/n" "Disabled,Enabled"
bitfld.long 0x04 10. "       PLLM_ENABLE_SW_OVERRIDE           ,Software override values on clamp/bypass vs hardware FSM control" "Hardware,Software"
textline "                                          "
bitfld.long 0x04 9. " PLLM_PTS[1]                      ,Adding back a PTS field for external MUX (for PLLMB)" "Disabled,FO"
bitfld.long 0x04 8. "       PLLM_PTS[0]                       ,Adding back a PTS field for external MUX (for PLLM)" "Disabled,FO"
textline "                                          "
bitfld.long 0x04 5. " PLLM_IDDQ                        ,PLLM IDDQ" "0,1"
textline "                                          "
bitfld.long 0x04 4. " PLLM_EN_LCKDET                   ,PLLM enable lock detection" "Disabled,Enabled"
bitfld.long 0x04 3. "       PLLM_LOCK_OVERRIDE                ,Forces lock to 1" "Not locked,Locked"
textline "                                          "
bitfld.long 0x04 1.--2. " PLLM_KCP                         ,Charge pump gain control" "0,1,2,3"
bitfld.long 0x04 0. "              PLLM_KVCO                         ,VCO gain" "Disabled,Enabled"
line.long 0x08 "PLLMB_BASE_0,PLLMB Base"
bitfld.long 0x08 30. " PLLMB_ENABLE                     ,PLLMB will invert and connect to IDDQ" "Disabled,Enabled"
rbitfld.long 0x08 27. "       PLLMB_LOCK                        ,PLLMB lock" "Not locked,Locked"
textline "                                          "
rbitfld.long 0x08 26. " PLLMB_FREQ_LOCK                  ,PLLMB frequency lock" "Not locked,Locked"
bitfld.long 0x08 20.--24. "     PLLMB_DIVP                        ,PLL post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x08 8.--15. 1. " PLLMB_DIVN                       ,PLL feedback divider"
hexmask.long.byte 0x08 0.--7. 1. "             PLLMB_DIVM                        ,PLL input divider"
line.long 0x0C "PLLMB_MISC1_0,PLLMB MISC1"
bitfld.long 0x0C 26. " PLLMB_LOCK_OVERRIDE              ,Forces lock to 1" "Not locked,Locked"
bitfld.long 0x0C 25. "     PLLMB_IDDQ                        ,PLLMB IDDQ" "0,1"
textline "                                          "
bitfld.long 0x0C 24. " PLLMB_EN_LCKDET                  ,PLLMB enable lock detection" "Disabled,Enabled"
hexmask.long.tbyte 0x0C 0.--23. 1. "       PLLMB_SETUP                       ,Setup fields"
line.long 0x10 "PLLM_SS_CFG_0,PLLM SS Config"
bitfld.long 0x10 31. " PLLM_EN_SDM                      ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x10 30. "       PLLM_EN_SSC                       ,Spread spectrum enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 29. " PLLM_EN_DITHER2                  ,PLLM enable dither2" "Disabled,Enabled"
bitfld.long 0x10 28. "       PLLM_EN_DITHER                    ,PLLM enable dither" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 27. " PLLM_SDM_RESET                   ,PLLM SDM reset" "No reset,Reset"
rbitfld.long 0x10 23.--25. "       PLLM_SDM_TEST_OUT                 ,PLLM SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x14 "PLLM_SS_CTRL1_0,PLLM SS Control 1"
hexmask.long.word 0x14 16.--31. 1. " PLLM_SDM_SSC_MAX                 ,PLLM SDM SSC max"
hexmask.long.word 0x14 0.--15. 1. "           PLLM_SDM_SSC_MIN                  ,PLLM SDM SSC min"
line.long 0x18 "PLLM_SS_CTRL2_0,PLLM SS Control 2"
hexmask.long.word 0x18 16.--31. 1. " PLLM_SDM_SSC_STEP                ,PLLM SDM SSC step"
hexmask.long.word 0x18 0.--15. 1. "           PLLM_SDM_DIN                      ,PLLM SDM DIN"
line.long 0x1C "PLLM_SS_CFG_0,PLLM SS Config"
bitfld.long 0x1C 31. " PLLMB_EN_SDM                     ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x1C 30. "       PLLMB_EN_SSC                      ,Spread spectrum enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 29. " PLLMB_EN_DITHER2                 ,PLLMB enable dither2" "Disabled,Enabled"
bitfld.long 0x1C 28. "       PLLMB_EN_DITHER                   ,PLLMB enable dither" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 27. " PLLMB_SDM_RESET                  ,PLLMB SDM reset" "No reset,Reset"
line.long 0x20 "PLLMB_SS_CTRL1_0,PLLMB SS Control 1"
hexmask.long.word 0x20 16.--31. 1. " PLLMB_SDM_SSC_MAX                ,PLLMB SDM SSC max"
hexmask.long.word 0x20 0.--15. 1. "           PLLMB_SDM_SSC_MIN                 ,PLLMB SDM SSC min"
line.long 0x24 "PLLMB_SS_CTRL2_0,PLLMB SS Control 2"
hexmask.long.word 0x24 16.--31. 1. " PLLMB_SDM_SSC_STEP               ,PLLMB SDM SSC step"
hexmask.long.word 0x24 0.--15. 1. "           PLLMB_SDM_DIN                     ,PLLMB SDM DIN"
group.long 0x620000++0x03
line.long 0x00 "RST_DEV_ADSP_0_SET/CLR,RST DEV ADSP"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " SWR_ADSPNEON_RST                 ,Reset ADSP neon logic" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "       SWR_ADSPSCU_RST                   ,Reset ADSP SCU logic" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SWR_ADSPWDT_RST                  ,Reset ADSP WDT logic" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "       SWR_ADSPDBG_RST                   ,Reset ADSP DBG logic" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_ADSPPERIPH_RST               ,Reset ADSP periph logic" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "       SWR_ADSPINTF_RST                  ,Reset ADSP interface logic" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_ADSP_RST                     ,Reset ADSP CPU logic" "Disabled,Enabled"
group.long 0x621000++0x03
line.long 0x00 "CLK_OUT_ENB_ADSP_0_SET/CLR,CLK OUT Enable ADSP"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLK_ENB_ADSPNEON                 ,Enable ADSP neon clock" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "       CLK_ENB_ADSP                      ,Enable ADSP clock" "Disabled,Enabled"
group.long 0x7000C++0x1B
line.long 0x00 "PLLP_BASE_0,PLLP Base"
bitfld.long 0x00 31. " PLLP_BYPASS                      ,PLLP bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "   PLLP_ENABLE                       ,PLLP enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. " PLLP_REF_DIS                     ,PLLP reference clock disable" "No,Yes"
bitfld.long 0x00 28. "            PLLP_BASE_OVRRIDE                 ,PLLP base override" "No override,Override"
textline "                                          "
rbitfld.long 0x00 27. " PLLP_LOCK                        ,PLLP lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "     PLLP_DIVP                         ,Post divider (2^n)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x00 10.--17. 1. " PLLP_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "             PLLP_DIVM                         ,PLL input divider"
line.long 0x04 "PLLP_OUTA_0,PLLP OUTA"
hexmask.long.byte 0x04 8.--15. 1. " PLLP_OUT_RATIO                   ,PLLP_OUT divider from base PLLP"
bitfld.long 0x04 3. "             PLLP_OUT_DIV_BYP                  ,PLLP OUT divider bypass" "Not bypassed,Bypassed"
textline "                                          "
bitfld.long 0x04 1. " PLLP_OUT_CLKEN                   ,PLLP_OUT divider clock enable" "Disabled,Enabled"
bitfld.long 0x04 0. "       PLLP_OUT_RSTN                     ,PLLP_OUT divider reset" "No reset,Reset"
line.long 0x08 "PLLP_MISC_0,PLLP MISC"
bitfld.long 0x08 22.--23. " PLLP_PTS                         ,Base PLLP test output select" "Disabled,FO,VCO,PTO=0"
bitfld.long 0x08 18. "       PLLP_EN_LCKDET                    ,PLLP enable lock detection" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 17. " PLLP_LOCK_OVERRIDE               ,Lock override" "Not locked,Locked"
rbitfld.long 0x08 4. "     PLLP_FREQLOCK                     ,PLLP frequency lock" "Not lock,Locked"
textline "                                          "
bitfld.long 0x08 3. " PLLP_IDDQ                        ,PLLP IDDQ" "0,1"
bitfld.long 0x08 2. "              PLLP_KVCO                         ,Base PLLP VCO range setup control" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 0.--1. " PLLP_KCP                         ,PLLP KCP" "0,1,2,3"
line.long 0x0C "PLLP_RESHIFT_0,PLLP RESHIFT"
hexmask.long.byte 0x0C 2.--9. 1. " PLLP_OUT0_RATIO                  ,PLLP_OUT0 divider from Base PLLP"
bitfld.long 0x0C 1. "             PLLP_OUT0_CLKEN                   ,PLLP_OUT0 divider clock enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 0. " PLLP_OUT0_RSTN                   ,PLLP_OUT0 divider reset" "Reset,Not reset"
line.long 0x10 "PLLP_OUTC_0,PLLP OUTC"
hexmask.long.byte 0x10 24.--31. 1. " PLLP_OUT5_RATIO                  ,PLLP_OUT5 divider from Base PLLP"
bitfld.long 0x10 19. "             PLLP_OUT5_DIV_BYP                 ,PLLP OUT5 divider bypass" "Not bypassed,Bypassed"
textline "                                          "
bitfld.long 0x10 18. " PLLP_OUT5_OVRRIDE                ,PLLP OUT5 override" "Disabled,Enabled"
bitfld.long 0x10 17. "       PLLP_OUT5_CLKEN                   ,PLLP_OUT5 divider clock enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 16. " PLLP_OUT5_RSTN                   ,PLLP_OUT5 divider reset" "Reset,Not reset"
line.long 0x14 "PLLP_MISC1_0,PLLP MISC1"
hexmask.long.tbyte 0x14 0.--23. 1. " PLLP_SETUP                       ,PLLP base setup bits"
line.long 0x18 "PLLP_MISC2_0,PLLP MISC2"
bitfld.long 0x18 13.--14. " PLLP_VREG14V_CTRL                ,PLLP voltage regulator control" "0,1,2,3"
bitfld.long 0x18 11.--12. "              PLLP_VREG10V_CTRL                 ,PLLP voltage regulator control" "0,1,2,3"
textline "                                          "
bitfld.long 0x18 10. " PLLP_BG_EN                       ,PLLP BANDGAP enable" "Disabled,Enabled"
group.long 0x80000++0x1B
line.long 0x00 "PLLA_BASE_0,PLLA Base"
bitfld.long 0x00 31. " PLLA_BYPASS                      ,PLLA bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "   PLLA_ENABLE                       ,PLLA enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. " PLLA_REF_DIS                     ,PLLA reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "            PLLA_LOCK                         ,PLLA lock" "Not locked,Locked"
textline "                                          "
rbitfld.long 0x00 26. " PLLA_FREQLOCK                    ,PLLA frequency lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "     PLLA_DIVP                         ,PLL post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x00 8.--15. 1. " PLLA_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "             PLLA_DIVM                         ,PLL input divider"
line.long 0x04 "PLLA_OUT_0,PLLA OUT"
bitfld.long 0x04 30. " PLLA_OUT0_DIV_BYP                ,PLLA OUT0 divider bypass" "Not bypassed,Bypassed"
hexmask.long.byte 0x04 8.--15. 1. "   PLLA_OUT0_RATIO                   ,PLLA_OUT0 divider from base PLLA"
textline "                                          "
bitfld.long 0x04 1. " PLLA_OUT0_CLKEN                  ,PLLA_OUT0 divider clock enable" "Disabled,Enabled"
bitfld.long 0x04 0. "       PLLA_OUT0_RSTN                    ,PLLA_OUT0 divider reset" "Reset,Not reset"
line.long 0x08 "PLLA_MISC_0_0,PLLA MISC 0"
bitfld.long 0x08 30. " PLLA_RESET                       ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x08 4.--19. 1. "       PLLA_EXT_FRU                      ,PLLA EXT FRU"
textline "                                          "
bitfld.long 0x08 3. " PLLA_PTS                         ,Base PLLA test output select" "Disabled,FO"
bitfld.long 0x08 0.--1. "       PLLA_LOOP_CTRL                    ,PLLA loop control" "0,1,2,3"
line.long 0x0C "PLLA_MISC_1_0,PLLA MISC 1"
bitfld.long 0x0C 27. " PLLA_IDDQ                        ,PLLA IDDQ" "Off,On"
bitfld.long 0x0C 16.--19. "            PLLA_EXT_SUBINT                   ,PLLA EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.long.word 0x0C 0.--15. 1. " PLLA_DIVN_FRAC                   ,PLLA DIVN FRAC"
line.long 0x10 "PLLA_MISC_2_0,PLLA MISC 2"
hexmask.long.byte 0x10 24.--31. 1. " PLLA_PLL_LD_MEM                  ,PLLA PLL LD MEM"
hexmask.long.byte 0x10 16.--23. 1. "             PLLA_PLL_FRUG                     ,PLLA PLL FRUG"
textline "                                          "
hexmask.long.byte 0x10 8.--15. 1. " PLLA_FLL_LD_MEM                  ,PLLA FLL LD MEM"
bitfld.long 0x10 4. "             PLLA_FLL_DIV                      ,PLLA FLL divider" "0,1"
textline "                                          "
bitfld.long 0x10 0.--2. " PLLA_FLL_FRUG                    ,PLLA FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x14 "PLLA_MISC_3_0,PLLA MISC 3"
bitfld.long 0x14 24.--25. " PLLA_VREG10V_CTRL                ,PLLA VREG10V control" "0,1,2,3"
hexmask.long.word 0x14 8.--23. 1. "              PLLA_SETUP                        ,PLLA setup"
textline "                                          "
bitfld.long 0x14 4.--5. " PLLA_LDIV                        ,PLLA LDIV" "0,1,2,3"
bitfld.long 0x14 0.--3. "              PLLA_PLL_LD_TOL                   ,PLLA PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PLLA_MISC_4_0,PLLA MISC 4"
bitfld.long 0x18 28. " PLLA_SEL_IREF                    ,PLLA select IREF" "Not selected,Selected"
bitfld.long 0x18 25.--27. "   PLLA_KP_LO                        ,PLLA KP low" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.long 0x18 22.--24. " PLLA_KP_HI                       ,PLLA KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 19.--21. "              PLLA_KP_STEP_TIMER                ,PLLA KP step timer" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.long 0x18 16.--18. " PLLA_FRAC_STEP_TIMER             ,PLLA FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x18 0.--15. 1. "              PLLA_FRAC_STEP                    ,PLLA FRAC step"
group.long 0xA000C++0x03
line.long 0x00 "PLLD_BASE_0,PLLD Base"
bitfld.long 0x00 31. " PLLD_BYPASS                      , PLLD bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "   PLLD_ENABLE                       ,PLLD enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. " PLLD_REF_DIS                     ,PLLD reference clock disable" "No,Yes"
rbitfld.long 0x00 28. "            PLLD_LOCK                         ,PLLD lock" "Not lock,Lock"
textline "                                          "
bitfld.long 0x00 27. " DSIA_CLK_SRC                     ,Only PLLD is the source as it is only MIPI PLL in T124" "PLL_D,PLL_D1"
bitfld.long 0x00 26. "         CSI_CLK_SRC                       ,CSI clock source" "Brick,PLL_D"
textline "                                          "
bitfld.long 0x00 21.--25. " PLLD_DIVPB                       ,CLKOUT2 - post divider (2^n)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 16.--20. "             PLLD_DIVPA                        ,CLKOUT1 - post divider (2^n)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.long.byte 0x00 8.--15. 1. " PLLD_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "             PLLD_DIVM                         ,PLL input divider"
group.long 0xA0014++0x1B
line.long 0x00 "PLLD_MISC_0,PLLD MISC"
bitfld.long 0x00 25.--26. " PLLD_PTS                         ,Base PLLD test output select" "PTO=0,FO,PTO=0,PTO=0"
bitfld.long 0x00 23.--24. "          PLLD_KCP                          ,Base PLLD charge pump setup control" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 22. " PLLD_KVCO                        , Base PLLD VCO range setup control" "0,1"
bitfld.long 0x00 20. "              PLLD_IDDQ                         ,PLLD IDDQ" "0,1"
textline "                                          "
rbitfld.long 0x00 19. " PLLD_FREQLOCK                    ,PLLD frequency lock" "0,1"
bitfld.long 0x00 18. "              PLLD_EN_LCKDET                    ,PLLD enable lock detection" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 17. " PLLD_LOCK_OVERRIDE               ,Lock select" "Not locked,Locked"
bitfld.long 0x00 1. "     PLLD_SEL_DIVBY2B                  ,Divided by 2 for CLKOUT2" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " PLLD_SEL_DIVBY2A                 ,Divided by 2 for CLKOUT2" "Disabled,Enabled"
line.long 0x04 "PLLD_MISC1_0,PLLD MISC1"
hexmask.long.tbyte 0x04 0.--23. 1. " PLLD_SETUP                       ,PLLD setup"
line.long 0x08 "PLLD_MISC2_0,PLLD MISC2"
bitfld.long 0x08 13.--14. " PLLD_VREG14V_CTRL                ,PLLD voltage regulator control" "0,1,2,3"
bitfld.long 0x08 11.--12. "              PLLD_VREG10V_CTRL                 ,PLLD voltage regulator control" "0,1,2,3"
textline "                                          "
bitfld.long 0x08 10. " PLLD_BG_EN                       ,PLLD BANDGAP enable" "Disabled,Enabled"
line.long 0x0C "PLLD_SS_CFG_0,PLLD SS Config"
bitfld.long 0x0C 31. " PLLD_EN_SDM                      ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x0C 30. "       PLLD_EN_SSC                       ,Spread spectrum enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 29. " PLLD_EN_DITHER2                  ,PLLD enable dither2" "Disabled,Enabled"
bitfld.long 0x0C 28. "       PLLD_EN_DITHER                    ,PLLD enable dither" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 27. " PLLD_SDM_RESET                   ,PLLD SDM reset" "No reset,Reset"
rbitfld.long 0x0C 23.--25. "       PLLD_SDM_TEST_OUT                 ,PLLD SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLD_SS_CTRL1_0,PLLD SS Control 1"
hexmask.long.word 0x10 16.--31. 1. " PLLD_SDM_SSC_MAX                 ,PLLD SDM SSC maximum"
hexmask.long.word 0x10 0.--15. 1. "           PLLD_SDM_SSC_MIN                  ,PLLD SDM SSC minimum"
line.long 0x14 "PLLD_SS_CTRL2_0,PLLD SS Control 2"
hexmask.long.word 0x14 16.--31. 1. " PLLD_SDM_SSC_STEP                ,PLLD SDM SSC step"
hexmask.long.word 0x14 0.--15. 1. "           PLLD_SDM_DIN                      ,PLLD SDM DIN"
group.long 0xC2000++0x07
line.long 0x00 "CLK_SOURCE_I2S2_0,Clock Source I2S2"
bitfld.long 0x00 29.--31. " I2S2_CLK_SRC                     ,I2S2 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
bitfld.long 0x00 28. "     I2S2_MASTER_CLKEN                 ,Use clock enable I2S2 to control clock enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " I2S2_CLK_DIVISOR                 ,I2S2 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S2_0,Audio Synchronization Clock I2S2"
bitfld.long 0x04 4. " SYNC_CLK_DIS                     ,Synchronization clock disable" "No,Yes"
bitfld.long 0x04 0.--3. "            SYNC_CLK_RATE                     ,Synchronization lock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0xD2000++0x07
line.long 0x00 "CLK_SOURCE_I2S3_0,Clock Source I2S3"
bitfld.long 0x00 29.--31. " I2S3_CLK_SRC                     ,I2S3 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
bitfld.long 0x00 28. "     I2S3_MASTER_CLKEN                 ,Use clock enable I2S3 to control clock enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " I2S3_CLK_DIVISOR                 ,I2S3 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S3_0,Audio Synchronization Clock I2S3"
bitfld.long 0x04 4. " SYNC_CLK_DIS                     ,Synchronization clock disable" "No,Yes"
bitfld.long 0x04 0.--3. "            SYNC_CLK_RATE                     ,Synchronization lock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0xE2000++0x07
line.long 0x00 "CLK_SOURCE_SPDIF_OUT_0,Clock Source SPDIF Out"
bitfld.long 0x00 29.--31. " SPDIF_OUT_CLK_SRC                ,SPDIF out clock source" "PLLA_OUT0,,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "      SPDIF_OUT_CLK_DIVISOR             ,SPDIF out clock divisor"
line.long 0x04 "CLK_SOURCE_SPDIF_IN_0,Clock Source SPDIF In"
bitfld.long 0x04 29.--31. " SPDIF_IN_CLK_SRC                 ,SPDIF in clock source" "PLLP_OUT0,,,,,,CLK_M,?..."
hexmask.long.byte 0x04 0.--7. 1. "      SPDIF_IN_CLK_DIVISOR              ,SPDIF in clock divisor"
group.long 0xE3000++0x03
line.long 0x00 "CLK_SPARE_SPDIF_0,Clock Spare SPDIF"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_SPDIF              ,Clock spare register SPDIF"
group.long 0x113000++0x03
line.long 0x00 "CLK_SOURCE_SPI3_0,Clock Source SPI3"
bitfld.long 0x00 29.--31. " SPI3_CLK_SRC                     ,SPI3 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      SPI3_CLK_DIVISOR                  ,SPI3 clock divisor"
group.long 0x123000++0x03
line.long 0x00 "CLK_SOURCE_I2C1_0,Clock Source I2C1"
bitfld.long 0x00 29.--31. " I2C1_CLK_SRC                     ,I2C1 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      I2C1_CLK_DIVISOR                  ,I2C1 clock divisor"
group.long 0x133000++0x03
line.long 0x00 "CLK_SOURCE_I2C5_0,Clock Source I2C5"
bitfld.long 0x00 29.--31. " I2C5_CLK_SRC                     ,I2C5 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      I2C5_CLK_DIVISOR                  ,I2C5 clock divisor"
group.long 0x143000++0x03
line.long 0x00 "CLK_SOURCE_SPI1_0,Clock Source SPI1"
bitfld.long 0x00 29.--31. " SPI1_CLK_SRC                     ,SPI1 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      SPI1_CLK_DIVISOR                  ,SPI1 clock divisor"
group.long 0x173000++0x07
line.long 0x00 "CLK_SOURCE_ISP_0,Clock Source ISP"
bitfld.long 0x00 29.--31. " ISP_CLK_SRC                      ,ISP clock source" ",PLLC_OUT0,PLLP_OUT0,DFLL_ISP,,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "      ISP_CLK_DIVISOR                   ,ISP clock divisor"
line.long 0x04 "ISP_SUPER_CLK_DIVIDER_0,ISP Super Clock Divider"
bitfld.long 0x04 31. " SUPER_ISP_DIV_ENB                ,Super ISP divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "       SUPER_ISP_DIV_DIVIDEND            ,Super ISP divider dividend"
textline "                                          "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_ISP_DIV_DIVISOR            ,Super ISP divider divisor"
group.long 0x174000++0x03
line.long 0x00 "CLK_SPARE_ISP_0,Clock Spare ISP"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_ISP                ,Clock spare register ISP"
group.long 0x183000++0x03
line.long 0x00 "CLK_SOURCE_VI_0,Clock Source VI"
bitfld.long 0x00 29.--31. " VI_CLK_SRC                       ,VI clock source" "PLLP_OUT0,,PLLC_OUT0,,,DFLL_VI,CLK_S,CLK_M"
bitfld.long 0x00 25. "      PD2VI_CLK_SEL                     ,PD2VI clock select" "PD2VI_CLK,VI_SENSOR_CLK"
textline "                                          "
bitfld.long 0x00 24. " VI_CLK_SEL                       ,VI clock select" "Internal,External"
hexmask.long.byte 0x00 0.--7. 1. "       VI_CLK_DIVISOR                    ,VI clock divisor"
group.long 0x183008++0x03
line.long 0x00 "VI_SUPER_CLK_DIVIDER_0,VI Super Clock Divider"
bitfld.long 0x00 31. " SUPER_VI_DIV_ENB                 ,Super VI divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "       SUPER_VI_DIV_DIVIDEND             ,Super VI divider dividend"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_VI_DIV_DIVISOR             ,Super VI divider divisor"
group.long 0x193000++0x03
line.long 0x00 "CLK_SOURCE_SDMMC1_0,Clock Source SDMMC1"
bitfld.long 0x00 29.--31. " SDMMC1_CLK_SRC                   ,SDMMC1 clock source" "PLLP_OUT0,PLLC4_MUXED,,,CLK_M,,CLK_S,?..."
hexmask.long.byte 0x00 0.--7. 1. "    SDMMC1_CLK_DIVISOR                ,SDMMC1 clock divisor"
group.long 0x1A3000++0x03
line.long 0x00 "CLK_SOURCE_SDMMC2_0,Clock Source SDMMC2"
bitfld.long 0x00 29.--31. " SDMMC2_CLK_SRC                   ,SDMMC2 clock source" "PLLP_OUT0,,,,CLK_M,,CLK_S,?..."
hexmask.long.byte 0x00 0.--7. 1. "      SDMMC2_CLK_DIVISOR                ,SDMMC1 clock divisor"
group.long 0x1B3000++0x03
line.long 0x00 "CLK_SOURCE_SDMMC4_0,Clock Source SDMMC4"
bitfld.long 0x00 29.--31. " SDMMC4_CLK_SRC                   ,SDMMC4 clock source" "PLLP_OUT0,PLLC4_OUT2_LJ,PLLC4_OUT0_LJ,PLLC4_OUT2,PLLC4_OUT1,PLLC4_OUT1_LJ,CLK_M,PLLC4_VCO"
bitfld.long 0x00 26. "  SDMMC4_INVERT_DCD                 ,SDMMC4 invert DCD" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " SDMMC4_CLK_DIVISOR               ,SDMMC4 clock divisor"
textline "                                          "
group.long 0x1B3004++0x03
line.long 0x00 "SDMMC4_PLLC4_OUT0_SHAPER_CTRL_0,SDMMC4 PLLC4 OUT0 Shaper Control"
bitfld.long 0x00 31. " ENABLE_SDMMC4_PLLC4_OUT0_SHAPER          ,Enable PLLC4 OUT0 shaper" "Disabled,Enabled"
bitfld.long 0x00 11. "       SDMMC4_PLLC4_OUT0_SHAPER_N0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 10. " SDMMC4_PLLC4_OUT0_SHAPER_N1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 9. "              SDMMC4_PLLC4_OUT0_SHAPER_P0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 8. " SDMMC4_PLLC4_OUT0_SHAPER_P1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 7. "              SDMMC4_PLLC4_OUT0_SHAPER_CTRL_TRIM_SELECT ,Controls programmable register SDMMC4_PLLC4_OUT0_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                          "
bitfld.long 0x00 6. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_SW_BYPASS  ,Shaper control software bypass" "Active,Bypassed"
bitfld.long 0x00 5. "       SDMMC4_PLLC4_OUT0_SHAPER_CTRL_DF          ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 3.--4. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_FALL_DELAY ,Shaper control fall delay" "0,1,2,3"
bitfld.long 0x00 2. "              SDMMC4_PLLC4_OUT0_SHAPER_CTRL_DR          ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0.--1. " SDMMC4_PLLC4_OUT0_SHAPER_CTRL_RISE_DELAY ,Shaper control rise delay" "0,1,2,3"
group.long 0x1B3008++0x03
line.long 0x00 "SDMMC4_PLLC4_OUT1_SHAPER_CTRL_0,SDMMC4 PLLC4 OUT1 Shaper Control"
bitfld.long 0x00 31. " ENABLE_SDMMC4_PLLC4_OUT1_SHAPER          ,Enable PLLC4 OUT1 shaper" "Disabled,Enabled"
bitfld.long 0x00 11. "       SDMMC4_PLLC4_OUT1_SHAPER_N0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 10. " SDMMC4_PLLC4_OUT1_SHAPER_N1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 9. "              SDMMC4_PLLC4_OUT1_SHAPER_P0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 8. " SDMMC4_PLLC4_OUT1_SHAPER_P1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 7. "              SDMMC4_PLLC4_OUT1_SHAPER_CTRL_TRIM_SELECT ,Controls programmable register SDMMC4_PLLC4_OUT1_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                          "
bitfld.long 0x00 6. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_SW_BYPASS  ,Shaper control software bypass" "Active,Bypassed"
bitfld.long 0x00 5. "       SDMMC4_PLLC4_OUT1_SHAPER_CTRL_DF          ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 3.--4. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_FALL_DELAY ,Shaper control fall delay" "0,1,2,3"
bitfld.long 0x00 2. "              SDMMC4_PLLC4_OUT1_SHAPER_CTRL_DR          ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0.--1. " SDMMC4_PLLC4_OUT1_SHAPER_CTRL_RISE_DELAY ,Shaper control rise delay" "0,1,2,3"
group.long 0x1B300C++0x03
line.long 0x00 "SDMMC4_PLLC4_OUT2_SHAPER_CTRL_0,SDMMC4 PLLC4 OUT2 Shaper Control"
bitfld.long 0x00 31. " ENABLE_SDMMC4_PLLC4_OUT2_SHAPER          ,Enable PLLC4 OUT2 shaper" "Disabled,Enabled"
bitfld.long 0x00 11. "       SDMMC4_PLLC4_OUT2_SHAPER_N0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 10. " SDMMC4_PLLC4_OUT2_SHAPER_N1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 9. "              SDMMC4_PLLC4_OUT2_SHAPER_P0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 8. " SDMMC4_PLLC4_OUT2_SHAPER_P1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 7. "              SDMMC4_PLLC4_OUT2_SHAPER_CTRL_TRIM_SELECT ,Controls programmable register SDMMC4_PLLC4_OUT2_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                          "
bitfld.long 0x00 6. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_SW_BYPASS  ,Shaper control software bypass" "Active,Bypassed"
bitfld.long 0x00 5. "       SDMMC4_PLLC4_OUT2_SHAPER_CTRL_DF          ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 3.--4. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_FALL_DELAY ,Shaper control fall delay" "0,1,2,3"
bitfld.long 0x00 2. "              SDMMC4_PLLC4_OUT2_SHAPER_CTRL_DR          ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0.--1. " SDMMC4_PLLC4_OUT2_SHAPER_CTRL_RISE_DELAY ,Shaper control rise delay" "0,1,2,3"
group.long 0x1B3010++0x03
line.long 0x00 "SDMMC4_DIV_CLK_SHAPER_CTRL_0,SDMMC4 DIV CLK Shaper Control"
bitfld.long 0x00 31. " ENABLE_SDMMC4_DIV_CLK_SHAPER             ,Enable DIV CLK shaper" "Disabled,Enabled"
bitfld.long 0x00 11. "       SDMMC4_DIV_CLK_SHAPER_N0                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 10. " SDMMC4_DIV_CLK_SHAPER_N1                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 9. "              SDMMC4_DIV_CLK_SHAPER_P0                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 8. " SDMMC4_DIV_CLK_SHAPER_P1                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 7. "              SDMMC4_DIV_CLK_SHAPER_CTRL_TRIM_SELECT    ,Controls programmable register SDMMC4_DIV_CLK_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                          "
bitfld.long 0x00 6. " SDMMC4_DIV_CLK_SHAPER_CTRL_SW_BYPASS     ,Shaper control software bypass" "Active,Bypassed"
bitfld.long 0x00 5. "       SDMMC4_DIV_CLK_SHAPER_CTRL_DF             ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 3.--4. " SDMMC4_DIV_CLK_SHAPER_CTRL_FALL_DELAY    ,Shaper control fall delay" "0,1,2,3"
bitfld.long 0x00 2. "              SDMMC4_$2_SHAPER_CTRL_DR                  ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0.--1. " SDMMC4_DIV_CLK_SHAPER_CTRL_RISE_DELAY    ,Shaper control rise delay" "0,1,2,3"
textline "                                          "
group.long 0x1C3000++0x03
line.long 0x00 "CLK_SOURCE_UARTA_0,Clock Source UARTA"
bitfld.long 0x00 29.--31. " UARTA_CLK_SRC                    ,UARTA clock source" "PLLP_OUT0,PLLC4_MUXED,,,,,CLK_S,CLK_M"
bitfld.long 0x00 24. "    UARTA_DIV_ENB                     ,UARTA divider" "UART DLM/DLL,UARTA_CLK_DIVISOR"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. " UARTA_CLK_DIVISOR                ,UARTA clock divisor"
group.long 0x1D3000++0x03
line.long 0x00 "CLK_SOURCE_UARTB_0,Clock Source UARTB"
bitfld.long 0x00 29.--31. " UARTB_CLK_SRC                    ,UARTB clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
bitfld.long 0x00 24. "      UARTB_DIV_ENB                     ,UARTB divider enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. " UARTB_CLK_DIVISOR                ,UARTB clock divisor"
group.long 0x1E3000++0x03
line.long 0x00 "CLK_SOURCE_HOST1X_0,Clock Source HOST1X 0"
bitfld.long 0x00 29.--31. " HOST1X_CLK_SRC                   ,HOST1X clock source" "PLLP_OUT0,PLLREFE_OUT,PLLC2_OUT0,,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "    HOST1X_CLK_DIVISOR                ,HOST1X clock divisor"
group.long 0x200000++0x03
line.long 0x00 "RST_DEV_EMC_0_SET/CLR,RST DEV EMC"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_MEM_RST                      ,Reset MC" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "       SWR_EMC_RST                       ,Reset EMC controller" "Disabled,Enabled"
group.long 0x201000++0x03
line.long 0x00 "CLK_OUT_ENB_EMC_0_SET/CLR,CLK OUT Enable EMC"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. " CLK_ENB_MC_CFPA                  ,Enable clock - MC clients diasy chain 3b" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "       CLK_ENB_MC_CEPA                   ,Enable clock - MC clients diasy chain 2b" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLK_ENB_MC_CDPA                  ,Enable clock - MC clients diasy chain 4a" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "       CLK_ENB_MC_CCPA                   ,Enable clock - MC clients diasy chain 3a" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CLK_ENB_MC_CCPA                  ,Enable clock - MC Hub Side A" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "       CLK_ENB_MC1                       ,Enable clock to MC1" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CLK_ENB_EMC_IOBIST               ,Enable clock to EMC IOBIST" "Disabled,Enabled"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "       CLK_ENB_EMC_LATENCY               ,Enable clock to EMC latency" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CLK_ENB_MC_BBC                   ,Enable clock - MC bbc" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "       CLK_ENB_MC_CBPA                   ,Enable clock - MC diasy chain2" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_MC_CAPA                  ,Enable clock - MC diasy chain1" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "       CLK_ENB_EMC_DLL                   ,Enable clock - EMC DLL" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EMC                      ,Enable clock to MC/EMC controller" "Disabled,Enabled"
group.long 0x203000++0x0B
line.long 0x00 "CLK_SOURCE_EMC_0,Clock Source EMC"
bitfld.long 0x00 29.--31. " EMC_2X_CLK_SRC                   ,EMC 2X clock source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
bitfld.long 0x00 27. "     FORCE_CC_TRIGGER                  ,Force a trigger of clock change sequence even" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 26. " EMC_invert_DCD                   ,Inversion of duty-cycle distortion" "Disabled,Enabled"
bitfld.long 0x00 25. "       USE_32KHZ_AS_CLK_M                ,Use 32KHZ as CLK_M" "False,True"
textline "                                          "
bitfld.long 0x00 20. " PLLC_OUT_FOR_EMC_EN              ,PLLC branch for EMC CLK switches" "Disabled,Enabled"
bitfld.long 0x00 16. "       MC_EMC_SAME_FREQ                  ,MC is the same frequency of EMC" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 15. " EMC_CLK_DIV2_EN                  ,EMCCLK is the DIV2 frequency of DRAM clock" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "       EMC_2X_CLK_DIVISOR                ,EMC 2X clock divisor"
line.long 0x04 "CLK_SOURCE_EMC_LATENCY_0,Clock Source EMC Latency"
bitfld.long 0x04 29.--31. " EMC_LATENCY_CLK_SRC              ,EMC latency Clock source" ",,PLLP_OUT0,CLK_M,?..."
hexmask.long.byte 0x04 0.--7. 1. "      EMC_LATENCY_CLK_DIVISOR           ,EMC latency clock divisor"
line.long 0x08 "CLK_SOURCE_EMC_DLL_0,Clock Source EMC DLL"
bitfld.long 0x08 29.--31. " EMC_DLL_CLK_SRC                  ,EMC DLL clock source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
bitfld.long 0x08 10.--11. "     DDLL_CLK_SEL                      ,DLL selects one of the 4 inputs listed in ENUM" "PLLM_VCOB,EMC_DLL,SWITCH_OUT,?..."
textline "                                          "
hexmask.long.byte 0x08 0.--7. 1. " EMC_DLL_CLK_DIVISOR              ,EMC DLL clock divisor"
textline "                                          "
group.long 0x20300C++0x07
line.long 0x00 "EMC_DIV_CLK_SHAPER_CTRL_0,EMC DIV CLK Shaper Control"
bitfld.long 0x00 31. " ENABLE_EMC_DIV_CLK_SHAPER             ,Enable DIV CLK shaper" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 11. " EMC_DIV_CLK_SHAPER_N0                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 10. "              EMC_DIV_CLK_SHAPER_N1                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 9. " EMC_DIV_CLK_SHAPER_P0                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x00 8. "              EMC_DIV_CLK_SHAPER_P1                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x00 7. " EMC_DIV_CLK_SHAPER_CTRL_TRIM_SELECT   ,Controls programmable register EMC_DIV_CLK_SHAPER_CTRL[5:0]" "Default,Software"
bitfld.long 0x00 6. "       EMC_DIV_CLK_SHAPER_CTRL_SW_BYPASS      ,Shaper control software bypass" "Active,Bypassed"
textline "                                          "
bitfld.long 0x00 5. " EMC_DIV_CLK_SHAPER_CTRL_DF            ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
bitfld.long 0x00 3.--4. "       EMC_DIV_CLK_SHAPER_CTRL_FALL_DELAY     ,Shaper control fall delay" "0,1,2,3"
textline "                                          "
bitfld.long 0x00 2. " EMC_DIV_CLK_SHAPER_CTRL_DR            ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "       EMC_DIV_CLK_SHAPER_CTRL_RISE_DELAY     ,Shaper control rise delay" "0,1,2,3"
line.long 0x04 "EMC_PLLC_SHAPER_CTRL_0,EMC PLLC Shaper Control"
bitfld.long 0x04 31. " ENABLE_EMC_PLLC_SHAPER                ,Enable PLLC shaper" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 11. " EMC_PLLC_SHAPER_N0                    ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x04 10. "              EMC_PLLC_SHAPER_N1                     ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x04 9. " EMC_PLLC_SHAPER_P0                    ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x04 8. "              EMC_PLLC_SHAPER_P1                     ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                          "
bitfld.long 0x04 7. " EMC_PLLC_SHAPER_CTRL_TRIM_SELECT      ,Controls programmable register EMC_PLLC_SHAPER_CTRL[5:0]" "Default,Software"
bitfld.long 0x04 6. "       EMC_PLLC_SHAPER_CTRL_SW_BYPASS         ,Shaper control software bypass" "Active,Bypassed"
textline "                                          "
bitfld.long 0x04 5. " EMC_PLLC_SHAPER_CTRL_DF               ,Delay on CLKIN(fall) -> CLKOUT(fall)" "Disabled,Enabled"
bitfld.long 0x04 3.--4. "       EMC_PLLC_SHAPER_CTRL_FALL_DELAY        ,Shaper control fall delay" "0,1,2,3"
textline "                                          "
bitfld.long 0x04 2. " EMC_PLLC_SHAPER_CTRL_DR               ,Delay on CLKIN(rise) -> CLKOUT(rise)" "Disabled,Enabled"
bitfld.long 0x04 0.--1. "       EMC_PLLC_SHAPER_CTRL_RISE_DELAY        ,Shaper control rise delay" "0,1,2,3"
textline "                                          "
group.long 0x203014++0x03
line.long 0x00 "CLK_SOURCE_EMC_SAFE_0,Clock Source EMC Safe"
bitfld.long 0x00 29.--31. " EMC_2X_SAFE_CLK_SRC              ,EMC 2X safe clock source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
hexmask.long.byte 0x00 0.--7. 1. "     EMC_2X_SAFE_CLK_DIVISOR           ,EMC 2X safe clock divisor"
group.long 0x204000++0x03
line.long 0x00 "CLK_SPARE_EMC_0,Clock Spare EMC 0"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_EMC                ,Clock spare register EMC"
group.long 0x223000++0x03
line.long 0x00 "CLK_SOURCE_EXTPERIPH4_0,Clock Source EXTPERIPH4"
bitfld.long 0x00 29.--31. " EXTPERIPH4_CLK_SRC               ,EXTPERIPH4 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      EXTPERIPH4_CLK_DIVISOR            ,EXTPERIPH4 clock divisor"
group.long 0x233000++0x03
line.long 0x00 "CLK_SOURCE_SPI4_0,Clock Source SPI4"
bitfld.long 0x00 29.--31. " SPI4_CLK_SRC                     ,SPI4 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      SPI4_CLK_DIVISOR                  ,SPI4 clock divisor"
group.long 0x243000++0x03
line.long 0x00 "CLK_SOURCE_I2C3_0,Clock Source I2C3"
bitfld.long 0x00 29.--31. " I2C3_CLK_SRC                     ,I2C3 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "      I2C3_CLK_DIVISOR                  ,I2C3 clock divisor"
group.long 0x253000++0x03
line.long 0x00 "CLK_SOURCE_SDMMC3_0,Clock Source SDMMC3"
bitfld.long 0x00 29.--31. " SDMMC3_CLK_SRC                   ,SDMMC3 clock source" "PLLP_OUT0,PLLC4_MUXED,,,CLK_M,,CLK_S,?..."
hexmask.long.byte 0x00 0.--7. 1. "    SDMMC3_CLK_DIVISOR                ,SDMMC3 clock divisor"
group.long 0x263000++0x03
line.long 0x00 "CLK_SOURCE_UARTD_0,Clock Source UARTD"
bitfld.long 0x00 29.--31. " UARTD_CLK_SRC                    ,UARTD clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
bitfld.long 0x00 24. "      UARTD_DIV_ENB                     ,UARTD divider enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. " UARTD_CLK_DIVISOR                ,UARTD clock divisor"
group.long 0x283000++0x03
line.long 0x00 "CLK_SOURCE_CSITE_0,Clock Source CSITE"
bitfld.long 0x00 29.--31. " CSITE_CLK_SRC                    ,CSITE clock source" "PLLP_OUT0,,,,PLLREFE_OUT1,CLK_S,CLK_M,PLLC4_MUXED"
hexmask.long.byte 0x00 0.--7. 1. "   CSITE_CLK_DIVISOR                 ,CSITE clock divisor"
group.long 0x292000++0x07
line.long 0x00 "CLK_SOURCE_I2S1_0,Clock Source I2S1"
bitfld.long 0x00 29.--31. " I2S1_CLK_SRC                     ,I2S1 clock source" "PLLP_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
bitfld.long 0x00 28. "     I2S1_MASTER_CLKEN                 ,I2S1 master clock enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " I2S1_CLK_DIVISOR                 ,I2S1 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S1_0,Audio Synchronization Clock I2S1"
bitfld.long 0x04 4. " SYNC_CLK_DIS                     ,Synchronization clock disable" "No,Yes"
textline "                                          "
bitfld.long 0x04 0.--3. " SYNC_CLK_RATE                    ,Synchronization clock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x2A3000++0x03
line.long 0x00 "CLK_SOURCE_DTV_0,Clock Source DTV"
bitfld.long 0x00 25. " DTV_INV_CLK                      ,DTV invert clock" "Disabled,Enabled"
group.long 0x2B3000++0x07
line.long 0x00 "CLK_SOURCE_TSEC_0,Clock Source TSEC"
bitfld.long 0x00 29.--31. " TSEC_CLK_SRC                     ,TSEC clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_TSEC,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "     TSEC_CLK_DIVISOR                  ,TSEC clock divisor"
line.long 0x04 "TSEC_SUPER_CLK_DIVIDER_0,TSEC Super Clock Divider"
bitfld.long 0x04 31. " SUPER_TSEC_DIV_ENB               ,Super TSEC divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "       SUPER_TSEC_DIV_DIVIDEND           ,Super TSEC divider dividend"
textline "                                          "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_TSEC_DIV_DIVISOR           ,Super TSEC divider divisor"
group.long 0x2C3000++0x03
line.long 0x00 "CLK_SOURCE_LA_0,Clock Source LA"
bitfld.long 0x00 29.--31. " LA_CLK_SRC                       ,LA clock source" "PLLP_OUT0,,,,PLLREFE_OUT1,CLK_S,CLK_M,PLLC4_MUXED"
hexmask.long.byte 0x00 0.--7. 1. "   LA_CLK_DIVISOR                    ,LA clock divisor"
group.long 0x302000++0x07
line.long 0x00 "CLK_SOURCE_I2S4_0,Clock Source I2S4"
bitfld.long 0x00 29.--31. " I2S4_CLK_SRC                     ,I2S4 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
bitfld.long 0x00 28. "     I2S4_MASTER_CLKEN                 , Use clock enable I2S4 to control clock enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " I2S4_CLK_DIVISOR                 ,I2S4 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S4_0,Audio SYNC Clock I2S4"
bitfld.long 0x04 4. " SYNC_CLK_DIS                     ,Synchronization clock disable" "No,Yes"
textline "                                          "
bitfld.long 0x04 0.--3. " SYNC_CLK_RATE                    ,Synchronization clock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x312000++0x07
line.long 0x00 "CLK_SOURCE_I2S5_0,Clock Source I2S5"
bitfld.long 0x00 29.--31. " I2S5_CLK_SRC                     ,I2S5 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
bitfld.long 0x00 28. "     I2S5_MASTER_CLKEN                 ,Use clock enable I2S5 to control clock enable" "Disabled,Enabled"
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " I2S5_CLK_DIVISOR                 ,I2S5 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S5_0,Audio SYNC Clock I2S5"
bitfld.long 0x04 4. " SYNC_CLK_DIS                     ,Synchronization clock disable" "No,Yes"
textline "                                          "
bitfld.long 0x04 0.--3. " SYNC_CLK_RATE                    ,Synchronization clock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x323000++0x03
line.long 0x00 "CLK_SOURCE_I2C4_0,Clock Source I2C4"
bitfld.long 0x00 29.--31. " I2C4_CLK_SRC                     ,I2C4 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
group.long 0x332000++0x03
line.long 0x00 "CLK_SOURCE_AHUB_0,Clock Source AHUB"
bitfld.long 0x00 29.--31. " AHUB_CLK_SRC                     ,AHUB clock source" "PLLA_OUT0,PLLA1_OUT1,,,PLLP_OUT0,,CLK_M,CLK_SRC_ALT"
bitfld.long 0x00 28. "    AHUB_MASTER_CLKEN                 ,Use clock enable AHUB to control clock enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 20. " AHUB_CLK_SRC_DIS                 ,AHUB clock SRC disable" "No,Yes"
textline "                                          "
bitfld.long 0x00 16.--19. " AHUB_CLK_SRC_RATE                ,AHUB clock SRC rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
textline "                                          "
hexmask.long.byte 0x00 0.--7. 1. " AHUB_CLK_DIVISOR                 ,AHUB clock divisor"
group.long 0x343000++0x03
line.long 0x00 "CLK_SOURCE_HDA2CODEC_2X_0,Clock Source HDA2CODEC 2X"
bitfld.long 0x00 29.--31. " HDA2CODEC_2X_CLK_SRC             ,HDA2CODEC 2X clock source" ",PLLP_OUT0,PLLA_OUT0,CLK_S,,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "      HDA2CODEC_2X_CLK_DIVISOR          ,HDA2CODEC 2X clock divisor"
group.long 0x363000++0x03
line.long 0x00 "CLK_SOURCE_EXTPERIPH1_0,Clock Source EXTPERIPH1"
bitfld.long 0x00 29.--31. " EXTPERIPH1_CLK_SRC               ,EXTPERIPH1 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      EXTPERIPH1_CLK_DIVISOR            ,EXTPERIPH1 clock divisor"
group.long 0x373000++0x03
line.long 0x00 "CLK_SOURCE_EXTPERIPH2_0,Clock Source EXTPERIPH2"
bitfld.long 0x00 29.--31. " EXTPERIPH2_CLK_SRC               ,EXTPERIPH2 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      EXTPERIPH2_CLK_DIVISOR            ,EXTPERIPH2 clock divisor"
group.long 0x383000++0x03
line.long 0x00 "CLK_SOURCE_EXTPERIPH3_0,Clock Source EXTPERIPH3"
bitfld.long 0x00 29.--31. " EXTPERIPH3_CLK_SRC               ,EXTPERIPH3 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      EXTPERIPH3_CLK_DIVISOR            ,EXTPERIPH3 clock divisor"
group.long 0x392000++0x03
line.long 0x00 "CLK_SOURCE_I2C_SLOW_0,Clock Source I2C SLOW 0"
bitfld.long 0x00 29.--31. " I2C_SLOW_CLK_SRC                 ,I2C slow clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "      I2C_SLOW_CLK_DIVISOR              ,I2C slow clock divisor"
group.long 0x3A3000++0x03
line.long 0x00 "CLK_SOURCE_SOR1_0,Clock Source SOR1"
bitfld.long 0x00 29.--31. " SOR1_CLK_SRC                     ,SOR1 clock source" "PLLP_OUT0,,PLLD_OUT2,,,PLLD2_OUT0,CLK_M,PLLD3_OUT0"
textline "                                          "
bitfld.long 0x00 15. " SOR1_CLK_SEL1                    ,SOR1 clock select 1" "Safe,Output"
textline "                                          "
bitfld.long 0x00 14. " SOR1_CLK_SEL0                    ,SOR1 clock select 0" "Mux,Brick"
hexmask.long.byte 0x00 0.--7. 1. "          SOR1_CLK_DIVISOR                  ,SOR1 clock divisor"
group.long 0x3B3000++0x03
line.long 0x00 "CLK_SOURCE_SOR0_0,Clock Source SOR0"
bitfld.long 0x00 29.--31. " SOR0_CLK_SRC                     ,SOR0 clock source" "PLLP_OUT0,,PLLD_OUT2,,,PLLD2_OUT0,CLK_M,PLLD3_OUT0"
textline "                                          "
bitfld.long 0x00 15. " SOR0_CLK_SEL1                    ,SOR0 clock select 1" "Safe,Output"
textline "                                          "
bitfld.long 0x00 14. " SOR0_CLK_SEL0                    ,SOR0 clock select 0" "Mux,Brick"
hexmask.long.byte 0x00 0.--7. 1. "          SOR0_CLK_DIVISOR                  ,SOR0 clock divisor"
group.long 0x3C0000++0x03
line.long 0x00 "RST_DEV_SATA_0_SET/CLR,RST DEV SATA"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_SATACOLD_RST                 ,Reset SATACOLD" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "       SWR_SATA_RST                      ,Reset SATA" "Disabled,Enabled"
group.long 0x3C1000++0x03
line.long 0x00 "CLK_OUT_ENB_SATA_0_SET/CLR,CLK OUT Enable SATA"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLK_ENB_SATA_IOBIST              ,Enable clock to SATA IOBIST" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "       CLK_ENB_SATA_OOB                  ,Enable clock to SATA_OOB" "Disabled,Enabled"
textline "                                          "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_SATA                     ,Enable clock to SATA" "Disabled,Enabled"
textline "                                          "
width 36.
group.long 0x3C3000++0x07
line.long 0x00 "CLK_SOURCE_SATA_OOB_0,CLK Source SATA OOB"
bitfld.long 0x00 29.--31. " SATA_OOB_CLK_SRC                  ,SATA OOB clock source" "PLLP_OUT0,,,,,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "                 SATA_OOB_CLK_DIVISOR           ,SATA OOB clock divisor"
line.long 0x04 "CLK_SOURCE_SATA_0,Clock Source SATA"
bitfld.long 0x04 29.--31. " SATA_CLK_SRC                      ,SATA clock source" "PLLP_OUT0,,,,,,CLK_M,?..."
bitfld.long 0x04 24. "                 SATA_AUX_CLK_ENB               ,Enable SATA TX/RX clocks" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 0.--7. 1. "            SATA_CLK_DIVISOR                  ,SATA clock divisor"
group.long 0x3C4000++0x03
line.long 0x00 "CLK_SPARE_SATA_0,CLK Spare SATA"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_SATA                ,Clock spare register SATA"
group.long 0x3D3000++0x03
line.long 0x00 "CLK_SOURCE_HDA_0,Clock Source HDA"
bitfld.long 0x00 29.--31. " HDA_CLK_SRC                       ,HDA clock source" ",PLLP_OUT0,PLLA_OUT0,CLK_S,,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "                 HDA_CLK_DIVISOR                ,HDA clock divisor"
group.long 0x3E3000++0x07
line.long 0x00 "CLK_SOURCE_SE_0,Clock Source SE"
bitfld.long 0x00 29.--31. " SE_CLK_SRC                        ,SE clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_SE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "                SE_CLK_DIVISOR                 ,SE clock divisor"
line.long 0x04 "SE_SUPER_CLK_DIVIDER_0,SE Super Clock Divider"
bitfld.long 0x04 31. " SUPER_SE_DIV_ENB                  ,Super SE divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "                  SUPER_SE_DIV_DIVIDEND          ,Super SE divider dividend"
textline "                                  "
hexmask.long.byte 0x04 0.--7. 1. "            SUPER_SE_DIV_DIVISOR              ,Super SE divider divisor"
group.long 0x3F0000++0x17
line.long 0x00 "UTMIP_PLL_CFG0_0,UTMIP PLL Config 0"
bitfld.long 0x00 31. " UTMIP_PLL_BG_EN                   ,UTMIP PLL BG enable" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "                  UTMIP_PLL_VREG14V_CTRL         ,Voltage regulator voltage level control" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 27.--28. "            UTMIP_PLL_VREG10V_CTRL            ,Voltage regulator voltage level control" "0,1,2,3"
bitfld.long 0x00 25.--26. "                         UTMIP_PLL_KCP                  ,Charge pump gain control" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 24. "            UTMIP_PLL_KVCO                    , VCO gain" "0,1"
hexmask.long.byte 0x00 16.--23. 1. "                         UTMIP_PLL_NDIV                 ,Feedback divider on the VCO feedback"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "            UTMIP_PLL_MDIV                    ,Pre-divide on the PLL"
bitfld.long 0x00 2. "                        UTMIP_PLL_LOCK_OVR             ,Controls of the UTMIP PLL" "Not lock,Lock"
textline "                                  "
bitfld.long 0x00 0. "            UTMIP_PLL_EN_LCKDET               ,Power downs the lock detect" "Disabled,Enabled"
line.long 0x04 "UTMIP_PLL_CFG1_0,UTMIP PLL Config 1"
bitfld.long 0x04 27.--31. " UTMIP_PLLU_ENABLE_DLY_COUNT       ,Controls the wait time to enable PLL_U when coming out of suspend or reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 17. "                        UTMIP_FORCE_PLLU_POWERUP       ,Force PLL U into power up" "Not forced,Forced"
textline "                                  "
bitfld.long 0x04 16. "            UTMIP_FORCE_PLLU_POWERDOWN        ,Force PLL U into power down" "Not forced,Forced"
bitfld.long 0x04 15. "                UTMIP_FORCE_PLL_ENABLE_POWERUP ,Force UTMIP PLL pll enable input on" "Not forced,Forced"
textline "                                  "
bitfld.long 0x04 14. "            UTMIP_FORCE_PLL_ENABLE_POWERDOWN  ,Force UTMIP PLL pll enable input off" "Not forced,Forced"
bitfld.long 0x04 13. "                UTMIP_FORCE_PLL_ACTIVE_POWERUP ,Force UTMIP PLL pll active input on (overrides)" "Not forced,Forced"
textline "                                  "
bitfld.long 0x04 12. "            UTMIP_FORCE_PLL_ACTIVE_POWERDOWN  ,Force UTMIP PLL pll active input off" "Not forced,Forced"
hexmask.long.word 0x04 0.--11. 1. "                UTMIP_XTAL_FREQ_COUNT          ,Determines the time to wait until the output of UTMIP PLL is considered stable"
line.long 0x08 "UTMIP_PLL_CFG2_0,UTMIP PLL Config 2"
bitfld.long 0x08 30. " UTMIP_PHY_XTAL_CLOCKEN            ,Selects whether to enable the crystal clock in the module" "Disabled,Enabled"
bitfld.long 0x08 25. "                  UTMIP_FORCE_PD_SAMP_D_POWERUP  ,Force UTMIP PLL PD SAMP D input into power up" "Not forced,Forced"
textline "                                  "
bitfld.long 0x08 24. "            UTMIP_FORCE_PD_SAMP_D_POWERDOWN   ,Force UTMIP PLL PD SAMP D input into power down" "Not forced,Forced"
bitfld.long 0x08 18.--23. "                UTMIP_PLL_ACTIVE_DLY_COUNT     ,UTMIP PLL active delay count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.word 0x08 6.--17. 1. "            UTMIP_PLLU_STABLE_COUNT           ,UTMIP PLLU stable count"
bitfld.long 0x08 5. "                      UTMIP_FORCE_PD_SAMP_C_POWERUP  ,Force UTMIP PLL PD SAMP C input into power up" "Not forced,Forced"
textline "                                  "
bitfld.long 0x08 4. "            UTMIP_FORCE_PD_SAMP_C_POWERDOWN   ,Force UTMIP PLL PD SAMP C input into power down" "Not forced,Forced"
bitfld.long 0x08 3. "                UTMIP_FORCE_PD_SAMP_B_POWERUP  ,Force UTMIP PLL PD SAMP B input into power up" "Not forced,Forced"
textline "                                  "
bitfld.long 0x08 2. "            UTMIP_FORCE_PD_SAMP_B_POWERDOWN   ,Force UTMIP PLL PD_SAMP B input into power down" "Not forced,Forced"
bitfld.long 0x08 1. "                UTMIP_FORCE_PD_SAMP_A_POWERUP  ,Force UTMIP PLL PD SAMP A input into power up" "Not forced,Forced"
textline "                                  "
bitfld.long 0x08 0. "            UTMIP_FORCE_PD_SAMP_A_POWERDOWN   ,Force UTMIP PLL PD SAMP A input into power down" "Not forced,Forced"
line.long 0x0C "UTMIP_PLL_CFG3_0,UTMIP PLL Config 3"
bitfld.long 0x0C 25. " UTMIP_PLL_REF_DIS                 ,UTMIP PLL reference clock disable" "No,Yes"
bitfld.long 0x0C 24. "                       UTMIP_PLL_PTS                  ,Base UTMIP_PLL test output select" "Not selected,Selected"
textline "                                  "
bitfld.long 0x0C 21.--23. "            UTMIP_PLL_SETUP[23:21]            ,Phase selection on CLKOUTMUX60" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 11.--20. 1. "                         [20:11]                        ,TBD"
textline "                                  "
bitfld.long 0x0C 10. "                              [10]            ,Corevdd detection override" "0,1"
bitfld.long 0x0C 9. "                             [9]                        ,Forces loop filter to VDDA/2" "0,1"
textline "                                  "
bitfld.long 0x0C 7.--8. "                             [8:7]            ,Current source control" "0,1,2,3"
hexmask.long.byte 0x0C 0.--6. 1. "                           [6:0]                        ,Lock detect controls"
if (((per.l(ad:0x05000000+0x3F0010)&0x01)==0x01))
group.long 0x3F0010++0x03
line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL HW PWRDN Config 0"
rbitfld.long 0x00 31. " UTMIPLL_LOCK                      ,UTMIPLL lock" "Not locked,Locked"
rbitfld.long 0x00 26.--27. "                UTMIPLL_SEQ_STATE              ,UTMIPLL power sequencer state" "Off,On,Busy,?..."
textline "                                  "
bitfld.long 0x00 25. "            UTMIPLL_SEQ_START_STATE           ,UTMIPLL power sequencer start state" "Off,On"
bitfld.long 0x00 24. "                       UTMIPLL_SEQ_ENABLE             ,UTMIPLL power sequencer enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. "            UTMIPLL_IDDQ_PD_INCLUDE           ,Power downs put the PLL in IDDQ as well to save more power" "Disabled,Enabled"
bitfld.long 0x00 6. "                  UTMIPLL_USE_LOCKDET            ,UTMIPLL use lock detection" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 5. "            UTMIPLL_SEQ_RESET_INPUT_VALUE     ,UTMIPLL sequence reset input value" "On,Off"
bitfld.long 0x00 4. "                       UTMIPLL_SEQ_IN_SWCTL           ,UTMIPLL sequence input" "Hardware,Software"
textline "                                  "
bitfld.long 0x00 3. "            UTMIPLL_CLK_ENABLE_OVERRIDE_VALUE ,UTMIPLL clock override value" "Disabled,Enabled"
bitfld.long 0x00 2. "                  UTMIPLL_CLK_ENABLE_SWCTL       ,UTMIP clocks enable hardware/software" "Hardware,Software"
textline "                                  "
bitfld.long 0x00 1. "            UTMIPLL_IDDQ_OVERRIDE_VALUE       ,PLL in IDDQ mode" "Disabled,Enabled"
bitfld.long 0x00 0. "                  UTMIPLL_IDDQ_SWCTL             ,UTMIPLL IDDQ" "Hardware,Software"
else
group.long 0x3F0010++0x03
line.long 0x00 "UTMIPLL_HW_PWRDN_CFG0_0,UTMIPLL HW PWRDN Config 0"
rbitfld.long 0x00 31. " UTMIPLL_LOCK                      ,UTMIPLL lock" "Not locked,Locked"
rbitfld.long 0x00 26.--27. "                UTMIPLL_SEQ_STATE              ,UTMIPLL power sequencer state" "Off,On,Busy,?..."
textline "                                  "
bitfld.long 0x00 25. "            UTMIPLL_SEQ_START_STATE           ,UTMIPLL power sequencer start state" "Off,On"
bitfld.long 0x00 24. "                       UTMIPLL_SEQ_ENABLE             ,UTMIPLL power sequencer enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. "            UTMIPLL_IDDQ_PD_INCLUDE           ,Power downs put the PLL in IDDQ as well to save more power" "Disabled,Enabled"
bitfld.long 0x00 6. "                  UTMIPLL_USE_LOCKDET            ,UTMIPLL use lock detection" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 5. "            UTMIPLL_SEQ_RESET_INPUT_VALUE     ,UTMIPLL sequence reset input value" "On,Off"
bitfld.long 0x00 4. "                       UTMIPLL_SEQ_IN_SWCTL           ,UTMIPLL sequence input" "Hardware,Software"
textline "                                  "
bitfld.long 0x00 2. "                                                                        UTMIPLL_CLK_ENABLE_SWCTL       ,UTMIP clocks enable hardware/software" "Hardware,Software"
textline "                                  "
bitfld.long 0x00 0. "                                                                        UTMIPLL_IDDQ_SWCTL             ,UTMIPLL IDDQ" "Hardware,Software"
endif
group.long 0x3F0014++0x03
line.long 0x00 "XUSB_PLL_CFG0_0,XUSB PLL Config 0"
hexmask.long.byte 0x00 24.--31. 1. " UTMIPLL_CLK_SWITCH_DLY            ,Delay from SS Clock source change to the actual frequency change to 32KHz clock"
textline "                                  "
bitfld.long 0x00 20. "            UTMIPLL_CLK_SWITCH_SWCTL          ,Controls SS/FS clock frequency " "Hardware,Software"
textline "                                  "
bitfld.long 0x00 17. "            UTMIPLL_USE_SWITCH_DETECT         ,Use hardware switch detect" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "                  UTMIPLL_IDDQ2_ENABLE_DLY       ,Delay from UTMIPLL IDDQ deassertion to the UTMIPLL enable assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.word 0x00 0.--9. 1. "            UTMIPLL_LOCK_DLY                  ,Delay from UTMIPLL enable assertion to the PLL lock"
group.long 0x403004++0x07
line.long 0x00 "AUDIO_SYNC_CLK_SPDIF_0,AUDIO Synchronization Clock SPDIF"
bitfld.long 0x00 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                       SYNC_CLK_RATE                  ,Synchronization clock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
line.long 0x04 "CLK_SOURCE_APE_0,Clock Source APE"
bitfld.long 0x04 29.--31. " APE_CLK_SRC                       ,APE clock source" "PLLA_OUT0,PLLA1_OUT1,,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x04 0.--7. 1. "                APE_CLK_DIVISOR                ,APE clock divisor"
group.long 0x410000++0x17
line.long 0x00 "PLLD2_BASE_0,PLLD2 Base"
bitfld.long 0x00 31. " PLLD2_BYPASS                      ,PLLD2 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLD2_ENABLE                   ,PLLD2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 29. "            PLLD2_REF_DIS                     ,PLLD2 reference clock disable" "No,Yes"
rbitfld.long 0x00 28. "                       PLLD2_FREQLOCK                 ,PLLD2 frequency lock" "Not locked,Locked"
textline "                                  "
rbitfld.long 0x00 27. "            PLLD2_LOCK                        ,PLLD2 lock" "Not locked,Locked"
bitfld.long 0x00 25.--26. "                PLLD2_REF_SRC_SEL              ,Reference source select" "Osc_div_clk,PLLREFE_CLKOUT,,PLLREFE_CLKOUT"
textline "                                  "
bitfld.long 0x00 24. "            PLLD2_LOCK_OVERRIDE               ,Forces PLL lock to 1" "Not locked,Locked"
bitfld.long 0x00 19.--23. "                PLLD2_PDIV                     ,P divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 18. "            PLLD2_IDDQ                        ,The PLL is powered up 1 software can put the PLL in IDDQ by setting this bit" "Off,On"
bitfld.long 0x00 16. "                       PLLD2_PTS                      ,Base PLLD2 test output select" "Disabled,FO"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "            PLLD2_NDIV                        ,N divider"
hexmask.long.byte 0x00 0.--7. 1. "                        PLLD2_MDIV                     ,M divider"
line.long 0x04 "PLLD2_MISC_0,PLLD2 MISC"
bitfld.long 0x04 30. " PLLD2_EN_LCKDET                   ,PLLD2 enable lock detection" "Disabled,Enabled"
bitfld.long 0x04 25.--26. "                  PLLD2_KCP                      ,Charge pump gain control" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 24. "            PLLD2_KVCO                        ,VCO gain" "0,1"
hexmask.long.tbyte 0x04 0.--23. 1. "                         PLLD2_SETUP                    ,Setup"
line.long 0x08 "PLLD2_MISC1_0,PLLD2 MISC 1"
bitfld.long 0x08 13.--14. " PLLD2_VREG14V_CTRL                ,PLLD2 voltage regulator control" "0,1,2,3"
bitfld.long 0x08 11.--12. "                         PLLD2_VREG10V_CTRL             ,PLLD2 voltage regulator control" "0,1,2,3"
textline "                                  "
bitfld.long 0x08 10. "            PLLD2_BG_EN                       ,PLLD2 BANDGAP enable" "Disabled,Enabled"
line.long 0x0C "PLLD2_SS_CFG_0,PLLD2 SS Config"
bitfld.long 0x0C 31. " PLLD2_EN_SDM                      ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x0C 30. "                  PLLD2_EN_SSC                   ,Spread spectrum enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x0C 29. "            PLLD2_EN_DITHER2                  ,PLLD2 enable dither2" "Disabled,Enabled"
bitfld.long 0x0C 28. "                  PLLD2_EN_DITHER                ,PLLD2 enable dither" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x0C 27. "            PLLD2_SDM_RESET                   ,PLLD2 SDM reset" "No reset,Reset"
rbitfld.long 0x0C 23.--25. "                  PLLD2_SDM_TEST_OUT             ,PLLD2 SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLD2_SS_CTRL1_0,PLLD2 SS Control 1"
hexmask.long.word 0x10 16.--31. 1. " PLLD2_SDM_SSC_MAX                 ,PLLD2 SDM SSC maximum"
hexmask.long.word 0x10 0.--15. 1. "                      PLLD2_SDM_SSC_MIN              ,PLLD2 SDM SSC minimum"
line.long 0x14 "PLLD2_SS_CTRL2_0,PLLD2 SS Control 2"
hexmask.long.word 0x14 16.--31. 1. " PLLD2_SDM_SSC_STEP                ,PLLD2 SDM SSC step"
hexmask.long.word 0x14 0.--15. 1. "                      PLLD2_SDM_DIN                  ,PLLD2 SDM DIN"
group.long 0x42000C++0x17
line.long 0x00 "PLLREFE_BASE_0,PLLREFE Base"
bitfld.long 0x00 31. " PLLREFE_BYPASS                    ,PLLREFE bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLREFE_ENABLE                 ,PLLREFE enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 29. "            PLLREFE_REF_DIS                   ,PLLREFE reference clock disable" "No,Yes"
bitfld.long 0x00 27.--28. "                       PLLREFE_KCP                    ,PLLREFE KCP" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 26. "            PLLREFE_KVCO                      ,PLLREFE KVCO" "0,1"
bitfld.long 0x00 16.--20. "                         PLLREFE_DIVP                   ,PLLREFE DIVP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "            PLLREFE_DIVN                      ,PLLREFE DIVN"
hexmask.long.byte 0x00 0.--7. 1. "                        PLLREFE_DIVM                   ,PLLREFE DIVM"
line.long 0x04 "PLLREFE_MISC_0,PLLREFE MISC"
bitfld.long 0x04 31. " PLLREFE_SEL_CLKIN_PEX             ,PLLREFE select clocking PEX" "VCO/PDIV output,AVDD reference clock"
bitfld.long 0x04 30. "      PLLREFE_EN_LCKDET              ,PLLREFE enable lock detection" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 29. "            PLLREFE_LOCK_OVERRIDE             ,PLLREFE lock override" "Not locked,Locked"
rbitfld.long 0x04 28. "                PLLREFE_FREQLOCK               ,PLLREFE frequency acquisition" "Not achieved,Happened"
textline "                                  "
rbitfld.long 0x04 27. "            PLLREFE_LOCK                      ,PLLREFE lock (phase + frequency)" "Not locked,Locked"
rbitfld.long 0x04 25.--26. "                PLLREFE_PTS                    ,PLLREFE PTS" "Disabled,FO,VCO,Disabled"
textline "                                  "
bitfld.long 0x04 24. "            PLLREFE_IDDQ                      ,PLLREFE_IDDQ, PLLREFE is powered up 1" "Off,On"
hexmask.long.tbyte 0x04 0.--23. 1. "                       PLLREFE_SETUP                  ,PLLREFE setup"
line.long 0x08 "PLLREFE_OUT_0,PLLREFE OUT"
bitfld.long 0x08 16. " PLLREFE_OUT1_DIV_BYP              ,PLLREFE out1 divider bypass" "Not bypassed,Bypassed"
hexmask.long.byte 0x08 8.--15. 1. "              PLLREFE_OUT1_RATIO             ,PLLREFE out1 divider from Base PLLREFE"
textline "                                  "
bitfld.long 0x08 1. "            PLLREFE_OUT1_CLKEN                ,Pllrefe_out1 divider clock enable" "Disabled,Enabled"
bitfld.long 0x08 0. "                  PLLREFE_OUT1_RSTN              ,PLLREFE out1 divider reset disable" "No,Yes"
line.long 0x0C "PLLREFE_MISC1_0,PLLREFE MISC 1"
bitfld.long 0x0C 13.--14. " PLLREFE_VREG14V_CTRL              ,PLLREFE voltage regulator control" "0,1,2,3"
bitfld.long 0x0C 11.--12. "                         PLLREFE_VREG10V_CTRL           ,PLLREFE voltage regulator control" "0,1,2,3"
textline "                                  "
bitfld.long 0x0C 10. "            PLLREFE_BG_EN                     ,PLLREFE BANDGAP enable" "Disabled,Enabled"
group.long 0x430000++0x17
line.long 0x00 "PLLC2_BASE_0,PLLC2 Base"
bitfld.long 0x00 31. " PLLC2_BYPASS                      ,PLLC2 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLC2_ENABLE                   ,PLLC2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 29. "            PLLC2_REF_DIS                     ,PLLC2 reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "                       PLLC2_FREQ_LOCK                ,PLLC2 frequency lock" "Not locked,Locked"
textline "                                  "
rbitfld.long 0x00 26. "            PLLC2_LOCK                        ,PLLC2 lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "                PLLC2_DIVP                     ,PLLC2 DIVP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
hexmask.long.byte 0x00 10.--17. 1. "            PLLC2_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "                        PLLC2_DIVM                     ,PLL input divider"
line.long 0x04 "PLLC2_MISC_0_0,PLLC2 MISC 0"
bitfld.long 0x04 30. " PLLC2_RESET                        ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "                 PLLC2_EXT_FRU                  ,PLLC2 EXT FRU"
textline "                                  "
bitfld.long 0x04 3. "            PLLC2_PTS                         ,Base PLLC2 test output select" "Disabled,FO"
bitfld.long 0x04 0.--1. "                  PLLC2_LOOP_CTRL                ,PLLC2 loop control" "0,1,2,3"
line.long 0x08 "PLLC2_MISC_1_0,PLLC2 MISC 1"
bitfld.long 0x08 27. " PLLC2_IDDQ                        , PLLC2_IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "                       PLLC2_EXT_SUBINT               ,PLLC2 EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.word 0x08 0.--15. 1. "            PLLC2_DIVN_FRAC                   ,PLLC2 DIVN FRAC"
line.long 0x0C "PLLC2_MISC_2_0,PLLC2 MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLC2_PLL_LD_MEM                  ,PLLC2 PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "                        PLLC2_PLL_FRUG                 ,PLLC2 PLL FRUG"
textline "                                  "
hexmask.long.byte 0x0C 8.--15. 1. "            PLLC2_FLL_LD_MEM                  ,PLLC2 FLL LD MEM"
bitfld.long 0x0C 4. "                        PLLC2_FLL_DIV                  ,PLLC2 FLL divider" "0,1"
textline "                                  "
bitfld.long 0x0C 0.--2. "            PLLC2_FLL_FRUG                    ,PLLC2 FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLC2_MISC_3_0,PLLC2 MISC 3"
bitfld.long 0x10 24.--25. " PLLC2_VREG10V_CTRL                ,PLLC2 VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "                         PLLC2_SETUP                    ,PLLC2 setup"
textline "                                  "
bitfld.long 0x10 4.--5. "            PLLC2_LDIV                        ,PLLC2 LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "                         PLLC2_PLL_LD_TOL               ,PLLC2 PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLC2_MISC_4_0,PLLC2 MISC 4"
bitfld.long 0x14 28. " PLLC2_SEL_IREF                    ,PLLC2 select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "              PLLC2_KP_LO                    ,PLLC2 KP low" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x14 22.--24. "            PLLC2_KP_HI                       ,PLLC2 KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "                         PLLC2_KP_STEP_TIMER            ,PLLC2 KP step timer" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x14 16.--18. "            PLLC2_FRAC_STEP_TIMER             ,PLLC2 FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "                         PLLC2_FRAC_STEP                ,PLLC2 FRAC STEP"
group.long 0x440000++0x17
line.long 0x00 "PLLC3_BASE_0,PLLC3 Base"
bitfld.long 0x00 31. " PLLC3_BYPASS                      ,PLLC3 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLC3_ENABLE                   ,PLLC3 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 29. "            PLLC3_REF_DIS                     ,PLLC3 reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "                       PLLC3_FREQ_LOCK                ,PLLC3 frequency lock" "Not locked,Locked"
textline "                                  "
rbitfld.long 0x00 26. "            PLLC3_LOCK                        ,PLLC3 lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "                PLLC3_DIVP                     ,PLLC3 DIVP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
hexmask.long.byte 0x00 10.--17. 1. "            PLLC3_DIVN                        ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "                        PLLC3_DIVM                     ,PLL input divider"
line.long 0x04 "PLLC3_MISC_0,PLLC3 MISC 0"
bitfld.long 0x04 30. " PLLC3_RESET                       ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "                  PLLC3_EXT_FRU                  ,PLLC3 EXT FRU"
textline "                                  "
bitfld.long 0x04 3. "            PLLC3_PTS                         ,Base PLLC3 test output select" "Disabled,FO"
bitfld.long 0x04 0.--1. "                  PLLC3_LOOP_CTRL                ,PLLC3 loop control" "0,1,2,3"
line.long 0x08 "PLLC3_MISC_1_0,PLLC3 MISC 1"
bitfld.long 0x08 27. " PLLC3_IDDQ                        , PLLC3_IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "                       PLLC3_EXT_SUBINT               ,PLLC3 EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.word 0x08 0.--15. 1. "            PLLC3_DIVN_FRAC                   ,PLLC3 DIVN FRAC"
line.long 0x0C "PLLC3_MISC_2_0,PLLC3 MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLC3_PLL_LD_MEM                  ,PLLC3 PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "                        PLLC3_PLL_FRUG                 ,PLLC3 PLL FRUG"
textline "                                  "
hexmask.long.byte 0x0C 8.--15. 1. "            PLLC3_FLL_LD_MEM                  ,PLLC3 FLL LD MEM"
bitfld.long 0x0C 4. "                        PLLC3_FLL_DIV                  ,PLLC3 FLL divider" "0,1"
textline "                                  "
bitfld.long 0x0C 0.--2. "            PLLC3_FLL_FRUG                    ,PLLC3 FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLC3_MISC_3_0,PLLC3 MISC 3"
bitfld.long 0x10 24.--25. " PLLC3_VREG10V_CTRL                ,PLLC3 VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "                         PLLC3_SETUP                    ,PLLC3 setup"
textline "                                  "
bitfld.long 0x10 4.--5. "            PLLC3_LDIV                        ,PLLC3 LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "                         PLLC3_PLL_LD_TOL               ,PLLC3 PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLC3_MISC_4_0 ,PLLC3 MISC 4"
bitfld.long 0x14 28. " PLLC3_SEL_IREF                    ,PLLC3 select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "              PLLC3_KP_LO                    ,PLLC3 KP low" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x14 22.--24. "            PLLC3_KP_HI                       ,PLLC3 KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "                         PLLC3_KP_STEP_TIMER            ,PLLC3 KP step timer" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x14 16.--18. "            PLLC3_FRAC_STEP_TIMER             ,PLLC3 FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "                         PLLC3_FRAC_STEP                ,PLLC3 FRAC STEP"
group.long 0x450000++0x17
line.long 0x00 "PLLDP_BASE_0,PLLDP Base"
bitfld.long 0x00 31. " PLLDP_BYPASS                      ,PLLDP bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLDP_ENABLE                   ,PLLDP enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 29. "            PLLDP_REF_DIS                     ,PLLDP reference clock disable" "No,Yes"
rbitfld.long 0x00 28. "                       PLLDP_FREQLOCK                 ,PLLDP frequency lock" "Not locked,Locked"
textline "                                  "
rbitfld.long 0x00 27. "            PLLDP_LOCK                        ,PLLDP lock (frequency + phase)" "Not locked,Locked"
bitfld.long 0x00 25.--26. "                PLLDP_REF_SRC_SEL              ,Reference Source select" "Osc_div_clk,PLLREFE_CLKOUT,,PLLREFE_CLKOUT"
textline "                                  "
bitfld.long 0x00 24. "            PLLDP_LOCK_OVERRIDE               ,Forces PLL lock to 1" "Not locked,Locked"
bitfld.long 0x00 19.--23. "                PLLDP_PDIV                     ,PL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 18. "            PLLDP_IDDQ                        ,PLLDP IDDQ" "Off,On"
bitfld.long 0x00 16. "                       PLLDP_PTS                      ,Base PLLDP test output select" "Disabled,FO"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "            PLLDP_NDIV                        ,N divider"
hexmask.long.byte 0x00 0.--7. 1. "                        PLLDP_MDIV                     ,M divider"
line.long 0x04 "PLLDP_MISC_0,PLLDP MISC"
bitfld.long 0x04 30. " PLLDP_EN_LCKDET                   ,PLLDP enable lock detection" "Disabled,Enabled"
bitfld.long 0x04 25.--26. "                  PLLDP_KCP                      ,Charge pump gain control" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 24. "            PLLDP_KVCO                        ,VCO gain" "0,1"
hexmask.long.tbyte 0x04 0.--23. 1. "                         PLLDP_SETUP                    ,Setup"
line.long 0x08 "PLLDP_MISC1_0,PLLDP MISC 1"
bitfld.long 0x08 13.--14. " PLLDP_VREG14V_CTRL                ,PLLDP Voltage regulator control" "0,1,2,3"
bitfld.long 0x08 11.--12. "                         PLLDP_VREG10V_CTRL             ,PLLDP Voltage regulator control" "0,1,2,3"
textline "                                  "
bitfld.long 0x08 10. "            PLLDP_BG_EN                       ,PLLDP BANDGAP enable" "Disabled,Enabled"
line.long 0x0C "PLLDP_SS_CFG_0,PLLDP SS Config"
bitfld.long 0x0C 31. " PLLDP_EN_SDM                      ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x0C 30. "                  PLLDP_EN_SSC                   ,Spread spectrum enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x0C 29. "            PLLDP_EN_DITHER2                  ,PLLDP enable dither2" "Disabled,Enabled"
bitfld.long 0x0C 28. "                  PLLDP_EN_DITHER                ,PLLDP enable dither" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x0C 27. "            PLLDP_SDM_RESET                   ,PLLDP SDM reset" "No reset,Reset"
bitfld.long 0x0C 23.--25. "                  PLLDP_SDM_TEST_OUT             ,PLLDP SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLDP_SS_CTRL1_0,PLLDP SS Control 1"
hexmask.long.word 0x10 16.--31. 1. " PLLDP_SDM_SSC_MAX                 ,PLLDP SDM SSC maximum"
hexmask.long.word 0x10 0.--15. 1. "                      PLLDP_SDM_SSC_MIN              ,PLLDP SDM SSC minimum"
line.long 0x14 "PLLDP_SS_CTRL2_0,PLLDP SS Control 2"
hexmask.long.word 0x14 16.--31. 1. " PLLDP_SDM_SSC_STEP                ,PLLDP SDM SSC step"
hexmask.long.word 0x14 0.--15. 1. "                      PLLDP_SDM_DIN                  ,PLLDP SDM DIN"
textline "                                  "
width 32.
group.long 0x46000C++0x17
line.long 0x00 "PLLC4_BASE_0,PLLC4 Base"
bitfld.long 0x00 31. " PLLC4_BYPASS                 ,PLLC4 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "            PLLC4_ENABLE                      ,PLLC4 enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 29. " PLLC4_REF_DIS                ,PLLC4 reference clock disable" "No,Yes"
rbitfld.long 0x00 28. "                     PLLC4_FREQLOCK                    ,PLLC4 frequency lock" "Not locked,Locked"
textline "                                         "
rbitfld.long 0x00 27. " PLLC4_FREQ_LOCK              ,PLLC4 lock (frequency + phase)" "Not locked,Locked"
bitfld.long 0x00 25.--26. "              PLLC4_REF_SRC_SEL                 ,Reference source select" "Osc_div_clk,PLLREFE_CLKOUT,,PLLREFE_CLKOUT"
textline "                                         "
bitfld.long 0x00 24. " PLLC4_LOCK_OVERRIDE          ,Forces PLL lock to 1" "Not locked,Locked"
bitfld.long 0x00 19.--23. "              PLLC4_DIVP                        ,PL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 18. " PLLC4_IDDQ                   ,PLLC4 IDDQ" "Off,On"
bitfld.long 0x00 16.--17. "                     PLLC4_PTS                         ,Base PLLC4 test output select" "0,1,2,3"
textline "                                         "
hexmask.long.byte 0x00 8.--15. 1. " PLLC4_DIVN                   ,N divider"
hexmask.long.byte 0x00 0.--7. 1. "                      PLLC4_DIVM                        ,M divider"
line.long 0x04 "PLLC4_MISC_0,PLLC4 MISC"
bitfld.long 0x04 30. " PLLC4_EN_LCKDET              ,PLLC4 enable lock detection" "Disabled,Enabled"
bitfld.long 0x04 25.--26. "                PLLC4_KCP                         ,Charge pump gain control" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 24. " PLLC4_KVCO                   ,VCO gain" "Disabled,Enabled"
hexmask.long.tbyte 0x04 0.--23. 1. "                PLLC4_SETUP                       ,Setup"
line.long 0x08 "PLLC4_MISC1_0,PLLC4 MISC 1"
bitfld.long 0x08 15.--16. " PLLC4_CLK_SEL                ,Select PLLC4 out1/PLLC4 out2/PLLC4 vco div2" "PLLC4_OUT1,PLLC4_OUT2,PLLC4_VCO_DIV2,?..."
bitfld.long 0x08 13.--14. "          PLLC4_VREG14V_CTRL                ,PLLC4 Voltage regulator control" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11.--12. " PLLC4_VREG10V_CTRL           ,PLLC4 Voltage regulator control" "0,1,2,3"
bitfld.long 0x08 10. "                       PLLC4_BG_EN                       ,PLLC4 BANDGAP enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " PLLC4_ENABLE_SW_OVERRIDE     ,PLLC4 let software override values on clamp/bypass vs hardware FSM control" "Hardware,Software"
bitfld.long 0x08 8. "                PLLC4_STOP_SYNCMUX                ,PLLC4 start/stop CLKOUT" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 7. " PLLC4_SYNCMODE               ,SYNCMODE reset for BYPASSCLK to propagate at reset" "Reset,Not reset"
line.long 0x0C "PLLC4_SS_CFG_0,PLLC4 SS Config"
bitfld.long 0x0C 31. " PLLC4_EN_SDM                 ,PLLC4 enable SDM" "Disabled,Enabled"
bitfld.long 0x0C 30. "                PLLC4_EN_SSC                      ,PLLC4 enable SSC" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 29. " PLLC4_EN_DITHER2             ,PLLC4_EN_DITHER2" "Disabled,Enabled"
bitfld.long 0x0C 28. "                PLLC4_EN_DITHER                   ,PLLC4 enable dither" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 27. " PLLC4_SDM_RESET              ,PLLC4_SDM_RESET" "Disabled,Enabled"
rbitfld.long 0x0C 23.--25. "                PLLC4_SDM_TEST_OUT                ,PLLC4 SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLC4_SS_CTRL1_0,PLLC4 SS Control 1"
hexmask.long.word 0x10 16.--31. 1. " PLLC4_SDM_SSC_MAX            ,PLLC4 SDM SSC maximum"
hexmask.long.word 0x10 0.--15. 1. "                    PLLC4_SDM_SSC_MIN                 ,PLLC4 SDM SSC minimum"
line.long 0x14 "PLLC4_SS_CTRL2_0,PLLC4 SS Control 2"
hexmask.long.word 0x14 16.--31. 1. " PLLC4_SDM_SSC_STEP           ,PLLC4 SDM SSC step"
hexmask.long.word 0x14 0.--15. 1. "                    PLLC4_SDM_DIN                     ,PLLC4 SDM DIN"
group.long 0x470000++0x03
line.long 0x00 "RST_DEV_XUSB_0_SET/CLR,Reset Device XUSB"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SWR_XUSB_SS_RST              ,Reset XUSB SS logic" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "                SWR_XUSB_PADCTL_RST               ,Reset XUSB PADCTL logic" "Disabled,Enabled"
textline "                                         "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_XUSB_DEV_RST             ,Reset XUSB DEV logic" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                SWR_XUSB_HOST_RST                 ,Reset XUSB HOST logic" "Disabled,Enabled"
group.long 0x471000++0x03
line.long 0x00 "CLK_OUT_ENB_XUSB_0_SET/CLR,Clock Out Enable XUSB"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_XUSB_SS              ,Enable clock to XUSB SS" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "                CLK_ENB_XUSB_HOST                 ,Enable clock to XUSB host" "Disabled,Enabled"
textline "                                         "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_XUSB_DEV             ,Enable clock to XUSB DEV" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                CLK_ENB_XUSB                      ,Enable clock to XUSB" "Disabled,Enabled"
group.long 0x473000++0x13
line.long 0x00 "CLK_SOURCE_XUSB_CORE_HOST_0,Clock Source XUSB Core Host"
bitfld.long 0x00 29.--31. " XUSB_CORE_HOST_CLK_SRC       ,XUSB core host clock source" "CLK_M,PLLP_OUT0,,,,PLLREFE_OUT,?..."
hexmask.long.byte 0x00 0.--7. 1. "             XUSB_CORE_HOST_CLK_DIVISOR        ,XUSB core host clock divisor"
line.long 0x04 "CLK_SOURCE_XUSB_FALCON_0,Clock Source XUSB FALCON"
bitfld.long 0x04 29.--31. " XUSB_FALCON_CLK_SRC          ,XUSB FALCON Clock source" "CLK_M,PLLP_OUT0,,,,PLLREFE_OUT,?..."
hexmask.long.byte 0x04 0.--7. 1. "             XUSB_FALCON_CLK_DIVISOR           ,XUSB falcon clock divisor"
line.long 0x08 "CLK_SOURCE_XUSB_FS_0,Clock Source XUSB FS"
bitfld.long 0x08 29.--31. " XUSB_FS_CLK_SRC              ,XUSB FS Clock source" "CLK_M,,FO_48M,,PLLP_OUT0,,HSIC_480,?..."
hexmask.long.byte 0x08 0.--7. 1. "               XUSB_FS_CLK_DIVISOR               ,XUSB FS clock divisor"
line.long 0x0C "CLK_SOURCE_XUSB_CORE_DEV_0,Clock Source XUSB Core Device"
bitfld.long 0x0C 29.--31. " XUSB_CORE_DEV_CLK_SRC        ,XUSB CORE DEV Clock source" "CLK_M,PLLP_OUT0,,,,PLLREFE_OUT,?..."
hexmask.long.byte 0x0C 0.--7. 1. "             XUSB_CORE_DEV_CLK_DIVISOR         ,XUSB core DEV clock divisor"
line.long 0x10 "CLK_SOURCE_XUSB_SS_0,Clock Source XUSB SS"
bitfld.long 0x10 29.--31. " XUSB_SS_CLK_SRC              ,XUSB SS Clock source" "CLK_M,PLLREFE_OUT,CLK_S,HSIC_480,?..."
bitfld.long 0x10 26. "             XUSB_HS_HSICP_CLK_SEL             ,XUSB HS HSICP clock select" "60 MHz,120 MHz"
textline "                                         "
bitfld.long 0x10 25. " XUSB_HS_CLK_BYPASS_SWITCH    ,Derives HS clock" "Switch/dividers output,PLLU 60 MHz output"
textline "                                         "
bitfld.long 0x10 24. " XUSB_SS_CLK_BYPASS_SWITCH    ,Derives SS clock" "Switch/dividers output,Osc_div clock directly"
textline "                                         "
hexmask.long.byte 0x10 0.--7. 1. " XUSB_SS_CLK_DIVISOR          ,XUSB SS clock divisor"
group.long 0x474000++0x03
line.long 0x00 "CLK_SPARE_XUSB_0,Clock Spare XUSB"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_XUSB           ,Clock spare register XUSB"
group.long 0x4B3000++0x03
line.long 0x00 "CLK_SOURCE_DSIA_LP_0,Clock Source DSIA LP"
bitfld.long 0x00 29.--31. " DSIA_LP_CLK_SRC              ,DSIA LP clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               DSIA_LP_CLK_DIVISOR               ,DSIA LP clock divisor"
group.long 0x4C0000++0x03
line.long 0x00 "RST_DEV_DSIB_0_SET/CLR,Reset Device DSIB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_DSIB_RST                 ,Reset DSIB" "Disabled,Enabled"
group.long 0x4C1000++0x03
line.long 0x00 "CLK_OUT_ENB_DSIB_0_SET/CLR,Clock Out Enable DSIB"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_DSIB_LP              ,Enable clock to DSIB LP" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                CLK_ENB_DSIB                      ,Enable clock to DSIB" "Disabled,Enabled"
group.long 0x4C3000++0x03
line.long 0x00 "CLK_SOURCE_DSIB_LP_0,Clock Source DSIB LP"
bitfld.long 0x00 29.--31. " DSIB_LP_CLK_SRC              ,DSIB LP clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               DSIB_LP_CLK_DIVISOR               ,DSIB LP clock divisor"
if (((per.l(ad:0x05000000+0x4D3000)&0x100)==0x100))
rgroup.long 0x4D3000++0x03
line.long 0x00 "CLK_SOURCE_ENTROPY_0,Clock Source Entropy"
bitfld.long 0x00 29.--31. " ENTROPY_CLK_SRC              ,ENTROPY clock source" ",,,,,PLLP_OUT0,CLK_S,CLK_M"
bitfld.long 0x00 8. "               ENTROPY_CLK_LOCK                  ,ENTROPY clock lock" "Not locked,Locked"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " ENTROPY_CLK_DIVISOR          ,Entropy clock divisor"
else
group.long 0x4D3000++0x03
line.long 0x00 "CLK_SOURCE_ENTROPY_0,Clock Source Entropy"
bitfld.long 0x00 29.--31. " ENTROPY_CLK_SRC              ,ENTROPY clock source" ",,,,,PLLP_OUT0,CLK_S,CLK_M"
bitfld.long 0x00 8. "               ENTROPY_CLK_LOCK                  ,ENTROPY clock lock" "Not locked,Locked"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " ENTROPY_CLK_DIVISOR          ,Entropy clock divisor"
endif
group.long 0x4E3000++0x03
line.long 0x00 "CLK_SOURCE_DVFS_REF_0,Clock Source DVFS Reference"
bitfld.long 0x00 29.--31. " DVFS_REF_CLK_SRC             ,DVFS reference clock source" "PLLP_OUT0,,,,,,CLK_S,OSC_DIV"
bitfld.long 0x00 28. "               DVFS_REF_MASTER_CLKEN             ,Use clock enable DVFS to control clock enable" "Disabled,Enabled"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " DVFS_REF_CLK_DIVISOR         ,DVFS reference clock divisor"
group.long 0x500000++0x03
line.long 0x00 "CLK_OUT_ENB_DMIC1_0_SET/CLR,Clock Enable DMIC1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DMIC1                ,Enable clock - DMIC1" "Disabled,Enabled"
group.long 0x502000++0x03
line.long 0x00 "CLK_SOURCE_DMIC1_0,Clock Source DMIC1"
bitfld.long 0x00 29.--31. " DMIC1_CLK_SRC                ,DMIC1 clock source" "PLLP_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DMIC1_CLK_DIVISOR                 ,DMIC1 clock divisor"
group.long 0x503000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DMIC1_0,Audio Synchronization Clock DMIC1"
bitfld.long 0x00 4. " SYNC_CLK_DIS                 ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                     ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PllA_OUT0,I2S6,?..."
group.long 0x510000++0x0B
line.long 0x00 "CLK_OUT_ENB_DMIC2_0_SET/CLR,Clock Out DMIC2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_DMIC2                ,Enable clock - DMIC2" "Disabled,Enabled"
group.long 0x512000++0x03
line.long 0x00 "CLK_SOURCE_DMIC2_0,Clock Source DMIC2"
bitfld.long 0x00 29.--31. " DMIC2_CLK_SRC                ,DMIC2 clock source" "PLLP_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DMIC2_CLK_DIVISOR                 ,DMIC2 clock divisor"
group.long 0x513000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DMIC2_0,Audio Synchronization Clock DMIC2"
bitfld.long 0x00 4. " SYNC_CLK_DIS                 ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                     ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PllA_OUT0,I2S6,?..."
group.long 0x523000++0x03
line.long 0x00 "CLK_SOURCE_AUD_MCLK_0,Clock Source Audio MCLK"
bitfld.long 0x00 29.--31. " AUD_MCLK_CLK_SRC             ,AUD MCLK clock source" "PLLP_OUT0,PLLA_OUT0,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               AUD_MCLK_CLK_DIVISOR              ,Audio MCLK clock divisor"
group.long 0x533000++0x03
line.long 0x00 "CLK_SOURCE_I2C6_0,Clock Source I2C6"
bitfld.long 0x00 29.--31. " I2C6_CLK_SRC                 ,I2C6 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "               I2C6_CLK_DIVISOR                  ,I2C6 clock divisor"
group.long 0x552000++0x03
line.long 0x00 "CLK_SOURCE_UART_FST_MIPI_CAL_0,Clock Source UART FST MIPI CAL"
bitfld.long 0x00 29.--31. " UART_FST_MIPI_CAL_CLK_SRC    ,UART FST MIPI CAL clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "               UART_FST_MIPI_CAL_CLK_DIVISOR     ,UART FST MIPI CAL clock divisor"
group.long 0x563000++0x07
line.long 0x00 "CLK_SOURCE_VIC_0,Clock Source VIC 0"
bitfld.long 0x00 29.--31. " VIC_CLK_SRC                  ,VIC clock source" "PLLP_OUT0,PLLC_OUT0,,,PLLC2_OUT0,PLLC3_OUT0,CLK_M,DFLL_VIC"
hexmask.long.byte 0x00 8.--15. 1. "              VIC_IDLE_DIVISOR                  ,VIC idle divisor"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VIC_CLK_DIVISOR              ,VIC clock divisor"
line.long 0x04 "VIC_SUPER_CLK_DIVIDER_0,VIC Super Clock Divider"
bitfld.long 0x04 31. " SUPER_VIC_DIV_ENB            ,Super VIC divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "                SUPER_VIC_DIV_DIVIDEND            ,Super VIC divider dividend"
textline "                                         "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_VIC_DIV_DIVISOR        ,Super VIC divider divisor"
textline "                                         "
width 36.
group.long 0x564000++0x03
line.long 0x00 "CLK_SPARE_VIC_0,Clock Spare VIC 0"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_VIC            ,Clock spare register VIC"
group.long 0x572000++0x03
line.long 0x00 "CLK_SOURCE_SDMMC_LEGACY_TM_0,Clock Source SDMMC Legacy TM"
bitfld.long 0x00 29.--31. " SDMMC_LEGACY_TM_CLK_SRC      ,SDMMC legacy TM clock source" "PLLP_OUT0,,,,,,CLK_S,CLKS_M"
hexmask.long.byte 0x00 0.--7. 1. "               SDMMC_LEGACY_TM_CLK_DIVISOR       ,SDMMC legacy TM clock divisor"
group.long 0x583000++0x07
line.long 0x00 "CLK_SOURCE_NVDEC_0,Clock Source NVDEC"
bitfld.long 0x00 29.--31. " NVDEC_CLK_SRC                ,NVDEC clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_NVDEC,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "              NVDEC_CLK_DIVISOR                 ,NVDEC clock divisor"
line.long 0x04 "NVDEC_SUPER_CLK_DIVIDER_0,NVDEC Super Clock Divider"
bitfld.long 0x04 31. " SUPER_NVDEC_DIV_ENB          ,Super NVDEC divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "                SUPER_NVDEC_DIV_DIVIDEND          ,Super NVDEC divider dividend"
textline "                                             "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_NVDEC_DIV_DIVISOR      ,Super NVDEC divider divisor"
group.long 0x584000++0x03
line.long 0x00 "CLK_SPARE_NVDEC_0,Clock Spare NVDEC"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_NVDEC          ,Clock spare register NVDEC"
group.long 0x593000++0x07
line.long 0x00 "CLK_SOURCE_NVJPG_0,Clock Source NVJPG"
bitfld.long 0x00 29.--31. " NVJPG_CLK_SRC                ,NVJPG clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_NVJPG,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "              NVJPG_CLK_DIVISOR                 ,NVJPG clock divisor"
line.long 0x04 "NVJPG_SUPER_CLK_DIVIDER_0,NVJPG Super Clock Divider"
bitfld.long 0x04 31. " SUPER_NVJPG_DIV_ENB          ,Super NVJPG divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "                SUPER_NVJPG_DIV_DIVIDEND          ,Super NVJPG divider dividend"
textline "                                             "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_NVJPG_DIV_DIVISOR      ,Super NVJPG divider divisor"
group.long 0x5A3000++0x07
line.long 0x00 "CLK_SOURCE_NVENC_0,Clock Source NVENC"
bitfld.long 0x00 29.--31. " NVENC_CLK_SRC                ,NVENC clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_NVENC_CLK_S,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "        NVENC_CLK_DIVISOR                 ,NVENC clock divisor"
line.long 0x04 "NVENC_SUPER_CLK_DIVIDER_0,NVENC Super Clock Divider"
bitfld.long 0x04 31. " SUPER_NVENC_DIV_ENB          ,Super NVENC divider enable" "Disabled,Enabled"
hexmask.long.byte 0x04 8.--15. 1. "                SUPER_NVENC_DIV_DIVIDEND          ,Super NVENC divider dividend"
textline "                                             "
hexmask.long.byte 0x04 0.--7. 1. " SUPER_NVENC_DIV_DIVISOR      ,Super NVENC divider divisor"
group.long 0x5A4000++0x03
line.long 0x00 "CLK_SPARE_NVENC_0,Clock Spare NVENC"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_NVENC          ,Clock spare register NVENC"
group.long 0x5B0000++0x1B
line.long 0x00 "PLLA1_BASE_0,PLLA1 Base"
bitfld.long 0x00 31. " PLLA1_BYPASS                 ,PLLA1 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "            PLLA1_ENABLE                      ,PLLA1 enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. " PLLA1_REF_DIS                ,PLLA1 reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "                     PLLA1_FREQ_LOCK                   ,PLLA1 frequency lock" "Not locked,Locked"
textline "                                             "
rbitfld.long 0x00 26. " PLLA1_LOCK                   ,PLLA1 lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "              PLLA1_DIVP                        ,Post divider (divide By N+1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                             "
hexmask.long.byte 0x00 10.--17. 1. " PLLA1_DIVN                   ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "                      PLLA1_DIVM                        ,PLL input divider"
line.long 0x04 "PLLA1_OUT1_0,PLLA1 OUT1"
bitfld.long 0x04 16. " PLLA1_OUT1_DIV_BYP           ,Bypass PLLA1_OUT0 divider" "Not bypassed,Bypassed"
hexmask.long.byte 0x04 8.--15. 1. "            PLLA1_OUT1_RATIO                  ,PLLA1 OUT1 divider from Base PLLC"
textline "                                             "
bitfld.long 0x04 1. " PLLA1_OUT1_CLKEN             ,PLLA1 OUT0 divider clock enable" "Disabled,Enabled"
bitfld.long 0x04 0. "                PLLA1_OUT1_RSTN                   ,PLLA1 OUT0 divider reset" "Reset,Not reset"
line.long 0x08 "PLLA1_MISC_0_0,PLLA1 MISC 0"
bitfld.long 0x08 30. " PLLA1_RESET                  ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x08 4.--19. 1. "                PLLA1_EXT_FRU                     ,PLLA1 EXT FRU"
textline "                                             "
bitfld.long 0x08 3. " PLLA1_PTS                    ,Base PLLA1 test output select" "Disabled,FO"
bitfld.long 0x08 0.--1. "                PLLA1_LOOP_CTRL                   ,PLLA1 loop control" "0,1,2,3"
line.long 0x0C "PLLA1_MISC_1_0,PLLA1 MISC 1"
bitfld.long 0x0C 27. " PLLA1_IDDQ                   ,PLLA1 IDDQ" "Off,On"
bitfld.long 0x0C 16.--19. "                     PLLA1_EXT_SUBINT                  ,PLLA1 EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                             "
hexmask.long.word 0x0C 0.--15. 1. " PLLA1_DIVN_FRAC              ,PLLA1 DIVN FRAC"
line.long 0x10 "PLLA1_MISC_2_0,PLLA1 MISC 2"
hexmask.long.byte 0x10 24.--31. 1. " PLLA1_PLL_LD_MEM             ,PLLA1 PLL LD MEM"
hexmask.long.byte 0x10 16.--23. 1. "                      PLLA1_PLL_FRUG                    ,PLLA1 PLL FRUG"
textline "                                             "
hexmask.long.byte 0x10 8.--15. 1. " PLLA1_FLL_LD_MEM             ,PLLA1 FLL LD MEM"
bitfld.long 0x10 4. "                      PLLA1_FLL_DIV                     ,PLLA1 FLL divider" "0,1"
textline "                                             "
bitfld.long 0x10 0.--2. " PLLA1_FLL_FRUG               ,PLLA1 FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x14 "PLLA1_MISC_3_0,PLLA1 MISC 3"
bitfld.long 0x14 24.--25. " PLLA1_VREG10V_CTRL           ,PLLA1 VREG10V control" "0,1,2,3"
hexmask.long.word 0x14 8.--23. 1. "                       PLLA1_SETUP                       ,PLLA1 setup"
textline "                                             "
bitfld.long 0x14 4.--5. " PLLA1_LDIV                   ,PLLA1 LDIV" "0,1,2,3"
bitfld.long 0x14 0.--3. "                       PLLA1_PLL_LD_TOL                  ,PLLA1 PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PLLA1_MISC_4_0 ,PLLA1 MISC 4"
bitfld.long 0x18 28. " PLLA1_SEL_IREF               ,PLLA1 select IREF" "Not selected,Selected"
bitfld.long 0x18 25.--27. "            PLLA1_KP_LO                       ,PLLA1 KP low" "0,1,2,3,4,5,6,7"
textline "                                             "
bitfld.long 0x18 22.--24. " PLLA1_KP_HI                  ,PLLA1 KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 19.--21. "                       PLLA1_KP_STEP_TIMER               ,PLLA1 KP step timer" "0,1,2,3,4,5,6,7"
textline "                                             "
bitfld.long 0x18 16.--18. " PLLA1_FRAC_STEP_TIMER        ,PLLA1 FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x18 0.--15. 1. "                       PLLA1_FRAC_STEP                   ,PLLA1 FRAC step"
group.long 0x5C3000++0x03
line.long 0x00 "CLK_SOURCE_QSPI_0,Clock Source QSPI"
bitfld.long 0x00 29.--31. " QSPI_CLK_SRC                 ,QSPI Clock source" "PLLP_OUT0,,,,PLLC4_MUXED,,CLK_M,?..."
bitfld.long 0x00 8. "             QSPI_CLK_DIV2_SEL                 ,Selects QSPI clock mode" "DIV1/SDR,DIV2/SDR"
textline "                                             "
hexmask.long.byte 0x00 0.--7. 1. " QSPI_CLK_DIVISOR             ,QSPI Clock divisor"
group.long 0x5D3000++0x03
line.long 0x00 "CLK_SOURCE_VI_I2C_0,Clock Source VI I2C"
bitfld.long 0x00 29.--31. " VI_I2C_CLK_SRC               ,VI I2C clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "               VI_I2C_CLK_DIVISOR                ,VI I2C clock divisor"
group.long 0x5E2000++0x03
line.long 0x00 "CLK_SOURCE_USB2_HSIC_TRK_0,Clock Source USB2 HSIC TRK"
hexmask.long.byte 0x00 0.--7. 1. " USB2_HSIC_TRK_CLK_DIVISOR    ,USB2 HSIC TRK clock divisor"
group.long 0x5F0000++0x0B
line.long 0x00 "CLK_SOURCE_PEX_SATA_USB_RX_BYP_0,Clock Source PEX SATA USB RX BYP"
bitfld.long 0x00 8. " PEX_USB_PAD_RX_BYP_REFCLK_CE ,Clock enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "                PEX_USB_PAD_RX_BYP_REFCLK_DIVISOR ,PEX USB PAD RX BYP REFCLK divisor"
line.long 0x04 "CLK_SOURCE_PEX_USB_PAD_PLL0_MGMT_0,Clock Source PEX USB PAD PLL0 MGMT"
bitfld.long 0x04 8. " PEX_USB_PAD_PLL0_MGMT_CLK_CE ,Clock enable" "Disabled,Enabled"
hexmask.long.byte 0x04 0.--7. 1. "                PEX_USB_PAD_PLL0_MGMT_CLK_DIVISOR ,PEX USB PAD PLL0 MGMT clock divisor"
line.long 0x08 "CLK_SOURCE_PEX_USB_PAD_PLL1_MGMT_0,Clock Source PEX USB PAD PLL1 MGMT"
bitfld.long 0x08 8. " PEX_USB_PAD_PLL1_MGMT_CLK_CE ,Clock enable" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "                PEX_USB_PAD_PLL1_MGMT_CLK_DIVISOR ,PEX USB PAD PLL1 MGMT clock divisor"
group.long 0x602000++0x03
line.long 0x00 "CLK_SOURCE_MAUD_0,Clock Source MAUD"
bitfld.long 0x00 29.--31. " MAUD_CLK_SRC                 ,MAUD clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               MAUD_CLK_DIVISOR                  ,MAUD clock divisor"
group.long 0x613000++0x03
line.long 0x00 "CLK_SOURCE_TSECB_0,Clock Source TSECB"
bitfld.long 0x00 29.--31. " TSECB_CLK_SRC                ,TSECB clock source" "PLLP_OUT0,PLLC2_OUT0,PLLC_OUT0,PLLC3_OUT0,,DFLL_TSECB,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "              TSECB_CLK_DIVISOR                 ,TSECB clock divisor"
group.long 0x623004++0x03
line.long 0x00 "SUPER_ACLK_DIVIDER_0,Super ACLK Divider"
bitfld.long 0x00 31. " SUPER_ADIV_ENB               ,Super ADIV enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                ACLK_invert_DCD                   ,ACLK invert DCD" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 26. " SUPER_ADIV_DIS_FROM_FIQ      ,Disables super clock divider on CPU FIQ" "No,Yes"
bitfld.long 0x00 25. "                     SUPER_ADIV_DIS_FROM_IRQ           ,Disables super clock divider on CPU IRQ" "No,Yes"
textline "                                             "
hexmask.long.byte 0x00 16.--23. 1. " ACLK_CLK_DIVISOR             ,ACLK clock divisor"
hexmask.long.byte 0x00 8.--15. 1. "                      SUPER_ADIV_DIVIDEND               ,Super ADIV dividend"
textline "                                             "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_ADIV_DIVISOR           ,Super ADIV divisor"
group.long 0x650000++0x03
line.long 0x00 "RST_DEV_MPHY_0_SET/CLR,Reset Device MPHY"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " SWR_MPHY_IOBIST_RST          ,Reset MPHY IOBIST" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "                SWR_MPHY_CLK_CTL_RST              ,Reset MPHY clock control module in MPHY IP" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " SWR_MPHY_L1_RX_RST           ,Reset MPHY L1 RX" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "                SWR_MPHY_L1_TX_RST                ,Reset MPHY L1 TX" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_MPHY_L0_RX_RST           ,Reset MPHY L0 RX" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                SWR_MPHY_L0_TX_RST                ,Reset MPHY L0 TX" "Disabled,Enabled"
group.long 0x651000++0x03
line.long 0x00 "CLK_OUT_ENB_MPHY_0_SET/CLR,Clock Out Enable MPHY"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CLK_ENB_MPHY_CORE_PLL_FIXED  ,Enable clock to MPHY" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "                CLK_ENB_MPHY_TX_1MHZ_REF          ,Enable clock to MPHY" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 29. 0x04 29. 0x08 29. " CLK_ENB_MPHY_IOBIST          ,Enable clock to MPHY" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "                CLK_ENB_MPHY_L1_RX_ANA            ,Enable clock to MPHY L1 recovered RX clock from UPHY" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CLK_ENB_MPHY_L0_RX_ANA       ,Enable clock to MPHY L0 recovered RX clock from UPHY" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "                CLK_ENB_MPHY_L0_TX_LS_3XBIT       ,Enable clock to MPHY" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_MPHY_L0_TX_SYMB      ,Enable clock to MPHY" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "                CLK_ENB_MPHY_L0_RX_LS_BIT         ,Enable clock to MPHY" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_MPHY_L0_RX_SYMB      ,Enable clock to MPHY" "Disabled,Enabled"
textline "                                             "
width 37.
group.long 0x653000++0x13
line.long 0x00 "CLK_SOURCE_MPHY_CORE_PLL_FIXED_0,Clock Source MPHY CORE PLL FIXED"
hexmask.long.byte 0x00 0.--7. 1. " MPHY_CORE_PLL_FIXED_CLK_DIVISOR ,MPHY core PLL fixed clock divisor"
line.long 0x04 "CLK_SOURCE_MPHY_TX_1MHZ_REF_0,Clock Source MPHY TX 1MHZ Reference"
hexmask.long.byte 0x04 0.--7. 1. " MPHY_TX_1MHZ_REF_CLK_DIVISOR    ,MPHY TX 1MHZ reference clock divisor"
line.long 0x08 "CLK_SOURCE_MPHY_IOBIST_0,Clock Source MPHY IOBIST"
hexmask.long.byte 0x08 0.--7. 1. " MPHY_IOBIST_CLK_DIVISOR         ,MPHY IOBIST clock divisor"
line.long 0x0C "CLK_SOURCE_MPHY_L0_RX_LS_SYMB_0,Clock Source MPHY L0 RX LS SYMB"
hexmask.long.byte 0x0C 0.--7. 1. " MPHY_L0_RX_LS_SYMB_CLK_DIVISOR  ,MPHY L0 RX LS SYMB clock divisor"
line.long 0x10 "CLK_SOURCE_MPHY_L0_TX_LS_SYMB_0,Clock Source MPHY L0 TX LS SYMB"
hexmask.long.byte 0x10 0.--7. 1. " MPHY_L0_TX_LS_SYMB_CLK_DIVISOR  ,Only even numbers allowed divide by N"
textline "                                              "
group.long 0x660000++0x17
line.long 0x00 "PLLNVCSI_BASE_0,PLLNVCSI Base"
bitfld.long 0x00 31. " PLLNVCSI_BYPASS                       ,PLLNVCSI bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "  PLLNVCSI_ENABLE        ,PLLNVCSI enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. " PLLNVCSI_REF_DIS                      ,PLLNVCSI reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "           PLLNVCSI_FREQ_LOCK     ,PLLNVCSI frequency lock" "Not locked,Locked"
textline "                                              "
rbitfld.long 0x00 26. " PLLNVCSI_LOCK                         ,PLLNVCSI lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "    PLLNVCSI_DIVP          ,Post divider (divide By N+1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                              "
hexmask.long.byte 0x00 10.--17. 1. " PLLNVCSI_DIVN                         ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "            PLLNVCSI_DIVM          ,PLL input divider"
line.long 0x04 "PLLNVCSI_MISC_0_0,PLLNVCSI MISC 0"
bitfld.long 0x04 30. " PLLNVCSI_RESET                        ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "      PLLNVCSI_EXT_FRU       ,PLLNVCSI EXT FRU"
textline "                                              "
bitfld.long 0x04 3. " PLLNVCSI_PTS                          ,Base PLLNVCSI test output select" "Disabled,FO"
bitfld.long 0x04 0.--1. "      PLLNVCSI_LOOP_CTRL     ,PLLNVCSI loop control" "0,1,2,3"
line.long 0x08 "PLLNVCSI_MISC_1_0,PLLNVCSI MISC 1"
bitfld.long 0x08 27. " PLLNVCSI_IDDQ                         ,PLLNVCSI IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "           PLLNVCSI_EXT_SUBINT    ,PLLNVCSI EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x08 0.--15. 1. " PLLNVCSI_DIVN_FRAC                    ,PLLNVCSI DIVN FRAC"
line.long 0x0C "PLLNVCSI_MISC_2_0,PLLNVCSI MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLNVCSI_PLL_LD_MEM                   ,PLLNVCSI PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "            PLLNVCSI_PLL_LD_MEM    ,PLLNVCSI PLL LD MEM"
textline "                                              "
hexmask.long.byte 0x0C 8.--15. 1. " PLLNVCSI_FLL_LD_MEM                   ,PLLNVCSI FLL LD MEM"
bitfld.long 0x0C 4. "            PLLNVCSI_FLL_DIV       ,PLLNVCSI FLL divider" "0,1"
textline "                                              "
bitfld.long 0x0C 0.--2. " PLLNVCSI_FLL_FRUG                     ,PLLNVCSI FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLNVCSI_MISC_3_0,PLLNVCSI MISC 3"
bitfld.long 0x10 24.--25. " PLLNVCSI_VREG10V_CTRL                 ,PLLNVCSI VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "             PLLNVCSI_SETUP         ,PLLNVCSI setup"
textline "                                              "
bitfld.long 0x10 4.--5. " PLLNVCSI_LDIV                         ,PLLNVCSI LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "             PLLNVCSI_PLL_LD_TOL    ,PLLNVCSI PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLNVCSI_MISC_4_0,PLLNVCSI MISC 4"
bitfld.long 0x14 28. " PLLNVCSI_SEL_IREF                     ,PLLNVCSI select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "  PLLNVCSI_KP_LO         ,PLLNVCSI KP low" "0,1,2,3,4,5,6,7"
textline "                                              "
bitfld.long 0x14 22.--24. " PLLNVCSI_KP_HI                        ,PLLNVCSI KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "             PLLNVCSI_KP_STEP_TIMER ,PLLNVCSI KP step timer" "0,1,2,3,4,5,6,7"
textline "                                              "
bitfld.long 0x14 16.--18. " PLLNVCSI_FRAC_STEP_TIMER              ,PLLNVCSI FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "             PLLNVCSI_FRAC_STEP     ,PLLNVCSI FRAC STEP"
textline "                                              "
group.long 0x670000++0x17
line.long 0x00 "PLLDISPHUB_BASE_0,PLLDISPHUB Base"
bitfld.long 0x00 31. " PLLDISPHUB_BYPASS                       ,PLLDISPHUB bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "  PLLDISPHUB_ENABLE        ,PLLDISPHUB enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. " PLLDISPHUB_REF_DIS                      ,PLLDISPHUB reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "           PLLDISPHUB_FREQ_LOCK     ,PLLDISPHUB frequency lock" "Not locked,Locked"
textline "                                              "
rbitfld.long 0x00 26. " PLLDISPHUB_LOCK                         ,PLLDISPHUB lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "    PLLDISPHUB_DIVP          ,Post divider (divide By N+1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                              "
hexmask.long.byte 0x00 10.--17. 1. " PLLDISPHUB_DIVN                         ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "            PLLDISPHUB_DIVM          ,PLL input divider"
line.long 0x04 "PLLDISPHUB_MISC_0_0,PLLDISPHUB MISC 0"
bitfld.long 0x04 30. " PLLDISPHUB_RESET                        ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "      PLLDISPHUB_EXT_FRU       ,PLLDISPHUB EXT FRU"
textline "                                              "
bitfld.long 0x04 3. " PLLDISPHUB_PTS                          ,Base PLLDISPHUB test output select" "Disabled,FO"
bitfld.long 0x04 0.--1. "      PLLDISPHUB_LOOP_CTRL     ,PLLDISPHUB loop control" "0,1,2,3"
line.long 0x08 "PLLDISPHUB_MISC_1_0,PLLDISPHUB MISC 1"
bitfld.long 0x08 27. " PLLDISPHUB_IDDQ                         ,PLLDISPHUB IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "           PLLDISPHUB_EXT_SUBINT    ,PLLDISPHUB EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x08 0.--15. 1. " PLLDISPHUB_DIVN_FRAC                    ,PLLDISPHUB DIVN FRAC"
line.long 0x0C "PLLDISPHUB_MISC_2_0,PLLDISPHUB MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLDISPHUB_PLL_LD_MEM                   ,PLLDISPHUB PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "            PLLDISPHUB_PLL_LD_MEM    ,PLLDISPHUB PLL LD MEM"
textline "                                              "
hexmask.long.byte 0x0C 8.--15. 1. " PLLDISPHUB_FLL_LD_MEM                   ,PLLDISPHUB FLL LD MEM"
bitfld.long 0x0C 4. "            PLLDISPHUB_FLL_DIV       ,PLLDISPHUB FLL divider" "0,1"
textline "                                              "
bitfld.long 0x0C 0.--2. " PLLDISPHUB_FLL_FRUG                     ,PLLDISPHUB FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLDISPHUB_MISC_3_0,PLLDISPHUB MISC 3"
bitfld.long 0x10 24.--25. " PLLDISPHUB_VREG10V_CTRL                 ,PLLDISPHUB VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "             PLLDISPHUB_SETUP         ,PLLDISPHUB setup"
textline "                                              "
bitfld.long 0x10 4.--5. " PLLDISPHUB_LDIV                         ,PLLDISPHUB LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "             PLLDISPHUB_PLL_LD_TOL    ,PLLDISPHUB PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLDISPHUB_MISC_4_0,PLLDISPHUB MISC 4"
bitfld.long 0x14 28. " PLLDISPHUB_SEL_IREF                     ,PLLDISPHUB select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "  PLLDISPHUB_KP_LO         ,PLLDISPHUB KP low" "0,1,2,3,4,5,6,7"
textline "                                              "
bitfld.long 0x14 22.--24. " PLLDISPHUB_KP_HI                        ,PLLDISPHUB KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "             PLLDISPHUB_KP_STEP_TIMER ,PLLDISPHUB KP step timer" "0,1,2,3,4,5,6,7"
textline "                                              "
bitfld.long 0x14 16.--18. " PLLDISPHUB_FRAC_STEP_TIMER              ,PLLDISPHUB FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "             PLLDISPHUB_FRAC_STEP     ,PLLDISPHUB FRAC STEP"
textline "                                              "
group.long 0x680000++0x17
line.long 0x00 "PLLD3_BASE_0,PLLD3 Base"
bitfld.long 0x00 31. " PLLD3_BYPASS                      ,PLLD3 bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "            PLLD3_ENABLE                       ,PLLD3 enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. " PLLD3_REF_DIS                     ,PLLD3 reference clock disable" "No,Yes"
rbitfld.long 0x00 28. "                     PLLD3_FREQLOCK                     ,PLLD3 frequency lock" "Not locked,Locked"
textline "                                              "
rbitfld.long 0x00 27. " PLLD3_LOCK                        ,PLLD3 lock" "Not locked,Locked"
bitfld.long 0x00 25.--26. "              PLLD3_REF_SRC_SEL                  ,PLLD3 referency source select" "Osc_div_clk,PLLREFE_CLKOUT,,PLLREFE_CLKOUT"
textline "                                              "
bitfld.long 0x00 24. " PLLD3_LOCK_OVERRIDE               ,Forces PLL lock to 1" "Not locked,Locked"
bitfld.long 0x00 19.--23. "              PLLD3_PDIV                         ,PL divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                              "
bitfld.long 0x00 18. " PLLD3_IDDQ                        ,PLLD3 IDDQ" "Off,On"
bitfld.long 0x00 16. "                     PLLD3_PTS                          ,Base PLLD3 test output select" "Disabled,FO"
textline "                                              "
hexmask.long.byte 0x00 8.--15. 1. " PLLD3_NDIV                        ,N divider"
hexmask.long.byte 0x00 0.--7. 1. "                      PLLD3_MDIV                         ,M divider"
line.long 0x04 "PLLD3_MISC_0,PLLD3 MISC 0"
bitfld.long 0x04 30. " PLLD3_EN_LCKDET                   ,PLLD3 enable lock detection" "Disabled,Enabled"
bitfld.long 0x04 25.--26. "                PLLD3_KCP                          ,Charge pump gain control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 24. " PLLD3_KVCO                        ,VCO gain" "0,1"
hexmask.long.tbyte 0x04 0.--23. 1. "                       PLLD3_SETUP                        ,Setup"
line.long 0x08 "PLLD3_MISC1_0,PLLD3 MISC 1"
bitfld.long 0x08 13.--14. " PLLD3_VREG14V_CTRL                ,PLLD3 Voltage regulator control" "0,1,2,3"
bitfld.long 0x08 11.--12. "                       PLLD3_VREG10V_CTRL                 ,PLLD3 Voltage regulator control" "0,1,2,3"
textline "                                              "
bitfld.long 0x08 10. " PLLD3_BG_EN                       ,PLLD3 BANDGAP enable" "Disabled,Enabled"
line.long 0x0C "PLLD3_SS_CFG_0,PLLD3 SS Config"
bitfld.long 0x0C 31. " PLLD3_EN_LCKDET                   ,PLLD3 enable lock detection" "Disabled,Enabled"
bitfld.long 0x0C 30. "                PLLD3_EN_SSC                       ,PLLD3 enable SSC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 29. " PLLD3_EN_DITHER2                  ,PLLD3 enable dither2" "Disabled,Enabled"
bitfld.long 0x0C 28. "                PLLD3_EN_DITHER                    ,PLLD3 enable dither" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 27. " PLLD3_SDM_RESET                   ,PLLD3 SDM reset" "No reset,Reset"
rbitfld.long 0x0C 23.--25. "                PLLD3_SDM_TEST_OUT                 ,PLLD3 SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLD3_SS_CTRL1_0,PLLD3 SS Control 1"
hexmask.long.word 0x10 16.--31. 1. " PLLD3_SDM_SSC_MAX                 ,PLLD3 SDM SSC maximum"
hexmask.long.word 0x10 0.--15. 1. "                    PLLD3_SDM_SSC_MIN                  ,PLLD3 SDM SSC minimum"
line.long 0x14 "PLLD3_SS_CTRL2_0,PLLD3 SS Control 2"
hexmask.long.word 0x14 16.--31. 1. " PLLD3_SDM_SSC_STEP                ,PLLD3 SDM SSC step"
hexmask.long.word 0x14 0.--15. 1. "                    PLLD3_SDM_DIN                      ,PLLD3 SDM DIN"
group.long 0x690000++0x2B
line.long 0x00 "PLLMSB_BASE_0,PLLMSB Base"
bitfld.long 0x00 31. " PLLMSB_BYPASSPLL                  ,PLLMSB BYPASSPLL" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "            PLLMSB_ENABLE                      ,PLLMSB enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. " PLLMSB_REF_DIS                    ,PLLMSB reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "                     PLLMSB_LOCK                        ,PLLMSB lock (phase + frequency)" "Not locked,Locked"
textline "                                              "
rbitfld.long 0x00 26. " PLLMSB_FREQ_LOCK                  ,PLLMSB frequency lock (Only frequency)" "Not locked,Locked"
bitfld.long 0x00 20.--24. "              PLLMSB_DIVP                        ,PLL post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                              "
hexmask.long.byte 0x00 8.--15. 1. " PLLMSB_DIVN                       ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "                      PLLMSB_DIVM                        ,PLL input divider"
line.long 0x04 "PLLMSB_MISC1_0,PLLMSB MISC 1"
hexmask.long.tbyte 0x04 0.--23. 1. " PLLMSB_SETUP                      ,Setup fields"
line.long 0x08 "PLLMSB_MISC2_0,PLLMSB MISC 2"
bitfld.long 0x08 16.--17. " PLLMSB_VREG14V_CTRL               ,PLLMSB voltage regulator control" "0,1,2,3"
bitfld.long 0x08 14.--15. "                       PLLMSB_VREG10V_CTRL                ,PLLMSB voltage regulator control" "0,1,2,3"
textline "                                              "
bitfld.long 0x08 13. " PLLMSB_OVERRIDE_SYNCMUX           ,Overrides SVNCMUX gltchless mechanism" "0,1"
bitfld.long 0x08 12. "                       PLLMSB_VCO_SEL                     ,Select B/W PLLMA PLLMB using synchronization mux control" "0,1"
textline "                                              "
bitfld.long 0x08 11. " PLLMSB_SYNC_MUX_CTRL              ,Controls clkoutp/n" "0,1"
bitfld.long 0x08 10. "                       PLLMSB_ENABLE_SW_OVERRIDE          ,Let SW override values on clamp/bypass vs hardware FSM control" "Hardware,Software"
textline "                                              "
bitfld.long 0x08 8.--9. " PLLMSB_PTS                        ,Adding back a PTS field for external mux" "Disabled,FO,?..."
bitfld.long 0x08 5. "                PLLMSB_IDDQ                        ,PLLMSB IDDQ" "0,1"
textline "                                              "
bitfld.long 0x08 4. " PLLMSB_EN_LCKDET                  ,PLLMSB enable lock detection" "Disabled,Enabled"
bitfld.long 0x08 3. "                PLLMSB_LOCK_OVERRIDE               ,Forces lock to 1" "Not locked,Locked"
textline "                                              "
bitfld.long 0x08 1.--2. " PLLMSB_KCP                        ,Charge pump gain control" "0,1,2,3"
bitfld.long 0x08 0. "                       PLLMSB_KVCO                        ,VCO gain" "0,1"
line.long 0x0C "PLLMSBB_BASE_0,PLLMSBB Base"
bitfld.long 0x0C 30. " PLLMSBB_ENABLE                    ,PLLMSBB enable" "Disabled,Enabled"
rbitfld.long 0x0C 27. "                PLLMSBB_LOCK                       ,PLLMSBB lock (phase and frequency)" "Not locked,Locked"
textline "                                              "
rbitfld.long 0x0C 26. " PLLMSBB_FREQ_LOCK                 ,PLLMSBB frequency lock (Only frequency)" "Not locked,Locked"
bitfld.long 0x0C 20.--24. "              PLLMSBB_DIVP                       ,PLL post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                              "
hexmask.long.byte 0x0C 8.--15. 1. " PLLMSBB_DIVN                      ,PLL feedback divider"
hexmask.long.byte 0x0C 0.--7. 1. "                      PLLMSBB_DIVM                       ,PLL input divider"
line.long 0x10 "PLLMSBB_MISC1_0,PLLMSBB MISC 1"
bitfld.long 0x10 26. " PLLMSBB_LOCK_OVERRIDE             ,Forces lock to 1" "Not locked,Locked"
bitfld.long 0x10 25. "              PLLMSBB_IDDQ                       ,PLLMSBB IDDQ" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 24. " PLLMSBB_EN_LCKDET                 ,PLLMSBB enable lock detection" "Disabled,Enabled"
hexmask.long.tbyte 0x10 0.--23. 1. "                PLLMSBB_SETUP                      ,Setup fields"
line.long 0x14 "PLLMSB_SS_CFG_0 ,PLLMSB SS Config"
bitfld.long 0x14 31. " PLLMSB_EN_SDM                     ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x14 30. "                PLLMSB_EN_SSC                      ,Spread spectrum enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 29. " PLLMSB_EN_DITHER2                 ,PLLMSB enable dither2" "Disabled,Enabled"
bitfld.long 0x14 28. "                PLLMSB_EN_DITHER                   ,PLLMSB enable dither" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 27. " PLLMSB_SDM_RESET                  ,PLLMSB SDM reset" "No reset,Reset"
rbitfld.long 0x14 23.--25. "                PLLMSB_SDM_TEST_OUT                ,PLLMSB SDM test out" "0,1,2,3,4,5,6,7"
line.long 0x18 "PLLMSB_SS_CTRL1_0,PLLMSB SS Control 1"
hexmask.long.word 0x18 16.--31. 1. " PLLMSB_SDM_SSC_MAX                ,PLLMSB SDM SSC maximum"
hexmask.long.word 0x18 0.--15. 1. "                    PLLMSB_SDM_SSC_MIN                 ,PLLMSB SDM SSC minimum"
line.long 0x1C "PLLMSB_SS_CTRL2_0 ,PLLMSB SS Control 2"
hexmask.long.word 0x1C 16.--31. 1. " PLLMSB_SDM_SSC_STEP               ,PLLMSB SDM SSC STEP"
hexmask.long.word 0x1C 0.--15. 1. "                    PLLMSB_SDM_DIN                     ,PLLMSB SDM DIN"
line.long 0x20 "PLLMSBB_SS_CFG_0,PLLMSBB SS Config"
bitfld.long 0x20 31. " PLLMSBB_EN_SDM                    ,Fractional N divider enable" "Disabled,Enabled"
bitfld.long 0x20 30. "                PLLMSBB_EN_SSC                     ,Spread spectrum enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x20 29. " PLLMSBB_EN_DITHER2                ,PLLMSBB enable dither2" "Disabled,Enabled"
bitfld.long 0x20 28. "                PLLMSBB_EN_DITHER                  ,PLLMSBB enable dither" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x20 27. " PLLMSBB_SDM_RESET                 ,PLLMSBB SDM reset" "No reset,Reset"
line.long 0x24 "PLLMSBB_SS_CTRL1_0,PLLMSBB SS Control 1"
hexmask.long.word 0x24 16.--31. 1. " PLLMSBB_SDM_SSC_MAX               ,PLLMSBB SDM SSC maximum"
hexmask.long.word 0x24 0.--15. 1. "                    PLLMSBB_SDM_SSC_MIN                ,PLLMSBB SDM SSC minimum"
line.long 0x28 "PLLMSBB_SS_CTRL2_0,PLLMSBB SS Control 2"
hexmask.long.word 0x28 16.--31. 1. " PLLMSBB_SDM_SSC_STEP              ,PLLMSBB SDM SSC step"
hexmask.long.word 0x28 0.--15. 1. "                    PLLMSBB_SDM_DIN                    ,PLLMSBB SDM DIN"
group.long 0x6A0000++0x03
line.long 0x00 "RST_DEV_AXI_CBB_0_SET/CLR,Reset Device AXI CBB"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_JTAG2AXI_RST                  ,Reset JTAG2AXI" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "                SWR_GPCDMA_RST                     ,Reset GPCDMA" "Disabled,Enabled"
group.long 0x6A3000++0x03
line.long 0x00 "CLK_SOURCE_AXI_CBB_0,Clock Source AXI CBB"
bitfld.long 0x00 29.--31. " AXI_CBB_CLK_SRC                   ,AXI CBB clock source" "PLLP_OUT0,DFLL_AXI_CBB,PLLREFE_OUT,PLLC2_OUT0,,PLLC4_MUXED,CLK_M,CLK_S"
hexmask.long.byte 0x00 0.--7. 1. "            AXI_CBB_CLK_DIVISOR                ,AXI CBB clock divisor"
group.long 0x6A3004++0x07
line.long 0x00 "AXI_CBB_SUPER_CLK_DIVIDER_SW_CFG_0,AXI CBB Super Clock Divider Software Config"
bitfld.long 0x00 31. " SUPER_AXI_CBB_DIV_SW_ENB          ,Super AXI CBB divider software enable" "Disabled,Enabled"
bitfld.long 0x00 30. "                SUPER_AXI_CBB_DIV_SW_OVRD          ,Software controls the skipper irrespective of hardware trigger" "Disabled,Enabled"
textline "                                              "
hexmask.long.byte 0x00 8.--15. 1. " SUPER_AXI_CBB_DIV_SW_DIVIDEND     ,Super AXI CBB divider software dividend"
hexmask.long.byte 0x00 0.--7. 1. "                      SUPER_AXI_CBB_DIV_SW_DIVISOR       ,Super AXI CBB divider software divisor"
line.long 0x04 "AXI_CBB_SUPER_CLK_DIVIDER_HW_CFG_0,AXI CBB Super Clock Divider Hardware Config"
hexmask.long.byte 0x04 8.--15. 1. " SUPER_AXI_CBB_DIV_HW_DIVIDEND     ,Super AXI CBB divider hardware dividend"
hexmask.long.byte 0x04 0.--7. 1. "                      SUPER_AXI_CBB_DIV_HW_DIVISOR       ,Super AXI CBB divider hardware divisor"
group.long 0x6B0000++0x03
line.long 0x00 "AXI_CBB_CENTRAL_SUPER_CLK_DIVIDER_0,AXI CBB CENTRAL Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_CENTRAL_DIV_ENB     ,Super AXI CBB central divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_CENTRAL_DIV_DIVIDEND ,Super AXI CBB central divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_CENTRAL_DIV_DIVISOR ,Super AXI CBB central divider divisor"
group.long 0x6C0000++0x03
line.long 0x00 "AXI_CBB_AON_SUPER_CLK_DIVIDER_0,AXI CBB AON Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_AON_DIV_ENB     ,Super AXI CBB AON divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_AON_DIV_DIVIDEND ,Super AXI CBB AON divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_AON_DIV_DIVISOR ,Super AXI CBB AON divider divisor"
group.long 0x6D0000++0x03
line.long 0x00 "AXI_CBB_PCIE_SUPER_CLK_DIVIDER_0,AXI CBB PCIE Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_PCIE_DIV_ENB     ,Super AXI CBB PCIE divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_PCIE_DIV_DIVIDEND ,Super AXI CBB PCIE divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_PCIE_DIV_DIVISOR ,Super AXI CBB PCIE divider divisor"
group.long 0x6E0000++0x03
line.long 0x00 "AXI_CBB_CCPLEX_SUPER_CLK_DIVIDER_0,AXI CBB CCPLEX Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_CCPLEX_DIV_ENB     ,Super AXI CBB CCPLEX divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_CCPLEX_DIV_DIVIDEND ,Super AXI CBB CCPLEX divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_CCPLEX_DIV_DIVISOR ,Super AXI CBB CCPLEX divider divisor"
group.long 0x6F0000++0x03
line.long 0x00 "AXI_CBB_GPU_SUPER_CLK_DIVIDER_0,AXI CBB GPU Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_GPU_DIV_ENB     ,Super AXI CBB GPU divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_GPU_DIV_DIVIDEND ,Super AXI CBB GPU divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_GPU_DIV_DIVISOR ,Super AXI CBB GPU divider divisor"
group.long 0x700000++0x03
line.long 0x00 "AXI_CBB_APE_SUPER_CLK_DIVIDER_0,AXI CBB APE Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_APE_DIV_ENB     ,Super AXI CBB APE divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_APE_DIV_DIVIDEND ,Super AXI CBB APE divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_APE_DIV_DIVISOR ,Super AXI CBB APE divider divisor"
group.long 0x710000++0x03
line.long 0x00 "AXI_CBB_BPMP_SUPER_CLK_DIVIDER_0,AXI CBB BPMP Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_BPMP_DIV_ENB     ,Super AXI CBB BPMP divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_BPMP_DIV_DIVIDEND ,Super AXI CBB BPMP divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_BPMP_DIV_DIVISOR ,Super AXI CBB BPMP divider divisor"
group.long 0x720000++0x03
line.long 0x00 "AXI_CBB_SCE_SUPER_CLK_DIVIDER_0,AXI CBB SCE Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_SCE_DIV_ENB     ,Super AXI CBB SCE divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_SCE_DIV_DIVIDEND ,Super AXI CBB SCE divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_SCE_DIV_DIVISOR ,Super AXI CBB SCE divider divisor"
group.long 0x730000++0x03
line.long 0x00 "AXI2APB_1_SUPER_CLK_DIVIDER_0,AXI2APB 1 SUPER Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI2APB_1_DIV_ENB           ,Super AXI2APB 1 divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI2APB_1_DIV_DIVIDEND       ,Super AXI2APB 1 divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI2APB_1_DIV_DIVISOR       ,Super AXI2APB 1 divider divisor"
group.long 0x740000++0x03
line.long 0x00 "AXI2APB_2_SUPER_CLK_DIVIDER_0,AXI2APB 2 SUPER Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI2APB_2_DIV_ENB           ,Super AXI2APB 2 divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI2APB_2_DIV_DIVIDEND       ,Super AXI2APB 2 divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI2APB_2_DIV_DIVISOR       ,Super AXI2APB 2 divider divisor"
group.long 0x750000++0x03
line.long 0x00 "AXI2APB_3_SUPER_CLK_DIVIDER_0,AXI2APB 3 SUPER Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI2APB_3_DIV_ENB           ,Super AXI2APB 3 divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI2APB_3_DIV_DIVIDEND       ,Super AXI2APB 3 divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI2APB_3_DIV_DIVISOR       ,Super AXI2APB 3 divider divisor"
group.long 0x760000++0x03
line.long 0x00 "AXI2APB_4_SUPER_CLK_DIVIDER_0,AXI2APB 4 SUPER Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI2APB_4_DIV_ENB           ,Super AXI2APB 4 divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI2APB_4_DIV_DIVIDEND       ,Super AXI2APB 4 divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI2APB_4_DIV_DIVISOR       ,Super AXI2APB 4 divider divisor"
group.long 0x770000++0x03
line.long 0x00 "AXI2APB_5_SUPER_CLK_DIVIDER_0,AXI2APB 5 SUPER Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI2APB_5_DIV_ENB           ,Super AXI2APB 5 divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI2APB_5_DIV_DIVIDEND       ,Super AXI2APB 5 divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI2APB_5_DIV_DIVISOR       ,Super AXI2APB 5 divider divisor"
group.long 0x780000++0x03
line.long 0x00 "AXI_CBB_HOST1X_SUPER_CLK_DIVIDER_0,AXI CBB HOST1X Super Clock Divider"
bitfld.long 0x00 31. " SUPER_AXI_CBB_HOST1X_DIV_ENB      ,Super AXI CBB HOST1X divider enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "                SUPER_AXI_CBB_HOST1X_DIV_DIVIDEND  ,Super AXI CBB HOST1X divider dividend"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " SUPER_AXI_CBB_HOST1X_DIV_DIVISOR  ,Super AXI CBB HOST1X divider divisor"
group.long 0x7B2000++0x03
line.long 0x00 "CLK_SOURCE_DMIC3_0,Clock Source DMIC3"
bitfld.long 0x00 29.--31. " DMIC3_CLK_SRC                     ,DMIC3 Clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DMIC3_CLK_DIVISOR                  ,DMIC3 Clock divisor"
group.long 0x7B3000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DMIC3_0,Audio Synchronization Clock DMIC3"
bitfld.long 0x00 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                      ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x7C2000++0x03
line.long 0x00 "CLK_SOURCE_DMIC4_0,Clock Source DMIC4"
bitfld.long 0x00 29.--31. " DMIC4_CLK_SRC                     ,DMIC4 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,CLK_M,PLLP_OUT0,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DMIC4_CLK_DIVISOR                  ,DMIC4 clock divisor"
group.long 0x7C3000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DMIC4_0,Audio Synchronization clock DMIC4"
bitfld.long 0x00 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                      ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,EXT_VIMCLK,?..."
group.long 0x7D2000++0x03
line.long 0x00 "CLK_SOURCE_DSPK1_0,Clock Source DSPK1"
bitfld.long 0x00 29.--31. " DSPK1_CLK_SRC                     ,DSPK1 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DSPK1_CLK_DIVISOR                  ,DSPK1 clock divisor"
group.long 0x7D3000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DSPK1_0,Audio Synchronization Clock DSPK1"
bitfld.long 0x00 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                      ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x7E2000++0x03
line.long 0x00 "CLK_SOURCE_DSPK2_0,Clock Source DSPK2"
bitfld.long 0x00 29.--31. " DSPK2_CLK_SRC                     ,DSPK2 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              DSPK2_CLK_DIVISOR                  ,DSPK2 clock divisor"
group.long 0x7E3000++0x03
line.long 0x00 "AUDIO_SYNC_CLK_DSPK2_0,Audio Synchronization clock DSPK2"
bitfld.long 0x00 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x00 0.--3. "                     SYNC_CLK_RATE                      ,Synchronization clock rate" ",I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x7F2000++0x07
line.long 0x00 "CLK_SOURCE_I2S6_0,Clock Source I2S6"
bitfld.long 0x00 29.--31. " I2S6_CLK_SRC                      ,I2S6 clock source" "PLLA_OUT0,PLLA1_OUT1,SYNC_CLK,,PLLP_OUT0,,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "              I2S6_CLK_DIVISOR                   ,I2S6 clock divisor"
line.long 0x04 "AUDIO_SYNC_CLK_I2S6_0,Audio Synchronization Clock I2S6"
bitfld.long 0x04 4. " SYNC_CLK_DIS                      ,Synchronization clock disable" "No,Yes"
bitfld.long 0x04 0.--3. "                     SYNC_CLK_RATE                      ,Synchronization clock rate" "SPDIFIN,I2S1,I2S2,I2S3,I2S4,I2S5,PLLA_OUT0,I2S6,?..."
group.long 0x800000++0x03
line.long 0x00 "RST_DEV_NVDISPLAY0_0_SET/CLR,Reset Device NVDISPLAY0"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. " SWR_NVDISPLAY0_MISC_RST           ,Reset misc uncovered components in nvdisplay" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "                SWR_NVDISPLAY0_WGRP5_RST           ,Reset precomp pipe 5 controller" "Disabled,Enabled"
textline "                                              "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " SWR_NVDISPLAY0_WGRP4_RST          ,Reset precomp pipe 4 controller" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "                SWR_NVDISPLAY0_WGRP3_RST           ,Reset precomp pipe 3 controller" "Disabled,Enabled"
textline "                                              "
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " SWR_NVDISPLAY0_WGRP2_RST          ,Reset precomp pipe 2 controller" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "                SWR_NVDISPLAY0_WGRP1_RST           ,Reset precomp pipe 1 controller" "Disabled,Enabled"
textline "                                              "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " SWR_NVDISPLAY0_WGRP0_RST          ,Reset precomp pipe 0 controller" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "                SWR_NVDISPLAY0_HEAD2_RST           ,Reset NVDISPLAY02 controller" "Disabled,Enabled"
textline "                                              "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_NVDISPLAY0_HEAD1_RST          ,Reset NVDISPLAY01 controller" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                SWR_NVDISPLAY0_HEAD0_RST           ,Reset NVDISPLAY00 controller" "Disabled,Enabled"
group.long 0x801000++0x03
line.long 0x00 "CLK_OUT_ENB_NVDISPLAY0_0_SET/CLR,Clock Out Enable NVDISPLAY0"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLK_ENB_NVDISPLAYHUB              ,Enable clock to NVDISPLAY0 HUB controller" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "                CLK_ENB_NVDISPLAY_DSC              ,Enable clock to NVDISPLAY0 DSC controller" "Disabled,Enabled"
textline "                                              "
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_NVDISPLAY_DISP            ,Enable clock to NVDISPLAY0 display clock controller" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                CLK_ENB_NVDISPLAY_P0               ,Enable clock to NVDISPLAY P0 clock controller" "Disabled,Enabled"
group.long 0x803000++0x03
line.long 0x00 "CLK_SOURCE_NVDISPLAY_P0_0,Clock Source NVDISPLAY P0"
bitfld.long 0x00 29.--31. " NVDISPLAY_P0_CLK_SRC              ,NVDISPLAY P0 clock source" "PLLP_OUT0,PLLD_OUT1,,PLLD2_OUT0,PLLD3_OUT0,CLK_M,PLLD_OUT2,?..."
bitfld.long 0x00 8. "              NVDISPLAY_DSC_CLK_DIV2_SEL         ,Only divider by 2 is needed" "Disabled,Enabled"
textline "                                              "
hexmask.long.byte 0x00 0.--7. 1. " NVDISPLAY_P0_CLK_DIVISOR          ,NVDISPLAY P0 clock divisor"
group.long 0x804000++0x03
line.long 0x00 "CLK_SOURCE_NVDISPLAY_DISP_0,Clock Source NVDISPLAY DISP"
hexmask.long.byte 0x00 24.--31. 1. " NVDISPLAY_DISP_CLK_SRC            ,NVDISPLAY DISP clock source"
hexmask.long.byte 0x00 0.--7. 1. "                      NVDISPLAY_DISP_CLK_DIVISOR         ,NVDISPLAY display clock divisor"
group.long 0x805000++0x03
line.long 0x00 "CLK_SOURCE_NVDISPLAYHUB_0,Clock Source NVDISPLAYHUB"
bitfld.long 0x00 29.--31. " NVDISPLAYHUB_CLK_SRC              ,NVDISPLAYHUB clock source" "PLLP_OUT0,PLLDISPHUB,,,CLK_M,DFLLDISP,CLK_S,?..."
hexmask.long.byte 0x00 0.--7. 1. "              NVDISPLAYHUB_CLK_DIVISOR           ,NVDISPLAYHUB clock divisor"
group.long 0x812000++0x03
line.long 0x00 "CLK_SOURCE_NVDISPLAY_P1_0,Clock Source NVDISPLAY P1"
bitfld.long 0x00 29.--31. " NVDISPLAY_P1_CLK_SRC              ,NVDISPLAY P1 clock source" "PLLP_OUT0,PLLD_OUT1,PLLD2_OUT0,PLLD3_OUT0,CLK_M,,PLLD_OUT2,?..."
hexmask.long.byte 0x00 0.--7. 1. "              NVDISPLAY_P1_CLK_DIVISOR           ,NVDISPLAY P1 clock divisor"
group.long 0x822000++0x03
line.long 0x00 "CLK_SOURCE_NVDISPLAY_P2_0,Clock Source NVDISPLAY P2"
bitfld.long 0x00 29.--31. " NVDISPLAY_P2_CLK_SRC              ,NVDISPLAY P2 clock source" "PLLP_OUT0,PLLD_OUT1,PLLD2_OUT0,PLLD3_OUT0,CLK_M,,PLLD_OUT2,?..."
hexmask.long.byte 0x00 0.--7. 1. "              NVDISPLAY_P2_CLK_DIVISOR           ,NVDISPLAY P2 clock divisor"
group.long 0x843000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL0_0,Clock Source GPIO CTL0"
bitfld.long 0x00 29.--31. " GPIO_CTL0_CLK_SRC                 ,GPIO CTL0 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               GPIO_CTL0_CLK_DIVISOR              ,GPIO CTL0 clock divisor"
group.long 0x853000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL1_0,Clock Source GPIO CTL1"
bitfld.long 0x00 29.--31. " GPIO_CTL1_CLK_SRC                 ,GPIO CTL1 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               GPIO_CTL1_CLK_DIVISOR              ,GPIO CTL1 clock divisor"
group.long 0x863000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL2_0,Clock Source GPIO CTL2"
bitfld.long 0x00 29.--31. " GPIO_CTL2_CLK_SRC                 ,GPIO CTL2 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               GPIO_CTL2_CLK_DIVISOR              ,GPIO CTL2 clock divisor"
group.long 0x873000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL3_0,Clock Source GPIO CTL3"
bitfld.long 0x00 29.--31. " GPIO_CTL3_CLK_SRC                 ,GPIO CTL3 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               GPIO_CTL3_CLK_DIVISOR              ,GPIO CTL3 clock divisor"
group.long 0x883000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL4_0,Clock Source GPIO CTL4"
bitfld.long 0x00 29.--31. " GPIO_CTL4_CLK_SRC                 ,GPIO CTL4 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               GPIO_CTL4_CLK_DIVISOR              ,GPIO CTL4 clock divisor"
group.long 0x893000++0x03
line.long 0x00 "CLK_SOURCE_TACH_0,Clock Source TACH"
bitfld.long 0x00 29.--31. " TACH_CLK_SRC                 ,TACH clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "               TACH_CLK_DIVISOR              ,TACH clock divisor"
group.long 0x8A3000++0x0B
line.long 0x00 "CLK_SOURCE_EQOS_AXI_CLK_0,Clock Source EQOS AXI Clock"
hexmask.long.byte 0x00 8.--15. 1. " EQOS_AXI_CLK_DIVISOR              ,EQOS AXI clock divisor"
line.long 0x04 "CLK_SOURCE_EQOS_PTP_REF_CLK_0,Clock Source EQOS PTP Reference Clock"
hexmask.long.byte 0x04 8.--15. 1. " EQOS_PTP_REF_CLK_DIVISOR          ,EQOS PTP Reference clock divisor"
line.long 0x08 "CLK_SOURCE_EQOS_TX_CLK_0,Clock Source EQOS TX Clock"
hexmask.long.word 0x08 8.--16. 1. " EQOS_TX_CLK_DIVISOR               ,EQOS TX clock divisor"
textline "                                                            "
width 31.
group.long 0x8C0000++0x03
line.long 0x00 "RST_DEV_EMCSB_0_SET/CLR,Reset Device EMCSB"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_MEM_RST                        ,This bit is disabled for security reasons" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        SWR_EMC_RST                         ,Reset EMC controller" "Disabled,Enabled"
group.long 0x8C1000++0x03
line.long 0x00 "CLK_OUT_ENB_EMCSB_0_SET/CLR,Clock Out Enable EMCSB"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. " CLK_ENB_MCHUBSB                    ,Enable clock - MC Hub side B" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "        CLK_ENB_MC3                         ,Enable clock to MC3" "Disabled,Enabled"
textline "                                        "
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " CLK_ENB_EMCSB_IOBIST               ,Enable clock to EMCSB IOBIST" "Disabled,Enabled"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "        CLK_ENB_EMCSB_LATENCY               ,Enable clock to EMCSB latency" "Disabled,Enabled"
textline "                                        "
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CLK_ENB_MC_BBC                     ,Enable clock - MC bbc" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "        CLK_ENB_EMC_DLL                     ,Enable clock - EMC DLL" "Disabled,Enabled"
textline "                                        "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLK_ENB_EMC                        ,Enable clock to MC/EMC controller" "Disabled,Enabled"
group.long 0x8C3000++0x17
line.long 0x00 "CLK_SOURCE_EMCSB_0,Clock Source EMCSB"
bitfld.long 0x00 29.--31. " EMC_2X_CLK_SRC                     ,EMC 2X Clock source" "PLLM_OUT0,,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
bitfld.long 0x00 27. "      FORCE_CC_TRIGGER                    ,Force a trigger of clock change sequence" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 26. " EMC_INVERT_DCD                     ,EMC invert duty-cycle distortion" "Disabled,Enabled"
bitfld.long 0x00 25. "        USE_32KHZ_AS_CLK_M                  ,USE 32KHZ as CLK_M" "False,True"
textline "                                        "
bitfld.long 0x00 20. " PLLC_OUT_FOR_EMC_EN                ,Should not be used for parker" "Disabled,Enabled"
bitfld.long 0x00 16. "        MC_EMC_SAME_FREQ                    ,MC is the same frequency of EMC" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. " EMC_CLK_DIV2_EN                    ,EMCCLK is the DIV2 frequency of DRAM clock" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "        EMC_2X_CLK_DIVISOR                  ,EMC 2X clock divisor"
line.long 0x04 "CLK_SOURCE_EMCSB_LATENCY_0,Clock Source EMCSB Latency"
bitfld.long 0x04 29.--31. " EMC_LATENCY_CLK_SRC                ,EMC latency clock source" ",,PLLP_OUT0,CLK_M,?..."
hexmask.long.byte 0x04 0.--7. 1. "       EMC_LATENCY_CLK_DIVISOR             ,EMC latency clock divisor"
line.long 0x08 "CLK_SOURCE_EMCSB_DLL_0,Clock Source EMCSB DLL"
bitfld.long 0x08 29.--31. " EMC_DLL_CLK_SRC                    ,EMC DLL clock source" "PLLM_OUT0,,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
bitfld.long 0x08 10.--11. "      DDLL_CLK_SEL                        ,DLL selects one of the 4 inputs listed in ENUM" "PLLM_VCOA,PLLM_VCOB,EMC_DLL_SWITCH_OUT,?..."
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. " EMC_DLL_CLK_DIVISOR                ,EMC DLL clock divisor"
line.long 0x0C "EMCSB_DIV_CLK_SHAPER_CTRL_0,EMCSB Divider Clock Shaper Control"
bitfld.long 0x0C 31. " Enabled_EMC_DIV_SHAPER             ,Enable EMC divider shaper" "Disabled,Enabled"
bitfld.long 0x0C 11. "        EMC_DIV_CLK_SHAPER_N0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                        "
bitfld.long 0x0C 10. " EMC_DIV_CLK_SHAPER_N1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x0C 9. "               EMC_DIV_CLK_SHAPER_P0               ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                        "
bitfld.long 0x0C 8. " EMC_DIV_CLK_SHAPER_P1              ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x0C 7. "               EMC_DIV_CLK_SHAPER_CTRL_TRIM_SELECT ,Controls programmable register EMC_PLLC_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                        "
bitfld.long 0x0C 6. " EMC_DIV_CLK_SHAPER_CTRL_SW_BYPASS  ,EMC divider clock shaper control SW bypass" "Active,Bypassed"
bitfld.long 0x0C 5. "        EMC_DIV_CLK_SHAPER_CTRL_DF          ,EMC divider clock shaper control DF" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 3.--4. " EMC_DIV_CLK_SHAPER_CTRL_FALL_DELAY ,EMC divider clock shaper control fall delay" "0,1,2,3"
bitfld.long 0x0C 2. "               EMC_DIV_CLK_SHAPER_CTRL_DR          ,EMC divider clock shaper control DR" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 0.--1. " EMC_DIV_CLK_SHAPER_CTRL_RISE_DELAY ,EMC divider clock shaper control rise delay" "0,1,2,3"
line.long 0x10 "EMCSB_PLLC_SHAPER_CTRL_0,EMCSB PLLC Shaper Control"
bitfld.long 0x10 31. " Enabled_EMC_PLLC_SHAPER            ,Enable EMC PLLC shaper" "Disabled,Enabled"
bitfld.long 0x10 11. "        EMC_PLLC_SHAPER_N0                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                        "
bitfld.long 0x10 10. " EMC_PLLC_SHAPER_N1                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x10 9. "               EMC_PLLC_SHAPER_P0                  ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
textline "                                        "
bitfld.long 0x10 8. " EMC_PLLC_SHAPER_P1                 ,Adjust duty cycle in step sizes smaller that delay of inverter" "0,1"
bitfld.long 0x10 7. "               EMC_PLLC_SHAPER_CTRL_TRIM_SELECT    ,Controls programmable register EMC_PLLC_SHAPER_CTRL[5:0]" "Default,Software"
textline "                                        "
bitfld.long 0x10 6. " EMC_PLLC_SHAPER_CTRL_SW_BYPASS     ,EMC PLLC shaper control SW bypass" "Active,Bypassed"
bitfld.long 0x10 5. "        EMC_PLLC_SHAPER_CTRL_DF             ,EMC PLLC shaper control DF" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x10 3.--4. " EMC_PLLC_SHAPER_CTRL_FALL_DELAY    ,EMC PLLC shaper control fall delay" "0,1,2,3"
bitfld.long 0x10 2. "               EMC_PLLC_SHAPER_CTRL_DR             ,EMC PLLC shaper control DR" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x10 0.--1. " EMC_PLLC_SHAPER_CTRL_RISE_DELAY    ,EMC PLLC shaper control rise delay" "0,1,2,3"
line.long 0x14 "CLK_SOURCE_EMCSB_SAFE_0,Clock Source EMCSB SAFE 0"
bitfld.long 0x14 29.--31. " EMC_2X_SAFE_CLK_SRC                ,EMC 2X safe clock source" "PLLM_OUT0,PLLC_OUT0,PLLP_OUT0,CLK_M,PLLM_UD,PLLMB_UD,PLLMB_OUT0,PLLP_UD"
hexmask.long.byte 0x14 0.--7. 1. "      EMC_2X_SAFE_CLK_DIVISOR             ,EMC 2X safe clock divisor"
group.long 0x8C4000++0x03
line.long 0x00 "CLK_SPARE_EMCB_0,Clock SPARE EMCB 0"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_EMCB                 ,Clock spare register EMCB"
group.long 0x8D0000++0x03
line.long 0x00 "RST_DEV_UFS_0_SET/CLR,Reset Device UFS"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_UFSHC_AXI_M_RST                ,Reset UFS Controller" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        SWR_UFSHC_LP_RST                    ,Reset UFS Controller" "Disabled,Enabled"
group.long 0x8D1000++0x03
line.long 0x00 "CLK_OUT_ENB_UFS_0_SET/CLR,Clock Out Enable UFS"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " CLK_ENB_UFSDEV_REF                 ,Enable clock to UFS Controller" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        CLK_ENB_UFSHC                       ,Enable clock to UFS Controller" "Disabled,Enabled"
group.long 0x8D3000++0x07
line.long 0x00 "CLK_SOURCE_UFSHC_CG_SYS_0,Clock Source UFSHC CG SYS"
bitfld.long 0x00 29.--31. " UFSHC_CG_SYS_CLK_SRC               ,UFSHC CG SYS clock source" "CLK_M,PLLP_OUT0,,,,PLLREFE_VCOCLK,?..."
hexmask.long.byte 0x00 0.--7. 1. "  UFSHC_CG_SYS_CLK_DIVISOR            ,UFSHC CG SYS clock divisor"
line.long 0x04 "CLK_SOURCE_UFSDEV_REF_0 ,Clock Source UFSDEV Reference"
bitfld.long 0x04 29.--31. " UFSDEV_REF_CLK_SRC                 ,UFSDEV reference clock source" "CLK_M,PLLP_OUT0,,,,PLLREFE_VCOCLK,?..."
bitfld.long 0x04 8. "  UFSDEV_SRC_SEL                      ,UFSDEV source select" "CLK_M,Switch divider output"
textline "                                        "
hexmask.long.byte 0x04 0.--7. 1. " FSDEV_REF_CLK_DIVISOR              ,FSDEV referency clock divisor"
group.long 0x8E3000++0x07
line.long 0x00 "CLK_SOURCE_NVCSI_0,Clock Source NVCSI"
bitfld.long 0x00 29.--31. " NVCSI_CLK_SRC                      ,NVCSI clock source" "PLLP_OUT0,PLLNVCSI_OUT,,,CLK_M,?..."
bitfld.long 0x00 15. "    CSI_EF_DIFF_MUX_SEL                 ,Select control for differential mux feeding PLLD clock to CSI EF brick" "Not selected,Selected"
textline "                                        "
bitfld.long 0x00 14. " CSI_CD_DIFF_MUX_SEL                ,Select control for differential mux feeding PLLD clock to CSI CD brick" "Not selected,Selected"
bitfld.long 0x00 13. "    CSI_AB_DIFF_MUX_SEL                 ,Select control for differential mux feeding PLLD clock to CSI AB brick" "Not selected,Selected"
textline "                                        "
bitfld.long 0x00 12. " CSI_EF_DIFF_MUX_PD                 ,Power down differential mux feeding PLLD clock to CSI EF brick" "Disabled,Enabled"
bitfld.long 0x00 11. "        CSI_CD_DIFF_MUX_PD                  ,Power down differential mux feeding PLLD clock to CSI CD brick" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 10. " CSI_AB_DIFF_MUX_PD                 ,Power down differential mux feeding PLLD clock to CSI AB brick" "Disabled,Enabled"
bitfld.long 0x00 8.--9. "        CSI_PADOUT_SRC                      ,CSI PADOUT source" "CSI_AB_PAD_CLKOUT,CSI_CD_PAD_CLKOUT,CSI_EF_PAD_CLKOUT,PLLD_SLOWCLK_PLL"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. " NVCSI_CLK_DIVISOR                  ,NVCSI clock divisor"
line.long 0x04 "CLK_SOURCE_NVCSILP_0,Clock Source NVCSILP"
bitfld.long 0x04 29.--31. " NVCSILP_CLK_SRC                    ,NVCSILP clock source" "PLLP_OUT0,,,,CLK_M,?..."
hexmask.long.byte 0x04 0.--7. 1. "       NVCSILP_CLK_DIVISOR                 ,NVCSILP clock divisor"
group.long 0x8F3000++0x03
line.long 0x00 "CLK_SOURCE_I2C7_0,Clock Source I2C7 0"
bitfld.long 0x00 29.--31. " I2C7_CLK_SRC                       ,I2C7 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "       I2C7_CLK_DIVISOR                    ,I2C7 clock divisor"
group.long 0x903000++0x03
line.long 0x00 "CLK_SOURCE_I2C9_0,Clock Source I2C9 0"
bitfld.long 0x00 29.--31. " I2C9_CLK_SRC                       ,I2C9 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "       I2C9_CLK_DIVISOR                    ,I2C9 clock divisor"
group.long 0x923000++0x03
line.long 0x00 "CLK_SOURCE_I2C12_0,Clock Source I2C12"
bitfld.long 0x00 29.--31. " I2C12_CLK_SRC                      ,I2C12 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "       I2C12_CLK_DIVISOR                   ,I2C12 clock divisor"
group.long 0x933000++0x03
line.long 0x00 "CLK_SOURCE_I2C13_0,Clock Source I2C13"
bitfld.long 0x00 29.--31. " I2C13_CLK_SRC                      ,I2C13 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "       I2C13_CLK_DIVISOR                   ,I2C13 clock divisor"
group.long 0x943000++0x03
line.long 0x00 "CLK_SOURCE_I2C14_0,Clock Source I2C14"
bitfld.long 0x00 29.--31. " I2C14_CLK_SRC                      ,I2C14 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.word 0x00 0.--15. 1. "       I2C14_CLK_DIVISOR                   ,I2C14 clock divisor"
group.long 0x953000++0x03
line.long 0x00 "CLK_SOURCE_PWM1_0,Clock Source PWM1 0"
bitfld.long 0x00 29.--31. " PWM1_CLK_SRC                       ,PWM1 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM1_CLK_DIVISOR                    ,PWM1 clock divisor"
group.long 0x963000++0x03
line.long 0x00 "CLK_SOURCE_PWM2_0,Clock Source PWM2 0"
bitfld.long 0x00 29.--31. " PWM2_CLK_SRC                       ,PWM2 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM2_CLK_DIVISOR                    ,PWM2 clock divisor"
group.long 0x973000++0x03
line.long 0x00 "CLK_SOURCE_PWM3_0,Clock Source PWM3 0"
bitfld.long 0x00 29.--31. " PWM3_CLK_SRC                       ,PWM3 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM3_CLK_DIVISOR                    ,PWM3 clock divisor"
group.long 0x993000++0x03
line.long 0x00 "CLK_SOURCE_PWM5_0,Clock Source PWM5"
bitfld.long 0x00 29.--31. " PWM5_CLK_SRC                       ,PWM5 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM5_CLK_DIVISOR                    ,PWM5 clock divisor"
group.long 0x9A3000++0x03
line.long 0x00 "CLK_SOURCE_PWM6_0,Clock Source PWM6"
bitfld.long 0x00 29.--31. " PWM6_CLK_SRC                       ,PWM6 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM6_CLK_DIVISOR                    ,PWM6 clock divisor"
group.long 0x9B3000++0x03
line.long 0x00 "CLK_SOURCE_PWM7_0,Clock Source PWM7"
bitfld.long 0x00 29.--31. " PWM7_CLK_SRC                       ,PWM7 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM7_CLK_DIVISOR                    ,PWM7 clock divisor"
group.long 0x9C3000++0x03
line.long 0x00 "CLK_SOURCE_PWM8_0,Clock Source PWM8"
bitfld.long 0x00 29.--31. " PWM8_CLK_SRC                       ,PWM8 clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       PWM8_CLK_DIVISOR                    ,PWM8 clock divisor"
group.long 0x9D3000++0x03
line.long 0x00 "CLK_SOURCE_UARTE_0,Clock Source UARTE"
bitfld.long 0x00 29.--31. " UARTE_CLK_SRC                      ,UARTE clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
bitfld.long 0x00 24. "       UARTE_DIV_ENB                       ,UARTE divider enable" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " UARTE_CLK_DIVISOR                  ,UARTE clock divisor"
group.long 0x9E3000++0x03
line.long 0x00 "CLK_SOURCE_UARTF_0,Clock Source UARTF"
bitfld.long 0x00 29.--31. " UARTF_CLK_SRC                      ,UARTF clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
bitfld.long 0x00 24. "       UARTF_DIV_ENB                       ,UARTF divider enable" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " UARTF_CLK_DIVISOR                  ,UARTF clock divisor"
group.long 0x9F2000++0x03
line.long 0x00 "CLK_SOURCE_DBGAPB_0,Clock Source DBGAPB"
bitfld.long 0x00 29.--31. " DBGAPB_CLK_SRC                     ,DBGAPB clock source" ",,PLLP_OUT0,,,CLK_S,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "       DBGAPB_CLK_DIVISOR                  ,DBGAPB clock divisor"
group.long 0xA00000++0x17
line.long 0x00 "PLLBPMPCAM_BASE_0,PLLBPMPCAM Base"
bitfld.long 0x00 31. " PLLBPMPCAM_BYPASS                  ,PLLBPMPCAM bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "    PLLBPMPCAM_ENABLE                   ,PLLBPMPCAM enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 29. " PLLBPMPCAM_REF_DIS                 ,PLLBPMPCAM reference clock disable" "No,Yes"
rbitfld.long 0x00 27. "             PLLBPMPCAM_FREQ_LOCK                ,PLLBPMPCAM frequency lock" "Not locked,Locked"
textline "                                        "
rbitfld.long 0x00 26. " PLLBPMPCAM_LOCK                    ,PLLBPMPCAM lock" "Not locked,Locked"
bitfld.long 0x00 20.--24. "      PLLBPMPCAM_DIVP                     ,PLLBPMPCAM post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
hexmask.long.byte 0x00 10.--17. 1. " PLLBPMPCAM_DIVN                    ,PLL feedback divider"
hexmask.long.byte 0x00 0.--7. 1. "              PLLBPMPCAM_DIVM                     ,PLL input divider"
line.long 0x04 "PLLBPMPCAM_MISC_0_0,PLLBPMPCAM MISC 0"
bitfld.long 0x04 30. " PLLBPMPCAM_RESET                   ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "        PLLBPMPCAM_EXT_FRU                  ,PLLBPMPCAM EXT FRU"
textline "                                        "
bitfld.long 0x04 3. " PLLBPMPCAM_PTS                     ,Base PLLBPMPCAM test output select" "Disabled,FO"
bitfld.long 0x04 0.--1. "        PLLBPMPCAM_LOOP_CTRL                ,PLLBPMPCAM loop control" "0,1,2,3"
line.long 0x08 "PLLBPMPCAM_MISC_1_0,PLLBPMPCAM MISC 1"
bitfld.long 0x08 27. " PLLBPMPCAM_IDDQ                    ,PLLBPMPCAM IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "             PLLBPMPCAM_EXT_SUBINT               ,PLLBPMPCAM EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
hexmask.long.word 0x08 0.--15. 1. " PLLBPMPCAM_DIVN_FRAC               ,PLLBPMPCAM DIVN FRAC"
line.long 0x0C "PLLBPMPCAM_MISC_2_0,PLLBPMPCAM MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLBPMPCAM_PLL_LD_MEM              ,PLLBPMPCAM PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "              PLLBPMPCAM_PLL_FRUG                 ,PLLBPMPCAM PLL FRUG"
textline "                                        "
hexmask.long.byte 0x0C 8.--15. 1. " PLLBPMPCAM_FLL_LD_MEM              ,PLLBPMPCAM FLL LD MEM"
textline "                                        "
bitfld.long 0x0C 4. " PLLBPMPCAM_FLL_DIV                 ,PLLBPMPCAM FLL divider" "0,1"
bitfld.long 0x0C 0.--2. "               PLLBPMPCAM_FLL_FRUG                 ,PLLBPMPCAM FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLBPMPCAM_MISC_3_0,PLLBPMPCAM MISC 3"
bitfld.long 0x10 24.--25. " PLLBPMPCAM_VREG10V_CTRL            ,PLLBPMPCAM VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "               PLLBPMPCAM_SETUP                    ,PLLBPMPCAM setup"
textline "                                        "
bitfld.long 0x10 4.--5. " PLLBPMPCAM_LDIV                    ,PLLBPMPCAM LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "               PLLBPMPCAM_PLL_LD_TOL               ,PLLBPMPCAM PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLBPMPCAM_MISC_4_0,PLLBPMPCAM MISC 4"
bitfld.long 0x14 28. " PLLBPMPCAM_SEL_IREF                ,PLLBPMPCAM select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "    PLLBPMPCAM_KP_LO                    ,PLLBPMPCAM KP low" "0,1,2,3,4,5,6,7"
textline "                                        "
bitfld.long 0x14 22.--24. " PLLBPMPCAM_KP_HI                   ,PLLBPMPCAM KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "               PLLBPMPCAM_KP_STEP_TIMER            ,PLLBPMPCAM KP step timer" "0,1,2,3,4,5,6,7"
textline "                                        "
bitfld.long 0x14 16.--18. " PLLBPMPCAM_FRAC_STEP_TIMER         ,PLLBPMPCAM FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "               PLLBPMPCAM_FRAC_STEP                ,PLLBPMPCAM FRAC step"
group.long 0xA01000++0x03
line.long 0x00 "CLK_SPARE_BPMP_0,Clock Spare BPMP"
hexmask.long.byte 0x00 0.--7. 1. " CLK_SPARE_REG_BPMP                 ,Clock spare register BPMP"
textline "                                        "
width 32.
group.long 0xA10000++0x03
line.long 0x00 "RST_DEV_BPMP_CPU_NIC_0_SET/CLR,Reset Device BPMP CPU NIC"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SWR_BPMP_NIC_RST                   ,SWR BPMP NIC reset" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "        SWR_BPMP_NSYSPOreset_RST            ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                        "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SWR_BPMP_Nreset_RST                ,Write 1 to trigger bpmp nreset" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "        SWR_BPMP_DBGresetN_RST              ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                        "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  SWR_BPMP_PresetDBGN_RST            ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
group.long 0xA12000++0x0B
line.long 0x00 "BOND_OUT_IP_BPMP_CPU_NIC_0,BOND OUT IP BPMP CPU NIC"
bitfld.long 0x00 1. " BOND_OUT_BPMP_CPU_NIC              ,Bond out Cortex-R5 CPU and Control Fabric" "0,1"
group.long 0xA13000++0x0B
line.long 0x00 "CLK_SOURCE_BPMP_CPU_NIC_0,Clock Source BPMP CPU NIC"
bitfld.long 0x00 29.--31. " BPMP_CPU_NIC_CLK_SRC               ,BPMP CPU NIC clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
rbitfld.long 0x00 17. "  BPMP_CPU_NIC_SWITCH_DIVIDE_BUSY     ,Switch divide busy" "Not busy,Busy"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "  BPMP_CPU_NIC_CLK_DIVISOR           ,BPMP CPU NIC clock divisor"
line.long 0x04 "BPMP_NIC_RATE_0,BPMP NIC Rate"
bitfld.long 0x04 4. " BPMP_NIC_ENABLE                    ,BPMP NIC enable" "Disabled,Enabled"
bitfld.long 0x04 0.--1. "        BPMP_NIC_RATE                       ,BPMP NIC rate" "0,1,2,3"
line.long 0x08 "BPMP_SWR_RESET_CYCLE_COUNT_0,BPMP SWR Reset Cycle Count"
bitfld.long 0x08 0.--4. " BPMP_NRESET_CYCLE_COUNT            ,Privileged mode programmable delay for BPMP software NRESET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xA22000++0x03
line.long 0x00 "BOND_OUT_IP_BPMP_APB_0,BOND OUT IP BPMP APB"
bitfld.long 0x00 0. " BOND_OUT_BPMP_APB                  ,Bond out BPMP APB controller" "Disabled,Enabled"
group.long 0xA23000++0x03
line.long 0x00 "CLK_SOURCE_BPMP_APB_0,Clock Source BPMP APB"
bitfld.long 0x00 29.--31. " BPMP_APB_CLK_SRC                   ,BPMP APB clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
rbitfld.long 0x00 17. "  BPMP_APB_SWITCH_DIVIDE_BUSY         ,Switch divide busy" "Not busy,Busy"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "  BPMP_APB_CLK_DIVISOR               ,BPMP APB clock divisor"
group.long 0xA33000++0x03
line.long 0x00 "CLK_SOURCE_SOC_THERM_0,Clock Source SOC THERM"
bitfld.long 0x00 29.--31. " SOC_THERM_CLK_SRC                  ,SOC THERM clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       SOC_THERM_CLK_DIVISOR               ,SOC therm clock divisor"
group.long 0xA40000++0x03
line.long 0x00 "RST_DEV_ACTMON_0_SET/CLR,Reset Device ACTMON"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SWR_BPMP_PM_ACTMON_RST             ,SWR BPMP PM ACTMON reset" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        SWR_ACTMON_RST                      ,Reset ACTMON" "Disabled,Enabled"
group.long 0xA43000++0x03
line.long 0x00 "CLK_SOURCE_ACTMON_0,Clock Source ACTMON"
bitfld.long 0x00 29.--31. " ACTMON_CLK_SRC                     ,ACTMON clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       ACTMON_CLK_DIVISOR                  ,ACTMON clock divisor"
group.long 0xA52000++0x03
line.long 0x00 "CLK_SOURCE_TSENSOR_0,Clock Source TSENSOR"
bitfld.long 0x00 29.--31. " TSENSOR_CLK_SRC                    ,TSENSOR clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       TSENSOR_CLK_DIVISOR                 ,TSENSOR clock divisor"
textline "                                        "
width 51.
group.long 0xA60000++0x9B
line.long 0x00 "CLK_SOURCE_BPMP_CPU_NIC_TGT_ACTIVE_OVR_0,Clock Source BPMP CPU NIC TGT Active Override"
bitfld.long 0x00 29.--31. " BPMP_CPU_NIC_ACTIVE_OVR_CLK_SRC              ,BPMP CPU NIC ACTIVE override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x00 16. " BPMP_CPU_NIC_ACTIVE_OVR_ENABLE               ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " BPMP_CPU_NIC_ACTIVE_OVR_CLK_DIVISOR          ,BPMP CPU NIC active override clock divisor"
line.long 0x04 "CLK_SOURCE_BPMP_CPU_NIC_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source BPMP CPU NIC TGT Active IRQFIQ Override"
bitfld.long 0x04 29.--31. " BPMP_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_SRC       ,BPMP CPU NIC active IRQFIQ OVR clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x04 16. " BPMP_CPU_NIC_ACTIVE_IRQFIQ_OVR_ENABLE        ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                            "
hexmask.long.byte 0x04 0.--7. 1. " BPMP_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR   ,BPMP CPU NIC active IRQFIQ override clock divisor"
line.long 0x08 "CLK_SOURCE_BPMP_CPU_NIC_TGT_IDLE_SHALLOW_OVR_0,Clock Source BPMP CPU NIC TGT Idle Shallow Override"
bitfld.long 0x08 29.--31. " BPMP_CPU_NIC_IDLE_SHALLOW_OVR_CLK_SRC        ,BPMP CPU NIC IDLE SHALLOW override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x08 16. " BPMP_CPU_NIC_IDLE_SHALLOW_OVR_ENABLE         ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                            "
hexmask.long.byte 0x08 0.--7. 1. " BPMP_CPU_NIC_IDLE_SHALLOW_OVR_CLK_DIVISOR    ,BPMP CPU NIC idle SHALLOW override clock divisor"
line.long 0x0C "CLK_SOURCE_BPMP_CPU_NIC_TGT_STBY_SHALLOW_OVR_0,Clock Source BPMP CPU NIC TGT STBY Shallow Override"
bitfld.long 0x0C 29.--31. " BPMP_CPU_NIC_STBY_SHALLOW_OVR_CLK_SRC        ,BPMP CPU NIC STBY shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x0C 16. " BPMP_CPU_NIC_STBY_SHALLOW_OVR_ENABLE         ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                            "
hexmask.long.byte 0x0C 0.--7. 1. " BPMP_CPU_NIC_STBY_SHALLOW_OVR_CLK_DIVISOR    ,BPMP CPU NIC standby SHALLOW override clock divisor"
line.long 0x10 "CLK_SOURCE_BPMP_CPU_NIC_TGT_DORMANT_SHALLOW_OVR_0,Clock Source BPMP CPU NIC TGT DORMANT Shallow Override"
bitfld.long 0x10 29.--31. " BPMP_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_SRC     ,BPMP CPU NIC dormant shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x10 16. " BPMP_CPU_NIC_DORMANT_SHALLOW_OVR_ENABLE      ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                            "
hexmask.long.byte 0x10 0.--7. 1. " BPMP_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_DIVISOR ,BPMP CPU NIC dormant shallow override clock divisor"
line.long 0x14 "PLL_CFG_BPMP_TGT_ACTIVE_OVR_0,PLL Config BPMP TGT Active Override"
bitfld.long 0x14 2. " BPMP_PLL_ACTIVE_OVR_ENABLE                   ,BPMP PLL active override enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x14 1. " BPMP_PLL_ACTIVE_OVR_PLL_IDDQ                 ,BPMP PLL active override PLL IDDQ" "No override,Override"
textline "                                                            "
bitfld.long 0x14 0. " BPMP_PLL_ACTIVE_OVR_PLL_ENABLE               ,BPMP PLL active override PLL enable" "Disabled,Enabled"
line.long 0x18 "PLL_CFG_BPMP_TGT_ACTIVE_IRQFIQ_OVR_0,PLL Config BPMP TGT Active IRQFIQ Override"
bitfld.long 0x18 2. " BPMP_PLL_ACTIVE_IRQFIQ_OVR_ENABLE            ,BPMP PLL active IRQFIQ override enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x18 1. " BPMP_PLL_ACTIVE_IRQFIQ_OVR_PLL_IDDQ          ,BPMP PLL active IRQFIQ override PLL IDDQ" "No override,Override"
textline "                                                            "
bitfld.long 0x18 0. " BPMP_PLL_ACTIVE_IRQFIQ_OVR_PLL_ENABLE        ,BPMP PLL active IRQFIQ Override PLL enable" "Disabled,Enabled"
line.long 0x1C "PLL_CFG_BPMP_TGT_IDLE_SHALLOW_OVR_0,PLL Config BPMP TGT Idle Shallow Override"
bitfld.long 0x1C 2. " BPMP_PLL_IDLE_SHALLOW_OVR_ENABLE             ,BPMP PLL idle shallow override enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 1. " BPMP_PLL_IDLE_SHALLOW_OVR_PLL_IDDQ           ,BPMP PLL idle shallow override PLL IDDQ" "No override,Override"
textline "                                                            "
bitfld.long 0x1C 0. " BPMP_PLL_IDLE_SHALLOW_OVR_PLL_ENABLE         ,BPMP PLL idle shallow override PLL enable" "Disabled,Enabled"
line.long 0x20 "PLL_CFG_BPMP_TGT_STBY_SHALLOW_OVR_0,PLL Config BPMP TGT STBY Shallow Override"
bitfld.long 0x20 2. " BPMP_PLL_STBY_SHALLOW_OVR_ENABLE             ,BPMP PLL STBY shallow override enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x20 1. " BPMP_PLL_STBY_SHALLOW_OVR_PLL_IDDQ           ,BPMP PLL STBY shallow override PLL IDDQ" "No override,Override"
textline "                                                            "
bitfld.long 0x20 0. " BPMP_PLL_STBY_SHALLOW_OVR_PLL_ENABLE         ,BPMP PLL STBY shallow override PLL enable" "Disabled,Enabled"
line.long 0x24 "PLL_CFG_BPMP_TGT_DORMANT_SHALLOW_OVR_0,PLL Config BPMP TGT Dormant Shallow Override"
bitfld.long 0x24 2. " BPMP_PLL_DORMANT_SHALLOW_OVR_ENABLE          ,BPMP PLL dormant shallow override enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x24 1. " BPMP_PLL_DORMANT_SHALLOW_OVR_PLL_IDDQ        ,BPMP PLL dormant shallow override PLL IDDQ" "No override,Override"
textline "                                                            "
bitfld.long 0x24 0. " BPMP_PLL_DORMANT_SHALLOW_OVR_PLL_ENABLE      ,BPMP PLL dormant shallow override PLL enable" "Disabled,Enabled"
line.long 0x28 "CLK_SOURCE_BPMP_APB_TGT_ACTIVE_OVR_0,Clock Source BPMP APB TGT Active Override"
bitfld.long 0x28 29.--31. " BPMP_APB_ACTIVE_OVR_CLK_SRC                  ,BPMP APB active override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x28 16. " BPMP_APB_ACTIVE_OVR_ENABLE                   ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                            "
hexmask.long.byte 0x28 0.--7. 1. " BPMP_APB_ACTIVE_OVR_CLK_DIVISOR              ,BPMP APB active override clock divisor"
line.long 0x2C "CLK_SOURCE_BPMP_APB_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source BPMP APB TGT Active IRQFIQ Override"
bitfld.long 0x2C 29.--31. " BPMP_APB_ACTIVE_IRQFIQ_OVR_CLK_SRC           ,BPMP APB active IRQFIQ override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x2C 16. " BPMP_APB_ACTIVE_IRQFIQ_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                            "
hexmask.long.byte 0x2C 0.--7. 1. " BPMP_APB_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR       ,BPMP APB active IRQFIQ override clock divisor"
line.long 0x30 "CLK_SOURCE_BPMP_APB_TGT_IDLE_SHALLOW_OVR_0,Clock Source BPMP APB TGT Idle Shallow Override"
bitfld.long 0x30 29.--31. " BPMP_APB_IDLE_SHALLOW_OVR_CLK_SRC            ,BPMP APB idle shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x30 16. " BPMP_APB_IDLE_SHALLOW_OVR_ENABLE             ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                            "
hexmask.long.byte 0x30 0.--7. 1. " BPMP_APB_IDLE_SHALLOW_OVR_CLK_DIVISOR        ,BPMP APB idle shallow override clock divisor"
line.long 0x34 "CLK_SOURCE_BPMP_APB_TGT_STBY_SHALLOW_OVR_0,Clock Source BPMP APB TGT STBY Shallow Override"
bitfld.long 0x34 29.--31. " BPMP_APB_STBY_SHALLOW_OVR_CLK_SRC            ,BPMP APB STBY shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x34 16. " BPMP_APB_STBY_SHALLOW_OVR_ENABLE             ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                            "
hexmask.long.byte 0x34 0.--7. 1. " BPMP_APB_STBY_SHALLOW_OVR_CLK_DIVISOR        ,BPMP APB STBY shallow override clock divisor"
line.long 0x38 "CLK_SOURCE_BPMP_APB_TGT_DORMANT_SHALLOW_OVR_0,Clock Source BPMP APB TGT Dormant Shallow Override"
bitfld.long 0x38 29.--31. " BPMP_APB_DORMANT_SHALLOW_OVR_CLK_SRC         ,BPMP APB dormant shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
bitfld.long 0x38 16. " BPMP_APB_DORMANT_SHALLOW_OVR_ENABLE          ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                            "
hexmask.long.byte 0x38 0.--7. 1. " BPMP_APB_DORMANT_SHALLOW_OVR_CLK_DIVISOR     ,BPMP APB dormant shallow override clock divisor"
line.long 0x3C "CLK_SOURCE_BPMP_CPU_NIC_TGT_ACTIVE_0,Clock Source BPMP CPU NIC TGT Active"
bitfld.long 0x3C 29.--31. " BPMP_CPU_NIC_ACTIVE_CLK_SRC                  ,BPMP CPU NIC active clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x3C 0.--7. 1. " BPMP_CPU_NIC_ACTIVE_CLK_DIVISOR              ,BPMP CPU NIC active clock divisor"
line.long 0x40 "CLK_SOURCE_BPMP_CPU_NIC_TGT_ACTIVE_IRQFIQ_0,Clock Source BPMP CPU NIC TGT Active IRQFIQ"
bitfld.long 0x40 29.--31. " BPMP_CPU_NIC_ACTIVE_IRQFIQ_CLK_SRC           ,BPMP CPU NIC active IRQFIQ clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x40 0.--7. 1. " BPMP_CPU_NIC_ACTIVE_IRQFIQ_CLK_DIVISOR       ,BPMP CPU NIC active IRQFIQ clock divisor"
line.long 0x44 "CLK_SOURCE_BPMP_CPU_NIC_TGT_IDLE_SHALLOW_0,Clock Source BPMP CPU NIC TGT Idle Shallow"
bitfld.long 0x44 29.--31. " BPMP_CPU_NIC_IDLE_SHALLOW_CLK_SRC            ,BPMP CPU NIC idle shallow Clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x44 0.--7. 1. " BPMP_CPU_NIC_IDLE_SHALLOW_CLK_DIVISOR        ,BPMP CPU NIC idle shallow clock divisor"
line.long 0x48 "CLK_SOURCE_BPMP_CPU_NIC_TGT_STBY_SHALLOW_0,Clock Source BPMP CPU NIC TGT STBY Shallow"
bitfld.long 0x48 29.--31. " BPMP_CPU_NIC_STBY_SHALLOW_CLK_SRC            ,BPMP CPU NIC STBY shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x48 0.--7. 1. " BPMP_CPU_NIC_STBY_SHALLOW_CLK_DIVISOR        ,BPMP CPU NIC STBY shallow clock divisor"
line.long 0x4C "CLK_SOURCE_BPMP_CPU_NIC_TGT_DORMANT_SHALLOW_0,Clock Source BPMP CPU NIC TGT DORMANT Shallow"
bitfld.long 0x4C 29.--31. " BPMP_CPU_NIC_DORMANT_SHALLOW_CLK_SRC         ,BPMP CPU NIC dormant shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x4C 0.--7. 1. " BPMP_CPU_NIC_DORMANT_SHALLOW_CLK_DIVISOR     ,BPMP CPU NIC dormant shallow clock divisor"
line.long 0x50 "PLL_CFG_BPMP_TGT_ACTIVE_0,PLL Config BPMP TGT Active"
bitfld.long 0x50 1. " BPMP_PLL_ACTIVE_PLL_IDDQ                     ,BPMP PLL active PLL IDDQ" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x50 0. " BPMP_PLL_ACTIVE_PLL_ENABLE                   ,BPMP PLL active PLL enable" "Disabled,Enabled"
line.long 0x54 "PLL_CFG_BPMP_TGT_ACTIVE_IRQFIQ_0,PLL Config BPMP TGT Active IRQFIQ"
bitfld.long 0x54 1. " BPMP_PLL_ACTIVE_IRQFIQ_PLL_IDDQ              ,BPMP PLL active IRQFIQ PLL IDDQ" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x54 0. " BPMP_PLL_ACTIVE_IRQFIQ_PLL_ENABLE            ,BPMP PLL active IRQFIQ PLL enable" "Disabled,Enabled"
line.long 0x58 "PLL_CFG_BPMP_TGT_IDLE_SHALLOW_0,PLL Config BPMP TGT Idle Shallow 0"
bitfld.long 0x58 1. " BPMP_PLL_IDLE_SHALLOW_PLL_IDDQ               ,BPMP PLL idle shallow PLL IDDQ" "0,1"
textline "                                                            "
bitfld.long 0x58 0. " BPMP_PLL_IDLE_SHALLOW_PLL_ENABLE             ,BPMP PLL idle shallow PLL enable" "Disabled,Enabled"
line.long 0x5C "PLL_CFG_BPMP_TGT_STBY_SHALLOW_0,PLL Config BPMP TGT STBY Shallow"
bitfld.long 0x5C 1. " BPMP_PLL_STBY_SHALLOW_PLL_IDDQ               ,BPMP PLL STBY shallow PLL IDDQ" "0,1"
textline "                                                            "
bitfld.long 0x5C 0. " BPMP_PLL_STBY_SHALLOW_PLL_ENABLE             ,BPMP PLL STBY shallow PLL enable" "Disabled,Enabled"
line.long 0x60 "PLL_CFG_BPMP_TGT_DORMANT_SHALLOW_0,PLL Config BPMP TGT Dormant Shallow"
bitfld.long 0x60 1. " BPMP_PLL_DORMANT_SHALLOW_PLL_IDDQ            ,BPMP PLL dormant shallow PLL IDDQ" "0,1"
textline "                                                            "
bitfld.long 0x60 0. " BPMP_PLL_DORMANT_SHALLOW_PLL_ENABLE          ,BPMP PLL dormant shallow PLL enable" "Disabled,Enabled"
line.long 0x64 "CLK_SOURCE_BPMP_APB_TGT_ACTIVE_0,Clock Source BPMP APB TGT Active"
bitfld.long 0x64 29.--31. " BPMP_APB_ACTIVE_CLK_SRC                      ,BPMP APB active clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x64 0.--7. 1. " BPMP_APB_ACTIVE_CLK_DIVISOR                  ,BPMP APB active clock divisor"
line.long 0x68 "CLK_SOURCE_BPMP_APB_TGT_ACTIVE_IRQFIQ_0,Clock Source BPMP APB TGT Active IRQFIQ"
bitfld.long 0x68 29.--31. " BPMP_APB_ACTIVE_IRQFIQ_CLK_SRC               ,BPMP APB active IRQFIQ clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x68 0.--7. 1. " BPMP_APB_ACTIVE_IRQFIQ_CLK_DIVISOR           ,BPMP APB active IRQFIQ clock divisor"
line.long 0x6C "CLK_SOURCE_BPMP_APB_TGT_IDLE_SHALLOW_0,Clock Source BPMP APB TGT Idle Shallow"
bitfld.long 0x6C 29.--31. " BPMP_APB_IDLE_SHALLOW_CLK_SRC                ,BPMP APB idle shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x6C 0.--7. 1. " BPMP_APB_IDLE_SHALLOW_CLK_DIVISOR            ,BPMP APB idle shallow clock divisor"
line.long 0x70 "CLK_SOURCE_BPMP_APB_TGT_STBY_SHALLOW_0,Clock Source BPMP APB TGT STBY Shallow"
bitfld.long 0x70 29.--31. " BPMP_APB_STBY_SHALLOW_CLK_SRC                ,BPMP APB standby shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x70 0.--7. 1. " BPMP_APB_STBY_SHALLOW_CLK_DIVISOR            ,BPMP APB standby shallow clock divisor"
line.long 0x74 "CLK_SOURCE_BPMP_APB_TGT_DORMANT_SHALLOW_0,Clock Source BPMP APB TGT Dormant Shallow"
bitfld.long 0x74 29.--31. " BPMP_APB_DORMANT_SHALLOW_CLK_SRC             ,BPMP APB dormant shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_BPMP,CLK_S,CLK_M"
textline "                                                            "
hexmask.long.byte 0x74 0.--7. 1. " BPMP_APB_DORMANT_SHALLOW_CLK_DIVISOR         ,BPMP APB dormant shallow clock divisor"
line.long 0x78 "BPMP_SEQ_SW_INTERFACE_CTL_0,BPMP Sequence Software Interface CTL"
rbitfld.long 0x78 31. " BPMP_SW_TGT_ACK                              ,ACK from the software request interface FSM" "Not requested,Requested"
textline "                                                            "
bitfld.long 0x78 30. " BPMP_SW_TGT_REQ                              ,This field drives the request input of the software request interface FSM" "Not requested,Requested"
textline "                                                            "
bitfld.long 0x78 0.--2. " BPMP_SW_TGT_STATE                            ,Target state requested through software" "0,1,2,3,4,5,6,7"
line.long 0x7C "BPMP_SEQ_CTL_0_0,BPMP Sequence CTL 0"
bitfld.long 0x7C 12. " BPMP_APB_ASYNC_OVR_ENABLE                    ,Use the software source divide settings for BPMP_APB" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x7C 11. " BPMP_CPU_NIC_ASYNC_OVR_ENABLE                ,Use the software Source divide settings for BPMP_CPU_NIC" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x7C 10. " BPMP_DISABLE_PLL_HW_CONTROL                  ,Override the pll_configured signal from PLL Sequencer to Switch/Divide Sequencer" "No override,Override"
textline "                                                            "
bitfld.long 0x7C 9. " BPMP_SWDIV_BYP_CONFIG_PROPAGATE              ,Bypass the additional cycle provided for old configuration to propagate" "Not bypassed,Bypassed"
textline "                                                            "
bitfld.long 0x7C 8. " BPMP_SWDIV_BYP_PLL_CONFIG                    ,When set the switch/divide sequencer does not wait for the PLL sequencer to complete" "Wait,Not wait"
textline "                                                            "
bitfld.long 0x7C 7. " BPMP_SWDIV_SEQUENCER_EN                      ,Enable Switch/Divide sequencer" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x7C 6. " BPMP_PLL_SEQUENCER_EN                        ,Enable PLL sequencer" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x7C 5. " BPMP_CPU_NIC_SWDIV_DIS_HWCTRL                ,CPU_NIC switch/divide disable hardware control" "No,Yes"
textline "                                                            "
bitfld.long 0x7C 4. " BPMP_APB_SWDIV_DIS_HWCTRL                    ,APB switch/divide disable hardware control" "No,Yes"
textline "                                                            "
bitfld.long 0x7C 3. " BPMP_RESET_SEQUENCER_INTF                    ,Reset hardware and software interface FSM" "No reset,Reset"
textline "                                                            "
bitfld.long 0x7C 2. " BPMP_SWDIV_RST_ACK_ENABLE                    ,Send reset ACK to the interfaces" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x7C 1. " BPMP_RESET_SWDIV_FSM                         ,Reset switch/divide FSM" "No reset,Reset"
textline "                                                            "
bitfld.long 0x7C 0. " BPMP_RESET_PLL_FSM                           ,Reset PLL FSM" "No reset,Reset"
line.long 0x80 "BPMP_SEQ_TIMEOUT_CTL_0,BPMP Sequence Timeout CTL"
bitfld.long 0x80 31. " BPMP_CAR_SEQ_INTR_ENABLE                     ,Interrupt enabled" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x80 30. " BPMP_CAR_SEQ_INTR_STATUS                     ,Read interrupt status" "No clear,Clear"
textline "                                                            "
bitfld.long 0x80 29. " BPMP_SEQ_TIMEOUT_ACK_ENABLE                  ,When set results in providingACK back to hardware software interface on timeout" "Disabled,Enabled"
textline "                                                            "
hexmask.long.word 0x80 0.--11. 1. " BPMP_SEQ_TIMEOUT_COUNT                       ,Timeout value used by the sequencer"
line.long 0x84 "BPMP_SEQ_PLL_LOCK_DLY_CFG_0,BPMP Sequence PLL Lock Delay Config"
bitfld.long 0x84 31. " BPMP_PLL_WAIT_PROG_DELAY                     ,Wait for programmable delay for DFLL/PLL to lock" "Disabled,Enabled"
textline "                                                            "
hexmask.long.word 0x84 0.--11. 1. " BPMP_PLL_DLY_LOCK                            ,Wait for programmable delay of BPMP_PLL_DLY_LOCK us for PLL/DFLL to lock"
line.long 0x88 "BPMP_SEQ_PLL_PWRUP_DLY_CFG_0,BPMP Sequence PLL PWRUP Delay Config"
hexmask.long.word 0x88 0.--11. 1. " BPMP_PLL_DLY_PWRUP                           ,Wait for programmable power up delay of the PLL/DFLL"
line.long 0x8C "BPMP_SEQ_SWDIV_SWITCH_DLY_CFG_0,BPMP sequence SWDIV SWITCH Delay Config"
bitfld.long 0x8C 31. " BPMP_SWDIV_SWDIVCFG_WAIT_PROG_DELAY          ,Wait for programmable delay for CPU_NIC/APB" "Disabled,Enabled"
textline "                                                            "
hexmask.long.word 0x8C 0.--11. 1. " BPMP_SWDIV_DLY_SWDIVCFG                      ,Wait for programmable delay of BPMP_SWDIV_DLY_SWDIVCFG us for clock switch to complete"
line.long 0x90 "BPMP_SEQ_SWDIV_PLL_DLY_CFG_0,BPMP Sequence SWDIV PLL Delay Config"
bitfld.long 0x90 31. " BPMP_SWDIV_PLLCFG_WAIT_PROG_DELAY            ,Wait for Lumped delay for PLL to be configured" "Disabled,Enabled"
textline "                                                            "
hexmask.long.word 0x90 0.--11. 1. " BPMP_SWDIV_DLY_PLLCFG                        ,Wait for programmable lumped delay of BPMP_SWDIV_DLY_PLLCFG us for PLL to be configured"
line.long 0x94 "BPMP_SEQ_1US_CYCLE_COUNT_0,BPMP Sequence 1US Cycle Count"
bitfld.long 0x94 0.--5. " BPMP_SEQUENCER_1USEC_OSC_CYCLE               ,Program the count to generate microsecond reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x98 "BPMP_SEQ_OVERRIDE_0,BPMP Sequence Override"
bitfld.long 0x98 3. " BPMP_SEQ_MODE_SEL_OVR                        ,Override the target mode programmed through hardware, software interface" "Not override,Override"
textline "                                                            "
bitfld.long 0x98 0.--2. " BPMP_SEQ_MODE_SEL_OVR_VAL                    ,Uses to override the target mode" "0,1,2,3,4,5,6,7"
textline "                                                            "
width 30.
rgroup.long 0xA6009C++0x03
line.long 0x00 "BPMP_SEQ_STATUS_0,BPMP Sequence Status"
bitfld.long 0x00 31. " BPMP_SEQ_SM_SWDIV_BUSY                       ,Status bit when set signifies that the switch divide FSM is busy" "Not busy,Busy"
bitfld.long 0x00 30. "       BPMP_SEQ_PLL_CONFIGURED                     ,Status bit when set signifies that the PLL FSM is in programmed state" "Not configured,Configured"
textline "                                       "
bitfld.long 0x00 4.--7. " BPMP_SEQ_PLL_CURR_STATE                      ,Reflect PLL current FSM state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "             BPMP_SEQ_SWDIV_CURR_STATE                   ,Reflect switch/divide FSM current state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
group.long 0xA600A0++0x03
line.long 0x00 "BPMP_SEQ_DEBUG_0,BPMP Sequence Debug"
bitfld.long 0x00 31. " BPMP_EN_SEQ_DBG                              ,Gate all debug logic to save power" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "       BPMP_LAST_SEQ_COUNT                         ,Number of reference period taken by sequencer to respond to request"
group.long 0xA70000++0x17
line.long 0x00 "BPMP_NAFLL_CFG1_0,BPMP NAFLL Config 1"
rbitfld.long 0x00 16. " BPMP_NAFLL_CFG1_FLL_LOCK                     ,BPMP NAFLL config1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 7. "     BPMP_NAFLL_CFG1_OVERRIDE                    ,BPMP NAFLL config1 override" "No override,Override"
textline "                                       "
bitfld.long 0x00 6. " BPMP_NAFLL_CFG1_RESET                        ,BPMP NAFLL config1 reset" "No reset,Reset"
bitfld.long 0x00 5. "       BPMP_NAFLL_CFG1_EN_PRB_CLKOUT               ,BPMP NAFLL config1 enable PRB clock out" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 4. " BPMP_NAFLL_CFG1_EN_CLK_PRE_SKP               ,BPMP NAFLL config1 enable clock PRE SKP" "Disabled,Enabled"
bitfld.long 0x00 3. "       BPMP_NAFLL_CFG1_BYPASSFLL                   ,BPMP NAFLL config1 BYPASSFLL" "Not bypassed,Bypassed"
textline "                                       "
bitfld.long 0x00 2. " BPMP_NAFLL_CFG1_DVCO_DISABLE                 ,BPMP NAFLL config1 DVCO disable" "No,Yes"
bitfld.long 0x00 1. "            BPMP_NAFLL_CFG1_IDDQ                        ,BPMP NAFLL config1 IDDQ" "0,1"
textline "                                       "
bitfld.long 0x00 0. " BPMP_NAFLL_CFG1_ENABLE                       ,BPMP NAFLL config1 enable" "Disabled,Enabled"
line.long 0x04 "BPMP_NAFLL_COEFF_0,BPMP NAFLL COEFF"
bitfld.long 0x04 28.--31. " BPMP_NAFLL_COEFF_FLL_FRUG_FAST               ,BPMP NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "             BPMP_NAFLL_COEFF_FLL_FRUG_MAIN              ,BPMP NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x04 16.--20. " BPMP_NAFLL_COEFF_PDIV                        ,BPMP NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "             BPMP_NAFLL_COEFF_MDIV                       ,BPMP NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "BPMP_NAFLL_CFG2_0,BPMP NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " BPMP_NAFLL_CFG2_FLL_CTRL_LDMEM               ,BPMP NAFLL config2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "             BPMP_NAFLL_CFG2_FLL_INIT                    ,BPMP NAFLL config2 FLL initialization"
line.long 0x0C "BPMP_NAFLL_CFG3_0,BPMP NAFLL Config 3"
hexmask.long 0x0C 0.--31. 1. " BPMP_NAFLL_CFG3_DVCO_DLY_TUNE_OVERRIDE       ,BPMP NAFLL config3 DVCO delay tune override"
line.long 0x10 "BPMP_NAFLL_CTRL1_0 ,BPMP_NAFLL_Control 1"
hexmask.long.word 0x10 16.--31. 1. " BPMP_NAFLL_CTRL1_SETUP                       ,BPMP NAFLL control1 setup"
hexmask.long.word 0x10 0.--15. 1. "           BPMP_NAFLL_CTRL1_FLL_CTRL                   ,BPMP NAFLL control1 FLL control"
line.long 0x14 "BPMP_NAFLL_CTRL2_0,BPMP NAFLL Control 2"
bitfld.long 0x14 28.--31. " BPMP_NAFLL_CTRL2_SRAM_VFGAIN                 ,BPMP NAFLL control2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "             BPMP_NAFLL_CTRL2_SRAM_CHAIN_INIT            ,BPMP NAFLL control2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x14 20.--23. " BPMP_NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD ,BPMP NAFLL control2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "             BPMP_NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM ,BPMP NAFLL control2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x14 8.--11. " BPMP_NAFLL_CTRL2_DEBUG_SEL                   ,BPMP NAFLL control2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "             BPMP_NAFLL_CTRL2_FLL_OVERRIDE               ,BPMP NAFLL control2 FLL override"
rgroup.long 0xA70018++0x03
line.long 0x00 "BPMP_NAFLL_MISC_0,BPMP NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " BPMP_NAFLL_MISC_DEBUG_DATA                   ,BPMP NAFLL MISC debug data"
group.long 0xA7001C++0x07
line.long 0x00 "BPMP_NAFLL_SKP_COEFF_0,BPMP NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " BPMP_NAFLL_SKP_COEFF_DIVISOR                 ,BPMP NAFLL SKP COEFF divisor"
textline "                                       "
hexmask.long.byte 0x00 16.--23. 1. " BPMP_NAFLL_SKP_COEFF_DIVIDEND                ,BPMP NAFLL SKP COEFF dividend"
line.long 0x04 "BPMP_NAFLL_SKP_CTRL_0,BPMP NAFLL SKP Control"
bitfld.long 0x04 3.--7. " BPMP_NAFLL_SKP_CTRL_RAMP_RATE                ,BPMP NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "             BPMP_NAFLL_SKP_CTRL_SKP_CTRL                ,BPMP NAFLL SKP control SKP control" "0,1,2,3"
textline "                                       "
bitfld.long 0x04 0. " BPMP_NAFLL_SKP_CTRL_SKP_EN                   ,BPMP NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long 0xA70040++0x1B
line.long 0x00 "BPMP_NAFLL_LUT_WRITE_ADDR_0,BPMP NAFLL LUT Write Address"
bitfld.long 0x00 31. " BPMP_NAFLL_LUT_WRITE_ADDR_AUTO_INC           ,BPMP NAFLL LUT write address auto INC" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 0x01 "       BPMP_NAFLL_LUT_WRITE_ADDR_OFFSET            ,BPMP NAFLL LUT write address offset"
line.long 0x04 "BPMP_NAFLL_LUT_WRITE_DATA_0,BPMP NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " BPMP_NAFLL_LUT_WRITE_DATA_VAL1               ,BPMP NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "           BPMP_NAFLL_LUT_WRITE_DATA_VAL0              ,BPMP NAFLL LUT write data value 0"
line.long 0x08 "BPMP_NAFLL_LUT_READ_ADDR_0,BPMP NAFLL LUT Read Address"
bitfld.long 0x08 31. " BPMP_NAFLL_LUT_READ_ADDR_AUTO_INC            ,BPMP NAFLL LUT read address auto INC" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 0x01 "       BPMP_NAFLL_LUT_READ_ADDR_OFFSET             ,BPMP NAFLL LUT read address offset"
line.long 0x0C "BPMP_NAFLL_LUT_READ_DATA_0,BPMP NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " BPMP_NAFLL_LUT_READ_DATA_VAL1                ,BPMP NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "           BPMP_NAFLL_LUT_READ_DATA_VAL0               ,BPMP NAFLL LUT read data value 0"
line.long 0x10 "BPMP_NAFLL_LUT_DEBUG2_0,BPMP NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " BPMP_NAFLL_LUT_DEBUG2_NDIV                   ,BPMP NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "           BPMP_NAFLL_LUT_DEBUG2_VFGAIN                ,BPMP NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x10 0.--3. " BPMP_NAFLL_LUT_DEBUG2_PRI_CTRL_STATE         ,BPMP NAFLL LUT debug 2 PRI control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "BPMP_NAFLL_LUT_CFG_0,BPMP NAFLL LUT Config"
bitfld.long 0x14 16.--19. " BPMP_NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD      ,BPMP NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "             BPMP_NAFLL_LUT_CFG_RAM_READ_EN              ,BPMP NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x14 8. " BPMP_NAFLL_LUT_CFG_RESET_FSM                 ,BPMP NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "       BPMP_NAFLL_LUT_CFG_TEMP_IDX                 ,BPMP NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "BPMP_NAFLL_LUT_SW_FREQ_REQ_0,BPMP NAFLL LUT SW Frequency Request"
bitfld.long 0x18 31. " BPMP_NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD       ,BPMP NAFLL LUT SW frequency request SRAM SD" "Not requested,Requested"
bitfld.long 0x18 20.--23. "  BPMP_NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN       ,BPMP NAFLL LUT SW frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
hexmask.long.word 0x18 4.--12. 1. " BPMP_NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV          ,BPMP NAFLL LUT SW frequency request NDIV"
bitfld.long 0x18 2.--3. "           BPMP_NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT  ,BPMP NAFLL LUT SW frequency request SW override LUT" "0,1,2,3"
textline "                                       "
bitfld.long 0x18 0.--1. " BPMP_NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT       ,BPMP NAFLL LUT SW frequency request LUT vselect" "0,1,2,3"
rgroup.long 0xA7005C++0x03
line.long 0x00 "BPMP_NAFLL_LUT_ACK_0,BPMP NAFLL LUT ACK"
bitfld.long 0x00 3. " BPMP_NAFLL_LUT_ACK_RDACK_LUT_DEBUG           ,BPMP NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long 0xA7006C++0x03
line.long 0x00 "BPMP_CLK_FR_CNTR_CFG_0,BPMP Clock FR CNTR Config"
bitfld.long 0x00 28.--31. " BPMP_CLK_FR_CNTR_CFG_SOURCE                  ,BPMP clock FR CNTR config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "             BPMP_CLK_FR_CNTR_CFG_CONTINOUS_UPDATE       ,BPMP clock FR control config continuous update" "No effect,Update"
textline "                                       "
bitfld.long 0x00 25. " BPMP_CLK_FR_CNTR_CFG_START_COUNT             ,BPMP clock FR control config start count" "No effect,Started"
bitfld.long 0x00 24. "      BPMP_CLK_FR_CNTR_CFG_RESET                  ,BPMP clock FR control config reset" "No reset,Reset"
textline "                                       "
bitfld.long 0x00 0.--2. " BPMP_CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES     ,BPMP clock FR CNTR config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long 0xA70070++0x07
line.long 0x00 "BPMP_CLK_FR_CNTR_CNT0_0,BPMP Clock FR CNTR CNT 0"
line.long 0x04 "BPMP_CLK_FR_CNTR_CNT1_0,BPMP Clock FR CNTR CNT 1"
bitfld.long 0x04 0.--3. " BPMP_CLK_FR_CNTR_CNT1_VALUE                  ,BPMP clock FR CNTR CNT1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xAF2000++0x03
line.long 0x00 "CLK_SOURCE_SIMON_0,CLK Source SIMON"
bitfld.long 0x00 29.--31. " SIMON_CLK_SRC                                ,SIMON clock source" "JTAG_TCK_IB,PLLP_OUT0,CLK_M,?..."
hexmask.long.byte 0x00 0.--7. 1. "    SIMON_CLK_DIVISOR                           ,SIMON clock divisor"
textline "                                       "
width 19.
group.long 0xAF8000++0x13
line.long 0x00 "BPMP_SCR_SHARED_0,BPMP SCR Shared"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xAF8004++0x13
line.long 0x00 "BPMP_SCR_PRIVATE_0,BPMP SCR Private"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xAF8008++0x13
line.long 0x00 "BPMP_SCR_THERM_0,BPMP SCR THERM"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xAF800C++0x13
line.long 0x00 "BPMP_SCR_DVFS_0,BPMP SCR DVFS"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xAF8010++0x13
line.long 0x00 "BPMP_SCR_SIMON_0,BPMP SCR SIMON"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                            "
width 36.
group.long 0xB00000++0x03
line.long 0x00 "RST_DEV_AON_CPU_NIC_0_SET/CLR,Reset Device Always-On Cluster CPU NIC"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SWR_AON_NIC_RST               ,SWR always-on cluster NIC reset" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "                  SWR_AON_NSYSPOreset_RST           ,Software should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_AON_Nreset_RST            ,Write 1 to trigger always-on cluster NRESET" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "                  SWR_AON_DBGresetN_RST             ,Software should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                             "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_AON_PresetDBGN_RST        ,Software should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
group.long 0xB01000++0x03
line.long 0x00 "CLK_OUT_ENB_AON_CPU_NIC_0_SET/CLR,Clock Out Enable Always-On Cluster CPU NIC"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_AON_CPU               ,Enable clock to Cortex-R5 CPU" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "                  CLK_ENB_AON_CPU_NIC               ,Enable clock to Cortex-R5 CPU and Control Fabric" "Disabled,Enabled"
group.long 0xB02000++0x03
line.long 0x00 "BOND_OUT_IP_AON_CPU_NIC_0,Bond Out IP Always-On Cluster CPU NIC"
bitfld.long 0x00 1. " BOND_OUT_AON_CPU              ,Bond out Cortex-R5 CPU" "0,1"
bitfld.long 0x00 0. "                         BOND_OUT_AON_CPU_NIC              ,Bond out Cortex-R5 CPU and Control Fabric" "0,1"
group.long 0xB03000++0x0F
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_0,Clock Source Always-On Cluster CPU NIC"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_CLK_SRC           ,Always-on cluster CPU NIC clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
rbitfld.long 0x00 17. "                AON_CPU_NIC_SWITCH_DIVIDE_BUSY    ,Switch divide busy" "0,1"
textline "                                             "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_CLK_DIVISOR       ,Always-On Cluster CPU NIC Clock divisor"
line.long 0x04 "AON_NIC_RATE_0,Always-On Cluster NIC Rate"
bitfld.long 0x04 4. " AON_NIC_ENABLE                ,Always-on cluster NIC enable" "Disabled,Enabled"
bitfld.long 0x04 0.--1. "                  AON_NIC_RATE                      ,Always-on cluster NIC rate" "/1,/2,/3,/4"
line.long 0x08 "AON_CPU_PGRST_CTRL_0,Always-On Cluster CPU PGRST Control"
bitfld.long 0x08 31. " AON_PG_EMULATE                ,Enable disable PG emulation for PG reset sequencer" "0,1"
hexmask.long.byte 0x08 0.--7. 1. "                         AON_CPU_SOFTRST_LEGACY_WIDTH      ,Always-on cluster CPU soft reset deassertion counter value for PG reset sequencer"
line.long 0x0C "AON_SWR_RESET_CYCLE_COUNT_0,Always-On Cluster Software Reset Cycle Count"
bitfld.long 0x0C 0.--4. " AON_NRESET_CYCLE_COUNT        ,Programmable delay for aon software nreset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xB13000++0x03
line.long 0x00 "CLK_SOURCE_CAN1_0,Clock Source CAN 1"
bitfld.long 0x00 29.--31. " CAN1_CLK_SRC                  ,CAN1 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                CAN1_CLK_DIVISOR                  ,CAN1 clock divisor"
group.long 0xB23000++0x03
line.long 0x00 "CLK_SOURCE_CAN2_0,Clock Source CAN 2"
bitfld.long 0x00 29.--31. " CAN2_CLK_SRC                  ,CAN2 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                CAN2_CLK_DIVISOR                  ,CAN2 clock divisor"
group.long 0xB33000++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_0,Clock Source Always-On Cluster APB"
bitfld.long 0x00 29.--31. " AON_APB_CLK_SRC               ,Always-cn cluster APB clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
rbitfld.long 0x00 17. "                AON_APB_SWITCH_DIVIDE_BUSY        ,Switch divide busy" "0,1"
textline "                                             "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_CLK_DIVISOR           ,Always-on cluster APB clock divisor"
group.long 0xB43000++0x03
line.long 0x00 "CLK_SOURCE_UARTC_0,Clock Source UARTC"
bitfld.long 0x00 29.--31. " UARTC_CLK_SRC                 ,UARTC clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
bitfld.long 0x00 24. "                UARTC_DIV_ENB                     ,Uses UARTC clock divisor" "Disabled,Enabled"
textline "                                             "
hexmask.long.word 0x00 0.--15. 1. " UARTC_CLK_DIVISOR             ,UARTC clock divisor"
group.long 0xB53000++0x03
line.long 0x00 "CLK_SOURCE_UARTG_0,Clock Source UARTG"
bitfld.long 0x00 29.--31. " UARTG_CLK_SRC                 ,UARTG clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
bitfld.long 0x00 24. "                UARTG_DIV_ENB                     ,Uses UARTG clock divisor" "Disabled,Enabled"
textline "                                             "
hexmask.long.word 0x00 0.--15. 1. " UARTG_CLK_DIVISOR             ,UARTG clock divisor"
group.long 0xB62000++0x03
line.long 0x00 "CLK_SOURCE_AON_UART_FST_MIPI_CAL_0,Clock Source Always-On Cluster UART FST MIPI CAL"
bitfld.long 0x00 29.--31. " AON_UART_FST_MIPI_CAL_CLK_SRC ,Always-on cluster UART FST MIPI CAL clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                AON_UART_FST_MIPI_CAL_CLK_DIVISOR ,Always-on cluster UART FST MIPI CAL clock divisor"
group.long 0xB73000++0x03
line.long 0x00 "CLK_SOURCE_I2C2_0,Clock Source I2C2"
bitfld.long 0x00 29.--31. " I2C2_CLK_SRC          ,I2C2 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                I2C2_CLK_DIVISOR          ,I2C2 clock divisor"
group.long 0xB83000++0x03
line.long 0x00 "CLK_SOURCE_I2C8_0,Clock Source I2C8"
bitfld.long 0x00 29.--31. " I2C8_CLK_SRC          ,I2C8 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                I2C8_CLK_DIVISOR          ,I2C8 clock divisor"
group.long 0xB93000++0x03
line.long 0x00 "CLK_SOURCE_I2C10_0,Clock Source I2C10"
bitfld.long 0x00 29.--31. " I2C10_CLK_SRC          ,I2C10 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                I2C10_CLK_DIVISOR          ,I2C10 clock divisor"
group.long 0xBA2000++0x03
line.long 0x00 "CLK_SOURCE_AON_I2C_SLOW_0,Clock Source AON I2C Slow"
bitfld.long 0x00 29.--31. " AON_I2C_SLOW_CLK_SRC          ,AON I2C slow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                AON_I2C_SLOW_CLK_DIVISOR          ,$3 clock divisor"
group.long 0xBB3000++0x03
line.long 0x00 "CLK_SOURCE_SPI2_0,Clock Source SPI2"
bitfld.long 0x00 29.--31. " SPI2_CLK_SRC          ,SPI2 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                SPI2_CLK_DIVISOR          ,SPI2 clock divisor"
group.long 0xBC3000++0x03
line.long 0x00 "CLK_SOURCE_DMIC5_0,Clock Source DMIC5"
bitfld.long 0x00 29.--31. " DMIC5_CLK_SRC          ,DMIC5 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                DMIC5_CLK_DIVISOR          ,DMIC5 clock divisor"
group.long 0xBD2000++0x03
line.long 0x00 "CLK_SOURCE_AON_TOUCH_0,Clock Source AON Touch"
bitfld.long 0x00 29.--31. " AON_TOUCH_CLK_SRC             ,AON Touch clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV,?..."
hexmask.long.word 0x00 0.--15. 1. "                AON_TOUCH_CLK_DIVISOR             ,AON Touch clock divisor"
group.long 0xBE0000++0x17
line.long 0x00 "PLLAON_BASE_0,PLLAON Base"
bitfld.long 0x00 31. " PLLAON_BYPASS                 ,PLLAON bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 30. "              PLLAON_ENABLE                     ,PLLAON enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. " PLLAON_REF_DIS                ,PLLAON reference clock disable" "No,Yes"
bitfld.long 0x00 28. "                       PLLAON_OVERRIDE                   ,PLL always-on cluster enable" "Disabled,Enabled"
textline "                                             "
rbitfld.long 0x00 27. " PLLAON_FREQ_LOCK              ,PLLAON frequency lock" "Not locked,Locked"
rbitfld.long 0x00 26. "                PLLAON_LOCK                       ,PLLAON lock" "Not locked,Locked"
textline "                                             "
bitfld.long 0x00 20.--24. " PLLAON_DIVP                   ,Post divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.byte 0x00 10.--17. 1. "                        PLLAON_DIVN                       ,PLL feedback divider"
textline "                                             "
hexmask.long.byte 0x00 0.--7. 1. " PLLAON_DIVM                   ,PLL input divider"
line.long 0x04 "PLLAON_MISC_0_0,PLLAON MISC 0"
bitfld.long 0x04 30. " PLLAON_RESET                  ,Reset for digital logic of the PLL" "No reset,Reset"
hexmask.long.word 0x04 4.--19. 1. "                  PLLAON_EXT_FRU                    ,PLLAON EXT FRU"
textline "                                             "
bitfld.long 0x04 3. " PLLAON_PTS                    ,Base PLLAON test output select" "Disable,FO"
bitfld.long 0x04 0.--1. "                   PLLAON_LOOP_CTRL                  ,PLLAON loop control" "0,1,2,3"
line.long 0x08 "PLLAON_MISC_1_0,PLLAON MISC 1"
bitfld.long 0x08 27. " PLLAON_IDDQ                   ,PLLAON IDDQ" "Off,On"
bitfld.long 0x08 16.--19. "                       PLLAON_EXT_SUBINT                 ,PLLAON EXT SUBINT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                             "
hexmask.long.word 0x08 0.--15. 1. " PLLAON_DIVN_FRAC              ,PLLAON DIVN FRAC"
line.long 0x0C "PLLAON_MISC_2_0,PLLAON MISC 2"
hexmask.long.byte 0x0C 24.--31. 1. " PLLAON_PLL_LD_MEM             ,PLLAON PLL LD MEM"
hexmask.long.byte 0x0C 16.--23. 1. "                        PLLAON_PLL_FRUG                   ,PLLAON PLL FRUG"
textline "                                             "
hexmask.long.byte 0x0C 8.--15. 1. " PLLAON_FLL_LD_MEM             ,PLLAON FLL LD MEM"
bitfld.long 0x0C 4. "                        PLLAON_FLL_DIV                    ,PLLAON FLL divider" "0,1"
textline "                                             "
bitfld.long 0x0C 0.--2. " PLLAON_FLL_FRUG               ,PLLAON FLL FRUG" "0,1,2,3,4,5,6,7"
line.long 0x10 "PLLAON_MISC_3_0,PLLAON MISC 3"
bitfld.long 0x10 24.--25. " PLLAON_VREG10V_CTRL           ,PLLAON VREG10V control" "0,1,2,3"
hexmask.long.word 0x10 8.--23. 1. "                         PLLAON_SETUP                      ,PLLAON setup"
textline "                                             "
bitfld.long 0x10 4.--5. " PLLAON_LDIV                   ,PLLAON LDIV" "0,1,2,3"
bitfld.long 0x10 0.--3. "                         PLLAON_PLL_LD_TOL                 ,PLLAON PLL LD TOL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "PLLAON_MISC_4_0,PLLAON MISC 4"
bitfld.long 0x14 28. " PLLAON_SEL_IREF               ,PLLAON select IREF" "Not selected,Selected"
bitfld.long 0x14 25.--27. "              PLLAON_KP_LO                      ,PLLAON KP low" "0,1,2,3,4,5,6,7"
textline "                                             "
bitfld.long 0x14 22.--24. " PLLAON_KP_HI                  ,PLLAON KP high" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 19.--21. "                         PLLAON_KP_STEP_TIMER              ,PLLAON KP step timer" "0,1,2,3,4,5,6,7"
textline "                                             "
bitfld.long 0x14 16.--18. " PLLAON_FRAC_STEP_TIMER        ,PLLAON FRAC step timer" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x14 0.--15. 1. "                         PLLAON_FRAC_STEP                  ,PLLAON FRAC step"
group.long 0xBF0000++0x17
line.long 0x00 "OSC_CTRL_0,Oscillator Control"
bitfld.long 0x00 28.--31. " OSC_FREQ                      ,Oscillator frequency" "OSC13,OSC16P8,,,OSC19P2,OSC38P4,,,OSC12,OSC48,,,OSC26,?..."
bitfld.long 0x00 26.--27. "                   PLL_REF_DIV                       ,PLL reference clock divide" "/1,/2,/4,?..."
textline "                                             "
hexmask.long.byte 0x00 18.--25. 1. " OSCFI_SPARE                   ,Crystal oscillator spare register control"
bitfld.long 0x00 12.--16. "                        XODS                              ,Crystal oscillator duty cycle control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                             "
bitfld.long 0x00 4.--9. " XOFS                          ,Crystal oscillator drive strength control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 2. "                        CLK_OK                            ,Crystal oscillator CLK_OK" "0,1"
textline "                                             "
bitfld.long 0x00 0. " XOE                           ,Crystal oscillator enable" "Disabled,Enabled"
line.long 0x04 "CLK_M_DIVIDE_0,CLK_M_DIVIDE"
bitfld.long 0x04 2.--3. " CLK_M_DIVISOR                 ,Clock M divisor" "0,1,2,3"
line.long 0x08 "OSC_PRE_CLAMP_CTL_0,OSC PRE CLAMP CTL"
bitfld.long 0x08 1. " AO_PMC2ALL_OSC_STABLE_OVR_VAL ,Oscillator stable override enable value" "Disabled,Enabled"
bitfld.long 0x08 0. "                  AO_PMC2ALL_OSC_STABLE_OVR         ,Oscillator stable override enable" "Disabled,Enabled"
line.long 0x0C "OSC_FREQ_DET_0,OSC Frequency DET"
bitfld.long 0x0C 31. " OSC_FREQ_DET_TRIG             ,Oscillator frequency detect TRIG" "Disabled,Enabled"
bitfld.long 0x0C 0.--3. "                  REF_CLK_WIN_CFG                   ,Indicate the number of 32KHz clock periods as window in n+1 scheme" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "OSC_FREQ_DET_STATUS_0,OSC Frequency Detection Status"
bitfld.long 0x10 31. " OSC_FREQ_DET_BUSY             ,Oscillator frequency detection busy" "Not busy,Busy"
hexmask.long.word 0x10 0.--15. 1. "                  OSC_FREQ_DET_CNT                  ,Indicate the number of oscillator counts within the 32KHz clock reference window"
line.long 0x14 "MISC_REG0_0,MISC REG 0"
bitfld.long 0x14 0. " GLOBAL_CLK_OVR_ON             ,Global SLCG override" "No override,Override"
group.long 0xC03000++0x03
line.long 0x00 "CLK_SOURCE_PWM4_0,Clock Source PWM4"
bitfld.long 0x00 29.--31. " PWM4_CLK_SRC                  ,PWM4 clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                PWM4_CLK_DIVISOR                  ,PWM4 clock divisor"
group.long 0xC13000++0x0B
line.long 0x00 "CLK_SOURCE_TSC_0,Clock Source TSC"
bitfld.long 0x00 29.--31. " TSC_CLK_SRC                   ,TSC clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                TSC_CLK_DIVISOR                   ,TSC clock divisor"
line.long 0x04 "TSC_HS_SUPER_CLK_DIVIDER_0,TSC HS Super Clock Divider"
bitfld.long 0x04 31. " SUPER_TSC_HS_DIV_ENB          ,Super TSC HS divider enable" "Disabled,Enabled"
hexmask.long.word 0x04 12.--21. 1. "                  SUPER_TSC_HS_DIV_DIVIDEND         ,Super TSC HS divider dividend"
textline "                                             "
hexmask.long.word 0x04 0.--9. 1. " SUPER_TSC_HS_DIV_DIVISOR      ,Super TSC HS divider divisor"
line.long 0x08 "TSC_OSC_SUPER_CLK_DIVIDER_0,TSC Oscillator Super Clock Divider"
bitfld.long 0x08 31. " SUPER_TSC_OSC_DIV_ENB         ,Super TSC oscillator divider enable" "Disabled,Enabled"
hexmask.long.word 0x08 12.--21. 1. "                  SUPER_TSC_OSC_DIV_DIVIDEND        ,Super TSC oscillator divider dividend"
textline "                                             "
hexmask.long.word 0x08 0.--9. 1. " SUPER_TSC_OSC_DIV_DIVISOR     ,Super TSC oscillator divider divisor"
group.long 0xC22000++0x03
line.long 0x00 "CLK_SOURCE_MSS_ENCRYPT_0,Clock Source MSS Encrypt"
bitfld.long 0x00 29.--31. " MSS_ENCRYPT_CLK_SRC           ,MSS encrypt clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
hexmask.long.byte 0x00 0.--7. 1. "                MSS_ENCRYPT_CLK_DIVISOR           ,MSS encrypt clock divisor"
textline "                                             "
width 50.
group.long 0xC30000++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_ACTIVE_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Active Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_ACTIVE_OVR_CLK_SRC       ,Always-on cluster CPU NIC active override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_ACTIVE_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_ACTIVE_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC active override clock divisor"
group.long 0xC30004++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Active IRQFIQ Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_SRC       ,Always-on cluster CPU NIC active IRQFIQ override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_ACTIVE_IRQFIQ_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC active IRQFIQ override clock divisor"
group.long 0xC30008++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_IDLE_SHALLOW_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Idle Shallow Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_IDLE_SHALLOW_OVR_CLK_SRC       ,Always-on cluster CPU NIC idle shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_IDLE_SHALLOW_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_IDLE_SHALLOW_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC idle shallow override clock divisor"
group.long 0xC3000C++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_IDLE_DEEP_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Idle Deep Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_IDLE_DEEP_OVR_CLK_SRC       ,Always-on cluster CPU NIC idle deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_IDLE_DEEP_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_IDLE_DEEP_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC idle deep override clock divisor"
group.long 0xC30010++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_STBY_SHALLOW_OVR_0,Clock Source Always-On Cluster CPU NIC TGT STBY Shallow Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_STBY_SHALLOW_OVR_CLK_SRC       ,Always-on cluster CPU NIC STBY shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_STBY_SHALLOW_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_STBY_SHALLOW_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC STBY shallow override clock divisor"
group.long 0xC30014++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_STBY_DEEP_OVR_0,Clock Source Always-On Cluster CPU NIC TGT STBY Deep Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_STBY_DEEP_OVR_CLK_SRC       ,Always-on cluster CPU NIC STBY deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_STBY_DEEP_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_STBY_DEEP_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC STBY deep override clock divisor"
group.long 0xC30018++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_DORMANT_SHALLOW_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Dormant Shallow Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_SRC       ,Always-on cluster CPU NIC dormant shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_DORMANT_SHALLOW_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC dormant shallow override clock divisor"
group.long 0xC3001C++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_DORMANT_DEEP_OVR_0,Clock Source Always-On Cluster CPU NIC TGT Dormant Deep Override"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_DORMANT_DEEP_OVR_CLK_SRC       ,Always-on cluster CPU NIC dormant deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_CPU_NIC_DORMANT_DEEP_OVR_ENABLE        ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_DORMANT_DEEP_OVR_CLK_DIVISOR   ,Always-on cluster CPU NIC dormant deep override clock divisor"
group.long 0xC30020++0x03
line.long 0x00 "PLL_CFG_AON_TGT_ACTIVE_OVR_0,PLL Config Always-On Cluster TGT Active Override"
bitfld.long 0x00 2. " AON_PLL_ACTIVE_OVR_ENABLE            ,Always-on cluster PLL active override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_ACTIVE_OVR_PLL_IDDQ          ,Always-on cluster PLL active override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_ACTIVE_OVR_PLL_ENABLE        ,Always-on cluster PLL active override PLL enable" "Disabled,Enabled"
group.long 0xC30024++0x03
line.long 0x00 "PLL_CFG_AON_TGT_ACTIVE_IRQFIQ_OVR_0,PLL Config Always-On Cluster TGT Active IRQFIQ Override"
bitfld.long 0x00 2. " AON_PLL_ACTIVE_IRQFIQ_OVR_ENABLE            ,Always-on cluster PLL active IRQFIQ override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_ACTIVE_IRQFIQ_OVR_PLL_IDDQ          ,Always-on cluster PLL active IRQFIQ override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_ACTIVE_IRQFIQ_OVR_PLL_ENABLE        ,Always-on cluster PLL active IRQFIQ override PLL enable" "Disabled,Enabled"
group.long 0xC30028++0x03
line.long 0x00 "PLL_CFG_AON_TGT_IDLE_SHALLOW_OVR_0,PLL Config Always-On Cluster TGT Idle Shallow Override"
bitfld.long 0x00 2. " AON_PLL_IDLE_SHALLOW_OVR_ENABLE            ,Always-on cluster PLL idle shallow override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_IDLE_SHALLOW_OVR_PLL_IDDQ          ,Always-on cluster PLL idle shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_IDLE_SHALLOW_OVR_PLL_ENABLE        ,Always-on cluster PLL idle shallow override PLL enable" "Disabled,Enabled"
group.long 0xC3002C++0x03
line.long 0x00 "PLL_CFG_AON_TGT_IDLE_DEEP_OVR_0,PLL Config Always-On Cluster TGT Idle Deep Override"
bitfld.long 0x00 2. " AON_PLL_IDLE_DEEP_OVR_ENABLE            ,Always-on cluster PLL idle deep override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_IDLE_DEEP_OVR_PLL_IDDQ          ,Always-on cluster PLL idle deep override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_IDLE_DEEP_OVR_PLL_ENABLE        ,Always-on cluster PLL idle deep override PLL enable" "Disabled,Enabled"
group.long 0xC30030++0x03
line.long 0x00 "PLL_CFG_AON_TGT_STBY_SHALLOW_OVR_0,PLL Config Always-On Cluster TGT STBY Shallow Override"
bitfld.long 0x00 2. " AON_PLL_STBY_SHALLOW_OVR_ENABLE            ,Always-on cluster PLL STBY shallow override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_STBY_SHALLOW_OVR_PLL_IDDQ          ,Always-on cluster PLL STBY shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_STBY_SHALLOW_OVR_PLL_ENABLE        ,Always-on cluster PLL STBY shallow override PLL enable" "Disabled,Enabled"
group.long 0xC30034++0x03
line.long 0x00 "PLL_CFG_AON_TGT_STBY_DEEP_OVR_0,PLL Config Always-On Cluster TGT STBY Deep Override"
bitfld.long 0x00 2. " AON_PLL_STBY_DEEP_OVR_ENABLE            ,Always-on cluster PLL STBY deep override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_STBY_DEEP_OVR_PLL_IDDQ          ,Always-on cluster PLL STBY deep override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_STBY_DEEP_OVR_PLL_ENABLE        ,Always-on cluster PLL STBY deep override PLL enable" "Disabled,Enabled"
group.long 0xC30038++0x03
line.long 0x00 "PLL_CFG_AON_TGT_DORMANT_SHALLOW_OVR_0,PLL Config Always-On Cluster TGT Dormant Shallow Override"
bitfld.long 0x00 2. " AON_PLL_DORMANT_SHALLOW_OVR_ENABLE            ,Always-on cluster PLL dormant shallow override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_DORMANT_SHALLOW_OVR_PLL_IDDQ          ,Always-on cluster PLL dormant shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_DORMANT_SHALLOW_OVR_PLL_ENABLE        ,Always-on cluster PLL dormant shallow override PLL enable" "Disabled,Enabled"
group.long 0xC3003C++0x03
line.long 0x00 "PLL_CFG_AON_TGT_DORMANT_DEEP_OVR_0,PLL Config Always-On Cluster TGT Dormant Deep Override"
bitfld.long 0x00 2. " AON_PLL_DORMANT_DEEP_OVR_ENABLE            ,Always-on cluster PLL dormant deep override enable" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. " AON_PLL_DORMANT_DEEP_OVR_PLL_IDDQ          ,Always-on cluster PLL dormant deep override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_DORMANT_DEEP_OVR_PLL_ENABLE        ,Always-on cluster PLL dormant deep override PLL enable" "Disabled,Enabled"
group.long 0xC30040++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_ACTIVE_OVR_0,Clock Source Always-On Cluster APB TGT Active Override"
bitfld.long 0x00 29.--31. " AON_APB_ACTIVE_OVR_CLK_SRC           ,Always-on cluster APB active override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_ACTIVE_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_ACTIVE_OVR_CLK_DIVISOR       ,Always-on cluster APB active override clock divisor"
group.long 0xC30044++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source Always-On Cluster APB TGT Active IRQFIQ Override"
bitfld.long 0x00 29.--31. " AON_APB_ACTIVE_IRQFIQ_OVR_CLK_SRC           ,Always-on cluster APB active IRQFIQ override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_ACTIVE_IRQFIQ_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR       ,Always-on cluster APB active IRQFIQ override clock divisor"
group.long 0xC30048++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_IDLE_SHALLOW_OVR_0,Clock Source Always-On Cluster APB TGT Idle Shallow Override"
bitfld.long 0x00 29.--31. " AON_APB_IDLE_SHALLOW_OVR_CLK_SRC           ,Always-on cluster APB idle shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_IDLE_SHALLOW_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_IDLE_SHALLOW_OVR_CLK_DIVISOR       ,Always-on cluster APB idle shallow override clock divisor"
group.long 0xC3004C++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_IDLE_DEEP_OVR_0,Clock Source Always-On Cluster APB TGT Idle Deep Override"
bitfld.long 0x00 29.--31. " AON_APB_IDLE_DEEP_OVR_CLK_SRC           ,Always-on cluster APB idle deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_IDLE_DEEP_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_IDLE_DEEP_OVR_CLK_DIVISOR       ,Always-on cluster APB idle deep override clock divisor"
group.long 0xC30050++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_STBY_SHALLOW_OVR_0,Clock Source Always-On Cluster APB TGT STBY Shallow Override"
bitfld.long 0x00 29.--31. " AON_APB_STBY_SHALLOW_OVR_CLK_SRC           ,Always-on cluster APB STBY shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_STBY_SHALLOW_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_STBY_SHALLOW_OVR_CLK_DIVISOR       ,Always-on cluster APB STBY shallow override clock divisor"
group.long 0xC30054++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_STBY_DEEP_OVR_0,Clock Source Always-On Cluster APB TGT STBY Deep Override"
bitfld.long 0x00 29.--31. " AON_APB_STBY_DEEP_OVR_CLK_SRC           ,Always-on cluster APB STBY deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_STBY_DEEP_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_STBY_DEEP_OVR_CLK_DIVISOR       ,Always-on cluster APB STBY deep override clock divisor"
group.long 0xC30058++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_DORMANT_SHALLOW_OVR_0,Clock Source Always-On Cluster APB TGT Dormant Shallow Override"
bitfld.long 0x00 29.--31. " AON_APB_DORMANT_SHALLOW_OVR_CLK_SRC           ,Always-on cluster APB dormant shallow override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_DORMANT_SHALLOW_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_DORMANT_SHALLOW_OVR_CLK_DIVISOR       ,Always-on cluster APB dormant shallow override clock divisor"
group.long 0xC3005C++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_DORMANT_DEEP_OVR_0,Clock Source Always-On Cluster APB TGT Dormant Deep Override"
bitfld.long 0x00 29.--31. " AON_APB_DORMANT_DEEP_OVR_CLK_SRC           ,Always-on cluster APB dormant deep override clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
bitfld.long 0x00 16. " AON_APB_DORMANT_DEEP_OVR_ENABLE            ,Override the hardware sequencer control register values" "Disabled,Enabled"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_DORMANT_DEEP_OVR_CLK_DIVISOR       ,Always-on cluster APB dormant deep override clock divisor"
group.long 0xC30060++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_ACTIVE_0,Clock Source Always-On Cluster CPU NIC TGT Active"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_ACTIVE_CLK_SRC           ,Always-on cluster CPU NIC active clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_ACTIVE_CLK_DIVISOR       ,Always-on cluster CPU NIC active clock divisor"
group.long 0xC30064++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_ACTIVE_IRQFIQ_0,Clock Source Always-On Cluster CPU NIC TGT Active IRQFIQ"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_ACTIVE_IRQFIQ_CLK_SRC           ,Always-on cluster CPU NIC active IRQFIQ clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_ACTIVE_IRQFIQ_CLK_DIVISOR       ,Always-on cluster CPU NIC active IRQFIQ clock divisor"
group.long 0xC30068++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_IDLE_SHALLOW_0,Clock Source Always-On Cluster CPU NIC TGT Idle Shallow"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_IDLE_SHALLOW_CLK_SRC           ,Always-on cluster CPU NIC idle shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_IDLE_SHALLOW_CLK_DIVISOR       ,Always-on cluster CPU NIC idle shallow clock divisor"
group.long 0xC3006C++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_IDLE_DEEP_0,Clock Source Always-On Cluster CPU NIC TGT Idle Deep"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_IDLE_DEEP_CLK_SRC           ,Always-on cluster CPU NIC idle deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_IDLE_DEEP_CLK_DIVISOR       ,Always-on cluster CPU NIC idle deep clock divisor"
group.long 0xC30070++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_STBY_SHALLOW_0,Clock Source Always-On Cluster CPU NIC TGT STBY Shallow"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_STBY_SHALLOW_CLK_SRC           ,Always-on cluster CPU NIC STBY shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_STBY_SHALLOW_CLK_DIVISOR       ,Always-on cluster CPU NIC STBY shallow clock divisor"
group.long 0xC30074++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_STBY_DEEP_0,Clock Source Always-On Cluster CPU NIC TGT STBY Deep"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_STBY_DEEP_CLK_SRC           ,Always-on cluster CPU NIC STBY deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_STBY_DEEP_CLK_DIVISOR       ,Always-on cluster CPU NIC STBY deep clock divisor"
group.long 0xC30078++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_DORMANT_SHALLOW_0,Clock Source Always-On Cluster CPU NIC TGT Dormant Shallow"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_DORMANT_SHALLOW_CLK_SRC           ,Always-on cluster CPU NIC dormant shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_DORMANT_SHALLOW_CLK_DIVISOR       ,Always-on cluster CPU NIC dormant shallow clock divisor"
group.long 0xC3007C++0x03
line.long 0x00 "CLK_SOURCE_AON_CPU_NIC_TGT_DORMANT_DEEP_0,Clock Source Always-On Cluster CPU NIC TGT Dormant Deep"
bitfld.long 0x00 29.--31. " AON_CPU_NIC_DORMANT_DEEP_CLK_SRC           ,Always-on cluster CPU NIC dormant deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_CPU_NIC_DORMANT_DEEP_CLK_DIVISOR       ,Always-on cluster CPU NIC dormant deep clock divisor"
group.long 0xC30080++0x03
line.long 0x00 "PLL_CFG_AON_TGT_ACTIVE_0,PLL Config Always-On Cluster TGT Active"
bitfld.long 0x00 1. " AON_PLL_ACTIVE_PLL_IDDQ              ,Always-on cluster PLL active PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_ACTIVE_PLL_ENABLE            ,Always-on cluster PLL active PLL enable" "Disabled,Enabled"
group.long 0xC30084++0x03
line.long 0x00 "PLL_CFG_AON_TGT_ACTIVE_IRQFIQ_0,PLL Config Always-On Cluster TGT Active IRQFIQ"
bitfld.long 0x00 1. " AON_PLL_ACTIVE_IRQFIQ_PLL_IDDQ              ,Always-on cluster PLL active IRQFIQ PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_ACTIVE_IRQFIQ_PLL_ENABLE            ,Always-on cluster PLL active IRQFIQ PLL enable" "Disabled,Enabled"
group.long 0xC30088++0x03
line.long 0x00 "PLL_CFG_AON_TGT_IDLE_SHALLOW_0,PLL Config Always-On Cluster TGT Idle Shallow"
bitfld.long 0x00 1. " AON_PLL_IDLE_SHALLOW_PLL_IDDQ              ,Always-on cluster PLL idle shallow PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_IDLE_SHALLOW_PLL_ENABLE            ,Always-on cluster PLL idle shallow PLL enable" "Disabled,Enabled"
group.long 0xC3008C++0x03
line.long 0x00 "PLL_CFG_AON_TGT_IDLE_DEEP_0,PLL Config Always-On Cluster TGT Idle Deep"
bitfld.long 0x00 1. " AON_PLL_IDLE_DEEP_PLL_IDDQ              ,Always-on cluster PLL idle deep PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_IDLE_DEEP_PLL_ENABLE            ,Always-on cluster PLL idle deep PLL enable" "Disabled,Enabled"
group.long 0xC30090++0x03
line.long 0x00 "PLL_CFG_AON_TGT_STBY_SHALLOW_0,PLL Config Always-On Cluster TGT STBY Shallow"
bitfld.long 0x00 1. " AON_PLL_STBY_SHALLOW_PLL_IDDQ              ,Always-on cluster PLL STBY shallow PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_STBY_SHALLOW_PLL_ENABLE            ,Always-on cluster PLL STBY shallow PLL enable" "Disabled,Enabled"
group.long 0xC30094++0x03
line.long 0x00 "PLL_CFG_AON_TGT_STBY_DEEP_0,PLL Config Always-On Cluster TGT STBY Deep"
bitfld.long 0x00 1. " AON_PLL_STBY_DEEP_PLL_IDDQ              ,Always-on cluster PLL STBY deep PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_STBY_DEEP_PLL_ENABLE            ,Always-on cluster PLL STBY deep PLL enable" "Disabled,Enabled"
group.long 0xC30098++0x03
line.long 0x00 "PLL_CFG_AON_TGT_DORMANT_SHALLOW_0,PLL Config Always-On Cluster TGT Dormant Shallow"
bitfld.long 0x00 1. " AON_PLL_DORMANT_SHALLOW_PLL_IDDQ              ,Always-on cluster PLL dormant shallow PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_DORMANT_SHALLOW_PLL_ENABLE            ,Always-on cluster PLL dormant shallow PLL enable" "Disabled,Enabled"
group.long 0xC3009C++0x03
line.long 0x00 "PLL_CFG_AON_TGT_DORMANT_DEEP_0,PLL Config Always-On Cluster TGT Dormant Deep"
bitfld.long 0x00 1. " AON_PLL_DORMANT_DEEP_PLL_IDDQ              ,Always-on cluster PLL dormant deep PLL IDDQ" "0,1"
textline "                                                           "
bitfld.long 0x00 0. " AON_PLL_DORMANT_DEEP_PLL_ENABLE            ,Always-on cluster PLL dormant deep PLL enable" "Disabled,Enabled"
group.long 0xC300A0++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_ACTIVE_0,Clock Source Always-On Cluster APB TGT Active"
bitfld.long 0x00 29.--31. " AON_APB_ACTIVE_CLK_SRC               ,Always-on cluster APB active clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_ACTIVE_CLK_DIVISOR           ,Always-on cluster APB active clock divisor"
group.long 0xC300A4++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_ACTIVE_IRQFIQ_0,Clock Source Always-On Cluster APB TGT Active IRQFIQ"
bitfld.long 0x00 29.--31. " AON_APB_ACTIVE_IRQFIQ_CLK_SRC               ,Always-on cluster APB active IRQFIQ clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_ACTIVE_IRQFIQ_CLK_DIVISOR           ,Always-on cluster APB active IRQFIQ clock divisor"
group.long 0xC300A8++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_IDLE_SHALLOW_0,Clock Source Always-On Cluster APB TGT Idle Shallow"
bitfld.long 0x00 29.--31. " AON_APB_IDLE_SHALLOW_CLK_SRC               ,Always-on cluster APB idle shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_IDLE_SHALLOW_CLK_DIVISOR           ,Always-on cluster APB idle shallow clock divisor"
group.long 0xC300AC++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_IDLE_DEEP_0,Clock Source Always-On Cluster APB TGT Idle Deep"
bitfld.long 0x00 29.--31. " AON_APB_IDLE_DEEP_CLK_SRC               ,Always-on cluster APB idle deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_IDLE_DEEP_CLK_DIVISOR           ,Always-on cluster APB idle deep clock divisor"
group.long 0xC300B0++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_STBY_SHALLOW_0,Clock Source Always-On Cluster APB TGT STBY Shallow"
bitfld.long 0x00 29.--31. " AON_APB_STBY_SHALLOW_CLK_SRC               ,Always-on cluster APB STBY shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_STBY_SHALLOW_CLK_DIVISOR           ,Always-on cluster APB STBY shallow clock divisor"
group.long 0xC300B4++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_STBY_DEEP_0,Clock Source Always-On Cluster APB TGT STBY Deep"
bitfld.long 0x00 29.--31. " AON_APB_STBY_DEEP_CLK_SRC               ,Always-on cluster APB STBY deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_STBY_DEEP_CLK_DIVISOR           ,Always-on cluster APB STBY deep clock divisor"
group.long 0xC300B8++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_DORMANT_SHALLOW_0,Clock Source Always-On Cluster APB TGT Dormant Shallow"
bitfld.long 0x00 29.--31. " AON_APB_DORMANT_SHALLOW_CLK_SRC               ,Always-on cluster APB dormant shallow clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_DORMANT_SHALLOW_CLK_DIVISOR           ,Always-on cluster APB dormant shallow clock divisor"
group.long 0xC300BC++0x03
line.long 0x00 "CLK_SOURCE_AON_APB_TGT_DORMANT_DEEP_0,Clock Source Always-On Cluster APB TGT Dormant Deep"
bitfld.long 0x00 29.--31. " AON_APB_DORMANT_DEEP_CLK_SRC               ,Always-on cluster APB dormant deep clock source" "PLLP_OUT0,PLLC_OUT0,PLLAON_OUT,OSC_UNDIV,OSC_UNDIV,PLLP_OUT0,CLK_S,OSC_UNDIV"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " AON_APB_DORMANT_DEEP_CLK_DIVISOR           ,Always-on cluster APB dormant deep clock divisor"
textline "                                                           "
width 32.
group.long 0xC300C0++0x2B
line.long 0x00 "AON_SEQ_SW_INTERFACE_CTL_0,Always-On Cluster Sequence SW Interface CTL"
rbitfld.long 0x00 31. " AON_SW_TGT_ACK                     ,ACK from the software request interface FSM" "0,1"
bitfld.long 0x00 30. "             AON_SW_TGT_REQ                 ,This field drives the request input of the software request interface FSM" "Not requested,Requested"
textline "                                         "
bitfld.long 0x00 0.--2. " AON_SW_TGT_STATE                   ,Target state requested through software" "0,1,2,3,4,5,6,7"
line.long 0x04 "AON_SEQ_CTL_0_0,Always-On Cluster Sequence CTL 0"
bitfld.long 0x04 12. " AON_APB_ASYNC_OVR_ENABLE           ,Use the software source divide settings for AON_APB" "Disabled,Enabled"
bitfld.long 0x04 11. "      AON_CPU_NIC_ASYNC_OVR_ENABLE   ,Use the software source divide settings for AON_CPU_NIC" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 10. " AON_DISABLE_PLL_HW_CONTROL         ,Override the pll_configured signal from PLL Sequencer to switch/divide Sequencer" "No override,Override"
bitfld.long 0x04 9. "   AON_SWDIV_BYP_CONFIG_PROPAGATE ,Bypass the additional cycle provided for old configuration to propagate" "Not bypassed,Bypassed"
textline "                                         "
bitfld.long 0x04 8. " AON_SWDIV_BYP_PLL_CONFIG           ,When set the switch/divide sequencer does not wait for the PLL sequencer to complete" "Disabled,Enabled"
bitfld.long 0x04 7. "      AON_SWDIV_SEQUENCER_EN         ,Always-on cluster SWDIV sequencer enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 6. " AON_PLL_SEQUENCER_EN               ,Always-on cluster PLL sequencer enable" "Disabled,Enabled"
bitfld.long 0x04 5. "      AON_CPU_NIC_SWDIV_DIS_HWCTRL   ,Always-on cluster CPU NIC SWDIV disable HWCTRL" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 4. " AON_APB_SWDIV_DIS_HWCTRL           ,Always-on cluster APB SWDIV disable hardware control" "No,Yes"
bitfld.long 0x04 3. "           AON_RESET_SEQUENCER_INTF       ,Always-on cluster reset sequencer INTF" "No reset,Reset"
textline "                                         "
bitfld.long 0x04 2. " AON_SWDIV_RST_ACK_ENABLE           ,Always-on cluster SWDIV reset ACK enable" "No reset,Reset"
bitfld.long 0x04 1. "      AON_RESET_SWDIV_FSM            ,Always-on cluster reset SWDIV FSM" "No reset,Reset"
textline "                                         "
bitfld.long 0x04 0. " AON_RESET_PLL_FSM                  ,Always-on cluster reset PLL FSM" "No reset,Reset"
line.long 0x08 "AON_SEQ_TIMEOUT_CTL_0,Always-On Cluster Sequence Timeout CTL"
bitfld.long 0x08 31. " AON_CAR_SEQ_INTR_ENABLE            ,Always-On Cluster CAR sequence interrupt enable" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  AON_CAR_SEQ_INTR_STATUS        ,Read interrupt status" "Not clear,Clear"
textline "                                         "
bitfld.long 0x08 29. " AON_SEQ_TIMEOUT_ACK_ENABLE         ,Always-on cluster sequence timeout ACK enable" "Disabled,Enabled"
hexmask.long.word 0x08 0.--11. 1. "      AON_SEQ_TIMEOUT_COUNT          ,Timeout value used by the sequencer"
line.long 0x0C "AON_SEQ_PLL_LOCK_DLY_CFG_0,Always-On Cluster Sequence PLL Lock Delay Config"
bitfld.long 0x0C 31. " AON_PLL_WAIT_PROG_DELAY            ,Wait for programmable delay for DFLL/PLL to lock" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--11. 1. "      AON_PLL_DLY_LOCK               ,Always-on cluster PLL delay lock"
line.long 0x10 "AON_SEQ_PLL_PWRUP_DLY_CFG_0,Always-On Cluster Sequence PLL PWRUP Delay Config"
hexmask.long.word 0x10 0.--11. 1. " AON_PLL_DLY_PWRUP                  ,Wait for programmable power up delay of the PLL/DFLL"
line.long 0x14 "AON_SEQ_SWDIV_SWITCH_DLY_CFG_0,Always-On Cluster Sequence SWDIV Switch Delay Config"
bitfld.long 0x14 31. " AON_SWDIV_SWDIVCFG_WAIT_PROG_DELAY ,Wait for programmable delay for CPU_NIC/APB switch to complete" "Disabled,Enabled"
hexmask.long.word 0x14 0.--11. 1. "      AON_SWDIV_DLY_SWDIVCFG         ,Always-on cluster SWDIV delay SWDIVCFG"
line.long 0x18 "AON_SEQ_SWDIV_PLL_DLY_CFG_0,Always-On Cluster Sequence SWDIV PLL Delay Config"
bitfld.long 0x18 31. " AON_SWDIV_PLLCFG_WAIT_PROG_DELAY   ,Wait for Lumped delay for PLL to be configured" "Disabled,Enabled"
hexmask.long.word 0x18 0.--11. 1. "      AON_SWDIV_DLY_PLLCFG           ,Always-on cluster SWDIV delay PLLCFG"
line.long 0x1C "AON_SEQ_1US_CYCLE_COUNT_0,Always-On Cluster sequence 1US Cycle Count 0"
bitfld.long 0x1C 0.--5. " AON_SEQUENCER_1USEC_OSC_CYCLE      ,Program the count to generate microsecond reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "AON_SEQ_OVERRIDE_0,AON_SEQ_OVERRIDE_0"
bitfld.long 0x20 3. " AON_SEQ_MODE_SEL_OVR               ,Always-on cluster sequence mode select override" "No override,Override"
bitfld.long 0x20 0.--2. "   AON_SEQ_MODE_SEL_OVR_VAL       ,Always-on cluster sequence mode select override value" "0,1,2,3,4,5,6,7"
rgroup.long 0xC300E4++0x03
line.long 0x00 "AON_SEQ_STATUS_0,Always-On Cluster Sequence Status 0"
bitfld.long 0x00 31. " AON_SEQ_SM_SWDIV_BUSY              ,Always-on cluster sequence SM SWDIV busy" "No busy,Busy"
bitfld.long 0x00 30. "       AON_SEQ_PLL_CONFIGURED         ,Always-on cluster sequence PLL configured" "Not configured,Configured"
textline "                                         "
bitfld.long 0x00 4.--7. " AON_SEQ_PLL_CURR_STATE             ,Reflect PLL current FSM state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "            AON_SEQ_SWDIV_CURR_STATE       ,Reflect switch/divide current FSM state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xC300E8++0x03
line.long 0x00 "AON_SEQ_DEBUG_0,Always-on cluster sequence debug 0"
bitfld.long 0x00 31. " AON_EN_SEQ_DBG                     ,Gate all debug logic to save power" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      AON_LAST_SEQ_COUNT             ,Number of reference period taken by sequencer to respond to request"
textline "                                         "
width 25.
group.long 0xCF8000++0x03
line.long 0x00 "AON_SCR_SHARED_0,Always-On Cluster SCR Shared"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8004++0x03
line.long 0x00 "AON_SCR_PRIVATE_0,Always-On Cluster SCR Private"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8008++0x03
line.long 0x00 "AON_SCR_AON_I2C_SLOW_0,Always-On Cluster SCR AON I2C Slow"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF800C++0x03
line.long 0x00 "AON_SCR_CAN_0,Always-On Cluster SCR CAN"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8010++0x03
line.long 0x00 "AON_SCR_DMIC5_0,Always-On Cluster SCR DMIC5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8014++0x03
line.long 0x00 "AON_SCR_GPIO_0,Always-On Cluster SCR GPIO"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8018++0x03
line.long 0x00 "AON_SCR_HSP_0,Always-On Cluster SCR HSP"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF801C++0x03
line.long 0x00 "AON_SCR_I2C10_0,Always-On Cluster SCR I2C10"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8020++0x03
line.long 0x00 "AON_SCR_I2C2_0,Always-On Cluster SCR I2C2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8024++0x03
line.long 0x00 "AON_SCR_I2C8_0,Always-On Cluster SCR I2C8"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8028++0x03
line.long 0x00 "AON_SCR_MSS_ENCRYPT_0,Always-On Cluster SCR MSS Encrypt"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF802C++0x03
line.long 0x00 "AON_SCR_OSC_0,Always-On Cluster SCR OSC"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8030++0x03
line.long 0x00 "AON_SCR_PLLAON_0,Always-On Cluster SCR PLLAON"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8034++0x03
line.long 0x00 "AON_SCR_PWM4_0,Always-On Cluster SCR PWM4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8038++0x03
line.long 0x00 "AON_SCR_SPI2_0,Always-On Cluster SCR SPI2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF803C++0x03
line.long 0x00 "AON_SCR_TSC_0,Always-On Cluster SCR TSC"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8040++0x03
line.long 0x00 "AON_SCR_UARTC_0,Always-On Cluster SCR UARTC"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8044++0x03
line.long 0x00 "AON_SCR_UARTG_0,Always-On Cluster SCR UARTG"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8048++0x03
line.long 0x00 "AON_SCR_UART_MIPI_CAL_0,Always-On Cluster SCR UART MIPI CAL"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF804C++0x03
line.long 0x00 "AON_SCR_UFS_0,Always-On Cluster SCR UFS"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xCF8050++0x03
line.long 0x00 "AON_SCR_TOUCH_0,Always-On Cluster SCR Touch"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                  "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                                  "
width 35.
group.long 0xD00000++0x0B
line.long 0x00 "RST_DEV_SCE_CPU_NIC_0_SET/CLR,Reset Device SCE CPU NIC"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " SWR_SCE_NIC_RST                             ,SWR SCE NIC reset" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "        SWR_SCE_NSYSPOreset_RST                    ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                            "
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " SWR_SCE_Nreset_RST                          ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "        SWR_SCE_DBGresetN_RST                      ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
textline "                                            "
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " SWR_SCE_PresetDBGN_RST                      ,SW should ensure that there is no pending AXI transaction before asserting this reset" "Disabled,Enabled"
group.long 0xD01000++0x0B
line.long 0x00 "CLK_OUT_ENB_SCE_CPU_NIC_0_SET/CLR,Clock Out Enable SCE CPU NIC"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLK_ENB_SCE_CPU                             ,Enable clock to Cortex-R5 CPU" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        CLK_ENB_SCE_CPU_NIC                        ,Enable clock to Cortex-R5 CPU and Control Fabric" "Disabled,Enabled"
group.long 0xD02000++0x03
line.long 0x00 "BOND_OUT_IP_SCE_CPU_NIC_0,Bond Out IP SCE CPU NIC 0"
bitfld.long 0x00 1. " BOND_OUT_SCE_CPU                            ,Bond out Cortex-R5 CPU" "0,1"
bitfld.long 0x00 0. "               BOND_OUT_SCE_CPU_NIC                       ,Bond out Cortex-R5 CPU and Control Fabric" "0,1"
group.long 0xD03000++0x0B
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_0,Clock Source SCE CPU NIC"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_CLK_SRC                         ,SCE CPU NIC clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
rbitfld.long 0x00 17. "  SCE_CPU_NIC_SWITCH_DIVIDE_BUSY             ,Switch divide busy" "Not busy,Busy"
textline "                                            "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_CLK_DIVISOR                     ,SCE CPU NIC clock divisor"
line.long 0x04 "SCE_NIC_RATE_0,SCE NIC Rate"
bitfld.long 0x04 4. " SCE_NIC_ENABLE                              ,SCE NIC enable" "Disabled,Enabled"
bitfld.long 0x04 0.--1. "        SCE_NIC_RATE                               ,SCE NIC rate" "0,1,2,3"
line.long 0x08 "SCE_SWR_RESET_CYCLE_COUNT_0,SCE SWR Reset Cycle Count 0"
bitfld.long 0x08 0.--4. " SCE_Nreset_CYCLE_COUNT                      ,Privileged mode programmable delay for SCE software reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD13000++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_0,Clock Source SCE APB"
bitfld.long 0x00 29.--31. " SCE_APB_CLK_SRC                             ,SCE APB clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
rbitfld.long 0x00 17. "  SCE_APB_SWITCH_DIVIDE_BUSY                 ,Switch divide busy" "Not busy,Busy"
textline "                                            "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_CLK_DIVISOR                         ,SCE APB clock divisor"
textline "                                            "
width 50.
group.long 0xD20000++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_ACTIVE_OVR_0,Clock Source SCE CPU NIC TGT Active Override"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_ACTIVE_OVR_CLK_SRC     ,SCE CPU NIC active override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_CPU_NIC_ACTIVE_OVR_ENABLE ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_ACTIVE_OVR_CLK_DIVISOR ,SCE CPU NIC active override clock divisor"
group.long 0xD20004++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source SCE CPU NIC TGT Active IRQFIQ Override"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_SRC     ,SCE CPU NIC active IRQFIQ override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_CPU_NIC_ACTIVE_IRQFIQ_OVR_ENABLE ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR ,SCE CPU NIC active IRQFIQ override clock divisor"
group.long 0xD20008++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_IDLE_SHALLOW_OVR_0,Clock Source SCE CPU NIC TGT Idle Shallow Override"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_IDLE_SHALLOW_OVR_CLK_SRC     ,SCE CPU NIC idle shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_CPU_NIC_IDLE_SHALLOW_OVR_ENABLE ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_IDLE_SHALLOW_OVR_CLK_DIVISOR ,SCE CPU NIC idle shallow override clock divisor"
group.long 0xD2000C++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_STBY_SHALLOW_OVR_0,Clock Source SCE CPU NIC TGT STBY Shallow Override"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_STBY_SHALLOW_OVR_CLK_SRC     ,SCE CPU NIC STBY shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_CPU_NIC_STBY_SHALLOW_OVR_ENABLE ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_STBY_SHALLOW_OVR_CLK_DIVISOR ,SCE CPU NIC STBY shallow override clock divisor"
group.long 0xD20010++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_DORMANT_SHALLOW_OVR_0,Clock Source SCE CPU NIC TGT Dormant Shallow Override"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_SRC     ,SCE CPU NIC dormant shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,CLK_DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_CPU_NIC_DORMANT_SHALLOW_OVR_ENABLE ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_CPU_NIC_DORMANT_SHALLOW_OVR_CLK_DIVISOR ,SCE CPU NIC dormant shallow override clock divisor"
group.long 0xD20014++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_ACTIVE_OVR_0,PLL Config SCE TGT Active Override"
bitfld.long 0x00 2. " SCE_PLL_ACTIVE_OVR_ENABLE          ,SCE PLL active override enable" "Disabled,Enabled"
bitfld.long 0x00 1. "        SCE_PLL_ACTIVE_OVR_PLL_IDDQ   ,SCE PLL active override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " SCE_PLL_ACTIVE_OVR_PLL_ENABLE      ,SCE PLL active override PLL enable" "Disabled,Enabled"
group.long 0xD20018++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_ACTIVE_IRQFIQ_OVR_0,PLL Config SCE TGT Active IRQFIQ Override"
bitfld.long 0x00 2. " SCE_PLL_ACTIVE_IRQFIQ_OVR_ENABLE          ,SCE PLL active IRQFIQ override enable" "Disabled,Enabled"
bitfld.long 0x00 1. "        SCE_PLL_ACTIVE_IRQFIQ_OVR_PLL_IDDQ   ,SCE PLL active IRQFIQ override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " SCE_PLL_ACTIVE_IRQFIQ_OVR_PLL_ENABLE      ,SCE PLL active IRQFIQ override PLL enable" "Disabled,Enabled"
group.long 0xD2001C++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_IDLE_SHALLOW_OVR_0,PLL Config SCE TGT Idle Shallow Override"
bitfld.long 0x00 2. " SCE_PLL_IDLE_SHALLOW_OVR_ENABLE          ,SCE PLL idle shallow override enable" "Disabled,Enabled"
bitfld.long 0x00 1. "        SCE_PLL_IDLE_SHALLOW_OVR_PLL_IDDQ   ,SCE PLL idle shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " SCE_PLL_IDLE_SHALLOW_OVR_PLL_ENABLE      ,SCE PLL idle shallow override PLL enable" "Disabled,Enabled"
group.long 0xD20020++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_STBY_SHALLOW_OVR_0,PLL Config SCE TGT STBY Shallow Override"
bitfld.long 0x00 2. " SCE_PLL_STBY_SHALLOW_OVR_ENABLE          ,SCE PLL STBY shallow override enable" "Disabled,Enabled"
bitfld.long 0x00 1. "        SCE_PLL_STBY_SHALLOW_OVR_PLL_IDDQ   ,SCE PLL STBY shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " SCE_PLL_STBY_SHALLOW_OVR_PLL_ENABLE      ,SCE PLL STBY shallow override PLL enable" "Disabled,Enabled"
group.long 0xD20024++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_DORMANT_SHALLOW_OVR_0,PLL Config SCE TGT Dormant Shallow Override"
bitfld.long 0x00 2. " SCE_PLL_DORMANT_SHALLOW_OVR_ENABLE          ,SCE PLL dormant shallow override enable" "Disabled,Enabled"
bitfld.long 0x00 1. "        SCE_PLL_DORMANT_SHALLOW_OVR_PLL_IDDQ   ,SCE PLL dormant shallow override PLL IDDQ" "No override,Override"
textline "                                                           "
bitfld.long 0x00 0. " SCE_PLL_DORMANT_SHALLOW_OVR_PLL_ENABLE      ,SCE PLL dormant shallow override PLL enable" "Disabled,Enabled"
group.long 0xD20028++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_ACTIVE_OVR_0,Clock Source SCE APB TGT Active Override"
bitfld.long 0x00 29.--31. " SCE_APB_ACTIVE_OVR_CLK_SRC         ,SCE APB active override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_APB_ACTIVE_OVR_ENABLE     ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_ACTIVE_OVR_CLK_DIVISOR     ,SCE APB active override clock divisor"
group.long 0xD2002C++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_ACTIVE_IRQFIQ_OVR_0,Clock Source SCE APB TGT Active IRQFIQ Override"
bitfld.long 0x00 29.--31. " SCE_APB_ACTIVE_IRQFIQ_OVR_CLK_SRC         ,SCE APB active IRQFIQ override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_APB_ACTIVE_IRQFIQ_OVR_ENABLE     ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_ACTIVE_IRQFIQ_OVR_CLK_DIVISOR     ,SCE APB active IRQFIQ override clock divisor"
group.long 0xD20030++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_IDLE_SHALLOW_OVR_0,Clock Source SCE APB TGT Idle Shallow Override"
bitfld.long 0x00 29.--31. " SCE_APB_IDLE_SHALLOW_OVR_CLK_SRC         ,SCE APB idle shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_APB_IDLE_SHALLOW_OVR_ENABLE     ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_IDLE_SHALLOW_OVR_CLK_DIVISOR     ,SCE APB idle shallow override clock divisor"
group.long 0xD20034++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_STBY_SHALLOW_OVR_0,Clock Source SCE APB TGT STBY Shallow Override"
bitfld.long 0x00 29.--31. " SCE_APB_STBY_SHALLOW_OVR_CLK_SRC         ,SCE APB STBY shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_APB_STBY_SHALLOW_OVR_ENABLE     ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_STBY_SHALLOW_OVR_CLK_DIVISOR     ,SCE APB STBY shallow override clock divisor"
group.long 0xD20038++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_DORMANT_SHALLOW_OVR_0,Clock Source SCE APB TGT Dormant Shallow Override"
bitfld.long 0x00 29.--31. " SCE_APB_DORMANT_SHALLOW_OVR_CLK_SRC         ,SCE APB dormant shallow override clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
bitfld.long 0x00 16. "  SCE_APB_DORMANT_SHALLOW_OVR_ENABLE     ,Override the hardware sequencer control register values" "No override,Override"
textline "                                                           "
hexmask.long.byte 0x00 0.--7. 1. " SCE_APB_DORMANT_SHALLOW_OVR_CLK_DIVISOR     ,SCE APB dormant shallow override clock divisor"
group.long 0xD2003C++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_ACTIVE_0,Clock Source SCE CPU NIC TGT Active"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_ACTIVE_CLK_SRC         ,SCE CPU NIC active clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_CPU_NIC_ACTIVE_CLK_DIVISOR,SCE CPU NIC active clock divisor"
group.long 0xD20040++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_ACTIVE_IRQFIQ_0,Clock Source SCE CPU NIC TGT Active IRQFIQ"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_ACTIVE_IRQFIQ_CLK_SRC         ,SCE CPU NIC active IRQFIQ clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_CPU_NIC_ACTIVE_IRQFIQ_CLK_DIVISOR,SCE CPU NIC active IRQFIQ clock divisor"
group.long 0xD20044++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_IDLE_SHALLOW_0,Clock Source SCE CPU NIC TGT Idle Shallow"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_IDLE_SHALLOW_CLK_SRC         ,SCE CPU NIC idle shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_CPU_NIC_IDLE_SHALLOW_CLK_DIVISOR,SCE CPU NIC idle shallow clock divisor"
group.long 0xD20048++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_STBY_SHALLOW_0,Clock Source SCE CPU NIC TGT STBY Shallow"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_STBY_SHALLOW_CLK_SRC         ,SCE CPU NIC STBY shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_CPU_NIC_STBY_SHALLOW_CLK_DIVISOR,SCE CPU NIC STBY shallow clock divisor"
group.long 0xD2004C++0x03
line.long 0x00 "CLK_SOURCE_SCE_CPU_NIC_TGT_DORMANT_SHALLOW_0,Clock Source SCE CPU NIC TGT Dormant Shallow"
bitfld.long 0x00 29.--31. " SCE_CPU_NIC_DORMANT_SHALLOW_CLK_SRC         ,SCE CPU NIC dormant shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_CPU_NIC_DORMANT_SHALLOW_CLK_DIVISOR,SCE CPU NIC dormant shallow clock divisor"
group.long 0xD20050++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_ACTIVE_0,PLL Config SCE TGT Active"
bitfld.long 0x00 1. " SCE_PLL_ACTIVE_PLL_IDDQ            ,SCE PLL active PLL IDDQ" "0,1"
bitfld.long 0x00 0. "               SCE_PLL_ACTIVE_PLL_ENABLE     ,SCE PLL active PLL enable" "Disabled,Enabled"
group.long 0xD20054++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_ACTIVE_IRQFIQ_0,PLL Config SCE TGT Active IRQFIQ"
bitfld.long 0x00 1. " SCE_PLL_ACTIVE_IRQFIQ_PLL_IDDQ            ,SCE PLL active IRQFIQ PLL IDDQ" "0,1"
bitfld.long 0x00 0. "               SCE_PLL_ACTIVE_IRQFIQ_PLL_ENABLE     ,SCE PLL active IRQFIQ PLL enable" "Disabled,Enabled"
group.long 0xD20058++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_IDLE_SHALLOW_0,PLL Config SCE TGT Idle Shallow"
bitfld.long 0x00 1. " SCE_PLL_IDLE_SHALLOW_PLL_IDDQ            ,SCE PLL idle shallow PLL IDDQ" "0,1"
bitfld.long 0x00 0. "               SCE_PLL_IDLE_SHALLOW_PLL_ENABLE     ,SCE PLL idle shallow PLL enable" "Disabled,Enabled"
group.long 0xD2005C++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_STBY_SHALLOW_0,PLL Config SCE TGT STBY Shallow"
bitfld.long 0x00 1. " SCE_PLL_STBY_SHALLOW_PLL_IDDQ            ,SCE PLL STBY shallow PLL IDDQ" "0,1"
bitfld.long 0x00 0. "               SCE_PLL_STBY_SHALLOW_PLL_ENABLE     ,SCE PLL STBY shallow PLL enable" "Disabled,Enabled"
group.long 0xD20060++0x03
line.long 0x00 "PLL_CFG_SCE_TGT_DORMANT_SHALLOW_0,PLL Config SCE TGT Dormant Shallow"
bitfld.long 0x00 1. " SCE_PLL_DORMANT_SHALLOW_PLL_IDDQ            ,SCE PLL dormant shallow PLL IDDQ" "0,1"
bitfld.long 0x00 0. "               SCE_PLL_DORMANT_SHALLOW_PLL_ENABLE     ,SCE PLL dormant shallow PLL enable" "Disabled,Enabled"
group.long 0xD20064++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_ACTIVE_0,Clock Source SCE APB TGT Active"
bitfld.long 0x00 29.--31. " SCE_APB_ACTIVE_CLK_SRC             ,SCE APB active clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_APB_ACTIVE_CLK_DIVISOR    ,SCE APB active clock divisor"
group.long 0xD20068++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_ACTIVE_IRQFIQ_0,Clock Source SCE APB TGT Active IRQFIQ"
bitfld.long 0x00 29.--31. " SCE_APB_ACTIVE_IRQFIQ_CLK_SRC             ,SCE APB active IRQFIQ clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_APB_ACTIVE_IRQFIQ_CLK_DIVISOR    ,SCE APB active IRQFIQ clock divisor"
group.long 0xD2006C++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_IDLE_SHALLOW_0,Clock Source SCE APB TGT Idle Shallow"
bitfld.long 0x00 29.--31. " SCE_APB_IDLE_SHALLOW_CLK_SRC             ,SCE APB idle shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_APB_IDLE_SHALLOW_CLK_DIVISOR    ,SCE APB idle shallow clock divisor"
group.long 0xD20070++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_STBY_SHALLOW_0,Clock Source SCE APB TGT STBY Shallow"
bitfld.long 0x00 29.--31. " SCE_APB_STBY_SHALLOW_CLK_SRC             ,SCE APB STBY shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_APB_STBY_SHALLOW_CLK_DIVISOR    ,SCE APB STBY shallow clock divisor"
group.long 0xD20074++0x03
line.long 0x00 "CLK_SOURCE_SCE_APB_TGT_DORMANT_SHALLOW_0,Clock Source SCE APB TGT Dormant Shallow"
bitfld.long 0x00 29.--31. " SCE_APB_DORMANT_SHALLOW_CLK_SRC             ,SCE APB dormant shallow clock source" "PLLP_OUT0,PLLBPMPCAM_OUT,CLK_M,CLK_M,CLK_M,DFLL_SCE,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "  SCE_APB_DORMANT_SHALLOW_CLK_DIVISOR    ,SCE APB dormant shallow clock divisor"
textline "                                                           "
width 32.
group.long 0xD20078++0x23
line.long 0x00 "SCE_SEQ_SW_INTERFACE_CTL_0,SCE Sequence Software Interface CTL"
rbitfld.long 0x00 31. " SCE_SW_TGT_ACK                              ,ACK from the software request interface FSM" "0,1"
bitfld.long 0x00 30. "               SCE_SW_TGT_REQ                             ,This field drives the request input of the software request interface FSM" "Not requested,Requested"
textline "                                         "
bitfld.long 0x00 0.--2. " SCE_SW_TGT_STATE                            ,Target state requested through software" "0,1,2,3,4,5,6,7"
line.long 0x04 "SCE_SEQ_CTL_0_0,SCE Sequence CTL 0"
bitfld.long 0x04 12. " SCE_APB_ASYNC_OVR_ENABLE                    ,Use the software source divide settings for SCE_APB" "Disabled,Enabled"
bitfld.long 0x04 11. "        SCE_CPU_NIC_ASYNC_OVR_ENABLE               ,Use the software source divide settings for SCE_CPU_NIC" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 10. " SCE_DISABLE_PLL_HW_CONTROL                  ,Override the pll_configured signal from PLL sequencer to switch/divide sequencer" "No override,Override"
bitfld.long 0x04 9. "     SCE_SWDIV_BYP_CONFIG_PROPAGATE             ,Bypass the additional cycle provided for old configuration to propagate" "Not bypassed,Bypassed"
textline "                                         "
bitfld.long 0x04 8. " SCE_SWDIV_BYP_PLL_CONFIG                    ,When set the switch/divide sequencer does not wait for the PLL sequencer to complete" "0,1"
bitfld.long 0x04 7. "               SCE_SWDIV_SEQUENCER_EN                     ,Enable switch/divide sequencer" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 6. " SCE_PLL_SEQUENCER_EN                        ,Enable PLL sequencer" "Disabled,Enabled"
bitfld.long 0x04 5. "        SCE_CPU_NIC_SWDIV_DIS_HWCTRL               ,Remove CPU_NIC switch/divide out of the control of sequencer" "No,Yes"
textline "                                         "
bitfld.long 0x04 4. " SCE_APB_SWDIV_DIS_HWCTRL                    ,Remove APB switch/divide out of the control of sequencer" "No,Yes"
bitfld.long 0x04 3. "             SCE_RESET_SEQUENCER_INTF                   ,Reset hardware and software interface FSM" "No reset,Reset"
textline "                                         "
bitfld.long 0x04 2. " SCE_SWDIV_RST_ACK_ENABLE                    ,Send resetACK to the interfaces waiting forACK on switch divide FSM reset" "Disabled,Enabled"
bitfld.long 0x04 1. "        SCE_RESET_SWDIV_FSM                        ,Reset switch/divide FSM" "No reset,Reset"
textline "                                         "
bitfld.long 0x04 0. " SCE_RESET_PLL_FSM                           ,Reset PLL FSM" "No reset,Reset"
line.long 0x08 "SCE_SEQ_TIMEOUT_CTL_0,SCE Sequence Timeout CTL"
bitfld.long 0x08 31. " SCE_CAR_SEQ_INTR_ENABLE                     ,Interrupt enabled" "No interrupt,Interrupt"
eventfld.long 0x08 30. "    SCE_CAR_SEQ_INTR_STATUS                    ,Read interrupt status" "No clear,Clear"
textline "                                         "
bitfld.long 0x08 29. " SCE_SEQ_TIMEOUT_ACK_ENABLE                  ,When set results in providingACK back to hardware and software interface on timeout" "Disabled,Enabled"
hexmask.long.word 0x08 0.--11. 1. "        SCE_SEQ_TIMEOUT_COUNT                      ,Timeout value used by the sequencer"
line.long 0x0C "SCE_SEQ_PLL_LOCK_DLY_CFG_0,SCE Sequence PLL Lock Delay Config"
bitfld.long 0x0C 31. " SCE_PLL_WAIT_PROG_DELAY                     ,Wait for programmable delay for DFLL/PLL" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--11. 1. "        SCE_PLL_DLY_LOCK                           , wait for programmable delay of SCE_PLL_DLY_LOCK us for PLL/DFLL to lock"
line.long 0x10 "SCE_SEQ_PLL_PWRUP_DLY_CFG_0,SCE Sequence PLL Power Up Delay Config"
hexmask.long.word 0x10 0.--11. 1. " SCE_PLL_DLY_PWRUP                           ,Wait for programmable power up delay of the PLL/DFLL"
line.long 0x14 "SCE_SEQ_SWDIV_SWITCH_DLY_CFG_0,SCE sequence SWDIV Switch Delay Config"
bitfld.long 0x14 31. " SCE_SWDIV_SWDIVCFG_WAIT_PROG_DELAY          ,Wait for programmable delay for CPU_NIC/APB switch to complete" "Disabled,Enabled"
hexmask.long.word 0x14 0.--11. 1. "        SCE_SWDIV_DLY_SWDIVCFG                     ,Wait for programmable delay of SCE_SWDIV_DLY_SWDIVCFG us for clock switch to complete"
line.long 0x18 "SCE_SEQ_SWDIV_PLL_DLY_CFG_0,SCE Sequence SWDIV PLL Delay Config"
bitfld.long 0x18 31. " SCE_SWDIV_PLLCFG_WAIT_PROG_DELAY            ,Wait for lumped delay for PLL to be configured" "Disabled,Enabled"
hexmask.long.word 0x18 0.--11. 1. "        SCE_SWDIV_DLY_PLLCFG                       ,Wait for programmable lumped delay of SCE_SWDIV_DLY_PLLCFG us for PLL to be configured"
line.long 0x1C "SCE_SEQ_1US_CYCLE_COUNT_0,SCE Sequence 1US Cycle Count"
bitfld.long 0x1C 0.--5. " SCE_SEQUENCER_1USEC_OSC_CYCLE               ,Program the count to generate microsecond reference" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "SCE_SEQ_OVERRIDE_0,SCE Sequence Override"
bitfld.long 0x20 3. " SCE_SEQ_MODE_SEL_OVR                        ,Override the target mode programmed through hardware and software interface" "No override,Override"
bitfld.long 0x20 0.--2. "     SCE_SEQ_MODE_SEL_OVR_VAL                   ,Use SCE Sequence mode select override value to override the target mode" "0,1,2,3,4,5,6,7"
textline "                                         "
width 29.
rgroup.long 0xD2009C++0x03
line.long 0x00 "SCE_SEQ_STATUS_0,SCE Sequence Status"
bitfld.long 0x00 31. " SCE_SEQ_SM_SWDIV_BUSY                       ,Status bit when set signifies that the switch divide FSM is busy" "Not busy,Busy"
bitfld.long 0x00 30. "       SCE_SEQ_PLL_CONFIGURED                     ,Status bit when set signifies that the PLL FSM is in programmed state" "Not configured,Configured"
textline "                                      "
bitfld.long 0x00 4.--7. " SCE_SEQ_PLL_CURR_STATE                      ,Reflect PLL current FSM state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "             SCE_SEQ_SWDIV_CURR_STATE                   ,Reflect switch/divide current FSM state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xD200A0++0x03
line.long 0x00 "SCE_SEQ_DEBUG_0,SCE Sequence Debug"
bitfld.long 0x00 31. " SCE_EN_SEQ_DBG                              ,Gate all debug logic to save power" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "       SCE_LAST_SEQ_COUNT                         ,Number of reference period taken by sequencer to respond to request"
group.long 0xD30000++0x17
line.long 0x00 "SCE_NAFLL_CFG1_0,SCE NAFLL Config 1"
rbitfld.long 0x00 16. " SCE_NAFLL_CFG1_FLL_LOCK                     ,SCE NAFLL Config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 7. "     SCE_NAFLL_CFG1_OVERRIDE                    ,SCE NAFLL config 1 override" "No override,Override"
textline "                                      "
bitfld.long 0x00 6. " SCE_NAFLL_CFG1_RESET                        ,SCE NAFLL config 1 reset" "No reset,Reset"
bitfld.long 0x00 5. "       SCE_NAFLL_CFG1_EN_PRB_CLKOUT               ,SCE NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " SCE_NAFLL_CFG1_EN_CLK_PRE_SKP               ,SCE NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
bitfld.long 0x00 3. "       SCE_NAFLL_CFG1_BYPASSFLL                   ,SCE NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
textline "                                      "
bitfld.long 0x00 2. " SCE_NAFLL_CFG1_DVCO_DISABLE                 ,SCE NAFLL config 1 DVCO disable" "No,Yes"
bitfld.long 0x00 1. "            SCE_NAFLL_CFG1_IDDQ                        ,SCE NAFLL config 1 IDDQ" "0,1"
textline "                                      "
bitfld.long 0x00 0. " SCE_NAFLL_CFG1_ENABLE                       ,SCE NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "SCE_NAFLL_COEFF_0,SCE NAFLL COEFF"
bitfld.long 0x04 28.--31. " SCE_NAFLL_COEFF_FLL_FRUG_FAST               ,SCE NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "             SCE_NAFLL_COEFF_FLL_FRUG_MAIN              ,SCE NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
bitfld.long 0x04 16.--20. " SCE_NAFLL_COEFF_PDIV                        ,SCE NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "             SCE_NAFLL_COEFF_MDIV                       ,SCE NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "SCE_NAFLL_CFG2_0,SCE NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " SCE_NAFLL_CFG2_FLL_CTRL_LDMEM               ,SCE NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "             SCE_NAFLL_CFG2_FLL_INIT                    ,SCE NAFLL config 2 FLL initialization"
line.long 0x0C "SCE_NAFLL_CFG3_0,SCE NAFLL Config 3"
line.long 0x10 "SCE_NAFLL_CTRL1_0,SCE NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " SCE_NAFLL_CTRL1_SETUP                       ,SCE NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "           SCE_NAFLL_CTRL1_FLL_CTRL                   ,SCE NAFLL control 1 FLL control"
line.long 0x14 "SCE_NAFLL_CTRL2_0,SCE NAFLL Control 2"
bitfld.long 0x14 28.--31. " SCE_NAFLL_CTRL2_SRAM_VFGAIN                 ,SCE NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "             SCE_NAFLL_CTRL2_SRAM_CHAIN_INIT            ,SCE NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
bitfld.long 0x14 20.--23. " SCE_NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD ,SCE NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "             SCE_NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM ,SCE NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
bitfld.long 0x14 8.--11. " SCE_NAFLL_CTRL2_DEBUG_SEL                   ,SCE NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "             SCE_NAFLL_CTRL2_FLL_OVERRIDE               ,SCE NAFLL control 2 FLL override"
rgroup.long 0xD30018++0x03
line.long 0x00 "SCE_NAFLL_MISC_0,SCE NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " SCE_NAFLL_MISC_DEBUG_DATA                   ,SCE NAFLL MISC debug data"
group.long 0xD3001C++0x07
line.long 0x00 "SCE_NAFLL_SKP_COEFF_0,SCE NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " SCE_NAFLL_SKP_COEFF_DIVISOR                 ,SCE NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "             SCE_NAFLL_SKP_COEFF_DIVIDEND               ,SCE NAFLL SKP COEFF dividend"
line.long 0x04 "SCE_NAFLL_SKP_CTRL_0,SCE NAFLL SKP Control"
bitfld.long 0x04 3.--7. " SCE_NAFLL_SKP_CTRL_RAMP_RATE                ,SCE NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "             SCE_NAFLL_SKP_CTRL_SKP_CTRL                ,SCE NAFLL SKP control SKP control" "0,1,2,3"
textline "                                      "
bitfld.long 0x04 0. " SCE_NAFLL_SKP_CTRL_SKP_EN                   ,SCE NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long 0xD30040++0x1B
line.long 0x00 "SCE_NAFLL_LUT_WRITE_ADDR_0,SCE NAFLL LUT Write Address"
bitfld.long 0x00 31. " SCE_NAFLL_LUT_WRITE_ADDR_AUTO_INC           ,SCE NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "              SCE_NAFLL_LUT_WRITE_ADDR_OFFSET            ,SCE NAFLL LUT write address offset"
line.long 0x04 "SCE_NAFLL_LUT_WRITE_DATA_0,SCE NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " SCE_NAFLL_LUT_WRITE_DATA_VAL1               ,SCE NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "           SCE_NAFLL_LUT_WRITE_DATA_VAL0              ,SCE NAFLL LUT write data value 0"
line.long 0x08 "SCE_NAFLL_LUT_READ_ADDR_0,SCE NAFLL LUT Read Address"
bitfld.long 0x08 31. " SCE_NAFLL_LUT_READ_ADDR_AUTO_INC            ,SCE NAFLL LUT read address auto INC" "No read,Read"
hexmask.long.byte 0x08 0.--7. 0x01 "        SCE_NAFLL_LUT_READ_ADDR_OFFSET             ,SCE NAFLL LUT read address offset"
line.long 0x0C "SCE_NAFLL_LUT_READ_DATA_0,SCE NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " SCE_NAFLL_LUT_READ_DATA_VAL1                ,SCE NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "           SCE_NAFLL_LUT_READ_DATA_VAL0               ,SCE NAFLL LUT read data value 0"
line.long 0x10 "SCE_NAFLL_LUT_DEBUG2_0,SCE NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " SCE_NAFLL_LUT_DEBUG2_NDIV                   ,SCE NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "           SCE_NAFLL_LUT_DEBUG2_VFGAIN                ,SCE NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
bitfld.long 0x10 0.--3. " SCE_NAFLL_LUT_DEBUG2_PRI_CTRL_STATE         ,SCE NAFLL LUT debug 2 PRI control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "SCE_NAFLL_LUT_CFG_0,SCE NAFLL LUT Config"
bitfld.long 0x14 16.--19. " SCE_NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD      ,SCE NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "             SCE_NAFLL_LUT_CFG_RAM_READ_EN              ,SCE NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x14 8. " SCE_NAFLL_LUT_CFG_RESET_FSM                 ,SCE NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "       SCE_NAFLL_LUT_CFG_TEMP_IDX                 ,SCE NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "SCE_NAFLL_LUT_SW_FREQ_REQ_0,SCE NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " SCE_NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD       ,SCE NAFLL LUT software frequency request SRAM SD" "Not requested,Requested"
bitfld.long 0x18 20.--23. "  SCE_NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN       ,SCE NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
hexmask.long.word 0x18 4.--12. 1. " SCE_NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV          ,SCE NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "           SCE_NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT  ,SCE NAFLL LUT software frequency request SW override LUT" "0,1,2,3"
textline "                                      "
bitfld.long 0x18 0.--1. " SCE_NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT       ,SCE NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long 0xD3005C++0x03
line.long 0x00 "SCE_NAFLL_LUT_ACK_0,SCE NAFLL LUT ACK 0"
bitfld.long 0x00 3. " SCE_NAFLL_LUT_ACK_RDACK_LUT_DEBUG           ,SCE NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long 0xD3006C++0x03
line.long 0x00 "SCE_CLK_FR_CNTR_CFG_0,SCE Clock FR Control Config 0"
bitfld.long 0x00 28.--31. " SCE_CLK_FR_CNTR_CFG_SOURCE                  ,SCE clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "             SCE_CLK_FR_CNTR_CFG_CONTINOUS_UPDATE       ,SCE clock FR control config continuous update" "Not updated,Updated"
textline "                                      "
bitfld.long 0x00 25. " SCE_CLK_FR_CNTR_CFG_START_COUNT             ,SCE clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "      SCE_CLK_FR_CNTR_CFG_RESET                  ,SCE clock FR control config reset" "No reset,Reset"
textline "                                      "
bitfld.long 0x00 0.--2. " SCE_CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES     ,SCE clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long 0xD30070++0x07
line.long 0x00 "SCE_CLK_FR_CNTR_CNT0_0,SCE Clock FR Control Count 0"
line.long 0x04 "SCE_CLK_FR_CNTR_CNT1_0,SCE Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " SCE_CLK_FR_CNTR_CNT1_VALUE                  ,SCE clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                      "
width 19.
group.long 0xDF8000++0x03
line.long 0x00 "SCE_SCR_SHARED_0,SCE SCR Shared"
bitfld.long 0x00 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN   ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "        SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "        PR6       ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "        PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "        PR2       ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W       ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "        G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "        G2W       ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "        G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "        G6R       ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R       ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "        G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xDF8004++0x03
line.long 0x00 "SCE_SCR_PRIVATE_0,SCE SCR Private"
bitfld.long 0x00 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN   ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "        SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "        PR6       ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "        PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "        PR2       ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W       ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "        G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "        G2W       ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "        G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "        G6R       ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R       ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "        G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xDF8008++0x03
line.long 0x00 "SCE_SCR_DVFS_0,SCE SCR DVFS"
bitfld.long 0x00 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN   ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "        SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "        PR6       ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "        PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "        PR2       ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W       ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "        G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "        G2W       ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "        G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "        G6R       ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R       ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "        G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                            "
width 37.
group.long 0xE10000++0x17
line.long 0x00 "NVDEC_NAFLL_CFG1_0,NVDEC NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,NVDEC NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,NVDEC NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,NVDEC NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,NVDEC NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,NVDEC NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,NVDEC NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,NVDEC NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,NVDEC NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "NVDEC_NAFLL_COEFF_0,NVDEC NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,NVDEC NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,NVDEC NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,NVDEC NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,NVDEC NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "NVDEC_NAFLL_CFG2_0,NVDEC NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,NVDEC NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,NVDEC NAFLL config 2 FLL initialization"
line.long 0x0C "NVDEC_NAFLL_CFG3_0,NVDEC NAFLL Config 3"
line.long 0x10 "NVDEC_NAFLL_CTRL1_0,NVDEC NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,NVDEC NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,NVDEC NAFLL control 1 FLL control"
line.long 0x14 "NVDEC_NAFLL_CTRL2_0,NVDEC NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,NVDEC NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,NVDEC NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,NVDEC NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,NVDEC NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,NVDEC NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,NVDEC NAFLL control 2 FLL override"
rgroup.long (0xE10000+0x18)++0x03
line.long 0x00 "NVDEC_NAFLL_MISC_0,NVDEC NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,NVDEC NAFLL MISC debug data"
group.long (0xE10000+0x1C)++0x07
line.long 0x00 "NVDEC_NAFLL_SKP_COEFF_0,NVDEC NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,NVDEC NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,NVDEC NAFLL SKP COEFF dividend"
line.long 0x04 "NVDEC_NAFLL_SKP_CTRL_0,NVDEC NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,NVDEC NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,NVDEC NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,NVDEC NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE10000+0x40)++0x1B
line.long 0x00 "NVDEC_NAFLL_LUT_WRITE_ADDR_0,NVDEC NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,NVDEC NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,NVDEC NAFLL LUT write address offset"
line.long 0x04 "NVDEC_NAFLL_LUT_WRITE_DATA_0,NVDEC NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,NVDEC NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,NVDEC NAFLL LUT write data value 0"
line.long 0x08 "NVDEC_NAFLL_LUT_READ_ADDR_0,NVDEC NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,NVDEC NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,NVDEC NAFLL LUT read address offset"
line.long 0x0C "NVDEC_NAFLL_LUT_READ_DATA_0,NVDEC NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,NVDEC NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,NVDEC NAFLL LUT read data value 0"
line.long 0x10 "NVDEC_NAFLL_LUT_DEBUG2_0,NVDEC NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,NVDEC NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,NVDEC NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,NVDEC NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "NVDEC_NAFLL_LUT_CFG_0,NVDEC NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,NVDEC NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,NVDEC NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,NVDEC NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,NVDEC NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "NVDEC_NAFLL_LUT_SW_FREQ_REQ_0,NVDEC NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,NVDEC NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,NVDEC NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,NVDEC NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,NVDEC NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,NVDEC NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE10000+0x5C)++0x03
line.long 0x00 "NVDEC_NAFLL_LUT_ACK_0,NVDEC NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,NVDEC NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE10000+0x6C)++0x03
line.long 0x00 "NVDEC_CLK_FR_CNTR_CFG_0,NVDEC Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,NVDEC clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,NVDEC clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,NVDEC clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,NVDEC clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,NVDEC clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE10000+0x70)++0x07
line.long 0x00 "NVDEC_CLK_FR_CNTR_CNT0_0,NVDEC Clock FR Control Count 0"
line.long 0x04 "NVDEC_CLK_FR_CNTR_CNT1_0,NVDEC Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,NVDEC Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE20000++0x17
line.long 0x00 "NVJPG_NAFLL_CFG1_0,NVJPG NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,NVJPG NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,NVJPG NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,NVJPG NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,NVJPG NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,NVJPG NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,NVJPG NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,NVJPG NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,NVJPG NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "NVJPG_NAFLL_COEFF_0,NVJPG NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,NVJPG NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,NVJPG NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,NVJPG NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,NVJPG NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "NVJPG_NAFLL_CFG2_0,NVJPG NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,NVJPG NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,NVJPG NAFLL config 2 FLL initialization"
line.long 0x0C "NVJPG_NAFLL_CFG3_0,NVJPG NAFLL Config 3"
line.long 0x10 "NVJPG_NAFLL_CTRL1_0,NVJPG NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,NVJPG NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,NVJPG NAFLL control 1 FLL control"
line.long 0x14 "NVJPG_NAFLL_CTRL2_0,NVJPG NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,NVJPG NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,NVJPG NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,NVJPG NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,NVJPG NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,NVJPG NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,NVJPG NAFLL control 2 FLL override"
rgroup.long (0xE20000+0x18)++0x03
line.long 0x00 "NVJPG_NAFLL_MISC_0,NVJPG NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,NVJPG NAFLL MISC debug data"
group.long (0xE20000+0x1C)++0x07
line.long 0x00 "NVJPG_NAFLL_SKP_COEFF_0,NVJPG NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,NVJPG NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,NVJPG NAFLL SKP COEFF dividend"
line.long 0x04 "NVJPG_NAFLL_SKP_CTRL_0,NVJPG NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,NVJPG NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,NVJPG NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,NVJPG NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE20000+0x40)++0x1B
line.long 0x00 "NVJPG_NAFLL_LUT_WRITE_ADDR_0,NVJPG NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,NVJPG NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,NVJPG NAFLL LUT write address offset"
line.long 0x04 "NVJPG_NAFLL_LUT_WRITE_DATA_0,NVJPG NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,NVJPG NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,NVJPG NAFLL LUT write data value 0"
line.long 0x08 "NVJPG_NAFLL_LUT_READ_ADDR_0,NVJPG NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,NVJPG NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,NVJPG NAFLL LUT read address offset"
line.long 0x0C "NVJPG_NAFLL_LUT_READ_DATA_0,NVJPG NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,NVJPG NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,NVJPG NAFLL LUT read data value 0"
line.long 0x10 "NVJPG_NAFLL_LUT_DEBUG2_0,NVJPG NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,NVJPG NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,NVJPG NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,NVJPG NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "NVJPG_NAFLL_LUT_CFG_0,NVJPG NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,NVJPG NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,NVJPG NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,NVJPG NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,NVJPG NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "NVJPG_NAFLL_LUT_SW_FREQ_REQ_0,NVJPG NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,NVJPG NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,NVJPG NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,NVJPG NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,NVJPG NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,NVJPG NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE20000+0x5C)++0x03
line.long 0x00 "NVJPG_NAFLL_LUT_ACK_0,NVJPG NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,NVJPG NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE20000+0x6C)++0x03
line.long 0x00 "NVJPG_CLK_FR_CNTR_CFG_0,NVJPG Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,NVJPG clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,NVJPG clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,NVJPG clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,NVJPG clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,NVJPG clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE20000+0x70)++0x07
line.long 0x00 "NVJPG_CLK_FR_CNTR_CNT0_0,NVJPG Clock FR Control Count 0"
line.long 0x04 "NVJPG_CLK_FR_CNTR_CNT1_0,NVJPG Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,NVJPG Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE30000++0x17
line.long 0x00 "TSEC_NAFLL_CFG1_0,TSEC NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,TSEC NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,TSEC NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,TSEC NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,TSEC NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,TSEC NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,TSEC NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,TSEC NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,TSEC NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "TSEC_NAFLL_COEFF_0,TSEC NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,TSEC NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,TSEC NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,TSEC NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,TSEC NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "TSEC_NAFLL_CFG2_0,TSEC NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,TSEC NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,TSEC NAFLL config 2 FLL initialization"
line.long 0x0C "TSEC_NAFLL_CFG3_0,TSEC NAFLL Config 3"
line.long 0x10 "TSEC_NAFLL_CTRL1_0,TSEC NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,TSEC NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,TSEC NAFLL control 1 FLL control"
line.long 0x14 "TSEC_NAFLL_CTRL2_0,TSEC NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,TSEC NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,TSEC NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,TSEC NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,TSEC NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,TSEC NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,TSEC NAFLL control 2 FLL override"
rgroup.long (0xE30000+0x18)++0x03
line.long 0x00 "TSEC_NAFLL_MISC_0,TSEC NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,TSEC NAFLL MISC debug data"
group.long (0xE30000+0x1C)++0x07
line.long 0x00 "TSEC_NAFLL_SKP_COEFF_0,TSEC NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,TSEC NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,TSEC NAFLL SKP COEFF dividend"
line.long 0x04 "TSEC_NAFLL_SKP_CTRL_0,TSEC NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,TSEC NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,TSEC NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,TSEC NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE30000+0x40)++0x1B
line.long 0x00 "TSEC_NAFLL_LUT_WRITE_ADDR_0,TSEC NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,TSEC NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,TSEC NAFLL LUT write address offset"
line.long 0x04 "TSEC_NAFLL_LUT_WRITE_DATA_0,TSEC NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,TSEC NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,TSEC NAFLL LUT write data value 0"
line.long 0x08 "TSEC_NAFLL_LUT_READ_ADDR_0,TSEC NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,TSEC NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,TSEC NAFLL LUT read address offset"
line.long 0x0C "TSEC_NAFLL_LUT_READ_DATA_0,TSEC NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,TSEC NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,TSEC NAFLL LUT read data value 0"
line.long 0x10 "TSEC_NAFLL_LUT_DEBUG2_0,TSEC NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,TSEC NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,TSEC NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,TSEC NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "TSEC_NAFLL_LUT_CFG_0,TSEC NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,TSEC NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,TSEC NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,TSEC NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,TSEC NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "TSEC_NAFLL_LUT_SW_FREQ_REQ_0,TSEC NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,TSEC NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,TSEC NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,TSEC NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,TSEC NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,TSEC NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE30000+0x5C)++0x03
line.long 0x00 "TSEC_NAFLL_LUT_ACK_0,TSEC NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,TSEC NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE30000+0x6C)++0x03
line.long 0x00 "TSEC_CLK_FR_CNTR_CFG_0,TSEC Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,TSEC clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,TSEC clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,TSEC clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,TSEC clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,TSEC clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE30000+0x70)++0x07
line.long 0x00 "TSEC_CLK_FR_CNTR_CNT0_0,TSEC Clock FR Control Count 0"
line.long 0x04 "TSEC_CLK_FR_CNTR_CNT1_0,TSEC Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,TSEC Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE40000++0x17
line.long 0x00 "TSECB_NAFLL_CFG1_0,TSECB NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,TSECB NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,TSECB NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,TSECB NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,TSECB NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,TSECB NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,TSECB NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,TSECB NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,TSECB NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "TSECB_NAFLL_COEFF_0,TSECB NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,TSECB NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,TSECB NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,TSECB NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,TSECB NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "TSECB_NAFLL_CFG2_0,TSECB NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,TSECB NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,TSECB NAFLL config 2 FLL initialization"
line.long 0x0C "TSECB_NAFLL_CFG3_0,TSECB NAFLL Config 3"
line.long 0x10 "TSECB_NAFLL_CTRL1_0,TSECB NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,TSECB NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,TSECB NAFLL control 1 FLL control"
line.long 0x14 "TSECB_NAFLL_CTRL2_0,TSECB NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,TSECB NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,TSECB NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,TSECB NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,TSECB NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,TSECB NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,TSECB NAFLL control 2 FLL override"
rgroup.long (0xE40000+0x18)++0x03
line.long 0x00 "TSECB_NAFLL_MISC_0,TSECB NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,TSECB NAFLL MISC debug data"
group.long (0xE40000+0x1C)++0x07
line.long 0x00 "TSECB_NAFLL_SKP_COEFF_0,TSECB NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,TSECB NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,TSECB NAFLL SKP COEFF dividend"
line.long 0x04 "TSECB_NAFLL_SKP_CTRL_0,TSECB NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,TSECB NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,TSECB NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,TSECB NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE40000+0x40)++0x1B
line.long 0x00 "TSECB_NAFLL_LUT_WRITE_ADDR_0,TSECB NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,TSECB NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,TSECB NAFLL LUT write address offset"
line.long 0x04 "TSECB_NAFLL_LUT_WRITE_DATA_0,TSECB NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,TSECB NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,TSECB NAFLL LUT write data value 0"
line.long 0x08 "TSECB_NAFLL_LUT_READ_ADDR_0,TSECB NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,TSECB NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,TSECB NAFLL LUT read address offset"
line.long 0x0C "TSECB_NAFLL_LUT_READ_DATA_0,TSECB NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,TSECB NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,TSECB NAFLL LUT read data value 0"
line.long 0x10 "TSECB_NAFLL_LUT_DEBUG2_0,TSECB NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,TSECB NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,TSECB NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,TSECB NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "TSECB_NAFLL_LUT_CFG_0,TSECB NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,TSECB NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,TSECB NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,TSECB NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,TSECB NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "TSECB_NAFLL_LUT_SW_FREQ_REQ_0,TSECB NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,TSECB NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,TSECB NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,TSECB NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,TSECB NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,TSECB NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE40000+0x5C)++0x03
line.long 0x00 "TSECB_NAFLL_LUT_ACK_0,TSECB NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,TSECB NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE40000+0x6C)++0x03
line.long 0x00 "TSECB_CLK_FR_CNTR_CFG_0,TSECB Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,TSECB clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,TSECB clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,TSECB clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,TSECB clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,TSECB clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE40000+0x70)++0x07
line.long 0x00 "TSECB_CLK_FR_CNTR_CNT0_0,TSECB Clock FR Control Count 0"
line.long 0x04 "TSECB_CLK_FR_CNTR_CNT1_0,TSECB Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,TSECB Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE50000++0x17
line.long 0x00 "VI_NAFLL_CFG1_0,VI NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,VI NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,VI NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,VI NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,VI NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,VI NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,VI NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,VI NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,VI NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "VI_NAFLL_COEFF_0,VI NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,VI NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,VI NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,VI NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,VI NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "VI_NAFLL_CFG2_0,VI NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,VI NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,VI NAFLL config 2 FLL initialization"
line.long 0x0C "VI_NAFLL_CFG3_0,VI NAFLL Config 3"
line.long 0x10 "VI_NAFLL_CTRL1_0,VI NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,VI NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,VI NAFLL control 1 FLL control"
line.long 0x14 "VI_NAFLL_CTRL2_0,VI NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,VI NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,VI NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,VI NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,VI NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,VI NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,VI NAFLL control 2 FLL override"
rgroup.long (0xE50000+0x18)++0x03
line.long 0x00 "VI_NAFLL_MISC_0,VI NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,VI NAFLL MISC debug data"
group.long (0xE50000+0x1C)++0x07
line.long 0x00 "VI_NAFLL_SKP_COEFF_0,VI NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,VI NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,VI NAFLL SKP COEFF dividend"
line.long 0x04 "VI_NAFLL_SKP_CTRL_0,VI NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,VI NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,VI NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,VI NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE50000+0x40)++0x1B
line.long 0x00 "VI_NAFLL_LUT_WRITE_ADDR_0,VI NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,VI NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,VI NAFLL LUT write address offset"
line.long 0x04 "VI_NAFLL_LUT_WRITE_DATA_0,VI NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,VI NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,VI NAFLL LUT write data value 0"
line.long 0x08 "VI_NAFLL_LUT_READ_ADDR_0,VI NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,VI NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,VI NAFLL LUT read address offset"
line.long 0x0C "VI_NAFLL_LUT_READ_DATA_0,VI NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,VI NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,VI NAFLL LUT read data value 0"
line.long 0x10 "VI_NAFLL_LUT_DEBUG2_0,VI NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,VI NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,VI NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,VI NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "VI_NAFLL_LUT_CFG_0,VI NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,VI NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,VI NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,VI NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,VI NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "VI_NAFLL_LUT_SW_FREQ_REQ_0,VI NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,VI NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,VI NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,VI NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,VI NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,VI NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE50000+0x5C)++0x03
line.long 0x00 "VI_NAFLL_LUT_ACK_0,VI NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,VI NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE50000+0x6C)++0x03
line.long 0x00 "VI_CLK_FR_CNTR_CFG_0,VI Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,VI clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,VI clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,VI clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,VI clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,VI clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE50000+0x70)++0x07
line.long 0x00 "VI_CLK_FR_CNTR_CNT0_0,VI Clock FR Control Count 0"
line.long 0x04 "VI_CLK_FR_CNTR_CNT1_0,VI Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,VI Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE60000++0x17
line.long 0x00 "SE_NAFLL_CFG1_0,SE NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,SE NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,SE NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,SE NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,SE NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,SE NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,SE NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,SE NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,SE NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "SE_NAFLL_COEFF_0,SE NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,SE NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,SE NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,SE NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,SE NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "SE_NAFLL_CFG2_0,SE NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,SE NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,SE NAFLL config 2 FLL initialization"
line.long 0x0C "SE_NAFLL_CFG3_0,SE NAFLL Config 3"
line.long 0x10 "SE_NAFLL_CTRL1_0,SE NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,SE NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,SE NAFLL control 1 FLL control"
line.long 0x14 "SE_NAFLL_CTRL2_0,SE NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,SE NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,SE NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,SE NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,SE NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,SE NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,SE NAFLL control 2 FLL override"
rgroup.long (0xE60000+0x18)++0x03
line.long 0x00 "SE_NAFLL_MISC_0,SE NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,SE NAFLL MISC debug data"
group.long (0xE60000+0x1C)++0x07
line.long 0x00 "SE_NAFLL_SKP_COEFF_0,SE NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,SE NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,SE NAFLL SKP COEFF dividend"
line.long 0x04 "SE_NAFLL_SKP_CTRL_0,SE NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,SE NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,SE NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,SE NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE60000+0x40)++0x1B
line.long 0x00 "SE_NAFLL_LUT_WRITE_ADDR_0,SE NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,SE NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,SE NAFLL LUT write address offset"
line.long 0x04 "SE_NAFLL_LUT_WRITE_DATA_0,SE NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,SE NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,SE NAFLL LUT write data value 0"
line.long 0x08 "SE_NAFLL_LUT_READ_ADDR_0,SE NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,SE NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,SE NAFLL LUT read address offset"
line.long 0x0C "SE_NAFLL_LUT_READ_DATA_0,SE NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,SE NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,SE NAFLL LUT read data value 0"
line.long 0x10 "SE_NAFLL_LUT_DEBUG2_0,SE NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,SE NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,SE NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,SE NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "SE_NAFLL_LUT_CFG_0,SE NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,SE NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,SE NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,SE NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,SE NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "SE_NAFLL_LUT_SW_FREQ_REQ_0,SE NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,SE NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,SE NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,SE NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,SE NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,SE NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE60000+0x5C)++0x03
line.long 0x00 "SE_NAFLL_LUT_ACK_0,SE NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,SE NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE60000+0x6C)++0x03
line.long 0x00 "SE_CLK_FR_CNTR_CFG_0,SE Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,SE clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,SE clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,SE clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,SE clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,SE clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE60000+0x70)++0x07
line.long 0x00 "SE_CLK_FR_CNTR_CNT0_0,SE Clock FR Control Count 0"
line.long 0x04 "SE_CLK_FR_CNTR_CNT1_0,SE Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,SE Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE70000++0x17
line.long 0x00 "NVENC_NAFLL_CFG1_0,NVENC NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,NVENC NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,NVENC NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,NVENC NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,NVENC NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,NVENC NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,NVENC NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,NVENC NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,NVENC NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "NVENC_NAFLL_COEFF_0,NVENC NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,NVENC NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,NVENC NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,NVENC NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,NVENC NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "NVENC_NAFLL_CFG2_0,NVENC NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,NVENC NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,NVENC NAFLL config 2 FLL initialization"
line.long 0x0C "NVENC_NAFLL_CFG3_0,NVENC NAFLL Config 3"
line.long 0x10 "NVENC_NAFLL_CTRL1_0,NVENC NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,NVENC NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,NVENC NAFLL control 1 FLL control"
line.long 0x14 "NVENC_NAFLL_CTRL2_0,NVENC NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,NVENC NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,NVENC NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,NVENC NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,NVENC NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,NVENC NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,NVENC NAFLL control 2 FLL override"
rgroup.long (0xE70000+0x18)++0x03
line.long 0x00 "NVENC_NAFLL_MISC_0,NVENC NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,NVENC NAFLL MISC debug data"
group.long (0xE70000+0x1C)++0x07
line.long 0x00 "NVENC_NAFLL_SKP_COEFF_0,NVENC NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,NVENC NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,NVENC NAFLL SKP COEFF dividend"
line.long 0x04 "NVENC_NAFLL_SKP_CTRL_0,NVENC NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,NVENC NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,NVENC NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,NVENC NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE70000+0x40)++0x1B
line.long 0x00 "NVENC_NAFLL_LUT_WRITE_ADDR_0,NVENC NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,NVENC NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,NVENC NAFLL LUT write address offset"
line.long 0x04 "NVENC_NAFLL_LUT_WRITE_DATA_0,NVENC NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,NVENC NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,NVENC NAFLL LUT write data value 0"
line.long 0x08 "NVENC_NAFLL_LUT_READ_ADDR_0,NVENC NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,NVENC NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,NVENC NAFLL LUT read address offset"
line.long 0x0C "NVENC_NAFLL_LUT_READ_DATA_0,NVENC NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,NVENC NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,NVENC NAFLL LUT read data value 0"
line.long 0x10 "NVENC_NAFLL_LUT_DEBUG2_0,NVENC NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,NVENC NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,NVENC NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,NVENC NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "NVENC_NAFLL_LUT_CFG_0,NVENC NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,NVENC NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,NVENC NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,NVENC NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,NVENC NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "NVENC_NAFLL_LUT_SW_FREQ_REQ_0,NVENC NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,NVENC NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,NVENC NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,NVENC NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,NVENC NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,NVENC NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE70000+0x5C)++0x03
line.long 0x00 "NVENC_NAFLL_LUT_ACK_0,NVENC NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,NVENC NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE70000+0x6C)++0x03
line.long 0x00 "NVENC_CLK_FR_CNTR_CFG_0,NVENC Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,NVENC clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,NVENC clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,NVENC clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,NVENC clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,NVENC clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE70000+0x70)++0x07
line.long 0x00 "NVENC_CLK_FR_CNTR_CNT0_0,NVENC Clock FR Control Count 0"
line.long 0x04 "NVENC_CLK_FR_CNTR_CNT1_0,NVENC Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,NVENC Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE80000++0x17
line.long 0x00 "ISP_NAFLL_CFG1_0,ISP NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,ISP NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,ISP NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,ISP NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,ISP NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,ISP NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,ISP NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,ISP NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,ISP NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "ISP_NAFLL_COEFF_0,ISP NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,ISP NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,ISP NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,ISP NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,ISP NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "ISP_NAFLL_CFG2_0,ISP NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,ISP NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,ISP NAFLL config 2 FLL initialization"
line.long 0x0C "ISP_NAFLL_CFG3_0,ISP NAFLL Config 3"
line.long 0x10 "ISP_NAFLL_CTRL1_0,ISP NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,ISP NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,ISP NAFLL control 1 FLL control"
line.long 0x14 "ISP_NAFLL_CTRL2_0,ISP NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,ISP NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,ISP NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,ISP NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,ISP NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,ISP NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,ISP NAFLL control 2 FLL override"
rgroup.long (0xE80000+0x18)++0x03
line.long 0x00 "ISP_NAFLL_MISC_0,ISP NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,ISP NAFLL MISC debug data"
group.long (0xE80000+0x1C)++0x07
line.long 0x00 "ISP_NAFLL_SKP_COEFF_0,ISP NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,ISP NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,ISP NAFLL SKP COEFF dividend"
line.long 0x04 "ISP_NAFLL_SKP_CTRL_0,ISP NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,ISP NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,ISP NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,ISP NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE80000+0x40)++0x1B
line.long 0x00 "ISP_NAFLL_LUT_WRITE_ADDR_0,ISP NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,ISP NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,ISP NAFLL LUT write address offset"
line.long 0x04 "ISP_NAFLL_LUT_WRITE_DATA_0,ISP NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,ISP NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,ISP NAFLL LUT write data value 0"
line.long 0x08 "ISP_NAFLL_LUT_READ_ADDR_0,ISP NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,ISP NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,ISP NAFLL LUT read address offset"
line.long 0x0C "ISP_NAFLL_LUT_READ_DATA_0,ISP NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,ISP NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,ISP NAFLL LUT read data value 0"
line.long 0x10 "ISP_NAFLL_LUT_DEBUG2_0,ISP NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,ISP NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,ISP NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,ISP NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "ISP_NAFLL_LUT_CFG_0,ISP NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,ISP NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,ISP NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,ISP NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,ISP NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "ISP_NAFLL_LUT_SW_FREQ_REQ_0,ISP NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,ISP NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,ISP NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,ISP NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,ISP NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,ISP NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE80000+0x5C)++0x03
line.long 0x00 "ISP_NAFLL_LUT_ACK_0,ISP NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,ISP NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE80000+0x6C)++0x03
line.long 0x00 "ISP_CLK_FR_CNTR_CFG_0,ISP Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,ISP clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,ISP clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,ISP clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,ISP clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,ISP clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE80000+0x70)++0x07
line.long 0x00 "ISP_CLK_FR_CNTR_CNT0_0,ISP Clock FR Control Count 0"
line.long 0x04 "ISP_CLK_FR_CNTR_CNT1_0,ISP Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,ISP Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xE90000++0x17
line.long 0x00 "VIC_NAFLL_CFG1_0,VIC NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,VIC NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,VIC NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,VIC NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,VIC NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,VIC NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,VIC NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,VIC NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,VIC NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "VIC_NAFLL_COEFF_0,VIC NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,VIC NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,VIC NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,VIC NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,VIC NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "VIC_NAFLL_CFG2_0,VIC NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,VIC NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,VIC NAFLL config 2 FLL initialization"
line.long 0x0C "VIC_NAFLL_CFG3_0,VIC NAFLL Config 3"
line.long 0x10 "VIC_NAFLL_CTRL1_0,VIC NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,VIC NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,VIC NAFLL control 1 FLL control"
line.long 0x14 "VIC_NAFLL_CTRL2_0,VIC NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,VIC NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,VIC NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,VIC NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,VIC NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,VIC NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,VIC NAFLL control 2 FLL override"
rgroup.long (0xE90000+0x18)++0x03
line.long 0x00 "VIC_NAFLL_MISC_0,VIC NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,VIC NAFLL MISC debug data"
group.long (0xE90000+0x1C)++0x07
line.long 0x00 "VIC_NAFLL_SKP_COEFF_0,VIC NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,VIC NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,VIC NAFLL SKP COEFF dividend"
line.long 0x04 "VIC_NAFLL_SKP_CTRL_0,VIC NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,VIC NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,VIC NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,VIC NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xE90000+0x40)++0x1B
line.long 0x00 "VIC_NAFLL_LUT_WRITE_ADDR_0,VIC NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,VIC NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,VIC NAFLL LUT write address offset"
line.long 0x04 "VIC_NAFLL_LUT_WRITE_DATA_0,VIC NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,VIC NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,VIC NAFLL LUT write data value 0"
line.long 0x08 "VIC_NAFLL_LUT_READ_ADDR_0,VIC NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,VIC NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,VIC NAFLL LUT read address offset"
line.long 0x0C "VIC_NAFLL_LUT_READ_DATA_0,VIC NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,VIC NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,VIC NAFLL LUT read data value 0"
line.long 0x10 "VIC_NAFLL_LUT_DEBUG2_0,VIC NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,VIC NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,VIC NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,VIC NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "VIC_NAFLL_LUT_CFG_0,VIC NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,VIC NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,VIC NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,VIC NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,VIC NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "VIC_NAFLL_LUT_SW_FREQ_REQ_0,VIC NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,VIC NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,VIC NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,VIC NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,VIC NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,VIC NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xE90000+0x5C)++0x03
line.long 0x00 "VIC_NAFLL_LUT_ACK_0,VIC NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,VIC NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xE90000+0x6C)++0x03
line.long 0x00 "VIC_CLK_FR_CNTR_CFG_0,VIC Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,VIC clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,VIC clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,VIC clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,VIC clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,VIC clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xE90000+0x70)++0x07
line.long 0x00 "VIC_CLK_FR_CNTR_CNT0_0,VIC Clock FR Control Count 0"
line.long 0x04 "VIC_CLK_FR_CNTR_CNT1_0,VIC Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,VIC Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xEC0000++0x17
line.long 0x00 "NVDISPLAYHUB_NAFLL_CFG1_0,NVDISPLAYHUB NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,NVDISPLAYHUB NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,NVDISPLAYHUB NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,NVDISPLAYHUB NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,NVDISPLAYHUB NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,NVDISPLAYHUB NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,NVDISPLAYHUB NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,NVDISPLAYHUB NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,NVDISPLAYHUB NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "NVDISPLAYHUB_NAFLL_COEFF_0,NVDISPLAYHUB NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,NVDISPLAYHUB NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,NVDISPLAYHUB NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,NVDISPLAYHUB NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,NVDISPLAYHUB NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "NVDISPLAYHUB_NAFLL_CFG2_0,NVDISPLAYHUB NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,NVDISPLAYHUB NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,NVDISPLAYHUB NAFLL config 2 FLL initialization"
line.long 0x0C "NVDISPLAYHUB_NAFLL_CFG3_0,NVDISPLAYHUB NAFLL Config 3"
line.long 0x10 "NVDISPLAYHUB_NAFLL_CTRL1_0,NVDISPLAYHUB NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,NVDISPLAYHUB NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,NVDISPLAYHUB NAFLL control 1 FLL control"
line.long 0x14 "NVDISPLAYHUB_NAFLL_CTRL2_0,NVDISPLAYHUB NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,NVDISPLAYHUB NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,NVDISPLAYHUB NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,NVDISPLAYHUB NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,NVDISPLAYHUB NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,NVDISPLAYHUB NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,NVDISPLAYHUB NAFLL control 2 FLL override"
rgroup.long (0xEC0000+0x18)++0x03
line.long 0x00 "NVDISPLAYHUB_NAFLL_MISC_0,NVDISPLAYHUB NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,NVDISPLAYHUB NAFLL MISC debug data"
group.long (0xEC0000+0x1C)++0x07
line.long 0x00 "NVDISPLAYHUB_NAFLL_SKP_COEFF_0,NVDISPLAYHUB NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,NVDISPLAYHUB NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,NVDISPLAYHUB NAFLL SKP COEFF dividend"
line.long 0x04 "NVDISPLAYHUB_NAFLL_SKP_CTRL_0,NVDISPLAYHUB NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,NVDISPLAYHUB NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,NVDISPLAYHUB NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,NVDISPLAYHUB NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xEC0000+0x40)++0x1B
line.long 0x00 "NVDISPLAYHUB_NAFLL_LUT_WRITE_ADDR_0,NVDISPLAYHUB NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,NVDISPLAYHUB NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,NVDISPLAYHUB NAFLL LUT write address offset"
line.long 0x04 "NVDISPLAYHUB_NAFLL_LUT_WRITE_DATA_0,NVDISPLAYHUB NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,NVDISPLAYHUB NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,NVDISPLAYHUB NAFLL LUT write data value 0"
line.long 0x08 "NVDISPLAYHUB_NAFLL_LUT_READ_ADDR_0,NVDISPLAYHUB NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,NVDISPLAYHUB NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,NVDISPLAYHUB NAFLL LUT read address offset"
line.long 0x0C "NVDISPLAYHUB_NAFLL_LUT_READ_DATA_0,NVDISPLAYHUB NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,NVDISPLAYHUB NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,NVDISPLAYHUB NAFLL LUT read data value 0"
line.long 0x10 "NVDISPLAYHUB_NAFLL_LUT_DEBUG2_0,NVDISPLAYHUB NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,NVDISPLAYHUB NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,NVDISPLAYHUB NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,NVDISPLAYHUB NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "NVDISPLAYHUB_NAFLL_LUT_CFG_0,NVDISPLAYHUB NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,NVDISPLAYHUB NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,NVDISPLAYHUB NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,NVDISPLAYHUB NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,NVDISPLAYHUB NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "NVDISPLAYHUB_NAFLL_LUT_SW_FREQ_REQ_0,NVDISPLAYHUB NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,NVDISPLAYHUB NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,NVDISPLAYHUB NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,NVDISPLAYHUB NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,NVDISPLAYHUB NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,NVDISPLAYHUB NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xEC0000+0x5C)++0x03
line.long 0x00 "NVDISPLAYHUB_NAFLL_LUT_ACK_0,NVDISPLAYHUB NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,NVDISPLAYHUB NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xEC0000+0x6C)++0x03
line.long 0x00 "NVDISPLAYHUB_CLK_FR_CNTR_CFG_0,NVDISPLAYHUB Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,NVDISPLAYHUB clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,NVDISPLAYHUB clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,NVDISPLAYHUB clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,NVDISPLAYHUB clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,NVDISPLAYHUB clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xEC0000+0x70)++0x07
line.long 0x00 "NVDISPLAYHUB_CLK_FR_CNTR_CNT0_0,NVDISPLAYHUB Clock FR Control Count 0"
line.long 0x04 "NVDISPLAYHUB_CLK_FR_CNTR_CNT1_0,NVDISPLAYHUB Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,NVDISPLAYHUB Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xED0000++0x17
line.long 0x00 "AXICBB_NAFLL_CFG1_0,AXICBB NAFLL Config 1"
rbitfld.long 0x00 16. " NAFLL_CFG1_FLL_LOCK                      ,AXICBB NAFLL config 1 FLL lock" "Not locked,Locked"
bitfld.long 0x00 6. "      NAFLL_CFG1_RESET                        ,AXICBB NAFLL config 1 reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 5. " NAFLL_CFG1_EN_PRB_CLKOUT                 ,AXICBB NAFLL config 1 enable PRB clock out" "Disabled,Enabled"
bitfld.long 0x00 4. "        NAFLL_CFG1_EN_CLK_PRE_SKP               ,AXICBB NAFLL config 1 enable clock PRE SKP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NAFLL_CFG1_BYPASSFLL                     ,AXICBB NAFLL config 1 BYPASSFLL" "Not bypassed,Bypassed"
bitfld.long 0x00 2. "    NAFLL_CFG1_DVCO_DISABLE                 ,AXICBB NAFLL config 1 DVCO disable" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " NAFLL_CFG1_IDDQ                          ,AXICBB NAFLL config 1 IDDQ" "0,1"
bitfld.long 0x00 0. "               NAFLL_CFG1_ENABLE                       ,AXICBB NAFLL config 1 enable" "Disabled,Enabled"
line.long 0x04 "AXICBB_NAFLL_COEFF_0,AXICBB NAFLL COEFF"
bitfld.long 0x04 28.--31. " NAFLL_COEFF_FLL_FRUG_FAST                ,AXICBB NAFLL COEFF FLL FRUG fast" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "              NAFLL_COEFF_FLL_FRUG_MAIN               ,AXICBB NAFLL COEFF FLL FRUG main" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x04 16.--20. " NAFLL_COEFF_PDIV                         ,AXICBB NAFLL COEFF PDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "              NAFLL_COEFF_MDIV                        ,AXICBB NAFLL COEFF MDIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "AXICBB_NAFLL_CFG2_0,AXICBB NAFLL Config 2"
hexmask.long.byte 0x08 8.--15. 1. " NAFLL_CFG2_FLL_CTRL_LDMEM                ,AXICBB NAFLL config 2 FLL control LDMEM"
hexmask.long.byte 0x08 0.--7. 1. "              NAFLL_CFG2_FLL_INIT                     ,AXICBB NAFLL config 2 FLL initialization"
line.long 0x0C "AXICBB_NAFLL_CFG3_0,AXICBB NAFLL Config 3"
line.long 0x10 "AXICBB_NAFLL_CTRL1_0,AXICBB NAFLL Control 1"
hexmask.long.word 0x10 16.--31. 1. " NAFLL_CTRL1_SETUP                        ,AXICBB NAFLL control 1 setup"
hexmask.long.word 0x10 0.--15. 1. "            NAFLL_CTRL1_FLL_CTRL                    ,AXICBB NAFLL control 1 FLL control"
line.long 0x14 "AXICBB_NAFLL_CTRL2_0,AXICBB NAFLL Control 2"
bitfld.long 0x14 28.--31. " NAFLL_CTRL2_SRAM_VFGAIN                  ,AXICBB NAFLL control 2 SRAM VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "              NAFLL_CTRL2_SRAM_CHAIN_INIT             ,AXICBB NAFLL control 2 SRAM chain initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 20.--23. " NAFLL_CTRL2_SRAM_CHAIN_STATUS_THRESHOLD  ,AXICBB NAFLL control 2 SRAM chain status threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 16.--19. "              NAFLL_CTRL2_SRAM_CHAIN_STATUS_ACCU_NUM  ,AXICBB NAFLL control 2 SRAM chain status ACCU NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x14 8.--11. " NAFLL_CTRL2_DEBUG_SEL                    ,AXICBB NAFLL control 2 debug select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x14 0.--7. 1. "              NAFLL_CTRL2_FLL_OVERRIDE                ,AXICBB NAFLL control 2 FLL override"
rgroup.long (0xED0000+0x18)++0x03
line.long 0x00 "AXICBB_NAFLL_MISC_0,AXICBB NAFLL MISC"
hexmask.long.word 0x00 0.--15. 1. " NAFLL_MISC_DEBUG_DATA                    ,AXICBB NAFLL MISC debug data"
group.long (0xED0000+0x1C)++0x07
line.long 0x00 "AXICBB_NAFLL_SKP_COEFF_0,AXICBB NAFLL SKP COEFF"
hexmask.long.byte 0x00 24.--31. 1. " NAFLL_SKP_COEFF_DIVISOR                  ,AXICBB NAFLL SKP COEFF divisor"
hexmask.long.byte 0x00 16.--23. 1. "              NAFLL_SKP_COEFF_DIVIDEND                ,AXICBB NAFLL SKP COEFF dividend"
line.long 0x04 "AXICBB_NAFLL_SKP_CTRL_0,AXICBB NAFLL SKP Control"
bitfld.long 0x04 3.--7. " NAFLL_SKP_CTRL_RAMP_RATE                 ,AXICBB NAFLL SKP control RAMP rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 1.--2. "              NAFLL_SKP_CTRL_SKP_CTRL                 ,AXICBB NAFLL SKP control SKP control" "0,1,2,3"
textline "                                              "
bitfld.long 0x04 0. " NAFLL_SKP_CTRL_SKP_EN                    ,AXICBB NAFLL SKP control SKP enable" "Disabled,Enabled"
group.long (0xED0000+0x40)++0x1B
line.long 0x00 "AXICBB_NAFLL_LUT_WRITE_ADDR_0,AXICBB NAFLL LUT Write Address"
bitfld.long 0x00 31. " NAFLL_LUT_WRITE_ADDR_AUTO_INC            ,AXICBB NAFLL LUT write address auto INC" "0,1"
hexmask.long.byte 0x00 0.--7. 0x01 "               NAFLL_LUT_WRITE_ADDR_OFFSET             ,AXICBB NAFLL LUT write address offset"
line.long 0x04 "AXICBB_NAFLL_LUT_WRITE_DATA_0,AXICBB NAFLL LUT Write Data"
hexmask.long.word 0x04 16.--28. 1. " NAFLL_LUT_WRITE_DATA_VAL1                ,AXICBB NAFLL LUT write data value 1"
hexmask.long.word 0x04 0.--12. 1. "            NAFLL_LUT_WRITE_DATA_VAL0               ,AXICBB NAFLL LUT write data value 0"
line.long 0x08 "AXICBB_NAFLL_LUT_READ_ADDR_0,AXICBB NAFLL LUT Read Address"
bitfld.long 0x08 31. " NAFLL_LUT_READ_ADDR_AUTO_INC             ,AXICBB NAFLL LUT read address auto INC" "0,1"
hexmask.long.byte 0x08 0.--7. 0x01 "               NAFLL_LUT_READ_ADDR_OFFSET              ,AXICBB NAFLL LUT read address offset"
line.long 0x0C "AXICBB_NAFLL_LUT_READ_DATA_0,AXICBB NAFLL LUT Read Data"
hexmask.long.word 0x0C 16.--28. 1. " NAFLL_LUT_READ_DATA_VAL1                 ,AXICBB NAFLL LUT read data value 1"
hexmask.long.word 0x0C 0.--12. 1. "            NAFLL_LUT_READ_DATA_VAL0                ,AXICBB NAFLL LUT read data value 0"
line.long 0x10 "AXICBB_NAFLL_LUT_DEBUG2_0,AXICBB NAFLL LUT Debug 2"
hexmask.long.word 0x10 8.--16. 1. " NAFLL_LUT_DEBUG2_NDIV                    ,AXICBB NAFLL LUT debug 2 NDIV"
bitfld.long 0x10 4.--7. "            NAFLL_LUT_DEBUG2_VFGAIN                 ,AXICBB NAFLL LUT debug 2 VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
bitfld.long 0x10 0.--3. " NAFLL_LUT_DEBUG2_PRI_CTRL_STATE          ,AXICBB NAFLL LUT debug 2 PRI control State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "AXICBB_NAFLL_LUT_CFG_0,AXICBB NAFLL LUT Config"
bitfld.long 0x14 16.--19. " NAFLL_LUT_CFG_HYSTERESIS_THRESHOLD       ,AXICBB NAFLL LUT config hysteresis threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12. "              NAFLL_LUT_CFG_RAM_READ_EN               ,AXICBB NAFLL LUT config RAM read enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x14 8. " NAFLL_LUT_CFG_RESET_FSM                  ,AXICBB NAFLL LUT config reset FSM" "No reset,Reset"
bitfld.long 0x14 0.--2. "        NAFLL_LUT_CFG_TEMP_IDX                  ,AXICBB NAFLL LUT config TEMP IDX" "0,1,2,3,4,5,6,7"
line.long 0x18 "AXICBB_NAFLL_LUT_SW_FREQ_REQ_0,AXICBB NAFLL LUT Software Frequency Request"
bitfld.long 0x18 31. " NAFLL_LUT_SW_FREQ_REQ_REQ_SRAM_SD        ,AXICBB NAFLL LUT software frequency request SRAM SD" "No requested,Requested"
bitfld.long 0x18 20.--23. "    NAFLL_LUT_SW_FREQ_REQ_REQ_VFGAIN        ,AXICBB NAFLL LUT software frequency request VFGAIN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
hexmask.long.word 0x18 4.--12. 1. " NAFLL_LUT_SW_FREQ_REQ_REQ_NDIV           ,AXICBB NAFLL LUT software frequency request NDIV"
bitfld.long 0x18 2.--3. "            NAFLL_LUT_SW_FREQ_REQ_SW_OVERRIDE_LUT   ,AXICBB NAFLL LUT software frequency request software override LUT" "0,1,2,3"
textline "                                              "
bitfld.long 0x18 0.--1. " NAFLL_LUT_SW_FREQ_REQ_LUT_VSELECT        ,AXICBB NAFLL LUT software frequency request LUT VSELECT" "0,1,2,3"
rgroup.long (0xED0000+0x5C)++0x03
line.long 0x00 "AXICBB_NAFLL_LUT_ACK_0,AXICBB NAFLL LUT ACK"
bitfld.long 0x00 3. " NAFLL_LUT_ACK_RDACK_LUT_DEBUG            ,AXICBB NAFLL LUT ACK RDACK LUT debug" "0,1"
group.long (0xED0000+0x6C)++0x03
line.long 0x00 "AXICBB_CLK_FR_CNTR_CFG_0,AXICBB Clock FR Control Config"
bitfld.long 0x00 28.--31. " CLK_FR_CNTR_CFG_SOURCE                   ,AXICBB clock FR control config source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "              CLK_FR_CNTR_CFG_CONTINOUS_UPDATE        ,AXICBB clock FR control config continuous update" "Not updated,Updated"
textline "                                              "
bitfld.long 0x00 25. " CLK_FR_CNTR_CFG_START_COUNT              ,AXICBB clock FR control config start count" "No effect,Start"
bitfld.long 0x00 24. "       CLK_FR_CNTR_CFG_RESET                   ,AXICBB clock FR control config reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 0.--2. " CLK_FR_CNTR_CFG_COUNT_UPDATE_CYCLES      ,AXICBB clock FR control config count update cycles" "0,1,2,3,4,5,6,7"
rgroup.long (0xED0000+0x70)++0x07
line.long 0x00 "AXICBB_CLK_FR_CNTR_CNT0_0,AXICBB Clock FR Control Count 0"
line.long 0x04 "AXICBB_CLK_FR_CNTR_CNT1_0,AXICBB Clock FR Control Count 1"
bitfld.long 0x04 0.--3. " CLK_FR_CNTR_CNT1_VALUE                   ,AXICBB Clock FR control count 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                              "
group.long 0xFA1000++0x03
line.long 0x00 "CLK_OUT_ENB_DSIC_0_SET/CLR,Clock Out Enable DSIC"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " SET_CLK_ENB_DSIC_LP                         ,Enable clock to DSIC LP" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "        SET_CLK_ENB_DSIC                           ,Enable clock to DSIC Controller" "Disabled,Enabled"
group.long 0xFA100C++0x03
line.long 0x00 "CLK_SOURCE_DSIC_LP_0,Clock Source DSIC LP"
bitfld.long 0x00 29.--31. " DSIC_LP_CLK_SRC                             ,DSIC LP clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       DSIC_LP_CLK_DIVISOR                        ,DSIC LP clock divisor"
group.long 0xFB2000++0x03
line.long 0x00 "CLK_SOURCE_DSID_LP_0,Clock Source DSID LP"
bitfld.long 0x00 29.--31. " DSID_LP_CLK_SRC                             ,DSID LP clock source" "PLLP_OUT0,,,,,,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       DSID_LP_CLK_DIVISOR                        ,DSID LP clock divisor"
group.long 0xFC3000++0x03
line.long 0x00 "CLK_SOURCE_GPIO_CTL5_0,Clock Source GPIO CTL5"
bitfld.long 0x00 29.--31. " GPIO_CTL5_CLK_SRC                           ,GPIO CTL5 clock source" "PLLP_OUT0,CLK_M,CLK_M,CLK_M,CLK_M,CLK_M,CLK_S,CLK_M"
hexmask.long.byte 0x00 0.--7. 1. "       GPIO_CTL5_CLK_DIVISOR                      ,GPIO CTL5 clock divisor"
group.long 0xFF0090++0x03
line.long 0x00 "SOC_ADC_CTRL_0,SOC ADC Control"
hexmask.long.word 0x00 4.--19. 1. " SOC_ADC_CTRL                                ,SOC ADC control"
bitfld.long 0x00 2. "            SOC_ADC_CTRL_RESET                         ,SOC ADC control reset" "No reset,Reset"
textline "                                              "
bitfld.long 0x00 1. " SOC_ADC_CTRL_ENABLE                         ,SOC ADC control enable" "Disabled,Enabled"
bitfld.long 0x00 0. "        SOC_ADC_CTRL_ADC_IDDQ                      ,SOC ADC control ADC IDDQ" "0,1"
rgroup.long 0xFF0094++0x03
line.long 0x00 "SOC_ADC_MONITOR_0,SOC ADC Monitor"
hexmask.long.byte 0x00 2.--9. 1. " SOC_ADC_MONITOR_ADC_DOUT                    ,SOC ADC monitor ADC DOUT"
bitfld.long 0x00 1. "              SOC_ADC_MONITOR_ADC_SAMPLE                 ,SOC ADC monitor ADC sample" "0,1"
textline "                                              "
bitfld.long 0x00 0. " SOC_ADC_MONITOR_PWR_GOOD                    ,SOC ADC monitor PWR good" "0,1"
group.long 0xFF0098++0x07
line.long 0x00 "SOC_ADC_OVERRIDE_0,SOC ADC Override"
bitfld.long 0x00 16. " SOC_ADC_OVERRIDE_SW_OVERRIDE_ADC            ,SOC ADC override SW override ADC" "No override,Override"
hexmask.long.byte 0x00 1.--8. 1. "     SOC_ADC_OVERRIDE_ADC_DOUT                  ,SOC ADC override ADC DOUT"
textline "                                              "
bitfld.long 0x00 0. " SOC_ADC_OVERRIDE_ADC_SAMPLE                 ,SOC ADC override ADC SAMPLE" "No override,Override"
line.long 0x04 "SOC_ADC_ACC_0,SOC ADC ACC"
rgroup.long 0xFF00A0++0x03
line.long 0x00 "SOC_ADC_NUM_SAMPLES_0,SOC ADC NUM Samples"
group.long 0xFF00A4++0x03
line.long 0x00 "SOC_ADC_REF_CLK_CFG_0,SOC ADC Referency Clock Config 0"
hexmask.long.byte 0x00 8.--15. 1. " SOC_ADC_REF_CLK_CFG_DIVISOR                 ,SOC ADC referency clock config divisor"
bitfld.long 0x00 1. "              SOC_ADC_REF_CLK_CFG_SEL                    ,SOC ADC referency clock config select" "PLLP_OUT0,OSC_DIV"
textline "                                              "
bitfld.long 0x00 0. " SOC_ADC_REF_CLK_CFG_ENABLE                  ,SOC ADC referency clock config enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "Reset CAR Controller"
base ad:0x05000000
width 33.
group.long 0x0++0x03
line.long 0x00 "TOP_GTE_0_SET/CLR,TOP GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC++0x03
line.long 0x00 "SHSP_0_SET/CLR,SHSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x18++0x03
line.long 0x00 "TOP_TKE_0_SET/CLR,TOP TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x24++0x03
line.long 0x00 "KFUSE_0_SET/CLR,KFUSE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x30++0x03
line.long 0x00 "GPU_0_SET/CLR,GPU"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4000C++0x03
line.long 0x00 "UPHY_0_SET/CLR,UPHY"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x110000++0x03
line.long 0x00 "SPI3_0_SET/CLR,SPI3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x120000++0x03
line.long 0x00 "I2C1_0_SET/CLR,I2C1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x130000++0x03
line.long 0x00 "I2C5_0_SET/CLR,I2C5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x140000++0x03
line.long 0x00 "SPI1_0_SET/CLR,SPI1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x170000++0x03
line.long 0x00 "ISP_0_SET/CLR,ISP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x180000++0x03
line.long 0x00 "VI_0_SET/CLR,VI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x18000C++0x03
line.long 0x00 "TSCTNVI_0_SET/CLR,TSCTNVI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x190000++0x03
line.long 0x00 "SDMMC1_0_SET/CLR,SDMMC1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1A0000++0x03
line.long 0x00 "SDMMC2_0_SET/CLR,SDMMC2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x250000++0x03
line.long 0x00 "SDMMC3_0_SET/CLR,SDMMC3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1B0000++0x03
line.long 0x00 "SDMM4_0_SET/CLR,SDMMC4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1C0000++0x03
line.long 0x00 "UARTA_0_SET/CLR,UARTA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1D0000++0x03
line.long 0x00 "UARTB_0_SET/CLR,UARTB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x1E0000++0x03
line.long 0x00 "HOST1X_0_SET/CLR,HOST1X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x220000++0x03
line.long 0x00 "EXTPERIPH4_0_SET/CLR,EXTPERIPH4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x230000++0x03
line.long 0x00 "SPI4_0_SET/CLR,SPI4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x240000++0x03
line.long 0x00 "I2C3_0_SET/CLR,I2C3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x260000++0x03
line.long 0x00 "UARTD_0_SET/CLR,UARTD"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x280000++0x03
line.long 0x00 "CSITE_0_SET/CLR,CSITE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x2A0004++0x03
line.long 0x00 "DTV_0_SET/CLR,DTV"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x2B0000++0x03
line.long 0x00 "TSEC_0_SET/CLR,TSEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x320000++0x03
line.long 0x00 "I2C4_0_SET/CLR,I2C4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x340000++0x03
line.long 0x00 "HDA2CODEC_2X_0_SET/CLR,HDA2CODEC 2X"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x360000++0x03
line.long 0x00 "EXTPERIPH1_0_SET/CLR,EXTPERIPH1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x370000++0x03
line.long 0x00 "EXTPERIPH2_0_SET/CLR,EXTPERIPH2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x380000++0x03
line.long 0x00 "EXTPERIPH3_0_SET/CLR,EXTPERIPH3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0000++0x03
line.long 0x00 "SOR0_0_SET/CLR,SOR0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3A0000++0x03
line.long 0x00 "SOR1_0_SET/CLR,SOR1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B000C++0x03
line.long 0x00 "DPAUX_0_SET/CLR,DPAUX"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0018++0x03
line.long 0x00 "DPAUX1_0_SET/CLR,DPAUX1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3B0024++0x03
line.long 0x00 "CEC_0_SET/CLR,CEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x3D0000++0x03
line.long 0x00 "HDA_0_SET/CLR,HDA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x400000++0x03
line.long 0x00 "APE_0_SET/CLR,APE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B0000++0x03
line.long 0x00 "DSIPADCTL_0_SET/CLR,DSIPADCTL"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B000C++0x03
line.long 0x00 "DSI_0_SET/CLR,DSI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4B0018++0x03
line.long 0x00 "MIPI_CAL_0_SET/CLR,MIPI CAL"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4D0000++0x03
line.long 0x00 "ENTROPHY_0_SET/CLR,ENTROPHY"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x4E0000++0x03
line.long 0x00 "DVFS_0_SET/CLR,DVFS"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x520000++0x03
line.long 0x00 "AUD_MCLK_0_SET/CLR,AUD MCLK"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x530000++0x03
line.long 0x00 "I2C6_0_SET/CLR,I2C6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x580000++0x03
line.long 0x00 "NVDEC_0_SET/CLR,NVDEC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x590000++0x03
line.long 0x00 "NVJPG_0_SET/CLR,NVJPG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5A0000++0x03
line.long 0x00 "NVENC_0_SET/CLR,NVENC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5C0000++0x03
line.long 0x00 "QSPI_0_SET/CLR,QSPI"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x5D0000++0x03
line.long 0x00 "VI_I2C_0_SET/CLR,VI I2C"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x610000++0x03
line.long 0x00 "TSECB_0_SET/CLR,TSECB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x840000++0x03
line.long 0x00 "GPIO_CTL0_0_SET/CLR,GPIO CTL0"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x850000++0x03
line.long 0x00 "GPIO_CTL1_0_SET/CLR,GPIO CTL1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x860000++0x03
line.long 0x00 "GPIO_CTL2_0_SET/CLR,GPIO CTL2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x870000++0x03
line.long 0x00 "GPIO_CTL3_0_SET/CLR,GPIO CTL3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x880000++0x03
line.long 0x00 "GPIO_CTL4_0_SET/CLR,GPIO CTL4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x890000++0x03
line.long 0x00 "TACH_0_SET/CLR,TACH"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x8F0000++0x03
line.long 0x00 "I2C7_0_SET/CLR,I2C7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x900000++0x03
line.long 0x00 "I2C9_0_SET/CLR,I2C9"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x920000++0x03
line.long 0x00 "I2C12_0_SET/CLR,I2C12"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x930000++0x03
line.long 0x00 "I2C13_0_SET/CLR,I2C13"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x940000++0x03
line.long 0x00 "I2C14_0_SET/CLR,I2C14"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x950000++0x03
line.long 0x00 "PWM1_0_SET/CLR,PWM1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x960000++0x03
line.long 0x00 "PWM2_0_SET/CLR,PWM2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x970000++0x03
line.long 0x00 "PWM3_0_SET/CLR,PWM3"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x990000++0x03
line.long 0x00 "PWM5_0_SET/CLR,PWM5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9A0000++0x03
line.long 0x00 "PWM6_0_SET/CLR,PWM6"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9B0000++0x03
line.long 0x00 "PWM7_0_SET/CLR,PWM7"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9C0000++0x03
line.long 0x00 "PWM8_0_SET/CLR,PWM8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9D0000++0x03
line.long 0x00 "UARTE_0_SET/CLR,UARTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0x9E0000++0x03
line.long 0x00 "UARTF_0_SET/CLR,UARTF"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA1000C++0x03
line.long 0x00 "BPMP_PM_0_SET/CLR,BPMP PM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10018++0x03
line.long 0x00 "BPMP_CVC_0_SET/CLR,BPMP CVC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10024++0x03
line.long 0x00 "BPMP_DMA_0_SET/CLR,BPMP DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10030++0x03
line.long 0x00 "BPMP_HSP_0_SET/CLR,BPMP HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA1003C++0x03
line.long 0x00 "TSCTNBPMP_0_SET/CLR,TSCTNBPMP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10048++0x03
line.long 0x00 "BPMP_TKE_0_SET/CLR,BPMP TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA10054++0x03
line.long 0x00 "BPMP_GTE_0_SET/CLR,BPMP GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA20000++0x03
line.long 0x00 "BPMP_APB_0_SET/CLR,BPMP APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xA30000++0x03
line.long 0x00 "SOC_THERM_0_SET/CLR,SOC THERM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB0000C++0x03
line.long 0x00 "UFS_AON_0_SET/CLR,UFS AON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00018++0x03
line.long 0x00 "XUSB_AON_0_SET/CLR,XUSB AON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00024++0x03
line.long 0x00 "AON_ACTMON_0_SET/CLR,AON ACTMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00030++0x03
line.long 0x00 "AOPM_0_SET/CLR,AOPM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB0003C++0x03
line.long 0x00 "AOVC_0_SET/CLR,AOVC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00048++0x03
line.long 0x00 "AON_DMA_0_SET/CLR,AON DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00054++0x03
line.long 0x00 "AON_GPIO_0_SET/CLR,AON GPIO"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB00060++0x03
line.long 0x00 "AON_HSP_0_SET/CLR,AON HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB10000++0x03
line.long 0x00 "CAN1_0_SET/CLR,CAN1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB30000++0x03
line.long 0x00 "AON_APB_0_SET/CLR,AON APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB50000++0x03
line.long 0x00 "UARTG_0_SET/CLR,UARTG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB70000++0x03
line.long 0x00 "I2C2_0_SET/CLR,I2C2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB80000++0x03
line.long 0x00 "I2C8_0_SET/CLR,I2C8"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xB90000++0x03
line.long 0x00 "I2C10_0_SET/CLR,I2C10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xBB0000++0x03
line.long 0x00 "SPI2_0_SET/CLR,SPI2"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xBC0000++0x03
line.long 0x00 "DMIC5_0_SET/CLR,DMIC5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC00000++0x03
line.long 0x00 "PWM4_0_SET/CLR,PWM4"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC10000++0x03
line.long 0x00 "TSCTNAON_0_SET/CLR,TSCTNAON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC1000C++0x03
line.long 0x00 "AON_TKE_0_SET/CLR,AON TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xC10018++0x03
line.long 0x00 "AON_GTE_0_SET/CLR,AON GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD0000C++0x03
line.long 0x00 "SCE_ACTMON_0_SET/CLR,SCE ACTMON"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00018++0x03
line.long 0x00 "SCE_PM_0_SET/CLR,SCE PM"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00024++0x03
line.long 0x00 "SCE_DMA_0_SET/CLR,SCE DMA"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00030++0x03
line.long 0x00 "SCE_HSP_0_SET/CLR,SCE HSP"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD0003C++0x03
line.long 0x00 "TSCTNSCE_0_SET/CLR,TSCTNSCE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00048++0x03
line.long 0x00 "SCE_TKE_0_SET/CLR,SCE TKE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00054++0x03
line.long 0x00 "SCE_GTE_0_SET/CLR,SCE GTE"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD00060++0x03
line.long 0x00 "SCE_CFG_0_SET/CLR,SCE CFG"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xD10000++0x03
line.long 0x00 "SCE_APB_0_SET/CLR,SCE APB"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFA0000++0x03
line.long 0x00 "DSIC_0_SET/CLR,DSIC"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFB0000++0x03
line.long 0x00 "DSID_0_SET/CLR,DSID"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
group.long 0xFC0000++0x03
line.long 0x00 "GPIO_CTL5_0_SET/CLR,GPIO CTL5"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " RESET                            ,Software reset for the module" "Deasserted,Asserted"
width 0x0B
tree.end
tree "Reset PMC Controller"
base ad:0x0C360000
width 18.
group.long 0x00++0x0B
line.long 0x00 "CNTRL_0,PMC control register"
bitfld.long 0x00 22. " SHUTDOWN_OE         ,Enable shutdown pad" "Disabled,Enabled"
bitfld.long 0x00 18. "     FUSE_OVERRIDE    ,Fuse override" "Disabled,Enabled"
bitfld.long 0x00 13. "  AOINIT          ,AO initialize purely SW diagnostic and interpretation" "Not done,Done"
bitfld.long 0x00 12. "      PWRGATE_DIS      ,Disable power gating - global override" "No,Yes"
textline "                           "
bitfld.long 0x00 11. " SYSCLK_OE           ,Enable output of system enable clock" "Disabled,Enabled"
bitfld.long 0x00 9. "     PWRREQ_OE        ,Power request output enable" "Disabled,Enabled"
bitfld.long 0x00 8. "  PWRREQ_POLARITY ,Inverts power request polarity" "Not inverted,Inverted"
bitfld.long 0x00 7. "  BLINK_EN         ,Blinking counter and blink output enable" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 4. " MAIN_RST            ,Reset everything but scratch 0 and reset status" "Disabled,Enabled"
bitfld.long 0x00 2. "     RTC_RST          ,Software reset to RTC" "No reset,Reset"
bitfld.long 0x00 1. "  RTC_CLK_DIS     ,Disable 32kHz clock to RTC" "No,Yes"
line.long 0x04 "SLCG_CTRL_0,SLCG_CTRL_0"
hexmask.long.byte 0x04 16.--23. 1. " PCLK_REG_SLCG_TIMER ,Keep PCLK_REG clock running for this period after psel is deasserted"
bitfld.long 0x04 10. "           PCLK_DPD_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK I/O DPD feature" "Disabled,Enabled"
bitfld.long 0x04 9. "  PCLK_PG_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK PG feature" "Disabled,Enabled"
bitfld.long 0x04 8. "      PCLK_REG_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK register access feature" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 3. " OSC_SLCG_EN         ,Enable/Disable SLCG for OSC_CLK" "Disabled,Enabled"
bitfld.long 0x04 2. "     FUSE_SLCG_EN     ,Enable/Disable SLCG for FUSE_CLK" "Disabled,Enabled"
bitfld.long 0x04 1. "  CLK32_SLCG_EN   ,Enable/Disable SLCG for PMC_CLK (32K)" "Disabled,Enabled"
bitfld.long 0x04 0. "      PCLK_SLCG_EN     ,Enable/Disable SLCG for PMC_PCLK" "Disabled,Enabled"
line.long 0x08 "DPD_PADS_ORIDE_0,DPD_PADS_ORIDE_0"
bitfld.long 0x08 20. " BLINK               ,Override DPD idle state with blink output" "No override,Override"
group.long 0x10++0x03
line.long 0x00 "DPD_ENABLE_0,DPD_ENABLE_0"
bitfld.long 0x00 1. " TSC_MULT_EN         ,TSC multiplier enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     ON               ,will set sampling of pads value" "Disabled,Enabled"
if (((per.l(ad:0x0C360000+0x14))&0x1)==0x1)
group.long 0x14++0x03
line.long 0x00 "SC7_CONFIG_0,SC7_CONFIG_0"
hexmask.long.byte 0x00 16.--23. 1. " SC7_RES_TIMER       ,Number of 32K clocks to wait after requesting power off, before declaring residency in SC7"
hexmask.long.byte 0x00 8.--15. 1. "           SC7_DPD_TIMER    ,Number of 32K clocks between assertion of sel/e_dpd and deassertion of e/sel_dpd"
bitfld.long 0x00 1. "        SC8_HW_BYPASS   ,Whether SC8 exit will be bypassed by hardware or not" "Off,On"
textline "                           "
bitfld.long 0x00 0. " SC7_TARGET          ,Target state" "SC7,SC8"
else
group.long 0x14++0x03
line.long 0x00 "SC7_CONFIG_0,SC7_CONFIG_0"
hexmask.long.byte 0x00 16.--23. 1. " SC7_RES_TIMER       ,Number of 32K clocks to wait after requesting power off, before declaring residency in SC7"
hexmask.long.byte 0x00 8.--15. 1. "           SC7_DPD_TIMER    ,Number of 32K clocks between assertion of sel/e_dpd and deassertion of e/sel_dpd"
textline "                           "
bitfld.long 0x00 0. " SC7_TARGET          ,Target state" "SC7,SC8"
endif
rgroup.long 0x18++0x03
line.long 0x00 "SC7_STATUS_0,SC7_STATUS_0"
bitfld.long 0x00 4. " PWRGOOD_ABS         ,Absolute pwrgood signal" "False,True"
bitfld.long 0x00 3. "        SC7_WAIT_DPD_DIS ,Set when SC7 FSM is done exiting" "No,Yes"
bitfld.long 0x00 2. "       SC7_FSM_BUSY    ,Indicates whether SC7 FSM is in idle or not" "Not busy,Busy"
bitfld.long 0x00 0.--1. "      SC_STATE         ,Indicates whether PMC is in SC7 or SC8 or neither" "None,SC7,SC8,?..."
textline "                                       "
width 30.
group.long 0x1C++0x47
line.long 0x00 "SC8_FSM_INIT_0,SC8_FSM_INIT_0"
bitfld.long 0x00 0. " FSM_INIT                    ,Software uses this to initialize the FSM when SC8 exit is complete" "Done,Pending"
line.long 0x04 "SC8_CONTROL_0,SC8_CONTROL_0"
bitfld.long 0x04 4. " REMOVE_SD                   ,Software uses this to initialize the FSM when SC8 exit is complete" "Done,Pending"
bitfld.long 0x04 3. "               REMOVE_SELDPD                     ,Remove global sel_dpd that was asserted during SC8 entry" "Done,Pending"
textline "                                       "
bitfld.long 0x04 2. " REMOVE_EDPD                 ,Remove global e_dpd that was asserted during SC8 entry" "Done,Pending"
bitfld.long 0x04 1. "               REMOVE_CLAMP                      ,Remove clamp that was asserted during SC8 entry" "Done,Pending"
textline "                                       "
bitfld.long 0x04 0. " REMOVE_RESET                ,Remove reset that was asserted during SC8 entry" "Done,Pending"
line.long 0x08 "RETENTION_CONTROL_0,RETENTION_CONTROL_0"
bitfld.long 0x08 8. " GPIO_AO_RET_EN              ,Enable for VDD_RTC rail retention through GPIO_AO_RET 0 -> GPIO_AO_RET" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "              RAIL_RET_EXIT_DELAY               ,Delay in 32 KHz clocks"
line.long 0x0C "SC7_DEBUG_CTRL_0,SC7_DEBUG_CTRL_0"
bitfld.long 0x0C 7. " DBG_SD_SKIP                 ,PG SD sequence skip for SC7 entry" "Disabled,Enabled"
bitfld.long 0x0C 6. "              DFD_CLAMP_OVERRIDE                ,Used for overriding the clamp of all the inputs for DFD partition" "No override,Override"
textline "                                       "
bitfld.long 0x0C 5. " DBGRST_OVR                  ,Used for overriding the reset going out to debug module in SC7" "No override,Override"
bitfld.long 0x0C 4. "           RESET_DEBUG                       ,Assertion of reset will be disabled if this bit is set" "Off,On"
textline "                                       "
bitfld.long 0x0C 3. " DPD_ENABLE_DEBUG            ,Assertion of dpd_enable will be disabled if this bit is set" "Off,On"
bitfld.long 0x0C 2. "                   MAIN_CLAMP_DEBUG                  ,Assertion of main clamp will be disabled if this bit is set" "Off,On"
line.long 0x10 "PWRGOOD_TIMER_0,PWRGOOD_TIMER_0"
hexmask.long.byte 0x10 16.--23. 1. " OSC_PREPWR                  ,OSC clock stabilization timer prior to SoC rail pwr-req assertion"
hexmask.long.byte 0x10 8.--15. 1. "                    OSC_POSTPWR                       ,OSC clock stabilization timer after SoC rail power is stabilized"
textline "                                       "
hexmask.long.byte 0x10 0.--7. 1. " PWRGOOD                     ,SoC rail power-on stabilization timer"
line.long 0x14 "BLINK_TIMER_0,BLINK_TIMER_0"
hexmask.long.word 0x14 16.--31. 1. " DATA_OFF                    ,Time off"
bitfld.long 0x14 15. "                  FORCE_BLINK                       ,Force blink" "32 kHZ,?..."
textline "                                       "
hexmask.long.word 0x14 0.--14. 1. " DATA_ON                     ,Time ON"
line.long 0x18 "NO_IOPOWER_0,NO_IOPOWER_0"
bitfld.long 0x18 31. " SDMMC3_HV                   ,Rail I/Os for SDMMC3_HV" "Disabled,Enabled"
bitfld.long 0x18 30. "              SDMMC2_HV                         ,Rail I/Os for SDMMC2_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 28. " DMIC_HV                     ,Rail I/Os for DMIC_HV" "Disabled,Enabled"
bitfld.long 0x18 27. "              AO_HV                             ,AO HV rail I/Os" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 26. " AO                          ,AO rail I/Os" "Disabled,Enabled"
bitfld.long 0x18 22. "              SPI                               ,Rail I/Os for SPI" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 19. " DBG                         ,Rail I/Os for DEBUG" "Disabled,Enabled"
bitfld.long 0x18 18. "              AUDIO_HV                          ,Rail I/Os for AUDIO_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 17. " MEM1_COMP                   ,MEM1_COMP" "Disabled,Enabled"
bitfld.long 0x18 16. "              MEM_COMP                          ,MEM_COMP" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 15. " SDMMC1_HV                   ,Rail I/Os for SDMMC1_HV" "Disabled,Enabled"
bitfld.long 0x18 14. "              SDMMC4                            ,Rail I/Os for SDMMC4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 11. " PEX_CNTRL                   ,Rail I/Os for PEX_CTL" "Disabled,Enabled"
bitfld.long 0x18 10. "              CAM                               ,Rail I/Os for CAM" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 9. " MIPI                        ,Rail I/Os for MIPI (CSI_DSI)" "Disabled,Enabled"
bitfld.long 0x18 8. "              MEM1                              ,Rail I/Os for VDDIO_DDR1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 7. " MEM                         ,Rail I/Os for VDDIO_DDR0" "Disabled,Enabled"
bitfld.long 0x18 6. "              UFS                               ,Rail I/Os for UFS" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 5. " AUDIO                       ,Rail I/Os for AUDIO" "Disabled,Enabled"
bitfld.long 0x18 4. "              EDP                               ,Rail I/Os for EDP" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 3. " CONN                        ,Rail I/Os for CONN" "Disabled,Enabled"
bitfld.long 0x18 2. "              UART                              ,Rail I/Os for CONN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 0. " SYS                         ,Rail AO I/Os SYS" "Disabled,Enabled"
line.long 0x1C "DDR_PWR_0,DDR_PWR_0"
bitfld.long 0x1C 3. " SPI                         ,SPI pins set" "E_12V,E_18V"
bitfld.long 0x1C 2. "                 EMMC2                             ,SDMMC2 pins set" "E_12V,E_18V"
textline "                                       "
bitfld.long 0x1C 1. " EMMC                        ,GMI pins set" "E_12V,E_18V"
bitfld.long 0x1C 0. "                 VAL                               ,DVI pins set" "E_12V,E_18V"
line.long 0x20 "E_18V_PWR_0,E_18V_PWR_0"
bitfld.long 0x20 5. " SPI                         ,SPI" "Disabled,Enabled"
bitfld.long 0x20 4. "              DBG                               ,DBG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x20 1. " UFS                         ,UFS" "Disabled,Enabled"
line.long 0x24 "E_33V_PWR_0,E_33V_PWR_0"
bitfld.long 0x24 6. " SDMMC3_HV                   ,SDMMC3_HV" "Disabled,Enabled"
bitfld.long 0x24 5. "              SDMMC2_HV                         ,SDMMC2_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 4. " SDMMC1_HV                   ,SDMMC1_HV" "Disabled,Enabled"
bitfld.long 0x24 2. "              DMIC_HV                           ,DMIC_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 1. " AUDIO_HV                    ,AUDIO_HV" "Disabled,Enabled"
bitfld.long 0x24 0. "              AO_HV                             ,AO_HV" "Disabled,Enabled"
line.long 0x28 "DISP_SECURE_CTL_0,DISP_SECURE_CTL_0"
bitfld.long 0x28 6. " DSI_VPR_SECURE_MODE         ,DSI VPR policy registers protection" "TSEC protection,TrustZone protection"
bitfld.long 0x28 5. "  SOR_VPR_SECURE_MODE               ,SOR VPR policy registers protection" "TSEC protection,TrustZone protection"
textline "                                       "
bitfld.long 0x28 4. " SOR1_ASSR_FORCE_INTERNAL    ,SOR1 ASSR will be forced to internal" "Not forced,Forced"
bitfld.long 0x28 3. "            SOR0_ASSR_FORCE_INTERNAL          ,SOR0 ASSR will be forced to internal" "Not forced,Forced"
textline "                                       "
bitfld.long 0x28 2. " SOR_HDCP1_1_SECURE_MODE     ,HDCP1.1 registers access will be either protected by TSEC or TrustZone" "TSEC protection,TrustZone protection"
bitfld.long 0x28 1. "  SOR_HDCP1_1_SECURE                ,Protection on HDCP 1.1 registers" "No,Yes"
textline "                                       "
bitfld.long 0x28 0. " SOR_HDCP2_2_SECURE_MODE     ,TSEC or both TSEC and TrustZone is allowed to access HDCP 2.2 registers" "TSEC protection,Both"
line.long 0x2C "CRYPTO_OP_0,CRYPTO_OP_0"
bitfld.long 0x2C 0. " VAL                         ,Value" "No,Yes"
line.long 0x30 "PLLP_WB0_OVERRIDE_0,PLLP_WB0_OVERRIDE_0"
bitfld.long 0x30 20. " DUAL_PLLMSB_IDDQ            ,Drives IDDQ input to dual PLLMSB" "Disabled,Enabled"
bitfld.long 0x30 19. "              DUAL_PLLMSB_SELVCO                ,Drives SELVCO input to dual PLLMSB" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 18. " PLLMSB_ENABLE               ,PLLMSB enable" "Disabled,Enabled"
bitfld.long 0x30 17. "              PLLMSB_OVERRIDE_ENABLE            ,PLLMSB override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 16. " PLLP_IDDQ                   ,Enabling during SC7 exit PMC should program IDDQ bit" "Disabled,Enabled"
bitfld.long 0x30 15. "              PLLU_IDDQ                         ,Enabling during SC7 exit PMC should program IDDQ bit" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 14. " DUAL_PLLM_IDDQ              ,Drives IDDQ input to dual PLLM macro through the port pmc2car_pllm_syncmux_ctrl" "Disabled,Enabled"
bitfld.long 0x30 13. "              DUAL_PLLM_SELVCO                  ,Drives SELVCO input to dual PLLM macro through the port pmc2car_pllm_selvco" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 12. " PLLM_ENABLE                 ,PLLM enable" "Disabled,Enabled"
bitfld.long 0x30 11. "              PLLM_OVERRIDE_ENABLE              ,PLLM override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 10. " PLLU_ENABLE                 ,PLLU enable" "Disabled,Enabled"
bitfld.long 0x30 9. "              PLLU_OVERRIDE_ENABLE              ,PLLU override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 8. " OSC_OVERRIDE_ENABLE         ,OSC override enable" "Disabled,Enabled"
bitfld.long 0x30 6.--7. "              PLL_REF_DIV                       ,PLL reference clock divide for all PLLs" "/1,/2,/4,?..."
textline "                                       "
bitfld.long 0x30 2.--5. " OSC_FREQ                    ,Osc frequency for shared PLL reference" "13 MHz,16.8 MHz,,,19.2 MHz,38.4 MHz,,,12 MHz,48 MHz,,,26 MHz,?..."
bitfld.long 0x30 1. "              PLLP_ENABLE                       ,PLLP enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 0. " PLLP_OVERRIDE_ENABLE        ,PLLP override enable" "Disabled,Enabled"
line.long 0x34 "PLLM_WB0_OVERRIDE_FREQ_0,PLLM_WB0_OVERRIDE_FREQ_0"
hexmask.long.byte 0x34 8.--15. 1. " PLLM_DIVN                   ,PLL feedback divider"
hexmask.long.byte 0x34 0.--7. 1. "                    PLLM_DIVM                         ,PLL input divider"
line.long 0x38 "PLLM_WB0_OVERRIDE2_0,PLLM_WB0_OVERRIDE2_0"
bitfld.long 0x38 27.--31. " DIVP                        ,4 bit DIVP for PLLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
bitfld.long 0x38 26. "                    KVCO                              ,KVCO/VCO gain" "0,1"
textline "                                       "
bitfld.long 0x38 24.--25. " KCP                         ,Charge pump control" "0,1,2,3"
hexmask.long.tbyte 0x38 0.--23. 1. "                     SETUP                             ,Setup"
line.long 0x3C "PLLMSB_WB0_OVERRIDE_FREQ_0,PLLMSB_WB0_OVERRIDE_FREQ_0"
hexmask.long.byte 0x3C 8.--15. 1. " PLLMSB_DIVN                 ,PLL feedback divider"
hexmask.long.byte 0x3C 0.--7. 1. "                    PLLMSB_DIVM                       ,PLL input divider"
line.long 0x40 "PLLMSB_WB0_OVERRIDE2_0,PLLMSB_WB0_OVERRIDE2_0"
bitfld.long 0x40 27.--31. " DIVP                        ,4 bit DIVP for PLLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
bitfld.long 0x40 26. "                    KVCO                              ,KVCO/VCO gain" "0,1"
textline "                                       "
bitfld.long 0x40 24.--25. " KCP                         ,Charge pump control" "0,1,2,3"
hexmask.long.tbyte 0x40 0.--23. 1. "                     SETUP                             ,Setup"
line.long 0x44 "OSC_EDPD_OVER_0,OSC_EDPD_OVER_0"
bitfld.long 0x44 23. " CLK_OK                      ,Crystal oscillator clk_ok signal" "Disabled,Enabled"
bitfld.long 0x44 22. "              OSC_CTRL_SELECT                   ,Select whether CARs OSC_CTRL or PMCs OSC_CTRL_OVER affects the oscillator cell" "CAR,PMC"
textline "                                       "
hexmask.long.byte 0x44 12.--19. 1. " OSCFI_SPARE                 ,Charge pump control"
bitfld.long 0x44 7.--11. "                    XODS                              ,Crystal oscillator duty cycle control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                       "
bitfld.long 0x44 1.--6. " XOFS                        ,Crystal oscillator drive strength control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x68++0x07
line.long 0x00 "SATA_PWRGT_0,SATA_PWRGT_0"
bitfld.long 0x00 6. " PG_INFO                     ,Sm2sata_pg_info" "0,1"
line.long 0x04 "SENSOR_CTRL_0,SENSOR_CTRL_0"
bitfld.long 0x04 1. " ENABLE_RST                  ,Enables reset on sensor going up" "Disabled,Enabled"
bitfld.long 0x04 0. "              ENABLE_PG                         ,Power gate CPUs on temperature sensor going up" "Disabled,Enabled"
rgroup.long 0x70++0x03
line.long 0x00 "RST_STATUS_0,RST_STATUS_0"
bitfld.long 0x00 2.--5. " RST_SOURCE                  ,Power gate CPUs on temperature sensor going up" "SYS_RESET_N,AOWDT,BCCPLEXWDT,BPMPWDT,SCEWDT,SPEWDT,APEWDT,LCCPLEXWDT,SENSOR,AOTAG,VFSENSOR,MAINSWRST,SC7,HSM,CSITE,?..."
bitfld.long 0x00 0.--1. "           RST_LEVEL                         ,Reset Level" "L0,L1,L2,WARM"
group.long 0x74++0x03
line.long 0x00 "IO_DPD_REQ_0,DPD Request 0 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               HDMI_DP1                          ,Puts HDMI DP1 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " HDMI_DP0                    ,Puts HDMI DP0 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 25. "         DBG                               ,Debug" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " HSIC                        ,Puts HSIC rail in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 17. "         AUDIO                             ,Puts audio rail in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " UART                        ,Puts UART rail in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         USB_BIAS                          ,Puts usb_bias in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " USB2                        ,Puts USB2 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         USB1                              ,Puts USB1 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " USB0                        ,Puts USB0 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 7. "         PEX_CLK1                          ,PEX clk1 pad-DPD control" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " PEX_CLK2                    ,PEX clk2 pad-DPD control" "Not requested,Requested"
bitfld.long 0x00 5. "         PEX_CLK3                          ,PEX clk3 pad-DPD control" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " PEX_CLK_BIAS                ,PEX clk bias pad-DPD control" "Not requested,Requested"
bitfld.long 0x00 3. "         MIPI_BIAS                         ,Puts mipi_bias (CSI/DSI bias) in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " DSI                         ,Puts DSIA in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 1. "         CSIB                              ,Puts CSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 0. " CSIA                        ,Puts CSIA in/out of deep power down mode" "Not requested,Requested"
rgroup.long 0x78++0x03
line.long 0x00 "IO_DPD_STATUS_0,DPD Status 0 Register"
bitfld.long 0x00 29. " HDMI_DP1                    ,HDMI DP1 in deep power down mode" "Off,On"
bitfld.long 0x00 28. "                   HDMI_DP0                          ,HDMI DP0 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DBG                         ,Debug" "Off,On"
bitfld.long 0x00 19. "                   HSIC                              ,HSIC rail in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " AUDIO                       ,Audio rail in deep power down mode" "Off,On"
bitfld.long 0x00 14. "                   UART                              ,UART rail in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " USB_BIAS                    ,Usb_bias in deep power down mode" "Off,On"
bitfld.long 0x00 11. "                   USB2                              ,USB2 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " USB1                        ,USB1 in deep power down mode" "Off,On"
bitfld.long 0x00 9. "                   USB0                              ,USB0 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " PEX_CLK1                    ,PEX clk1 pad-DPD control" "Off,On"
bitfld.long 0x00 6. "                   PEX_CLK2                          ,PEX clk2 pad-DPD control" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " PEX_CLK3                    ,PEX clk3 pad-DPD control" "Off,On"
bitfld.long 0x00 4. "                   PEX_CLK_BIAS                      ,PEX clk bias pad-DPD control" "Off,On"
textline "                                       "
bitfld.long 0x00 3. " MIPI_BIAS                   ,Mipi_bias in deep power down mode" "Off,On"
bitfld.long 0x00 2. "                   DSI                               ,DSI in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 1. " CSIB                        ,CSIB in deep power down mode" "Off,On"
bitfld.long 0x00 0. "                   CSIA                              ,CSIA in deep power down mode" "Off,On"
group.long 0x7C++0x03
line.long 0x00 "IO_DPD2_REQ_0,DPD Request 2 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "Idle,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               AUDIO_HV                          ,Puts AUDIO_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " CONN                        ,Puts CONN in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 24. "         SDMMC3_HV                         ,Puts SDMMC3_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " SDMMC1_HV                   ,Puts SDMMC1_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 21. "         EDP                               ,Puts EDP in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DMIC_HV                     ,Puts DMIC_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 17. "         UFS                               ,Puts UFS in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " SPI                         ,Puts SPI in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 14. "         CSIF                              ,Puts CSIF in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 13. " CSIE                        ,Puts CSIE in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         CSID                              ,Puts CSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " CSIC                        ,Puts CSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         DSID                              ,Puts DSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DSIC                        ,Puts DSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 8. "         DSIB                              ,Puts DSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAM                         ,Puts CAM in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 4. "         SDMMC4                            ,Puts SDMMC4 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " SDMMC2_HV                   ,Puts SDMMC2_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 0. "         PEX_CNTRL                         ,Puts pex_cntrl in/out of deep power down mode" "Not requested,Requested"
rgroup.long 0x80++0x03
line.long 0x00 "IO_DPD2_STATUS_0,DPD Status 2 Register"
bitfld.long 0x00 29. " AUDIO_HV                    ,Puts AUDIO_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 28. "         CONN                              ,Puts CONN in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " SDMMC3_HV                   ,Puts SDMMC3_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 23. "         SDMMC1_HV                         ,Puts SDMMC1_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " EDP                         ,Puts EDP in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 20. "         DMIC_HV                           ,Puts DMIC_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " UFS                         ,Puts UFS in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 14. "         CSIF                              ,Puts CSIF in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 13. " CSIE                        ,Puts CSIE in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         CSID                              ,Puts CSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " CSIC                        ,Puts CSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         DSID                              ,Puts DSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DSIC                        ,Puts DSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 8. "         DSIB                              ,Puts DSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAM                         ,Puts CAM in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 4. "         SDMMC4                            ,Puts SDMMC4 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " SDMMC2_HV                   ,Puts SDMMC2_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 0. "         PEX_CNTRL                         ,Puts PEX_CNTRL in/out of deep power down mode" "Not requested,Requested"
group.long 0x84++0x03
line.long 0x00 "IO_DPD3_REQ_0,DPD Request 3 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "Idle,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 28. "               DDR_RESET                         ,DDR_RESET Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 27. " DDR_BR11_CMD                ,DDR_BR11_CMD Request" "Not requested,Requested"
bitfld.long 0x00 26. "         DDR_BR10_CMD                      ,DDR_BR10_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " DDR_BR9_CMD                 ,DDR_BR9_CMD Request" "Not requested,Requested"
bitfld.long 0x00 24. "         DDR_BR8_CMD                       ,DDR_BR8_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " DDR_BR7_CMD                 ,DDR_BR7_CMD Request" "Not requested,Requested"
bitfld.long 0x00 22. "         DDR_BR6_CMD                       ,DDR_BR6_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " DDR_BR5_CMD                 ,DDR_BR5_CMD Request" "Not requested,Requested"
bitfld.long 0x00 20. "         DDR_BR4_CMD                       ,DDR_BR4_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " DDR_BR3_CMD                 ,DDR_BR3_CMD Request" "Not requested,Requested"
bitfld.long 0x00 18. "         DDR_BR2_CMD                       ,DDR_BR2_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " DDR_BR1_CMD                 ,DDR_BR1_CMD Request" "Not requested,Requested"
bitfld.long 0x00 16. "         DDR_BR0_CMD                       ,DDR_BR0_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " DDR_DDLL                    ,DDR_DDLL Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR_COMP                          ,DDR_COMP Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR_BR11                    ,DDR_BR11 Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR_BR10                          ,DDR_BR10 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR_BR9                     ,DDR_BR9 Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR_BR8                           ,DDR_BR8 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR_BR7                     ,DDR_BR7 Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR_BR6                           ,DDR_BR6 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR_BR5                     ,DDR_BR5 Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR_BR4                           ,DDR_BR4 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR_BR3                     ,DDR_BR3 Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR_BR2                           ,DDR_BR2 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR_BR1                     ,DDR_BR1 Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR_BR0                           ,DDR_BR0 Request" "Not requested,Requested"
rgroup.long 0x88++0x03
line.long 0x00 "IO_DPD3_STATUS_0,DPD Status 3 Register"
bitfld.long 0x00 28. " DDR_RESET                   ,DDR_RESET Status" "Off,On"
bitfld.long 0x00 27. "                   DDR_BR11_CMD                      ,DDR_BR11_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 26. " DDR_BR10_CMD                ,DDR_BR10_CMD Status" "Off,On"
bitfld.long 0x00 25. "                   DDR_BR9_CMD                       ,DDR_BR9_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " DDR_BR8_CMD                 ,DDR_BR8_CMD Status" "Off,On"
bitfld.long 0x00 23. "                   DDR_BR7_CMD                       ,DDR_BR7_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 22. " DDR_BR6_CMD                 ,DDR_BR6_CMD Status" "Off,On"
bitfld.long 0x00 21. "                   DDR_BR5_CMD                       ,DDR_BR5_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 20. " DDR_BR4_CMD                 ,DDR_BR4_CMD Status" "Off,On"
bitfld.long 0x00 19. "                   DDR_BR3_CMD                       ,DDR_BR3_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " DDR_BR2_CMD                 ,DDR_BR2_CMD Status" "Off,On"
bitfld.long 0x00 17. "                   DDR_BR1_CMD                       ,DDR_BR1_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " DDR_BR0_CMD                 ,DDR_BR0_CMD Status" "Off,On"
bitfld.long 0x00 15. "                   DDR_DDLL                          ,DDR_DDLL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR_COMP                    ,DDR_COMP Status" "Off,On"
bitfld.long 0x00 11. "                   DDR_BR11                          ,DDR_BR11 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR_BR10                    ,DDR_BR10 Status" "Off,On"
bitfld.long 0x00 9. "                   DDR_BR9                           ,DDR_BR9 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR_BR8                     ,DDR_BR8 Status" "Off,On"
bitfld.long 0x00 7. "                   DDR_BR7                           ,DDR_BR7 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR_BR6                     ,DDR_BR6 Status" "Off,On"
bitfld.long 0x00 5. "                   DDR_BR5                           ,DDR_BR5 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR_BR4                     ,DDR_BR4 Status" "Off,On"
bitfld.long 0x00 3. "                   DDR_BR3                           ,DDR_BR3 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR_BR2                     ,DDR_BR2 Status" "Off,On"
bitfld.long 0x00 1. "                   DDR_BR1                           ,DDR_BR1 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR_BR0                     ,DDR_BR0 Status" "Off,On"
group.long 0x8C++0x03
line.long 0x00 "IO_DPD4_REQ_0,DPD Request 4 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               DDR_DDLL_VTTGEN                   ,DDR_DDLL_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " DDR_COMP_VTTGEN             ,DDR_COMP_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 27. "         DDR_BR11_VTTGEN                   ,DDR_BR11_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " DDR_BR10_VTTGEN             ,DDR_BR10_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 25. "         DDR_BR9_VTTGEN                    ,DDR_BR9_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " DDR_BR8_VTTGEN              ,DDR_BR8_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 23. "         DDR_BR7_VTTGEN                    ,DDR_BR7_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " DDR_BR6_VTTGEN              ,DDR_BR6_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 21. "         DDR_BR5_VTTGEN                    ,DDR_BR5_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DDR_BR4_VTTGEN              ,DDR_BR4_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 19. "         DDR_BR3_VTTGEN                    ,DDR_BR3_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " DDR_BR2_VTTGEN              ,DDR_BR2_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 17. "         DDR_BR1_VTTGEN                    ,DDR_BR1_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " DDR_BR0_VTTGENBG            ,DDR_BR0_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR_COMP_BG                       ,DDR_COMP_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR_BR11_BG                 ,DDR_BR11_BG Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR_BR10_BG                       ,DDR_BR10_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR_BR9_BG                  ,DDR_BR9_BG Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR_BR8_BG                        ,DDR_BR8_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR_BR7_BG                  ,DDR_BR7_BG Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR_BR6_BG                        ,DDR_BR6_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR_BR5_BG                  ,DDR_BR5_BG Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR_BR4_BG                        ,DDR_BR4_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR_BR3_BG                  ,DDR_BR3_BG Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR_BR2_BG                        ,DDR_BR2_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR_BR1_BG                  ,DDR_BR1_BG Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR_BR0_BG                        ,DDR_BR0_BG Request" "Not requested,Requested"
rgroup.long 0x90++0x03
line.long 0x00 "IO_DPD4_STATUS_0,DPD Status 4 Register"
bitfld.long 0x00 29. " DDR_DDLL_VTTGEN             ,DDR_DDLL_VTTGEN Status" "Off,On"
bitfld.long 0x00 28. "                   DDR_COMP_VTTGEN                   ,DDR_COMP_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " DDR_BR11_VTTGEN             ,DDR_BR11_VTTGEN Status" "Off,On"
bitfld.long 0x00 26. "                   DDR_BR10_VTTGEN                   ,DDR_BR10_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DDR_BR9_VTTGEN              ,DDR_BR9_VTTGEN Status" "Off,On"
bitfld.long 0x00 24. "                   DDR_BR8_VTTGEN                    ,DDR_BR8_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " DDR_BR7_VTTGEN              ,DDR_BR7_VTTGEN Status" "Off,On"
bitfld.long 0x00 22. "                   DDR_BR6_VTTGEN                    ,DDR_BR6_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 21. " DDR_BR5_VTTGEN              ,DDR_BR5_VTTGEN Status" "Off,On"
bitfld.long 0x00 20. "                   DDR_BR4_VTTGEN                    ,DDR_BR4_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " DDR_BR3_VTTGEN              ,DDR_BR3_VTTGEN Status" "Off,On"
bitfld.long 0x00 18. "                   DDR_BR2_VTTGEN                    ,DDR_BR2_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " DDR_BR1_VTTGEN              ,DDR_BR1_VTTGEN Status" "Off,On"
bitfld.long 0x00 16. "                   DDR_BR0_VTTGEN                    ,DDR_BR0_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR_COMP_BG                 ,DDR_COMP_BG Status" "Off,On"
bitfld.long 0x00 11. "                   DDR_BR11_BG                       ,DDR_BR11_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR_BR10_BG                 ,DDR_BR10_BG Status" "Off,On"
bitfld.long 0x00 9. "                   DDR_BR9_BG                        ,DDR_BR9_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR_BR8_BG                  ,DDR_BR8_BG Status" "Off,On"
bitfld.long 0x00 7. "                   DDR_BR7_BG                        ,DDR_BR7_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR_BR6_BG                  ,DDR_BR6_BG Status" "Off,On"
bitfld.long 0x00 5. "                   DDR_BR5_BG                        ,DDR_BR5_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR_BR4_BG                  ,DDR_BR4_BG Status" "Off,On"
bitfld.long 0x00 3. "                   DDR_BR3_BG                        ,DDR_BR3_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR_BR2_BG                  ,DDR_BR2_BG Status" "Off,On"
bitfld.long 0x00 1. "                   DDR_BR1_BG                        ,DDR_BR1_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR_BR0_BG                  ,DDR_BR0_BG Status" "Off,On"
group.long 0x94++0x03
line.long 0x00 "IO_DPD5_REQ_0,DPD Request 5 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 28. "               DDR1_RESET                        ,DDR1_RESET Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 27. " DDR1_BR11_CMD               ,DDR1_BR11_CMD Request" "Not requested,Requested"
bitfld.long 0x00 26. "         DDR1_BR10_CMD                     ,DDR1_BR10_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " DDR1_BR9_CMD                ,DDR1_BR9_CMD Request" "Not requested,Requested"
bitfld.long 0x00 24. "         DDR1_BR8_CMD                      ,DDR1_BR8_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " DDR1_BR7_CMD                ,DDR1_BR7_CMD Request" "Not requested,Requested"
bitfld.long 0x00 22. "         DDR1_BR6_CMD                      ,DDR1_BR6_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " DDR1_BR5_CMD                ,DDR1_BR5_CMD Request" "Not requested,Requested"
bitfld.long 0x00 20. "         DDR1_BR4_CMD                      ,DDR1_BR4_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " DDR1_BR3_CMD                ,DDR1_BR3_CMD Request" "Not requested,Requested"
bitfld.long 0x00 18. "         DDR1_BR2_CMD                      ,DDR1_BR2_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " DDR1_BR1_CMD                ,DDR1_BR1_CMD Request" "Not requested,Requested"
bitfld.long 0x00 16. "         DDR1_BR0_CMD                      ,DDR1_BR0_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " DDR1_DDLL                   ,DDR1_DDLL Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR1_COMP                         ,DDR1_COMP Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR1_BR11                   ,DDR1_BR11 Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR1_BR10                         ,DDR1_BR10 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR1_BR9                    ,DDR1_BR9 Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR1_BR8                          ,DDR1_BR8 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR1_BR7                    ,DDR1_BR7 Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR1_BR6                          ,DDR1_BR6 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR1_BR5                    ,DDR1_BR5 Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR1_BR4                          ,DDR1_BR4 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR1_BR3                    ,DDR1_BR3 Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR1_BR2                          ,DDR1_BR2 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR1_BR1                    ,DDR1_BR1 Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR1_BR0                          ,DDR1_BR0 Request" "Not requested,Requested"
rgroup.long 0x98++0x03
line.long 0x00 "IO_DPD5_STATUS_0,DPD Status 5 Register"
bitfld.long 0x00 28. " DDR1_RESET                  ,DDR1_RESET Status" "Off,On"
bitfld.long 0x00 27. "                   DDR1_BR11_CMD                     ,DDR1_BR11_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 26. " DDR1_BR10_CMD               ,DDR1_BR10_CMD Status" "Off,On"
bitfld.long 0x00 25. "                   DDR1_BR9_CMD                      ,DDR1_BR9_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " DDR1_BR8_CMD                ,DDR1_BR8_CMD Status" "Off,On"
bitfld.long 0x00 23. "                   DDR1_BR7_CMD                      ,DDR1_BR7_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 22. " DDR1_BR6_CMD                ,DDR1_BR6_CMD Status" "Off,On"
bitfld.long 0x00 21. "                   DDR1_BR5_CMD                      ,DDR1_BR5_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 20. " DDR1_BR4_CMD                ,DDR1_BR4_CMD Status" "Off,On"
bitfld.long 0x00 19. "                   DDR1_BR3_CMD                      ,DDR1_BR3_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " DDR1_BR2_CMD                ,DDR1_BR2_CMD Status" "Off,On"
bitfld.long 0x00 17. "                   DDR1_BR1_CMD                      ,DDR1_BR1_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " DDR1_BR0_CMD                ,DDR1_BR0_CMD Status" "Off,On"
bitfld.long 0x00 15. "                   DDR1_DDLL                         ,DDR1_DDLL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR1_COMP                   ,DDR1_COMP Status" "Off,On"
bitfld.long 0x00 11. "                   DDR1_BR11                         ,DDR1_BR11 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR1_BR10                   ,DDR1_BR10 Status" "Off,On"
bitfld.long 0x00 9. "                   DDR1_BR9                          ,DDR1_BR9 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR1_BR8                    ,DDR1_BR8 Status" "Off,On"
bitfld.long 0x00 7. "                   DDR1_BR7                          ,DDR1_BR7 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR1_BR6                    ,DDR1_BR6 Status" "Off,On"
bitfld.long 0x00 5. "                   DDR1_BR5                          ,DDR1_BR5 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR1_BR4                    ,DDR1_BR4 Status" "Off,On"
bitfld.long 0x00 3. "                   DDR1_BR3                          ,DDR1_BR3 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR1_BR2                    ,DDR1_BR2 Status" "Off,On"
bitfld.long 0x00 1. "                   DDR1_BR1                          ,DDR1_BR1 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR1_BR0                    ,DDR1_BR0 Status" "Off,On"
group.long 0x9C++0x03
line.long 0x00 "IO_DPD6_REQ_0,DPD Request 6 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               DDR1_DDLL_VTTGEN                  ,DDR1_DDLL_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " DDR1_COMP_VTTGEN            ,DDR1_COMP_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 27. "         DDR1_BR11_VTTGEN                  ,DDR1_BR11_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " DDR1_BR10_VTTGEN            ,DDR1_BR10_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 25. "         DDR1_BR9_VTTGEN                   ,DDR1_BR9_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " DDR1_BR8_VTTGEN             ,DDR1_BR8_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 23. "         DDR1_BR7_VTTGEN                   ,DDR1_BR7_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " DDR1_BR6_VTTGEN             ,DDR1_BR6_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 21. "         DDR1_BR5_VTTGEN                   ,DDR1_BR5_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DDR1_BR4_VTTGEN             ,DDR1_BR4_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 19. "         DDR1_BR3_VTTGEN                   ,DDR1_BR3_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " DDR1_BR2_VTTGEN             ,DDR1_BR2_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 17. "         DDR1_BR1_VTTGEN                   ,DDR1_BR1_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " DDR1_BR0_VTTGEN             ,DDR1_BR0_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR1_COMP_BG                      ,DDR1_COMP_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR1_BR11_BG                ,DDR1_BR11_BG Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR1_BR10_BG                      ,DDR1_BR10_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR1_BR9_BG                 ,DDR1_BR9_BG Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR1_BR8_BG                       ,DDR1_BR8_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR1_BR7_BG                 ,DDR1_BR7_BG Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR1_BR6_BG                       ,DDR1_BR6_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR1_BR5_BG                 ,DDR1_BR5_BG Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR1_BR4_BG                       ,DDR1_BR4_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR1_BR3_BG                 ,DDR1_BR3_BG Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR1_BR2_BG                       ,DDR1_BR2_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR1_BR1_BG                 ,DDR1_BR1_BG Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR1_BR0_BG                       ,DDR1_BR0_BG Request" "Not requested,Requested"
rgroup.long 0xA0++0x03
line.long 0x00 "IO_DPD6_STATUS_0,DPD Status 5 Register"
bitfld.long 0x00 29. " DDR1_DDLL_VTTGEN            ,DDR1_DDLL_VTTGEN Status" "Off,On"
bitfld.long 0x00 28. "                   DDR1_COMP_VTTGEN                  ,DDR1_COMP_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " DDR1_BR11_VTTGEN            ,DDR1_BR11_VTTGEN Status" "Off,On"
bitfld.long 0x00 26. "                   DDR1_BR10_VTTGEN                  ,DDR1_BR10_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DDR1_BR9_VTTGEN             ,DDR1_BR9_VTTGEN Status" "Off,On"
bitfld.long 0x00 24. "                   DDR1_BR8_VTTGEN                   ,DDR1_BR8_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " DDR1_BR7_VTTGEN             ,DDR1_BR7_VTTGEN Status" "Off,On"
bitfld.long 0x00 22. "                   DDR1_BR6_VTTGEN                   ,DDR1_BR6_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 21. " DDR1_BR5_VTTGEN             ,DDR1_BR5_VTTGEN Status" "Off,On"
bitfld.long 0x00 20. "                   DDR1_BR4_VTTGEN                   ,DDR1_BR4_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " DDR1_BR3_VTTGEN             ,DDR1_BR3_VTTGEN Status" "Off,On"
bitfld.long 0x00 18. "                   DDR1_BR2_VTTGEN                   ,DDR1_BR2_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " DDR1_BR1_VTTGEN             ,DDR1_BR1_VTTGEN Status" "Off,On"
bitfld.long 0x00 16. "                   DDR1_BR0_VTTGEN                   ,DDR1_BR0_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR1_COMP_BG                ,DDR1_COMP_BG Status" "Off,On"
bitfld.long 0x00 11. "                   DDR1_BR11_BG                      ,DDR1_BR11_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR1_BR10_BG                ,DDR1_BR10_BG Status" "Off,On"
bitfld.long 0x00 9. "                   DDR1_BR9_BG                       ,DDR1_BR9_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR1_BR8_BG                 ,DDR1_BR8_BG Status" "Off,On"
bitfld.long 0x00 7. "                   DDR1_BR7_BG                       ,DDR1_BR7_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR1_BR6_BG                 ,DDR1_BR6_BG Status" "Off,On"
bitfld.long 0x00 5. "                   DDR1_BR5_BG                       ,DDR1_BR5_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR1_BR4_BG                 ,DDR1_BR4_BG Status" "Off,On"
bitfld.long 0x00 3. "                   DDR1_BR3_BG                       ,DDR1_BR3_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR1_BR2_BG                 ,DDR1_BR2_BG Status" "Off,On"
bitfld.long 0x00 1. "                   DDR1_BR1_BG                       ,DDR1_BR1_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR1_BR0_BG                 ,DDR1_BR0_BG Status" "Off,On"
group.long 0xA4++0x03
line.long 0x00 "IO_DPD7_REQ_0,DPD Request 7 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               UART3_TX                          ,UART3_TX Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " UART3_RX                    ,UART3_RX Request" "Not requested,Requested"
bitfld.long 0x00 27. "         UART3_RTS                         ,UART3_RTS Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " UART3_CTS                   ,UART3_CTS Request" "Not requested,Requested"
bitfld.long 0x00 25. "         CAN_GPIO5                         ,CAN_GPIO5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " CAN_GPIO4                   ,CAN_GPIO4 Request" "Not requested,Requested"
bitfld.long 0x00 23. "         CAN_GPIO3                         ,CAN_GPIO3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " CAN_GPIO2                   ,CAN_GPIO2 Request" "Not requested,Requested"
bitfld.long 0x00 19. "         GPIO_SW3                          ,GPIO_SW3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " GPIO_SW2                    ,GPIO_SW2 Request" "Not requested,Requested"
bitfld.long 0x00 17. "         GPIO_SEN9                         ,GPIO_SEN9 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " GPIO_SEN8                   ,GPIO_SEN8 Request" "Not requested,Requested"
bitfld.long 0x00 15. "         GPIO_SEN7                         ,GPIO_SEN7 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " GPIO_SEN6                   ,GPIO_SEN6 Request" "Not requested,Requested"
bitfld.long 0x00 13. "         GPIO_SEN5                         ,GPIO_SEN5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 12. " GPIO_SEN4                   ,GPIO_SEN4 Request" "Not requested,Requested"
bitfld.long 0x00 11. "         GPIO_SEN3                         ,GPIO_SEN3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 10. " GPIO_SEN2                   ,GPIO_SEN2 Request" "Not requested,Requested"
bitfld.long 0x00 9. "         GPIO_SEN1                         ,GPIO_SEN1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 8. " GPIO_SEN0                   ,GPIO_SEN0 Request" "Not requested,Requested"
bitfld.long 0x00 7. "         CAN_GPIO1                         ,CAN_GPIO1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAN_GPIO0                   ,CAN_GPIO0 Request" "Not requested,Requested"
bitfld.long 0x00 5. "         CAN1_DOUT                         ,CAN1_DOUT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " CAN1_DIN                    ,CAN1_DIN Request" "Not requested,Requested"
bitfld.long 0x00 3. "         CAN0_DOUT                         ,CAN0_DOUT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " CAN0_DIN                    ,CAN0_DIN Request" "Not requested,Requested"
bitfld.long 0x00 0. "         BATT_OC                           ,DDR1_BR0_BG Request" "Not requested,Requested"
rgroup.long 0xA8++0x03
line.long 0x00 "IO_DPD7_STATUS_0,DPD Status 7 Register"
bitfld.long 0x00 29. " UART3_TX                    ,UART3_TX Status" "Off,On"
bitfld.long 0x00 28. "                   UART3_RX                          ,UART3_RX Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " UART3_RTS                   ,UART3_RTS Status" "Off,On"
bitfld.long 0x00 26. "                   UART3_CTS                         ,UART3_CTS Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO5                   ,CAN_GPIO5 Status" "Off,On"
bitfld.long 0x00 24. "                   CAN_GPIO4                         ,CAN_GPIO4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " CAN_GPIO3                   ,CAN_GPIO3 Status" "Off,On"
bitfld.long 0x00 22. "                   CAN_GPIO2                         ,CAN_GPIO2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " GPIO_SW3                    ,GPIO_SW3 Status" "Off,On"
bitfld.long 0x00 18. "                   GPIO_SW2                          ,GPIO_SW2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " GPIO_SEN9                   ,GPIO_SEN9 Status" "Off,On"
bitfld.long 0x00 16. "                   GPIO_SEN8                         ,GPIO_SEN8 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 15. " GPIO_SEN7                   ,GPIO_SEN7 Status" "Off,On"
bitfld.long 0x00 14. "                   GPIO_SEN6                         ,GPIO_SEN6 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 13. " GPIO_SEN5                   ,GPIO_SEN5 Status" "Off,On"
bitfld.long 0x00 12. "                   GPIO_SEN4                         ,GPIO_SEN4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 11. " GPIO_SEN3                   ,GPIO_SEN3 Status" "Off,On"
bitfld.long 0x00 10. "                   GPIO_SEN2                         ,GPIO_SEN2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 9. " GPIO_SEN1                   ,GPIO_SEN1 Status" "Off,On"
bitfld.long 0x00 8. "                   GPIO_SEN0                         ,GPIO_SEN0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " CAN_GPIO1                   ,CAN_GPIO1 Status" "Off,On"
bitfld.long 0x00 6. "                   CAN_GPIO0                         ,CAN_GPIO0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " CAN1_DOUT                   ,CAN1_DOUT Status" "Off,On"
bitfld.long 0x00 4. "                   CAN1_DIN                          ,CAN1_DIN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 3. " CAN0_DOUT                   ,CAN0_DOUT Status" "Off,On"
bitfld.long 0x00 2. "                   CAN0_DIN                          ,CAN0_DIN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " BATT_OC                     ,BATT_OC Status" "Off,On"
group.long 0xAC++0x03
line.long 0x00 "IO_DPD8_REQ_0,DPD Request 8 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 26. "               CAN_GPIO7                         ,CAN_GPIO7 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO6                   ,CAN_GPIO6 Request" "Not requested,Requested"
bitfld.long 0x00 24. "         VCOMP_ALERT                       ,VCOMP_ALERT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " TOUCH_CLK                   ,TOUCH_CLK Request" "Not requested,Requested"
bitfld.long 0x00 18. "         PWR_I2C_SDA                       ,PWR_I2C_SDA Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " PWR_I2C_SCL                 ,PWR_I2C_SCL Request" "Not requested,Requested"
bitfld.long 0x00 16. "         POWER_ON                          ,POWER_ON Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " GPIO_SW4                    ,GPIO_SW4 Request" "Not requested,Requested"
bitfld.long 0x00 13. "         GPIO_DIS5                         ,GPIO_DIS5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 12. " GPIO_DIS4                   ,GPIO_DIS4 Request" "Not requested,Requested"
bitfld.long 0x00 11. "         GPIO_DIS3                         ,GPIO_DIS3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 10. " GPIO_DIS2                   ,GPIO_DIS2 Request" "Not requested,Requested"
bitfld.long 0x00 9. "         GPIO_DIS1                         ,GPIO_DIS1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 8. " GPIO_DIS0                   ,GPIO_DIS0 Request" "Not requested,Requested"
bitfld.long 0x00 7. "         GEN8_I2C_SDA                      ,GEN8_I2C_SDA Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " GEN8_I2C_SCL                ,GEN8_I2C_SCL Request" "Not requested,Requested"
bitfld.long 0x00 5. "         UART7_TX                          ,UART7_TX Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " UART7_RX                    ,UART7_RX Request" "Not requested,Requested"
bitfld.long 0x00 1. "         SAFE_STATE                        ,SAFE_STATE Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 0. " GPIO_SW1                    ,GPIO_SW1 Request" "Not requested,Requested"
rgroup.long 0xB0++0x03
line.long 0x00 "IO_DPD8_STATUS_0,DPD Status 8 Register"
bitfld.long 0x00 26. " CAN_GPIO7                   ,CAN_GPIO7 Status" "Off,On"
bitfld.long 0x00 25. "                   CAN_GPIO6                         ,CAN_GPIO6 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " VCOMP_ALERT                 ,VCOMP_ALERT Status" "Off,On"
bitfld.long 0x00 23. "                   TOUCH_CLK                         ,TOUCH_CLK Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " PWR_I2C_SDA                 ,PWR_I2C_SDA Status" "Off,On"
bitfld.long 0x00 17. "                   PWR_I2C_SCL                       ,PWR_I2C_SCL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " POWER_ON                    ,POWER_ON Status" "Off,On"
bitfld.long 0x00 14. "                   GPIO_SW4                          ,GPIO_SW4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 13. " GPIO_DIS5                   ,GPIO_DIS5 Status" "Off,On"
bitfld.long 0x00 12. "                   GPIO_DIS4                         ,GPIO_DIS4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 11. " GPIO_DIS3                   ,GPIO_DIS3 Status" "Off,On"
bitfld.long 0x00 10. "                   GPIO_DIS2                         ,GPIO_DIS2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 9. " GPIO_DIS1                   ,GPIO_DIS1 Status" "Off,On"
bitfld.long 0x00 8. "                   GPIO_DIS0                         ,GPIO_DIS0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " GEN8_I2C_SDA                ,GEN8_I2C_SDA Status" "Off,On"
bitfld.long 0x00 6. "                   GEN8_I2C_SCL                      ,GEN8_I2C_SCL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " UART7_TX                    ,UART7_TX Status" "Off,On"
bitfld.long 0x00 4. "                   UART7_RX                          ,UART7_RX Status" "Off,On"
textline "                                       "
bitfld.long 0x00 1. " SAFE_STATE                  ,SAFE_STATE Status" "Off,On"
bitfld.long 0x00 0. "                   GPIO_SW1                          ,GPIO_SW1 Status" "Off,On"
group.long 0xB4++0x37
line.long 0x00 "IO_DPD7_OFF_MASK_0,DPD Mask Off 7 Register"
bitfld.long 0x00 29. " UART3_TX                    ,UART3_TX Request" "Not masked,Masked"
bitfld.long 0x00 28. "            UART3_RX                          ,UART3_RX Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 27. " UART3_RTS                   ,UART3_RTS Request" "Not masked,Masked"
bitfld.long 0x00 26. "            UART3_CTS                         ,UART3_CTS Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO5                   ,CAN_GPIO5 Request" "Not masked,Masked"
bitfld.long 0x00 24. "            CAN_GPIO4                         ,CAN_GPIO4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 23. " CAN_GPIO3                   ,CAN_GPIO3 Request" "Not masked,Masked"
bitfld.long 0x00 22. "            CAN_GPIO2                         ,CAN_GPIO2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 19. " GPIO_SW3                    ,GPIO_SW3 Request" "Not masked,Masked"
bitfld.long 0x00 18. "            GPIO_SW2                          ,GPIO_SW2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 17. " GPIO_SEN9                   ,GPIO_SEN9 Request" "Not masked,Masked"
bitfld.long 0x00 16. "            GPIO_SEN8                         ,GPIO_SEN8 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 15. " GPIO_SEN7                   ,GPIO_SEN7 Request" "Not masked,Masked"
bitfld.long 0x00 14. "            GPIO_SEN6                         ,GPIO_SEN6 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 13. " GPIO_SEN5                   ,GPIO_SEN5 Request" "Not masked,Masked"
bitfld.long 0x00 12. "            GPIO_SEN4                         ,GPIO_SEN4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 11. " GPIO_SEN3                   ,GPIO_SEN3 Request" "Not masked,Masked"
bitfld.long 0x00 10. "            GPIO_SEN2                         ,GPIO_SEN2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 9. " GPIO_SEN1                   ,GPIO_SEN1 Request" "Not masked,Masked"
bitfld.long 0x00 8. "            GPIO_SEN0                         ,GPIO_SEN0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 7. " CAN_GPIO1                   ,CAN_GPIO1 Request" "Not masked,Masked"
bitfld.long 0x00 6. "            CAN_GPIO0                         ,CAN_GPIO0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 5. " CAN1_DOUT                   ,CAN1_DOUT Request" "Not masked,Masked"
bitfld.long 0x00 4. "            CAN1_DIN                          ,CAN1_DIN Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 3. " CAN0_DOUT                   ,CAN0_DOUT Request" "Not masked,Masked"
bitfld.long 0x00 2. "            CAN0_DIN                          ,CAN0_DIN Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 0. " BATT_OC                     ,BATT_OC Request" "Not masked,Masked"
line.long 0x04 "IO_DPD8_OFF_MASK_0,DPD Mask Off 8 Register"
bitfld.long 0x04 26. " CAN_GPIO7                   ,CAN_GPIO7 Request" "Not masked,Masked"
bitfld.long 0x04 25. "            CAN_GPIO6                         ,CAN_GPIO6 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 24. " VCOMP_ALERT                 ,VCOMP_ALERT Request" "Not masked,Masked"
bitfld.long 0x04 23. "            TOUCH_CLK                         ,TOUCH_CLK Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 18. " PWR_I2C_SDA                 ,PWR_I2C_SDA Request" "Not masked,Masked"
bitfld.long 0x04 17. "            PWR_I2C_SCL                       ,PWR_I2C_SCL Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 16. " POWER_ON                    ,POWER_ON Request" "Not masked,Masked"
bitfld.long 0x04 14. "            GPIO_SW4                          ,GPIO_SW4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 13. " GPIO_DIS5                   ,GPIO_DIS5 Request" "Not masked,Masked"
bitfld.long 0x04 12. "            GPIO_DIS4                         ,GPIO_DIS4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 11. " GPIO_DIS3                   ,GPIO_DIS3 Request" "Not masked,Masked"
bitfld.long 0x04 10. "            GPIO_DIS2                         ,GPIO_DIS2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 9. " GPIO_DIS1                   ,GPIO_DIS1 Request" "Not masked,Masked"
bitfld.long 0x04 8. "            GPIO_DIS0                         ,GPIO_DIS0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 7. " GEN8_I2C_SDA                ,GEN8_I2C_SDA Request" "Not masked,Masked"
bitfld.long 0x04 6. "            GEN8_I2C_SCL                      ,GEN8_I2C_SCL Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 5. " UART7_TX                    ,UART7_TX Request" "Not masked,Masked"
bitfld.long 0x04 4. "            UART7_RX                          ,UART7_RX Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 1. " SAFE_STATE                  ,SAFE_STATE Request" "Not masked,Masked"
bitfld.long 0x04 0. "            GPIO_SW1                          ,GPIO_SW1 Request" "Not masked,Masked"
line.long 0x08 "SEL_DPD_TIM_0,SEL_DPD_TIM_0"
hexmask.long.byte 0x08 0.--6. 1. " SEL_DPD_TIM                 ,Timer which separates e_dpd deassertion time from sel_dpd deassertion time"
line.long 0x0C "VDDP_SEL_0,Power set for new DDR pads"
bitfld.long 0x0C 0.--1. " DATA                        ,VDDP sel bits to DDR pads xm0" "00,01,10,11"
line.long 0x10 "VDDP_SEL_MEM1_0,VDDP_SEL_MEM1_0"
bitfld.long 0x10 0.--1. " DATA                        ,VDDP sel bits to DDR pads xm1" "00,01,10,11"
line.long 0x14 "DDR_CFG_0,Package type for CAR/PMC control"
bitfld.long 0x14 30.--31. " BR11_DPD_IO_CMD             ,DPD_IO_CMD for brick-11" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 28.--29. "             BR10_DPD_IO_CMD                   ,DPD_IO_CMD for brick-10" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 26.--27. " BR9_DPD_IO_CMD              ,DPD_IO_CMD for brick-9" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 24.--25. "             BR8_DPD_IO_CMD                    ,DPD_IO_CMD for brick-8" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 22.--23. " BR7_DPD_IO_CMD              ,DPD_IO_CMD for brick-7" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 20.--21. "             BR6_DPD_IO_CMD                    ,DPD_IO_CMD for brick-6" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 18.--19. " BR5_DPD_IO_CMD              ,DPD_IO_CMD for brick-5" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 16.--17. "             BR4_DPD_IO_CMD                    ,DPD_IO_CMD for brick-4" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 14.--15. " BR3_DPD_IO_CMD              ,DPD_IO_CMD for brick-3" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 12.--13. "             BR2_DPD_IO_CMD                    ,DPD_IO_CMD for brick-2" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 10.--11. " BR1_DPD_IO_CMD              ,DPD_IO_CMD for brick-1" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 8.--9. "             BR0_DPD_IO_CMD                    ,DPD_IO_CMD for brick-0" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
line.long 0x18 "DDR_CFG_MEM1_0,DDR_CFG_MEM1_0"
bitfld.long 0x18 30.--31. " BR11_DPD_IO_CMD             ,DPD_IO_CMD for brick-11" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 28.--29. "             BR10_DPD_IO_CMD                   ,DPD_IO_CMD for brick-10" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 26.--27. " BR9_DPD_IO_CMD              ,DPD_IO_CMD for brick-9" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 24.--25. "             BR8_DPD_IO_CMD                    ,DPD_IO_CMD for brick-8" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 22.--23. " BR7_DPD_IO_CMD              ,DPD_IO_CMD for brick-7" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 20.--21. "             BR6_DPD_IO_CMD                    ,DPD_IO_CMD for brick-6" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 18.--19. " BR5_DPD_IO_CMD              ,DPD_IO_CMD for brick-5" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 16.--17. "             BR4_DPD_IO_CMD                    ,DPD_IO_CMD for brick-4" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 14.--15. " BR3_DPD_IO_CMD              ,DPD_IO_CMD for brick-3" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 12.--13. "             BR2_DPD_IO_CMD                    ,DPD_IO_CMD for brick-2" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 10.--11. " BR1_DPD_IO_CMD              ,DPD_IO_CMD for brick-1" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 8.--9. "             BR0_DPD_IO_CMD                    ,DPD_IO_CMD for brick-0" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
line.long 0x1C "DSI_SEL_DPD_0,SEL_DPD for DSI pad control"
bitfld.long 0x1C 3. " SET_DSID                    ,DSID set" "Off,On"
bitfld.long 0x1C 2. "                   SET_DSIC                          ,DSIC set" "Off,On"
textline "                                       "
bitfld.long 0x1C 1. " SET_DSIB                    ,DSIB set" "Off,On"
bitfld.long 0x1C 0. "                   SET_DSIA                          ,DSIA set" "Off,On"
line.long 0x20 "TSC_MULT_0,PMC_TSC_MULT_0"
bitfld.long 0x20 17.--19. " TICK_SEL                    ,Select one of the six binary time stamp counter bits" "BIT0,BIT1,BIT2,BIT3,BIT4,BIT5,?..."
rbitfld.long 0x20 16. "                  FREQ_STS                          ,Clock frequency being used for counter" "Fast,Slow"
textline "                                       "
hexmask.long.word 0x20 0.--15. 1. " MULT_VAL                    ,TSC multiply value"
line.long 0x24 "GLB_AMAP_CFG_0,GLB_AMAP_CFG"
bitfld.long 0x24 4. " PCIE_A4                     ,PCIE A4" "MMIO,DRAM"
bitfld.long 0x24 3. "                  PCIE_A3                           ,PCIE A3" "MMIO,DRAM"
textline "                                       "
bitfld.long 0x24 2. " PCIE_A2                     , PCIE A2" "MMIO,DRAM"
bitfld.long 0x24 1. "                  PCIE_A1                           , PCIE A1" "MMIO,DRAM"
line.long 0x28 "STICKY_BITS_0,STICKY_BITS_0"
bitfld.long 0x28 12. " CAMERA                      ,Drives the pmc2camera_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 11. "              VI_EF                             ,Drives the pmc2vi_csief_secure_enable signal" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 10. " VI_CD                       ,Drives the pmc2vi_csicd_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 9. "              VI_AB                             ,Drives the pmc2vi_csiab_secure_enable signal" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 8. " VI                          ,Drives the pmc2vi_channel_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 7. "              CDD_EN                            ,Customer Denver 2 DFD Enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 0. " HDA_LPBK_DIS                ,Sticky one bit to disable the loopback in HDA codec" "Disabled,Enabled"
line.long 0x2C "WEAK_BIAS_0,PMC WEAK BIAS_0 Controller"
bitfld.long 0x2C 31. " VTTLP_E_WB_COMP             ,Weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x2C 30. "              VTT_E_WB_DDLL                     ,weak bias enable for ddll pad" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 29. " VTT_E_WB_BR11               ,weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x2C 28. "              VTT_E_WB_BR10                     ,weak bias enable for brick10" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 27. " VTT_E_WB_BR9                ,weak bias enable for brick9" "Disabled,Enabled"
bitfld.long 0x2C 26. "              VTT_E_WB_BR8                      ,weak bias enable for brick8" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 25. " VTT_E_WB_BR7                ,weak bias enable for brick7" "Disabled,Enabled"
bitfld.long 0x2C 24. "              VTT_E_WB_BR6                      ,weak bias enable for brick6" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 23. " VTT_E_WB_BR5                ,weak bias enable for brick5" "Disabled,Enabled"
bitfld.long 0x2C 22. "              VTT_E_WB_BR4                      ,weak bias enable for brick4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 21. " VTT_E_WB_BR3                ,weak bias enable for brick3" "Disabled,Enabled"
bitfld.long 0x2C 20. "              VTT_E_WB_BR2                      ,weak bias enable for brick2" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 19. " VTT_E_WB_BR1                ,weak bias enable for brick1" "Disabled,Enabled"
bitfld.long 0x2C 18. "              VTT_E_WB_BR0                      ,weak bias enable for brick0" "Disabled,Enabled"
line.long 0x30 "WEAK_BIAS_MEM1_0,WEAK_BIAS_MEM1_0"
bitfld.long 0x30 31. " VTTLP_E_WB_COMP             ,Weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x30 30. "              VTTCDB_E_WB_DDLL                  ,Weak bias enable for ddll pad" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 29. " VTT_E_WB_BR11               ,weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x30 28. "              VTT_E_WB_BR10                     ,weak bias enable for brick10" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 27. " VTT_E_WB_BR9                ,weak bias enable for brick9" "Disabled,Enabled"
bitfld.long 0x30 26. "              VTT_E_WB_BR8                      ,weak bias enable for brick8" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 25. " VTT_E_WB_BR7                ,weak bias enable for brick7" "Disabled,Enabled"
bitfld.long 0x30 24. "              VTT_E_WB_BR6                      ,weak bias enable for brick6" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 23. " VTT_E_WB_BR5                ,weak bias enable for brick5" "Disabled,Enabled"
bitfld.long 0x30 22. "              VTT_E_WB_BR4                      ,weak bias enable for brick4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 21. " VTT_E_WB_BR3                ,weak bias enable for brick3" "Disabled,Enabled"
bitfld.long 0x30 20. "              VTT_E_WB_BR2                      ,weak bias enable for brick2" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 19. " VTT_E_WB_BR1                ,weak bias enable for brick1" "Disabled,Enabled"
bitfld.long 0x30 18. "              VTT_E_WB_BR0                      ,weak bias enable for brick0" "Disabled,Enabled"
line.long 0x34 "GPU_RG_CNTRL_0,GPU_RG_CNTRL_0"
bitfld.long 0x34 1. " PWRGOOD                     ,Enabling and removing GPU-PWRGOOD" "Disabled,Enabled"
bitfld.long 0x34 0. "              RAIL_CLAMP                        ,Enabling and removing GPU-SOC clamps" "Disabled,Enabled"
rgroup.long 0xEC++0x03
line.long 0x00 "GPU_SRAM_STATUS_0,GPU_SRAM_STATUS_0"
bitfld.long 0x00 1. " RG_SD_EXIT_DONE             ,RG_SD_EXIT_DONE" "Not done,Done"
bitfld.long 0x00 0. "              RG_SD_ENTRY_DONE                  ,RG_SD_ENTRY_DONE" "Not done,Done"
group.long 0xF0++0x1B
line.long 0x00 "SRAM_RAIL_CLAMP_0,SRAM_RAIL_CLAMP_0"
bitfld.long 0x00 0. " SRAM_RAIL_CLAMP             ,Enabling and removing SRAM RAIL clamps" "Disabled,Enabled"
line.long 0x04 "UFSHC_PWR_CNTRL_0,UFSHC_PWR_CNTRL_0"
bitfld.long 0x04 1. " LP_PWR_READY                ,Signal used to indicate to the AO logic of UFSHC that PSW domain is powered up" "Not ready,Ready"
bitfld.long 0x04 0. "             LP_ISOL_EN                        ,Clamp signal used to isolate the UFSHC AO logic inputs coming from PSW domain" "Disabled,Enabled"
line.long 0x08 "CNTRL2_0,CNTRL2_0"
bitfld.long 0x08 11. " SYSCLK_DATA                 ,SYS_CLK_REQ data value" "Disabled,Enabled"
bitfld.long 0x08 10. "              SYSCLK_ORRIDE                     ,SYS_CLK_REQ data override mux control" "HW,SYSCLK_DATA"
line.long 0x0C "EVENT_COUNTER_0,Event counter 0"
bitfld.long 0x0C 20. " EN                          ,COUNT enable/disable" "Off,On"
bitfld.long 0x0C 16.--19. "                   SEL                               ,Event Selections" "LP0 to LP0BB,LP0 to ACTIVE,LP0BB to ACTIVE,LP0BB to LP0,?..."
textline "                                       "
hexmask.long.word 0x0C 0.--15. 1. " COUNT                       ,Event counter"
line.long 0x10 "FUSE_CONTROL_0,Fuse Control 0 Register"
setclrfld.long 0x10 18. 0x10 16. 0x10 17. " KPS18_SET/CLR               ,KPS18" "LOW,HIGH"
setclrfld.long 0x10 10. 0x10 8. 0x10 9. "                  PS18_SET/CLR                      ,PS18" "LOW,HIGH"
textline "                                       "
bitfld.long 0x10 1. " DISABLE_REDIRECTION         ,Sticky disable redirection bit, reset at cold and warm reset" "Off,On"
bitfld.long 0x10 0. "                   ENABLE_REDIRECTION                ,Enable redirection bit - only reset at cold reset" "Off,On"
line.long 0x14 "DIRECT_THERMTRIP_CFG_0,THERMTRIP Configuration Register"
bitfld.long 0x14 5. " THERMTRIP_LOCK              ,Lock THERMTRIP_EN and AOTAG THERMTRIP threshold" "Disabled,Enabled"
bitfld.long 0x14 4. "              THERMTRIP_EN                      ,Assert PMC to SHUTDOWN sideband to PMIC on a thermal sensor reset event" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x14 0.--3. " SHDN_ASSERT_PULSE_WIDTH     ,Asserted SHUTDOWN pin remains for the programmed number of 32K clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "DEBUG_AUTHENTICATION_0,Debug Authentication Register"
bitfld.long 0x18 10. " SCE_SECURE_DEBUG            ,SCE_SECURE_DEBUG" "Off,On"
bitfld.long 0x18 9. "                   SPE_SECURE_DEBUG                  ,SPE_SECURE_DEBUG" "Off,On"
textline "                                       "
bitfld.long 0x18 8. " BPMP_SECURE_DEBUG           ,BPMP_SECURE_DEBUG" "Off,On"
bitfld.long 0x18 5. "                   DBGEN                             ,DBGEN" "Off,On"
textline "                                       "
bitfld.long 0x18 4. " NIDEN                       ,NIDEN" "Off,On"
bitfld.long 0x18 3. "                   SPIDEN                            ,SPIDEN" "Off,On"
textline "                                       "
bitfld.long 0x18 2. " SPNIDEN                     ,SPNIDEN" "Off,On"
bitfld.long 0x18 1. "                   DEVICEEN                          ,DEVICEEN" "Off,On"
textline "                                       "
bitfld.long 0x18 0. " JTAG_ENABLE                 ,JTAG_ENABLE" "Off,On"
if (((per.l(ad:0x0C360000+0x108))&0x8)==0x8)
group.long 0x10C++0x03
line.long 0x00 "RAMDUMP_CTL_STATUS_0,RAMDUMP_CTL_STATUS_0"
rbitfld.long 0x00 29.--31. " RAMDUMP_CSTATE              ,Current State of RAMDUMP FSM" "IDLE,CACHEFLUSH,DRAM_SELF_REFRESH,WAIT,WAIT_FOR_SW_ACK,DEBUG_RESET_ACK,ASSERT_CMD_HOLD_LOW,ASSERT_DPD"
bitfld.long 0x00 23. "   RAMDUMP_2ND_BOOT_COMPLETE         ,Software needs to set this bit before initiating DRAM dump to host PC" "Not set,Set"
textline "                                       "
bitfld.long 0x00 10. " RAMDUMP_STATUS_6            ,RAM-dump 6 Status" "Not set,Set"
bitfld.long 0x00 9. "               RAMDUMP_DEASSERT_DRAM_SEL_DPD_CMD ,Deassert sel_dpd_cmd triggered by software" "Not set,Set"
textline "                                       "
bitfld.long 0x00 8. " RAMDUMP_DEASSERT_DRAM_DPD   ,Deassert e-dpd and sel-dpd triggered by software" "Not set,Set"
rbitfld.long 0x00 7. "               DRAM_SELF_REFRESH_REQUEST_TIMEOUT ,DRAM could not be put in self refresh" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 6. " DRAM_IN_SELF_REFRESH        ,MC was able to successfully put DRAM into Self Refresh" "Not occurred,Occurred"
rbitfld.long 0x00 5. "          CCPLEX_CACHEFLUSH_REQUEST_TIMEOUT ,CCPLEX cache flush failed" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 4. " CCPLEX_CACHEFLUSH_DONE      ,CCPLEX cache flush successful" "In progress,Completed"
rbitfld.long 0x00 3. "           WDT_DFD_RST_ACK                   ,WDT_DFD_RST_ACK" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 2. " WDT_DFD_RST_REQ             ,WDT_DFD_RST_REQ" "Not occurred,Occurred"
textline "                                       "
bitfld.long 0x00 0. " RAMDUMP_EN                  ,RAM-dump enable" "Disabled,Enabled"
else
group.long 0x10C++0x03
line.long 0x00 "RAMDUMP_CTL_STATUS_0,RAMDUMP_CTL_STATUS_0"
rbitfld.long 0x00 29.--31. " RAMDUMP_CSTATE              ,Current State of RAMDUMP FSM" "IDLE,CACHEFLUSH,DRAM_SELF_REFRESH,WAIT,WAIT_FOR_SW_ACK,DEBUG_RESET_ACK,ASSERT_CMD_HOLD_LOW,ASSERT_DPD"
bitfld.long 0x00 23. "   RAMDUMP_2ND_BOOT_COMPLETE         ,Software needs to set this bit before initiating DRAM dump to host PC" "Not set,Set"
textline "                                       "
bitfld.long 0x00 10. " RAMDUMP_STATUS_6            ,RAM-dump 6 Status" "Not set,Set"
bitfld.long 0x00 9. "               RAMDUMP_DEASSERT_DRAM_SEL_DPD_CMD ,Deassert sel_dpd_cmd triggered by software" "Not set,Set"
textline "                                       "
bitfld.long 0x00 8. " RAMDUMP_DEASSERT_DRAM_DPD   ,Deassert e-dpd and sel-dpd triggered by software" "Not set,Set"
rbitfld.long 0x00 7. "               DRAM_SELF_REFRESH_REQUEST_TIMEOUT ,DRAM could not be put in self refresh" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 6. " DRAM_IN_SELF_REFRESH        ,MC was able to successfully put DRAM into Self Refresh" "Not occurred,Occurred"
rbitfld.long 0x00 5. "          CCPLEX_CACHEFLUSH_REQUEST_TIMEOUT ,CCPLEX cache flush failed" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 4. " CCPLEX_CACHEFLUSH_DONE      ,CCPLEX cache flush successful" "In progress,Completed"
rbitfld.long 0x00 3. "           WDT_DFD_RST_ACK                   ,WDT_DFD_RST_ACK" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 2. " WDT_DFD_RST_REQ             ,WDT_DFD_RST_REQ" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 0. " RAMDUMP_EN                  ,RAM-dump enable" "Disabled,Enabled"
endif
group.long 0x110++0x13
line.long 0x00 "RAMDUMP_TIMEOUT_0,RAMDUMP_TIMEOUT_0"
line.long 0x04 "RST_REQ_CONFIG_0,RST_REQ_CONFIG_0"
bitfld.long 0x04 8. " RESET_OUT_POLARITY          ,Determine polarity of RESET_OUT_OB output from PMC" "ACTLO,?..."
rbitfld.long 0x04 5. "                 L2AOWDTRST_PMIC_SEQ_EN            ,Enables Sideband WDT_RESET_OUT for AOWDT DBG cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 4. " L2RST_PMIC_SEQ_EN           ,Enables Sideband WDT_RESET_OUT for WDT DBG cases" "Disabled,Enabled"
rbitfld.long 0x04 3. "              L1CRST_PMIC_SEQ_EN                ,Enables Sideband WDT_RESET_OUT for software reset cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 2. " L1BHSMRST_PMIC_SEQ_EN       ,Enables Sideband WDT_RESET_OUT for HSM reset cases" "Disabled,Enabled"
rbitfld.long 0x04 1. "              L1BAOWDTRST_PMIC_SEQ_EN           ,Enables Sideband WDT_RESET_OUT for AOWDT use cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 0. " L1BWDTRST_PMIC_SEQ_EN       ,Enables Sideband WDT_RESET_OUT for WDT use cases" "Disabled,Enabled"
line.long 0x08 "RST_REQ_CNTVAL_0,RST_REQ_CNTVAL_0"
hexmask.long.byte 0x08 24.--31. 1. " L2RST                       ,Number of pmc_clk (32K) cycles before L2 reset deassertion"
hexmask.long.byte 0x08 16.--23. 1. "                    L1CRST                            ,Number of pmc_clk (32K) cycles before L1c reset deassertion"
textline "                                       "
hexmask.long.byte 0x08 8.--15. 1. " L1BRST                      ,Number of pmc_clk (32K) cycles before L1b reset deassertion"
hexmask.long.byte 0x08 0.--7. 1. "                    L1ARST                            ,Number of pmc_clk (32K) cycles before L1a reset deassertion"
line.long 0x0C "DDR_CNTRL_0,DDR Control Register"
bitfld.long 0x0C 21. " VTTCDB_VDDA_E_REG           ,VTTCDB_VDDA_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 20. "              VTTLP_VDDA_E_REG                  ,VTTLP_VDDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 19. " DDR_RESET_DPD_IO            ,DPD_IO for Reset Pad - xm0" "No reset,Reset"
bitfld.long 0x0C 18. "              CMD_HOLD_LOW_BR11                 ,Cmd_hold_low for DDR brick11" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 17. " CMD_HOLD_LOW_BR10           ,Cmd_hold_low for DDR brick10" "Disabled,Enabled"
bitfld.long 0x0C 16. "              CMD_HOLD_LOW_BR9                  ,Cmd_hold_low for DDR brick9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 15. " CMD_HOLD_LOW_BR8            ,Cmd_hold_low for DDR brick8" "Disabled,Enabled"
bitfld.long 0x0C 14. "              CMD_HOLD_LOW_BR7                  ,Cmd_hold_low for DDR brick7" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 13. " CMD_HOLD_LOW_BR6            ,Cmd_hold_low for DDR brick6" "Disabled,Enabled"
bitfld.long 0x0C 12. "              CMD_HOLD_LOW_BR5                  ,Cmd_hold_low for DDR brick5" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 11. " CMD_HOLD_LOW_BR4            ,Cmd_hold_low for DDR brick4" "Disabled,Enabled"
bitfld.long 0x0C 10. "              CMD_HOLD_LOW_BR3                  ,Cmd_hold_low for DDR brick3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 9. " CMD_HOLD_LOW_BR2            ,Cmd_hold_low for DDR brick2" "Disabled,Enabled"
bitfld.long 0x0C 8. "              CMD_HOLD_LOW_BR1                  ,Cmd_hold_low for DDR brick1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 7. " CMD_HOLD_LOW_BR0            ,Cmd_hold_low for DDR brick0" "Disabled,Enabled"
bitfld.long 0x0C 5.--6. "              CMD_SEL_MODE                      ,CMD_SEL_MODE" "0,1,2,3"
textline "                                       "
bitfld.long 0x0C 4. " VTT_VCLAMP_E_REG            ,VTT_VCLAMP_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 3. "              VTT_VDA_E_REG                     ,VTT_VDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 2. " VTT_VAUXP_E_REG             ,VTT_VAUXP_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 0.--1. "              DDR_DPD_IO                        ,Common DPD I/O for DDR pads, not needed, potential can tristate" "0,1,2,3"
line.long 0x10 "DDR_CNTRL_MEM1_0,DDR_CNTRL_MEM1_0"
bitfld.long 0x10 21. " VTTCDB_VDDA_E_REG           ,VTTCDB_VDDA_E_REG" "Disabled,Enabled"
bitfld.long 0x10 20. "              VTTLP_VDDA_E_REG                  ,VTTLP_VDDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 19. " DDR_RESET_DPD_IO            ,DPD_IO for Reset Pad - xm1" "No reset,Reset"
bitfld.long 0x10 18. "              CMD_HOLD_LOW_BR11                 ,Cmd_hold_low for DDR brick11" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 17. " CMD_HOLD_LOW_BR10           ,Cmd_hold_low for DDR brick10" "Disabled,Enabled"
bitfld.long 0x10 16. "              CMD_HOLD_LOW_BR9                  ,Cmd_hold_low for DDR brick9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 15. " CMD_HOLD_LOW_BR8            ,Cmd_hold_low for DDR brick8" "Disabled,Enabled"
bitfld.long 0x10 14. "              CMD_HOLD_LOW_BR7                  ,Cmd_hold_low for DDR brick7" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 13. " CMD_HOLD_LOW_BR6            ,Cmd_hold_low for DDR brick6" "Disabled,Enabled"
bitfld.long 0x10 12. "              CMD_HOLD_LOW_BR5                  ,Cmd_hold_low for DDR brick5" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 11. " CMD_HOLD_LOW_BR4            ,Cmd_hold_low for DDR brick4" "Disabled,Enabled"
bitfld.long 0x10 10. "              CMD_HOLD_LOW_BR3                  ,Cmd_hold_low for DDR brick3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 9. " CMD_HOLD_LOW_BR2            ,Cmd_hold_low for DDR brick2" "Disabled,Enabled"
bitfld.long 0x10 8. "              CMD_HOLD_LOW_BR1                  ,Cmd_hold_low for DDR brick1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 7. " CMD_HOLD_LOW_BR0            ,Cmd_hold_low for DDR brick0" "Disabled,Enabled"
bitfld.long 0x10 5.--6. "              CMD_SEL_MODE                      ,CMD_SEL_MODE" "0,1,2,3"
textline "                                       "
bitfld.long 0x10 4. " VTT_VCLAMP_E_REG            ,VTT_VCLAMP_E_REG" "Disabled,Enabled"
bitfld.long 0x10 3. "              VTT_VDA_E_REG                     ,VTT_VDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 2. " VTT_VAUXP_E_REG             ,VTT_VAUXP_E_REG" "Disabled,Enabled"
bitfld.long 0x10 0.--1. "              DDR_DPD_IO                        ,Common DPD I/O for DDR pads, not needed, potential can tristate" "0,1,2,3"
group.long 0x1D4++0x2F
line.long 0x00 "VFMON_ACTION_0,VFMON_ACTION_0"
bitfld.long 0x00 12.--13. " VRAIL_4_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 10.--11. "                  VRAIL_3_FAULT_ACTION              ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 8.--9. " VRAIL_2_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 6.--7. "                  VRAIL_1_FAULT_ACTION              ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 4.--5. " VRAIL_0_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 2.--3. "                  F32K_FAULT_ACTION                 ,Action triggered by FV Monitor due to 32K Clock Variation" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 0.--1. " FOSC_FAULT_ACTION           ,Action triggered by FV Monitor due to OSC Clock Variation" "None,INTR,RST,?..."
line.long 0x04 "VFMON_INT_STATUS_0,VFMON_INT_STATUS_0"
eventfld.long 0x04 6. " VRAIL_4_FAULT               ,VRAIL_4_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 5. "          VRAIL_3_FAULT                     ,VRAIL_3_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 4. " VRAIL_2_FAULT               ,VRAIL_2_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 3. "          VRAIL_1_FAULT                     ,VRAIL_1_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 2. " VRAIL_0_FAULT               ,VRAIL_0_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 1. "          F32K_FAULT                        ,F32K_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 0. " FOSC_FAULT                  ,FOSC_FAULT" "No interrupt,Interrupt"
line.long 0x08 "VFMON_INT_MASK_0,VFMON_INT_MASK_0"
bitfld.long 0x08 6. " VRAIL_4_FAULT               ,Whether VRAIL_4_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 5. "            VRAIL_3_FAULT                     ,Whether VRAIL_3_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 4. " VRAIL_2_FAULT               ,Whether VRAIL_2_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 3. "            VRAIL_1_FAULT                     ,Whether VRAIL_1_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 2. " VRAIL_0_FAULT               ,Whether VRAIL_0_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 1. "            F32K_FAULT                        ,Whether F32K_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 0. " FOSC_FAULT                  ,Whether FOSC_FAULT causes an interrupt or not" "Not masked,Masked"
line.long 0x0C "VFMON_CONFIG_0,VFMON_CONFIG_0"
bitfld.long 0x0C 24.--29. " CLOCK_MON_TMAX              ,Maximum Threshold of RO clock cycles within divided OSC clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 18.--23. "                    CLOCK_MON_TMIN                    ,Minimum Threshold of RO clock cycles within divided OSC clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                       "
bitfld.long 0x0C 14.--17. " OSC_CLK_DIV                 ,OSC clock divider value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x0C 4.--13. 1. "                    COMP_PERIOD_COUNT                 ,Periodicity of clock monitoring, when Periodic Monitoring is enabled"
textline "                                       "
bitfld.long 0x0C 2. " CLOCK_MONITOR_MODE          ,CLOCK_MONITOR mode" "CONT,PERIODIC"
bitfld.long 0x0C 1. "              CLK32_MONITOR_EN                  ,Whether 32 KHz clock monitoring is enabled or disabled" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 0. " CLOCK_MONITOR_EN            ,Whether clock monitoring is enabled or disabled" "Disabled,Enabled"
line.long 0x10 "VFMON_OSC_TIMING_0,VFMON_OSC_TIMING_0"
hexmask.long.byte 0x10 16.--23. 1. " TEN_COUNT                   ,Delay from asserting EN to the point of using the OSC cell output"
hexmask.long.word 0x10 0.--8. 1. "                    TIDDQ_EN                          ,Delay from exiting IDDQ to enabling the OSC cell, specified in terms of XTAL cycles"
line.long 0x14 "VFMON_CLK32_THRESHOLD_0,VFMON_CLK32_THRESHOLD_0"
hexmask.long.word 0x14 16.--26. 1. " CLK32_MON_TMAX              ,Maximum XTAL clock cycles expected to be contained in one 32 KHz clock period"
hexmask.long.word 0x14 0.--10. 1. "                  CLK32_MON_TMIN                    ,Minimum XTAL clock cycles expected to be contained in one 32 KHz clock period"
line.long 0x18 "POWER_GATE_TIMERS_0,POWER_GATE_TIMERS_0"
hexmask.long.byte 0x18 8.--15. 1. " TFORCE2ZONE                 ,TFORCE2ZONE"
hexmask.long.byte 0x18 0.--7. 1. "                    TZONE2FORCE                       ,TZONE2FORCE"
line.long 0x1C "LOGIC_ZONE_DELAY_0,LOGIC_ZONE_DELAY_0"
bitfld.long 0x1C 28.--31. " LZONE_TIMER7                ,LZONE_TIMER7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 24.--27. "                    LZONE_TIMER6                      ,LZONE_TIMER6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 20.--23. " LZONE_TIMER5                ,LZONE_TIMER5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 16.--19. "                    LZONE_TIMER4                      ,LZONE_TIMER4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 12.--15. " LZONE_TIMER3                ,LZONE_TIMER3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 8.--11. "                    LZONE_TIMER2                      ,LZONE_TIMER2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 4.--7. " LZONE_TIMER1                ,LZONE_TIMER1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 0.--3. "                    LZONE_TIMER0                      ,LZONE_TIMER0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "SRAM_ZONE_DELAY_0,SRAM_ZONE_DELAY_0"
bitfld.long 0x20 28.--31. " SZONE_TIMER7                ,SZONE_TIMER7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 24.--27. "                    SZONE_TIMER6                      ,SZONE_TIMER6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 20.--23. " SZONE_TIMER5                ,SZONE_TIMER5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 16.--19. "                    SZONE_TIMER4                      ,SZONE_TIMER4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 12.--15. " SZONE_TIMER3                ,SZONE_TIMER3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 8.--11. "                    SZONE_TIMER2                      ,SZONE_TIMER2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 4.--7. " SZONE_TIMER1                ,SZONE_TIMER1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 0.--3. "                    SZONE_TIMER0                      ,SZONE_TIMER0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x24 "ZONE_CONFIG_0,ZONE_CONFIG_0"
bitfld.long 0x24 3. " SRAM_DSLP_ZONE_EN           ,SRAM_DSLP_ZONE_EN" "Disabled,Enabled"
bitfld.long 0x24 2. "              SRAM_SLP_ZONE_EN                  ,SRAM_SLP_ZONE_EN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 1. " SRAM_SD_ZONE_EN             ,SRAM_SD_ZONE_EN" "Disabled,Enabled"
bitfld.long 0x24 0. "              LOGIC_SLEEP_ZONE_EN               ,LOGIC_SLEEP_ZONE_EN" "Disabled,Enabled"
line.long 0x28 "INTER_PARTITION_PG_DELAY_0,INTER_PARTITION_PG_DELAY_0"
hexmask.long.byte 0x28 0.--7. 1. " INTER_PART_DELAY            ,INTER_PART_DELAY"
line.long 0x2C "AO_PG_TIMERS_0,AO_PG_TIMERS_0"
hexmask.long.byte 0x2C 8.--15. 1. " SLEEP2CLAMP_DELAY           ,SLEEP2CLAMP_DELAY"
hexmask.long.byte 0x2C 0.--7. 1. "                    CLAMP2SLEEP_DELAY                 ,CLAMP2SLEEP_DELAY"
rgroup.long 0x204++0x03
line.long 0x00 "PG_STATUS_0,PG_STATUS_0"
bitfld.long 0x00 3. " PENDING_SC7_REMOVE_SD_START ,Indicates that SC7 RAM SD deassertion in progress" "Done,Pending"
bitfld.long 0x00 2. "               PENDING_SC7_ASSERT_SD_START       ,Indicates that SC7 RAM SD assertion in progress" "Done,Pending"
textline "                                       "
bitfld.long 0x00 1. " PENDING_RESET_SD_START      ,Indicates that reset deassertion of all RAM SDs in progress - will be high at Power on Reset" "Done,Pending"
bitfld.long 0x00 0. "               PENDING_START                     ,Indicates whether there is any pending start bit for any of the partitions - for the PG FSM (for software requests only)" "Done,Pending"
textline "                                                  "
width 41.
group.long 0x208++0x03
line.long 0x00 "PART_AUD_POWER_GATE_CONTROL_0,PART_AUD_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x208+0x04)++0x03
line.long 0x00 "PART_AUD_POWER_GATE_STATUS_0,PART_AUD_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x208+0x08)++0x03
line.long 0x00 "PART_AUD_CLAMP_CONTROL_0,PART_AUD_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x214++0x03
line.long 0x00 "PART_DFD_POWER_GATE_CONTROL_0,PART_DFD_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x214+0x04)++0x03
line.long 0x00 "PART_DFD_POWER_GATE_STATUS_0,PART_DFD_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x214+0x08)++0x03
line.long 0x00 "PART_DFD_CLAMP_CONTROL_0,PART_DFD_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x220++0x03
line.long 0x00 "PART_DISP_POWER_GATE_CONTROL_0,PART_DISP_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x220+0x04)++0x03
line.long 0x00 "PART_DISP_POWER_GATE_STATUS_0,PART_DISP_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x220+0x08)++0x03
line.long 0x00 "PART_DISP_CLAMP_CONTROL_0,PART_DISP_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x22C++0x03
line.long 0x00 "PART_DISPB_POWER_GATE_CONTROL_0,PART_DISPB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x22C+0x04)++0x03
line.long 0x00 "PART_DISPB_POWER_GATE_STATUS_0,PART_DISPB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x22C+0x08)++0x03
line.long 0x00 "PART_DISPB_CLAMP_CONTROL_0,PART_DISPB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x238++0x03
line.long 0x00 "PART_DISPC_POWER_GATE_CONTROL_0,PART_DISPC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x238+0x04)++0x03
line.long 0x00 "PART_DISPC_POWER_GATE_STATUS_0,PART_DISPC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x238+0x08)++0x03
line.long 0x00 "PART_DISPC_CLAMP_CONTROL_0,PART_DISPC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x244++0x03
line.long 0x00 "PART_ISPA_POWER_GATE_CONTROL_0,PART_ISPA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x244+0x04)++0x03
line.long 0x00 "PART_ISPA_POWER_GATE_STATUS_0,PART_ISPA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x244+0x08)++0x03
line.long 0x00 "PART_ISPA_CLAMP_CONTROL_0,PART_ISPA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x250++0x03
line.long 0x00 "PART_NVDEC_POWER_GATE_CONTROL_0,PART_NVDEC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x250+0x04)++0x03
line.long 0x00 "PART_NVDEC_POWER_GATE_STATUS_0,PART_NVDEC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x250+0x08)++0x03
line.long 0x00 "PART_NVDEC_CLAMP_CONTROL_0,PART_NVDEC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x25C++0x03
line.long 0x00 "PART_NVJPG_POWER_GATE_CONTROL_0,PART_NVJPG_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x25C+0x04)++0x03
line.long 0x00 "PART_NVJPG_POWER_GATE_STATUS_0,PART_NVJPG_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x25C+0x08)++0x03
line.long 0x00 "PART_NVJPG_CLAMP_CONTROL_0,PART_NVJPG_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x268++0x03
line.long 0x00 "PART_MPE_POWER_GATE_CONTROL_0,PART_MPE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x268+0x04)++0x03
line.long 0x00 "PART_MPE_POWER_GATE_STATUS_0,PART_MPE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x268+0x08)++0x03
line.long 0x00 "PART_MPE_CLAMP_CONTROL_0,PART_MPE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x274++0x03
line.long 0x00 "PART_PCX_POWER_GATE_CONTROL_0,PART_PCX_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x274+0x04)++0x03
line.long 0x00 "PART_PCX_POWER_GATE_STATUS_0,PART_PCX_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x274+0x08)++0x03
line.long 0x00 "PART_PCX_CLAMP_CONTROL_0,PART_PCX_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x280++0x03
line.long 0x00 "PART_SAX_POWER_GATE_CONTROL_0,PART_SAX_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x280+0x04)++0x03
line.long 0x00 "PART_SAX_POWER_GATE_STATUS_0,PART_SAX_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x280+0x08)++0x03
line.long 0x00 "PART_SAX_CLAMP_CONTROL_0,PART_SAX_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x28C++0x03
line.long 0x00 "PART_VE_POWER_GATE_CONTROL_0,PART_VE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x28C+0x04)++0x03
line.long 0x00 "PART_VE_POWER_GATE_STATUS_0,PART_VE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x28C+0x08)++0x03
line.long 0x00 "PART_VE_CLAMP_CONTROL_0,PART_VE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x298++0x03
line.long 0x00 "PART_VIC_POWER_GATE_CONTROL_0,PART_VIC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x298+0x04)++0x03
line.long 0x00 "PART_VIC_POWER_GATE_STATUS_0,PART_VIC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x298+0x08)++0x03
line.long 0x00 "PART_VIC_CLAMP_CONTROL_0,PART_VIC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "PART_XUSBA_POWER_GATE_CONTROL_0,PART_XUSBA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2A4+0x04)++0x03
line.long 0x00 "PART_XUSBA_POWER_GATE_STATUS_0,PART_XUSBA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2A4+0x08)++0x03
line.long 0x00 "PART_XUSBA_CLAMP_CONTROL_0,PART_XUSBA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2B0++0x03
line.long 0x00 "PART_XUSBB_POWER_GATE_CONTROL_0,PART_XUSBB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2B0+0x04)++0x03
line.long 0x00 "PART_XUSBB_POWER_GATE_STATUS_0,PART_XUSBB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2B0+0x08)++0x03
line.long 0x00 "PART_XUSBB_CLAMP_CONTROL_0,PART_XUSBB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "PART_XUSBC_POWER_GATE_CONTROL_0,PART_XUSBC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2BC+0x04)++0x03
line.long 0x00 "PART_XUSBC_POWER_GATE_STATUS_0,PART_XUSBC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2BC+0x08)++0x03
line.long 0x00 "PART_XUSBC_CLAMP_CONTROL_0,PART_XUSBC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2C8++0x03
line.long 0x00 "PART_SCRATCH_POWER_GATE_CONTROL_0,PART_SCRATCH_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2C8+0x04)++0x03
line.long 0x00 "PART_SCRATCH_POWER_GATE_STATUS_0,PART_SCRATCH_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2C8+0x08)++0x03
line.long 0x00 "PART_SCRATCH_CLAMP_CONTROL_0,PART_SCRATCH_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2D4++0x03
line.long 0x00 "PART_AONPG_POWER_GATE_CONTROL_0,PART_AONPG_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2D4+0x04)++0x03
line.long 0x00 "PART_AONPG_POWER_GATE_STATUS_0,PART_AONPG_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2D4+0x08)++0x03
line.long 0x00 "PART_AONPG_CLAMP_CONTROL_0,PART_AONPG_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2E0++0x03
line.long 0x00 "PART_CAR_POWER_GATE_CONTROL_0,PART_CAR_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2E0+0x04)++0x03
line.long 0x00 "PART_CAR_POWER_GATE_STATUS_0,PART_CAR_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2E0+0x08)++0x03
line.long 0x00 "PART_CAR_CLAMP_CONTROL_0,PART_CAR_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2EC++0x03
line.long 0x00 "PART_EMCA_POWER_GATE_CONTROL_0,PART_EMCA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2EC+0x04)++0x03
line.long 0x00 "PART_EMCA_POWER_GATE_STATUS_0,PART_EMCA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2EC+0x08)++0x03
line.long 0x00 "PART_EMCA_CLAMP_CONTROL_0,PART_EMCA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2F8++0x03
line.long 0x00 "PART_EMCB_POWER_GATE_CONTROL_0,PART_EMCB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2F8+0x04)++0x03
line.long 0x00 "PART_EMCB_POWER_GATE_STATUS_0,PART_EMCB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2F8+0x08)++0x03
line.long 0x00 "PART_EMCB_CLAMP_CONTROL_0,PART_EMCB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x304++0x03
line.long 0x00 "PART_HOST_POWER_GATE_CONTROL_0,PART_HOST_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x304+0x04)++0x03
line.long 0x00 "PART_HOST_POWER_GATE_STATUS_0,PART_HOST_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x304+0x08)++0x03
line.long 0x00 "PART_HOST_CLAMP_CONTROL_0,PART_HOST_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x310++0x03
line.long 0x00 "PART_MCA_POWER_GATE_CONTROL_0,PART_MCA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x310+0x04)++0x03
line.long 0x00 "PART_MCA_POWER_GATE_STATUS_0,PART_MCA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x310+0x08)++0x03
line.long 0x00 "PART_MCA_CLAMP_CONTROL_0,PART_MCA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x31C++0x03
line.long 0x00 "PART_MCB_POWER_GATE_CONTROL_0,PART_MCB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x31C+0x04)++0x03
line.long 0x00 "PART_MCB_POWER_GATE_STATUS_0,PART_MCB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x31C+0x08)++0x03
line.long 0x00 "PART_MCB_CLAMP_CONTROL_0,PART_MCB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x328++0x03
line.long 0x00 "PART_MCHA_POWER_GATE_CONTROL_0,PART_MCHA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x328+0x04)++0x03
line.long 0x00 "PART_MCHA_POWER_GATE_STATUS_0,PART_MCHA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x328+0x08)++0x03
line.long 0x00 "PART_MCHA_CLAMP_CONTROL_0,PART_MCHA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x334++0x03
line.long 0x00 "PART_MCHB_POWER_GATE_CONTROL_0,PART_MCHB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x334+0x04)++0x03
line.long 0x00 "PART_MCHB_POWER_GATE_STATUS_0,PART_MCHB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x334+0x08)++0x03
line.long 0x00 "PART_MCHB_CLAMP_CONTROL_0,PART_MCHB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x340++0x03
line.long 0x00 "PART_MCHBB_POWER_GATE_CONTROL_0,PART_MCHBB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x340+0x04)++0x03
line.long 0x00 "PART_MCHBB_POWER_GATE_STATUS_0,PART_MCHBB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x340+0x08)++0x03
line.long 0x00 "PART_MCHBB_CLAMP_CONTROL_0,PART_MCHBB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x34C++0x03
line.long 0x00 "PART_NIC_POWER_GATE_CONTROL_0,PART_NIC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x34C+0x04)++0x03
line.long 0x00 "PART_NIC_POWER_GATE_STATUS_0,PART_NIC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x34C+0x08)++0x03
line.long 0x00 "PART_NIC_CLAMP_CONTROL_0,PART_NIC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x358++0x03
line.long 0x00 "PART_SEC_POWER_GATE_CONTROL_0,PART_SEC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x358+0x04)++0x03
line.long 0x00 "PART_SEC_POWER_GATE_STATUS_0,PART_SEC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x358+0x08)++0x03
line.long 0x00 "PART_SEC_CLAMP_CONTROL_0,PART_SEC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x364++0x03
line.long 0x00 "PART_UFS_POWER_GATE_CONTROL_0,PART_UFS_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x364+0x04)++0x03
line.long 0x00 "PART_UFS_POWER_GATE_STATUS_0,PART_UFS_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x364+0x08)++0x03
line.long 0x00 "PART_UFS_CLAMP_CONTROL_0,PART_UFS_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x370++0x03
line.long 0x00 "PART_BPMP_POWER_GATE_CONTROL_0,PART_BPMP_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x370+0x04)++0x03
line.long 0x00 "PART_BPMP_POWER_GATE_STATUS_0,PART_BPMP_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x370+0x08)++0x03
line.long 0x00 "PART_BPMP_CLAMP_CONTROL_0,PART_BPMP_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x37C++0x03
line.long 0x00 "PART_SCE_POWER_GATE_CONTROL_0,PART_SCE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x37C+0x04)++0x03
line.long 0x00 "PART_SCE_POWER_GATE_STATUS_0,PART_SCE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x37C+0x08)++0x03
line.long 0x00 "PART_SCE_CLAMP_CONTROL_0,PART_SCE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x388++0x03
line.long 0x00 "PART_AOPG_TCM0_POWER_GATE_CONTROL_0,PART_AOPG_TCM0_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x388+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM0_POWER_GATE_STATUS_0,PART_AOPG_TCM0_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x388+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM0_CLAMP_CONTROL_0,PART_AOPG_TCM0_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x394++0x03
line.long 0x00 "PART_AOPG_TCM1_POWER_GATE_CONTROL_0,PART_AOPG_TCM1_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x394+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM1_POWER_GATE_STATUS_0,PART_AOPG_TCM1_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x394+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM1_CLAMP_CONTROL_0,PART_AOPG_TCM1_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3A0++0x03
line.long 0x00 "PART_AOPG_TCM2_POWER_GATE_CONTROL_0,PART_AOPG_TCM2_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3A0+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM2_POWER_GATE_STATUS_0,PART_AOPG_TCM2_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3A0+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM2_CLAMP_CONTROL_0,PART_AOPG_TCM2_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3AC++0x03
line.long 0x00 "PART_AOPG_TCM3_POWER_GATE_CONTROL_0,PART_AOPG_TCM3_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3AC+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM3_POWER_GATE_STATUS_0,PART_AOPG_TCM3_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3AC+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM3_CLAMP_CONTROL_0,PART_AOPG_TCM3_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3B8++0x03
line.long 0x00 "PART_AOPG_TCM4_POWER_GATE_CONTROL_0,PART_AOPG_TCM4_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3B8+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM4_POWER_GATE_STATUS_0,PART_AOPG_TCM4_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3B8+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM4_CLAMP_CONTROL_0,PART_AOPG_TCM4_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3C4++0x03
line.long 0x00 "PART_AOPG_TCM5_POWER_GATE_CONTROL_0,PART_AOPG_TCM5_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3C4+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM5_POWER_GATE_STATUS_0,PART_AOPG_TCM5_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3C4+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM5_CLAMP_CONTROL_0,PART_AOPG_TCM5_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3D0++0x03
line.long 0x00 "PART_AOPG_TCM6_POWER_GATE_CONTROL_0,PART_AOPG_TCM6_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3D0+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM6_POWER_GATE_STATUS_0,PART_AOPG_TCM6_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3D0+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM6_CLAMP_CONTROL_0,PART_AOPG_TCM6_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3DC++0x03
line.long 0x00 "PART_AOPG_TCM7_POWER_GATE_CONTROL_0,PART_AOPG_TCM7_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3DC+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM7_POWER_GATE_STATUS_0,PART_AOPG_TCM7_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3DC+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM7_CLAMP_CONTROL_0,PART_AOPG_TCM7_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3E8++0x03
line.long 0x00 "PART_AOPG_CACHE_POWER_GATE_CONTROL_0,PART_AOPG_CACHE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3E8+0x04)++0x03
line.long 0x00 "PART_AOPG_CACHE_POWER_GATE_STATUS_0,PART_AOPG_CACHE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3E8+0x08)++0x03
line.long 0x00 "PART_AOPG_CACHE_CLAMP_CONTROL_0,PART_AOPG_CACHE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3F4++0x03
line.long 0x00 "PART_AOPG_CAN0_POWER_GATE_CONTROL_0,PART_AOPG_CAN0_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3F4+0x04)++0x03
line.long 0x00 "PART_AOPG_CAN0_POWER_GATE_STATUS_0,PART_AOPG_CAN0_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3F4+0x08)++0x03
line.long 0x00 "PART_AOPG_CAN0_CLAMP_CONTROL_0,PART_AOPG_CAN0_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x400++0x03
line.long 0x00 "PART_AOPG_CAN1_POWER_GATE_CONTROL_0,PART_AOPG_CAN1_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x400+0x04)++0x03
line.long 0x00 "PART_AOPG_CAN1_POWER_GATE_STATUS_0,PART_AOPG_CAN1_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x400+0x08)++0x03
line.long 0x00 "PART_AOPG_CAN1_CLAMP_CONTROL_0,PART_AOPG_CAN1_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
textline "                                       "
width 30.
group.long 0x40C++0x0B
line.long 0x00 "PMC2LIC_INTR_STATUS_0,PMC2LIC_INTR_STATUS_0"
eventfld.long 0x00 1. " ILLEGAL_SRAM_LOGIC_POWER_STATE ,ILLEGAL_SRAM_LOGIC_POWER_STATE" "Not illegal,Illegal"
eventfld.long 0x00 0. "                   UNSUPPORTED_PG_REQUEST ,UNSUPPORTED_PG_REQUEST" "Not requested,Requested"
line.long 0x04 "PMC2LIC_INTR_ENABLE_0,PMC2LIC_INTR_ENABLE_0"
bitfld.long 0x04 1. " ILLEGAL_SRAM_LOGIC_POWER_STATE ,ENABLE bit for this interrupt source" "Disabled,Enabled"
bitfld.long 0x04 0. "                      UNSUPPORTED_PG_REQUEST ,ENABLE bit for this interrupt source" "Disabled,Enabled"
line.long 0x08 "AOVC_LOCK_CNTRL_0,AOVC_LOCK_CNTRL_0"
bitfld.long 0x08 6. " SW_LOCK_REQ                    ,Software can write to this register to request the LOCK_ID to be updated to SW_LOCK_REQ_ID" "Not requested,Requested"
bitfld.long 0x08 4.--5. "                 SW_LOCK_REQ_ID         ,Software can write to this register to request the LOCK_ID to be assigned to a particular master or free it up to NONE and then write to SW_LOCK_REQ" "Free,AOVC,APB_PWR_I2C,Illegal"
textline "                                       "
bitfld.long 0x08 0. " RELEASE                        ,RELEASE" "Not released,Released"
rgroup.long 0x418++0x03
line.long 0x00 "AOVC_LOCK_ID_STATUS_0,AOVC_LOCK_ID_STATUS_0"
bitfld.long 0x00 0.--1. " DATA                           ,DATA" "Free/None,AOVC(TXNGEN),APB_PWR_I2C(CVC or software),Illegal"
group.long 0x41C++0x03
line.long 0x00 "TEST_CLK_MUX_SEL_0,TEST_CLK_MUX_SEL_0"
bitfld.long 0x00 0. " SEL                            ,Mode for TSOSC selected" "Disabled,Enabled"
rgroup.long 0x420++0x07
line.long 0x00 "DPD_FSM_STATUS_0,DPD_FSM_STATUS_0"
bitfld.long 0x00 21.--23. " DPD8_CSTATE                    ,DPD8_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 18.--20. "                 DPD7_CSTATE            ,DPD7_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 15.--17. " DPD6_CSTATE                    ,DPD6_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 12.--14. "                 DPD5_CSTATE            ,DPD5_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 9.--11. " DPD4_CSTATE                    ,DPD4_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 6.--8. "                 DPD3_CSTATE            ,DPD3_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 3.--5. " DPD2_CSTATE                    ,DPD2_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 0.--2. "                 DPD1_CSTATE            ,DPD1_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
line.long 0x04 "SC7_FSM_STATUS_0,SC7_FSM_STATUS_0"
bitfld.long 0x04 18. " SC7_WAIT_DPD_DIS               ,SC7_WAIT_DPD_DIS" "No,Yes"
bitfld.long 0x04 17. "                           SC7_REMOVE_SD          ,SC7_REMOVE_SD" "No,Yes"
textline "                                       "
bitfld.long 0x04 16. " SC7_REMOVE_RESET               ,SC7_REMOVE_RESET" "No,Yes"
bitfld.long 0x04 15. "                           SC7_REMOVE_SEL         ,SC7_REMOVE_SEL" "No,Yes"
textline "                                       "
bitfld.long 0x04 14. " SC7_REMOVE_E                   ,SC7_REMOVE_E" "No,Yes"
bitfld.long 0x04 13. "                           SC7_REMOVE_CLAMP       ,SC7_REMOVE_CLAMP" "No,Yes"
textline "                                       "
bitfld.long 0x04 12. " SC7_PWR_ON                     ,SC7_PWR_ON" "No,Yes"
bitfld.long 0x04 11. "                           SC7_ALLOW_AOUPG        ,SC7_ALLOW_AOUPG" "No,Yes"
textline "                                       "
bitfld.long 0x04 10. " SC7_OSC_ON                     ,SC7_OSC_ON" "No,Yes"
bitfld.long 0x04 9. "                           SC7_WAIT_FOR_RET       ,SC7_WAIT_FOR_RET" "No,Yes"
textline "                                       "
bitfld.long 0x04 8. " SC7_OSC_OFF                    ,SC7_OSC_OFF" "No,Yes"
bitfld.long 0x04 7. "                           SC7_ALLOW_AOPG         ,SC7_ALLOW_AOPG" "No,Yes"
textline "                                       "
bitfld.long 0x04 6. " SC7_PWR_OFF                    ,SC7_PWR_OFF" "No,Yes"
bitfld.long 0x04 5. "                           SC7_MAIN_CLAMP         ,SC7_MAIN_CLAMP" "No,Yes"
textline "                                       "
bitfld.long 0x04 4. " SC7_EARLY_CLAMP                ,SC7_EARLY_CLAMP" "No,Yes"
bitfld.long 0x04 3. "                           SC7_ASSERT_E           ,SC7_ASSERT_E" "No,Yes"
textline "                                       "
bitfld.long 0x04 2. " SC7_ASSERT_SEL                 ,SC7_ASSERT_SEL" "No,Yes"
bitfld.long 0x04 1. "                           SC7_ASSERT_SD          ,SC7_ASSERT_SD" "No,Yes"
textline "                                       "
bitfld.long 0x04 0. " SC7_IDLE                       ,SC7_IDLE" "No,Yes"
width 0x0B
tree.end
tree.end
tree.open "Control Fabric"
tree "AXIAPB Registers"
tree "AXIAPB_AON"
base ad:0x056c0000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB_SCE"
base ad:0x05720000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB_BPMP"
base ad:0x05710000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB1"
base ad:0x05730000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB2"
base ad:0x05740000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB3"
base ad:0x05750000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB4"
base ad:0x05760000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree "AXIAPB5"
base ad:0x05770000
width 37.
group.long 0x00++0x03
line.long 0x00 "AXIAPB_ORDER_CONFIG,AXIAPB Order Config Register"
bitfld.long 0x00 5. " CH1_EN    ,Channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  VQC_M_CTL                ,VQC mux control" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " WR_RD_ARB ,WR or RD higher priority select" "RD,WR"
bitfld.long 0x00 0. "        BRIDGE_EARLY_ACK_DISABLE ,Bridge early ACK disable" "Yes,No"
group.long 0x4++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_0,AXIAPB Firewall ADDR Config0 Register 0"
group.long 0x8++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_1,AXIAPB Firewall ADDR Config0 Register 1"
group.long 0xC++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_2,AXIAPB Firewall ADDR Config0 Register 2"
group.long 0x10++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_3,AXIAPB Firewall ADDR Config0 Register 3"
group.long 0x14++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_4,AXIAPB Firewall ADDR Config0 Register 4"
group.long 0x18++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_5,AXIAPB Firewall ADDR Config0 Register 5"
group.long 0x1C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_6,AXIAPB Firewall ADDR Config0 Register 6"
group.long 0x20++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_7,AXIAPB Firewall ADDR Config0 Register 7"
group.long 0x24++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_8,AXIAPB Firewall ADDR Config0 Register 8"
group.long 0x28++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_9,AXIAPB Firewall ADDR Config0 Register 9"
group.long 0x2C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_10,AXIAPB Firewall ADDR Config0 Register 10"
group.long 0x30++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_11,AXIAPB Firewall ADDR Config0 Register 11"
group.long 0x34++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_12,AXIAPB Firewall ADDR Config0 Register 12"
group.long 0x38++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_13,AXIAPB Firewall ADDR Config0 Register 13"
group.long 0x3C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_14,AXIAPB Firewall ADDR Config0 Register 14"
group.long 0x40++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG0_15,AXIAPB Firewall ADDR Config0 Register 15"
group.long 0x44++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_0,AXIAPB Firewall ADDR Config1 Register 0"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 0"
group.long 0x48++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_1,AXIAPB Firewall ADDR Config1 Register 1"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 1"
group.long 0x4C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_2,AXIAPB Firewall ADDR Config1 Register 2"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 2"
group.long 0x50++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_3,AXIAPB Firewall ADDR Config1 Register 3"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 3"
group.long 0x54++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_4,AXIAPB Firewall ADDR Config1 Register 4"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 4"
group.long 0x58++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_5,AXIAPB Firewall ADDR Config1 Register 5"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 5"
group.long 0x5C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_6,AXIAPB Firewall ADDR Config1 Register 6"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 6"
group.long 0x60++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_7,AXIAPB Firewall ADDR Config1 Register 7"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 7"
group.long 0x64++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_8,AXIAPB Firewall ADDR Config1 Register 8"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 8"
group.long 0x68++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_9,AXIAPB Firewall ADDR Config1 Register 9"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 9"
group.long 0x6C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_10,AXIAPB Firewall ADDR Config1 Register 10"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 10"
group.long 0x70++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_11,AXIAPB Firewall ADDR Config1 Register 11"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 11"
group.long 0x74++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_12,AXIAPB Firewall ADDR Config1 Register 12"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 12"
group.long 0x78++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_13,AXIAPB Firewall ADDR Config1 Register 13"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 13"
group.long 0x7C++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_14,AXIAPB Firewall ADDR Config1 Register 14"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 14"
group.long 0x80++0x03
line.long 0x00 "AXIAPB_FIREWALL_ADDR_CONFIG1_15,AXIAPB Firewall ADDR Config1 Register 15"
bitfld.long 0x00 26. " ACL       ,Address control lock" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x1 "  OFFSET_ADRESS            ,Offset address for security filter 15"
group.long 0x84++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 0"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 1"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 2"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 3"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 4"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 5"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 6"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 7"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 8"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 9"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 10"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 11"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 12"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 13"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 14"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXIAPB_FIREWALL_BITMASK_CONFIG_0-15,AXIAPB Firewall Bitmask Config 15"
bitfld.long 0x00 30. " SEC_LCK   ,Sticky lock bit can change the security control field" "No set,Set"
bitfld.long 0x00 29. "    SWCE                     ,Security write control enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " SRCE      ,Security read control enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "  M_ID                     ,Master ID" "Not used,CCPLEX,CCPLEX,BPMP,SPE,SPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                              "
bitfld.long 0x00 23. " G7W       ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 22. "  G6W                      ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " G5W       ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 20. "  G4W                      ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " G3W       ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 18. "  G2W                      ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. " G1W       ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 16. "  TZGW                     ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W1      ,Privileged group7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W1                     ,Privileged group6 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " G5W1      ,Privileged group5 write" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W1                     ,Privileged group4 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W1      ,Privileged group3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W1                     ,Privileged group2 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. " G1W1      ,Privileged group1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "  TZGW1                    ,TrustZone group0 write" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R       ,Privileged group7 read" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                      ,Privileged group6 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " G5R       ,Privileged group5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                      ,Privileged group4 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R       ,Privileged group3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                      ,Privileged group2 read" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " G1R       ,Privileged group1 read" "Disabled,Enabled"
bitfld.long 0x00 0. "  TZGR                     ,TrustZone group0 read" "Disabled,Enabled"
width 12.
tree "DMAAPB_X_NS_BLOCK0_11_TZ"
group.long 0xC4++0x03
line.long 0x00 "BLOCK0_TZ,Block TrustZone Register 0"
group.long 0xC8++0x03
line.long 0x00 "BLOCK1_TZ,Block TrustZone Register 1"
group.long 0xCC++0x03
line.long 0x00 "BLOCK2_TZ,Block TrustZone Register 2"
group.long 0xD0++0x03
line.long 0x00 "BLOCK3_TZ,Block TrustZone Register 3"
group.long 0xD4++0x03
line.long 0x00 "BLOCK4_TZ,Block TrustZone Register 4"
group.long 0xD8++0x03
line.long 0x00 "BLOCK5_TZ,Block TrustZone Register 5"
group.long 0xDC++0x03
line.long 0x00 "BLOCK6_TZ,Block TrustZone Register 6"
group.long 0xE0++0x03
line.long 0x00 "BLOCK7_TZ,Block TrustZone Register 7"
group.long 0xE4++0x03
line.long 0x00 "BLOCK8_TZ,Block TrustZone Register 8"
group.long 0xE8++0x03
line.long 0x00 "BLOCK9_TZ,Block TrustZone Register 9"
group.long 0xEC++0x03
line.long 0x00 "BLOCK10_TZ,Block TrustZone Register 10"
group.long 0xF0++0x03
line.long 0x00 "BLOCK11_TZ,Block TrustZone Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G1"
group.long 0x104++0x03
line.long 0x00 "BLOCK0_G1,Block G1 Register 0"
group.long 0x108++0x03
line.long 0x00 "BLOCK1_G1,Block G1 Register 1"
group.long 0x10C++0x03
line.long 0x00 "BLOCK2_G1,Block G1 Register 2"
group.long 0x110++0x03
line.long 0x00 "BLOCK3_G1,Block G1 Register 3"
group.long 0x114++0x03
line.long 0x00 "BLOCK4_G1,Block G1 Register 4"
group.long 0x118++0x03
line.long 0x00 "BLOCK5_G1,Block G1 Register 5"
group.long 0x11C++0x03
line.long 0x00 "BLOCK6_G1,Block G1 Register 6"
group.long 0x120++0x03
line.long 0x00 "BLOCK7_G1,Block G1 Register 7"
group.long 0x124++0x03
line.long 0x00 "BLOCK8_G1,Block G1 Register 8"
group.long 0x128++0x03
line.long 0x00 "BLOCK9_G1,Block G1 Register 9"
group.long 0x12C++0x03
line.long 0x00 "BLOCK10_G1,Block G1 Register 10"
group.long 0x130++0x03
line.long 0x00 "BLOCK11_G1,Block G1 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G2"
group.long 0x144++0x03
line.long 0x00 "BLOCK0_G2,Block G2 Register 0"
group.long 0x148++0x03
line.long 0x00 "BLOCK1_G2,Block G2 Register 1"
group.long 0x14C++0x03
line.long 0x00 "BLOCK2_G2,Block G2 Register 2"
group.long 0x150++0x03
line.long 0x00 "BLOCK3_G2,Block G2 Register 3"
group.long 0x154++0x03
line.long 0x00 "BLOCK4_G2,Block G2 Register 4"
group.long 0x158++0x03
line.long 0x00 "BLOCK5_G2,Block G2 Register 5"
group.long 0x15C++0x03
line.long 0x00 "BLOCK6_G2,Block G2 Register 6"
group.long 0x160++0x03
line.long 0x00 "BLOCK7_G2,Block G2 Register 7"
group.long 0x164++0x03
line.long 0x00 "BLOCK8_G2,Block G2 Register 8"
group.long 0x168++0x03
line.long 0x00 "BLOCK9_G2,Block G2 Register 9"
group.long 0x16C++0x03
line.long 0x00 "BLOCK10_G2,Block G2 Register 10"
group.long 0x170++0x03
line.long 0x00 "BLOCK11_G2,Block G2 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G3"
group.long 0x184++0x03
line.long 0x00 "BLOCK0_G3,Block G3 Register 0"
group.long 0x188++0x03
line.long 0x00 "BLOCK1_G3,Block G3 Register 1"
group.long 0x18C++0x03
line.long 0x00 "BLOCK2_G3,Block G3 Register 2"
group.long 0x190++0x03
line.long 0x00 "BLOCK3_G3,Block G3 Register 3"
group.long 0x194++0x03
line.long 0x00 "BLOCK4_G3,Block G3 Register 4"
group.long 0x198++0x03
line.long 0x00 "BLOCK5_G3,Block G3 Register 5"
group.long 0x19C++0x03
line.long 0x00 "BLOCK6_G3,Block G3 Register 6"
group.long 0x1A0++0x03
line.long 0x00 "BLOCK7_G3,Block G3 Register 7"
group.long 0x1A4++0x03
line.long 0x00 "BLOCK8_G3,Block G3 Register 8"
group.long 0x1A8++0x03
line.long 0x00 "BLOCK9_G3,Block G3 Register 9"
group.long 0x1AC++0x03
line.long 0x00 "BLOCK10_G3,Block G3 Register 10"
group.long 0x1B0++0x03
line.long 0x00 "BLOCK11_G3,Block G3 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G4"
group.long 0x1C4++0x03
line.long 0x00 "BLOCK0_G4,Block G4 Register 0"
group.long 0x1C8++0x03
line.long 0x00 "BLOCK1_G4,Block G4 Register 1"
group.long 0x1CC++0x03
line.long 0x00 "BLOCK2_G4,Block G4 Register 2"
group.long 0x1D0++0x03
line.long 0x00 "BLOCK3_G4,Block G4 Register 3"
group.long 0x1D4++0x03
line.long 0x00 "BLOCK4_G4,Block G4 Register 4"
group.long 0x1D8++0x03
line.long 0x00 "BLOCK5_G4,Block G4 Register 5"
group.long 0x1DC++0x03
line.long 0x00 "BLOCK6_G4,Block G4 Register 6"
group.long 0x1E0++0x03
line.long 0x00 "BLOCK7_G4,Block G4 Register 7"
group.long 0x1E4++0x03
line.long 0x00 "BLOCK8_G4,Block G4 Register 8"
group.long 0x1E8++0x03
line.long 0x00 "BLOCK9_G4,Block G4 Register 9"
group.long 0x1EC++0x03
line.long 0x00 "BLOCK10_G4,Block G4 Register 10"
group.long 0x1F0++0x03
line.long 0x00 "BLOCK11_G4,Block G4 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G5"
group.long 0x204++0x03
line.long 0x00 "BLOCK0_G5,Block G5 Register 0"
group.long 0x208++0x03
line.long 0x00 "BLOCK1_G5,Block G5 Register 1"
group.long 0x20C++0x03
line.long 0x00 "BLOCK2_G5,Block G5 Register 2"
group.long 0x210++0x03
line.long 0x00 "BLOCK3_G5,Block G5 Register 3"
group.long 0x214++0x03
line.long 0x00 "BLOCK4_G5,Block G5 Register 4"
group.long 0x218++0x03
line.long 0x00 "BLOCK5_G5,Block G5 Register 5"
group.long 0x21C++0x03
line.long 0x00 "BLOCK6_G5,Block G5 Register 6"
group.long 0x220++0x03
line.long 0x00 "BLOCK7_G5,Block G5 Register 7"
group.long 0x224++0x03
line.long 0x00 "BLOCK8_G5,Block G5 Register 8"
group.long 0x228++0x03
line.long 0x00 "BLOCK9_G5,Block G5 Register 9"
group.long 0x22C++0x03
line.long 0x00 "BLOCK10_G5,Block G5 Register 10"
group.long 0x230++0x03
line.long 0x00 "BLOCK11_G5,Block G5 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G6"
group.long 0x244++0x03
line.long 0x00 "BLOCK0_G6,Block G6 Register 0"
group.long 0x248++0x03
line.long 0x00 "BLOCK1_G6,Block G6 Register 1"
group.long 0x24C++0x03
line.long 0x00 "BLOCK2_G6,Block G6 Register 2"
group.long 0x250++0x03
line.long 0x00 "BLOCK3_G6,Block G6 Register 3"
group.long 0x254++0x03
line.long 0x00 "BLOCK4_G6,Block G6 Register 4"
group.long 0x258++0x03
line.long 0x00 "BLOCK5_G6,Block G6 Register 5"
group.long 0x25C++0x03
line.long 0x00 "BLOCK6_G6,Block G6 Register 6"
group.long 0x260++0x03
line.long 0x00 "BLOCK7_G6,Block G6 Register 7"
group.long 0x264++0x03
line.long 0x00 "BLOCK8_G6,Block G6 Register 8"
group.long 0x268++0x03
line.long 0x00 "BLOCK9_G6,Block G6 Register 9"
group.long 0x26C++0x03
line.long 0x00 "BLOCK10_G6,Block G6 Register 10"
group.long 0x270++0x03
line.long 0x00 "BLOCK11_G6,Block G6 Register 11"
tree.end
textline "                     "
tree "DMAAPB_X_NS_BLOCK0-11_G7"
group.long 0x284++0x03
line.long 0x00 "BLOCK0_G7,Block G7 Register 0"
group.long 0x288++0x03
line.long 0x00 "BLOCK1_G7,Block G7 Register 1"
group.long 0x28C++0x03
line.long 0x00 "BLOCK2_G7,Block G7 Register 2"
group.long 0x290++0x03
line.long 0x00 "BLOCK3_G7,Block G7 Register 3"
group.long 0x294++0x03
line.long 0x00 "BLOCK4_G7,Block G7 Register 4"
group.long 0x298++0x03
line.long 0x00 "BLOCK5_G7,Block G7 Register 5"
group.long 0x29C++0x03
line.long 0x00 "BLOCK6_G7,Block G7 Register 6"
group.long 0x2A0++0x03
line.long 0x00 "BLOCK7_G7,Block G7 Register 7"
group.long 0x2A4++0x03
line.long 0x00 "BLOCK8_G7,Block G7 Register 8"
group.long 0x2A8++0x03
line.long 0x00 "BLOCK9_G7,Block G7 Register 9"
group.long 0x2AC++0x03
line.long 0x00 "BLOCK10_G7,Block G7 Register 10"
group.long 0x2B0++0x03
line.long 0x00 "BLOCK11_G7,Block G7 Register 11"
tree.end
textline "                     "
width 33.
group.long 0x2C4++0x2B
line.long 0x00 "AXIAPB_ERROR_CONFIG,AXIAPB Error Config Register"
bitfld.long 0x00 4. " ERR_DIS                         ,Error response disable" "Yes,No"
bitfld.long 0x00 2. "           SIZE_ERR                        ,Size/Length error checking" "Enabled,Disabled"
textline "                                          "
bitfld.long 0x00 1. " FIXED_TYPE                      ,FIXED type support" "Enabled,Disabled"
line.long 0x04 "AXIAPB_TIMEOUT_TIMER,AXIAPB Timeout Timer Register"
line.long 0x08 "AXIAPB_TIMEOUT_CONFIG,AXIAPB Timeout Config Register"
bitfld.long 0x08 1.--3. " DIVIDE_BY_RATIO                 ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TIMER_EN                        ,Timer enable" "Disabled,Enabled"
line.long 0x0C "AXIAPB_CLK_OVR_ON,AXIAPB CLK OVR ON Register"
bitfld.long 0x0C 0. " EN                              ,Enable SLCG on PCLK for bridge" "Disabled,Enabled"
line.long 0x10 "AXIAPB_CHx_FIFO_FULL_THRESHOLD1,AXIAPB CHx FIFO FULL THRESHOLD1 Register"
line.long 0x14 "AXIAPB_CHx_FIFO_FULL_THRESHOLD2,AXIAPB_CHx FIFO FULL THRESHOLD2 Register"
bitfld.long 0x14 12.--17. " CH2_DATA_FIFO                   ,CH2 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "  CH1_DATA_FIFO                   ,CH1 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
textline "                                          "
bitfld.long 0x14 0.--5. " CH0_DATA_FIFO                   ,CH0 DATA FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "AXIAPB_RESP_FIFO_FULL_THRESHOLD,AXIAPB RESP FIFO FULL THRESHOLD Register"
bitfld.long 0x18 13.--17. " ERR_STAT_FULL_THRESHOLD         ,Error status full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "  ERLY_ACK_FULL_THRESHOLD         ,Early Ack full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
textline "                                          "
bitfld.long 0x18 4.--7. " RD_RESP_FIFO_FULL_THRESHOLD     ,RD RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "  WR_RESP_FIFO_FULL_THRESHOLD     ,WR RESP FIFO full threshold" "No buffering,1 entries,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "AXIAPB_INTERRUPT_MASK,AXIAPB Interrupt Mask Register"
bitfld.long 0x1C 20. " CH2_REQ_FIFO_FULL_INT_MSK       ,Ch2 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1_REQ_FIFO_FULL_INT_MSK       ,Ch1 request FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 18. " CH0_REQ_FIFO_FULL_INT_MSK       ,Ch0 request FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ADR_RANGE_FW_SEC_ERR            ,Address range firewall security error" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 16. " BLCK_FW_SEC_ERR                 ,ERR,Block firewall security error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UNSUPP_BURST_TYPE               ,Unsupported burst type" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 14. " UNSUPP_BYTE_EN                  ,Unsupported byte enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UNSUPP_BURST_SIZE               ,Unsupported burst size" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 12. " UNSUPP_ALMNT_TYPE               ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2_DATA_FIFO_FULL_INT_MSK      ,Ch2 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 10. " CH1_DATA_FIFO_FULL_INT_MSK      ,Ch1 data FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0_DATA_FIFO_FULL_INT_MSK      ,Ch0 data FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 8. " WR_RES_FIFO_FULL_INT_MSK        ,Write response FIFO full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RD_RES_FIFO_FULL_INT_MSK        ,Read response FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 5. " ERLY_RES_BUFF_FULL_INT_MSK      ,Early response buffer full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLVERR_INT_MSK                  ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 2. " TIM_INT_MSK                     ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    STAT_FIFO_FULL_INT_MSK          ,Status FIFO full interrupt mask" "Not masked,Masked"
textline "                                          "
bitfld.long 0x1C 0. " STAT_FIFO_NEMPTY_INT_MSK        ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "AXIAPB_INTERRUPT_STATUS,AXIAPB Interrupt Status Register"
eventfld.long 0x20 20. " CH2_REQ_FIFO_FULL_INT_STAT      ,Ch2 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 19. "     CH1_REQ_FIFO_FULL_INT_STAT      ,Ch1 request FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 18. " CH0_REQ_FIFO_FULL_INT_STAT      ,Ch0 request FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 17. "     ADR_RG_FW_SEC_ERR_STAT          ,Address-range firewall security error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 16. " BLCK_FW_SEC_ERR_STAT            ,Block firewall security error status" "No effect,Interrupt"
eventfld.long 0x20 15. "     UNSUPP_BURST_TYPE_ERR_STAT      ,Unsupported burst type error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 14. " UNSUPP_BYTE_EN_ERR_STAT         ,Unsupported byte enable error status" "No effect,Interrupt"
eventfld.long 0x20 13. "     UNSUPP_BURST_SIZE_ERR_STAT      ,Unsupported burst size error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 12. " UNSUPP_ALMNT_TYPE_ERR_STAT      ,Unsupported alignment type error status" "No effect,Interrupt"
eventfld.long 0x20 11. "     CH2_DATA_FIFO_FULL_INT_STAT     ,Ch2 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 10. " CH1_DATA_FIFO_FULL_INT_STAT     ,Ch1 data FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 9. "     CH0_DATA_FIFO_FULL_INT_STAT     ,Ch0 data FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 8. " WR_RES_FIFO_FULL_INT_STAT       ,Write response FIFO full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 7. "     RD_RES_FIFO_FULL_INT_STAT       ,Read response FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 5. " ERLY_RES_BUFF_FULL_INT_STAT     ,Early response buffer full interrupt status" "No effect,Interrupt"
eventfld.long 0x20 3. "     SLVERR_INT_STAT                 ,SLVERR interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 2. " TIM_INT_STAT                    ,Timer interrupt status" "No effect,Interrupt"
eventfld.long 0x20 1. "     STAT_FIFO_FULL_INT_STAT         ,Status FIFO full interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x20 0. " STAT_FIFO_NEMPTY_INT_STAT       ,Status FIFO not empty interrupt status" "No effect,Interrupt"
line.long 0x24 "AXIAPB_RAW_INTERRUPT_STATUS,AXIAPB RAW Interrupt Status Register"
eventfld.long 0x24 20. " CH2_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch2 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 19. "     CH1_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch1 request FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 18. " CH0_REQ_FIFO_FULL_RAW_ERR_STAT  ,Ch0 request FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 17. "     ADR_RG_FW_SEC_RAW_ERR_STAT      ,Address-range firewall security raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 16. " BLCK_FW_SEC_RAW_ERR_STAT        ,Block firewall security raw error status" "No effect,Interrupt"
eventfld.long 0x24 15. "     UNSUPP_BURST_TYPE_RAW_ERR_STAT  ,Unsupported burst type raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 14. " UNSUPP_BYTE_EN_RAW_ERR_STAT     ,Unsupported byte enable raw error status" "No effect,Interrupt"
eventfld.long 0x24 13. "     UNSUPP_BURST_SIZE_RAW_ERR_STAT  ,Unsupported burst size raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 12. " UNSUPP_ALMNT_TYPE_RAW_ERR_STAT  ,Unsupported alignment type raw error status" "No effect,Interrupt"
eventfld.long 0x24 11. "     CH2_DATA_FIFO_FULL_RAW_INT_STAT ,Ch2 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 10. " CH1_DATA_FIFO_FULL_RAW_INT_STAT ,Ch1 data FIFO full raw interrupt status" "No effect,Interrupt"
eventfld.long 0x24 9. "     CH0_DATA_FIFO_FULL_RAW_INT_STAT ,Ch0 data FIFO full raw interrupt status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 8. " WR_RES_FIFO_FULL_RAW_ERR_STAT   ,Write response FIFO full raw error status" "No effect,Interrupt"
eventfld.long 0x24 7. "     RD_RES_FIFO_FULL_RAW_ERR_STAT   ,Read response FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 5. " ERLY_RES_BUFF_FULL_RAW_ERR_STAT ,Early response buffer full raw error status" "No effect,Interrupt"
eventfld.long 0x24 3. "     SLVERR_RAW_ERR_STAT             ,SLVERR raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 2. " TIM_RAW_ERR_STAT                ,Timer raw error status" "No effect,Interrupt"
eventfld.long 0x24 1. "     STAT_FIFO_FULL_RAW_ERR_STAT     ,Status FIFO full raw error status" "No effect,Interrupt"
textline "                                          "
eventfld.long 0x24 0. " STAT_FIFO_NEMPTY_RAW_ERR_STAT   ,Status FIFO not empty raw error status" "No effect,Interrupt"
line.long 0x28 "AXIAPB_ERROR_STATUS,AXIAPB Error Status Register"
bitfld.long 0x28 31. " ERR_STAT_FIFO[31]               ,Error status FIFO bit 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]                            ,Error status FIFO bit 30" "No effect,Error"
textline "                                          "
bitfld.long 0x28 29. " [29]                            ,Error status FIFO bit 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]                            ,Error status FIFO bit 28" "No effect,Error"
textline "                                          "
bitfld.long 0x28 27. " [27]                            ,Error status FIFO bit 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]                            ,Error status FIFO bit 26" "No effect,Error"
textline "                                          "
bitfld.long 0x28 25. " [25]                            ,Error status FIFO bit 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]                            ,Error status FIFO bit 24" "No effect,Error"
textline "                                          "
bitfld.long 0x28 23. " [23]                            ,Error status FIFO bit 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]                            ,Error status FIFO bit 22" "No effect,Error"
textline "                                          "
bitfld.long 0x28 21. " [21]                            ,Error status FIFO bit 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]                            ,Error status FIFO bit 20" "No effect,Error"
textline "                                          "
bitfld.long 0x28 19. " [19]                            ,Error status FIFO bit 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 17. " [17]                            ,Error status FIFO bit 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]                            ,Error status FIFO bit 16" "No effect,Error"
textline "                                          "
bitfld.long 0x28 15. " [15]                            ,Error status FIFO bit 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]                            ,Error status FIFO bit 14" "No effect,Error"
textline "                                          "
bitfld.long 0x28 13. " [13]                            ,Error status FIFO bit 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]                            ,Error status FIFO bit 12" "No effect,Error"
textline "                                          "
bitfld.long 0x28 11. " [11]                            ,Error status FIFO bit 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]                            ,Error status FIFO bit 10" "No effect,Error"
textline "                                          "
bitfld.long 0x28 9. " [9]                             ,Error status FIFO bit 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]                             ,Error status FIFO bit 8" "No effect,Error"
textline "                                          "
bitfld.long 0x28 7. " [7]                             ,Error status FIFO bit 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]                             ,Error status FIFO bit 6" "No effect,Error"
textline "                                          "
bitfld.long 0x28 5. " [5]                             ,Error status FIFO bit 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]                             ,Error status FIFO bit 4" "No effect,Error"
textline "                                          "
bitfld.long 0x28 3. " [3]                             ,Error status FIFO bit 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]                             ,Error status FIFO bit 2" "No effect,Error"
textline "                                          "
bitfld.long 0x28 1. " [1]                             ,Error status FIFO bit 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]                             ,Error status FIFO bit 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "AXIAPB_FIFO_STATUS1,AXIAPB FIFO Status Register 1"
rbitfld.long 0x00 25.--30. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 19.--24. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x00 13.--18. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 8.--12. "            CH2_REQ_FIFO_STAT               ,CH2 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x00 5.--7. " CH1_REQ_FIFO_STAT               ,CH1 REQ FIFO status" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 0.--4. "             CH0_REQ_FIFO_STAT               ,CH0 REQ FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "AXIAPB_FIFO_STATUS2,AXIAPB FIFO Status Register 2"
rbitfld.long 0x04 12.--17. " CH2_WDATA_FIFO_STAT             ,CH2 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 6.--11. "            CH1_WDATA_FIFO_STAT             ,CH1 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
rbitfld.long 0x04 0.--5. " CH0_WDATA_FIFO_STAT             ,CH0 WDATA FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AXIAPB_FIFO_STATUS3,AXIAPB FIFO Status Register 3"
rbitfld.long 0x08 13.--17. " ERR_FIFO_STAT_X2                ,Error FIFO status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 8.--12. "            ERLY_ACK_FIFO_STAT              ,Early Ack FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
rbitfld.long 0x08 4.--7. " WR_RESP_FIFO_STAT               ,WR RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 0.--3. "            RD_RESP_FIFO_STAT               ,RD RESP FIFO status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 12.
tree "DMAAPB_X_BLOCK0-11_BE"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE,Register 0 to map Slave blocks BE capable client"
group.long 0x320++0x03
line.long 0x00 "BLOCK1_BE,Register 1 to map Slave blocks BE capable client"
group.long 0x324++0x03
line.long 0x00 "BLOCK2_BE,Register 2 to map Slave blocks BE capable client"
group.long 0x328++0x03
line.long 0x00 "BLOCK3_BE,Register 3 to map Slave blocks BE capable client"
group.long 0x32C++0x03
line.long 0x00 "BLOCK4_BE,Register 4 to map Slave blocks BE capable client"
group.long 0x330++0x03
line.long 0x00 "BLOCK5_BE,Register 5 to map Slave blocks BE capable client"
group.long 0x334++0x03
line.long 0x00 "BLOCK6_BE,Register 6 to map Slave blocks BE capable client"
group.long 0x338++0x03
line.long 0x00 "BLOCK7_BE,Register 7 to map Slave blocks BE capable client"
group.long 0x33C++0x03
line.long 0x00 "BLOCK8_BE,Register 8 to map Slave blocks BE capable client"
group.long 0x340++0x03
line.long 0x00 "BLOCK9_BE,Register 9 to map Slave blocks BE capable client"
group.long 0x344++0x03
line.long 0x00 "BLOCK10_BE,Register 10 to map Slave blocks BE capable client"
group.long 0x348++0x03
line.long 0x00 "BLOCK11_BE,Register 11 to map Slave blocks BE capable client"
tree.end
width 26.
group.long 0x400++0x07
line.long 0x00 "AXIAPB_CYA,AXIAPB CYA Register"
hexmask.long 0x00 6.--31. 1. " SPARE_BITS                      ,Spare register bits"
bitfld.long 0x00 5. "      SLEC1B2B_ENABLE                 ,Bit for size/length error checking" "Disabled,Enabled"
bitfld.long 0x00 4. "      FC_ENABLE_CH3 ,FC_ENABLE_CH3 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " FC_ENABLE_CH2                   ,FC_ENABLE_CH2 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 2. "      FC_ENABLE_CH1                   ,FC_ENABLE_CH1 bit for enable FC" "Disabled,Enabled"
bitfld.long 0x00 1. "      FC_ENABLE_CH0 ,FC_ENABLE_CH0 bit for enable FC" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " VC_ENABLE                       ,FVC_ENABLE bit for enable VC" "Disabled,Enabled"
line.long 0x04 "DMAAPB_1_FC_DELAY_CONFIG,DMAAPB1 FC DELAY Config Register"
bitfld.long 0x04 0.--3. " COUNT                           ,Number of clock cycles to wait before sampling sideband Tx/Rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x8000++0x03
hide.long 0x00 "BR_SCR_0,BR_SCR Register"
in
hgroup.long 0x8004++0x03
hide.long 0x00 "BR_INTR_SCR_0,BR_INTR_SCR Register"
in
width 0x0B
tree.end
tree.end
tree "Control Fabric Registers"
base ad:0x00100000
width 29.
rgroup.long 0x00++0x03
line.long 0x00 "MISCREG_MODS_REDIRCT_0,MISC MODS REDIRCT Register"
if (((per.l(ad:0x00100000+0x04))&0xF0)==0x0)
rgroup.long 0x04++0x03
line.long 0x00 "MISCREG_HIDREV_0,MISC HIDREV Register"
bitfld.long 0x00 16.--19. " MINORREV        ,Chip ID minor revision" "QT,E388_FPGA,?..."
hexmask.long.byte 0x00 8.--15. 1. "    CHIPID       ,Chip ID"
bitfld.long 0x00 4.--7. "           MAJORREV  ,Chip ID major revision" "EMULATION,A01,?..."
bitfld.long 0x00 0.--3. "   HIDFAM      ,Chip ID family Register" "GPU,HANDHELD,BR_CHIPS,CRUSH,MCP,CK,VAIO,HANDHELD_SOC,?..."
else
rgroup.long 0x04++0x03
line.long 0x00 "MISCREG_HIDREV_0,MISC HIDREV Register"
bitfld.long 0x00 16.--19. " MINORREV        ,Chip ID minor revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 8.--15. 1. "           CHIPID       ,Chip ID"
bitfld.long 0x00 4.--7. "           MAJORREV  ,Chip ID major revision" "EMULATION,A01,?..."
bitfld.long 0x00 0.--3. "   HIDFAM      ,Chip ID family Register" "GPU,HANDHELD,BR_CHIPS,CRUSH,MCP,CK,VAIO,HANDHELD_SOC,?..."
endif
group.long 0x1000++0x3
line.long 0x00 "MISCREG_CLK_OVR_ON_0,MISC CLK OVR Register"
bitfld.long 0x00 0. " AXIS            ,SLCG override bit" "Disabled,Enabled"
group.long 0x1004++0x03
line.long 0x00 "MISCREG_BPMP_SECURITY_0,MISC BPMP Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1008++0x03
line.long 0x00 "MISCREG_CPU_SECURITY_0,MISC CPU Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x100C++0x03
line.long 0x00 "MISCREG_APE_SECURITY_0,MISC APE Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1010++0x03
line.long 0x00 "MISCREG_GPCDMA_SECURITY_0,MISC GPCDMA Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,SCITE,APE,?..."
group.long 0x1014++0x03
line.long 0x00 "MISCREG_SCE_SECURITY_0,MISC SCE Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1018++0x03
line.long 0x00 "MISCREG_SPE_SECURITY_0,MISC SPE Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x101C++0x03
line.long 0x00 "MISCREG_TSECA_HS_SECURITY_0,MISC TSECA_HS Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1020++0x03
line.long 0x00 "MISCREG_TSECA_LS_SECURITY_0,MISC TSECA_LS Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1024++0x03
line.long 0x00 "MISCREG_TSECB_HS_SECURITY_0,MISC TSECB_HS Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1028++0x03
line.long 0x00 "MISCREG_TSECB_LS_SECURITY_0,MISC TSECB_LS Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x102C++0x03
line.long 0x00 "MISCREG_JTAGM_SECURITY_0,MISC JTAGM Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1030++0x03
line.long 0x00 "MISCREG_CSITE_SECURITY_0,MISC CSITE Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1034++0x03
line.long 0x00 "MISCREG_DPMU_SECURITY_0,MISC DPMU Security Register"
rbitfld.long 0x00 16.--19. " MSTR_ID         ,Master ID" "CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x00 15. "  G7W          ,Group7 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 14. "   G6W       ,Group6 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 13. "  G5W         ,Group5 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 12. " G4W             ,Group4 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 11. "   G3W          ,Group3 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 10. "   G2W       ,Group2 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 9. "  G1W         ,Group1 non-secure write privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 8. " G0W             ,TrustZone/Group0 non-secure write privilege" "Secure,Non-secure"
bitfld.long 0x00 7. "   G7R          ,Group7 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 6. "   G6R       ,Group6 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 5. "  G5R         ,Group5 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 4. " G4R             ,Group4 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 3. "   G3R          ,Group3 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 2. "   G2R       ,Group2 non-secure read privilege" "Secure,Non-secure"
bitfld.long 0x00 1. "  G1R         ,Group1 non-secure read privilege" "Secure,Non-secure"
textline "                                      "
bitfld.long 0x00 0. " G0R             ,TrustZone/Group0 non-secure read privilege" "Secure,Non-secure"
group.long 0x1038++0x07
line.long 0x00 "MISCREG_CSITE_MC_WR_CTRL_0,MISC CSITE Memory Controller WR Control Register"
rbitfld.long 0x00 22. " SP_AWARE        ,Subpartition address for SP_AWARE" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x00 21. " USER_ADR1[8]    ,Subpartition address for USER_ADR1[8]" "Disabled,Enabled"
rbitfld.long 0x00 20. "     [7]          ,Subpartition address for USER_ADR1[7]" "Disabled,Enabled"
rbitfld.long 0x00 19. "     [6]       ,Subpartition address for USER_ADR1[6]" "Disabled,Enabled"
rbitfld.long 0x00 18. "    USER_ADR[5] ,Subpartition address for USER_ADR[5]" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x00 17. " GSC_AL[1]       ,General security carveout access 1" "Disabled,Enabled"
rbitfld.long 0x00 16. "     [0]          ,General security carveout access 0" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 15. " GSC_AID[4]      ,General security carveout aperture for GSC_AID[4]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [3]          ,General security carveout aperture for GSC_AID[3]" "Disabled,Enabled"
bitfld.long 0x00 13. "     [2]       ,General security carveout aperture for GSC_AID[2]" "Disabled,Enabled"
bitfld.long 0x00 12. "    [1]         ,General security carveout aperture for GSC_AID[1]" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 11. "        [0]      ,General security carveout aperture for GSC_AID[0]" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x00 10. " SC2MC_VPR_RD    ,VPR setting" "Allowed,Not allowed"
hexmask.long.byte 0x00 0.--7. 1. "  CSITE_SID    ,CoreSight AXIAP StreamID"
line.long 0x04 "MISCREG_CSITE_MC_RD_CTRL_0,MISC CSITE Memory Controller RD Control Register"
rbitfld.long 0x04 22. " SP_AWARE        ,Subpartition address for SP_AWARE" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x04 21. " USER_ADR1[8]    ,Subpartition address for USER_ADR1[8]" "Disabled,Enabled"
rbitfld.long 0x04 20. "     [7]          ,Subpartition address for USER_ADR1[7]" "Disabled,Enabled"
rbitfld.long 0x04 19. "     [6]       ,Subpartition address for USER_ADR1[6]" "Disabled,Enabled"
rbitfld.long 0x04 18. "    USER_ADR[5] ,Subpartition address for USER_ADR[5]" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x04 17. " GSC_AL[1]       ,General security carveout access 1" "Disabled,Enabled"
rbitfld.long 0x04 16. "     [0]          ,General security carveout access 0" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x04 15. " GSC_AID[4]      ,General security carveout aperture for GSC_AID[4]" "Disabled,Enabled"
bitfld.long 0x04 14. "     [3]          ,General security carveout aperture for GSC_AID[3]" "Disabled,Enabled"
bitfld.long 0x04 13. "     [2]       ,General security carveout aperture for GSC_AID[2]" "Disabled,Enabled"
bitfld.long 0x04 12. "    [1]         ,General security carveout aperture for GSC_AID[1]" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x04 11. "        [0]      ,General security carveout aperture for GSC_AID[0]" "Disabled,Enabled"
textline "                                      "
rbitfld.long 0x04 10. " SC2MC_VPR_RD    ,VPR setting" "Allowed,Not allowed"
hexmask.long.byte 0x04 0.--7. 1. "  CSITE_SID    ,CoreSight AXIAP StreamID"
group.long 0x105C++0x03
line.long 0x00 "MISCREG_GP0_GPU_SEC_0,MISC GP0 GPU SEC Register"
bitfld.long 0x00 0.--3. " SEC_SEL         ,Security and address control configurations" "TZG0,NVG1,NVG2,NVG3,NVG4,NVG5,NVG6,NVG7,?..."
group.long 0x2000++0x0F
line.long 0x00 "MISCREG_CPU_RESET_VECTOR_0,MISC CPU Reset Vector Register"
line.long 0x04 "MISCREG_AA64_RESET_LOW_0,MISC AA64 Reset Low Register"
line.long 0x08 "MISCREG_AA64_RESET_HIGH_0,MISC AA64 Reset High Register"
hexmask.long.word 0x08 0.--11. 1. " AA64_RESET_HIGH ,AA64_RESET_HIGH"
line.long 0x0C "MISCREG_PFCFG_0,MISC PFCFG Register"
bitfld.long 0x0C 0. " CFGSDISABLE     ,Disable access to secure control registers" "Yes,No"
group.long 0x3000++0x1F
line.long 0x00 "MISCREG_STICKY_REG0_0,MISC Sticky Register 0"
line.long 0x04 "MISCREG_STICKY_REG1_0,MISC Sticky Register 1"
line.long 0x08 "MISCREG_STICKY_REG2_0,MISC Sticky Register 2"
line.long 0x0C "MISCREG_STICKY_REG3_0,MISC Sticky Register 3"
line.long 0x10 "MISCREG_SPARE_REG0,MISC Spare Register 0"
line.long 0x14 "MISCREG_SPARE_REG1_0,MISC Spare Register 1"
line.long 0x18 "MISCREG_SPARE_REG2_0,MISC Spare Register 2"
line.long 0x1C "MISCREG_SPARE_REG3_0,MISC Spare Register 3"
group.long 0x31AC++0x03
line.long 0x00 "MISCREG_MISC_SPARE_REG_0,MISC MISC Spare Register"
width 0x0B
tree.end
tree.end
tree "Timers"
tree "RTC Registers"
base ad:0x0C2A0000
width 19.
group.long 0x00++0x03
line.long 0x00 "RTC_RTCCR_0,RTC Control Register"
bitfld.long 0x00 0. " HDBG                      ,Halt-on-debug" "Not asserted,Asserted"
rgroup.long 0x04++0x03
line.long 0x00 "RTC_RTCBR_0,RTC Busy Register"
bitfld.long 0x00 0. " STATUS                    ,Idle and busy status" "Idle,Busy"
group.long 0x08++0x03
line.long 0x00 "RTC_RTCSCR_0,RTC Seconds Counter Register"
rgroup.long 0x0C++0x07
line.long 0x00 "RTC_RTCSSCR_0,RTC Shadowed Seconds Counter Register"
line.long 0x04 "RTC_RTCMCR_0,RTC Milliseconds Counter Register"
hexmask.long.word 0x04 0.--9. 1. " MILLI_SECONDS             ,Milliseconds counter increments using Bresenham algorithm"
group.long 0x14++0x1B
line.long 0x00 "RTC_RTCSAR0_0,RTC Seconds Alarm0 Registers"
line.long 0x04 "RTC_RTCSAR1_0,RTC Seconds Alarm1 Registers"
line.long 0x08 "RTC_RTCMAR_0,RTC Milliseconds Alarm Register"
hexmask.long.word 0x08 0.--9. 1. " VALUE                     ,Milliseconds match value"
line.long 0x0C "RTC_RTCSCAR_0,RTC Second Countdown Alarm Register"
bitfld.long 0x0C 31. " ENABLE                    ,Enable bit for the countdown operation" "Disabled,Enabled"
bitfld.long 0x0C 30. "      PERIODIC                ,Internal counter is automatically reloaded after reaching 0" "Disabled,Enabled"
hexmask.long 0x0C 0.--29. 1. "      PTV                  ,Timer present trigger value"
line.long 0x10 "RTC_RTCMCAR_0,RTC Millisecond Countdown Alarm Register"
bitfld.long 0x10 31. " ENABLE                    ,Enable bit for the countdown operation" "Disabled,Enabled"
bitfld.long 0x10 30. "      PERIODIC                ,Internal counter is automatically reloaded after reaching 0" "Disabled,Enabled"
hexmask.long 0x10 0.--29. 1. "      PTV                  ,Timer present trigger value"
line.long 0x14 "RTC_RTCIER_0,RTC Interrupt Enable Register"
bitfld.long 0x14 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt" "Disabled,Enabled"
bitfld.long 0x14 3. "      SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt" "Disabled,Enabled"
bitfld.long 0x14 2. "      MSEC_ALARM           ,MSEC_ALARM interrupt" "Disabled,Enabled"
textline "                            "
bitfld.long 0x14 0.--1. " SEC_ALARM                 ,SEC_ALARM interrupt" "0,1,2,3"
line.long 0x18 "RTC_RTCISR_0,RTC Interrupt Status Register"
eventfld.long 0x18 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 3. "  SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 2. "  MSEC_ALARM           ,MSEC_ALARM interrupt condition" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x18 1. " SEC_ALARM                 ,SEC_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 0. "  SEC_ALARM               ,SEC_ALARM interrupt condition" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "RTC_RTCIVR_0,RTC Interrupt Valid Register"
bitfld.long 0x00 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  MSEC_ALARM           ,MSEC_ALARM interrupt" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 0.--1. " SEC_ALARM                 ,SEC_ALARM interrupt" "0,1,2,3"
wgroup.long 0x34++0x03
line.long 0x00 "RTC_RTCFIR_0,RTC Force Interrupt Register"
bitfld.long 0x00 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt status bit" "Not set,Set"
bitfld.long 0x00 3. "       SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt status bit" "Not set,Set"
bitfld.long 0x00 2. "       MSEC_ALARM           ,MSEC_ALARM interrupt status bit" "Not set,Set"
textline "                            "
bitfld.long 0x00 0.--1. " SEC_ALARM                 ,SEC_ALARM interrupt status bit" "0,1,2,3"
group.long 0x38++0x07
line.long 0x00 "RTC_RTCRSR_0,RTC Reference Selection Register"
bitfld.long 0x00 4.--5. " MBS                       ,MTSC Bit Select" "0,1,2,3"
bitfld.long 0x00 0. "             FR                      ,Free running" "0,1"
line.long 0x04 "RTC_RTCDR_0,RTC Divider Register"
hexmask.long.word 0x04 16.--31. 1. " D                         ,Denominator"
hexmask.long.word 0x04 0.--15. 1. "          N                       ,Numerator"
group.long 0x40++0x03
line.long 0x00 "RTC_RTCSCR,Security configuration register"
bitfld.long 0x00 29. " SEC_LCK                   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                 ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN              ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7                       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5                  ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3                       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2                     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                  ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W                       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                  ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W                       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W                  ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R                       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R                     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                  ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R                       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                  ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "RTC_AOWDTCR_0,RTC Always On Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WINDOWEDRESTARTDISABLEMAP ,Windowed restart disable map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "            ERRORTHRESHOLD          ,WDT logic asserts an error signal to HSM when ExpirationLevel > ErrorThreshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "             TSCREFERENCEENABLE   ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 18. " CHALLENGERESPONSEENABLE   ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
bitfld.long 0x00 17. "      WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "      SYSTEMPORRESETENABLE ,Enable full system reset at fifth expiration of the counter, mostly at the same level as the signal from PMC asserted in case of a Power On Reset" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " SYSTEMDEBUGRESETENABLE    ,Enable system-wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "      WAKECOLDENABLE          ,Wake cold enable" "Disabled,Enabled"
bitfld.long 0x00 13. "      WAKEENABLE           ,Wake enabled" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 12. " LOCALINTERRUPTENABLE      ,Enable normal priority interrupt assertion at first expiration of the counter, connected to local interrupt controller" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "      PERIOD                  ,Measured in periods of the timer selected as source. This is the reload value, so 0 is treated as maximum period"
bitfld.long 0x00 0.--3. "            TIMERSOURCE          ,Timer source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x104++0x03
line.long 0x00 "RTC_AOWDTSR_0,RTC Always On Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR              , Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "      CURRENTEXPIRATIONCOUNT  ,Current expiration level" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 4.--11. 1. "             CURRENTCOUNT         ,Current value of the down counter"
textline "                            "
bitfld.long 0x00 3. " WAKECOLDSTATUS            ,Wake cold status" "0,1"
bitfld.long 0x00 2. "             WAKESTATUS              ,Wake status" "0,1"
bitfld.long 0x00 1. "             LOCALINTERRUPTSTATUS ,Current status of local interrupt" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 0. " ENABLED                   ,Enabled" "0,1"
group.long 0x108++0x0B
line.long 0x00 "RTC_AOWDTCMDR_0,RTC Always On Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER            ,Disable counter" "0,1"
bitfld.long 0x00 0. "             STARTCOUNTER            ,Start counter" "0,1"
line.long 0x04 "RTC_AOWDTUR_0,Always On Watchdog Timer Unlock Register"
line.long 0x08 "RTC_AOWDTSCOR_0,Always On Watchdog Skip Configuration Register"
bitfld.long 0x08 12.--14. " SKIP3                     ,Skip value at expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 8.--10. "             SKIP2                   ,Skip value at expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 4.--6. "             SKIP1                ,Skip value at expiration count 1" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x08 0.--2. " SKIP0                     ,Skip value at expiration count 0" "0,1,2,3,4,5,6,7"
group.long 0x114++0x03
line.long 0x00 "RTC_AOWDTSCR,Security configuration WDT register"
bitfld.long 0x00 29. " SEC_LCK                   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN                 ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN              ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                            "
bitfld.long 0x00 23. " PR7                       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6                     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5                  ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 19. " PR3                       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2                     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1                  ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " G7W                       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W                     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W                  ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " G3W                       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W                     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W                  ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 7. " G7R                       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R                     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R                  ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 3. " G3R                       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R                     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R                  ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "Microsecond Counter Registers"
base ad:0x0c2e0000
width 10.
rgroup.long 0x00++0x03
line.long 0x00 "USECCVR,Microsecond Counter Value Register"
group.long 0x04++0x03
line.long 0x00 "USECCCR,Microsecond Counter Configuration Register"
hexmask.long.byte 0x00 8.--15. 1. " N       ,Numerator"
hexmask.long.byte 0x00 0.--7. 1. "           D       ,Denominator"
group.long 0x10++0x03
line.long 0x00 "USECCRSR,Microsecond Counter Reference Selection Register"
bitfld.long 0x00 4.--5. " MBS     ,TSC bit select" "0,1,2,3"
bitfld.long 0x00 0. "            FR      ,Free Running" "Locked,Unlocked"
group.long 0x3C++0x07
line.long 0x00 "USECCFR,Microsecond Counter Freeze Register"
bitfld.long 0x00 0. " HDBG    ,Halt-on-debug" "No asserted,Asserted"
line.long 0x04 "USECSCR,Security Configuration Register"
bitfld.long 0x04 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x04 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x04 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x04 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x04 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x04 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x04 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree "TOP Timers"
tree "TOP Shared"
base ad:0x03010000
width 10.
rgroup.long 0x00++0x0F
line.long 0x00 "TKETSC0,TKE Top Shared TSC0 Counter Register"
line.long 0x04 "TKETSC1,TKE Top Shared TSC1 Counter Register"
line.long 0x08 "TKEUSEC,TKE Top Shared USEC Counter Register"
line.long 0x0C "TKEOSC,TKE TOp Shared OSC Counter Register"
group.long 0x10++0x07
line.long 0x00 "TKECR,TKE Top Shared Control Register"
bitfld.long 0x00 3. " HDBG    ,Halt-on-debug" "No asserted,Asserted"
bitfld.long 0x00 2. "  OSC_DIS ,Disable the local OSC counter" "No,Yes"
bitfld.long 0x00 1. "          USEC_DIS ,Disable the local USEC counter" "No,Yes"
bitfld.long 0x00 0. "          TSC_DIS   ,Disable the local TSC" "No,Yes"
line.long 0x04 "CLKOVRON,TKE Top Shared CLK OVR ON Register"
bitfld.long 0x04 0. " OSC     ,SLCG override bit" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "TKEIE0,TKE Top Shared Routing Control Register 0"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x104++0x03
line.long 0x00 "TKEIE1,TKE Top Shared Routing Control Register 1"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x108++0x03
line.long 0x00 "TKEIE2,TKE Top Shared Routing Control Register 2"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x10C++0x03
line.long 0x00 "TKEIE3,TKE Top Shared Routing Control Register 3"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x110++0x03
line.long 0x00 "TKEIE4,TKE Top Shared Routing Control Register 4"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x114++0x03
line.long 0x00 "TKEIE5,TKE Top Shared Routing Control Register 5"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x118++0x03
line.long 0x00 "TKEIE6,TKE Top Shared Routing Control Register 6"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x11C++0x03
line.long 0x00 "TKEIE7,TKE Top Shared Routing Control Register 7"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x120++0x03
line.long 0x00 "TKEIE8,TKE Top Shared Routing Control Register 8"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
group.long 0x124++0x03
line.long 0x00 "TKEIE9,TKE Top Shared Routing Control Register 9"
bitfld.long 0x00 28.--30. " WDT3INT ,Watch-Dog Timer 3 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "            WDT2INT ,Watch-Dog Timer 2 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "            WDT1INT  ,Watch-Dog Timer 1 internal interrupt status" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "            WDT0INT   ,Watch-Dog Timer 0 internal interrupt status" "0,1,2,3,4,5,6,7"
textline "                   "
hexmask.long.word 0x00 0.--15. 1. " TSI     ,Timer Single Interrupt"
rgroup.long 0x200++0x07
line.long 0x00 "TKEIV,TKE Top Shared Current Status Interrupt Register"
bitfld.long 0x00 9. " CSEI[9] ,Current Status of external interrupt 9" "No asserted,Asserted"
bitfld.long 0x00 8. "  [8]     ,Current Status of external interrupt 8" "No asserted,Asserted"
bitfld.long 0x00 7. "  [7]      ,Current Status of external interrupt 7" "No asserted,Asserted"
bitfld.long 0x00 6. "  [6]       ,Current Status of external interrupt 6" "No asserted,Asserted"
textline "                   "
bitfld.long 0x00 5. "     [5] ,Current Status of external interrupt 5" "No asserted,Asserted"
bitfld.long 0x00 4. "  [4]     ,Current Status of external interrupt 4" "No asserted,Asserted"
bitfld.long 0x00 3. "  [3]      ,Current Status of external interrupt 3" "No asserted,Asserted"
bitfld.long 0x00 2. "  [2]       ,Current Status of external interrupt 2" "No asserted,Asserted"
textline "                   "
bitfld.long 0x00 1. "     [1] ,Current Status of external interrupt 1" "No asserted,Asserted"
bitfld.long 0x00 0. "  [0]     ,Current Status of external interrupt 0" "No asserted,Asserted"
line.long 0x04 "TKEIR,TKE Top Shared Current Internal Interrupt Register"
group.long 0x244++0x03
line.long 0x00 "TKESCR,TKE Security Control Register"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN  ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5      ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1      ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W      ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W      ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R      ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R      ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TOP NV Timers"
tree "TMR0"
base ad:0x03020000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR0,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR0,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR0,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR0,TMR Security Control Register 0"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR1"
base ad:0x03030000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR1,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR1,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR1,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR1,TMR Security Control Register 1"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR2"
base ad:0x03040000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR2,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR2,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR2,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR2,TMR Security Control Register 2"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR3"
base ad:0x03050000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR3,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR3,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR3,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR3,TMR Security Control Register 3"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR4"
base ad:0x03060000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR4,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR4,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR4,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR4,TMR Security Control Register 4"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR5"
base ad:0x03070000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR5,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR5,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR5,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR5,TMR Security Control Register 5"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR6"
base ad:0x03080000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR6,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR6,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR6,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR6,TMR Security Control Register 6"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR7"
base ad:0x03090000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR7,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR7,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR7,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR7,TMR Security Control Register 7"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR8"
base ad:0x030A0000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR8,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR8,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR8,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR8,TMR Security Control Register 8"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR9"
base ad:0x030B0000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR9,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR9,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR9,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR9,TMR Security Control Register 9"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "TOP WatchDog Timers"
tree "WDT0"
base ad:0x030C0000
width 10.
group.long 0x00++0x03
line.long 0x00 "WDTCR,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WRDM                    ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "        ERRORTHRESHOLD         ,The WDT logic asserts an error signal to HSM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "         TSCREFERENCEENABLE     ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
bitfld.long 0x00 18. "  CHALLENGERESPONSEENABLE ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 17. " WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "  SYSTEMPORESETENABLE    ,Enable internal full system reset at fifth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 15. "  SYSTEMDEBUGRESETENABLE ,Enable system wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "  REMOTEINTERRUPTENABLE   ,Enable normal priority interrupt assertion at third expiration of the counter" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 13. " LOCALFIQENABLE          ,Enable high priority interrupt (FIQ) assertion at second expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 12. "  LOCALINTERRUPTENABLE   ,Enable normal priority interrupt assertion at first expiration of the counter" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "  PERIOD                 ,Measured in periods of the timer selected as source"
bitfld.long 0x00 0.--3. "        TIMERSOURCE             ,The timer source interpretation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x04++0x03
line.long 0x00 "WDTSR,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR            ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "  CURRENTEXPIRATIONCOUNT ,Current count of expiration since last start operation" "0,5,10,15,20,25,30,35"
hexmask.long.byte 0x00 4.--11. 1. "        CURRENTCOUNT           ,Current value of the downcounter"
bitfld.long 0x00 3. "        REMOTEINTERRUPTSTATUS   ,Current status of remote interrupt" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 2. " LOCALFIQSTATUS          ,Current status of FIQ" "Disabled,Enabled"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS   ,Current status of local interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "  ENABLED                ,Enabled configuration of the WDT" "Disabled,Enabled"
group.long 0x08++0x07
line.long 0x00 "WDTCMDR,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER          ,Disable watchdog counter" "No,Yes"
bitfld.long 0x00 0. "       STARTCOUNTER           ,Enable the counter operation" "Disabled,Enabled"
line.long 0x04 "WDTUR,Watchdog Timer Unlock Register"
if (((per.l(ad:0x030C0000+0x08))&0x2)==0x02)&&(((per.l(ad:0x030C0000+0x08))&0x1)==0x0)
group.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
else
rgroup.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
endif
group.long 0x14++0x03
line.long 0x00 "WDTSCR,Watchdog Security Control register"
bitfld.long 0x00 29. " SEC_LCK                 ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN                ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER               ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7                     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6                    ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5                    ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4                     ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3                     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2                    ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0                     ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W                     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W                    ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W                     ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W                     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W                    ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W                    ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W                     ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R                     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                    ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                     ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R                     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R                    ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R                     ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree "WDT1"
base ad:0x030D0000
width 10.
group.long 0x00++0x03
line.long 0x00 "WDTCR,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WRDM                    ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "        ERRORTHRESHOLD         ,The WDT logic asserts an error signal to HSM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "         TSCREFERENCEENABLE     ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
bitfld.long 0x00 18. "  CHALLENGERESPONSEENABLE ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 17. " WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "  SYSTEMPORESETENABLE    ,Enable internal full system reset at fifth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 15. "  SYSTEMDEBUGRESETENABLE ,Enable system wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "  REMOTEINTERRUPTENABLE   ,Enable normal priority interrupt assertion at third expiration of the counter" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 13. " LOCALFIQENABLE          ,Enable high priority interrupt (FIQ) assertion at second expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 12. "  LOCALINTERRUPTENABLE   ,Enable normal priority interrupt assertion at first expiration of the counter" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "  PERIOD                 ,Measured in periods of the timer selected as source"
bitfld.long 0x00 0.--3. "        TIMERSOURCE             ,The timer source interpretation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x04++0x03
line.long 0x00 "WDTSR,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR            ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "  CURRENTEXPIRATIONCOUNT ,Current count of expiration since last start operation" "0,5,10,15,20,25,30,35"
hexmask.long.byte 0x00 4.--11. 1. "        CURRENTCOUNT           ,Current value of the downcounter"
bitfld.long 0x00 3. "        REMOTEINTERRUPTSTATUS   ,Current status of remote interrupt" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 2. " LOCALFIQSTATUS          ,Current status of FIQ" "Disabled,Enabled"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS   ,Current status of local interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "  ENABLED                ,Enabled configuration of the WDT" "Disabled,Enabled"
group.long 0x08++0x07
line.long 0x00 "WDTCMDR,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER          ,Disable watchdog counter" "No,Yes"
bitfld.long 0x00 0. "       STARTCOUNTER           ,Enable the counter operation" "Disabled,Enabled"
line.long 0x04 "WDTUR,Watchdog Timer Unlock Register"
if (((per.l(ad:0x030D0000+0x08))&0x2)==0x02)&&(((per.l(ad:0x030D0000+0x08))&0x1)==0x0)
group.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
else
rgroup.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
endif
group.long 0x14++0x03
line.long 0x00 "WDTSCR,Watchdog Security Control register"
bitfld.long 0x00 29. " SEC_LCK                 ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN                ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER               ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7                     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6                    ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5                    ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4                     ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3                     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2                    ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0                     ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W                     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W                    ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W                     ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W                     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W                    ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W                    ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W                     ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R                     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                    ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                     ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R                     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R                    ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R                     ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree "WDT2"
base ad:0x030E0000
width 10.
group.long 0x00++0x03
line.long 0x00 "WDTCR,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WRDM                    ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "        ERRORTHRESHOLD         ,The WDT logic asserts an error signal to HSM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "         TSCREFERENCEENABLE     ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
bitfld.long 0x00 18. "  CHALLENGERESPONSEENABLE ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 17. " WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "  SYSTEMPORESETENABLE    ,Enable internal full system reset at fifth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 15. "  SYSTEMDEBUGRESETENABLE ,Enable system wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "  REMOTEINTERRUPTENABLE   ,Enable normal priority interrupt assertion at third expiration of the counter" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 13. " LOCALFIQENABLE          ,Enable high priority interrupt (FIQ) assertion at second expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 12. "  LOCALINTERRUPTENABLE   ,Enable normal priority interrupt assertion at first expiration of the counter" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "  PERIOD                 ,Measured in periods of the timer selected as source"
bitfld.long 0x00 0.--3. "        TIMERSOURCE             ,The timer source interpretation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x04++0x03
line.long 0x00 "WDTSR,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR            ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "  CURRENTEXPIRATIONCOUNT ,Current count of expiration since last start operation" "0,5,10,15,20,25,30,35"
hexmask.long.byte 0x00 4.--11. 1. "        CURRENTCOUNT           ,Current value of the downcounter"
bitfld.long 0x00 3. "        REMOTEINTERRUPTSTATUS   ,Current status of remote interrupt" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 2. " LOCALFIQSTATUS          ,Current status of FIQ" "Disabled,Enabled"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS   ,Current status of local interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "  ENABLED                ,Enabled configuration of the WDT" "Disabled,Enabled"
group.long 0x08++0x07
line.long 0x00 "WDTCMDR,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER          ,Disable watchdog counter" "No,Yes"
bitfld.long 0x00 0. "       STARTCOUNTER           ,Enable the counter operation" "Disabled,Enabled"
line.long 0x04 "WDTUR,Watchdog Timer Unlock Register"
if (((per.l(ad:0x030E0000+0x08))&0x2)==0x02)&&(((per.l(ad:0x030E0000+0x08))&0x1)==0x0)
group.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
else
rgroup.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
endif
group.long 0x14++0x03
line.long 0x00 "WDTSCR,Watchdog Security Control register"
bitfld.long 0x00 29. " SEC_LCK                 ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN                ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER               ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7                     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6                    ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5                    ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4                     ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3                     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2                    ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0                     ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W                     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W                    ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W                     ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W                     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W                    ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W                    ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W                     ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R                     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                    ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                     ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R                     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R                    ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R                     ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree.end
tree.end
tree "BPMP Timers"
tree "BPMP GTE"
base ad:0x0D1E0000
width 13.
group.long 0x00++0x03
line.long 0x00 "TECTRL,Generic TimeStamp Engine Control register"
bitfld.long 0x00 0. " ENABLE    ,Enable this timestamp engine" "Disabled,Enabled"
bitfld.long 0x00 1. "  INTERRUPTENABLE ,Enable generation of interrupt based on FIFO occupancy" "Disabled,Enabled"
bitfld.long 0x00 2. "      AUTOADVENABLE ,Enable automatic advance of the FIFO for DMA purpose" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "  AUTOADVADDR ,Auto advance address for FIFO reading" "0,1,2,3"
hexmask.long.byte 0x00 8.--15. 1. "  OCCUPANCYTHRESHOLD ,Generate an interrupt if the FIFO occupancy is larger than this limit"
rgroup.long 0x04++0x17
line.long 0x00 "TETSCH,Timestamp Engine TSC High Register"
hexmask.long.tbyte 0x00 0.--23. 1. " VAL       ,TSC[55:32] for the captured event at the FIFO head"
line.long 0x04 "TETSCL,Timestamp Engine TSC Low Register"
line.long 0x08 "TESRC,Timestamp Engine Source Register"
hexmask.long.byte 0x08 24.--31. 1. " MODULE    ,Identifies the specific timestamp engine as the source for this event"
hexmask.long.byte 0x08 16.--23. 1. "        SLICE           ,Indicate the slice for the captured event at the FIFO head"
hexmask.long.word 0x08 0.--15. 1. "            TAG           ,Tag"
line.long 0x0C "TECPCV,Timestamp Engine Current Captured Value Register"
line.long 0x10 "TEPPCV,Timestamp Engine Previous Captured Value Register"
line.long 0x14 "TEENCV,Timestamp Engine Encode with Valid Register"
bitfld.long 0x14 31. " INVALID   ,Indicates that the other field do not carry any valid information" "Disabled,Enabled"
bitfld.long 0x14 16. "  FALLING         ,Direction of the change for the identified bit" "Encoded,No encoded"
hexmask.long.byte 0x14 5.--12. 1. "    SLICE         ,Indicate the slice for the captured event at the FIFO head"
bitfld.long 0x14 0.--4. "        BITINDEX    ,Bit index in the slice of bit that flipped between the current and previous value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1C++0x03
line.long 0x00 "TECMD,Timestamp Engine Command Register"
bitfld.long 0x00 0.--3. " CMD       ,Command to execute" "NOP,POP,?..."
rgroup.long 0x20++0x03
line.long 0x00 "TESTATUS,Timestamp Engine Status Register"
hexmask.long.byte 0x00 8.--15. 1. " OCCUPANCY ,Current FIFO occupancy"
bitfld.long 0x00 1. "        INTERRUPTLEVEL  ,The current level of the interrupt signal" "No interrupt,Interrupt"
group.long 0x1000++0x07
line.long 0x00 "TESCR,Access Rights Security Control Register"
bitfld.long 0x00 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN         ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN       ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x00 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6             ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5           ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2             ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1           ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W             ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W           ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W             ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W           ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R             ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R           ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R             ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R           ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "TEDSCR,Security Control Domain Register"
bitfld.long 0x04 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "  SEC_WEN         ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "      SEC_REN       ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "  SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x04 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "  PR6             ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "      PR5           ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "  PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "  PR2             ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "      PR1           ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "  PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "  G6W             ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "      G5W           ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "  G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "  G2W             ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "      G1W           ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "  G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "  G6R             ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "      G5R           ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "  G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "  G2R             ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "      G1R           ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "  G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x60++0x07
line.long 0x00 "TETEN,Timestamp Enable Bitmap Register"
line.long 0x04 "TETDN,Timestamp Disable Bitmap Register"
width 0x0B
tree.end
tree "BPMP Shared"
base ad:0x0D0F0000
width 10.
rgroup.long 0x00++0x0F
line.long 0x00 "TKETSC0,TKE BPMP Shared TSC0 counter Register"
line.long 0x04 "TKETSC1,TKE BPMP Shared TSC1 counter Register"
line.long 0x08 "TKEUSEC,TKE BPMP Shared USEC counter Register"
line.long 0x0C "TKEOSC,TKE BPMP Shared OSC counter Register"
group.long 0x10++0x07
line.long 0x00 "TKECR,TKE BPMP Shared Control Register"
bitfld.long 0x00 3. " HDBG    ,Halt-on-debug" "No asserted,Asserted"
bitfld.long 0x00 2. "  OSC_DIS ,Disable the local OSC counter" "No,Yes"
bitfld.long 0x00 1. "          USEC_DIS ,Disable the local USEC counter" "No,Yes"
bitfld.long 0x00 0. "          TSC_DIS   ,Disable the local TSC" "No,Yes"
line.long 0x04 "CLKOVRON,TKE BPMP Shared CLK OVR ON Register"
bitfld.long 0x04 0. " OSC     ,SLCG override bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "BPMP NV Timers"
tree "TMR0"
base ad:0x0D100000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR0,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR0,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR0,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR0,TMR Security Control Register 0"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR1"
base ad:0x0D110000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR1,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR1,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR1,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR1,TMR Security Control Register 1"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR2"
base ad:0x0D120000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR2,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR2,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR2,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR2,TMR Security Control Register 2"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR3"
base ad:0x0D130000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR3,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR3,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR3,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR3,TMR Security Control Register 3"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "BPMP WatchDog Timers"
base ad:0x0D140000
width 10.
group.long 0x00++0x03
line.long 0x00 "WDTCR,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WRDM                    ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "        ERRORTHRESHOLD         ,The WDT logic asserts an error signal to HSM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "         TSCREFERENCEENABLE     ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
bitfld.long 0x00 18. "  CHALLENGERESPONSEENABLE ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 17. " WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "  SYSTEMPORESETENABLE    ,Enable internal full system reset at fifth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 15. "  SYSTEMDEBUGRESETENABLE ,Enable system wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "  REMOTEINTERRUPTENABLE   ,Enable normal priority interrupt assertion at third expiration of the counter" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 13. " LOCALFIQENABLE          ,Enable high priority interrupt (FIQ) assertion at second expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 12. "  LOCALINTERRUPTENABLE   ,Enable normal priority interrupt assertion at first expiration of the counter" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "  PERIOD                 ,Measured in periods of the timer selected as source"
bitfld.long 0x00 0.--3. "        TIMERSOURCE             ,The timer source interpretation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x04++0x03
line.long 0x00 "WDTSR,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR            ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "  CURRENTEXPIRATIONCOUNT ,Current count of expiration since last start operation" "0,5,10,15,20,25,30,35"
hexmask.long.byte 0x00 4.--11. 1. "        CURRENTCOUNT           ,Current value of the downcounter"
bitfld.long 0x00 3. "        REMOTEINTERRUPTSTATUS   ,Current status of remote interrupt" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 2. " LOCALFIQSTATUS          ,Current status of FIQ" "Disabled,Enabled"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS   ,Current status of local interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "  ENABLED                ,Enabled configuration of the WDT" "Disabled,Enabled"
group.long 0x08++0x07
line.long 0x00 "WDTCMDR,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER          ,Disable watchdog counter" "No,Yes"
bitfld.long 0x00 0. "       STARTCOUNTER           ,Enable the counter operation" "Disabled,Enabled"
line.long 0x04 "WDTUR,Watchdog Timer Unlock Register"
if (((per.l(ad:0x0D140000+0x08))&0x2)==0x02)&&(((per.l(ad:0x0D140000+0x08))&0x1)==0x0)
group.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
else
rgroup.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
endif
group.long 0x14++0x03
line.long 0x00 "WDTSCR,Watchdog Security Control register"
bitfld.long 0x00 29. " SEC_LCK                 ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN                ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER               ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7                     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6                    ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5                    ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4                     ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3                     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2                    ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0                     ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W                     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W                    ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W                     ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W                     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W                    ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W                    ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W                     ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R                     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                    ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                     ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R                     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R                    ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R                     ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree.end
tree "SCE Timers"
tree "SCE GTE"
base ad:0x0B1E0000
width 13.
group.long 0x00++0x03
line.long 0x00 "TECTRL,Generic TimeStamp Engine Control register"
bitfld.long 0x00 0. " ENABLE    ,Enable this timestamp engine" "Disabled,Enabled"
bitfld.long 0x00 1. "  INTERRUPTENABLE ,Enable generation of interrupt based on FIFO occupancy" "Disabled,Enabled"
bitfld.long 0x00 2. "      AUTOADVENABLE ,Enable automatic advance of the FIFO for DMA purpose" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "  AUTOADVADDR ,Auto advance address for FIFO reading" "0,1,2,3"
hexmask.long.byte 0x00 8.--15. 1. "  OCCUPANCYTHRESHOLD ,Generate an interrupt if the FIFO occupancy is larger than this limit"
rgroup.long 0x04++0x17
line.long 0x00 "TETSCH,Timestamp Engine TSC High Register"
hexmask.long.tbyte 0x00 0.--23. 1. " VAL       ,TSC[55:32] for the captured event at the FIFO head"
line.long 0x04 "TETSCL,Timestamp Engine TSC Low Register"
line.long 0x08 "TESRC,Timestamp Engine Source Register"
hexmask.long.byte 0x08 24.--31. 1. " MODULE    ,Identifies the specific timestamp engine as the source for this event"
hexmask.long.byte 0x08 16.--23. 1. "        SLICE           ,Indicate the slice for the captured event at the FIFO head"
hexmask.long.word 0x08 0.--15. 1. "            TAG           ,Tag"
line.long 0x0C "TECPCV,Timestamp Engine Current Captured Value Register"
line.long 0x10 "TEPPCV,Timestamp Engine Previous Captured Value Register"
line.long 0x14 "TEENCV,Timestamp Engine Encode with Valid Register"
bitfld.long 0x14 31. " INVALID   ,Indicates that the other field do not carry any valid information" "Disabled,Enabled"
bitfld.long 0x14 16. "  FALLING         ,Direction of the change for the identified bit" "Encoded,No encoded"
hexmask.long.byte 0x14 5.--12. 1. "    SLICE         ,Indicate the slice for the captured event at the FIFO head"
bitfld.long 0x14 0.--4. "        BITINDEX    ,Bit index in the slice of bit that flipped between the current and previous value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1C++0x03
line.long 0x00 "TECMD,Timestamp Engine Command Register"
bitfld.long 0x00 0.--3. " CMD       ,Command to execute" "NOP,POP,?..."
rgroup.long 0x20++0x03
line.long 0x00 "TESTATUS,Timestamp Engine Status Register"
hexmask.long.byte 0x00 8.--15. 1. " OCCUPANCY ,Current FIFO occupancy"
bitfld.long 0x00 1. "        INTERRUPTLEVEL  ,The current level of the interrupt signal" "No interrupt,Interrupt"
group.long 0x1000++0x07
line.long 0x00 "TESCR,Access Rights Security Control Register"
bitfld.long 0x00 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN         ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN       ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x00 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6             ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5           ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2             ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1           ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W             ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W           ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W             ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W           ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R             ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R           ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R             ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R           ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "TEDSCR,Security Control Domain Register"
bitfld.long 0x04 29. " SEC_LCK   ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "  SEC_WEN         ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "      SEC_REN       ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "  SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x04 23. " PR7       ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "  PR6             ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "      PR5           ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "  PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 19. " PR3       ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "  PR2             ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "      PR1           ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "  PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 15. " G7W       ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "  G6W             ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "      G5W           ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "  G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 11. " G3W       ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "  G2W             ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "      G1W           ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "  G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 7. " G7R       ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "  G6R             ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "      G5R           ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "  G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x04 3. " G3R       ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "  G2R             ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "      G1R           ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "  G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x60++0x07
line.long 0x00 "TETEN,Timestamp Enable Bitmap Register"
line.long 0x04 "TETDN,Timestamp Disable Bitmap Register"
width 0x0B
tree.end
tree "SCE Shared"
base ad:0x0B0F0000
width 10.
rgroup.long 0x00++0x0F
line.long 0x00 "TKETSC0,TKE SCE Shared TSC0 Counter Register"
line.long 0x04 "TKETSC1,TKE SCE Shared TSC1 Counter Register"
line.long 0x08 "TKEUSEC,TKE SCE Shared USEC Counter Register"
line.long 0x0C "TKEOSC,TKE SCE Shared OSC Counter Register"
group.long 0x10++0x07
line.long 0x00 "TKECR,TKE SCE Shared Control Register"
bitfld.long 0x00 3. " HDBG    ,Halt-on-debug" "No asserted,Asserted"
bitfld.long 0x00 2. "  OSC_DIS ,Disable the local OSC counter" "No,Yes"
bitfld.long 0x00 1. "          USEC_DIS ,Disable the local USEC counter" "No,Yes"
bitfld.long 0x00 0. "          TSC_DIS   ,Disable the local TSC" "No,Yes"
line.long 0x04 "CLKOVRON,TKE SCE Shared CLK OVR ON register"
bitfld.long 0x04 0. " OSC     ,SLCG override bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "SCE NV Timers"
tree "TMR0"
base ad:0x0D100000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR0,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR0,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR0,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR0,TMR Security Control Register 0"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR1"
base ad:0x0D110000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR1,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR1,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR1,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR1,TMR Security Control Register 1"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR2"
base ad:0x0D120000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR2,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR2,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR2,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR2,TMR Security Control Register 2"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree "TMR3"
base ad:0x0B130000
width 13.
group.long 0x00++0x0F
line.long 0x00 "TMRCR3,Timer Configuration Register"
bitfld.long 0x00 31. " EN       ,Enable countdown process" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER     ,Periodic" "No set,Set"
hexmask.long 0x00 0.--28. 1. "    PTV     ,Timer Present Trigger Value"
line.long 0x04 "TMRSR3,Timer Status Register"
bitfld.long 0x04 30. " INTR_CLR ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV     ,Current counter value"
line.long 0x08 "TMRCSSR3,Timer Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID   ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
line.long 0x0C "TMRSCR3,TMR Security Control Register 3"
bitfld.long 0x0C 29. " SEC_LCK  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "          SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                      "
bitfld.long 0x0C 23. " PR7      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "          PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 19. " PR3      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "          PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 15. " G7W      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "          G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 11. " G3W      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "          G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 7. " G7R      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "          G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                      "
bitfld.long 0x0C 3. " G3R      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "          G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "SCE WatchDog Timers"
base ad:0x0B140000
width 10.
group.long 0x00++0x03
line.long 0x00 "WDTCR,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WRDM                    ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "        ERRORTHRESHOLD         ,The WDT logic asserts an error signal to HSM" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "         TSCREFERENCEENABLE     ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
bitfld.long 0x00 18. "  CHALLENGERESPONSEENABLE ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 17. " WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "  SYSTEMPORESETENABLE    ,Enable internal full system reset at fifth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 15. "  SYSTEMDEBUGRESETENABLE ,Enable system wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "  REMOTEINTERRUPTENABLE   ,Enable normal priority interrupt assertion at third expiration of the counter" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 13. " LOCALFIQENABLE          ,Enable high priority interrupt (FIQ) assertion at second expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 12. "  LOCALINTERRUPTENABLE   ,Enable normal priority interrupt assertion at first expiration of the counter" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "  PERIOD                 ,Measured in periods of the timer selected as source"
bitfld.long 0x00 0.--3. "        TIMERSOURCE             ,The timer source interpretation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x04++0x03
line.long 0x00 "WDTSR,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR            ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "  CURRENTEXPIRATIONCOUNT ,Current count of expiration since last start operation" "0,5,10,15,20,25,30,35"
hexmask.long.byte 0x00 4.--11. 1. "        CURRENTCOUNT           ,Current value of the downcounter"
bitfld.long 0x00 3. "        REMOTEINTERRUPTSTATUS   ,Current status of remote interrupt" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 2. " LOCALFIQSTATUS          ,Current status of FIQ" "Disabled,Enabled"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS   ,Current status of local interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "  ENABLED                ,Enabled configuration of the WDT" "Disabled,Enabled"
group.long 0x08++0x07
line.long 0x00 "WDTCMDR,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER          ,Disable watchdog counter" "No,Yes"
bitfld.long 0x00 0. "       STARTCOUNTER           ,Enable the counter operation" "Disabled,Enabled"
line.long 0x04 "WDTUR,Watchdog Timer Unlock Register"
if (((per.l(ad:0x0B140000+0x08))&0x2)==0x02)&&(((per.l(ad:0x0B140000+0x08))&0x1)==0x0)
group.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
else
rgroup.long 0x10++0x03
line.long 0x00 "WDTSCOR,Watchdog Timer Skip Configuration Register"
bitfld.long 0x00 12.--14. " SKIP3                   ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "         SKIP2                  ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--6. "         SKIP1                  ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "         SKIP0                   ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
endif
group.long 0x14++0x03
line.long 0x00 "WDTSCR,Watchdog Security Control register"
bitfld.long 0x00 29. " SEC_LCK                 ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN                ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN                ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER               ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                   "
bitfld.long 0x00 23. " PR7                     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6                    ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5                    ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4                     ,Privileged mode bit 4" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 19. " PR3                     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2                    ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1                    ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0                     ,Privileged mode bit 0" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 15. " G7W                     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W                    ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W                    ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W                     ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 11. " G3W                     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W                    ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W                    ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W                     ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 7. " G7R                     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R                    ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R                    ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R                     ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                   "
bitfld.long 0x00 3. " G3R                     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R                    ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R                    ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R                     ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0b
tree.end
tree.end
tree.end
tree.open "GPIO Controller/Pin MUX (Pinmuxing)"
tree "GPIO Registers"
tree "Controller 0"
tree "GPIO_PORT_N"
base ad:0x02210000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_N_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_N_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_N_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_N_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_N_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_N_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_N_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_N_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_N_VM_4_0,Virtual machine register 4 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_N_SCR_4_0,Security control register 4 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_N_VM_5_0,Virtual machine register 5 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_N_SCR_5_0,Security control register 5 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_N_VM_6_0,Virtual machine register 6 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_N_SCR_6_0,Security control register 6 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_O"
base ad:0x02210040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_O_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_O_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_O_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_O_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_O_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_O_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_O_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_O_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_Q"
base ad:0x02210080
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_Q_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_Q_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_Q_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_Q_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_Q_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_Q_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_Q_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_Q_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_Q_VM_4_0,Virtual machine register 4 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_Q_SCR_4_0,Security control register 4 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_Q_VM_5_0,Virtual machine register 5 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_Q_SCR_5_0,Security control register 5 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_T"
base ad:0x022100C0
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_T_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_T_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_T_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_T_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_T_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_T_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_T_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_T_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_I"
base ad:0x02210100
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_I_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_I_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_I_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_I_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_I_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_I_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_I_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_I_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_I_VM_4_0,Virtual machine register 4 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_I_SCR_4_0,Security control register 4 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_I_VM_5_0,Virtual machine register 5 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_I_SCR_5_0,Security control register 5 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_I_VM_6_0,Virtual machine register 6 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_I_SCR_6_0,Security control register 6 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "GPIO_I_VM_7_0,Virtual machine register 7 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x38)++0x03
line.long 0x00 "GPIO_I_SCR_7_0,Security control register 7 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_R"
base ad:0x02210140
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_R_VM_0_0,Virtual machine register 0 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_R_SCR_0_0,Security control register 0 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_R_VM_1_0,Virtual machine register 1 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_R_SCR_1_0,Security control register 1 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_R_VM_2_0,Virtual machine register 2 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_R_SCR_2_0,Security control register 2 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_R_VM_3_0,Virtual machine register 3 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_R_SCR_3_0,Security control register 3 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_R_VM_4_0,Virtual machine register 4 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_R_SCR_4_0,Security control register 4 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_R_VM_5_0,Virtual machine register 5 for the GPIO port 0"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_R_SCR_5_0,Security control register 5 for the GPIO port 0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL0_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL0_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL0_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL0_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL0_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 1"
tree "GPIO_PORT_H"
base ad:0x02221000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_H_VM_0_0,Virtual machine register 0 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_H_SCR_0_0,Security control register 0 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_H_VM_1_0,Virtual machine register 1 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_H_SCR_1_0,Security control register 1 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_H_VM_2_0,Virtual machine register 2 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_H_SCR_2_0,Security control register 2 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_H_VM_3_0,Virtual machine register 3 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_H_SCR_3_0,Security control register 3 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_H_VM_4_0,Virtual machine register 4 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_H_SCR_4_0,Security control register 4 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_H_VM_5_0,Virtual machine register 5 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_H_SCR_5_0,Security control register 5 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_H_VM_6_0,Virtual machine register 6 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_H_SCR_6_0,Security control register 6 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL1_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL1_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL1_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL1_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_L"
base ad:0x02221040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_L_VM_0_0,Virtual machine register 0 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_L_SCR_0_0,Security control register 0 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_L_VM_1_0,Virtual machine register 1 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_L_SCR_1_0,Security control register 1 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_L_VM_2_0,Virtual machine register 2 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_L_SCR_2_0,Security control register 2 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_L_VM_3_0,Virtual machine register 3 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_L_SCR_3_0,Security control register 3 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_L_VM_4_0,Virtual machine register 4 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_L_SCR_4_0,Security control register 4 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_L_VM_5_0,Virtual machine register 5 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_L_SCR_5_0,Security control register 5 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_L_VM_6_0,Virtual machine register 6 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_L_SCR_6_0,Security control register 6 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "GPIO_L_VM_7_0,Virtual machine register 7 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x38)++0x03
line.long 0x00 "GPIO_L_SCR_7_0,Security control register 7 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL1_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL1_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL1_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL1_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_X"
base ad:0x02221080
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_X_VM_0_0,Virtual machine register 0 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_X_SCR_0_0,Security control register 0 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_X_VM_1_0,Virtual machine register 1 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_X_SCR_1_0,Security control register 1 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_X_VM_2_0,Virtual machine register 2 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_X_SCR_2_0,Security control register 2 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_X_VM_3_0,Virtual machine register 3 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_X_SCR_3_0,Security control register 3 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_X_VM_4_0,Virtual machine register 4 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_X_SCR_4_0,Security control register 4 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_X_VM_5_0,Virtual machine register 5 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_X_SCR_5_0,Security control register 5 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_X_VM_6_0,Virtual machine register 6 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_X_SCR_6_0,Security control register 6 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "GPIO_X_VM_7_0,Virtual machine register 7 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x38)++0x03
line.long 0x00 "GPIO_X_SCR_7_0,Security control register 7 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL1_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL1_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL1_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL1_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_Y"
base ad:0x022210C0
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_Y_VM_0_0,Virtual machine register 0 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_Y_SCR_0_0,Security control register 0 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_Y_VM_1_0,Virtual machine register 1 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_Y_SCR_1_0,Security control register 1 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_Y_VM_2_0,Virtual machine register 2 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_Y_SCR_2_0,Security control register 2 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_Y_VM_3_0,Virtual machine register 3 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_Y_SCR_3_0,Security control register 3 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_Y_VM_4_0,Virtual machine register 4 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_Y_SCR_4_0,Security control register 4 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_Y_VM_5_0,Virtual machine register 5 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_Y_SCR_5_0,Security control register 5 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_Y_VM_6_0,Virtual machine register 6 for the GPIO port 1"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_Y_SCR_6_0,Security control register 6 for the GPIO port 1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL1_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL1_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL1_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL1_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL1_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 2"
tree "GPIO_PORT_A"
base ad:0x02232000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_A_VM_0_0,Virtual machine register 0 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_A_SCR_0_0,Security control register 0 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_A_VM_1_0,Virtual machine register 1 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_A_SCR_1_0,Security control register 1 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_A_VM_2_0,Virtual machine register 2 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_A_SCR_2_0,Security control register 2 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_A_VM_3_0,Virtual machine register 3 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_A_SCR_3_0,Security control register 3 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_A_VM_4_0,Virtual machine register 4 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_A_SCR_4_0,Security control register 4 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_A_VM_5_0,Virtual machine register 5 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_A_SCR_5_0,Security control register 5 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_A_VM_6_0,Virtual machine register 6 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_A_SCR_6_0,Security control register 6 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL2_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL2_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL2_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL2_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_E"
base ad:0x02232040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_E_VM_0_0,Virtual machine register 0 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_E_SCR_0_0,Security control register 0 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_E_VM_1_0,Virtual machine register 1 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_E_SCR_1_0,Security control register 1 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_E_VM_2_0,Virtual machine register 2 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_E_SCR_2_0,Security control register 2 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_E_VM_3_0,Virtual machine register 3 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_E_SCR_3_0,Security control register 3 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_E_VM_4_0,Virtual machine register 4 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_E_SCR_4_0,Security control register 4 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_E_VM_5_0,Virtual machine register 5 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_E_SCR_5_0,Security control register 5 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_E_VM_6_0,Virtual machine register 6 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_E_SCR_6_0,Security control register 6 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "GPIO_E_VM_7_0,Virtual machine register 7 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x38)++0x03
line.long 0x00 "GPIO_E_SCR_7_0,Security control register 7 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL2_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL2_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL2_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL2_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_F"
base ad:0x02232080
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_F_VM_0_0,Virtual machine register 0 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_F_SCR_0_0,Security control register 0 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_F_VM_1_0,Virtual machine register 1 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_F_SCR_1_0,Security control register 1 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_F_VM_2_0,Virtual machine register 2 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_F_SCR_2_0,Security control register 2 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_F_VM_3_0,Virtual machine register 3 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_F_SCR_3_0,Security control register 3 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_F_VM_4_0,Virtual machine register 4 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_F_SCR_4_0,Security control register 4 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_F_VM_5_0,Virtual machine register 5 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_F_SCR_5_0,Security control register 5 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL2_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL2_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL2_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL2_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_BB"
base ad:0x022320C0
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_BB_VM_0_0,Virtual machine register 0 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_BB_SCR_0_0,Security control register 0 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_BB_VM_1_0,Virtual machine register 1 for the GPIO port 2"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_BB_SCR_1_0,Security control register 1 for the GPIO port 2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL2_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL2_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL2_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL2_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL2_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 3"
tree "GPIO_PORT_B"
base ad:0x02243000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_B_VM_0_0,Virtual machine register 0 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_B_SCR_0_0,Security control register 0 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_B_VM_1_0,Virtual machine register 1 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_B_SCR_1_0,Security control register 1 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_B_VM_2_0,Virtual machine register 2 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_B_SCR_2_0,Security control register 2 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_B_VM_3_0,Virtual machine register 3 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_B_SCR_3_0,Security control register 3 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_B_VM_4_0,Virtual machine register 4 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_B_SCR_4_0,Security control register 4 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_B_VM_5_0,Virtual machine register 5 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_B_SCR_5_0,Security control register 5 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_B_VM_6_0,Virtual machine register 6 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_B_SCR_6_0,Security control register 6 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL3_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL3_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL3_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL3_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_C"
base ad:0x02243040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_C_VM_0_0,Virtual machine register 0 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_C_SCR_0_0,Security control register 0 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_C_VM_1_0,Virtual machine register 1 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_C_SCR_1_0,Security control register 1 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_C_VM_2_0,Virtual machine register 2 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_C_SCR_2_0,Security control register 2 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_C_VM_3_0,Virtual machine register 3 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_C_SCR_3_0,Security control register 3 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_C_VM_4_0,Virtual machine register 4 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_C_SCR_4_0,Security control register 4 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_C_VM_5_0,Virtual machine register 5 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_C_SCR_5_0,Security control register 5 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_C_VM_6_0,Virtual machine register 6 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_C_SCR_6_0,Security control register 6 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL3_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL3_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL3_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL3_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_D"
base ad:0x02243080
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_D_VM_0_0,Virtual machine register 0 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_D_SCR_0_0,Security control register 0 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_D_VM_1_0,Virtual machine register 1 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_D_SCR_1_0,Security control register 1 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_D_VM_2_0,Virtual machine register 2 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_D_SCR_2_0,Security control register 2 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_D_VM_3_0,Virtual machine register 3 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_D_SCR_3_0,Security control register 3 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_D_VM_4_0,Virtual machine register 4 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_D_SCR_4_0,Security control register 4 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_D_VM_5_0,Virtual machine register 5 for the GPIO port 3"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_D_SCR_5_0,Security control register 5 for the GPIO port 3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL3_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL3_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL3_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL3_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL3_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 4"
tree "GPIO_PORT_P"
base ad:0x02254000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_P_VM_0_0,Virtual machine register 0 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_P_SCR_0_0,Security control register 0 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_P_VM_1_0,Virtual machine register 1 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_P_SCR_1_0,Security control register 1 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_P_VM_2_0,Virtual machine register 2 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_P_SCR_2_0,Security control register 2 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_P_VM_3_0,Virtual machine register 3 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_P_SCR_3_0,Security control register 3 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_P_VM_4_0,Virtual machine register 4 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_P_SCR_4_0,Security control register 4 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_P_VM_5_0,Virtual machine register 5 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_P_SCR_5_0,Security control register 5 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_P_VM_6_0,Virtual machine register 6 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_P_SCR_6_0,Security control register 6 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL4_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL4_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL4_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL4_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL4_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL4_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_G"
base ad:0x02254040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_G_VM_0_0,Virtual machine register 0 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_G_SCR_0_0,Security control register 0 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_G_VM_1_0,Virtual machine register 1 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_G_SCR_1_0,Security control register 1 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_G_VM_2_0,Virtual machine register 2 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_G_SCR_2_0,Security control register 2 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_G_VM_3_0,Virtual machine register 3 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_G_SCR_3_0,Security control register 3 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_G_VM_4_0,Virtual machine register 4 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_G_SCR_4_0,Security control register 4 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_G_VM_5_0,Virtual machine register 5 for the GPIO port 4"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_G_SCR_5_0,Security control register 5 for the GPIO port 4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL4_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL4_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL4_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL4_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL4_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL4_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 5"
tree "GPIO_PORT_J"
base ad:0x02265000
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_J_VM_0_0,Virtual machine register 0 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_J_SCR_0_0,Security control register 0 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_J_VM_1_0,Virtual machine register 1 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_J_SCR_1_0,Security control register 1 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_J_VM_2_0,Virtual machine register 2 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_J_SCR_2_0,Security control register 2 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_J_VM_3_0,Virtual machine register 3 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_J_SCR_3_0,Security control register 3 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_J_VM_4_0,Virtual machine register 4 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_J_SCR_4_0,Security control register 4 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_J_VM_5_0,Virtual machine register 5 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_J_SCR_5_0,Security control register 5 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "GPIO_J_VM_6_0,Virtual machine register 6 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x30)++0x03
line.long 0x00 "GPIO_J_SCR_6_0,Security control register 6 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "GPIO_J_VM_7_0,Virtual machine register 7 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x38)++0x03
line.long 0x00 "GPIO_J_SCR_7_0,Security control register 7 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL5_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL5_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL5_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL5_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_K"
base ad:0x02265040
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_K_VM_0_0,Virtual machine register 0 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_K_SCR_0_0,Security control register 0 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL5_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL5_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL5_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL5_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_CC"
base ad:0x02265080
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_C_VM_0_0,Virtual machine register 0 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_C_SCR_0_0,Security control register 0 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_C_VM_1_0,Virtual machine register 1 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_C_SCR_1_0,Security control register 1 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_C_VM_2_0,Virtual machine register 2 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_C_SCR_2_0,Security control register 2 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_C_VM_3_0,Virtual machine register 3 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_C_SCR_3_0,Security control register 3 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL5_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL5_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL5_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL5_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree "GPIO_PORT_M"
base ad:0x022650C0
width 17.
group.long 0x0++0x03
line.long 0x00 "GPIO_M_VM_0_0,Virtual machine register 0 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x0)++0x03
line.long 0x00 "GPIO_M_SCR_0_0,Security control register 0 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "GPIO_M_VM_1_0,Virtual machine register 1 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x8)++0x03
line.long 0x00 "GPIO_M_SCR_1_0,Security control register 1 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "GPIO_M_VM_2_0,Virtual machine register 2 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x10)++0x03
line.long 0x00 "GPIO_M_SCR_2_0,Security control register 2 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "GPIO_M_VM_3_0,Virtual machine register 3 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x18)++0x03
line.long 0x00 "GPIO_M_SCR_3_0,Security control register 3 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "GPIO_M_VM_4_0,Virtual machine register 4 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x20)++0x03
line.long 0x00 "GPIO_M_SCR_4_0,Security control register 4 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "GPIO_M_VM_5_0,Virtual machine register 5 for the GPIO port 5"
bitfld.long 0x00 14.--15. " VM8     ,Virtual machine 8" "0,1,2,3"
bitfld.long 0x00 12.--13. "         VM7     ,Virtual machine 7" "0,1,2,3"
bitfld.long 0x00 10.--11. "         VM6     ,Virtual machine 6" "0,1,2,3"
bitfld.long 0x00 8.--9. "         VM5       ,Virtual machine 5" "0,1,2,3"
textline "                          "
bitfld.long 0x00 6.--7. " VM4     ,Virtual machine 4" "0,1,2,3"
bitfld.long 0x00 4.--5. "         VM3     ,Virtual machine 3" "0,1,2,3"
bitfld.long 0x00 2.--3. "         VM2     ,Virtual machine 2" "0,1,2,3"
bitfld.long 0x00 0.--1. "         VM1       ,Virtual machine 1" "0,1,2,3"
group.long (0x04+0x28)++0x03
line.long 0x00 "GPIO_M_SCR_5_0,Security control register 5 for the GPIO port 5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                          "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
textline "                          "
width 37.
group.long 0x800++0x03
line.long 0x00 "GPIO_CTL5_VM_SCR_0,SCR $2 for RM Hypervisor Configuration"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x804++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_SCR_0,SCR $2 for Guest OS Interrupt Status"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
rgroup.long 0x808++0x03
line.long 0x00 "GPIO_CTL5_INTERRUPT_STATUS_VM_0,Guest OS interrupt $2 is generated by the GPIO controller"
hexmask.long.byte 0x00 0.--7. 1. " GPIO_INTERRUPT_STATUS_VM ,Virtual Machine interrupt status"
group.long 0x80C++0x03
line.long 0x00 "GPIO_CTL5_SCR_0,CTL_SCR register $2"
bitfld.long 0x00 29. " SEC_LCK                  ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                              "
bitfld.long 0x00 23. " PR7                      ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " PR3                      ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " G7W                      ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " G3W                      ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " G7R                      ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " G3R                      ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x810++0x03
line.long 0x00 "GPIO_CTL5_ICG_EN_OVERRIDE_0,CTL_ICG_EN_OVERRIDE register $2"
bitfld.long 0x00 0. " GPIO_ICG_EN_OVERRIDE     ,Provide software control the clock gate" "Disabled,Enabled"
group.long 0x814++0x03
line.long 0x00 "GPIO_CTL5_SPARE_0,CTL_SPARE register $2"
hexmask.long.word 0x00 0.--15. 1. " SPARE                    ,Spare"
width 0x0B
tree.end
tree.end
tree "Controller 6"
tree "GPIO_PORT_FF"
base ad:0xC2F1000
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_FF_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_FF_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_FF_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_FF_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_FF_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_FF_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_FF_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_FF_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_FF_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_FF_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_FF_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_FF_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_FF_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_FF_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_FF_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_FF_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_FF_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_FF_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_FF_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_FF_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_FF_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_FF_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_FF_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_FF_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_FF_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_FF_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_FF_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_FF_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_FF_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_FF_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_FF_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_S"
base ad:0xC2F1200
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_S_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_S_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_S_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_S_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_S_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_S_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_S_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_S_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_S_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_S_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_S_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_S_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_S_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_S_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_S_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_S_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_S_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_S_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_S_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_S_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_S_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_S_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_S_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_S_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_S_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_S_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_S_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_S_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_S_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_S_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_S_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_U"
base ad:0xC2F1400
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xA0++0x17
line.long 0x00 "GPIO_U_ENABLE_CONFIG_5_0,GPIO Enable config register 5"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_U_DEBOUNCE_THRESHOLD_5_0,GPIO Debouce threshold register 5"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_U_INPUT_5_0,GPIO input 5"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_U_OUTPUT_CONTROL_5_0,GPIO output control register 5"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_U_OUTPUT_VALUE_5_0,GPIO output value register 5"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_U_INTERRUPT_CLEAR_5_0,GPIO interrupt clear register 5"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_U_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_EE"
base ad:0xC2F1600
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_EE_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_EE_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_EE_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_EE_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_EE_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_EE_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_EE_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_EE_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_EE_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_EE_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_EE_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_EE_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_EE_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_EE_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_EE_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_EE_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_EE_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_EE_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_EE_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_V"
base ad:0xC2F1800
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xA0++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_5_0,GPIO Enable config register 5"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_5_0,GPIO Debouce threshold register 5"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_5_0,GPIO input 5"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_5_0,GPIO output control register 5"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_5_0,GPIO output value register 5"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_5_0,GPIO interrupt clear register 5"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xC0++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_6_0,GPIO Enable config register 6"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_6_0,GPIO Debouce threshold register 6"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_6_0,GPIO input 6"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_6_0,GPIO output control register 6"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_6_0,GPIO output value register 6"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_6_0,GPIO interrupt clear register 6"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xE0++0x17
line.long 0x00 "GPIO_V_ENABLE_CONFIG_7_0,GPIO Enable config register 7"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_V_DEBOUNCE_THRESHOLD_7_0,GPIO Debouce threshold register 7"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_V_INPUT_7_0,GPIO input 7"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_V_OUTPUT_CONTROL_7_0,GPIO output control register 7"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_V_OUTPUT_VALUE_7_0,GPIO output value register 7"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_V_INTERRUPT_CLEAR_7_0,GPIO interrupt clear register 7"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_V_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_W"
base ad:0xC2F1A00
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xA0++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_5_0,GPIO Enable config register 5"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_5_0,GPIO Debouce threshold register 5"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_5_0,GPIO input 5"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_5_0,GPIO output control register 5"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_5_0,GPIO output value register 5"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_5_0,GPIO interrupt clear register 5"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xC0++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_6_0,GPIO Enable config register 6"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_6_0,GPIO Debouce threshold register 6"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_6_0,GPIO input 6"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_6_0,GPIO output control register 6"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_6_0,GPIO output value register 6"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_6_0,GPIO interrupt clear register 6"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xE0++0x17
line.long 0x00 "GPIO_W_ENABLE_CONFIG_7_0,GPIO Enable config register 7"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_W_DEBOUNCE_THRESHOLD_7_0,GPIO Debouce threshold register 7"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_W_INPUT_7_0,GPIO input 7"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_W_OUTPUT_CONTROL_7_0,GPIO output control register 7"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_W_OUTPUT_VALUE_7_0,GPIO output value register 7"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_W_INTERRUPT_CLEAR_7_0,GPIO interrupt clear register 7"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_W_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_AA"
base ad:0xC2F1C00
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x80++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_4_0,GPIO Enable config register 4"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_4_0,GPIO Debouce threshold register 4"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_4_0,GPIO input 4"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_4_0,GPIO output control register 4"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_4_0,GPIO output value register 4"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_4_0,GPIO interrupt clear register 4"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xA0++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_5_0,GPIO Enable config register 5"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_5_0,GPIO Debouce threshold register 5"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_5_0,GPIO input 5"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_5_0,GPIO output control register 5"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_5_0,GPIO output value register 5"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_5_0,GPIO interrupt clear register 5"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xC0++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_6_0,GPIO Enable config register 6"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_6_0,GPIO Debouce threshold register 6"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_6_0,GPIO input 6"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_6_0,GPIO output control register 6"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_6_0,GPIO output value register 6"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_6_0,GPIO interrupt clear register 6"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0xE0++0x17
line.long 0x00 "GPIO_AA_ENABLE_CONFIG_7_0,GPIO Enable config register 7"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_AA_DEBOUNCE_THRESHOLD_7_0,GPIO Debouce threshold register 7"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_AA_INPUT_7_0,GPIO input 7"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_AA_OUTPUT_CONTROL_7_0,GPIO output control register 7"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_AA_OUTPUT_VALUE_7_0,GPIO output value register 7"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_AA_INTERRUPT_CLEAR_7_0,GPIO interrupt clear register 7"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_AA_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree "GPIO_PORT_Z"
base ad:0xC2F1E00
width 32.
group.long 0x0++0x17
line.long 0x00 "GPIO_Z_ENABLE_CONFIG_0_0,GPIO Enable config register 0"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_Z_DEBOUNCE_THRESHOLD_0_0,GPIO Debouce threshold register 0"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_Z_INPUT_0_0,GPIO input 0"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_Z_OUTPUT_CONTROL_0_0,GPIO output control register 0"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_Z_OUTPUT_VALUE_0_0,GPIO output value register 0"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_Z_INTERRUPT_CLEAR_0_0,GPIO interrupt clear register 0"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x20++0x17
line.long 0x00 "GPIO_Z_ENABLE_CONFIG_1_0,GPIO Enable config register 1"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_Z_DEBOUNCE_THRESHOLD_1_0,GPIO Debouce threshold register 1"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_Z_INPUT_1_0,GPIO input 1"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_Z_OUTPUT_CONTROL_1_0,GPIO output control register 1"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_Z_OUTPUT_VALUE_1_0,GPIO output value register 1"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_Z_INTERRUPT_CLEAR_1_0,GPIO interrupt clear register 1"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x40++0x17
line.long 0x00 "GPIO_Z_ENABLE_CONFIG_2_0,GPIO Enable config register 2"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_Z_DEBOUNCE_THRESHOLD_2_0,GPIO Debouce threshold register 2"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_Z_INPUT_2_0,GPIO input 2"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_Z_OUTPUT_CONTROL_2_0,GPIO output control register 2"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_Z_OUTPUT_VALUE_2_0,GPIO output value register 2"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_Z_INTERRUPT_CLEAR_2_0,GPIO interrupt clear register 2"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
group.long 0x60++0x17
line.long 0x00 "GPIO_Z_ENABLE_CONFIG_3_0,GPIO Enable config register 3"
bitfld.long 0x00 7. " TIMESTAMPING_FUNCTION    ,Timestamping function" "Disabled,Enabled"
bitfld.long 0x00 6. "     INTERRUPT_FUNCTION ,Interrupt function" "Disabled,Enabled"
bitfld.long 0x00 5. "  DEBOUNCE_FUNCTION ,Debounce function" "Disabled,Enabled"
bitfld.long 0x00 4. "  TRIGGER_LEVEL ,Trigger level" "Low,High"
textline "                                         "
bitfld.long 0x00 2.--3. " TRIGGER_TYPE             ,Trigger type" "No trigger,Level,Single edge,Double edge"
bitfld.long 0x00 1. "  IN_OUT             ,In out" "In,Out"
bitfld.long 0x00 0. "       GPIO_ENABLE       ,GPIO enable" "Disabled,Enabled"
line.long 0x04 "GPIO_Z_DEBOUNCE_THRESHOLD_3_0,GPIO Debouce threshold register 3"
hexmask.long.byte 0x04 0.--7. 1. " DEBOUNCE_THRESHOLD       ,Debouce threshold"
line.long 0x08 "GPIO_Z_INPUT_3_0,GPIO input 3"
rbitfld.long 0x08 0. " GPIO_IN                  ,GPIO input" "Disabled,Enabled"
line.long 0x0C "GPIO_Z_OUTPUT_CONTROL_3_0,GPIO output control register 3"
bitfld.long 0x0C 0. " GPIO_OUT_CONTROL         ,GPIO output control" "Driven,Floated"
line.long 0x10 "GPIO_Z_OUTPUT_VALUE_3_0,GPIO output value register 3"
bitfld.long 0x10 0. " GPIO_OUT_VAL             ,GPIO output value" "Disabled,Enabled"
line.long 0x14 "GPIO_Z_INTERRUPT_CLEAR_3_0,GPIO interrupt clear register 3"
bitfld.long 0x14 0. " GPIO_INTERRUPT_CLEAR     ,GPIO interrupt clear" "Not clear,Clear"
rgroup.long 0++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G0_0,GPIO interrupt status register 0"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 1++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G1_0,GPIO interrupt status register 1"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 2++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G2_0,GPIO interrupt status register 2"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 3++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G3_0,GPIO interrupt status register 3"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 4++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G4_0,GPIO interrupt status register 4"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 5++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G5_0,GPIO interrupt status register 5"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 6++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G6_0,GPIO interrupt status register 6"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
rgroup.long 7++0x03
line.long 0x00 "GPIO_Z_INTERRUPT_STATUS_G7_0,GPIO interrupt status register 7"
hexmask.long.byte 0x00 0.--6. 1. " GPIO_INTERRUPT_STATUS    ,GPIO interrupt status"
width 0x0B
tree.end
tree.end
tree.end
tree "Pinmux Registers"
base ad:0x0C301000
width 42.
group.long 0x2000++0x5F
line.long 0x00 "PADCTL_AO_HV_CAN_GPIO7_0,PADCTL Always ON GPIO7 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x00 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "None,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" ",WDT,?..."
line.long 0x04 "PADCTL_AO_HV_CFG2TMC_CAN_GPIO7_0,PADCTL Always ON CFG2TMC GPIO7 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_AO_HV_CAN1_DOUT_0,PADCTL Always ON CAN1 DOUT Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x08 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" "CAN1,?..."
line.long 0x0C "PADCTL_AO_HV_CFG2TMC_CAN1_DOUT_0,PADCTL Always ON CFG2TMC CAN1 DOUT Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_AO_HV_CAN1_DIN_0,PADCTL Always ON CAN1 DIN Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x10 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" "CAN1,?..."
line.long 0x14 "PADCTL_AO_HV_CFG2TMC_CAN1_DIN_0,PADCTL Always ON CFG2TMC CAN1 DIN Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x18 "PADCTL_AO_HV_CAN0_DOUT_0,PADCTL Always ON CAN0 DOUT Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x18 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "CAN0,?..."
line.long 0x1C "PADCTL_AO_HV_CFG2TMC_CAN0_DOUT_0,PADCTL Always ON HV CFG2TMC CAN0 COUT Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x20 "PADCTL_AO_HV_CAN0_DIN_0,PADCTL Always ON HV CAN0 DIN Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x20 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x20 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x20 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x20 0.--1. " PM                 ,PM select" "CAN0,1,2,3"
line.long 0x24 "PADCTL_AO_HV_CFG2TMC_CAN0_DIN_0,PADCTL Always ON HV CFG2TMC CAN0 DIN Register"
bitfld.long 0x24 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x24 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x28 "PADCTL_AO_HV_CAN_GPIO0_0,PADCTL Always ON CAN GPIO0 Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x28 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x28 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x28 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x28 0.--1. " PM                 ,PM select" ",DIMC3,DIMC5,?..."
line.long 0x2C "PADCTL_AO_HV_CFG2TMC_CAN_GPIO0_0,PADCTL Always ON HV CFG2TMC GPIO0 Register"
bitfld.long 0x2C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x2C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x30 "PADCTL_AO_HV_CAN_GPIO1_0,PADCTL Always ON HV CAN GPIO Register 1"
bitfld.long 0x30 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x30 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x30 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x30 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x30 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x30 0.--1. " PM                 ,PM select" ",DIMC3,DIMC5,?..."
line.long 0x34 "PADCTL_AO_HV_CFG2TMC_CAN_GPIO1_0,PADCTL Always ON HV CFG2TMC CAN GPIO1 Register"
bitfld.long 0x34 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x34 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x38 "PADCTL_AO_HV_CAN_GPIO2_0,PADCTL Always ON HV CAN GPIO2 Register"
bitfld.long 0x38 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x38 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x38 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x38 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x38 0.--1. " PM                 ,PM select" "GPIO,?..."
line.long 0x3C "PADCTL_AO_HV_CFG2TMC_CAN_GPIO2_0,PADCTL Always ON HV CFG2TMC CAN GPIO2 Register"
bitfld.long 0x3C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x3C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x40 "PADCTL_AO_HV_CAN_GPIO3_0,PADCTL Always ON HV CAN GPIO3 Register"
bitfld.long 0x40 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x40 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x40 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x40 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x40 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
line.long 0x44 "PADCTL_AO_HV_CFG2TMC_CAN_GPIO3_0,PADCTL Always ON HV CFG2TMC CAN GPIO3 Register"
bitfld.long 0x44 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x44 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x48 "PADCTL_AO_HV_CAN_GPIO4_0,PADCTL Always ON HV CAN GPIO4 Register"
bitfld.long 0x48 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x48 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x48 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x48 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x48 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x48 0.--1. " PM                 ,PM select" "0,1,2,3"
line.long 0x4C "PADCTL_AO_HV_CFG2TMC_CAN_GPIO4_0,PADCTL Always ON HV CFG2TMC CAN GPIO4 Register"
bitfld.long 0x4C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x4C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x50 "PADCTL_AO_HV_CAN_GPIO5_0,PADCTL Always ON CAN GPIO5 Register"
bitfld.long 0x50 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x50 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x50 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x50 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x50 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x50 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
line.long 0x54 "PADCTL_AO_HV_CFG2TMC_CAN_GPIO5_0,PADCTL Always ON HV CFG2TMC CAN GPIO5 Register"
bitfld.long 0x54 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x54 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x58 "PADCTL_AO_HV_CAN_GPIO6_0,PADCTL Always ON HV CAN GPIO6 Register"
bitfld.long 0x58 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x58 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x58 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x58 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x58 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x58 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x58 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x58 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
line.long 0x5C "PADCTL_AO_HV_CFG2TMC_CAN_GPIO6_0,PADCTL Always ON CFG2TMC GPIO6 Register"
bitfld.long 0x5C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x5C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
group.long 0x2800++0x2F
line.long 0x00 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO7_0,PADCTL Always ON HV Security Control(SCR) CAN GPIO7 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_AO_HV_SCR_SCR_CAN1_DOUT_0,PADCTL Always ON HV Security Control(SCR) CAN1 COUT Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_AO_HV_SCR_SCR_CAN1_DIN_0,PADCTL Always ON HV Security Control(SCR) CAN1 DIN register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_AO_HV_SCR_SCR_CAN0_DOUT_0,PADCTL Always ON HV Security Control(SCR) CAN0 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_AO_HV_SCR_SCR_CAN0_DIN_0,PADCTL Always ON HV Security Control(SCR) CAN0 DIN Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO0_0,PADCTL Always ON Security Control(SCR) GPIO Register 0"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO1_0,PADCTL Always ON HV Security Control(SCR) GPIO1 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_AO_HV_SCR_SCR_CAN_GPIO2_0,PADCTL Always ON HV Security Control(SCR) GPIO2 Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO3_0,PADCTL Always ON HV Security Control(SCR) CAN GPIO3 Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO4_0,PADCTL Always ON HV Security Control(SCR) CAN GPIO4 Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_AO_HV_SCR_SCR_CAN_GPIO5_0,PADCTL Always ON HV Security Control(SCR) CAN GPIO5 Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_AO_HV_SCR_SCR_CAN_GPIO6_0,PADCTL Always ON HV Security Control(SCR) CAN GPIO6 Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x1000++0x97
line.long 0x00 "PADCTL_AO_TOUCH_CLK_0,PADCTL Always ON Touch CLK Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "TOUCH,?..."
line.long 0x04 "PADCTL_AO_CFG2TMC_TOUCH_CLK_0,PADCTL Always ON CFG2TMC Touch CLK Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_AO_UART3_CTS_0,PADCTL Always ON UART3 CTS Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "UARTC,?..."
line.long 0x0C "PADCTL_AO_CFG2TMC_UART3_CTS_0,PADCTL Always ON CFG2TMC UART3 CTS Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_AO_UART3_RTS_0,PADCTL Always ON UART3 RTS Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" "UARTC,?..."
line.long 0x14 "PADCTL_AO_CFG2TMC_UART3_RTS_0,PADCTL Always ON CFG2TMC UART3 RTS Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_AO_UART3_RX_0,PADCTL Always ON UART3 RX Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "UARTC,?..."
line.long 0x1C "PADCTL_AO_CFG2TMC_UART3_RX_0,PADCTL Always ON CFG2TMC UART3 RX Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_AO_UART3_TX_0,PADCTL Always ON UART3 TX Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "UARTC,?..."
line.long 0x24 "PADCTL_AO_CFG2TMC_UART3_TX_0,PADCTL Always ON CFG2TMC UART3 TX Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_AO_GEN8_I2C_SDA_0,PADCTL Always ON GEN8 I2C SDA Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "I2C8,?..."
line.long 0x2C "PADCTL_AO_CFG2TMC_GEN8_I2C_SDA_0,PADCTL Always ON CFG2TMC GEN8 I2C SDA Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_AO_GEN8_I2C_SCL_0,PADCTL Always ON GEN8 I2C SCL Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x30 0.--1. " PM                 ,PM select" "I2C8,1,2,3"
line.long 0x34 "PADCTL_AO_CFG2TMC_GEN8_I2C_SCL_0,PADCTL Always ON CFG2TMC GEN8 I2C SCL Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_AO_UART7_RX_0,PADCTL Always ON UART7 RX Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "UARTG,?..."
line.long 0x3C "PADCTL_AO_CFG2TMC_UART7_RX_0,PADCTL Always ON CFG2TMC UART7 RX Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_AO_UART7_TX_0,PADCTL Always ON UART7 TX Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x40 0.--1. "    PM          ,PM select" "UARTG,?..."
line.long 0x44 "PADCTL_AO_CFG2TMC_UART7_TX_0,PADCTL Always ON CFG2TMC UART7 TX Register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x48 "PADCTL_AO_GPIO_SEN0_0,PADCTL Always ON GPIO SEN0 Register"
bitfld.long 0x48 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x4C "PADCTL_AO_CFG2TMC_GPIO_SEN0_0,PADCTL Always ON CFG2TMC GPIO SEN0 Register"
bitfld.long 0x4C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x4C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x50 "PADCTL_AO_GPIO_SEN1_0,PADCTL Always ON GPIO SEN1 Register"
bitfld.long 0x50 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x50 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x50 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x50 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x50 0.--1. "    PM          ,PM select" "SPI2,?..."
line.long 0x54 "PADCTL_AO_CFG2TMC_GPIO_SEN1_0,PADCTL Always ON GPIO SEN1 Register"
bitfld.long 0x54 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x54 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x58 "PADCTL_AO_GPIO_SEN2_0,PADCTL Always ON GPIO SEN2 Register"
bitfld.long 0x58 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x58 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x58 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x58 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x58 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x58 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x58 0.--1. "    PM          ,PM select" "SPI2,?..."
line.long 0x5C "PADCTL_AO_CFG2TMC_GPIO_SEN2_0,PADCTL Always ON CFG2TMC GPIO SEN2 Register"
bitfld.long 0x5C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x5C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x60 "PADCTL_AO_GPIO_SEN3_0,PADCTL Always ON GPIO SEN3 Register"
bitfld.long 0x60 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x60 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x60 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x60 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x60 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x60 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x60 0.--1. "    PM          ,PM select" "SPI2,?..."
line.long 0x64 "PADCTL_AO_CFG2TMC_GPIO_SEN3_0,PADCTL Always ON CFG2TMC GPIO SEN3 Register"
bitfld.long 0x64 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x64 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x68 "PADCTL_AO_GPIO_SEN4_0,PADCTL Always ON GPIO SEN4 Register"
bitfld.long 0x68 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x68 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x68 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x68 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x68 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x68 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x68 0.--1. "    PM          ,PM select" "SPI2,?..."
line.long 0x6C "PADCTL_AO_CFG2TMC_GPIO_SEN4_0,PADCTL Always ON CFG2TMC GPIO SEN4 Register"
bitfld.long 0x6C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x6C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x70 "PADCTL_AO_GPIO_SEN5_0,PADCTL Always ON GPIO SEN5 Register"
bitfld.long 0x70 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x70 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x70 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x70 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x70 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x70 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x74 "PADCTL_AO_CFG2TMC_GPIO_SEN5_0,PADCTL Always ON CFG2TMC GPIO SEN5 Register"
bitfld.long 0x74 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x74 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x78 "PADCTL_AO_GPIO_SEN6_0,PADCTL Always ON GPIO SEN6 Register"
bitfld.long 0x78 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x78 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x78 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x78 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x78 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x78 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x78 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x78 0.--1. "    PM          ,PM select" ",GP,?..."
line.long 0x7C "PADCTL_AO_CFG2TMC_GPIO_SEN6_0,PADCTL Always ON CFG2TMC GPIO SEN6 Register"
bitfld.long 0x7C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x7C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "PADCTL_AO_GPIO_SEN7_0,PADCTL Always ON GPIO SEN7 Register"
bitfld.long 0x80 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x80 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x80 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x80 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x80 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x80 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x80 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x80 0.--1. "    PM          ,PM select" ",WDT,?..."
line.long 0x84 "PADCTL_AO_CFG2TMC_GPIO_SEN7_0,PADCTL Always ON CFG2TMC GPIO SEN7 Register"
bitfld.long 0x84 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x84 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x88 "PADCTL_AO_GPIO_SEN8_0,PADCTL Always ON CFG2TMC GPIO SEN8 Register"
bitfld.long 0x88 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x88 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x88 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x88 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x88 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x88 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x88 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x88 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x88 0.--1. " PM                 ,PM select" ",I2C2,?..."
line.long 0x8C "PADCTL_AO_CFG2TMC_GPIO_SEN8_0,PADCTL Always ON CFG2TMC GPIO SEN8 Register"
bitfld.long 0x8C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x8C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x90 "PADCTL_AO_GPIO_SEN9_0,PADCTL Always ON GPIO SEN9 Register"
bitfld.long 0x90 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x90 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x90 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x90 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x90 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x90 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x90 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x90 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x90 0.--1. " PM                 ,PM select" ",I2C2,?..."
line.long 0x94 "PADCTL_AO_CFG2TMC_GPIO_SEN9_0,PADCTL Always ON CFG2TMC GPIO SEN9 Register"
bitfld.long 0x94 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x94 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1800++0x4B
line.long 0x00 "PADCTL_AO_SCR_SCR_TOUCH_CLK_0,PADCTL Always ON Security Control(SCR) TOUCH CLK Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_AO_SCR_SCR_UART3_CTS_0,PADCTL Always ON Security Control(SCR) UART3 CTS Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_AO_SCR_SCR_UART3_RTS_0,PADCTL Always ON Security Control(SCR) UART3 RTS Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_AO_SCR_SCR_UART3_RX_0,PADCTL Always ON Security Control(SCR) UART3 RX Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_AO_SCR_SCR_UART3_TX_0,PADCTL Always ON Security Control(SCR) UART3 TX Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_AO_SCR_SCR_GEN8_I2C_SDA_0,PADCTL Always ON Security Control(SCR) GEN8 I2C SDA Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_AO_SCR_SCR_GEN8_I2C_SCL_0,PADCTL Always ON Security Control(SCR) GEN8 I2C SCL Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_AO_SCR_SCR_UART7_RX_0,PADCTL Always ON Security Control(SCR) UART7 RX Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PDCTL_AO_SCR_SCR_UART7_TX_0,PADCTL Always ON Security Control(SCR) UART7 TX Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_AO_SCR_SCR_GPIO_SEN0_0,PADCTL Always ON Security Control(SCR) GPIO SEN0 Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_AO_SCR_SCR_GPIO_SEN1_0,PADCTL Always ON Security Control(SCR) GPIO SEN1 Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_AO_SCR_SCR_GPIO_SEN2_0,PADCTL Always ON Security Control(SCR) GPIO SEN2 Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x30 "PADCTL_AO_SCR_SCR_GPIO_SEN3_0,PADCTL Always ON Security Control(SCR) GPIO SEN3 Register"
bitfld.long 0x30 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x30 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x30 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x30 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x30 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x30 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x30 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x30 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x30 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x34 "PADCTL_AO_SCR_SCR_GPIO_SEN4_0,PADCTL Always ON Security Control(SCR) GPIO SEN4 Register"
bitfld.long 0x34 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x34 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x34 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x34 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x34 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x34 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x34 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x34 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x34 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x38 "PADCTL_AO_SCR_SCR_GPIO_SEN5_0,PADCTL Always ON Security Control(SCR) GPIO SEN5 Register"
bitfld.long 0x38 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x38 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x38 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x38 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x38 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x38 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x38 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x38 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x38 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x3C "PADCTL_AO_SCR_SCR_GPIO_SEN6_0,PADCTL Always ON Security Control(SCR) GPIO SEN6 Register"
bitfld.long 0x3C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x3C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x3C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x3C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x3C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x3C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x3C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x3C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x3C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x40 "PADCTL_AO_SCR_SCR_GPIO_SEN7_0,PADCTL Always ON Security Control(SCR) GPIO SEN7 Register"
bitfld.long 0x40 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x40 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x40 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x40 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x40 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x40 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x40 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x40 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x40 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x44 "PADCTL_AO_SCR_SCR_GPIO_SEN8_0,PADCTL Always ON Security Control(SCR) GPIO SEN8 Register"
bitfld.long 0x44 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x44 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x44 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x44 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x44 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x44 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x44 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x44 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x44 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x48 "PADCTL_AO_SCR_SCR_GPIO_SEN9_0,PADCTL Always ON Security Control(SCR) GPIO SEN9 Register"
bitfld.long 0x48 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x48 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x48 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x48 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x48 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x48 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x48 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x48 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x48 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02430000
group.long 0x2000++0x4F
line.long 0x00 "PADCTL_AUDIO_HV_DMIC1_CLK_0,PADCTL Audio HV DMIC1 CLK Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x00 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     L_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" "DIMC1,I2S3,?..."
line.long 0x04 "PADCTL_AUDIO_HV_CFG2TMC_DMIC1_CLK_0,PADCTL Audio HV CFG2TMC DMIC1 CLK Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_AUDIO_HV_DMIC1_DAT_0,PADCTL Audio HV DMIC1 DAT Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x08 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" "DIMC1,I2S3,?..."
line.long 0x0C "PADCTL_AUDIO_HV_CFG2TMC_DMIC1_DAT_0,PADCTL Audio HV CFG2TMC DMIC1 DAT Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_AUDIO_HV_DMIC2_DAT_0,PADCTL Audio HV DMIC2 DAT Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x10 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" "DIMC2,I2S3,?..."
line.long 0x14 "PADCTL_AUDIO_HV_CFG2TMC_DMIC2_DAT_0,PADCTL Audio HV CFG2TMC DMIC2 DAT Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x18 "PADCTL_AUDIO_HV_DMIC2_CLK_0,PADCTL Audio HV DMIC2 CLK Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x18 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" "DIMC2,I2S3,?..."
line.long 0x1C "PADCTL_AUDIO_HV_CFG2TMC_DMIC2_CLK_0,PADCTL Audio HV CFG2TMC DMIC2 CLK Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x20 "PADCTL_AUDIO_HV_DMIC4_DAT_0,PADCTL Audio HV DMIC4 DAT Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x20 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x20 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x20 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x20 0.--1. " PM                 ,PM select" "DIMC4,DSPK0,?..."
line.long 0x24 "PADCTL_AUDIO_HV_CFG2TMC_DMIC4_DAT_0,PADCTL Audio HV CFG2TMC DMIC4 DAT Register"
bitfld.long 0x24 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x24 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x28 "PADCTL_AUDIO_HV_DMIC4_CLK_0,PADCTL Audio HV DMIC4 CLK Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x28 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x28 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x28 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x28 0.--1. " PM                 ,PM select" "DIMC4,DSPK0,?..."
line.long 0x2C "PADCTL_AUDIO_HV_CFG2TMC_DMIC4_CLK_0,PADCTL Audio HV CFG2TMC DMIC4 CLK Register"
bitfld.long 0x2C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x2C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x30 "PADCTL_AUDIO_HV_DAP4_FS_0,PADCTL Audio HV DAP4 FS Register"
bitfld.long 0x30 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x30 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x30 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x30 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x30 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x30 0.--1. " PM                 ,PM select" "I2S4,?..."
line.long 0x34 "PADCTL_AUDIO_HV_CFG2TMC_DAP4_FS_0,PADCTL Audio HV CFG2TMC DAP4 FS Register"
bitfld.long 0x34 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x34 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x38 "PADCTL_AUDIO_HV_DAP4_DIN_0,PADCTL Audio HV DAP4 DIN Register"
bitfld.long 0x38 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x38 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x38 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x38 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x38 0.--1. " PM                 ,PM select" "I2S4,?..."
line.long 0x3C "PADCTL_AUDIO_HV_CFG2TMC_DAP4_DIN_0,PADCTL Audio HV CFG2TMC DAP4 DIN Register"
bitfld.long 0x3C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x3C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x40 "PADCTL_AUDIO_HV_DAP4_DOUT_0,PADCTL Audio HV DAP4 DOUT Register"
bitfld.long 0x40 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x40 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x40 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x40 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x40 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x40 0.--1. " PM                 ,PM select" "I2S4,?..."
line.long 0x44 "PADCTL_AUDIO_HV_CFG2TMC_DAP4_DOUT_0,PADCTL Audio HV CFG2TMC DAP4 DOUT Register"
bitfld.long 0x44 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x44 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x48 "PADCTL_AUDIO_HV_DAP4_SCLK_0,PADCTL Audio HV DAP4 SCLK Register"
bitfld.long 0x48 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x48 13.--14. "           DRV_TYPE           ,Drive type select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x48 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x48 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x48 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
bitfld.long 0x48 0.--1. " PM                 ,PM select" "I2S4,?..."
line.long 0x4C "PADCTL_AUDIO_HV_CFG2TMC_DAP4_SCLK_0,PADCTL Audio HV CFG2TMC DAP4 SCLK Register"
bitfld.long 0x4C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x4C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
group.long 0x2800++0x27
line.long 0x00 "PADCTL_AUDIO_HV_SCR_SCR_DMIC1_CLK_0,PADCTL Audio HV Secuity Control (SCR) DMIC1 CLK Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_AUDIO_HV_SCR_SCR_DMIC1_DAT_0,PADCTL Audio HV Secuity Control (SCR) DMIC DAT Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_AUDIO_HV_SCR_SCR_DMIC2_DAT_0,PADCTL Audio HV Secuity Control (SCR) DMIC2 DAT Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_AUDIO_HV_SCR_SCR_DMIC2_CLK_0,PADCTL Audio HV Secuity Control (SCR) DMIC2 CLK Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_AUDIO_HV_SCR_SCR_DMIC4_DAT_0,PADCTL Audio HV Secuity Control (SCR) DMIC4 DAT Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_AUDIO_HV_SCR_SCR_DMIC4_CLK_0,PADCTL Audio HV Secuity Control (SCR) DMIC4 CLK Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_AUDIO_HV_SCR_SCR_DAP4_FS_0,PADCTL Audio HV Secuity Control (SCR) DAP4 FS Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_AUDIO_HV_SCR_SCR_DAP4_DIN_0,PADCTL Audio HV Secuity Control (SCR) DAP 4 DIN Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_AUDIO_HV_SCR_SCR_DAP4_DOUT_0,PADCTL Audio HV Secuity Control (SCR) DAP4 DOUT Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_AUDIO_HV_SCR_SCR_DAP4_SCLK_0,PADCTL Audio HV Secuity Control (SCR) DAP4 SCLK Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x1000++0x47
line.long 0x00 "PADCTL_AUDIO_GPIO_AUD3_0,PADCTL Audio GPIO AUD3 Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" ",DSPK1,SPDIF,?..."
line.long 0x04 "PADCTL_AUDIO_CFG2TMC_GPIO_AUD3_0,PADCTL Audio CFG2TMC GPIO AUD3 Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_AUDIO_GPIO_AUD2_0,PADCTL Audio GPIO AUD 2 Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" ",DSPK1,SPDIF,?..."
line.long 0x0C "PADCTL_AUDIO_CFG2TMC_GPIO_AUD2_0,PADCTL Audio CFG2TMC GPIO AUD2 Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_AUDIO_GPIO_AUD1_0,PADCTL Audio GPIO AUD1 Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x14 "PADCTL_AUDIO_CFG2TMC_GPIO_AUD1_0,PADCTL Audio CFG2TMC GPIO AUD1 Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_AUDIO_GPIO_AUD0_0,PADCTL Audio GPIO AUD0 Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x1C "PADCTL_AUDIO_CFG2TMC_GPIO_AUD0_0,PADCTL Audio CFG2TMC GPIO AUD0 Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_AUDIO_AUD_MCLK_0,PADCTL Audio AUD MCLK Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "AUD,?..."
line.long 0x24 "PADCTL_AUDIO_CFG2TMC_AUD_MCLK_0,PADCTL Audio CFG2TMC AUD MCLK Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_AUDIO_DAP1_FS_0,PADCTL Audio DAP1 FS Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "I2S1,?..."
line.long 0x2C "PADCTL_AUDIO_CFG2TMC_DAP1_FS_0,PADCTL Audio CFG2TMC DAP1 FS Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_AUDIO_DAP1_DIN_0,PADCTL Audio DAP1 DIN Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM          ,PM select" "I2S1,?..."
line.long 0x34 "PADCTL_AUDIO_CFG2TMC_DAP1_DIN_0,PADCTL Audio CFG2TMC DAP1 DIN Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_AUDIO_DAP1_DOUT_0,PADCTL Audio DAP1 DOUT Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "I2S1,?..."
line.long 0x3C "PADCTL_AUDIO_CFG2TMC_DAP1_DOUT_0,PADCTL Audio CFG2TMC DAP1 DOUT Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_AUDIO_DAP1_SCLK_0,PADCTL Audio DAP1 SCLK Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x40 0.--1. "    PM          ,PM select" "I2S1,?..."
line.long 0x44 "PADCTL_AUDIO_CFG2TMC_DAP1_SCLK_0,PADCTL Audio CFG2TMC DAP1 SCLK Register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1800++0x23
line.long 0x00 "PADCTL_AUDIO_SCR_SCR_GPIO_AUD3_0,PADCTL Audio Security Control (SCR) GPIO AUD3 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_AUDIO_SCR_SCR_GPIO_AUD2_0,PADCTL Audio Security Control (SCR) GPIO AUD2 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_AUDIO_SCR_SCR_GPIO_AUD1_0,PADCTL Audio Security Control (SCR) GPIO AUD1 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_AUDIO_SCR_SCR_GPIO_AUD0_0,PADCTL Audio Security Control (SCR) GPIO AUD0 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_AUDIO_SCR_SCR_AUD_MCLK_0,PADCTL Audio Security Control (SCR) AUD MCLK Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_AUDIO_SCR_SCR_DAP1_FS_0,PADCTL Audio Security Control (SCR) DAP1 FS Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_AUDIO_SCR_SCR_DAP1_DIN_0,PADCTL Audio Security Control (SCR) DAP1 DIN Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_AUDIO_SCR_SCR_DAP1_DOUT_0,PADCTL Audio Security Control (SCR) DAP1 DOUT Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_AUDIO_SCR_SCR_DAP1_SCLK_0,PADCTL Audio Security Control (SCR) DAP1 SCLK Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x00++0x57
line.long 0x00 "PADCTL_CAM_EXTPERIPH2_CLK_0,PADCTL CAM EXTPERIPH2 CLK Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "EXTPERIPH2,?..."
line.long 0x04 "PADCTL_CAM_CFG2TMC_EXTPERIPH2_CLK_0,PADCTL CAM CFG2TMC EXTPERIPH2 CLK Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_CAM_EXTPERIPH1_CLK_0,PADCTL CAM EXTPERIPH1 CLK Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "EXTPERIPH1,?..."
line.long 0x0C "PADCTL_CAM_CFG2TMC_EXTPERIPH1_CLK_0,PADCTL CAM CFG2TMC EXTPERIPH1 CLK Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_CAM_CAM_I2C_SDA_0,PADCTL CAM I2C SDA Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" "I2C3,?..."
line.long 0x14 "PADCTL_CAM_CFG2TMC_CAM_I2C_SDA_0,PADCTL CAM CFG2TMC CAM I2C SDA Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_CAM_CAM_I2C_SCL_0,PADCTL CAM I2C SCL Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" "I2C3,?..."
line.long 0x1C "PADCTL_CAM_CFG2TMC_CAM_I2C_SCL_0,PADCTL CAM CFG2TMC CAM I2C SCL Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_CAM_GPIO_CAM1_0,PADCTL CAM GPIO CAM1 Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "VGP1,?..."
line.long 0x24 "PADCTL_CAM_CFG2TMC_GPIO_CAM1_0,PADCTL CAM CFG2TMC GPIO CAM1 Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_CAM_GPIO_CAM2_0,PADCTL CAM CFG2TMC GPIO CAM1 Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "VGP2,EXTPERIPH3,?..."
line.long 0x2C "PADCTL_CAM_CFG2TMC_GPIO_CAM2_0,PADCTL CAM CFG2TMC GPIO CAM2 Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_CAM_GPIO_CAM3_0,PADCTL CAM GPIO CAM3 Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM          ,PM select" "VGP3,EXTPERIPH4,?..."
line.long 0x34 "PADCTL_CAM_CFG2TMC_GPIO_CAM3_0,PADCTL CAM CFG2TMC GPIO CAM3 Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_CAM_GPIO_CAM4_0,PADCTL CAM GPIO CAM4 Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "VGP4,SPI4,?..."
line.long 0x3C "PADCTL_CAM_CFG2TMC_GPIO_CAM4_0,PADCTL CAM CFG2TMC GPIO CAM4 Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_CAM_GPIO_CAM5_0,PADCTL CAM GPIO CAM5 Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x40 0.--1. "    PM          ,PM select" "VGP5,SPI4,?..."
line.long 0x44 "PADCTL_CAM_CFG2TMC_GPIO_CAM5_0,PADCTL CAM CFG2TMC GPIO CAM5 Register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x48 "PADCTL_CAM_GPIO_CAM6_0,PADCTL CAM GPIO CAM6 Register"
bitfld.long 0x48 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x48 0.--1. "    PM          ,PM select" "VGP6,SPI4,?..."
line.long 0x4C "PADCTL_CAM_CFG2TMC_GPIO_CAM6_0,PADCTL CAM CFG2TMC GPIO CAM6 Register"
bitfld.long 0x4C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x4C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x50 "PADCTL_CAM_GPIO_CAM7_0,PADCTL CAM GPIO CAM7 Register"
bitfld.long 0x50 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x50 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x50 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x50 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x50 0.--1. "    PM          ,PM select" ",SPI4,?..."
line.long 0x54 "PADCTL_CAM_CFG2TMC_GPIO_CAM7_0,PADCTL CAM CFG2TMC GPIO CAM7 Register"
bitfld.long 0x54 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x54 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x800++0x2B
line.long 0x00 "PADCTL_CAM_SCR_SCR_EXTPERIPH2_CLK_0,PADCTL CAM Security Control (SCR)  EXTPERIPH2 CLK Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_CAM_SCR_SCR_EXTPERIPH1_CLK_0,PADCTL CAM Security Control (SCR)  EXTPERIPH1 CLK Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_CAM_SCR_SCR_CAM_I2C_SDA_0,PADCTL CAM Security Control (SCR)  CAM I2C SDA Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_CAM_SCR_SCR_CAM_I2C_SCL_0,PADCTL CAM Security Control (SCR)  CAM I2C SCL Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_CAM_SCR_SCR_GPIO_CAM1_0,PADCTL CAM Security Control (SCR)  GPIO CAM1 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_CAM_SCR_SCR_GPIO_CAM2_0,PADCTL CAM Security Control (SCR)  GPIO CAM2 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_CAM_SCR_SCR_GPIO_CAM3_0,PADCTL CAM Security Control (SCR)  GPIO CAM3 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_CAM_SCR_SCR_GPIO_CAM4_0,PADCTL CAM Security Control (SCR)  GPIO CAM4 Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_CAM_SCR_SCR_GPIO_CAM5_0,PADCTL CAM Security Control (SCR)  GPIO CAM5 Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_CAM_SCR_SCR_GPIO_CAM6_0,PADCTL CAM Security Control (SCR)  GPIO CAM6 Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_CAM_SCR_SCR_GPIO_CAM7_0,PADCTL CAM Security Control (SCR)  GPIO CAM7 Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x4000++0x6F
line.long 0x00 "PADCTL_CONN_DAP2_DIN_0,PADCTL CONN DAP2 DIN Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "I2S2,?..."
line.long 0x04 "PADCTL_CONN_CFG2TMC_DAP2_DIN_0,PADCTL CONN CFG2TMC DAP2 DIN Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_CONN_DAP2_DOUT_0,PADCTL CONN DAP2 DOUT Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "I2S2,?..."
line.long 0x0C "PADCTL_CONN_CFG2TMC_DAP2_DOUT_0,PADCTL CONN CFG2TMC DAP2 DOUT Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_CONN_DAP2_FS_0,PADCTL CONN DAP2 FS Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" "I2S2,?..."
line.long 0x14 "PADCTL_CONN_CFG2TMC_DAP2_FS_0,PADCTL CONN CFG2TMC DAP2 FS Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_CONN_DAP2_SCLK_0,PADCTL CONN DAP2 SCLK Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "I2S2,?..."
line.long 0x1C "PADCTL_CONN_CFG2TMC_DAP2_SCLK_0,PADCTL CONN CFG2TMC DAP2 SCLK Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_CONN_UART4_CTS_0,PADCTL CONN UART4 CTS Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "UARTD,?..."
line.long 0x24 "PADCTL_CONN_CFG2TMC_UART4_CTS_0,PADCTL CONN CFG2TMC UART4 CTS Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_CONN_UART4_RTS_0,PADCTL CONN UART4 RTS Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "UARTD,?..."
line.long 0x2C "PADCTL_CONN_CFG2TMC_UART4_RTS_0,PADCTL CONN CFG_CAL_DRVDN UART4 RTS Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_CONN_UART4_RX_0,PADCTL CONN UART4 RX Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM          ,PM select" "UARTD,?..."
line.long 0x34 "PADCTL_CONN_CFG2TMC_UART4_RX_0,PADCTL CONN CFG2TMC UART4 RX Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_CONN_UART4_TX_0,PADCTL CONN UART4 TX Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "UARTD,?..."
line.long 0x3C "PADCTL_CONN_CFG2TMC_UART4_TX_0,PADCTL CONN CFG2TMC UART4 TX Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_CONN_GPIO_WAN4_0,PADCTL CONN GPIO WAN4 Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 6. " E_INPUT            ,L_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x44 "PADCTL_CONN_CFG2TMC_GPIO_WAN4_0,PADCTL CONN CFG2TMC GPIO WAN4 register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x48 "PADCTL_CONN_GPIO_WAN3_0,PADCTL CONN GPIO WAN3 register"
bitfld.long 0x48 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 6. " E_INPUT            ,L_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x4C "PADCTL_CONN_CFG2TMC_GPIO_WAN3_0,PADCTL CONN CFG2TMC GPIO WAN3 Register"
bitfld.long 0x4C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x4C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x50 "PADCTL_CONN_GPIO_WAN2_0,PADCTL CONN GPIO WAN2 Register"
bitfld.long 0x50 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x50 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x50 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x50 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x54 "PADCTL_CONN_CFG2TMC_GPIO_WAN2_0,PADCTL CONN CFG2TMC GPIO WAN2 register"
bitfld.long 0x54 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x54 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x58 "PADCTL_CONN_GPIO_WAN1_0,PADCTL CONN GPIO WAN1 register"
bitfld.long 0x58 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x58 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x58 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x58 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x58 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x58 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x5C "PADCTL_CONN_CFG2TMC_GPIO_WAN1_0,PADCTL CONN CFG2TMC GPIO WAN1 Register"
bitfld.long 0x5C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x5C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x60 "PADCTL_CONN_GEN1_I2C_SCL_0,PADCTL CONN GEN1 I2C SCL Register"
bitfld.long 0x60 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x60 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x60 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x60 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x60 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x60 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x60 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x60 0.--1. " PM                 ,PM select" "I2C1,?..."
line.long 0x64 "PADCTL_CONN_CFG2TMC_GEN1_I2C_SCL_0,PADCTL CONN CFG2TMC GEN1 I2C SCL register"
bitfld.long 0x64 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x64 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x68 "PADCTL_CONN_GEN1_I2C_SDA_0,PADCTL CONN GEN1 I2C SDA Register"
bitfld.long 0x68 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x68 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x68 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x68 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x68 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x68 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x68 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x68 0.--1. " PM                 ,PM select" "I2C1,?..."
line.long 0x6C "PADCTL_CONN_CFG2TMC_GEN1_I2C_SDA_0,PADCTL CONN CFG2TMC GEN1 I2C SDA Register"
bitfld.long 0x6C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x6C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x4800++0x37
line.long 0x00 "PADCTL_CONN_SCR_SCR_DAP2_DIN_0,PADCTL CONN Security Control (SCR)  DAP2 DIN Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_CONN_SCR_SCR_DAP2_DOUT_0,PADCTL CONN Security Control (SCR)  DAP2 DOUT Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_CONN_SCR_SCR_DAP2_FS_0,PADCTL CONN Security Control (SCR)  DAP2 FS Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_CONN_SCR_SCR_DAP2_SCLK_0,PADCTL SONN SCR DAP2 SCLK Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_CONN_SCR_SCR_UART4_CTS_0,PADCTL CONN Security Control (SCR)  UART4 CTS Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_CONN_SCR_SCR_UART4_RTS_0,PADCTL CONN Security Control (SCR)  UART4 RTS Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_CONN_SCR_SCR_UART4_RX_0,PADCTL CONN Security Control (SCR)  UART4 RX Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_CONN_SCR_SCR_UART4_TX_0,PADCTL CONN Security Control (SCR)  UART4 TX Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_CONN_SCR_SCR_GPIO_WAN4_0,PADCTL CONN Security Control (SCR)  GPIO WAN4 Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_CONN_SCR_SCR_GPIO_WAN3_0,PADCTL CONN Security Control (SCR)  GPIO WAN3 Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_CONN_SCR_SCR_GPIO_WAN2_0,PADCTL CONN Security Control (SCR)  GPIO WAN2 Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_CONN_SCR_SCR_GPIO_WAN1_0,PADCTL SONN SCR GPIO WAN1 Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x30 "PADCTL_CONN_SCR_SCR_GEN1_I2C_SCL_0,PADCTL CONN Security Control (SCR)  GEN1 I2C SCL Register"
bitfld.long 0x30 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x30 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x30 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x30 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x30 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x30 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x30 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x30 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x30 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x34 "PADCTL_CONN_SCR_SCR_GEN1_I2C_SDA_0,PADCTL CONN Security Control (SCR)  GEN1 I2C SDA Register"
bitfld.long 0x34 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x34 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x34 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x34 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x34 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x34 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x34 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x34 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x34 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x5000++0x1F
line.long 0x00 "PADCTL_DEBUG_UART1_CTS_0,PADCTL DEBUG UART1 CTS Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "UARTA,?..."
line.long 0x04 "PADCTL_DEBUG_CFG2TMC_UART1_CTS_0,PADCTL DEBUG CFG2TMC UART1 CTS Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_DEBUG_UART1_RTS_0,PADCTL DEBUG UART1 RTS Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "UARTA,?..."
line.long 0x0C "PADCTL_DEBUG_CFG2TMC_UART1_RTS_0,PADCTL DEBUG CFG2TMC UART1 RTS Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_DEBUG_UART1_RX_0,PADCTL DEBUG UART1 RX Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" "UARTA,?..."
line.long 0x14 "PADCTL_DEBUG_CFG2TMC_UART1_RX_0,PADCTL DEBUG CFG2TMC UART1 RX Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_DEBUG_UART1_TX_0,PADCTL DEBUG UART1 TX Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "UARTA,?..."
line.long 0x1C "PADCTL_DEBUG_CFG2TMC_UART1_TX_0,PADCTL DEBUG CFG2TMC UART1 TX Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x5028++0x33
line.long 0x00 "PADCTL_DEBUG_DIRECTDC1_OUT3_0,PADCTL DEBUG DIRECTDC1 OUT3 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x00 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x00 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x04 "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_OUT3_0,PADCTL DEBUG CFG2TMC DIRECTDC1 OUT3 Register"
hexmask.long.byte 0x04 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x04 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x08 "PADCTL_DEBUG_DIRECTDC1_OUT2_0,PADCTL DEBUG DIRECTDC1 OUT2 Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x08 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x08 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x0C "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_OUT2_0,PADCTL DEBUG CFG2TMC DIRECTDC1 OUT2 Register"
hexmask.long.byte 0x0C 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x0C 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x10 "PADCTL_DEBUG_DIRECTDC1_OUT1_0,PADCTL DEBUG DIRECTDC1 OUT1 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x10 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x10 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x14 "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_OUT1_0,PADCTL DEBUG CFG2TMC DIRECTDC1 OUT1 Register"
hexmask.long.byte 0x14 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x14 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x18 "PADCTL_DEBUG_DIRECTDC1_OUT0_0,PADCTL DEBUG DIRECTDC1 OUT0 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x18 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x18 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x1C "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_OUT0_0,PADCTL DEBUG CFG2TMC DIRECTDC1 OUT0 Register"
hexmask.long.byte 0x1C 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x1C 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x20 "PADCTL_DEBUG_DIRECTDC1_IN_0,PADCTL DEBUG DIRECTDC1 IN Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x20 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x20 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x24 "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_IN_0,PADCTL DEBUG CFG2TMC DIRECTDC1 IN Register"
hexmask.long.byte 0x24 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x24 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x28 "PADCTL_DEBUG_DIRECTDC1_CLK_0,PADCTL DEBUG DIRECTDC1 CLK Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x28 15. "      E_PREEMP    ,E_PREEMP disable" "Disabled,Enabled"
bitfld.long 0x28 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "DIRECTDC1,?..."
line.long 0x2C "PADCTL_DEBUG_CFG2TMC_DIRECTDC1_CLK_0,PADCTL DEBUG CFG2TMC DIRECTDC1 CLK Register"
hexmask.long.byte 0x2C 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x2C 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x30 "PADCTL_DEBUG_DIRECTDC_COMP_0,PADCTL DEBUG DIRECTDC1 COMP Register"
bitfld.long 0x30 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x30 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 0.--1. "  PM          ,PM select" "DIRECTDC,?..."
group.long 0x5800++0x2B
line.long 0x00 "PADCTL_DEBUG_SCR_SCR_UART1_CTS_0,PADCTL DEBUG Security Control (SCR) UART1 CTS Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_DEBUG_SCR_SCR_UART1_RTS_0,PADCTL DEBUG Security Control (SCR) UART1 RTS Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_DEBUG_SCR_SCR_UART1_RX_0,PADCTL DEBUG Security Control (SCR) UART1 RX Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_DEBUG_SCR_SCR_UART1_TX_0,PADCTL DEBUG Security Control (SCR) UART1 TX Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_OUT3_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 OUT3 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_OUT2_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 OUT2 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_OUT1_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 OUT1 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_OUT0_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 OUT0 Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_IN_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 IN Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_DEBUG_SCR_SCR_DIRECTDC1_CLK_0,PADCTL DEBUG Security Control (SCR) DIRECTDC1 CLK Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_DEBUG_SCR_SCR_DIRECTDC_COMP_0,PADCTL DEBUG Security Control (SCR) DIRECTDC COMP Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x3000++0x1B
line.long 0x00 "PADCTL_DMIC_HV_GPIO_PQ0_0,PADCTL DMIC HV GPIO PQ0 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x00 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" ",IQC0,I2S6,?..."
line.long 0x04 "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ0_0,PADCTL DMIC HV CFG2TMC GPIO PQ0 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x08 "PADCTL_DMIC_HV_GPIO_PQ1_0,PADCTL DMIC HV GPIO PQ1 Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x08 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" ",IQC0,I2S6,?..."
line.long 0x0C "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ1_0,PADCTL DMIC HV CFG2TMC GPIO PQ1 Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x10 "PADCTL_DMIC_HV_GPIO_PQ2_0,PADCTL DMIC HV GPIO PQ2 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x10 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" ",IQC0,I2S6,?..."
line.long 0x14 "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ2_0,PADCTL DMIC HV CFG2TMC GPIO PQ2 Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x18 "PADCTL_DMIC_HV_GPIO_PQ3_0,PADCTL DMIC HV GPIO PQ3 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x18 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" ",IQC0,I2S6,?..."
group.long 0x3020++0x1F
line.long 0x00 "PADCTL_DMIC_HV_GPIO_PQ4_0,PADCTL DMIC HV GPIO PQ4 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x00 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" ",IQC0,I2S6,?..."
line.long 0x04 "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ4_0,PADCTL DMIC HV CFG2TMC GPIO PQ4 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x08 "PADCTL_DMIC_HV_GPIO_PQ5_0,PADCTL DMIC HV GPIO Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x08 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" ",IQC1,DTV,?..."
line.long 0x0C "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ5_0,PADCTL DMIC HV CFG2TMC GPIO PQ5 Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x10 "PADCTL_DMIC_HV_GPIO_PQ6_0,PADCTL DMIC HV GPIO PQ6 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x10 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" ",IQC1,DTV,?..."
line.long 0x14 "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ6_0,PADCTL DMIC HV CFG2TMC GPIO PQ6 Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
line.long 0x18 "PADCTL_DMIC_HV_GPIO_PQ7_0,PADCTL DMIC HV GPIO PQ7 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x18 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" ",IQC1,DTV,?..."
line.long 0x1C "PADCTL_DMIC_HV_CFG2TMC_GPIO_PQ7_0,PADCTL DMIC HV CFG2TMC GPIO PQ7 Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "1,2,3,4"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "1,2,3,4"
group.long 0x3800++0x1F
line.long 0x00 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ0_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ0 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ1_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ1 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ2_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ2 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ3_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ3 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ4_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ4 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ5_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ5 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ6_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ6 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_DMIC_HV_SCR_SCR_GPIO_PQ7_0,PADCTL DMIC HV Security Control (SCR) GPIO PQ7 Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02440000
group.long 0x00++0x37
line.long 0x00 "PADCTL_EDP_GPIO_EDP2_0,PADCTL EDP GPIO EDP2 Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" ",UARTF,SDMMC3,?..."
line.long 0x04 "PADCTL_EDP_CFG2TMC_GPIO_EDP2_0,PADCTL EDP CFG2TMC GPIO EDP2 Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_EDP_GPIO_EDP3_0,PADCTL EDP GPIO EDP3 Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" ",UARTF,SDMMC1,?..."
line.long 0x0C "PADCTL_EDP_CFG2TMC_GPIO_EDP3_0,PADCTL EDP CFG2TMC GPIO EDP3 Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_EDP_GPIO_EDP0_0,PADCTL EDP GPIO EDP0 Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" ",UARTF,SDMMC3,?..."
line.long 0x14 "PADCTL_EDP_CFG2TMC_GPIO_EDP0_0,PADCTL EDP CFG2TMC GPIO EDP0 Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_EDP_GPIO_EDP1_0,PADCTL EDP GPIO EDP1 Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" ",UARTF,SDMMC1,?..."
line.long 0x1C "PADCTL_EDP_CFG2TMC_GPIO_EDP1_0,PADCTL EDP CFG2TMC GPIO EDP1 Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_EDP_DP_AUX_CH0_HPD_0,PADCTL EDP DP AUX CH0 HPD Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x20 0.--1. " PM                 ,PM select" "DP,?..."
line.long 0x24 "PADCTL_EDP_CFG2TMC_DP_AUX_CH0_HPD_0,PADCTL EDP CFG2TMC DP AUX CH0 HPD Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_EDP_DP_AUX_CH1_HPD_0,PADCTL EDP DP AUX CH1 HPD Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x28 0.--1. " PM                 ,PM select" "DP,?..."
line.long 0x2C "PADCTL_EDP_CFG2TMC_DP_AUX_CH1_HPD_0,PADCTL EDP CFG2TMC DP AUX CH1 HPD Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_EDP_HDMI_CEC_0,PADCTL EDP HDMI CEC Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x30 0.--1. " PM                 ,PM select" "HDMI,?..."
line.long 0x34 "PADCTL_EDP_CFG2TMC_HDMI_CEC_0,PADCTL EDP CFG2TMC HDMI CEC Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x800++0x1B
line.long 0x00 "PADCTL_EDP_SCR_SCR_GPIO_EDP2_0,PADCTL EDP Security Control (SCR) GPIO EDP2 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_EDP_SCR_SCR_GPIO_EDP3_0,PADCTL EDP Security Control (SCR) GPIO EDP3 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_EDP_SCR_SCR_GPIO_EDP0_0,PADCTL EDP Security Control (SCR) GPIO EDP0 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_EDP_SCR_SCR_GPIO_EDP1_0,PADCTL EDP Security Control (SCR) GPIO EDP1 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_EDP_SCR_SCR_DP_AUX_CH0_HPD_0,PADCTL EDP Security Control (SCR) DP AUX CH0 HPD Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_EDP_SCR_SCR_DP_AUX_CH1_HPD_0,PADCTL EDP Security Control (SCR) DP AUX CH1 HPD Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_EDP_SCR_SCR_HDMI_CEC_0,PADCTL EDP Security Control (SCR) HDMI CEC Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02430000
group.long 0x7000++0x37
line.long 0x00 "PADCTL_PEX_CTL_PEX_L2_CLKREQ_N_0,PADCTL PEX Control PEX L2 CLKREQ N Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" "PE2,GP,SATA,?..."
line.long 0x04 "PADCTL_PEX_CTL_CFG2TMC_PEX_L2_CLKREQ_N_0,PADCTL PEX Control CFG2TMC PEX L2 CLKEQ N Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_PEX_CTL_PEX_WAKE_N_0,PADCTL PEX Control PEX WAKE N Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" "PE,?..."
line.long 0x0C "PADCTL_PEX_CTL_CFG2TMC_PEX_WAKE_N_0,PADCTL PEX Control CFG2TMC PEX WAKE N Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_PEX_CTL_PEX_L1_CLKREQ_N_0,PADCTL PEX Control PEX L1 CLKEQ N Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" "PE1,?..."
line.long 0x14 "PADCTL_PEX_CTL_CFG2TMC_PEX_L1_CLKREQ_N_0,PADCTL PEX Control CFG2TMC PEX L1 CLKREQ N Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_PEX_CTL_PEX_L1_RST_N_0,PADCTL PEX Control PEX L1 RST N Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" "PE1,?..."
line.long 0x1C "PADCTL_PEX_CTL_CFG2TMC_PEX_L1_RST_N_0,PADCTL PEX Control CFG2TMC PEX L1 RST N Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_PEX_CTL_PEX_L0_CLKREQ_N_0,PADCTL PEX Control PEX L0 CLKREQ N Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x20 0.--1. " PM                 ,PM select" "PE0,?..."
line.long 0x24 "PADCTL_PEX_CTL_CFG2TMC_PEX_L0_CLKREQ_N_0,PADCTL PEX CFG2TMC REX L0 CLKREQ N Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_PEX_CTL_PEX_L0_RST_N_0,PADCTL PEX CLT PEX L0 RST N Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x28 0.--1. " PM                 ,PM select" "PE0,?..."
line.long 0x2C "PADCTL_PEX_CTL_CFG2TMC_PEX_L0_RST_N_0,PADCTL PEX Control CFG2TMC PEX L0 RST N Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_PEX_CTL_PEX_L2_RST_N_0,PADCTL PEX Control PEX L2 RST N Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x30 0.--1. " PM                 ,PM select" "PE2,SOC,SATA,?..."
line.long 0x34 "PADCTL_PEX_CTL_CFG2TMC_PEX_L2_RST_N_0,PADCTL PEX Control CFG2TMC REX L2 RST N Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x7800++0x1B
line.long 0x00 "PADCTL_PEX_CTL_SCR_SCR_PEX_L2_CLKREQ_N_0,PADCTL PEX Control SCR PEX L2 CLKREQ N Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_PEX_CTL_SCR_SCR_PEX_WAKE_N_0,PADCTL PEX Control SCR PEX WAKE N Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_PEX_CTL_SCR_SCR_PEX_L1_CLKREQ_N_0,PADCTL PEX Control SCR PEX L1 CLKREQ N Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_PEX_CTL_SCR_SCR_PEX_L1_RST_N_0,PADCTL PEX Control SCR PEX L1 RST N Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_PEX_CTL_SCR_SCR_PEX_L0_CLKREQ_N_0,PADCTL PEX Control SCR PEX L0 CLKREQ N Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_PEX_CTL_SCR_SCR_PEX_L0_RST_N_0,PADCTL PEX Control SCR PEX L0 RST N Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_PEX_CTL_SCR_SCR_PEX_L2_RST_N_0,PADCTL PEX Control SCR PEX L2 RST N Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02438000
group.long 0x00++0x33
line.long 0x00 "PADCTL_SDMMC1_HV_SDMMC1_CLK_0,PADCTL SDMMC1 HV CLK Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 5. "     E_LPBK      ,E_LPBK enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "SDMMC1,?..."
line.long 0x04 "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_CLK_0,PADCTL SDMMC1 HV CFG2TMC CLK Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_SDMMC1_HV_SDMMC1_CMD_0,PADCTL SDMMC1 HV CMD Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x08 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM                 ,PM select" "SDMMC1,?..."
line.long 0x0C "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_CMD_0,PADCTL SDMMC1 HV CFG2TMC SDMMC1 CMD Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_SDMMC1_HV_SDMMC1_COMP_0,PADCTL SDMMC1 HV COMP Register"
bitfld.long 0x10 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 0.--1. "  PM                 ,PM select" "SDMMC1,?..."
line.long 0x14 "PADCTL_SDMMC1_HV_SDMMC1_DAT3_0,PADCTL SDMMC1 HV DAT3 Register"
bitfld.long 0x14 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x14 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x14 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x14 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x14 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x14 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x14 0.--1. "    PM                 ,PM select" "SDMMC1,?..."
line.long 0x18 "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_DAT3_0,PADCTL SDMMC1 HV CFG2TMC DAT3 Register"
bitfld.long 0x18 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x18 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x1C "PADCTL_SDMMC1_HV_SDMMC1_DAT2_0,PADCTL SDMMC1 HV DAT2 Register"
bitfld.long 0x1C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x1C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x1C 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x1C 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x1C 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x1C 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x1C 0.--1. "    PM                 ,PM select" "SDMMC1,1,2,3"
line.long 0x20 "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_DAT2_0,PADCTL SDMMC1 HV CFG2TMC DAT2 Register"
bitfld.long 0x20 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x20 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x24 "PADCTL_SDMMC1_HV_SDMMC1_DAT1_0,PADCTL SDMMC1 HV DAT1 Register"
bitfld.long 0x24 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x24 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x24 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x24 6. "     E_INPUT     ,L_INPUT enable" "Disabled,Enabled"
bitfld.long 0x24 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x24 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x24 0.--1. "    PM                 ,PM select" "SDMMC1,?..."
line.long 0x28 "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_DAT1_0,PADCTL SDMMC1 HV CFG2TMC SDMMC1 DAT1 Register"
bitfld.long 0x28 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x28 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x2C "PADCTL_SDMMC1_HV_SDMMC1_DAT0_0,PADCTL SDMMC1 HV SDMMC1 DAT0 Register"
bitfld.long 0x2C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x2C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x2C 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x2C 6. "     E_INPUT     ,L_INPUT enable" "Disabled,Enabled"
bitfld.long 0x2C 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x2C 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x2C 0.--1. "    PM                 ,PM select" "SDMMC1,?..."
line.long 0x30 "PADCTL_SDMMC1_HV_CFG2TMC_SDMMC1_DAT0_0,PADCTL SDMMC1 HV CFG2TMC SDMMC1 DAT0 Register"
bitfld.long 0x30 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x30 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
group.long 0x800++0x1B
line.long 0x00 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_CLK_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 CLK Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_CMD_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 CMD Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_COMP_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 COMP Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_DAT3_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 DAT3 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_DAT2_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 DAT2 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_DAT1_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 DAT1 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SDMMC1_HV_SCR_SCR_SDMMC1_DAT0_0,PADCTL SDMMC1 HV Security Control (SCR) SDMMC1 DAT0 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x1000++0x73
line.long 0x00 "PADCTL_SDMMC2_HV_EQOS_TD3_0,PADCTL SDMMC2 HV EQOS TD3 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x00 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x04 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TD3_0,PADCTL SDMMC2 HV CFG2TMC EQOS TD3 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_SDMMC2_HV_EQOS_TD2_0,PADCTL SDMMC2 HV EQOS TD2 Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x08 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x0C "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TD2_0,PADCTL SDMMC2 HV CFG2TMC EQOS TD2 Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_SDMMC2_HV_EQOS_TD1_0,PADCTL SDMMC2 HV EQOS TD1 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x10 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x14 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TD1_0,PADCTL SDMMC2 HV CFG2TMC EQOS TD1 Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x18 "PADCTL_SDMMC2_HV_EQOS_TD0_0,PADCTL SDMMC2 HV EQOS TD0 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x18 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x1C "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TD0_0,PADCTL SDMMC2 HV CFG2TMC EQOS TD0 Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x20 "PADCTL_SDMMC2_HV_EQOS_RD3_0,PADCTL SDMMC2 HV EQOS RD3 Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x20 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x20 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 5. "     E_LPBK      ,E_LPBK enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "EQOS,SDMMC2,?..."
line.long 0x24 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RD3_0,PADCTL SDMMC2 HV CFG2TMC EQOS RD3 Register"
bitfld.long 0x24 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x24 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x28 "PADCTL_SDMMC2_HV_EQOS_RD2_0,PADCTL SDMMC2 HV EQOS RD2 Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x28 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x28 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x28 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x2C "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RD2_0,PADCTL SDMMC2 HV CFG2TMC EQOS RD2 Register"
bitfld.long 0x2C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x2C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x30 "PADCTL_SDMMC2_HV_EQOS_RD1_0,PADCTL SDMMC2 HV EQOS ED1 Register"
bitfld.long 0x30 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x30 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x30 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x30 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x34 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RD1_0,PADCTL SDMMC2 HV CFG2TMC EQOS RD1 Register"
bitfld.long 0x34 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x34 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x38 "PADCTL_SDMMC2_HV_EQOS_MDIO_0,PADCTL SDMMC2 HV EQOS MDIO Register"
bitfld.long 0x38 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x38 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x38 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x38 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM                 ,PM select" "EQOS,SOC,?..."
line.long 0x3C "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_MDIO_0,PADCTL SDMMC2 HV CFG2TMC EQOS MDIO Register"
bitfld.long 0x3C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x3C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x40 "PADCTL_SDMMC2_HV_EQOS_RD0_0,PADCTL SDMMC2 HV EQOS RD0 Register"
bitfld.long 0x40 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x40 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x40 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x40 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x40 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x44 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RD0_0,PADCTL SDMMC2 HV CFG2TMC EQOS RD0 Register"
bitfld.long 0x44 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x44 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x48 "PADCTL_SDMMC2_HV_EQOS_MDC_0,PADCTL SDMMC2 HV EQOS MDC Register"
bitfld.long 0x48 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x48 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x48 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x48 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x48 0.--1. "    PM                 ,PM select" "EQOS,?..."
line.long 0x4C "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_MDC_0,PADCTL SDMMC2 HV CFG2TMC EQOS MDC Register"
bitfld.long 0x4C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x4C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x50 "PADCTL_SDMMC2_HV_EQOS_COMP_0,PADCTL SDMMC2 HV EQOS COMP Register"
bitfld.long 0x50 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 0.--1. "  PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x54 "PADCTL_SDMMC2_HV_EQOS_TXC_0,PADCTL SDMMC2 HV EQOS TXC Register"
bitfld.long 0x54 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x54 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x54 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x54 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x54 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x54 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x54 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x58 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TXC_0,PADCTL SDMMC2 HV CFG2TMC EQOS TXC Register"
bitfld.long 0x58 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x58 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x5C "PADCTL_SDMMC2_HV_EQOS_RXC_0,PADCTL SDMMC2 HV EQOS RXC Register"
bitfld.long 0x5C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x5C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x5C 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x5C 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x5C 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x5C 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x5C 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x60 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RXC_0,PADCTL SDMMC2 HV CFG2TMC EQOS RXC Register"
bitfld.long 0x60 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x60 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x64 "PADCTL_SDMMC2_HV_EQOS_TX_CTL_0,PADCTL SDMMC2 HV EQOS TX CTL Register"
bitfld.long 0x64 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x64 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x64 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x64 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x64 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x64 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x64 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x68 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_TX_CTL_0,PADCTL SDMMC2 HV CFG2TMC EQOS TX CTL Register"
bitfld.long 0x68 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x68 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x6C "PADCTL_SDMMC2_HV_EQOS_RX_CTL_0,PADCTL SDMMC2 HV EQOS RX CTL Register"
bitfld.long 0x6C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE 0 select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x6C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 10. " GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x6C 9. "         E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x6C 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x6C 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x6C 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x6C 0.--1. "    PM                 ,PM select" "EQOS,SDMMC2,?..."
line.long 0x70 "PADCTL_SDMMC2_HV_CFG2TMC_EQOS_RX_CTL_0,PADCTL SDMMC2 HV CFG2TMC EQOS RX CTL Register"
bitfld.long 0x70 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x70 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
group.long 0x1800++0x3B
line.long 0x00 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TD3_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TD3 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TD2_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TD2 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TD1_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TD1 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TD0_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TD0 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RD3_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RD3 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RD2_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RD2 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RD1_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RD1 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_MDIO_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS MDIO Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RD0_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RD0 Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_MDC_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS MDC Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_COMP_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS COMP Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TXC_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TXC Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x30 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RXC_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RXC Register"
bitfld.long 0x30 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x30 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x30 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x30 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x30 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x30 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x30 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x30 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x30 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x34 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_TX_CTL_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS TX CTL Register"
bitfld.long 0x34 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x34 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x34 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x34 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x34 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x34 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x34 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x34 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x34 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x38 "PADCTL_SDMMC2_HV_SCR_SCR_EQOS_RX_CTL_0,PADCTL SDMMC2 HV Security Control (SCR) EQOS RX CTL Register"
bitfld.long 0x38 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x38 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x38 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x38 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x38 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x38 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x38 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x38 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x38 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0x2000++0x33
line.long 0x00 "PADCTL_SDMMC3_HV_SDMMC3_DAT3_0,PADCTL SDMMC3 HV SDMMC3 DAT3 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x00 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x00 0.--1. " PM                 ,PM select" "SDMMC3,?..."
line.long 0x04 "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_DAT3_0,PADCTL SDMMC3 HV CFG2TMC SDMMC3 DAT3 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_SDMMC3_HV_SDMMC3_DAT2_0,PADCTL SDMMC3 HV SDMMC3 DAT2 Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x08 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x08 0.--1. " PM                 ,PM select" "SDMMC3,?..."
line.long 0x0C "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_DAT2_0,PADCTL SDMMC3 HC CFG2TMC SDMMC3 DAT2 Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_SDMMC3_HV_SDMMC3_DAT1_0,PADCTL SDMMC3 HV SDMMC3 DAT1 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x10 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x10 0.--1. " PM                 ,PM select" "SDMMC3,?..."
line.long 0x14 "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_DAT1_0,PADCTL SDMMC3 HV CFG2TMC SDMMC3 DAT1 Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x18 "PADCTL_SDMMC3_HV_SDMMC3_DAT0_0,PADCTL SDMMC3 HV SDMMC3 DAT0 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x18 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x18 0.--1. " PM                 ,PM select" "SDMMC3,?..."
line.long 0x1C "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_DAT0_0,PADCTL SDMMC3 HV CFG2TMC SDMMC3 DAT0 Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x20 "PADCTL_SDMMC3_HV_SDMMC3_COMP_0,PADCTL SDMMC3 HV SDMMC3 COMP Register"
bitfld.long 0x20 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 0.--1. "  PM                 ,PM select" "SDMMC3,?..."
line.long 0x24 "PADCTL_SDMMC3_HV_SDMMC3_CMD_0,PADCTL SDMMC3 HV SDMMC3 CMD Register"
bitfld.long 0x24 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x24 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x24 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x24 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x24 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x24 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x24 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x24 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x24 0.--1. " PM                 ,PM select" "SDMMC3,?..."
line.long 0x28 "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_CMD_0,PADCTL SDMMC3 HV CFG2TMC SDMMC3 CMD Register"
bitfld.long 0x28 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x28 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x2C "PADCTL_SDMMC3_HV_SDMMC3_CLK_0,PADCTL SDMMC3 HV SDMMC3 CLK Register"
bitfld.long 0x2C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x2C 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x2C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x2C 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
textline "                                                   "
bitfld.long 0x2C 9. " E_PBIAS_BUF        ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x2C 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x2C 5. "     E_LPBK      ,E_LPBK enable" "Disabled,Enabled"
bitfld.long 0x2C 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
textline "                                                   "
bitfld.long 0x2C 2.--3. " PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x2C 0.--1. "    PM                 ,PM select" "SDMMC3,?..."
line.long 0x30 "PADCTL_SDMMC3_HV_CFG2TMC_SDMMC3_CLK_0,PADCTL SDMMC3 HV CFG2TMC SDMMC3 CLK Register"
bitfld.long 0x30 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x30 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
group.long 0x2800++0x1B
line.long 0x00 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_DAT3_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 DAT3 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_DAT2_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 DAT2 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_DAT1_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 DAT1 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_DAT0_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 DAT0 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_COMP_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 COMP Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_CMD_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 CMD Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SDMMC3_HV_SCR_SCR_SDMMC3_CLK_0,PADCTL SDMMC3 HV Security Control (SCR) SDMMC3 CLK Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02430000
group.long 0x6000++0x2F
line.long 0x00 "PADCTL_SDMMC4_SDMMC4_COMP_0,PADCTL SDMMC4 COMP Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x00 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x04 "PADCTL_SDMMC4_SDMMC4_CLK_0,PADCTL SDMMC4 CLK Register"
bitfld.long 0x04 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x04 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x04 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " E_PREEMP           ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x04 6. "     E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x04 5. "     E_LPBK      ,E_LPBK enable" "Disabled,Enabled"
bitfld.long 0x04 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x08 "PADCTL_SDMMC4_SDMMC4_CMD_0,PADCTL SDMMC4 CMD Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x08 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x0C "PADCTL_SDMMC4_SDMMC4_DQS_0,PADCTL SDMMC4 DQS Register"
bitfld.long 0x0C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x0C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x0C 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x0C 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x10 "PADCTL_SDMMC4_SDMMC4_DAT7_0,PADCTL SDMMC4 DAT7 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x10 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x14 "PADCTL_SDMMC4_SDMMC4_DAT6_0,PADCTL SDMMC4 DAT6 Register"
bitfld.long 0x14 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x14 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x14 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x14 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x18 "PADCTL_SDMMC4_SDMMC4_DAT5_0,PADCTL SDMMC4 DAT5 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x18 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x1C "PADCTL_SDMMC4_SDMMC4_DAT4_0,PADCTL SDMMC4 DAT4 Register"
bitfld.long 0x1C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x1C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x1C 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x1C 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x20 "PADCTL_SDMMC4_SDMMC4_DAT3_0,PADCTL SDMMC4 DAT3 Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x20 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x24 "PADCTL_SDMMC4_SDMMC4_DAT2_0,PADCTL SDMMC4 DAT2 Register"
bitfld.long 0x24 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x24 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x24 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x24 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x24 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x28 "PADCTL_SDMMC4_SDMMC4_DAT1_0,PADCTL SDMMC4 DAT1 Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x28 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x2C "PADCTL_SDMMC4_SDMMC4_DAT0_0,PADCTL SDMMC4 DAT0 Register"
bitfld.long 0x2C 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x2C 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x2C 12. "     E_SCHMT     ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x2C 9. "     E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x2C 2.--3. "     PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
group.long 0x6800++0x2F
line.long 0x00 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_COMP_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 COMP Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_CLK_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 CLK Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_CMD_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 CMD Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DQS_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DQS Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT7_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT7 Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT6_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT6 Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT5_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT5 Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT4_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT4 Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT3_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT3 Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT2_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT2 Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT1_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT1 Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_SDMMC4_SCR_SCR_SDMMC4_DAT0_0,PADCTL SDMMC4 Security Control (SCR) SDMMC4 DAT0 Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02438000
group.long 0x3000++0x33
line.long 0x00 "PADCTL_SPI_QSPI_IO3_0,PADCTL SPI QSPI IO3 Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x00 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x00 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD               ,PUPD select" "None,Pull_down,Pull_up,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x04 "PADCTL_SPI_CFG2TMC_QSPI_IO3_0,PADCTL SPI CFG2TMC QSPI IO3 Register"
bitfld.long 0x04 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x04 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x08 "PADCTL_SPI_QSPI_IO2_0,PADCTL SPI QSPI IO2 Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x08 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x08 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x0C "PADCTL_SPI_CFG2TMC_QSPI_IO2_0,PADCTL SPI CFG2TMC QSPI IO2 Register"
bitfld.long 0x0C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x0C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x10 "PADCTL_SPI_QSPI_IO1_0,PADCTL SPI QSPI IO1 Register"
bitfld.long 0x10 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x10 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x10 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x10 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x14 "PADCTL_SPI_CFG2TMC_QSPI_IO1_0,PADCTL SPI CFG2TMC QSPI IO1 Register"
bitfld.long 0x14 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x14 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x18 "PADCTL_SPI_QSPI_IO0_0,PADCTL SPI QSPI IO0 Register"
bitfld.long 0x18 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x18 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x18 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x18 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x1C "PADCTL_SPI_CFG2TMC_QSPI_IO0_0,PADCTL SPI CFG2TMC QSPI IO0 Register"
bitfld.long 0x1C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x1C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x20 "PADCTL_SPI_QSPI_SCK_0,PADCTL SPI QSPI SCK Register"
bitfld.long 0x20 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x20 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x20 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x20 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x24 "PADCTL_SPI_CFG2TMC_QSPI_SCK_0,PADCTL SPI CFG2TMC QSPI SCK Register"
bitfld.long 0x24 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x24 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x28 "PADCTL_SPI_QSPI_CS_N_0,PADCTL SPI QSPI CS N Register"
bitfld.long 0x28 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x28 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x28 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x28 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "QSPI,?..."
line.long 0x2C "PADCTL_SPI_CFG2TMC_QSPI_CS_N_0,PADCTL SPI CFG2TMC QSPI CS N Register"
bitfld.long 0x2C 30.--31. " CFG_CAL_DRVUP_SLWF ,CFG_CAL_DRVUP_SLWF" "0,1,2,3"
bitfld.long 0x2C 28.--29. "            CFG_CAL_DRVDN_SLWR ,CFG_CAL_DRVDN_SLWR" "0,1,2,3"
line.long 0x30 "PADCTL_SPI_QSPI_COMP_0,PADCTL SPI QSPI COMP Register"
bitfld.long 0x30 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x30 13.--14. "           DRV_TYPE           ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
bitfld.long 0x30 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 0.--1. "  PM          ,PM select" "QSPI,?..."
group.long 0x3800++0x1B
line.long 0x00 "PADCTL_SPI_SCR_SCR_QSPI_IO3_0,PADCTL SPI Security Control (SCR) QSPI IO3 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SPI_SCR_SCR_QSPI_IO2_0,PADCTL SPI Security Control (SCR) QSPI IO2 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SPI_SCR_SCR_QSPI_IO1_0,PADCTL SPI Security Control (SCR) QSPI IO1 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SPI_SCR_SCR_QSPI_IO0_0,PADCTL SPI Security Control (SCR) QSPI IO0 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SPI_SCR_SCR_QSPI_SCK_0,PADCTL SPI Security Control (SCR) QSPI SCK Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SPI_SCR_SCR_QSPI_CS_N_0,PADCTL SPI Security Control (SCR) QSPI CS N Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SPI_SCR_SCR_QSPI_COMP_0,PADCTL SPI Security Control (SCR) QSPI COMP Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x0C300000
group.long 0x1000++0x6F
line.long 0x00 "PADCTL_SYS_GPIO_SW1_0,PADCTL SYS GPIO SW1 Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x04 "PADCTL_SYS_CFG2TMC_GPIO_SW1_0,PADCTL SYS CFG2TMC GPIO SW1 Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_SYS_GPIO_SW2_0,PADCTL SYS GPIO SW2 Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x0C "PADCTL_SYS_CFG2TMC_GPIO_SW2_0,PADCTL SYS CFG2TMC GPIO SW2 Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_SYS_GPIO_SW3_0,PADCTL SYS GPIO SW3 Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x14 "PADCTL_SYS_CFG2TMC_GPIO_SW3_0,PADCTL SYS CFG2TMC GPIO SW3 Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_SYS_GPIO_SW4_0,PADCTL SYS GPIO SW4 Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x1C "PADCTL_SYS_CFG2TMC_GPIO_SW4_0,PADCTL SYS CFG2TMC GPIO SW4 Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_SYS_SHUTDOWN_0,PADCTL SYS Shutdown Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 8. "     E_LPDR             ,E_LPDR enable" "Disabled,Enabled"
bitfld.long 0x20 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enable"
bitfld.long 0x20 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x24 "PADCTL_SYS_CFG2TMC_SHUTDOWN_0,PADCTL SYS CFG2TMC Shutdown Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_SYS_PMU_INT_N_0,PADCTL SYS PMU INT N Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 8. "     E_LPDR             ,E_LPDR enable" "Disabled,Enabled"
bitfld.long 0x28 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enable"
bitfld.long 0x28 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x2C "PADCTL_SYS_CFG2TMC_PMU_INT_N_0,PADCTL SYS CFG2TMC PMU INT N Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_SYS_SAFE_STATE_0,PADCTL SYS Safe state Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM          ,PM select" "SCE,?..."
line.long 0x34 "PADCTL_SYS_CFG2TMC_SAFE_STATE_0,PADCTL SYS CFG2TMC Safe state Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_SYS_VCOMP_ALERT_0,PADCTL SYS VCOMP Alert Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "SOC,?..."
line.long 0x3C "PADCTL_SYS_CFG2TMC_VCOMP_ALERT_0,PADCTL SYS CFG2TMC VCOMP Alert Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_SYS_SOC_PWR_REQ_0,PADCTL SYS SOC REQ Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 8. "     E_LPDR             ,E_LPDR enable" "Disabled,Enabled"
bitfld.long 0x40 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enable"
bitfld.long 0x40 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x44 "PADCTL_SYS_CFG2TMC_SOC_PWR_REQ_0,PADCTL SYS CFG2TMC SOC PWR REQ Register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x48 "PADCTL_SYS_BATT_OC_0,PADCTL SYS Bait OC Register"
bitfld.long 0x48 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x48 0.--1. "    PM          ,PM select" "SOC,?..."
line.long 0x4C "PADCTL_SYS_CFG2TMC_BATT_OC_0,PADCTL SYS CFG2TMC Bait OC Register"
bitfld.long 0x4C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x4C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x50 "PADCTL_SYS_CLK_32K_IN_0,PADCTL SYS CLK 32K IN Register"
bitfld.long 0x50 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 8. "     E_LPDR             ,E_LPDR enable" "Disabled,Enabled"
bitfld.long 0x50 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enable"
bitfld.long 0x50 2.--3. "     PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x54 "PADCTL_SYS_CFG2TMC_CLK_32K_IN_0,PADCTL SYS CFG2TMC CLK 32K IN Register"
bitfld.long 0x54 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x54 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x58 "PADCTL_SYS_POWER_ON_0,PADCTL SYS Power ON Register"
bitfld.long 0x58 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x58 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x58 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x58 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x58 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x58 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x5C "PADCTL_SYS_CFG2TMC_POWER_ON_0,PADCTL SYS CFG2TMC Power ON Register"
bitfld.long 0x5C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x5C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x60 "PADCTL_SYS_PWR_I2C_SCL_0,PADCTL SYS PWR I2C SCL Register"
bitfld.long 0x60 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x60 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x60 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x60 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x60 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x60 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x60 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x60 0.--1. " PM                 ,PM select" "I2C5,?..."
line.long 0x64 "PADCTL_SYS_CFG2TMC_PWR_I2C_SCL_0,PADCTL SYS CFG2TMC PWR I2C SCL Register"
bitfld.long 0x64 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x64 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x68 "PADCTL_SYS_PWR_I2C_SDA_0,PADCTL SYS PWR I2C SDA Register"
bitfld.long 0x68 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x68 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x68 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x68 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x68 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0x68 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x68 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0x68 0.--1. " PM                 ,PM select" "I2C5,?..."
line.long 0x6C "PADCTL_SYS_CFG2TMC_PWR_I2C_SDA_0,PADCTL SYS CFG2TMC PWR I2C SDA Register"
bitfld.long 0x6C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x6C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1080++0x2F
line.long 0x00 "PADCTL_SYS_GPIO_DIS0_0,PADCTL SYS GPIO DIS0 Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" ",GP,DCB,DCC"
line.long 0x04 "PADCTL_SYS_CFG2TMC_GPIO_DIS0_0,PADCTL SYS CFG2TMC GPIO DIS0 Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_SYS_GPIO_DIS1_0,PADCTL SYS GPIO DIS1 Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" ",,DISPLAYA,?..."
line.long 0x0C "PADCTL_SYS_CFG2TMC_GPIO_DIS1_0,PADCTL SYS CFG2TMC GPIO DIS1 Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_SYS_GPIO_DIS2_0,PADCTL SYS GPIO DIS2 Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" ",GP,DCA,?..."
line.long 0x14 "PADCTL_SYS_CFG2TMC_GPIO_DIS2_0,PADCTL SYS CFG2TMC GPIO DIS2 Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_SYS_GPIO_DIS3_0,PADCTL SYS GPIO DIS3 Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" ",,DISPLAYB,DCC"
line.long 0x1C "PADCTL_SYS_CFG2TMC_GPIO_DIS3_0,PADCTL SYS CFG2TMC GPIO DIS3 Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_SYS_GPIO_DIS4_0,PADCTL SYS GPIO DIS4 Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" ",SOC,DCA,?..."
line.long 0x24 "PADCTL_SYS_CFG2TMC_GPIO_DIS4_0,PADCTL SYS CFG2TMC GPIO DIS4 Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_SYS_GPIO_DIS5_0,PADCTL SYS GPIO DIS5 Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" ",GP,DCC,DCB"
line.long 0x2C "PADCTL_SYS_CFG2TMC_GPIO_DIS5_0,PADCTL SYS CFG2TMC GPIO DIS5 Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1800++0x4F
line.long 0x00 "PADCTL_SYS_SCR_SCR_GPIO_SW1_0,PADCTL SYS Security Control (SCR) GPIO SW1 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_SYS_SCR_SCR_GPIO_SW2_0,PADCTL SYS Security Control (SCR) GPIO SW2 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_SYS_SCR_SCR_GPIO_SW3_0,PADCTL SYS Security Control (SCR) GPIO SW3 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_SYS_SCR_SCR_GPIO_SW4_0,PADCTL SYS Security Control (SCR) GPIO SW4 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_SYS_SCR_SCR_SHUTDOWN_0,PADCTL SYS Security Control (SCR) Shutdown Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_SYS_SCR_SCR_PMU_INT_N_0,PADCTL SYS Security Control (SCR) PMU INT N Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_SYS_SCR_SCR_SAFE_STATE_0,PADCTL SYS Security Control (SCR) Safe State Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_SYS_SCR_SCR_VCOMP_ALERT_0,PADCTL SYS Security Control (SCR) VCOMP Alert Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_SYS_SCR_SCR_SOC_PWR_REQ_0,PADCTL SYS Security Control (SCR) SOC PWR REQ Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_SYS_SCR_SCR_BATT_OC_0,PADCTL SYS Security Control (SCR) Bait OC Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_SYS_SCR_SCR_CLK_32K_IN_0,PADCTL SYS Security Control (SCR) CLK 32K IN Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_SYS_SCR_SCR_POWER_ON_0,PADCTL SYS Security Control (SCR) Power ON Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x30 "PADCTL_SYS_SCR_SCR_PWR_I2C_SCL_0,PADCTL SYS Security Control (SCR) PWR I2C SCL Register"
bitfld.long 0x30 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x30 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x30 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x30 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x30 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x30 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x30 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x30 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x30 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x34 "PADCTL_SYS_SCR_SCR_PWR_I2C_SDA_0,PADCTL SYS Security Control (SCR) PWR I2C SDA Register"
bitfld.long 0x34 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x34 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x34 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x34 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x34 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x34 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x34 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x34 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x34 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x38 "PADCTL_SYS_SCR_SCR_GPIO_DIS0_0,PADCTL SYS Security Control (SCR) GPIO DIS0 Register"
bitfld.long 0x38 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x38 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x38 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x38 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x38 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x38 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x38 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x38 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x38 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x3C "PADCTL_SYS_SCR_SCR_GPIO_DIS1_0,PADCTL SYS Security Control (SCR) GPIO DIS1 Register"
bitfld.long 0x3C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x3C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x3C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x3C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x3C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x3C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x3C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x3C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x3C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x40 "PADCTL_SYS_SCR_SCR_GPIO_DIS2_0,PADCTL SYS Security Control (SCR) GPIO DIS2 Register"
bitfld.long 0x40 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x40 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x40 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x40 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x40 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x40 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x40 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x40 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x40 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x44 "PADCTL_SYS_SCR_SCR_GPIO_DIS3_0,PADCTL SYS Security Control (SCR) GPIO DIS3 Register"
bitfld.long 0x44 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x44 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x44 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x44 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x44 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x44 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x44 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x44 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x44 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x48 "PADCTL_SYS_SCR_SCR_GPIO_DIS4_0,PADCTL SYS Security Control (SCR) GPIO DIS4 Register"
bitfld.long 0x48 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x48 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x48 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x48 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x48 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x48 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x48 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x48 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x48 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x4C "PADCTL_SYS_SCR_SCR_GPIO_DIS5_0,PADCTL SYS Security Control (SCR) GPIO DIS5 Register"
bitfld.long 0x4C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x4C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x4C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x4C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x4C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x4C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x4C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x4C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x4C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x4C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x4C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02438000
group.long 0x5000++0xEF
line.long 0x00 "PADCTL_UART_GPIO_WAN8_0,PADCTL UART GPIO WAN8 Register"
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x00 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" ",,SPI1,?..."
line.long 0x04 "PADCTL_UART_CFG2TMC_GPIO_WAN8_0,PADCTL UART CFG2TMC GPIO WAN8 Register"
bitfld.long 0x04 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "PADCTL_UART_GPIO_WAN7_0,PADCTL UART GPIO WAN7 Register"
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x08 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" ",,SPI1,?..."
line.long 0x0C "PADCTL_UART_CFG2TMC_GPIO_WAN7_0,PADCTL UART CFG2TMC GPIO WAN7 Register"
bitfld.long 0x0C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "PADCTL_UART_GPIO_WAN6_0,PADCTL UART GPIO WAN6 Register"
bitfld.long 0x10 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x10 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x10 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x10 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x10 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x10 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x10 0.--1. "    PM          ,PM select" ",,SPI1,?..."
line.long 0x14 "PADCTL_UART_CFG2TMC_GPIO_WAN6_0,PADCTL UART CFG2TMC GPIO WAN6 Register"
bitfld.long 0x14 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "PADCTL_UART_GPIO_WAN5_0,PADCTL UART GPIO WAN5 Register"
bitfld.long 0x18 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x18 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x18 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x18 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x18 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x18 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x18 0.--1. "    PM          ,PM select" ",,SPI1,?..."
line.long 0x1C "PADCTL_UART_CFG2TMC_GPIO_WAN5_0,PADCTL UART CFG2TMC GPIO WAN5 Register"
bitfld.long 0x1C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "PADCTL_UART_UART2_TX_0,PADCTL UART UART2 TX Register"
bitfld.long 0x20 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x20 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x20 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x20 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x20 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x20 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x20 0.--1. "    PM          ,PM select" "UARTB,?..."
line.long 0x24 "PADCTL_UART_CFG2TMC_UART2_TX_0,PADCTL UART CFG2TMC UART2 TX Register"
bitfld.long 0x24 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "PADCTL_UART_UART2_RX_0,PADCTL UART UART2 RX Register"
bitfld.long 0x28 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x28 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x28 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x28 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x28 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x28 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x28 0.--1. "    PM          ,PM select" "UARTB,?..."
line.long 0x2C "PADCTL_UART_CFG2TMC_UART2_RX_0,PADCTL UART CFG2TMC UART2 RX Register"
bitfld.long 0x2C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x2C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "PADCTL_UART_UART2_RTS_0,PADCTL UART UART2 RTS Register"
bitfld.long 0x30 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x30 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x30 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x30 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x30 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x30 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x30 0.--1. "    PM          ,PM select" "UARTB,?..."
line.long 0x34 "PADCTL_UART_CFG2TMC_UART2_RTS_0,PADCTL UART CFG2TMC UART2 RTS Register"
bitfld.long 0x34 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x34 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x38 "PADCTL_UART_UART2_CTS_0,PADCTL UART UART2 CTS Register"
bitfld.long 0x38 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x38 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x38 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x38 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x38 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x38 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x38 0.--1. "    PM          ,PM select" "UARTB,?..."
line.long 0x3C "PADCTL_UART_CFG2TMC_UART2_CTS_0,PADCTL UART CFG2TMC UART2 CTS Register"
bitfld.long 0x3C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x3C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x40 "PADCTL_UART_UART5_RX_0,PADCTL UART UART5 RX Register"
bitfld.long 0x40 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x40 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x40 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x40 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x40 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x40 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x40 0.--1. "    PM          ,PM select" "UARTE,SPI3,GP,?..."
line.long 0x44 "PADCTL_UART_CFG2TMC_UART5_RX_0,PADCTL UART CFG2TMC UART5 RX Register"
bitfld.long 0x44 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x44 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x48 "PADCTL_UART_UART5_TX_0,PADCTL UART UART5 TX Register"
bitfld.long 0x48 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x48 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x48 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x48 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x48 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x48 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x48 0.--1. "    PM          ,PM select" "UARTE,SPI3,GP,?..."
line.long 0x4C "PADCTL_UART_CFG2TMC_UART5_TX_0,PADCTL UART CFG2TMC UART5 TX Register"
bitfld.long 0x4C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x4C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x50 "PADCTL_UART_UART5_RTS_0,PADCTL UART UART5 RTS Register"
bitfld.long 0x50 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x50 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x50 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x50 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x50 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x50 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x50 0.--1. "    PM          ,PM select" "UARTE,SPI3,?..."
line.long 0x54 "PADCTL_UART_CFG2TMC_UART5_RTS_0,PADCTL UART CFG2TMC UART5 RTS Register"
bitfld.long 0x54 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x54 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x58 "PADCTL_UART_UART5_CTS_0,PADCTL UART UART5 CTS Register"
bitfld.long 0x58 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x58 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x58 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x58 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x58 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x58 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x58 0.--1. "    PM          ,PM select" "UARTE,SPI3,?..."
line.long 0x5C "PADCTL_UART_CFG2TMC_UART5_CTS_0,PADCTL UART CFG2TMC UART5 CTS Register"
bitfld.long 0x5C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x5C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x60 "PADCTL_UART_GPIO_MDM1_0,PADCTL UART GPIO MDM1 Register"
bitfld.long 0x60 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x60 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x60 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x60 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x60 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x60 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x64 "PADCTL_UART_CFG2TMC_GPIO_MDM1_0,PADCTL UART CFG2TMC GPIO MDM1 Register"
bitfld.long 0x64 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x64 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x68 "PADCTL_UART_GPIO_MDM2_0,PADCTL UART GPIO MDM2 Register"
bitfld.long 0x68 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x68 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x68 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x68 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x68 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x68 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x6C "PADCTL_UART_CFG2TMC_GPIO_MDM2_0,PADCTL UART CFG2TMC GPIO MDM2 Register"
bitfld.long 0x6C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x6C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x70 "PADCTL_UART_GPIO_MDM3_0,PADCTL UART GPIO MDM3 Register"
bitfld.long 0x70 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x70 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x70 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x70 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x70 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x70 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x74 "PADCTL_UART_CFG2TMC_GPIO_MDM3_0,PADCTL UART CFG2TMC GPIO MDM3 Register"
bitfld.long 0x74 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x74 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x78 "PADCTL_UART_GPIO_MDM4_0,PADCTL UART GPIO MDM4 Register"
bitfld.long 0x78 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x78 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x78 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x78 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x78 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x78 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x78 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
bitfld.long 0x78 0.--1. "    PM          ,PM select" "0,SPI1,CCLA,3"
line.long 0x7C "PADCTL_UART_CFG2TMC_GPIO_MDM4_0,PADCTL UART CFG2TMC GPIO MDM4 Register"
bitfld.long 0x7C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x7C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "PADCTL_UART_GPIO_MDM5_0,PADCTL UART GPIO MDM5 Register"
bitfld.long 0x80 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x80 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x80 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x80 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x80 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x80 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x80 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
bitfld.long 0x80 0.--1. "    PM          ,PM select" "0,SPI1,2,3"
line.long 0x84 "PADCTL_UART_CFG2TMC_GPIO_MDM5_0,PADCTL UART CFG2TMC GPIO MDM5 Register"
bitfld.long 0x84 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x84 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x88 "PADCTL_UART_GPIO_MDM6_0,PADCTL UART GPIO MDM6 Register"
bitfld.long 0x88 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x88 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x88 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x88 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x88 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x88 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x88 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x88 0.--1. "    PM          ,PM select" "SOC,?..."
line.long 0x8C "PADCTL_UART_CFG2TMC_GPIO_MDM6_0,PADCTL UART CFG2TMC GPIO MDM6 Register"
bitfld.long 0x8C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x8C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x90 "PADCTL_UART_GPIO_MDM7_0,PADCTL UART GPIO MDM7 Register"
bitfld.long 0x90 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x90 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x90 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x90 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x90 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x90 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x90 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x94 "PADCTL_UART_CFG2TMC_GPIO_MDM7_0,PADCTL UART CFG2TMC GPIO MDM7 Register"
bitfld.long 0x94 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x94 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x98 "PADCTL_UART_BCPU_PWR_REQ_0,PADCTL UART BCPU PWR REQ Register"
bitfld.long 0x98 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x98 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0x98 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x98 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x98 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0x98 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x98 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0x9C "PADCTL_UART_CFG2TMC_BCPU_PWR_REQ_0,PADCTL UART CFG2TMC BCPU PWR REQ Register"
bitfld.long 0x9C 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x9C 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xA0 "PADCTL_UART_MCPU_PWR_REQ_0,PADCTL UART MCPU PWR REQ Register"
bitfld.long 0xA0 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xA0 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xA0 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xA0 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xA0 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xA0 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xA0 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0xA4 "PADCTL_UART_CFG2TMC_MCPU_PWR_REQ_0,PADCTL UART CFG2TMC MCPU PWR REQ register"
bitfld.long 0xA4 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xA4 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xA8 "PADCTL_UART_GPU_PWR_REQ_0,PADCTL UART GPU PWR REQ Register"
bitfld.long 0xA8 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xA8 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xA8 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xA8 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xA8 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xA8 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xA8 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
line.long 0xAC "PADCTL_UART_CFG2TMC_GPU_PWR_REQ_0,PADCTL UART CFG2TMC GPU PWR REQ register"
bitfld.long 0xAC 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xAC 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xB0 "PADCTL_UART_GEN7_I2C_SCL_0,PADCTL UART GEN7 I2C SCL Register"
bitfld.long 0xB0 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xB0 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xB0 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xB0 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xB0 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xB0 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xB0 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xB0 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0xB0 0.--1. " PM                 ,PM select" "I2C7,I2S5,?..."
line.long 0xB4 "PADCTL_UART_CFG2TMC_GEN7_I2C_SCL_0,PADCTL UART CFG2TMC GEN7 I2C SCL Register"
bitfld.long 0xB4 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xB4 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xB8 "PADCTL_UART_GEN7_I2C_SDA_0,PADCTL UART GEN7 I2C SDA Register"
bitfld.long 0xB8 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xB8 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xB8 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xB8 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xB8 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xB8 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xB8 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xB8 2.--3. "  PUPD        ,PUPD select" "None,Pull_down,Pull_up,?..."
textline "                                                   "
bitfld.long 0xB8 0.--1. " PM                 ,PM select" "I2C7,I2S5,?..."
line.long 0xBC "PADCTL_UART_CFG2TMC_GEN7_I2C_SDA_0,PADCTL UART CFG2TMC GEN7 I2C SDA Register"
bitfld.long 0xBC 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xBC 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xC0 "PADCTL_UART_GEN9_I2C_SDA_0,PADCTL UART GEN9 I2C SDA Register"
bitfld.long 0xC0 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xC0 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xC0 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xC0 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xC0 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xC0 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xC0 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xC0 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0xC0 0.--1. " PM                 ,PM select" "I2C9,I2S5,?..."
line.long 0xC4 "PADCTL_UART_CFG2TMC_GEN9_I2C_SDA_0,PADCTL UART CFG2TMC GEN9 I2C SDA Register"
bitfld.long 0xC4 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xC4 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xC8 "PADCTL_UART_GEN9_I2C_SCL_0,PADCTL UART GEN9 I2C SCL Register"
bitfld.long 0xC8 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xC8 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xC8 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xC8 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xC8 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xC8 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xC8 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xC8 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0xC8 0.--1. " PM                 ,PM select" "I2C9,I2S5,?..."
line.long 0xCC "PADCTL_UART_CFG2TMC_GEN9_I2C_SCL_0,PADCTL UART CFG2TMC GEN9 I2C SCL Register"
bitfld.long 0xCC 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xCC 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xD0 "PADCTL_UART_USB_VBUS_EN0_0,PADCTL UART USB VBUS EN0 Register"
bitfld.long 0xD0 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xD0 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xD0 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xD0 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xD0 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xD0 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xD0 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xD0 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0xD0 0.--1. " PM                 ,PM select" "USB,?..."
line.long 0xD4 "PADCTL_UART_CFG2TMC_USB_VBUS_EN0_0,PADCTL UART CFG2TMC USB VBUS EN0 Register"
bitfld.long 0xD4 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xD4 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xD8 "PADCTL_UART_USB_VBUS_EN1_0,PADCTL UART USB VBUS EN1 Register"
bitfld.long 0xD8 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xD8 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xD8 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xD8 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xD8 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xD8 5. "     E_IO_HV            ,E_IO_HV enable" "Disabled,Enabled"
bitfld.long 0xD8 4. "     TRISTATE    ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xD8 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
textline "                                                   "
bitfld.long 0xD8 0.--1. " PM                 ,PM select" "USB,?..."
line.long 0xDC "PADCTL_UART_CFG2TMC_USB_VBUS_EN1_0,PADCTL UART CFG2TMC USB VBUS EN1 Register"
bitfld.long 0xDC 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xDC 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xE0 "PADCTL_UART_GP_PWM7_0,PADCTL UART GP PWM7 register"
bitfld.long 0xE0 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xE0 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xE0 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xE0 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xE0 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xE0 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xE0 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0xE0 0.--1. "    PM          ,PM select" "GP,?..."
line.long 0xE4 "PADCTL_UART_CFG2TMC_GP_PWM7_0,PADCTL UART CFG2TMC GP PWM7 Register"
bitfld.long 0xE4 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xE4 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0xE8 "PADCTL_UART_GP_PWM6_0,PADCTL UART GP PWM6 register"
bitfld.long 0xE8 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0xE8 11. "     E_OD               ,E_OD enable" "Disabled,Enabled"
bitfld.long 0xE8 10. "     GPIO_SF_SEL ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0xE8 8. "         E_LPDR      ,E_LPDR enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0xE8 6. " E_INPUT            ,E_INPUT enable" "Disabled,Enabled"
bitfld.long 0xE8 4. "     TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0xE8 2.--3. "  PUPD        ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0xE8 0.--1. "    PM          ,PM select" "GP,?..."
line.long 0xEC "PADCTL_UART_CFG2TMC_GP_PWM6_0,PADCTL UART CFG2TMC GP PWM6 Register"
bitfld.long 0xEC 20.--24. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0xEC 12.--16. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x5800++0x77
line.long 0x00 "PADCTL_UART_SCR_SCR_GPIO_WAN8_0,PADCTL UART Security Control (SCR) GPIO WAN8 Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_UART_SCR_SCR_GPIO_WAN7_0,PADCTL UART Security Control (SCR) GPIO WAN7 Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x08 "PADCTL_UART_SCR_SCR_GPIO_WAN6_0,PADCTL UART Security Control (SCR) GPIO WAN6 Register"
bitfld.long 0x08 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x08 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x08 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x08 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x08 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x08 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x08 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x08 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x08 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x08 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x08 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x0C "PADCTL_UART_SCR_SCR_GPIO_WAN5_0,PADCTL UART Security Control (SCR) GPIO WAN5 Register"
bitfld.long 0x0C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x0C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x0C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x0C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x0C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x0C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x0C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x0C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x0C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x0C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x0C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x0C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x0C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x10 "PADCTL_UART_SCR_SCR_UART2_TX_0,PADCTL UART Security Control (SCR) UART2 TX Register"
bitfld.long 0x10 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x10 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x10 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x10 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x10 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x10 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x10 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x10 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x10 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x10 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x10 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x10 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x10 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x14 "PADCTL_UART_SCR_SCR_UART2_RX_0,PADCTL UART Security Control (SCR) UART2 RX Register"
bitfld.long 0x14 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x14 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x14 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x14 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x14 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x14 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x14 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x14 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x14 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x14 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x14 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x14 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x14 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x18 "PADCTL_UART_SCR_SCR_UART2_RTS_0,PADCTL UART Security Control (SCR) UART2 RTS Register"
bitfld.long 0x18 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x18 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x18 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x18 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x18 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x18 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x18 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x18 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x18 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x18 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x18 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x18 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x18 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x1C "PADCTL_UART_SCR_SCR_UART2_CTS_0,PADCTL UART Security Control (SCR) UART CTS Register"
bitfld.long 0x1C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x1C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x1C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x1C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x1C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x1C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x1C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x1C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x1C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x1C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x1C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x1C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x1C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x20 "PADCTL_UART_SCR_SCR_UART5_RX_0,PADCTL UART Security Control (SCR) UART5 RX Register"
bitfld.long 0x20 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x20 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x20 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x20 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x20 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x20 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x20 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x20 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x20 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x20 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x20 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x20 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x24 "PADCTL_UART_SCR_SCR_UART5_TX_0,PADCTL UART Security Control (SCR) UART5 TX Register"
bitfld.long 0x24 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x24 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x24 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x24 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x24 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x24 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x24 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x24 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x24 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x24 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x24 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x24 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x24 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x28 "PADCTL_UART_SCR_SCR_UART5_RTS_0,PADCTL UART Security Control (SCR) UART5 RTS Register"
bitfld.long 0x28 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x28 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x28 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x28 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x28 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x28 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x28 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x28 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x28 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x28 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x28 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x28 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x28 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x2C "PADCTL_UART_SCR_SCR_UART5_CTS_0,PADCTL UART Security Control (SCR) UART5 CTS Register"
bitfld.long 0x2C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x2C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x2C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x2C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x2C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x2C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x2C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x2C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x2C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x2C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x2C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x2C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x2C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x30 "PADCTL_UART_SCR_SCR_GPIO_MDM1_0,PADCTL UART Security Control (SCR) GPIO MDM1 Register"
bitfld.long 0x30 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x30 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x30 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x30 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x30 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x30 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x30 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x30 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x30 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x30 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x30 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x30 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x30 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x34 "PADCTL_UART_SCR_SCR_GPIO_MDM2_0,PADCTL UART Security Control (SCR) GPIO MDM2 Register"
bitfld.long 0x34 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x34 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x34 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x34 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x34 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x34 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x34 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x34 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x34 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x34 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x34 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x34 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x34 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x38 "PADCTL_UART_SCR_SCR_GPIO_MDM3_0,PADCTL UART Security Control (SCR) GPIO MDM3 Register"
bitfld.long 0x38 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x38 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x38 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x38 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x38 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x38 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x38 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x38 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x38 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x38 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x38 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x38 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x38 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x3C "PADCTL_UART_SCR_SCR_GPIO_MDM4_0,PADCTL UART Security Control (SCR) GPIO MDM4 Register"
bitfld.long 0x3C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x3C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x3C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x3C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x3C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x3C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x3C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x3C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x3C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x3C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x3C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x3C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x3C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x40 "PADCTL_UART_SCR_SCR_GPIO_MDM5_0,PADCTL UART Security Control (SCR) GPIO MDM5 Register"
bitfld.long 0x40 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x40 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x40 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x40 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x40 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x40 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x40 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x40 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x40 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x40 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x40 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x40 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x40 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x44 "PADCTL_UART_SCR_SCR_GPIO_MDM6_0,PADCTL UART Security Control (SCR) GPIO MDM6 Register"
bitfld.long 0x44 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x44 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x44 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x44 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x44 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x44 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x44 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x44 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x44 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x44 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x44 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x44 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x44 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x48 "PADCTL_UART_SCR_SCR_GPIO_MDM7_0,PADCTL UART Security Control (SCR) GPIO MDM7 Register"
bitfld.long 0x48 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x48 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x48 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x48 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x48 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x48 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x48 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x48 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x48 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x48 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x48 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x48 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x48 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x4C "PADCTL_UART_SCR_SCR_BCPU_PWR_REQ_0,PADCTL UART Security Control (SCR) BCPU PWR REQ Register"
bitfld.long 0x4C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x4C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x4C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x4C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x4C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x4C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x4C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x4C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x4C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x4C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x4C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x4C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x4C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x4C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x50 "PADCTL_UART_SCR_SCR_MCPU_PWR_REQ_0,PADCTL UART Security Control (SCR) MCPU PWR REQ Register"
bitfld.long 0x50 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x50 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x50 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x50 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x50 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x50 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x50 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x50 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x50 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x50 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x50 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x50 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x50 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x50 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x54 "PADCTL_UART_SCR_SCR_GPU_PWR_REQ_0,PADCTL UART Security Control (SCR) GPU PWR REQ Register"
bitfld.long 0x54 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x54 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x54 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x54 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x54 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x54 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x54 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x54 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x54 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x54 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x54 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x54 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x54 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x54 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x58 "PADCTL_UART_SCR_SCR_GEN7_I2C_SCL_0,PADCTL UART Security Control (SCR) GEN7 I2C SCL Register"
bitfld.long 0x58 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x58 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x58 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x58 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x58 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x58 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x58 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x58 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x58 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x58 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x58 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x58 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x58 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x58 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x5C "PADCTL_UART_SCR_SCR_GEN7_I2C_SDA_0,PADCTL UART Security Control (SCR) GEN7 I2C SDA Register"
bitfld.long 0x5C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x5C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x5C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x5C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x5C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x5C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x5C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x5C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x5C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x5C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x5C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x5C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x5C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x5C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x60 "PADCTL_UART_SCR_SCR_GEN9_I2C_SDA_0,PADCTL UART Security Control (SCR) GEN9 I2C SDA Register"
bitfld.long 0x60 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x60 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x60 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x60 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x60 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x60 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x60 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x60 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x60 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x60 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x60 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x60 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x60 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x60 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x64 "PADCTL_UART_SCR_SCR_GEN9_I2C_SCL_0,PADCTL UART Security Control (SCR) GEN9 I2C SCL Register"
bitfld.long 0x64 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x64 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x64 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x64 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x64 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x64 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x64 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x64 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x64 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x64 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x64 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x64 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x64 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x64 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x68 "PADCTL_UART_SCR_SCR_USB_VBUS_EN0_0,PADCTL UART Security Control (SCR) USB VBUS EN0 Register"
bitfld.long 0x68 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x68 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x68 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x68 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x68 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x68 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x68 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x68 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x68 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x68 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x68 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x68 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x68 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x68 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x6C "PADCTL_UART_SCR_SCR_USB_VBUS_EN1_0,PADCTL UART Security Control (SCR) USB VBUS EN1 Register"
bitfld.long 0x6C 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x6C 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x6C 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x6C 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x6C 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x6C 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x6C 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x6C 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x6C 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x6C 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x6C 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x6C 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x6C 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x6C 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x70 "PADCTL_UART_SCR_SCR_GP_PWM7_0,PADCTL UART Security Control (SCR) GP PWM7 Register"
bitfld.long 0x70 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x70 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x70 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x70 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x70 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x70 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x70 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x70 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x70 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x70 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x70 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x70 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x70 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x70 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x74 "PADCTL_UART_SCR_SCR_GP_PWM6_0,PADCTL UART Security Control (SCR) GP PWM6 Register"
bitfld.long 0x74 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x74 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x74 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x74 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x74 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x74 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x74 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x74 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x74 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x74 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x74 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x74 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x74 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x74 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x74 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x74 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x74 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x74 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
base ad:0x02440000
group.long 0x1000++0x0F
line.long 0x00 "PADCTL_UFS_UFS0_RST_0,PADCTL UFS UFS0 RST Register"
bitfld.long 0x00 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x00 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x00 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x00 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x00 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x00 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x00 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x00 0.--1. "    PM          ,PM select" "UFS0,?..."
line.long 0x04 "PADCTL_UFS_CFG2TMC_UFS0_RST_0,PADCTL UFS CFG2TMC UFS0 RST Register"
hexmask.long.byte 0x04 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x04 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
line.long 0x08 "PADCTL_UFS_UFS0_REF_CLK_0,PADCTL UFS UFS0 REF CLK Register"
bitfld.long 0x08 20.--23. " RFU_IN             ,RFU_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17. "           IO_RESET           ,IO_RESET select" "NORMAL,IORESET"
bitfld.long 0x08 15. "      E_PREEMP    ,E_PREEMP enable" "Disabled,Enabled"
bitfld.long 0x08 13.--14. "     DRV_TYPE    ,DRV_TYPE select" "DRIVE_1X,DRIVE_2X,DRIVE_3X,DRIVE_4X"
textline "                                                   "
bitfld.long 0x08 12. " E_SCHMT            ,E_SCHMT enable" "Disabled,Enabled"
bitfld.long 0x08 10. "     GPIO_SF_SEL        ,GPIO_SF_SEL select" "GPIO,HSIO"
bitfld.long 0x08 9. "         E_PBIAS_BUF ,E_PBIAS_BUF enable" "Disabled,Enabled"
bitfld.long 0x08 6. "     E_INPUT     ,E_INPUT enable" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x08 4. " TRISTATE           ,TRISTATE select" "PASSTHROUGH,TRISTATE"
bitfld.long 0x08 2.--3. "  PUPD               ,PUPD select" "NONE,PULL_DOWN,PULL_UP,?..."
bitfld.long 0x08 0.--1. "    PM          ,PM select" "UFS0,?..."
line.long 0x0C "PADCTL_UFS_CFG2TMC_UFS0_REF_CLK_0,PADCTL UFS CFG2TMC UFS0 REF CLK register"
hexmask.long.byte 0x0C 24.--31. 1. " CFG_CAL_DRVUP      ,CFG_CAL_DRVUP"
hexmask.long.word 0x0C 12.--20. 1. "           CFG_CAL_DRVDN      ,CFG_CAL_DRVDN"
group.long 0x1800++0x07
line.long 0x00 "PADCTL_UFS_SCR_SCR_UFS0_RST_0,PADCTL UFS Security Control (SCR) USF RST Register"
bitfld.long 0x00 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x00 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x00 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
line.long 0x04 "PADCTL_UFS_SCR_SCR_UFS0_REF_CLK_0,PADCTL UFS Security Control (SCR) UFS0 REF CLK Register"
bitfld.long 0x04 29. " SEC_LCK            ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x04 28. "     SEC_WEN            ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 27. "     SEC_REN     ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x04 24.--26. "     SEC_OWNER   ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                                                   "
bitfld.long 0x04 23. " PR7                ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x04 22. "     PR6                ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x04 21. "     PR5         ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x04 20. "     PR4         ,Privileged mode bit 4" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 19. " PR3                ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x04 18. "     PR2                ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x04 17. "     PR1         ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x04 16. "     PR0         ,Privileged mode bit 0" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 15. " G7W                ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 14. "     G6W                ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 13. "     G5W         ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 12. "     G4W         ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 11. " G3W                ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 10. "     G2W                ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 9. "     G1W         ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x04 8. "     G0W         ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 7. " G7R                ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 6. "     G6R                ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 5. "     G5R         ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 4. "     G4R         ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                                                   "
bitfld.long 0x04 3. " G3R                ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 2. "     G2R                ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 1. "     G1R         ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x04 0. "     G0R         ,Security group 0 can read the matched address" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "Power Management Controller"
tree "AOTAG Registers"
base ad:0x0C380000
width 21.
group.long 0x00++0x23
line.long 0x00 "AOTAG_CFG_0,AOTAG Configuration Register"
bitfld.long 0x00 6. " AOTAG_THERMTRIP_EN ,Enable thermtrip from AOTAG" "Disabled,Enabled"
bitfld.long 0x00 5. "       TAG_EN                ,Enable function" "Disabled,Enabled"
bitfld.long 0x00 4. "     ENABLE_SW_DEBUG_MODE   ,Enable software debug mode" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 3. " USE_EXT_TRIGGER    ,Internal timer vs OR of other system events like paging" "Disabled,Enabled"
bitfld.long 0x00 2. "       SW_TRIGGER            ,Internal timer vs software trigger for debug" "Disabled,Enabled"
bitfld.long 0x00 0. "     DISABLE_CLK_GATING     ,Force enable all clock gating" "Disabled,Enabled"
line.long 0x04 "AOTAG_THRESH1_CFG_0,AOTAG Threshold 1 Configuration Register"
hexmask.long.word 0x04 16.--24. 1. " HOT_SET            ,Hot indicator set threshold"
hexmask.long.word 0x04 0.--8. 1. "           HOT_RESET             ,Hot indicator reset threshold"
line.long 0x08 "AOTAG_THRESH2_CFG_0,AOTAG Threshold 2 Configuration Register"
hexmask.long.word 0x08 16.--24. 1. " COLD_SET           ,Cold indicator set threshold"
hexmask.long.word 0x08 0.--8. 1. "           COLD_RESET            ,Cold indicator reset threshold"
line.long 0x0C "AOTAG_THRESH3_CFG_0,AOTAG Threshold 3 Configuration Register"
hexmask.long.word 0x0C 0.--8. 1. " THERMTRIP_SET      ,Thermtrip indicator set threshold"
line.long 0x10 "AOTAG_STATUS_0,AOTAG Status Register"
bitfld.long 0x10 2. " THERMTRIP          ,Thermtrip" "Not set,Set"
eventfld.long 0x10 1. "        TEMP_LOW              ,Temperature low" "Not set,Set"
eventfld.long 0x10 0. "      TEMP_HIGH              ,Temperature high" "Not set,Set"
line.long 0x14 "AOTAG_SECURITY_0,AOTAG Security Register"
bitfld.long 0x14 3. " WR_LOCK_ALL        ,Write lock all PMC_AOTAG registers" "Not locked,Locked"
bitfld.long 0x14 2. "     WR_LOCK_HOT_THRESHOLD ,Write lock PMC_AOTAG_THRESH1_CFG" "Not locked,Locked"
bitfld.long 0x14 1. "   WR_LOCK_COLD_THRESHOLD ,Write lock PMC_AOTAG_THRESH2_CFG" "Not locked,Locked"
textline "                              "
bitfld.long 0x14 0. " WR_LOCK_THERMTRIP  ,Write lock PMC_AOTAG_THRESH3_CFG" "Not locked,Locked"
line.long 0x18 "TSENSOR_CONFIG0_0,TSENSOR Configuration Register"
hexmask.long.tbyte 0x18 8.--27. 1. " TALL               ,Time in tsensor_clk for full capture cycle"
bitfld.long 0x18 5. "         STATUS_CLR            ,Clears MIN/MAX statistics" "Not cleared,Cleared"
bitfld.long 0x18 4. "  TCALC_OVERFLOW         ,Overflow happened during temperature conversion" "No overflow,Overflow"
textline "                              "
bitfld.long 0x18 3. " OVERFLOW           ,Capture counter overflows 14 bits used for temperature translation" "No overflow,Overflow"
bitfld.long 0x18 2. "    CPTR_OVERFLOW         ,Capture counter overflows during the capture" "No overflow,Overflow"
bitfld.long 0x18 1. "  RO_SEL                 ,Ring oscillator select" "TS OSC OUT,VS OSC OUT"
textline "                              "
bitfld.long 0x18 0. " STOP               ,Sensor stop" "Not stopped,Stopped"
line.long 0x1C "TSENSOR_CONFIG1_0,TSENSOR Configuration 1 Register"
bitfld.long 0x1C 31. " TEMP_ENABLE        ,Enable temperature translation" "Disabled,Enabled"
bitfld.long 0x1C 24.--29. "       TEN_COUNT             ,Time between EN and capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x1C 15.--20. "           TIDDQ_EN               ,Time between IDDQ and EN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                              "
hexmask.long.word 0x1C 0.--9. 1. " TSAMPLE            ,N count"
line.long 0x20 "TSENSOR_CONFIG2_0,TSENSOR Configuration 2 Register"
hexmask.long.word 0x20 16.--31. 1. " THERM_A            ,Thermal A Value"
hexmask.long.word 0x20 0.--15. 1. "           THERM_B               ,Thermal B Value"
rgroup.long 0x24++0x0B
line.long 0x00 "TSENSOR_STATUS0_0,TSENSOR Status 0 Register"
bitfld.long 0x00 31. " CAPTURE_VALID      ,Valid capture available" "Not available,Available"
hexmask.long.word 0x00 0.--15. 1. "  CAPTURE               ,Last valid raw capture"
line.long 0x04 "TSENSOR_STATUS1_0,TSENSOR Status 0 Register"
bitfld.long 0x04 31. " TEMP_VALID         ,Valid capture available" "Not available,Available"
hexmask.long.word 0x04 0.--15. 1. "  TEMP                  ,Last valid translated temp"
line.long 0x08 "TSENSOR_STATUS2_0,TSENSOR Status 0 Register"
hexmask.long.word 0x08 16.--31. 1. " TEMP_MAX           ,Maximum temperature registered since last clear"
hexmask.long.word 0x08 0.--15. 1. "           TEMP_MIN              ,Minimum temperature registered since last clear"
group.long 0x30++0x07
line.long 0x00 "TSENSOR_PDIV_0,TSENSOR PDIV Register"
bitfld.long 0x00 0.--3. " PDIV               ,TSOSC post divider setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "AOTAG_INTR_EN_0,AOTAG Interrupt Register"
setclrfld.long 0x04 1. 0x04 1. 0x08 1. " HOT                ,Enable hot interrupt" "Disabled,Enabled"
setclrfld.long 0x04 0. 0x04 0. 0x08 0. "       COLD                  ,Enable cold interrupt" "Disabled,Enabled"
width 0x0B
tree.end
tree "Wake Engine Registers"
base ad:0x0C370000
width 32.
group.long 0x0++0x03
line.long 0x00 "AOWAKE_CNTRL_0 ,Aowake Control 0 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x4++0x03
line.long 0x00 "AOWAKE_CNTRL_1 ,Aowake Control 1 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "AOWAKE_CNTRL_2 ,Aowake Control 2 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xC++0x03
line.long 0x00 "AOWAKE_CNTRL_3 ,Aowake Control 3 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "AOWAKE_CNTRL_4 ,Aowake Control 4 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "AOWAKE_CNTRL_5 ,Aowake Control 5 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "AOWAKE_CNTRL_6 ,Aowake Control 6 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "AOWAKE_CNTRL_7 ,Aowake Control 7 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "AOWAKE_CNTRL_8 ,Aowake Control 8 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "AOWAKE_CNTRL_9 ,Aowake Control 9 "
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "AOWAKE_CNTRL_10,Aowake Control 10"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "AOWAKE_CNTRL_11,Aowake Control 11"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "AOWAKE_CNTRL_12,Aowake Control 12"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "AOWAKE_CNTRL_13,Aowake Control 13"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "AOWAKE_CNTRL_14,Aowake Control 14"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "AOWAKE_CNTRL_15,Aowake Control 15"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "AOWAKE_CNTRL_16,Aowake Control 16"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "AOWAKE_CNTRL_17,Aowake Control 17"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "AOWAKE_CNTRL_18,Aowake Control 18"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "AOWAKE_CNTRL_19,Aowake Control 19"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "AOWAKE_CNTRL_20,Aowake Control 20"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "AOWAKE_CNTRL_21,Aowake Control 21"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "AOWAKE_CNTRL_22,Aowake Control 22"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "AOWAKE_CNTRL_23,Aowake Control 23"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x60++0x03
line.long 0x00 "AOWAKE_CNTRL_24,Aowake Control 24"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x64++0x03
line.long 0x00 "AOWAKE_CNTRL_25,Aowake Control 25"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "AOWAKE_CNTRL_26,Aowake Control 26"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "AOWAKE_CNTRL_27,Aowake Control 27"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x70++0x03
line.long 0x00 "AOWAKE_CNTRL_28,Aowake Control 28"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x74++0x03
line.long 0x00 "AOWAKE_CNTRL_29,Aowake Control 29"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x78++0x03
line.long 0x00 "AOWAKE_CNTRL_30,Aowake Control 30"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x7C++0x03
line.long 0x00 "AOWAKE_CNTRL_31,Aowake Control 31"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "AOWAKE_CNTRL_32,Aowake Control 32"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x84++0x03
line.long 0x00 "AOWAKE_CNTRL_33,Aowake Control 33"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AOWAKE_CNTRL_34,Aowake Control 34"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AOWAKE_CNTRL_35,Aowake Control 35"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AOWAKE_CNTRL_36,Aowake Control 36"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AOWAKE_CNTRL_37,Aowake Control 37"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AOWAKE_CNTRL_38,Aowake Control 38"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AOWAKE_CNTRL_39,Aowake Control 39"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AOWAKE_CNTRL_40,Aowake Control 40"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AOWAKE_CNTRL_41,Aowake Control 41"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "AOWAKE_CNTRL_42,Aowake Control 42"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "AOWAKE_CNTRL_43,Aowake Control 43"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "AOWAKE_CNTRL_44,Aowake Control 44"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "AOWAKE_CNTRL_45,Aowake Control 45"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "AOWAKE_CNTRL_46,Aowake Control 46"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "AOWAKE_CNTRL_47,Aowake Control 47"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AOWAKE_CNTRL_48,Aowake Control 48"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "AOWAKE_CNTRL_49,Aowake Control 49"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "AOWAKE_CNTRL_50,Aowake Control 50"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xCC++0x03
line.long 0x00 "AOWAKE_CNTRL_51,Aowake Control 51"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xD0++0x03
line.long 0x00 "AOWAKE_CNTRL_52,Aowake Control 52"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xD4++0x03
line.long 0x00 "AOWAKE_CNTRL_53,Aowake Control 53"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xD8++0x03
line.long 0x00 "AOWAKE_CNTRL_54,Aowake Control 54"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xDC++0x03
line.long 0x00 "AOWAKE_CNTRL_55,Aowake Control 55"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xE0++0x03
line.long 0x00 "AOWAKE_CNTRL_56,Aowake Control 56"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xE4++0x03
line.long 0x00 "AOWAKE_CNTRL_57,Aowake Control 57"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xE8++0x03
line.long 0x00 "AOWAKE_CNTRL_58,Aowake Control 58"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xEC++0x03
line.long 0x00 "AOWAKE_CNTRL_59,Aowake Control 59"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "AOWAKE_CNTRL_60,Aowake Control 60"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xF4++0x03
line.long 0x00 "AOWAKE_CNTRL_61,Aowake Control 61"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xF8++0x03
line.long 0x00 "AOWAKE_CNTRL_62,Aowake Control 62"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0xFC++0x03
line.long 0x00 "AOWAKE_CNTRL_63,Aowake Control 63"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "AOWAKE_CNTRL_64,Aowake Control 64"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x104++0x03
line.long 0x00 "AOWAKE_CNTRL_65,Aowake Control 65"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x108++0x03
line.long 0x00 "AOWAKE_CNTRL_66,Aowake Control 66"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x10C++0x03
line.long 0x00 "AOWAKE_CNTRL_67,Aowake Control 67"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "AOWAKE_CNTRL_68,Aowake Control 68"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x114++0x03
line.long 0x00 "AOWAKE_CNTRL_69,Aowake Control 69"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x118++0x03
line.long 0x00 "AOWAKE_CNTRL_70,Aowake Control 70"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x11C++0x03
line.long 0x00 "AOWAKE_CNTRL_71,Aowake Control 71"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x120++0x03
line.long 0x00 "AOWAKE_CNTRL_72,Aowake Control 72"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x124++0x03
line.long 0x00 "AOWAKE_CNTRL_73,Aowake Control 73"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x128++0x03
line.long 0x00 "AOWAKE_CNTRL_74,Aowake Control 74"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x12C++0x03
line.long 0x00 "AOWAKE_CNTRL_75,Aowake Control 75"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x130++0x03
line.long 0x00 "AOWAKE_CNTRL_76,Aowake Control 76"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x134++0x03
line.long 0x00 "AOWAKE_CNTRL_77,Aowake Control 77"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x138++0x03
line.long 0x00 "AOWAKE_CNTRL_78,Aowake Control 78"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x13C++0x03
line.long 0x00 "AOWAKE_CNTRL_79,Aowake Control 79"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x140++0x03
line.long 0x00 "AOWAKE_CNTRL_80,Aowake Control 80"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "AOWAKE_CNTRL_81,Aowake Control 81"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x148++0x03
line.long 0x00 "AOWAKE_CNTRL_82,Aowake Control 82"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x14C++0x03
line.long 0x00 "AOWAKE_CNTRL_83,Aowake Control 83"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x150++0x03
line.long 0x00 "AOWAKE_CNTRL_84,Aowake Control 84"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x154++0x03
line.long 0x00 "AOWAKE_CNTRL_85,Aowake Control 85"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x158++0x03
line.long 0x00 "AOWAKE_CNTRL_86,Aowake Control 86"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x15C++0x03
line.long 0x00 "AOWAKE_CNTRL_87,Aowake Control 87"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x160++0x03
line.long 0x00 "AOWAKE_CNTRL_88,Aowake Control 88"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x164++0x03
line.long 0x00 "AOWAKE_CNTRL_89,Aowake Control 89"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x168++0x03
line.long 0x00 "AOWAKE_CNTRL_90,Aowake Control 90"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x16C++0x03
line.long 0x00 "AOWAKE_CNTRL_91,Aowake Control 91"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x170++0x03
line.long 0x00 "AOWAKE_CNTRL_92,Aowake Control 92"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x174++0x03
line.long 0x00 "AOWAKE_CNTRL_93,Aowake Control 93"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x178++0x03
line.long 0x00 "AOWAKE_CNTRL_94,Aowake Control 94"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
group.long 0x17C++0x03
line.long 0x00 "AOWAKE_CNTRL_95,Aowake Control 95"
hexmask.long.byte 0x00 8.--15. 1. " DEBOUNCE_VAL      ,Debounce delay value"
bitfld.long 0x00 6. "            COAL_EN       ,Wake coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      COAL_GRP_SEL  ,Wake coalescing group selection" "Group 0,Group 1"
textline "                                         "
bitfld.long 0x00 3. " LEVEL             ,Wake level" "Low,High"
bitfld.long 0x00 2. "          DEBOUNCE_EN   ,Debounce filter enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SR_CAPTURE_EN ,SR latch capture enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 0. " DELAY_FILTER_EN   ,Delay filter enable" "Disabled,Enabled"
wgroup.long 0x180++0x03
line.long 0x00 "AOWAKE_MASK_W_0 ,Aowake Mask W 0 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x184++0x03
line.long 0x00 "AOWAKE_MASK_W_1 ,Aowake Mask W 1 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x188++0x03
line.long 0x00 "AOWAKE_MASK_W_2 ,Aowake Mask W 2 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x18C++0x03
line.long 0x00 "AOWAKE_MASK_W_3 ,Aowake Mask W 3 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x190++0x03
line.long 0x00 "AOWAKE_MASK_W_4 ,Aowake Mask W 4 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x194++0x03
line.long 0x00 "AOWAKE_MASK_W_5 ,Aowake Mask W 5 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x198++0x03
line.long 0x00 "AOWAKE_MASK_W_6 ,Aowake Mask W 6 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x19C++0x03
line.long 0x00 "AOWAKE_MASK_W_7 ,Aowake Mask W 7 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1A0++0x03
line.long 0x00 "AOWAKE_MASK_W_8 ,Aowake Mask W 8 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1A4++0x03
line.long 0x00 "AOWAKE_MASK_W_9 ,Aowake Mask W 9 "
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1A8++0x03
line.long 0x00 "AOWAKE_MASK_W_10,Aowake Mask W 10"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1AC++0x03
line.long 0x00 "AOWAKE_MASK_W_11,Aowake Mask W 11"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1B0++0x03
line.long 0x00 "AOWAKE_MASK_W_12,Aowake Mask W 12"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1B4++0x03
line.long 0x00 "AOWAKE_MASK_W_13,Aowake Mask W 13"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1B8++0x03
line.long 0x00 "AOWAKE_MASK_W_14,Aowake Mask W 14"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1BC++0x03
line.long 0x00 "AOWAKE_MASK_W_15,Aowake Mask W 15"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1C0++0x03
line.long 0x00 "AOWAKE_MASK_W_16,Aowake Mask W 16"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1C4++0x03
line.long 0x00 "AOWAKE_MASK_W_17,Aowake Mask W 17"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1C8++0x03
line.long 0x00 "AOWAKE_MASK_W_18,Aowake Mask W 18"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1CC++0x03
line.long 0x00 "AOWAKE_MASK_W_19,Aowake Mask W 19"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1D0++0x03
line.long 0x00 "AOWAKE_MASK_W_20,Aowake Mask W 20"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1D4++0x03
line.long 0x00 "AOWAKE_MASK_W_21,Aowake Mask W 21"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1D8++0x03
line.long 0x00 "AOWAKE_MASK_W_22,Aowake Mask W 22"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1DC++0x03
line.long 0x00 "AOWAKE_MASK_W_23,Aowake Mask W 23"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1E0++0x03
line.long 0x00 "AOWAKE_MASK_W_24,Aowake Mask W 24"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1E4++0x03
line.long 0x00 "AOWAKE_MASK_W_25,Aowake Mask W 25"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1E8++0x03
line.long 0x00 "AOWAKE_MASK_W_26,Aowake Mask W 26"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1EC++0x03
line.long 0x00 "AOWAKE_MASK_W_27,Aowake Mask W 27"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1F0++0x03
line.long 0x00 "AOWAKE_MASK_W_28,Aowake Mask W 28"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1F4++0x03
line.long 0x00 "AOWAKE_MASK_W_29,Aowake Mask W 29"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1F8++0x03
line.long 0x00 "AOWAKE_MASK_W_30,Aowake Mask W 30"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x1FC++0x03
line.long 0x00 "AOWAKE_MASK_W_31,Aowake Mask W 31"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x200++0x03
line.long 0x00 "AOWAKE_MASK_W_32,Aowake Mask W 32"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x204++0x03
line.long 0x00 "AOWAKE_MASK_W_33,Aowake Mask W 33"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x208++0x03
line.long 0x00 "AOWAKE_MASK_W_34,Aowake Mask W 34"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x20C++0x03
line.long 0x00 "AOWAKE_MASK_W_35,Aowake Mask W 35"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x210++0x03
line.long 0x00 "AOWAKE_MASK_W_36,Aowake Mask W 36"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x214++0x03
line.long 0x00 "AOWAKE_MASK_W_37,Aowake Mask W 37"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x218++0x03
line.long 0x00 "AOWAKE_MASK_W_38,Aowake Mask W 38"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x21C++0x03
line.long 0x00 "AOWAKE_MASK_W_39,Aowake Mask W 39"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x220++0x03
line.long 0x00 "AOWAKE_MASK_W_40,Aowake Mask W 40"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x224++0x03
line.long 0x00 "AOWAKE_MASK_W_41,Aowake Mask W 41"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x228++0x03
line.long 0x00 "AOWAKE_MASK_W_42,Aowake Mask W 42"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x22C++0x03
line.long 0x00 "AOWAKE_MASK_W_43,Aowake Mask W 43"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x230++0x03
line.long 0x00 "AOWAKE_MASK_W_44,Aowake Mask W 44"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x234++0x03
line.long 0x00 "AOWAKE_MASK_W_45,Aowake Mask W 45"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x238++0x03
line.long 0x00 "AOWAKE_MASK_W_46,Aowake Mask W 46"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x23C++0x03
line.long 0x00 "AOWAKE_MASK_W_47,Aowake Mask W 47"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x240++0x03
line.long 0x00 "AOWAKE_MASK_W_48,Aowake Mask W 48"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x244++0x03
line.long 0x00 "AOWAKE_MASK_W_49,Aowake Mask W 49"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x248++0x03
line.long 0x00 "AOWAKE_MASK_W_50,Aowake Mask W 50"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x24C++0x03
line.long 0x00 "AOWAKE_MASK_W_51,Aowake Mask W 51"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x250++0x03
line.long 0x00 "AOWAKE_MASK_W_52,Aowake Mask W 52"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x254++0x03
line.long 0x00 "AOWAKE_MASK_W_53,Aowake Mask W 53"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x258++0x03
line.long 0x00 "AOWAKE_MASK_W_54,Aowake Mask W 54"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x25C++0x03
line.long 0x00 "AOWAKE_MASK_W_55,Aowake Mask W 55"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x260++0x03
line.long 0x00 "AOWAKE_MASK_W_56,Aowake Mask W 56"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x264++0x03
line.long 0x00 "AOWAKE_MASK_W_57,Aowake Mask W 57"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x268++0x03
line.long 0x00 "AOWAKE_MASK_W_58,Aowake Mask W 58"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x26C++0x03
line.long 0x00 "AOWAKE_MASK_W_59,Aowake Mask W 59"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x270++0x03
line.long 0x00 "AOWAKE_MASK_W_60,Aowake Mask W 60"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x274++0x03
line.long 0x00 "AOWAKE_MASK_W_61,Aowake Mask W 61"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x278++0x03
line.long 0x00 "AOWAKE_MASK_W_62,Aowake Mask W 62"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x27C++0x03
line.long 0x00 "AOWAKE_MASK_W_63,Aowake Mask W 63"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x280++0x03
line.long 0x00 "AOWAKE_MASK_W_64,Aowake Mask W 64"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x284++0x03
line.long 0x00 "AOWAKE_MASK_W_65,Aowake Mask W 65"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x288++0x03
line.long 0x00 "AOWAKE_MASK_W_66,Aowake Mask W 66"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x28C++0x03
line.long 0x00 "AOWAKE_MASK_W_67,Aowake Mask W 67"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x290++0x03
line.long 0x00 "AOWAKE_MASK_W_68,Aowake Mask W 68"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x294++0x03
line.long 0x00 "AOWAKE_MASK_W_69,Aowake Mask W 69"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x298++0x03
line.long 0x00 "AOWAKE_MASK_W_70,Aowake Mask W 70"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x29C++0x03
line.long 0x00 "AOWAKE_MASK_W_71,Aowake Mask W 71"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2A0++0x03
line.long 0x00 "AOWAKE_MASK_W_72,Aowake Mask W 72"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2A4++0x03
line.long 0x00 "AOWAKE_MASK_W_73,Aowake Mask W 73"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2A8++0x03
line.long 0x00 "AOWAKE_MASK_W_74,Aowake Mask W 74"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2AC++0x03
line.long 0x00 "AOWAKE_MASK_W_75,Aowake Mask W 75"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2B0++0x03
line.long 0x00 "AOWAKE_MASK_W_76,Aowake Mask W 76"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2B4++0x03
line.long 0x00 "AOWAKE_MASK_W_77,Aowake Mask W 77"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2B8++0x03
line.long 0x00 "AOWAKE_MASK_W_78,Aowake Mask W 78"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2BC++0x03
line.long 0x00 "AOWAKE_MASK_W_79,Aowake Mask W 79"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2C0++0x03
line.long 0x00 "AOWAKE_MASK_W_80,Aowake Mask W 80"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2C4++0x03
line.long 0x00 "AOWAKE_MASK_W_81,Aowake Mask W 81"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2C8++0x03
line.long 0x00 "AOWAKE_MASK_W_82,Aowake Mask W 82"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2CC++0x03
line.long 0x00 "AOWAKE_MASK_W_83,Aowake Mask W 83"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2D0++0x03
line.long 0x00 "AOWAKE_MASK_W_84,Aowake Mask W 84"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2D4++0x03
line.long 0x00 "AOWAKE_MASK_W_85,Aowake Mask W 85"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2D8++0x03
line.long 0x00 "AOWAKE_MASK_W_86,Aowake Mask W 86"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2DC++0x03
line.long 0x00 "AOWAKE_MASK_W_87,Aowake Mask W 87"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2E0++0x03
line.long 0x00 "AOWAKE_MASK_W_88,Aowake Mask W 88"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2E4++0x03
line.long 0x00 "AOWAKE_MASK_W_89,Aowake Mask W 89"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2E8++0x03
line.long 0x00 "AOWAKE_MASK_W_90,Aowake Mask W 90"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2EC++0x03
line.long 0x00 "AOWAKE_MASK_W_91,Aowake Mask W 91"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2F0++0x03
line.long 0x00 "AOWAKE_MASK_W_92,Aowake Mask W 92"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2F4++0x03
line.long 0x00 "AOWAKE_MASK_W_93,Aowake Mask W 93"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2F8++0x03
line.long 0x00 "AOWAKE_MASK_W_94,Aowake Mask W 94"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
wgroup.long 0x2FC++0x03
line.long 0x00 "AOWAKE_MASK_W_95,Aowake Mask W 95"
bitfld.long 0x00 0. " MASK              ,Mask control for wake event" "No mask,Mask"
rgroup.long 0x300++0x0B
line.long 0x00 "AOWAKE_MASK_R_31_0_0,Aowake Mask R 31 0 0"
bitfld.long 0x00 31. " STATUS[31]        ,Mask status read back for wake event 31" "Not masked,Masked"
bitfld.long 0x00 30. "    [30]          ,Mask status read back for wake event 30" "Not masked,Masked"
bitfld.long 0x00 29. "    [29]          ,Mask status read back for wake event 29" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Mask status read back for wake event 28" "Not masked,Masked"
bitfld.long 0x00 27. "    [27]          ,Mask status read back for wake event 27" "Not masked,Masked"
bitfld.long 0x00 26. "    [26]          ,Mask status read back for wake event 26" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Mask status read back for wake event 25" "Not masked,Masked"
bitfld.long 0x00 24. "    [24]          ,Mask status read back for wake event 24" "Not masked,Masked"
bitfld.long 0x00 23. "    [23]          ,Mask status read back for wake event 23" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Mask status read back for wake event 22" "Not masked,Masked"
bitfld.long 0x00 21. "    [21]          ,Mask status read back for wake event 21" "Not masked,Masked"
bitfld.long 0x00 20. "    [20]          ,Mask status read back for wake event 20" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Mask status read back for wake event 19" "Not masked,Masked"
bitfld.long 0x00 18. "    [18]          ,Mask status read back for wake event 18" "Not masked,Masked"
bitfld.long 0x00 17. "    [17]          ,Mask status read back for wake event 17" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Mask status read back for wake event 16" "Not masked,Masked"
bitfld.long 0x00 15. "    [15]          ,Mask status read back for wake event 15" "Not masked,Masked"
bitfld.long 0x00 14. "    [14]          ,Mask status read back for wake event 14" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Mask status read back for wake event 13" "Not masked,Masked"
bitfld.long 0x00 12. "    [12]          ,Mask status read back for wake event 12" "Not masked,Masked"
bitfld.long 0x00 11. "    [11]          ,Mask status read back for wake event 11" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Mask status read back for wake event 10" "Not masked,Masked"
bitfld.long 0x00 9. "    [9]           ,Mask status read back for wake event 9" "Not masked,Masked"
bitfld.long 0x00 8. "    [8]           ,Mask status read back for wake event 8" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Mask status read back for wake event 7" "Not masked,Masked"
bitfld.long 0x00 6. "    [6]           ,Mask status read back for wake event 6" "Not masked,Masked"
bitfld.long 0x00 5. "    [5]           ,Mask status read back for wake event 5" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Mask status read back for wake event 4" "Not masked,Masked"
bitfld.long 0x00 3. "    [3]           ,Mask status read back for wake event 3" "Not masked,Masked"
bitfld.long 0x00 2. "    [2]           ,Mask status read back for wake event 2" "Not masked,Masked"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Mask status read back for wake event 1" "Not masked,Masked"
bitfld.long 0x00 0. "    [0]           ,Mask status read back for wake event 0" "Not masked,Masked"
line.long 0x04 "AOWAKE_MASK_R_63_32_0,Aowake Mask R 63 32 0"
bitfld.long 0x04 31. " STATUS[63]        ,Mask status read back for wake event 63" "Not masked,Masked"
bitfld.long 0x04 30. "    [62]          ,Mask status read back for wake event 62" "Not masked,Masked"
bitfld.long 0x04 29. "    [61]          ,Mask status read back for wake event 61" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Mask status read back for wake event 60" "Not masked,Masked"
bitfld.long 0x04 27. "    [59]          ,Mask status read back for wake event 59" "Not masked,Masked"
bitfld.long 0x04 26. "    [58]          ,Mask status read back for wake event 58" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Mask status read back for wake event 57" "Not masked,Masked"
bitfld.long 0x04 24. "    [56]          ,Mask status read back for wake event 56" "Not masked,Masked"
bitfld.long 0x04 23. "    [55]          ,Mask status read back for wake event 55" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Mask status read back for wake event 54" "Not masked,Masked"
bitfld.long 0x04 21. "    [53]          ,Mask status read back for wake event 53" "Not masked,Masked"
bitfld.long 0x04 20. "    [52]          ,Mask status read back for wake event 52" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Mask status read back for wake event 51" "Not masked,Masked"
bitfld.long 0x04 18. "    [50]          ,Mask status read back for wake event 50" "Not masked,Masked"
bitfld.long 0x04 17. "    [49]          ,Mask status read back for wake event 49" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Mask status read back for wake event 48" "Not masked,Masked"
bitfld.long 0x04 15. "    [47]          ,Mask status read back for wake event 47" "Not masked,Masked"
bitfld.long 0x04 14. "    [46]          ,Mask status read back for wake event 46" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Mask status read back for wake event 45" "Not masked,Masked"
bitfld.long 0x04 12. "    [44]          ,Mask status read back for wake event 44" "Not masked,Masked"
bitfld.long 0x04 11. "    [43]          ,Mask status read back for wake event 43" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Mask status read back for wake event 42" "Not masked,Masked"
bitfld.long 0x04 9. "    [41]          ,Mask status read back for wake event 41" "Not masked,Masked"
bitfld.long 0x04 8. "    [40]          ,Mask status read back for wake event 40" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Mask status read back for wake event 39" "Not masked,Masked"
bitfld.long 0x04 6. "    [38]          ,Mask status read back for wake event 38" "Not masked,Masked"
bitfld.long 0x04 5. "    [37]          ,Mask status read back for wake event 37" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Mask status read back for wake event 36" "Not masked,Masked"
bitfld.long 0x04 3. "    [35]          ,Mask status read back for wake event 35" "Not masked,Masked"
bitfld.long 0x04 2. "    [34]          ,Mask status read back for wake event 34" "Not masked,Masked"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Mask status read back for wake event 33" "Not masked,Masked"
bitfld.long 0x04 0. "    [32]          ,Mask status read back for wake event 32" "Not masked,Masked"
line.long 0x08 "AOWAKE_MASK_R_95_64_0,Aowake Mask R 95 64 0"
bitfld.long 0x08 31. " STATUS[95]        ,Mask status read back for wake event 95" "Not masked,Masked"
bitfld.long 0x08 30. "    [94]          ,Mask status read back for wake event 94" "Not masked,Masked"
bitfld.long 0x08 29. "    [93]          ,Mask status read back for wake event 93" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Mask status read back for wake event 92" "Not masked,Masked"
bitfld.long 0x08 27. "    [91]          ,Mask status read back for wake event 91" "Not masked,Masked"
bitfld.long 0x08 26. "    [90]          ,Mask status read back for wake event 90" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Mask status read back for wake event 89" "Not masked,Masked"
bitfld.long 0x08 24. "    [88]          ,Mask status read back for wake event 88" "Not masked,Masked"
bitfld.long 0x08 23. "    [87]          ,Mask status read back for wake event 87" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Mask status read back for wake event 86" "Not masked,Masked"
bitfld.long 0x08 21. "    [85]          ,Mask status read back for wake event 85" "Not masked,Masked"
bitfld.long 0x08 20. "    [84]          ,Mask status read back for wake event 84" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Mask status read back for wake event 83" "Not masked,Masked"
bitfld.long 0x08 18. "    [82]          ,Mask status read back for wake event 82" "Not masked,Masked"
bitfld.long 0x08 17. "    [81]          ,Mask status read back for wake event 81" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Mask status read back for wake event 80" "Not masked,Masked"
bitfld.long 0x08 15. "    [79]          ,Mask status read back for wake event 79" "Not masked,Masked"
bitfld.long 0x08 14. "    [78]          ,Mask status read back for wake event 78" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Mask status read back for wake event 77" "Not masked,Masked"
bitfld.long 0x08 12. "    [76]          ,Mask status read back for wake event 76" "Not masked,Masked"
bitfld.long 0x08 11. "    [75]          ,Mask status read back for wake event 75" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Mask status read back for wake event 74" "Not masked,Masked"
bitfld.long 0x08 9. "    [73]          ,Mask status read back for wake event 73" "Not masked,Masked"
bitfld.long 0x08 8. "    [72]          ,Mask status read back for wake event 72" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Mask status read back for wake event 71" "Not masked,Masked"
bitfld.long 0x08 6. "    [70]          ,Mask status read back for wake event 70" "Not masked,Masked"
bitfld.long 0x08 5. "    [69]          ,Mask status read back for wake event 69" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Mask status read back for wake event 68" "Not masked,Masked"
bitfld.long 0x08 3. "    [67]          ,Mask status read back for wake event 67" "Not masked,Masked"
bitfld.long 0x08 2. "    [66]          ,Mask status read back for wake event 66" "Not masked,Masked"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Mask status read back for wake event 65" "Not masked,Masked"
bitfld.long 0x08 0. "    [64]          ,Mask status read back for wake event 64" "Not masked,Masked"
group.long 0x30C++0x03
line.long 0x00 "AOWAKE_STATUS_W_0 ,Aowake Status W 0 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x310++0x03
line.long 0x00 "AOWAKE_STATUS_W_1 ,Aowake Status W 1 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x314++0x03
line.long 0x00 "AOWAKE_STATUS_W_2 ,Aowake Status W 2 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x318++0x03
line.long 0x00 "AOWAKE_STATUS_W_3 ,Aowake Status W 3 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x31C++0x03
line.long 0x00 "AOWAKE_STATUS_W_4 ,Aowake Status W 4 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x320++0x03
line.long 0x00 "AOWAKE_STATUS_W_5 ,Aowake Status W 5 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x324++0x03
line.long 0x00 "AOWAKE_STATUS_W_6 ,Aowake Status W 6 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x328++0x03
line.long 0x00 "AOWAKE_STATUS_W_7 ,Aowake Status W 7 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x32C++0x03
line.long 0x00 "AOWAKE_STATUS_W_8 ,Aowake Status W 8 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x330++0x03
line.long 0x00 "AOWAKE_STATUS_W_9 ,Aowake Status W 9 "
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x334++0x03
line.long 0x00 "AOWAKE_STATUS_W_10,Aowake Status W 10"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x338++0x03
line.long 0x00 "AOWAKE_STATUS_W_11,Aowake Status W 11"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x33C++0x03
line.long 0x00 "AOWAKE_STATUS_W_12,Aowake Status W 12"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x340++0x03
line.long 0x00 "AOWAKE_STATUS_W_13,Aowake Status W 13"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x344++0x03
line.long 0x00 "AOWAKE_STATUS_W_14,Aowake Status W 14"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x348++0x03
line.long 0x00 "AOWAKE_STATUS_W_15,Aowake Status W 15"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x34C++0x03
line.long 0x00 "AOWAKE_STATUS_W_16,Aowake Status W 16"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x350++0x03
line.long 0x00 "AOWAKE_STATUS_W_17,Aowake Status W 17"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x354++0x03
line.long 0x00 "AOWAKE_STATUS_W_18,Aowake Status W 18"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x358++0x03
line.long 0x00 "AOWAKE_STATUS_W_19,Aowake Status W 19"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x35C++0x03
line.long 0x00 "AOWAKE_STATUS_W_20,Aowake Status W 20"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x360++0x03
line.long 0x00 "AOWAKE_STATUS_W_21,Aowake Status W 21"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x364++0x03
line.long 0x00 "AOWAKE_STATUS_W_22,Aowake Status W 22"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x368++0x03
line.long 0x00 "AOWAKE_STATUS_W_23,Aowake Status W 23"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x36C++0x03
line.long 0x00 "AOWAKE_STATUS_W_24,Aowake Status W 24"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x370++0x03
line.long 0x00 "AOWAKE_STATUS_W_25,Aowake Status W 25"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x374++0x03
line.long 0x00 "AOWAKE_STATUS_W_26,Aowake Status W 26"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x378++0x03
line.long 0x00 "AOWAKE_STATUS_W_27,Aowake Status W 27"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x37C++0x03
line.long 0x00 "AOWAKE_STATUS_W_28,Aowake Status W 28"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x380++0x03
line.long 0x00 "AOWAKE_STATUS_W_29,Aowake Status W 29"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x384++0x03
line.long 0x00 "AOWAKE_STATUS_W_30,Aowake Status W 30"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x388++0x03
line.long 0x00 "AOWAKE_STATUS_W_31,Aowake Status W 31"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x38C++0x03
line.long 0x00 "AOWAKE_STATUS_W_32,Aowake Status W 32"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x390++0x03
line.long 0x00 "AOWAKE_STATUS_W_33,Aowake Status W 33"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x394++0x03
line.long 0x00 "AOWAKE_STATUS_W_34,Aowake Status W 34"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x398++0x03
line.long 0x00 "AOWAKE_STATUS_W_35,Aowake Status W 35"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x39C++0x03
line.long 0x00 "AOWAKE_STATUS_W_36,Aowake Status W 36"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3A0++0x03
line.long 0x00 "AOWAKE_STATUS_W_37,Aowake Status W 37"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3A4++0x03
line.long 0x00 "AOWAKE_STATUS_W_38,Aowake Status W 38"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3A8++0x03
line.long 0x00 "AOWAKE_STATUS_W_39,Aowake Status W 39"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3AC++0x03
line.long 0x00 "AOWAKE_STATUS_W_40,Aowake Status W 40"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3B0++0x03
line.long 0x00 "AOWAKE_STATUS_W_41,Aowake Status W 41"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3B4++0x03
line.long 0x00 "AOWAKE_STATUS_W_42,Aowake Status W 42"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3B8++0x03
line.long 0x00 "AOWAKE_STATUS_W_43,Aowake Status W 43"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3BC++0x03
line.long 0x00 "AOWAKE_STATUS_W_44,Aowake Status W 44"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3C0++0x03
line.long 0x00 "AOWAKE_STATUS_W_45,Aowake Status W 45"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3C4++0x03
line.long 0x00 "AOWAKE_STATUS_W_46,Aowake Status W 46"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3C8++0x03
line.long 0x00 "AOWAKE_STATUS_W_47,Aowake Status W 47"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3CC++0x03
line.long 0x00 "AOWAKE_STATUS_W_48,Aowake Status W 48"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3D0++0x03
line.long 0x00 "AOWAKE_STATUS_W_49,Aowake Status W 49"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3D4++0x03
line.long 0x00 "AOWAKE_STATUS_W_50,Aowake Status W 50"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3D8++0x03
line.long 0x00 "AOWAKE_STATUS_W_51,Aowake Status W 51"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3DC++0x03
line.long 0x00 "AOWAKE_STATUS_W_52,Aowake Status W 52"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3E0++0x03
line.long 0x00 "AOWAKE_STATUS_W_53,Aowake Status W 53"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3E4++0x03
line.long 0x00 "AOWAKE_STATUS_W_54,Aowake Status W 54"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3E8++0x03
line.long 0x00 "AOWAKE_STATUS_W_55,Aowake Status W 55"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3EC++0x03
line.long 0x00 "AOWAKE_STATUS_W_56,Aowake Status W 56"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3F0++0x03
line.long 0x00 "AOWAKE_STATUS_W_57,Aowake Status W 57"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3F4++0x03
line.long 0x00 "AOWAKE_STATUS_W_58,Aowake Status W 58"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3F8++0x03
line.long 0x00 "AOWAKE_STATUS_W_59,Aowake Status W 59"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x3FC++0x03
line.long 0x00 "AOWAKE_STATUS_W_60,Aowake Status W 60"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x400++0x03
line.long 0x00 "AOWAKE_STATUS_W_61,Aowake Status W 61"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x404++0x03
line.long 0x00 "AOWAKE_STATUS_W_62,Aowake Status W 62"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x408++0x03
line.long 0x00 "AOWAKE_STATUS_W_63,Aowake Status W 63"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x40C++0x03
line.long 0x00 "AOWAKE_STATUS_W_64,Aowake Status W 64"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x410++0x03
line.long 0x00 "AOWAKE_STATUS_W_65,Aowake Status W 65"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x414++0x03
line.long 0x00 "AOWAKE_STATUS_W_66,Aowake Status W 66"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x418++0x03
line.long 0x00 "AOWAKE_STATUS_W_67,Aowake Status W 67"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x41C++0x03
line.long 0x00 "AOWAKE_STATUS_W_68,Aowake Status W 68"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x420++0x03
line.long 0x00 "AOWAKE_STATUS_W_69,Aowake Status W 69"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x424++0x03
line.long 0x00 "AOWAKE_STATUS_W_70,Aowake Status W 70"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x428++0x03
line.long 0x00 "AOWAKE_STATUS_W_71,Aowake Status W 71"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x42C++0x03
line.long 0x00 "AOWAKE_STATUS_W_72,Aowake Status W 72"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x430++0x03
line.long 0x00 "AOWAKE_STATUS_W_73,Aowake Status W 73"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x434++0x03
line.long 0x00 "AOWAKE_STATUS_W_74,Aowake Status W 74"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x438++0x03
line.long 0x00 "AOWAKE_STATUS_W_75,Aowake Status W 75"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x43C++0x03
line.long 0x00 "AOWAKE_STATUS_W_76,Aowake Status W 76"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x440++0x03
line.long 0x00 "AOWAKE_STATUS_W_77,Aowake Status W 77"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x444++0x03
line.long 0x00 "AOWAKE_STATUS_W_78,Aowake Status W 78"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x448++0x03
line.long 0x00 "AOWAKE_STATUS_W_79,Aowake Status W 79"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x44C++0x03
line.long 0x00 "AOWAKE_STATUS_W_80,Aowake Status W 80"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x450++0x03
line.long 0x00 "AOWAKE_STATUS_W_81,Aowake Status W 81"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x454++0x03
line.long 0x00 "AOWAKE_STATUS_W_82,Aowake Status W 82"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x458++0x03
line.long 0x00 "AOWAKE_STATUS_W_83,Aowake Status W 83"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x45C++0x03
line.long 0x00 "AOWAKE_STATUS_W_84,Aowake Status W 84"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x460++0x03
line.long 0x00 "AOWAKE_STATUS_W_85,Aowake Status W 85"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x464++0x03
line.long 0x00 "AOWAKE_STATUS_W_86,Aowake Status W 86"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x468++0x03
line.long 0x00 "AOWAKE_STATUS_W_87,Aowake Status W 87"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x46C++0x03
line.long 0x00 "AOWAKE_STATUS_W_88,Aowake Status W 88"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x470++0x03
line.long 0x00 "AOWAKE_STATUS_W_89,Aowake Status W 89"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x474++0x03
line.long 0x00 "AOWAKE_STATUS_W_90,Aowake Status W 90"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x478++0x03
line.long 0x00 "AOWAKE_STATUS_W_91,Aowake Status W 91"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x47C++0x03
line.long 0x00 "AOWAKE_STATUS_W_92,Aowake Status W 92"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x480++0x03
line.long 0x00 "AOWAKE_STATUS_W_93,Aowake Status W 93"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x484++0x03
line.long 0x00 "AOWAKE_STATUS_W_94,Aowake Status W 94"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
group.long 0x488++0x03
line.long 0x00 "AOWAKE_STATUS_W_95,Aowake Status W 95"
eventfld.long 0x00 0. " CLEAR             ,Wake status clear signal" "Not cleared,Cleared"
rgroup.long 0x48C++0x0B
line.long 0x00 "AOWAKE_STATUS_R_31_0_0,Aowake Status R 31 0 0"
bitfld.long 0x00 31. " STATUS[31]        ,Wake status read back for wake event 31" "No,Yes"
bitfld.long 0x00 30. "           [30]          ,Wake status read back for wake event 30" "No,Yes"
bitfld.long 0x00 29. "           [29]          ,Wake status read back for wake event 29" "No,Yes"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Wake status read back for wake event 28" "No,Yes"
bitfld.long 0x00 27. "           [27]          ,Wake status read back for wake event 27" "No,Yes"
bitfld.long 0x00 26. "           [26]          ,Wake status read back for wake event 26" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Wake status read back for wake event 25" "No,Yes"
bitfld.long 0x00 24. "           [24]          ,Wake status read back for wake event 24" "No,Yes"
bitfld.long 0x00 23. "           [23]          ,Wake status read back for wake event 23" "No,Yes"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Wake status read back for wake event 22" "No,Yes"
bitfld.long 0x00 21. "           [21]          ,Wake status read back for wake event 21" "No,Yes"
bitfld.long 0x00 20. "           [20]          ,Wake status read back for wake event 20" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Wake status read back for wake event 19" "No,Yes"
bitfld.long 0x00 18. "           [18]          ,Wake status read back for wake event 18" "No,Yes"
bitfld.long 0x00 17. "           [17]          ,Wake status read back for wake event 17" "No,Yes"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Wake status read back for wake event 16" "No,Yes"
bitfld.long 0x00 15. "           [15]          ,Wake status read back for wake event 15" "No,Yes"
bitfld.long 0x00 14. "           [14]          ,Wake status read back for wake event 14" "No,Yes"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Wake status read back for wake event 13" "No,Yes"
bitfld.long 0x00 12. "           [12]          ,Wake status read back for wake event 12" "No,Yes"
bitfld.long 0x00 11. "           [11]          ,Wake status read back for wake event 11" "No,Yes"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Wake status read back for wake event 10" "No,Yes"
bitfld.long 0x00 9. "           [9]           ,Wake status read back for wake event 9" "No,Yes"
bitfld.long 0x00 8. "           [8]           ,Wake status read back for wake event 8" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Wake status read back for wake event 7" "No,Yes"
bitfld.long 0x00 6. "           [6]           ,Wake status read back for wake event 6" "No,Yes"
bitfld.long 0x00 5. "           [5]           ,Wake status read back for wake event 5" "No,Yes"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Wake status read back for wake event 4" "No,Yes"
bitfld.long 0x00 3. "           [3]           ,Wake status read back for wake event 3" "No,Yes"
bitfld.long 0x00 2. "           [2]           ,Wake status read back for wake event 2" "No,Yes"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Wake status read back for wake event 1" "No,Yes"
bitfld.long 0x00 0. "           [0]           ,Wake status read back for wake event 0" "No,Yes"
line.long 0x04 "AOWAKE_STATUS_R_63_32_0,Aowake Status R 63 32 0"
bitfld.long 0x04 31. " STATUS[63]        ,Wake status read back for wake event 63" "No,Yes"
bitfld.long 0x04 30. "           [62]          ,Wake status read back for wake event 62" "No,Yes"
bitfld.long 0x04 29. "           [61]          ,Wake status read back for wake event 61" "No,Yes"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Wake status read back for wake event 60" "No,Yes"
bitfld.long 0x04 27. "           [59]          ,Wake status read back for wake event 59" "No,Yes"
bitfld.long 0x04 26. "           [58]          ,Wake status read back for wake event 58" "No,Yes"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Wake status read back for wake event 57" "No,Yes"
bitfld.long 0x04 24. "           [56]          ,Wake status read back for wake event 56" "No,Yes"
bitfld.long 0x04 23. "           [55]          ,Wake status read back for wake event 55" "No,Yes"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Wake status read back for wake event 54" "No,Yes"
bitfld.long 0x04 21. "           [53]          ,Wake status read back for wake event 53" "No,Yes"
bitfld.long 0x04 20. "           [52]          ,Wake status read back for wake event 52" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Wake status read back for wake event 51" "No,Yes"
bitfld.long 0x04 18. "           [50]          ,Wake status read back for wake event 50" "No,Yes"
bitfld.long 0x04 17. "           [49]          ,Wake status read back for wake event 49" "No,Yes"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Wake status read back for wake event 48" "No,Yes"
bitfld.long 0x04 15. "           [47]          ,Wake status read back for wake event 47" "No,Yes"
bitfld.long 0x04 14. "           [46]          ,Wake status read back for wake event 46" "No,Yes"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Wake status read back for wake event 45" "No,Yes"
bitfld.long 0x04 12. "           [44]          ,Wake status read back for wake event 44" "No,Yes"
bitfld.long 0x04 11. "           [43]          ,Wake status read back for wake event 43" "No,Yes"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Wake status read back for wake event 42" "No,Yes"
bitfld.long 0x04 9. "           [41]          ,Wake status read back for wake event 41" "No,Yes"
bitfld.long 0x04 8. "           [40]          ,Wake status read back for wake event 40" "No,Yes"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Wake status read back for wake event 39" "No,Yes"
bitfld.long 0x04 6. "           [38]          ,Wake status read back for wake event 38" "No,Yes"
bitfld.long 0x04 5. "           [37]          ,Wake status read back for wake event 37" "No,Yes"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Wake status read back for wake event 36" "No,Yes"
bitfld.long 0x04 3. "           [35]          ,Wake status read back for wake event 35" "No,Yes"
bitfld.long 0x04 2. "           [34]          ,Wake status read back for wake event 34" "No,Yes"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Wake status read back for wake event 33" "No,Yes"
bitfld.long 0x04 0. "           [32]          ,Wake status read back for wake event 32" "No,Yes"
line.long 0x08 "AOWAKE_STATUS_R_95_64_0,Aowake Status R 95 64 0"
bitfld.long 0x08 31. " STATUS[95]        ,Wake status read back for wake event 95" "No,Yes"
bitfld.long 0x08 30. "           [94]          ,Wake status read back for wake event 94" "No,Yes"
bitfld.long 0x08 29. "           [93]          ,Wake status read back for wake event 93" "No,Yes"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Wake status read back for wake event 92" "No,Yes"
bitfld.long 0x08 27. "           [91]          ,Wake status read back for wake event 91" "No,Yes"
bitfld.long 0x08 26. "           [90]          ,Wake status read back for wake event 90" "No,Yes"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Wake status read back for wake event 89" "No,Yes"
bitfld.long 0x08 24. "           [88]          ,Wake status read back for wake event 88" "No,Yes"
bitfld.long 0x08 23. "           [87]          ,Wake status read back for wake event 87" "No,Yes"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Wake status read back for wake event 86" "No,Yes"
bitfld.long 0x08 21. "           [85]          ,Wake status read back for wake event 85" "No,Yes"
bitfld.long 0x08 20. "           [84]          ,Wake status read back for wake event 84" "No,Yes"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Wake status read back for wake event 83" "No,Yes"
bitfld.long 0x08 18. "           [82]          ,Wake status read back for wake event 82" "No,Yes"
bitfld.long 0x08 17. "           [81]          ,Wake status read back for wake event 81" "No,Yes"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Wake status read back for wake event 80" "No,Yes"
bitfld.long 0x08 15. "           [79]          ,Wake status read back for wake event 79" "No,Yes"
bitfld.long 0x08 14. "           [78]          ,Wake status read back for wake event 78" "No,Yes"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Wake status read back for wake event 77" "No,Yes"
bitfld.long 0x08 12. "           [76]          ,Wake status read back for wake event 76" "No,Yes"
bitfld.long 0x08 11. "           [75]          ,Wake status read back for wake event 75" "No,Yes"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Wake status read back for wake event 74" "No,Yes"
bitfld.long 0x08 9. "           [73]          ,Wake status read back for wake event 73" "No,Yes"
bitfld.long 0x08 8. "           [72]          ,Wake status read back for wake event 72" "No,Yes"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Wake status read back for wake event 71" "No,Yes"
bitfld.long 0x08 6. "           [70]          ,Wake status read back for wake event 70" "No,Yes"
bitfld.long 0x08 5. "           [69]          ,Wake status read back for wake event 69" "No,Yes"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Wake status read back for wake event 68" "No,Yes"
bitfld.long 0x08 3. "           [67]          ,Wake status read back for wake event 67" "No,Yes"
bitfld.long 0x08 2. "           [66]          ,Wake status read back for wake event 66" "No,Yes"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Wake status read back for wake event 65" "No,Yes"
bitfld.long 0x08 0. "           [64]          ,Wake status read back for wake event 64" "No,Yes"
group.long 0x498++0x07
line.long 0x00 "AOWAKE_LATCH_SW_0,Aowake Latch SW 0"
bitfld.long 0x00 0. " LATCH_SWEN        ,Enables latching wakeup events" "Disabled,Enabled"
line.long 0x04 "AOWAKE_SW_STATUS_W_0,Aowake SW Status W 0"
eventfld.long 0x04 0. " CLEAR             ,Software wake status clear signal" "Not cleared,Cleared"
rgroup.long 0x4A0++0x0B
line.long 0x00 "AOWAKE_SW_STATUS_31_0_0,Aowake SW Status 31 0 0"
bitfld.long 0x00 31. " STATUS[31]        ,Software wake status without mask for wake event 31" "No,Yes"
bitfld.long 0x00 30. "           [30]          ,Software wake status without mask for wake event 30" "No,Yes"
bitfld.long 0x00 29. "           [29]          ,Software wake status without mask for wake event 29" "No,Yes"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Software wake status without mask for wake event 28" "No,Yes"
bitfld.long 0x00 27. "           [27]          ,Software wake status without mask for wake event 27" "No,Yes"
bitfld.long 0x00 26. "           [26]          ,Software wake status without mask for wake event 26" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Software wake status without mask for wake event 25" "No,Yes"
bitfld.long 0x00 24. "           [24]          ,Software wake status without mask for wake event 24" "No,Yes"
bitfld.long 0x00 23. "           [23]          ,Software wake status without mask for wake event 23" "No,Yes"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Software wake status without mask for wake event 22" "No,Yes"
bitfld.long 0x00 21. "           [21]          ,Software wake status without mask for wake event 21" "No,Yes"
bitfld.long 0x00 20. "           [20]          ,Software wake status without mask for wake event 20" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Software wake status without mask for wake event 19" "No,Yes"
bitfld.long 0x00 18. "           [18]          ,Software wake status without mask for wake event 18" "No,Yes"
bitfld.long 0x00 17. "           [17]          ,Software wake status without mask for wake event 17" "No,Yes"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Software wake status without mask for wake event 16" "No,Yes"
bitfld.long 0x00 15. "           [15]          ,Software wake status without mask for wake event 15" "No,Yes"
bitfld.long 0x00 14. "           [14]          ,Software wake status without mask for wake event 14" "No,Yes"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Software wake status without mask for wake event 13" "No,Yes"
bitfld.long 0x00 12. "           [12]          ,Software wake status without mask for wake event 12" "No,Yes"
bitfld.long 0x00 11. "           [11]          ,Software wake status without mask for wake event 11" "No,Yes"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Software wake status without mask for wake event 10" "No,Yes"
bitfld.long 0x00 9. "           [9]           ,Software wake status without mask for wake event 9" "No,Yes"
bitfld.long 0x00 8. "           [8]           ,Software wake status without mask for wake event 8" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Software wake status without mask for wake event 7" "No,Yes"
bitfld.long 0x00 6. "           [6]           ,Software wake status without mask for wake event 6" "No,Yes"
bitfld.long 0x00 5. "           [5]           ,Software wake status without mask for wake event 5" "No,Yes"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Software wake status without mask for wake event 4" "No,Yes"
bitfld.long 0x00 3. "           [3]           ,Software wake status without mask for wake event 3" "No,Yes"
bitfld.long 0x00 2. "           [2]           ,Software wake status without mask for wake event 2" "No,Yes"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Software wake status without mask for wake event 1" "No,Yes"
bitfld.long 0x00 0. "           [0]           ,Software wake status without mask for wake event 0" "No,Yes"
line.long 0x04 "AOWAKE_SW_STATUS_63_32_0,Aowake SW Status 63 32 0"
bitfld.long 0x04 31. " STATUS[63]        ,Software wake status without mask for wake event 63" "No,Yes"
bitfld.long 0x04 30. "           [62]          ,Software wake status without mask for wake event 62" "No,Yes"
bitfld.long 0x04 29. "           [61]          ,Software wake status without mask for wake event 61" "No,Yes"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Software wake status without mask for wake event 60" "No,Yes"
bitfld.long 0x04 27. "           [59]          ,Software wake status without mask for wake event 59" "No,Yes"
bitfld.long 0x04 26. "           [58]          ,Software wake status without mask for wake event 58" "No,Yes"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Software wake status without mask for wake event 57" "No,Yes"
bitfld.long 0x04 24. "           [56]          ,Software wake status without mask for wake event 56" "No,Yes"
bitfld.long 0x04 23. "           [55]          ,Software wake status without mask for wake event 55" "No,Yes"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Software wake status without mask for wake event 54" "No,Yes"
bitfld.long 0x04 21. "           [53]          ,Software wake status without mask for wake event 53" "No,Yes"
bitfld.long 0x04 20. "           [52]          ,Software wake status without mask for wake event 52" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Software wake status without mask for wake event 51" "No,Yes"
bitfld.long 0x04 18. "           [50]          ,Software wake status without mask for wake event 50" "No,Yes"
bitfld.long 0x04 17. "           [49]          ,Software wake status without mask for wake event 49" "No,Yes"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Software wake status without mask for wake event 48" "No,Yes"
bitfld.long 0x04 15. "           [47]          ,Software wake status without mask for wake event 47" "No,Yes"
bitfld.long 0x04 14. "           [46]          ,Software wake status without mask for wake event 46" "No,Yes"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Software wake status without mask for wake event 45" "No,Yes"
bitfld.long 0x04 12. "           [44]          ,Software wake status without mask for wake event 44" "No,Yes"
bitfld.long 0x04 11. "           [43]          ,Software wake status without mask for wake event 43" "No,Yes"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Software wake status without mask for wake event 42" "No,Yes"
bitfld.long 0x04 9. "           [41]          ,Software wake status without mask for wake event 41" "No,Yes"
bitfld.long 0x04 8. "           [40]          ,Software wake status without mask for wake event 40" "No,Yes"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Software wake status without mask for wake event 39" "No,Yes"
bitfld.long 0x04 6. "           [38]          ,Software wake status without mask for wake event 38" "No,Yes"
bitfld.long 0x04 5. "           [37]          ,Software wake status without mask for wake event 37" "No,Yes"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Software wake status without mask for wake event 36" "No,Yes"
bitfld.long 0x04 3. "           [35]          ,Software wake status without mask for wake event 35" "No,Yes"
bitfld.long 0x04 2. "           [34]          ,Software wake status without mask for wake event 34" "No,Yes"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Software wake status without mask for wake event 33" "No,Yes"
bitfld.long 0x04 0. "           [32]          ,Software wake status without mask for wake event 32" "No,Yes"
line.long 0x08 "AOWAKE_SW_STATUS_95_64_0,Aowake SW Status 95 64 0"
bitfld.long 0x08 31. " [95]              ,Software wake status without mask for wake event 95" "No,Yes"
bitfld.long 0x08 30. "           [94]          ,Software wake status without mask for wake event 94" "No,Yes"
bitfld.long 0x08 29. "           [93]          ,Software wake status without mask for wake event 93" "No,Yes"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Software wake status without mask for wake event 92" "No,Yes"
bitfld.long 0x08 27. "           [91]          ,Software wake status without mask for wake event 91" "No,Yes"
bitfld.long 0x08 26. "           [90]          ,Software wake status without mask for wake event 90" "No,Yes"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Software wake status without mask for wake event 89" "No,Yes"
bitfld.long 0x08 24. "           [88]          ,Software wake status without mask for wake event 88" "No,Yes"
bitfld.long 0x08 23. "           [87]          ,Software wake status without mask for wake event 87" "No,Yes"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Software wake status without mask for wake event 86" "No,Yes"
bitfld.long 0x08 21. "           [85]          ,Software wake status without mask for wake event 85" "No,Yes"
bitfld.long 0x08 20. "           [84]          ,Software wake status without mask for wake event 84" "No,Yes"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Software wake status without mask for wake event 83" "No,Yes"
bitfld.long 0x08 18. "           [82]          ,Software wake status without mask for wake event 82" "No,Yes"
bitfld.long 0x08 17. "           [81]          ,Software wake status without mask for wake event 81" "No,Yes"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Software wake status without mask for wake event 80" "No,Yes"
bitfld.long 0x08 15. "           [79]          ,Software wake status without mask for wake event 79" "No,Yes"
bitfld.long 0x08 14. "           [78]          ,Software wake status without mask for wake event 78" "No,Yes"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Software wake status without mask for wake event 77" "No,Yes"
bitfld.long 0x08 12. "           [76]          ,Software wake status without mask for wake event 76" "No,Yes"
bitfld.long 0x08 11. "           [75]          ,Software wake status without mask for wake event 75" "No,Yes"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Software wake status without mask for wake event 74" "No,Yes"
bitfld.long 0x08 9. "           [73]          ,Software wake status without mask for wake event 73" "No,Yes"
bitfld.long 0x08 8. "           [72]          ,Software wake status without mask for wake event 72" "No,Yes"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Software wake status without mask for wake event 71" "No,Yes"
bitfld.long 0x08 6. "           [70]          ,Software wake status without mask for wake event 70" "No,Yes"
bitfld.long 0x08 5. "           [69]          ,Software wake status without mask for wake event 69" "No,Yes"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Software wake status without mask for wake event 68" "No,Yes"
bitfld.long 0x08 3. "           [67]          ,Software wake status without mask for wake event 67" "No,Yes"
bitfld.long 0x08 2. "           [66]          ,Software wake status without mask for wake event 66" "No,Yes"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Software wake status without mask for wake event 65" "No,Yes"
bitfld.long 0x08 0. "           [64]          ,Software wake status without mask for wake event 64" "No,Yes"
group.long 0x4AC++0x07
line.long 0x00 "AOWAKE_TIER1_CTRL_0,Aowake Tier 1 Control 0"
bitfld.long 0x00 0. " INT_EN            ,TIER1 wake interrupt enable" "Disabled,Enabled"
line.long 0x04 "AOWAKE_TIER2_CTRL_0,Aowake Tier 2 Control 0"
bitfld.long 0x04 0. " INT_EN            ,TIER2 wake interrupt enable" "Disabled,Enabled"
group.long 0x4B4++0x0B
line.long 0x00 "AOWAKE_TIER0_ROUTING_31_0_0,Aowake Tier 0 Routing 31 0 0"
bitfld.long 0x00 31. " SEL[31]           ,Wake event 31 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 30. "  [30]          ,Wake event 30 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 29. "  [29]          ,Wake event 29 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Wake event 28 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 27. "  [27]          ,Wake event 27 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 26. "  [26]          ,Wake event 26 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Wake event 25 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 24. "  [24]          ,Wake event 24 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 23. "  [23]          ,Wake event 23 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Wake event 22 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 21. "  [21]          ,Wake event 21 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 20. "  [20]          ,Wake event 20 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Wake event 19 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 18. "  [18]          ,Wake event 18 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 17. "  [17]          ,Wake event 17 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Wake event 16 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 15. "  [15]          ,Wake event 15 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 14. "  [14]          ,Wake event 14 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Wake event 13 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 12. "  [12]          ,Wake event 12 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 11. "  [11]          ,Wake event 11 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Wake event 10 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 9. "  [9]           ,Wake event 9 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 8. "  [8]           ,Wake event 8 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Wake event 7 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 6. "  [6]           ,Wake event 6 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 5. "  [5]           ,Wake event 5 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Wake event 4 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 3. "  [3]           ,Wake event 3 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 2. "  [2]           ,Wake event 2 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Wake event 1 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x00 0. "  [0]           ,Wake event 0 selection into tier 0 wake routing" "Not selected,Selected"
line.long 0x04 "AOWAKE_TIER0_ROUTING_63_32_0,Aowake Tier 0 Routing 64 32 0"
bitfld.long 0x04 31. " SEL[63]           ,Wake event 63 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 30. "  [62]          ,Wake event 62 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 29. "  [61]          ,Wake event 61 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Wake event 60 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 27. "  [59]          ,Wake event 59 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 26. "  [58]          ,Wake event 58 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Wake event 57 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 24. "  [56]          ,Wake event 56 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 23. "  [55]          ,Wake event 55 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Wake event 54 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 21. "  [53]          ,Wake event 53 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 20. "  [52]          ,Wake event 52 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Wake event 51 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 18. "  [50]          ,Wake event 50 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 17. "  [49]          ,Wake event 49 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Wake event 48 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 15. "  [47]          ,Wake event 47 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 14. "  [46]          ,Wake event 46 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Wake event 45 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 12. "  [44]          ,Wake event 44 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 11. "  [43]          ,Wake event 43 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Wake event 42 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 9. "  [41]          ,Wake event 41 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 8. "  [40]          ,Wake event 40 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Wake event 39 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 6. "  [38]          ,Wake event 38 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 5. "  [37]          ,Wake event 37 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Wake event 36 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 3. "  [35]          ,Wake event 35 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 2. "  [34]          ,Wake event 34 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Wake event 33 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x04 0. "  [32]          ,Wake event 32 selection into tier 0 wake routing" "Not selected,Selected"
line.long 0x08 "AOWAKE_TIER0_ROUTING_95_64_0,Aowake Tier 0 Routing 95 64 0"
bitfld.long 0x08 31. " SEL[95]           ,Wake event 95 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 30. "  [94]          ,Wake event 94 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 29. "  [93]          ,Wake event 93 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Wake event 92 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 27. "  [91]          ,Wake event 91 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 26. "  [90]          ,Wake event 90 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Wake event 89 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 24. "  [88]          ,Wake event 88 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 23. "  [87]          ,Wake event 87 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Wake event 86 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 21. "  [85]          ,Wake event 85 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 20. "  [84]          ,Wake event 84 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Wake event 83 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 18. "  [82]          ,Wake event 82 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 17. "  [81]          ,Wake event 81 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Wake event 80 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 15. "  [79]          ,Wake event 79 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 14. "  [78]          ,Wake event 78 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Wake event 77 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 12. "  [76]          ,Wake event 76 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 11. "  [75]          ,Wake event 75 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Wake event 74 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 9. "  [73]          ,Wake event 73 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 8. "  [72]          ,Wake event 72 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Wake event 71 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 6. "  [70]          ,Wake event 70 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 5. "  [69]          ,Wake event 69 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Wake event 68 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 3. "  [67]          ,Wake event 67 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 2. "  [66]          ,Wake event 66 selection into tier 0 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Wake event 65 selection into tier 0 wake routing" "Not selected,Selected"
bitfld.long 0x08 0. "  [64]          ,Wake event 64 selection into tier 0 wake routing" "Not selected,Selected"
group.long 0x4C0++0x0B
line.long 0x00 "AOWAKE_TIER1_ROUTING_31_0_0,Aowake Tier 1 Routing 31 0 0"
bitfld.long 0x00 31. " SEL[31]           ,Wake event 31 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 30. "  [30]          ,Wake event 30 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 29. "  [29]          ,Wake event 29 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Wake event 28 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 27. "  [27]          ,Wake event 27 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 26. "  [26]          ,Wake event 26 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Wake event 25 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 24. "  [24]          ,Wake event 24 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 23. "  [23]          ,Wake event 23 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Wake event 22 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 21. "  [21]          ,Wake event 21 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 20. "  [20]          ,Wake event 20 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Wake event 19 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 18. "  [18]          ,Wake event 18 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 17. "  [17]          ,Wake event 17 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Wake event 16 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 15. "  [15]          ,Wake event 15 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 14. "  [14]          ,Wake event 14 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Wake event 13 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 12. "  [12]          ,Wake event 12 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 11. "  [11]          ,Wake event 11 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Wake event 10 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 9. "  [9]           ,Wake event 9 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 8. "  [8]           ,Wake event 8 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Wake event 7 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 6. "  [6]           ,Wake event 6 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 5. "  [5]           ,Wake event 5 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Wake event 4 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 3. "  [3]           ,Wake event 3 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 2. "  [2]           ,Wake event 2 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Wake event 1 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x00 0. "  [0]           ,Wake event 0 selection into tier 1 wake routing" "Not selected,Selected"
line.long 0x04 "AOWAKE_TIER1_ROUTING_63_32_0,Aowake Tier 1 Routing 64 32 0"
bitfld.long 0x04 31. " SEL[63]           ,Wake event 63 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 30. "  [62]          ,Wake event 62 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 29. "  [61]          ,Wake event 61 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Wake event 60 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 27. "  [59]          ,Wake event 59 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 26. "  [58]          ,Wake event 58 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Wake event 57 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 24. "  [56]          ,Wake event 56 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 23. "  [55]          ,Wake event 55 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Wake event 54 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 21. "  [53]          ,Wake event 53 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 20. "  [52]          ,Wake event 52 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Wake event 51 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 18. "  [50]          ,Wake event 50 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 17. "  [49]          ,Wake event 49 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Wake event 48 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 15. "  [47]          ,Wake event 47 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 14. "  [46]          ,Wake event 46 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Wake event 45 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 12. "  [44]          ,Wake event 44 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 11. "  [43]          ,Wake event 43 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Wake event 42 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 9. "  [41]          ,Wake event 41 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 8. "  [40]          ,Wake event 40 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Wake event 39 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 6. "  [38]          ,Wake event 38 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 5. "  [37]          ,Wake event 37 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Wake event 36 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 3. "  [35]          ,Wake event 35 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 2. "  [34]          ,Wake event 34 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Wake event 33 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x04 0. "  [32]          ,Wake event 32 selection into tier 1 wake routing" "Not selected,Selected"
line.long 0x08 "AOWAKE_TIER1_ROUTING_95_64_0,Aowake Tier 1 Routing 95 64 0"
bitfld.long 0x08 31. " SEL[95]           ,Wake event 95 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 30. "  [94]          ,Wake event 94 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 29. "  [93]          ,Wake event 93 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Wake event 92 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 27. "  [91]          ,Wake event 91 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 26. "  [90]          ,Wake event 90 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Wake event 89 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 24. "  [88]          ,Wake event 88 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 23. "  [87]          ,Wake event 87 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Wake event 86 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 21. "  [85]          ,Wake event 85 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 20. "  [84]          ,Wake event 84 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Wake event 83 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 18. "  [82]          ,Wake event 82 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 17. "  [81]          ,Wake event 81 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Wake event 80 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 15. "  [79]          ,Wake event 79 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 14. "  [78]          ,Wake event 78 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Wake event 77 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 12. "  [76]          ,Wake event 76 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 11. "  [75]          ,Wake event 75 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Wake event 74 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 9. "  [73]          ,Wake event 73 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 8. "  [72]          ,Wake event 72 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Wake event 71 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 6. "  [70]          ,Wake event 70 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 5. "  [69]          ,Wake event 69 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Wake event 68 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 3. "  [67]          ,Wake event 67 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 2. "  [66]          ,Wake event 66 selection into tier 1 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Wake event 65 selection into tier 1 wake routing" "Not selected,Selected"
bitfld.long 0x08 0. "  [64]          ,Wake event 64 selection into tier 1 wake routing" "Not selected,Selected"
group.long 0x4CC++0x0B
line.long 0x00 "AOWAKE_TIER2_ROUTING_31_0_0,Aowake Tier 2 Routing 31 0 0"
bitfld.long 0x00 31. " SEL[31]           ,Wake event 31 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 30. "  [30]          ,Wake event 30 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 29. "  [29]          ,Wake event 29 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 28. " [28]              ,Wake event 28 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 27. "  [27]          ,Wake event 27 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 26. "  [26]          ,Wake event 26 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 25. " [25]              ,Wake event 25 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 24. "  [24]          ,Wake event 24 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 23. "  [23]          ,Wake event 23 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 22. " [22]              ,Wake event 22 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 21. "  [21]          ,Wake event 21 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 20. "  [20]          ,Wake event 20 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 19. " [19]              ,Wake event 19 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 18. "  [18]          ,Wake event 18 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 17. "  [17]          ,Wake event 17 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 16. " [16]              ,Wake event 16 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 15. "  [15]          ,Wake event 15 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 14. "  [14]          ,Wake event 14 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 13. " [13]              ,Wake event 13 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 12. "  [12]          ,Wake event 12 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 11. "  [11]          ,Wake event 11 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 10. " [10]              ,Wake event 10 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 9. "  [9]           ,Wake event 9 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 8. "  [8]           ,Wake event 8 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 7. " [7]               ,Wake event 7 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 6. "  [6]           ,Wake event 6 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 5. "  [5]           ,Wake event 5 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 4. " [4]               ,Wake event 4 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 3. "  [3]           ,Wake event 3 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 2. "  [2]           ,Wake event 2 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x00 1. " [1]               ,Wake event 1 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x00 0. "  [0]           ,Wake event 0 selection into tier 2 wake routing" "Not selected,Selected"
line.long 0x04 "AOWAKE_TIER2_ROUTING_63_32_0,Aowake Tier 2 Routing 64 32 0"
bitfld.long 0x04 31. " SEL[63]           ,Wake event 63 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 30. "  [62]          ,Wake event 62 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 29. "  [61]          ,Wake event 61 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 28. " [60]              ,Wake event 60 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 27. "  [59]          ,Wake event 59 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 26. "  [58]          ,Wake event 58 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 25. " [57]              ,Wake event 57 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 24. "  [56]          ,Wake event 56 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 23. "  [55]          ,Wake event 55 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 22. " [54]              ,Wake event 54 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 21. "  [53]          ,Wake event 53 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 20. "  [52]          ,Wake event 52 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 19. " [51]              ,Wake event 51 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 18. "  [50]          ,Wake event 50 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 17. "  [49]          ,Wake event 49 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 16. " [48]              ,Wake event 48 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 15. "  [47]          ,Wake event 47 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 14. "  [46]          ,Wake event 46 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 13. " [45]              ,Wake event 45 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 12. "  [44]          ,Wake event 44 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 11. "  [43]          ,Wake event 43 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 10. " [42]              ,Wake event 42 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 9. "  [41]          ,Wake event 41 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 8. "  [40]          ,Wake event 40 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 7. " [39]              ,Wake event 39 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 6. "  [38]          ,Wake event 38 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 5. "  [37]          ,Wake event 37 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 4. " [36]              ,Wake event 36 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 3. "  [35]          ,Wake event 35 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 2. "  [34]          ,Wake event 34 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x04 1. " [33]              ,Wake event 33 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x04 0. "  [32]          ,Wake event 32 selection into tier 2 wake routing" "Not selected,Selected"
line.long 0x08 "AOWAKE_TIER2_ROUTING_95_64_0,Aowake Tier 2 Routing 95 64 0"
bitfld.long 0x08 31. " SEL[95]           ,Wake event 95 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 30. "  [94]          ,Wake event 94 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 29. "  [93]          ,Wake event 93 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 28. " [92]              ,Wake event 92 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 27. "  [91]          ,Wake event 91 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 26. "  [90]          ,Wake event 90 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 25. " [89]              ,Wake event 89 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 24. "  [88]          ,Wake event 88 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 23. "  [87]          ,Wake event 87 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 22. " [86]              ,Wake event 86 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 21. "  [85]          ,Wake event 85 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 20. "  [84]          ,Wake event 84 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 19. " [83]              ,Wake event 83 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 18. "  [82]          ,Wake event 82 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 17. "  [81]          ,Wake event 81 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 16. " [80]              ,Wake event 80 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 15. "  [79]          ,Wake event 79 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 14. "  [78]          ,Wake event 78 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 13. " [77]              ,Wake event 77 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 12. "  [76]          ,Wake event 76 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 11. "  [75]          ,Wake event 75 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 10. " [74]              ,Wake event 74 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 9. "  [73]          ,Wake event 73 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 8. "  [72]          ,Wake event 72 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 7. " [71]              ,Wake event 71 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 6. "  [70]          ,Wake event 70 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 5. "  [69]          ,Wake event 69 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 4. " [68]              ,Wake event 68 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 3. "  [67]          ,Wake event 67 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 2. "  [66]          ,Wake event 66 selection into tier 2 wake routing" "Not selected,Selected"
textline "                                         "
bitfld.long 0x08 1. " [65]              ,Wake event 65 selection into tier 2 wake routing" "Not selected,Selected"
bitfld.long 0x08 0. "  [64]          ,Wake event 64 selection into tier 2 wake routing" "Not selected,Selected"
group.long 0x4D8++0x0F
line.long 0x00 "AOWAKE_SW_WAKE_TIER0_TRIGGER_0,Aowake SW Wake Tier 0 Trigger 0"
bitfld.long 0x00 0. " ENABLE            ,Tier 0 wake trigger" "Disabled,Enabled"
line.long 0x04 "AOWAKE_COAL_GRP0_0,Aowake Coal Group 0 0"
line.long 0x08 "AOWAKE_COAL_GRP1_0,Aowake Coal Group 1 0"
line.long 0x0C "AOWAKE_TSC_CTRL_0,Aowake TSC Control 0"
hexmask.long.byte 0x0C 0.--6. 1. " WAKE_INDEX        ,WAKE_INDEX"
rgroup.long 0x4E8++0x03
line.long 0x00 "AOWAKE_TSC_SNAP_VALUE_0,Aowake TSC Snap Value 0"
group.long 0x4EC++0x0B
line.long 0x00 "AOWAKE_DELAY_CELL_CTRL_0,Aowake Delay Cell Control 0"
bitfld.long 0x00 0.--5. " SIG_DELAY_BUF_SEL ,SIG_DELAY_BUF_SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "AOWAKE_DET_EN_0,Aowake Detection Enable 0"
bitfld.long 0x04 0. " DET_ENABLE        ,DET_ENABLE" "Disabled,Enabled"
line.long 0x08 "AOWAKE_CTRL_0,Aowake Control 0"
bitfld.long 0x08 1. " GLOBAL_COAL_EN    ,Disable Coal across all wakes" "No,Yes"
bitfld.long 0x08 0. "           INTR_POLARITY ,Invert INTR polarity" "Not inverted,Inverted"
width 0x0B
tree.end
tree "Scratch Registers"
base ad:0x0C390000
width 25.
group.long 0x0++0x03
line.long 0x00 "SECURE_BL_SCRATCH_0,Secure Scratch 0 For Boot Loader"
group.long 0x4++0x03
line.long 0x00 "SECURE_BL_SCRATCH_1,Secure Scratch 1 For Boot Loader"
group.long 0x8++0x03
line.long 0x00 "SECURE_BL_SCRATCH_2,Secure Scratch 2 For Boot Loader"
group.long 0xC++0x03
line.long 0x00 "SECURE_BL_SCRATCH_3,Secure Scratch 3 For Boot Loader"
group.long 0x10++0x03
line.long 0x00 "SECURE_BL_SCRATCH_4,Secure Scratch 4 For Boot Loader"
group.long 0x14++0x03
line.long 0x00 "SECURE_BL_SCRATCH_5,Secure Scratch 5 For Boot Loader"
group.long 0x18++0x03
line.long 0x00 "SECURE_BL_SCRATCH_6,Secure Scratch 6 For Boot Loader"
group.long 0x1C++0x03
line.long 0x00 "SECURE_BL_SCRATCH_7,Secure Scratch 7 For Boot Loader"
group.long 0x20++0x03
line.long 0x00 "SECURE_BL_SCRATCH_8,Secure Scratch 8 For Boot Loader"
group.long 0x24++0x03
line.long 0x00 "SECURE_BL_SCRATCH_9,Secure Scratch 9 For Boot Loader"
group.long 0x28++0x03
line.long 0x00 "SECURE_BL_SCRATCH_10,Secure Scratch 10 For Boot Loader"
group.long 0x2C++0x03
line.long 0x00 "SECURE_BL_SCRATCH_11,Secure Scratch 11 For Boot Loader"
group.long 0x30++0x03
line.long 0x00 "SECURE_BL_SCRATCH_12,Secure Scratch 12 For Boot Loader"
group.long 0x34++0x03
line.long 0x00 "SECURE_BL_SCRATCH_13,Secure Scratch 13 For Boot Loader"
group.long 0x38++0x03
line.long 0x00 "SECURE_BL_SCRATCH_14,Secure Scratch 14 For Boot Loader"
group.long 0x3C++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_0,Secure Scratch 0 For Microcode"
group.long 0x40++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_1,Secure Scratch 1 For Microcode"
group.long 0x44++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_2,Secure Scratch 2 For Microcode"
group.long 0x48++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_3,Secure Scratch 3 For Microcode"
group.long 0x4C++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_4,Secure Scratch 4 For Microcode"
group.long 0x50++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_5,Secure Scratch 5 For Microcode"
group.long 0x54++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_6,Secure Scratch 6 For Microcode"
group.long 0x58++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_7,Secure Scratch 7 For Microcode"
group.long 0x5C++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_8,Secure Scratch 8 For Microcode"
group.long 0x60++0x03
line.long 0x00 "SECURE_MTS_SCRATCH_9,Secure Scratch 9 For Microcode"
group.long 0x64++0x03
line.long 0x00 "SECURE_EMC_SCRATCH_0,Secure Scratch For EMC"
button "DATA" "d (0x64)--(0x64F) /long"
group.long 0x650++0x07
line.long 0x00 "SECURE_RSV0_SCRATCH_0,Secure RSV 0 Scratch 0 Register"
line.long 0x04 "SECURE_RSV0_SCRATCH_1,Secure RSV 0 Scratch 1 Register"
group.long 0x658++0x07
line.long 0x00 "SECURE_RSV1_SCRATCH_0,Secure RSV 1 Scratch 0 Register"
line.long 0x04 "SECURE_RSV1_SCRATCH_1,Secure RSV 1 Scratch 1 Register"
group.long 0x660++0x07
line.long 0x00 "SECURE_RSV2_SCRATCH_0,Secure RSV 2 Scratch 0 Register"
line.long 0x04 "SECURE_RSV2_SCRATCH_1,Secure RSV 2 Scratch 1 Register"
group.long 0x668++0x07
line.long 0x00 "SECURE_RSV3_SCRATCH_0,Secure RSV 3 Scratch 0 Register"
line.long 0x04 "SECURE_RSV3_SCRATCH_1,Secure RSV 3 Scratch 1 Register"
group.long 0x670++0x07
line.long 0x00 "SECURE_RSV4_SCRATCH_0,Secure RSV 4 Scratch 0 Register"
line.long 0x04 "SECURE_RSV4_SCRATCH_1,Secure RSV 4 Scratch 1 Register"
group.long 0x678++0x07
line.long 0x00 "SECURE_RSV5_SCRATCH_0,Secure RSV 5 Scratch 0 Register"
line.long 0x04 "SECURE_RSV5_SCRATCH_1,Secure RSV 5 Scratch 1 Register"
group.long 0x680++0x07
line.long 0x00 "SECURE_RSV6_SCRATCH_0,Secure RSV 6 Scratch 0 Register"
line.long 0x04 "SECURE_RSV6_SCRATCH_1,Secure RSV 6 Scratch 1 Register"
group.long 0x688++0x07
line.long 0x00 "SECURE_RSV7_SCRATCH_0,Secure RSV 7 Scratch 0 Register"
line.long 0x04 "SECURE_RSV7_SCRATCH_1,Secure RSV 7 Scratch 1 Register"
group.long 0x690++0x07
line.long 0x00 "SECURE_RSV8_SCRATCH_0,Secure RSV 8 Scratch 0 Register"
line.long 0x04 "SECURE_RSV8_SCRATCH_1,Secure RSV 8 Scratch 1 Register"
group.long 0x698++0x07
line.long 0x00 "SECURE_RSV9_SCRATCH_0,Secure RSV 9 Scratch 0 Register"
line.long 0x04 "SECURE_RSV9_SCRATCH_1,Secure RSV 9 Scratch 1 Register"
group.long 0x6A0++0x07
line.long 0x00 "SECURE_RSV10_SCRATCH_0,Secure RSV 10 Scratch 0 Register"
line.long 0x04 "SECURE_RSV10_SCRATCH_1,Secure RSV 10 Scratch 1 Register"
group.long 0x6A8++0x07
line.long 0x00 "SECURE_RSV11_SCRATCH_0,Secure RSV 11 Scratch 0 Register"
line.long 0x04 "SECURE_RSV11_SCRATCH_1,Secure RSV 11 Scratch 1 Register"
group.long 0x6B0++0x07
line.long 0x00 "SECURE_RSV12_SCRATCH_0,Secure RSV 12 Scratch 0 Register"
line.long 0x04 "SECURE_RSV12_SCRATCH_1,Secure RSV 12 Scratch 1 Register"
group.long 0x6B8++0x07
line.long 0x00 "SECURE_RSV13_SCRATCH_0,Secure RSV 13 Scratch 0 Register"
line.long 0x04 "SECURE_RSV13_SCRATCH_1,Secure RSV 13 Scratch 1 Register"
group.long 0x6C0++0x07
line.long 0x00 "SECURE_RSV14_SCRATCH_0,Secure RSV 14 Scratch 0 Register"
line.long 0x04 "SECURE_RSV14_SCRATCH_1,Secure RSV 14 Scratch 1 Register"
group.long 0x6C8++0x07
line.long 0x00 "SECURE_RSV15_SCRATCH_0,Secure RSV 15 Scratch 0 Register"
line.long 0x04 "SECURE_RSV15_SCRATCH_1,Secure RSV 15 Scratch 1 Register"
group.long 0x6D0++0x07
line.long 0x00 "SECURE_RSV16_SCRATCH_0,Secure RSV 16 Scratch 0 Register"
line.long 0x04 "SECURE_RSV16_SCRATCH_1,Secure RSV 16 Scratch 1 Register"
group.long 0x6D8++0x07
line.long 0x00 "SECURE_RSV17_SCRATCH_0,Secure RSV 17 Scratch 0 Register"
line.long 0x04 "SECURE_RSV17_SCRATCH_1,Secure RSV 17 Scratch 1 Register"
group.long 0x6E0++0x07
line.long 0x00 "SECURE_RSV18_SCRATCH_0,Secure RSV 18 Scratch 0 Register"
line.long 0x04 "SECURE_RSV18_SCRATCH_1,Secure RSV 18 Scratch 1 Register"
group.long 0x6E8++0x07
line.long 0x00 "SECURE_RSV19_SCRATCH_0,Secure RSV 19 Scratch 0 Register"
line.long 0x04 "SECURE_RSV19_SCRATCH_1,Secure RSV 19 Scratch 1 Register"
group.long 0x6F0++0x07
line.long 0x00 "SECURE_RSV20_SCRATCH_0,Secure RSV 20 Scratch 0 Register"
line.long 0x04 "SECURE_RSV20_SCRATCH_1,Secure RSV 20 Scratch 1 Register"
group.long 0x6F8++0x07
line.long 0x00 "SECURE_RSV21_SCRATCH_0,Secure RSV 21 Scratch 0 Register"
line.long 0x04 "SECURE_RSV21_SCRATCH_1,Secure RSV 21 Scratch 1 Register"
group.long 0x700++0x07
line.long 0x00 "SECURE_RSV22_SCRATCH_0,Secure RSV 22 Scratch 0 Register"
line.long 0x04 "SECURE_RSV22_SCRATCH_1,Secure RSV 22 Scratch 1 Register"
group.long 0x708++0x07
line.long 0x00 "SECURE_RSV23_SCRATCH_0,Secure RSV 23 Scratch 0 Register"
line.long 0x04 "SECURE_RSV23_SCRATCH_1,Secure RSV 23 Scratch 1 Register"
group.long 0x710++0x07
line.long 0x00 "SECURE_RSV24_SCRATCH_0,Secure RSV 24 Scratch 0 Register"
line.long 0x04 "SECURE_RSV24_SCRATCH_1,Secure RSV 24 Scratch 1 Register"
group.long 0x718++0x07
line.long 0x00 "SECURE_RSV25_SCRATCH_0,Secure RSV 25 Scratch 0 Register"
line.long 0x04 "SECURE_RSV25_SCRATCH_1,Secure RSV 25 Scratch 1 Register"
group.long 0x720++0x07
line.long 0x00 "SECURE_RSV26_SCRATCH_0,Secure RSV 26 Scratch 0 Register"
line.long 0x04 "SECURE_RSV26_SCRATCH_1,Secure RSV 26 Scratch 1 Register"
group.long 0x728++0x07
line.long 0x00 "SECURE_RSV27_SCRATCH_0,Secure RSV 27 Scratch 0 Register"
line.long 0x04 "SECURE_RSV27_SCRATCH_1,Secure RSV 27 Scratch 1 Register"
group.long 0x730++0x07
line.long 0x00 "SECURE_RSV28_SCRATCH_0,Secure RSV 28 Scratch 0 Register"
line.long 0x04 "SECURE_RSV28_SCRATCH_1,Secure RSV 28 Scratch 1 Register"
group.long 0x738++0x07
line.long 0x00 "SECURE_RSV29_SCRATCH_0,Secure RSV 29 Scratch 0 Register"
line.long 0x04 "SECURE_RSV29_SCRATCH_1,Secure RSV 29 Scratch 1 Register"
group.long 0x740++0x07
line.long 0x00 "SECURE_RSV30_SCRATCH_0,Secure RSV 30 Scratch 0 Register"
line.long 0x04 "SECURE_RSV30_SCRATCH_1,Secure RSV 30 Scratch 1 Register"
group.long 0x748++0x07
line.long 0x00 "SECURE_RSV31_SCRATCH_0,Secure RSV 31 Scratch 0 Register"
line.long 0x04 "SECURE_RSV31_SCRATCH_1,Secure RSV 31 Scratch 1 Register"
group.long 0x750++0x07
line.long 0x00 "SECURE_RSV32_SCRATCH_0,Secure RSV 32 Scratch 0 Register"
line.long 0x04 "SECURE_RSV32_SCRATCH_1,Secure RSV 32 Scratch 1 Register"
group.long 0x758++0x07
line.long 0x00 "SECURE_RSV33_SCRATCH_0,Secure RSV 33 Scratch 0 Register"
line.long 0x04 "SECURE_RSV33_SCRATCH_1,Secure RSV 33 Scratch 1 Register"
group.long 0x760++0x07
line.long 0x00 "SECURE_RSV34_SCRATCH_0,Secure RSV 34 Scratch 0 Register"
line.long 0x04 "SECURE_RSV34_SCRATCH_1,Secure RSV 34 Scratch 1 Register"
group.long 0x768++0x07
line.long 0x00 "SECURE_RSV35_SCRATCH_0,Secure RSV 35 Scratch 0 Register"
line.long 0x04 "SECURE_RSV35_SCRATCH_1,Secure RSV 35 Scratch 1 Register"
group.long 0x770++0x07
line.long 0x00 "SECURE_RSV36_SCRATCH_0,Secure RSV 36 Scratch 0 Register"
line.long 0x04 "SECURE_RSV36_SCRATCH_1,Secure RSV 36 Scratch 1 Register"
group.long 0x778++0x07
line.long 0x00 "SECURE_RSV37_SCRATCH_0,Secure RSV 37 Scratch 0 Register"
line.long 0x04 "SECURE_RSV37_SCRATCH_1,Secure RSV 37 Scratch 1 Register"
group.long 0x780++0x07
line.long 0x00 "SECURE_RSV38_SCRATCH_0,Secure RSV 38 Scratch 0 Register"
line.long 0x04 "SECURE_RSV38_SCRATCH_1,Secure RSV 38 Scratch 1 Register"
group.long 0x788++0x07
line.long 0x00 "SECURE_RSV39_SCRATCH_0,Secure RSV 39 Scratch 0 Register"
line.long 0x04 "SECURE_RSV39_SCRATCH_1,Secure RSV 39 Scratch 1 Register"
group.long 0x790++0x07
line.long 0x00 "SECURE_RSV40_SCRATCH_0,Secure RSV 40 Scratch 0 Register"
line.long 0x04 "SECURE_RSV40_SCRATCH_1,Secure RSV 40 Scratch 1 Register"
group.long 0x798++0x07
line.long 0x00 "SECURE_RSV41_SCRATCH_0,Secure RSV 41 Scratch 0 Register"
line.long 0x04 "SECURE_RSV41_SCRATCH_1,Secure RSV 41 Scratch 1 Register"
group.long 0x7A0++0x07
line.long 0x00 "SECURE_RSV42_SCRATCH_0,Secure RSV 42 Scratch 0 Register"
line.long 0x04 "SECURE_RSV42_SCRATCH_1,Secure RSV 42 Scratch 1 Register"
group.long 0x7A8++0x07
line.long 0x00 "SECURE_RSV43_SCRATCH_0,Secure RSV 43 Scratch 0 Register"
line.long 0x04 "SECURE_RSV43_SCRATCH_1,Secure RSV 43 Scratch 1 Register"
group.long 0x7B0++0x07
line.long 0x00 "SECURE_RSV44_SCRATCH_0,Secure RSV 44 Scratch 0 Register"
line.long 0x04 "SECURE_RSV44_SCRATCH_1,Secure RSV 44 Scratch 1 Register"
group.long 0x7B8++0x07
line.long 0x00 "SECURE_RSV45_SCRATCH_0,Secure RSV 45 Scratch 0 Register"
line.long 0x04 "SECURE_RSV45_SCRATCH_1,Secure RSV 45 Scratch 1 Register"
group.long 0x7C0++0x07
line.long 0x00 "SECURE_RSV46_SCRATCH_0,Secure RSV 46 Scratch 0 Register"
line.long 0x04 "SECURE_RSV46_SCRATCH_1,Secure RSV 46 Scratch 1 Register"
group.long 0x7C8++0x07
line.long 0x00 "SECURE_RSV47_SCRATCH_0,Secure RSV 47 Scratch 0 Register"
line.long 0x04 "SECURE_RSV47_SCRATCH_1,Secure RSV 47 Scratch 1 Register"
group.long 0x7D0++0x07
line.long 0x00 "SECURE_RSV48_SCRATCH_0,Secure RSV 48 Scratch 0 Register"
line.long 0x04 "SECURE_RSV48_SCRATCH_1,Secure RSV 48 Scratch 1 Register"
group.long 0x7D8++0x07
line.long 0x00 "SECURE_RSV49_SCRATCH_0,Secure RSV 49 Scratch 0 Register"
line.long 0x04 "SECURE_RSV49_SCRATCH_1,Secure RSV 49 Scratch 1 Register"
group.long 0x7E0++0x07
line.long 0x00 "SECURE_RSV50_SCRATCH_0,Secure RSV 50 Scratch 0 Register"
line.long 0x04 "SECURE_RSV50_SCRATCH_1,Secure RSV 50 Scratch 1 Register"
group.long 0x7E8++0x07
line.long 0x00 "SECURE_RSV51_SCRATCH_0,Secure RSV 51 Scratch 0 Register"
line.long 0x04 "SECURE_RSV51_SCRATCH_1,Secure RSV 51 Scratch 1 Register"
group.long 0x7F0++0x07
line.long 0x00 "SECURE_RSV52_SCRATCH_0,Secure RSV 52 Scratch 0 Register"
line.long 0x04 "SECURE_RSV52_SCRATCH_1,Secure RSV 52 Scratch 1 Register"
group.long 0x7F8++0x07
line.long 0x00 "SECURE_RSV53_SCRATCH_0,Secure RSV 53 Scratch 0 Register"
line.long 0x04 "SECURE_RSV53_SCRATCH_1,Secure RSV 53 Scratch 1 Register"
group.long 0x800++0x07
line.long 0x00 "SECURE_RSV54_SCRATCH_0,Secure RSV 54 Scratch 0 Register"
line.long 0x04 "SECURE_RSV54_SCRATCH_1,Secure RSV 54 Scratch 1 Register"
group.long 0x808++0x07
line.long 0x00 "SECURE_RSV55_SCRATCH_0,Secure RSV 55 Scratch 0 Register"
line.long 0x04 "SECURE_RSV55_SCRATCH_1,Secure RSV 55 Scratch 1 Register"
group.long 0x810++0x07
line.long 0x00 "SECURE_RSV56_SCRATCH_0,Secure RSV 56 Scratch 0 Register"
line.long 0x04 "SECURE_RSV56_SCRATCH_1,Secure RSV 56 Scratch 1 Register"
group.long 0x818++0x07
line.long 0x00 "SECURE_RSV57_SCRATCH_0,Secure RSV 57 Scratch 0 Register"
line.long 0x04 "SECURE_RSV57_SCRATCH_1,Secure RSV 57 Scratch 1 Register"
group.long 0x820++0x07
line.long 0x00 "SECURE_RSV58_SCRATCH_0,Secure RSV 58 Scratch 0 Register"
line.long 0x04 "SECURE_RSV58_SCRATCH_1,Secure RSV 58 Scratch 1 Register"
group.long 0x828++0x07
line.long 0x00 "SECURE_RSV59_SCRATCH_0,Secure RSV 59 Scratch 0 Register"
line.long 0x04 "SECURE_RSV59_SCRATCH_1,Secure RSV 59 Scratch 1 Register"
group.long 0x830++0x07
line.long 0x00 "SECURE_RSV60_SCRATCH_0,Secure RSV 60 Scratch 0 Register"
line.long 0x04 "SECURE_RSV60_SCRATCH_1,Secure RSV 60 Scratch 1 Register"
group.long 0x838++0x07
line.long 0x00 "SECURE_RSV61_SCRATCH_0,Secure RSV 61 Scratch 0 Register"
line.long 0x04 "SECURE_RSV61_SCRATCH_1,Secure RSV 61 Scratch 1 Register"
group.long 0x840++0x07
line.long 0x00 "SECURE_RSV62_SCRATCH_0,Secure RSV 62 Scratch 0 Register"
line.long 0x04 "SECURE_RSV62_SCRATCH_1,Secure RSV 62 Scratch 1 Register"
group.long 0x848++0x07
line.long 0x00 "SECURE_RSV63_SCRATCH_0,Secure RSV 63 Scratch 0 Register"
line.long 0x04 "SECURE_RSV63_SCRATCH_1,Secure RSV 63 Scratch 1 Register"
group.long 0x850++0x07
line.long 0x00 "SECURE_RSV64_SCRATCH_0,Secure RSV 64 Scratch 0 Register"
line.long 0x04 "SECURE_RSV64_SCRATCH_1,Secure RSV 64 Scratch 1 Register"
group.long 0x858++0x07
line.long 0x00 "SECURE_RSV65_SCRATCH_0,Secure RSV 65 Scratch 0 Register"
line.long 0x04 "SECURE_RSV65_SCRATCH_1,Secure RSV 65 Scratch 1 Register"
group.long 0x860++0x07
line.long 0x00 "SECURE_RSV66_SCRATCH_0,Secure RSV 66 Scratch 0 Register"
line.long 0x04 "SECURE_RSV66_SCRATCH_1,Secure RSV 66 Scratch 1 Register"
group.long 0x868++0x07
line.long 0x00 "SECURE_RSV67_SCRATCH_0,Secure RSV 67 Scratch 0 Register"
line.long 0x04 "SECURE_RSV67_SCRATCH_1,Secure RSV 67 Scratch 1 Register"
group.long 0x870++0x07
line.long 0x00 "SECURE_RSV68_SCRATCH_0,Secure RSV 68 Scratch 0 Register"
line.long 0x04 "SECURE_RSV68_SCRATCH_1,Secure RSV 68 Scratch 1 Register"
group.long 0x878++0x07
line.long 0x00 "SECURE_RSV69_SCRATCH_0,Secure RSV 69 Scratch 0 Register"
line.long 0x04 "SECURE_RSV69_SCRATCH_1,Secure RSV 69 Scratch 1 Register"
group.long 0x880++0x07
line.long 0x00 "SECURE_RSV70_SCRATCH_0,Secure RSV 70 Scratch 0 Register"
line.long 0x04 "SECURE_RSV70_SCRATCH_1,Secure RSV 70 Scratch 1 Register"
group.long 0x888++0x07
line.long 0x00 "SECURE_RSV71_SCRATCH_0,Secure RSV 71 Scratch 0 Register"
line.long 0x04 "SECURE_RSV71_SCRATCH_1,Secure RSV 71 Scratch 1 Register"
group.long 0x890++0x07
line.long 0x00 "SECURE_RSV72_SCRATCH_0,Secure RSV 72 Scratch 0 Register"
line.long 0x04 "SECURE_RSV72_SCRATCH_1,Secure RSV 72 Scratch 1 Register"
group.long 0x898++0x07
line.long 0x00 "SECURE_RSV73_SCRATCH_0,Secure RSV 73 Scratch 0 Register"
line.long 0x04 "SECURE_RSV73_SCRATCH_1,Secure RSV 73 Scratch 1 Register"
group.long 0x8A0++0x07
line.long 0x00 "SECURE_RSV74_SCRATCH_0,Secure RSV 74 Scratch 0 Register"
line.long 0x04 "SECURE_RSV74_SCRATCH_1,Secure RSV 74 Scratch 1 Register"
group.long 0x8A8++0x07
line.long 0x00 "SECURE_RSV75_SCRATCH_0,Secure RSV 75 Scratch 0 Register"
line.long 0x04 "SECURE_RSV75_SCRATCH_1,Secure RSV 75 Scratch 1 Register"
group.long 0x8B0++0x07
line.long 0x00 "SECURE_RSV76_SCRATCH_0,Secure RSV 76 Scratch 0 Register"
line.long 0x04 "SECURE_RSV76_SCRATCH_1,Secure RSV 76 Scratch 1 Register"
group.long 0x8B8++0x07
line.long 0x00 "SECURE_RSV77_SCRATCH_0,Secure RSV 77 Scratch 0 Register"
line.long 0x04 "SECURE_RSV77_SCRATCH_1,Secure RSV 77 Scratch 1 Register"
group.long 0x8C0++0x07
line.long 0x00 "SECURE_RSV78_SCRATCH_0,Secure RSV 78 Scratch 0 Register"
line.long 0x04 "SECURE_RSV78_SCRATCH_1,Secure RSV 78 Scratch 1 Register"
group.long 0x8C8++0x07
line.long 0x00 "SECURE_RSV79_SCRATCH_0,Secure RSV 79 Scratch 0 Register"
line.long 0x04 "SECURE_RSV79_SCRATCH_1,Secure RSV 79 Scratch 1 Register"
group.long 0x8D0++0x07
line.long 0x00 "SECURE_RSV80_SCRATCH_0,Secure RSV 80 Scratch 0 Register"
line.long 0x04 "SECURE_RSV80_SCRATCH_1,Secure RSV 80 Scratch 1 Register"
group.long 0x8D8++0x07
line.long 0x00 "SECURE_RSV81_SCRATCH_0,Secure RSV 81 Scratch 0 Register"
line.long 0x04 "SECURE_RSV81_SCRATCH_1,Secure RSV 81 Scratch 1 Register"
group.long 0x8E0++0x07
line.long 0x00 "SECURE_RSV82_SCRATCH_0,Secure RSV 82 Scratch 0 Register"
line.long 0x04 "SECURE_RSV82_SCRATCH_1,Secure RSV 82 Scratch 1 Register"
group.long 0x8E8++0x07
line.long 0x00 "SECURE_RSV83_SCRATCH_0,Secure RSV 83 Scratch 0 Register"
line.long 0x04 "SECURE_RSV83_SCRATCH_1,Secure RSV 83 Scratch 1 Register"
group.long 0x8F0++0x07
line.long 0x00 "SECURE_RSV84_SCRATCH_0,Secure RSV 84 Scratch 0 Register"
line.long 0x04 "SECURE_RSV84_SCRATCH_1,Secure RSV 84 Scratch 1 Register"
group.long 0x8F8++0x07
line.long 0x00 "SECURE_RSV85_SCRATCH_0,Secure RSV 85 Scratch 0 Register"
line.long 0x04 "SECURE_RSV85_SCRATCH_1,Secure RSV 85 Scratch 1 Register"
group.long 0x900++0x07
line.long 0x00 "SECURE_RSV86_SCRATCH_0,Secure RSV 86 Scratch 0 Register"
line.long 0x04 "SECURE_RSV86_SCRATCH_1,Secure RSV 86 Scratch 1 Register"
group.long 0x908++0x07
line.long 0x00 "SECURE_RSV87_SCRATCH_0,Secure RSV 87 Scratch 0 Register"
line.long 0x04 "SECURE_RSV87_SCRATCH_1,Secure RSV 87 Scratch 1 Register"
group.long 0x910++0x07
line.long 0x00 "SECURE_RSV88_SCRATCH_0,Secure RSV 88 Scratch 0 Register"
line.long 0x04 "SECURE_RSV88_SCRATCH_1,Secure RSV 88 Scratch 1 Register"
group.long 0x918++0x07
line.long 0x00 "SECURE_RSV89_SCRATCH_0,Secure RSV 89 Scratch 0 Register"
line.long 0x04 "SECURE_RSV89_SCRATCH_1,Secure RSV 89 Scratch 1 Register"
group.long 0x920++0x07
line.long 0x00 "SECURE_RSV90_SCRATCH_0,Secure RSV 90 Scratch 0 Register"
line.long 0x04 "SECURE_RSV90_SCRATCH_1,Secure RSV 90 Scratch 1 Register"
group.long 0x928++0x07
line.long 0x00 "SECURE_RSV91_SCRATCH_0,Secure RSV 91 Scratch 0 Register"
line.long 0x04 "SECURE_RSV91_SCRATCH_1,Secure RSV 91 Scratch 1 Register"
group.long 0x930++0x07
line.long 0x00 "SECURE_RSV92_SCRATCH_0,Secure RSV 92 Scratch 0 Register"
line.long 0x04 "SECURE_RSV92_SCRATCH_1,Secure RSV 92 Scratch 1 Register"
group.long 0x938++0x07
line.long 0x00 "SECURE_RSV93_SCRATCH_0,Secure RSV 93 Scratch 0 Register"
line.long 0x04 "SECURE_RSV93_SCRATCH_1,Secure RSV 93 Scratch 1 Register"
group.long 0x940++0x07
line.long 0x00 "SECURE_RSV94_SCRATCH_0,Secure RSV 94 Scratch 0 Register"
line.long 0x04 "SECURE_RSV94_SCRATCH_1,Secure RSV 94 Scratch 1 Register"
group.long 0x948++0x07
line.long 0x00 "SECURE_RSV95_SCRATCH_0,Secure RSV 95 Scratch 0 Register"
line.long 0x04 "SECURE_RSV95_SCRATCH_1,Secure RSV 95 Scratch 1 Register"
group.long 0x950++0x03
line.long 0x00 "SCRATCH_0,Scratch 0"
button "DATA" "d (0x950)--(0xFFF) /long"
group.long 0x2000++0x17
line.long 0x00 "SCRATCH0_0,Scratch 0 0"
line.long 0x04 "SCRATCH1_0,Scratch 1 0"
line.long 0x08 "SECURE_SCRATCH4_0,Secure Scratch 4 0"
line.long 0x0C "SECURE_SCRATCH5_0,Secure Scratch 5 0"
line.long 0x10 "SECURE_SCRATCH6_0,Secure Scratch 6 0"
line.long 0x14 "SECURE_SCRATCH7_0,Secure Scratch 7 0"
group.long 0x2018++0x03
line.long 0x00 "BONDOUT_MIRROR0_0,Bondout Mirror 0 Register"
group.long 0x201C++0x03
line.long 0x00 "BONDOUT_MIRROR1_0,Bondout Mirror 1 Register"
group.long 0x2020++0x03
line.long 0x00 "BONDOUT_MIRROR2_0,Bondout Mirror 2 Register"
group.long 0x2024++0x03
line.long 0x00 "BONDOUT_MIRROR3_0,Bondout Mirror 3 Register"
group.long 0x2028++0x03
line.long 0x00 "BONDOUT_MIRROR4_0,Bondout Mirror 4 Register"
width 0x0B
tree.end
tree "PMC System Registers"
base ad:0x0C360000
width 18.
group.long 0x00++0x0B
line.long 0x00 "CNTRL_0,PMC control register"
bitfld.long 0x00 22. " SHUTDOWN_OE         ,Enable shutdown pad" "Disabled,Enabled"
bitfld.long 0x00 18. "     FUSE_OVERRIDE    ,Fuse override" "Disabled,Enabled"
bitfld.long 0x00 13. "  AOINIT          ,AO initialize purely SW diagnostic and interpretation" "Not done,Done"
bitfld.long 0x00 12. "      PWRGATE_DIS      ,Disable power gating - global override" "No,Yes"
textline "                           "
bitfld.long 0x00 11. " SYSCLK_OE           ,Enable output of system enable clock" "Disabled,Enabled"
bitfld.long 0x00 9. "     PWRREQ_OE        ,Power request output enable" "Disabled,Enabled"
bitfld.long 0x00 8. "  PWRREQ_POLARITY ,Inverts power request polarity" "Not inverted,Inverted"
bitfld.long 0x00 7. "  BLINK_EN         ,Blinking counter and blink output enable" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 4. " MAIN_RST            ,Reset everything but scratch 0 and reset status" "Disabled,Enabled"
bitfld.long 0x00 2. "     RTC_RST          ,Software reset to RTC" "No reset,Reset"
bitfld.long 0x00 1. "  RTC_CLK_DIS     ,Disable 32kHz clock to RTC" "No,Yes"
line.long 0x04 "SLCG_CTRL_0,SLCG_CTRL_0"
hexmask.long.byte 0x04 16.--23. 1. " PCLK_REG_SLCG_TIMER ,Keep PCLK_REG clock running for this period after psel is deasserted"
bitfld.long 0x04 10. "           PCLK_DPD_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK I/O DPD feature" "Disabled,Enabled"
bitfld.long 0x04 9. "  PCLK_PG_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK PG feature" "Disabled,Enabled"
bitfld.long 0x04 8. "      PCLK_REG_SLCG_EN ,Enable/Disable SLCG for PMC_PCLK register access feature" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 3. " OSC_SLCG_EN         ,Enable/Disable SLCG for OSC_CLK" "Disabled,Enabled"
bitfld.long 0x04 2. "     FUSE_SLCG_EN     ,Enable/Disable SLCG for FUSE_CLK" "Disabled,Enabled"
bitfld.long 0x04 1. "  CLK32_SLCG_EN   ,Enable/Disable SLCG for PMC_CLK (32K)" "Disabled,Enabled"
bitfld.long 0x04 0. "      PCLK_SLCG_EN     ,Enable/Disable SLCG for PMC_PCLK" "Disabled,Enabled"
line.long 0x08 "DPD_PADS_ORIDE_0,DPD_PADS_ORIDE_0"
bitfld.long 0x08 20. " BLINK               ,Override DPD idle state with blink output" "No override,Override"
group.long 0x10++0x03
line.long 0x00 "DPD_ENABLE_0,DPD_ENABLE_0"
bitfld.long 0x00 1. " TSC_MULT_EN         ,TSC multiplier enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     ON               ,will set sampling of pads value" "Disabled,Enabled"
if (((per.l(ad:0x0C360000+0x14))&0x1)==0x1)
group.long 0x14++0x03
line.long 0x00 "SC7_CONFIG_0,SC7_CONFIG_0"
hexmask.long.byte 0x00 16.--23. 1. " SC7_RES_TIMER       ,Number of 32K clocks to wait after requesting power off, before declaring residency in SC7"
hexmask.long.byte 0x00 8.--15. 1. "           SC7_DPD_TIMER    ,Number of 32K clocks between assertion of sel/e_dpd and deassertion of e/sel_dpd"
bitfld.long 0x00 1. "        SC8_HW_BYPASS   ,Whether SC8 exit will be bypassed by hardware or not" "Off,On"
textline "                           "
bitfld.long 0x00 0. " SC7_TARGET          ,Target state" "SC7,SC8"
else
group.long 0x14++0x03
line.long 0x00 "SC7_CONFIG_0,SC7_CONFIG_0"
hexmask.long.byte 0x00 16.--23. 1. " SC7_RES_TIMER       ,Number of 32K clocks to wait after requesting power off, before declaring residency in SC7"
hexmask.long.byte 0x00 8.--15. 1. "           SC7_DPD_TIMER    ,Number of 32K clocks between assertion of sel/e_dpd and deassertion of e/sel_dpd"
textline "                           "
bitfld.long 0x00 0. " SC7_TARGET          ,Target state" "SC7,SC8"
endif
rgroup.long 0x18++0x03
line.long 0x00 "SC7_STATUS_0,SC7_STATUS_0"
bitfld.long 0x00 4. " PWRGOOD_ABS         ,Absolute pwrgood signal" "False,True"
bitfld.long 0x00 3. "        SC7_WAIT_DPD_DIS ,Set when SC7 FSM is done exiting" "No,Yes"
bitfld.long 0x00 2. "       SC7_FSM_BUSY    ,Indicates whether SC7 FSM is in idle or not" "Not busy,Busy"
bitfld.long 0x00 0.--1. "      SC_STATE         ,Indicates whether PMC is in SC7 or SC8 or neither" "None,SC7,SC8,?..."
textline "                                       "
width 30.
group.long 0x1C++0x47
line.long 0x00 "SC8_FSM_INIT_0,SC8_FSM_INIT_0"
bitfld.long 0x00 0. " FSM_INIT                    ,Software uses this to initialize the FSM when SC8 exit is complete" "Done,Pending"
line.long 0x04 "SC8_CONTROL_0,SC8_CONTROL_0"
bitfld.long 0x04 4. " REMOVE_SD                   ,Software uses this to initialize the FSM when SC8 exit is complete" "Done,Pending"
bitfld.long 0x04 3. "               REMOVE_SELDPD                     ,Remove global sel_dpd that was asserted during SC8 entry" "Done,Pending"
textline "                                       "
bitfld.long 0x04 2. " REMOVE_EDPD                 ,Remove global e_dpd that was asserted during SC8 entry" "Done,Pending"
bitfld.long 0x04 1. "               REMOVE_CLAMP                      ,Remove clamp that was asserted during SC8 entry" "Done,Pending"
textline "                                       "
bitfld.long 0x04 0. " REMOVE_RESET                ,Remove reset that was asserted during SC8 entry" "Done,Pending"
line.long 0x08 "RETENTION_CONTROL_0,RETENTION_CONTROL_0"
bitfld.long 0x08 8. " GPIO_AO_RET_EN              ,Enable for VDD_RTC rail retention through GPIO_AO_RET 0 -> GPIO_AO_RET" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "              RAIL_RET_EXIT_DELAY               ,Delay in 32 KHz clocks"
line.long 0x0C "SC7_DEBUG_CTRL_0,SC7_DEBUG_CTRL_0"
bitfld.long 0x0C 7. " DBG_SD_SKIP                 ,PG SD sequence skip for SC7 entry" "Disabled,Enabled"
bitfld.long 0x0C 6. "              DFD_CLAMP_OVERRIDE                ,Used for overriding the clamp of all the inputs for DFD partition" "No override,Override"
textline "                                       "
bitfld.long 0x0C 5. " DBGRST_OVR                  ,Used for overriding the reset going out to debug module in SC7" "No override,Override"
bitfld.long 0x0C 4. "           RESET_DEBUG                       ,Assertion of reset will be disabled if this bit is set" "Off,On"
textline "                                       "
bitfld.long 0x0C 3. " DPD_ENABLE_DEBUG            ,Assertion of dpd_enable will be disabled if this bit is set" "Off,On"
bitfld.long 0x0C 2. "                   MAIN_CLAMP_DEBUG                  ,Assertion of main clamp will be disabled if this bit is set" "Off,On"
line.long 0x10 "PWRGOOD_TIMER_0,PWRGOOD_TIMER_0"
hexmask.long.byte 0x10 16.--23. 1. " OSC_PREPWR                  ,OSC clock stabilization timer prior to SoC rail pwr-req assertion"
hexmask.long.byte 0x10 8.--15. 1. "                    OSC_POSTPWR                       ,OSC clock stabilization timer after SoC rail power is stabilized"
textline "                                       "
hexmask.long.byte 0x10 0.--7. 1. " PWRGOOD                     ,SoC rail power-on stabilization timer"
line.long 0x14 "BLINK_TIMER_0,BLINK_TIMER_0"
hexmask.long.word 0x14 16.--31. 1. " DATA_OFF                    ,Time off"
bitfld.long 0x14 15. "                  FORCE_BLINK                       ,Force blink" "32 kHZ,?..."
textline "                                       "
hexmask.long.word 0x14 0.--14. 1. " DATA_ON                     ,Time ON"
line.long 0x18 "NO_IOPOWER_0,NO_IOPOWER_0"
bitfld.long 0x18 31. " SDMMC3_HV                   ,Rail I/Os for SDMMC3_HV" "Disabled,Enabled"
bitfld.long 0x18 30. "              SDMMC2_HV                         ,Rail I/Os for SDMMC2_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 28. " DMIC_HV                     ,Rail I/Os for DMIC_HV" "Disabled,Enabled"
bitfld.long 0x18 27. "              AO_HV                             ,AO HV rail I/Os" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 26. " AO                          ,AO rail I/Os" "Disabled,Enabled"
bitfld.long 0x18 22. "              SPI                               ,Rail I/Os for SPI" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 19. " DBG                         ,Rail I/Os for DEBUG" "Disabled,Enabled"
bitfld.long 0x18 18. "              AUDIO_HV                          ,Rail I/Os for AUDIO_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 17. " MEM1_COMP                   ,MEM1_COMP" "Disabled,Enabled"
bitfld.long 0x18 16. "              MEM_COMP                          ,MEM_COMP" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 15. " SDMMC1_HV                   ,Rail I/Os for SDMMC1_HV" "Disabled,Enabled"
bitfld.long 0x18 14. "              SDMMC4                            ,Rail I/Os for SDMMC4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 11. " PEX_CNTRL                   ,Rail I/Os for PEX_CTL" "Disabled,Enabled"
bitfld.long 0x18 10. "              CAM                               ,Rail I/Os for CAM" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 9. " MIPI                        ,Rail I/Os for MIPI (CSI_DSI)" "Disabled,Enabled"
bitfld.long 0x18 8. "              MEM1                              ,Rail I/Os for VDDIO_DDR1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 7. " MEM                         ,Rail I/Os for VDDIO_DDR0" "Disabled,Enabled"
bitfld.long 0x18 6. "              UFS                               ,Rail I/Os for UFS" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 5. " AUDIO                       ,Rail I/Os for AUDIO" "Disabled,Enabled"
bitfld.long 0x18 4. "              EDP                               ,Rail I/Os for EDP" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 3. " CONN                        ,Rail I/Os for CONN" "Disabled,Enabled"
bitfld.long 0x18 2. "              UART                              ,Rail I/Os for CONN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x18 0. " SYS                         ,Rail AO I/Os SYS" "Disabled,Enabled"
line.long 0x1C "DDR_PWR_0,DDR_PWR_0"
bitfld.long 0x1C 3. " SPI                         ,SPI pins set" "E_12V,E_18V"
bitfld.long 0x1C 2. "                 EMMC2                             ,SDMMC2 pins set" "E_12V,E_18V"
textline "                                       "
bitfld.long 0x1C 1. " EMMC                        ,GMI pins set" "E_12V,E_18V"
bitfld.long 0x1C 0. "                 VAL                               ,DVI pins set" "E_12V,E_18V"
line.long 0x20 "E_18V_PWR_0,E_18V_PWR_0"
bitfld.long 0x20 5. " SPI                         ,SPI" "Disabled,Enabled"
bitfld.long 0x20 4. "              DBG                               ,DBG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x20 1. " UFS                         ,UFS" "Disabled,Enabled"
line.long 0x24 "E_33V_PWR_0,E_33V_PWR_0"
bitfld.long 0x24 6. " SDMMC3_HV                   ,SDMMC3_HV" "Disabled,Enabled"
bitfld.long 0x24 5. "              SDMMC2_HV                         ,SDMMC2_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 4. " SDMMC1_HV                   ,SDMMC1_HV" "Disabled,Enabled"
bitfld.long 0x24 2. "              DMIC_HV                           ,DMIC_HV" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 1. " AUDIO_HV                    ,AUDIO_HV" "Disabled,Enabled"
bitfld.long 0x24 0. "              AO_HV                             ,AO_HV" "Disabled,Enabled"
line.long 0x28 "DISP_SECURE_CTL_0,DISP_SECURE_CTL_0"
bitfld.long 0x28 6. " DSI_VPR_SECURE_MODE         ,DSI VPR policy registers protection" "TSEC protection,TrustZone protection"
bitfld.long 0x28 5. "  SOR_VPR_SECURE_MODE               ,SOR VPR policy registers protection" "TSEC protection,TrustZone protection"
textline "                                       "
bitfld.long 0x28 4. " SOR1_ASSR_FORCE_INTERNAL    ,SOR1 ASSR will be forced to internal" "Not forced,Forced"
bitfld.long 0x28 3. "            SOR0_ASSR_FORCE_INTERNAL          ,SOR0 ASSR will be forced to internal" "Not forced,Forced"
textline "                                       "
bitfld.long 0x28 2. " SOR_HDCP1_1_SECURE_MODE     ,HDCP1.1 registers access will be either protected by TSEC or TrustZone" "TSEC protection,TrustZone protection"
bitfld.long 0x28 1. "  SOR_HDCP1_1_SECURE                ,Protection on HDCP 1.1 registers" "No,Yes"
textline "                                       "
bitfld.long 0x28 0. " SOR_HDCP2_2_SECURE_MODE     ,TSEC or both TSEC and TrustZone is allowed to access HDCP 2.2 registers" "TSEC protection,Both"
line.long 0x2C "CRYPTO_OP_0,CRYPTO_OP_0"
bitfld.long 0x2C 0. " VAL                         ,Value" "No,Yes"
line.long 0x30 "PLLP_WB0_OVERRIDE_0,PLLP_WB0_OVERRIDE_0"
bitfld.long 0x30 20. " DUAL_PLLMSB_IDDQ            ,Drives IDDQ input to dual PLLMSB" "Disabled,Enabled"
bitfld.long 0x30 19. "              DUAL_PLLMSB_SELVCO                ,Drives SELVCO input to dual PLLMSB" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 18. " PLLMSB_ENABLE               ,PLLMSB enable" "Disabled,Enabled"
bitfld.long 0x30 17. "              PLLMSB_OVERRIDE_ENABLE            ,PLLMSB override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 16. " PLLP_IDDQ                   ,Enabling during SC7 exit PMC should program IDDQ bit" "Disabled,Enabled"
bitfld.long 0x30 15. "              PLLU_IDDQ                         ,Enabling during SC7 exit PMC should program IDDQ bit" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 14. " DUAL_PLLM_IDDQ              ,Drives IDDQ input to dual PLLM macro through the port pmc2car_pllm_syncmux_ctrl" "Disabled,Enabled"
bitfld.long 0x30 13. "              DUAL_PLLM_SELVCO                  ,Drives SELVCO input to dual PLLM macro through the port pmc2car_pllm_selvco" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 12. " PLLM_ENABLE                 ,PLLM enable" "Disabled,Enabled"
bitfld.long 0x30 11. "              PLLM_OVERRIDE_ENABLE              ,PLLM override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 10. " PLLU_ENABLE                 ,PLLU enable" "Disabled,Enabled"
bitfld.long 0x30 9. "              PLLU_OVERRIDE_ENABLE              ,PLLU override enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 8. " OSC_OVERRIDE_ENABLE         ,OSC override enable" "Disabled,Enabled"
bitfld.long 0x30 6.--7. "              PLL_REF_DIV                       ,PLL reference clock divide for all PLLs" "/1,/2,/4,?..."
textline "                                       "
bitfld.long 0x30 2.--5. " OSC_FREQ                    ,Osc frequency for shared PLL reference" "13 MHz,16.8 MHz,,,19.2 MHz,38.4 MHz,,,12 MHz,48 MHz,,,26 MHz,?..."
bitfld.long 0x30 1. "              PLLP_ENABLE                       ,PLLP enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 0. " PLLP_OVERRIDE_ENABLE        ,PLLP override enable" "Disabled,Enabled"
line.long 0x34 "PLLM_WB0_OVERRIDE_FREQ_0,PLLM_WB0_OVERRIDE_FREQ_0"
hexmask.long.byte 0x34 8.--15. 1. " PLLM_DIVN                   ,PLL feedback divider"
hexmask.long.byte 0x34 0.--7. 1. "                    PLLM_DIVM                         ,PLL input divider"
line.long 0x38 "PLLM_WB0_OVERRIDE2_0,PLLM_WB0_OVERRIDE2_0"
bitfld.long 0x38 27.--31. " DIVP                        ,4 bit DIVP for PLLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
bitfld.long 0x38 26. "                    KVCO                              ,KVCO/VCO gain" "0,1"
textline "                                       "
bitfld.long 0x38 24.--25. " KCP                         ,Charge pump control" "0,1,2,3"
hexmask.long.tbyte 0x38 0.--23. 1. "                     SETUP                             ,Setup"
line.long 0x3C "PLLMSB_WB0_OVERRIDE_FREQ_0,PLLMSB_WB0_OVERRIDE_FREQ_0"
hexmask.long.byte 0x3C 8.--15. 1. " PLLMSB_DIVN                 ,PLL feedback divider"
hexmask.long.byte 0x3C 0.--7. 1. "                    PLLMSB_DIVM                       ,PLL input divider"
line.long 0x40 "PLLMSB_WB0_OVERRIDE2_0,PLLMSB_WB0_OVERRIDE2_0"
bitfld.long 0x40 27.--31. " DIVP                        ,4 bit DIVP for PLLM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..."
bitfld.long 0x40 26. "                    KVCO                              ,KVCO/VCO gain" "0,1"
textline "                                       "
bitfld.long 0x40 24.--25. " KCP                         ,Charge pump control" "0,1,2,3"
hexmask.long.tbyte 0x40 0.--23. 1. "                     SETUP                             ,Setup"
line.long 0x44 "OSC_EDPD_OVER_0,OSC_EDPD_OVER_0"
bitfld.long 0x44 23. " CLK_OK                      ,Crystal oscillator clk_ok signal" "Disabled,Enabled"
bitfld.long 0x44 22. "              OSC_CTRL_SELECT                   ,Select whether CARs OSC_CTRL or PMCs OSC_CTRL_OVER affects the oscillator cell" "CAR,PMC"
textline "                                       "
hexmask.long.byte 0x44 12.--19. 1. " OSCFI_SPARE                 ,Charge pump control"
bitfld.long 0x44 7.--11. "                    XODS                              ,Crystal oscillator duty cycle control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                       "
bitfld.long 0x44 1.--6. " XOFS                        ,Crystal oscillator drive strength control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x68++0x07
line.long 0x00 "SATA_PWRGT_0,SATA_PWRGT_0"
bitfld.long 0x00 6. " PG_INFO                     ,Sm2sata_pg_info" "0,1"
line.long 0x04 "SENSOR_CTRL_0,SENSOR_CTRL_0"
bitfld.long 0x04 1. " ENABLE_RST                  ,Enables reset on sensor going up" "Disabled,Enabled"
bitfld.long 0x04 0. "              ENABLE_PG                         ,Power gate CPUs on temperature sensor going up" "Disabled,Enabled"
rgroup.long 0x70++0x03
line.long 0x00 "RST_STATUS_0,RST_STATUS_0"
bitfld.long 0x00 2.--5. " RST_SOURCE                  ,Power gate CPUs on temperature sensor going up" "SYS_RESET_N,AOWDT,BCCPLEXWDT,BPMPWDT,SCEWDT,SPEWDT,APEWDT,LCCPLEXWDT,SENSOR,AOTAG,VFSENSOR,MAINSWRST,SC7,HSM,CSITE,?..."
bitfld.long 0x00 0.--1. "           RST_LEVEL                         ,Reset Level" "L0,L1,L2,WARM"
group.long 0x74++0x03
line.long 0x00 "IO_DPD_REQ_0,DPD Request 0 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               HDMI_DP1                          ,Puts HDMI DP1 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " HDMI_DP0                    ,Puts HDMI DP0 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 25. "         DBG                               ,Debug" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " HSIC                        ,Puts HSIC rail in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 17. "         AUDIO                             ,Puts audio rail in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " UART                        ,Puts UART rail in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         USB_BIAS                          ,Puts usb_bias in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " USB2                        ,Puts USB2 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         USB1                              ,Puts USB1 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " USB0                        ,Puts USB0 in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 7. "         PEX_CLK1                          ,PEX clk1 pad-DPD control" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " PEX_CLK2                    ,PEX clk2 pad-DPD control" "Not requested,Requested"
bitfld.long 0x00 5. "         PEX_CLK3                          ,PEX clk3 pad-DPD control" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " PEX_CLK_BIAS                ,PEX clk bias pad-DPD control" "Not requested,Requested"
bitfld.long 0x00 3. "         MIPI_BIAS                         ,Puts mipi_bias (CSI/DSI bias) in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " DSI                         ,Puts DSIA in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 1. "         CSIB                              ,Puts CSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 0. " CSIA                        ,Puts CSIA in/out of deep power down mode" "Not requested,Requested"
rgroup.long 0x78++0x03
line.long 0x00 "IO_DPD_STATUS_0,DPD Status 0 Register"
bitfld.long 0x00 29. " HDMI_DP1                    ,HDMI DP1 in deep power down mode" "Off,On"
bitfld.long 0x00 28. "                   HDMI_DP0                          ,HDMI DP0 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DBG                         ,Debug" "Off,On"
bitfld.long 0x00 19. "                   HSIC                              ,HSIC rail in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " AUDIO                       ,Audio rail in deep power down mode" "Off,On"
bitfld.long 0x00 14. "                   UART                              ,UART rail in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " USB_BIAS                    ,Usb_bias in deep power down mode" "Off,On"
bitfld.long 0x00 11. "                   USB2                              ,USB2 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " USB1                        ,USB1 in deep power down mode" "Off,On"
bitfld.long 0x00 9. "                   USB0                              ,USB0 in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " PEX_CLK1                    ,PEX clk1 pad-DPD control" "Off,On"
bitfld.long 0x00 6. "                   PEX_CLK2                          ,PEX clk2 pad-DPD control" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " PEX_CLK3                    ,PEX clk3 pad-DPD control" "Off,On"
bitfld.long 0x00 4. "                   PEX_CLK_BIAS                      ,PEX clk bias pad-DPD control" "Off,On"
textline "                                       "
bitfld.long 0x00 3. " MIPI_BIAS                   ,Mipi_bias in deep power down mode" "Off,On"
bitfld.long 0x00 2. "                   DSI                               ,DSI in deep power down mode" "Off,On"
textline "                                       "
bitfld.long 0x00 1. " CSIB                        ,CSIB in deep power down mode" "Off,On"
bitfld.long 0x00 0. "                   CSIA                              ,CSIA in deep power down mode" "Off,On"
group.long 0x7C++0x03
line.long 0x00 "IO_DPD2_REQ_0,DPD Request 2 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "Idle,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               AUDIO_HV                          ,Puts AUDIO_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " CONN                        ,Puts CONN in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 24. "         SDMMC3_HV                         ,Puts SDMMC3_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " SDMMC1_HV                   ,Puts SDMMC1_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 21. "         EDP                               ,Puts EDP in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DMIC_HV                     ,Puts DMIC_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 17. "         UFS                               ,Puts UFS in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " SPI                         ,Puts SPI in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 14. "         CSIF                              ,Puts CSIF in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 13. " CSIE                        ,Puts CSIE in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         CSID                              ,Puts CSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " CSIC                        ,Puts CSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         DSID                              ,Puts DSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DSIC                        ,Puts DSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 8. "         DSIB                              ,Puts DSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAM                         ,Puts CAM in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 4. "         SDMMC4                            ,Puts SDMMC4 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " SDMMC2_HV                   ,Puts SDMMC2_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 0. "         PEX_CNTRL                         ,Puts pex_cntrl in/out of deep power down mode" "Not requested,Requested"
rgroup.long 0x80++0x03
line.long 0x00 "IO_DPD2_STATUS_0,DPD Status 2 Register"
bitfld.long 0x00 29. " AUDIO_HV                    ,Puts AUDIO_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 28. "         CONN                              ,Puts CONN in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " SDMMC3_HV                   ,Puts SDMMC3_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 23. "         SDMMC1_HV                         ,Puts SDMMC1_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " EDP                         ,Puts EDP in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 20. "         DMIC_HV                           ,Puts DMIC_HV in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " UFS                         ,Puts UFS in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 14. "         CSIF                              ,Puts CSIF in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 13. " CSIE                        ,Puts CSIE in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 12. "         CSID                              ,Puts CSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " CSIC                        ,Puts CSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 10. "         DSID                              ,Puts DSID in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DSIC                        ,Puts DSIC in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 8. "         DSIB                              ,Puts DSIB in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAM                         ,Puts CAM in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 4. "         SDMMC4                            ,Puts SDMMC4 in/out of deep power down mode" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " SDMMC2_HV                   ,Puts SDMMC2_HV in/out of deep power down mode" "Not requested,Requested"
bitfld.long 0x00 0. "         PEX_CNTRL                         ,Puts PEX_CNTRL in/out of deep power down mode" "Not requested,Requested"
group.long 0x84++0x03
line.long 0x00 "IO_DPD3_REQ_0,DPD Request 3 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "Idle,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 28. "               DDR_RESET                         ,DDR_RESET Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 27. " DDR_BR11_CMD                ,DDR_BR11_CMD Request" "Not requested,Requested"
bitfld.long 0x00 26. "         DDR_BR10_CMD                      ,DDR_BR10_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " DDR_BR9_CMD                 ,DDR_BR9_CMD Request" "Not requested,Requested"
bitfld.long 0x00 24. "         DDR_BR8_CMD                       ,DDR_BR8_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " DDR_BR7_CMD                 ,DDR_BR7_CMD Request" "Not requested,Requested"
bitfld.long 0x00 22. "         DDR_BR6_CMD                       ,DDR_BR6_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " DDR_BR5_CMD                 ,DDR_BR5_CMD Request" "Not requested,Requested"
bitfld.long 0x00 20. "         DDR_BR4_CMD                       ,DDR_BR4_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " DDR_BR3_CMD                 ,DDR_BR3_CMD Request" "Not requested,Requested"
bitfld.long 0x00 18. "         DDR_BR2_CMD                       ,DDR_BR2_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " DDR_BR1_CMD                 ,DDR_BR1_CMD Request" "Not requested,Requested"
bitfld.long 0x00 16. "         DDR_BR0_CMD                       ,DDR_BR0_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " DDR_DDLL                    ,DDR_DDLL Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR_COMP                          ,DDR_COMP Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR_BR11                    ,DDR_BR11 Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR_BR10                          ,DDR_BR10 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR_BR9                     ,DDR_BR9 Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR_BR8                           ,DDR_BR8 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR_BR7                     ,DDR_BR7 Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR_BR6                           ,DDR_BR6 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR_BR5                     ,DDR_BR5 Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR_BR4                           ,DDR_BR4 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR_BR3                     ,DDR_BR3 Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR_BR2                           ,DDR_BR2 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR_BR1                     ,DDR_BR1 Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR_BR0                           ,DDR_BR0 Request" "Not requested,Requested"
rgroup.long 0x88++0x03
line.long 0x00 "IO_DPD3_STATUS_0,DPD Status 3 Register"
bitfld.long 0x00 28. " DDR_RESET                   ,DDR_RESET Status" "Off,On"
bitfld.long 0x00 27. "                   DDR_BR11_CMD                      ,DDR_BR11_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 26. " DDR_BR10_CMD                ,DDR_BR10_CMD Status" "Off,On"
bitfld.long 0x00 25. "                   DDR_BR9_CMD                       ,DDR_BR9_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " DDR_BR8_CMD                 ,DDR_BR8_CMD Status" "Off,On"
bitfld.long 0x00 23. "                   DDR_BR7_CMD                       ,DDR_BR7_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 22. " DDR_BR6_CMD                 ,DDR_BR6_CMD Status" "Off,On"
bitfld.long 0x00 21. "                   DDR_BR5_CMD                       ,DDR_BR5_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 20. " DDR_BR4_CMD                 ,DDR_BR4_CMD Status" "Off,On"
bitfld.long 0x00 19. "                   DDR_BR3_CMD                       ,DDR_BR3_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " DDR_BR2_CMD                 ,DDR_BR2_CMD Status" "Off,On"
bitfld.long 0x00 17. "                   DDR_BR1_CMD                       ,DDR_BR1_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " DDR_BR0_CMD                 ,DDR_BR0_CMD Status" "Off,On"
bitfld.long 0x00 15. "                   DDR_DDLL                          ,DDR_DDLL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR_COMP                    ,DDR_COMP Status" "Off,On"
bitfld.long 0x00 11. "                   DDR_BR11                          ,DDR_BR11 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR_BR10                    ,DDR_BR10 Status" "Off,On"
bitfld.long 0x00 9. "                   DDR_BR9                           ,DDR_BR9 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR_BR8                     ,DDR_BR8 Status" "Off,On"
bitfld.long 0x00 7. "                   DDR_BR7                           ,DDR_BR7 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR_BR6                     ,DDR_BR6 Status" "Off,On"
bitfld.long 0x00 5. "                   DDR_BR5                           ,DDR_BR5 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR_BR4                     ,DDR_BR4 Status" "Off,On"
bitfld.long 0x00 3. "                   DDR_BR3                           ,DDR_BR3 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR_BR2                     ,DDR_BR2 Status" "Off,On"
bitfld.long 0x00 1. "                   DDR_BR1                           ,DDR_BR1 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR_BR0                     ,DDR_BR0 Status" "Off,On"
group.long 0x8C++0x03
line.long 0x00 "IO_DPD4_REQ_0,DPD Request 4 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               DDR_DDLL_VTTGEN                   ,DDR_DDLL_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " DDR_COMP_VTTGEN             ,DDR_COMP_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 27. "         DDR_BR11_VTTGEN                   ,DDR_BR11_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " DDR_BR10_VTTGEN             ,DDR_BR10_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 25. "         DDR_BR9_VTTGEN                    ,DDR_BR9_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " DDR_BR8_VTTGEN              ,DDR_BR8_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 23. "         DDR_BR7_VTTGEN                    ,DDR_BR7_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " DDR_BR6_VTTGEN              ,DDR_BR6_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 21. "         DDR_BR5_VTTGEN                    ,DDR_BR5_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DDR_BR4_VTTGEN              ,DDR_BR4_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 19. "         DDR_BR3_VTTGEN                    ,DDR_BR3_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " DDR_BR2_VTTGEN              ,DDR_BR2_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 17. "         DDR_BR1_VTTGEN                    ,DDR_BR1_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " DDR_BR0_VTTGENBG            ,DDR_BR0_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR_COMP_BG                       ,DDR_COMP_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR_BR11_BG                 ,DDR_BR11_BG Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR_BR10_BG                       ,DDR_BR10_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR_BR9_BG                  ,DDR_BR9_BG Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR_BR8_BG                        ,DDR_BR8_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR_BR7_BG                  ,DDR_BR7_BG Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR_BR6_BG                        ,DDR_BR6_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR_BR5_BG                  ,DDR_BR5_BG Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR_BR4_BG                        ,DDR_BR4_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR_BR3_BG                  ,DDR_BR3_BG Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR_BR2_BG                        ,DDR_BR2_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR_BR1_BG                  ,DDR_BR1_BG Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR_BR0_BG                        ,DDR_BR0_BG Request" "Not requested,Requested"
rgroup.long 0x90++0x03
line.long 0x00 "IO_DPD4_STATUS_0,DPD Status 4 Register"
bitfld.long 0x00 29. " DDR_DDLL_VTTGEN             ,DDR_DDLL_VTTGEN Status" "Off,On"
bitfld.long 0x00 28. "                   DDR_COMP_VTTGEN                   ,DDR_COMP_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " DDR_BR11_VTTGEN             ,DDR_BR11_VTTGEN Status" "Off,On"
bitfld.long 0x00 26. "                   DDR_BR10_VTTGEN                   ,DDR_BR10_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DDR_BR9_VTTGEN              ,DDR_BR9_VTTGEN Status" "Off,On"
bitfld.long 0x00 24. "                   DDR_BR8_VTTGEN                    ,DDR_BR8_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " DDR_BR7_VTTGEN              ,DDR_BR7_VTTGEN Status" "Off,On"
bitfld.long 0x00 22. "                   DDR_BR6_VTTGEN                    ,DDR_BR6_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 21. " DDR_BR5_VTTGEN              ,DDR_BR5_VTTGEN Status" "Off,On"
bitfld.long 0x00 20. "                   DDR_BR4_VTTGEN                    ,DDR_BR4_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " DDR_BR3_VTTGEN              ,DDR_BR3_VTTGEN Status" "Off,On"
bitfld.long 0x00 18. "                   DDR_BR2_VTTGEN                    ,DDR_BR2_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " DDR_BR1_VTTGEN              ,DDR_BR1_VTTGEN Status" "Off,On"
bitfld.long 0x00 16. "                   DDR_BR0_VTTGEN                    ,DDR_BR0_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR_COMP_BG                 ,DDR_COMP_BG Status" "Off,On"
bitfld.long 0x00 11. "                   DDR_BR11_BG                       ,DDR_BR11_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR_BR10_BG                 ,DDR_BR10_BG Status" "Off,On"
bitfld.long 0x00 9. "                   DDR_BR9_BG                        ,DDR_BR9_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR_BR8_BG                  ,DDR_BR8_BG Status" "Off,On"
bitfld.long 0x00 7. "                   DDR_BR7_BG                        ,DDR_BR7_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR_BR6_BG                  ,DDR_BR6_BG Status" "Off,On"
bitfld.long 0x00 5. "                   DDR_BR5_BG                        ,DDR_BR5_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR_BR4_BG                  ,DDR_BR4_BG Status" "Off,On"
bitfld.long 0x00 3. "                   DDR_BR3_BG                        ,DDR_BR3_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR_BR2_BG                  ,DDR_BR2_BG Status" "Off,On"
bitfld.long 0x00 1. "                   DDR_BR1_BG                        ,DDR_BR1_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR_BR0_BG                  ,DDR_BR0_BG Status" "Off,On"
group.long 0x94++0x03
line.long 0x00 "IO_DPD5_REQ_0,DPD Request 5 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 28. "               DDR1_RESET                        ,DDR1_RESET Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 27. " DDR1_BR11_CMD               ,DDR1_BR11_CMD Request" "Not requested,Requested"
bitfld.long 0x00 26. "         DDR1_BR10_CMD                     ,DDR1_BR10_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " DDR1_BR9_CMD                ,DDR1_BR9_CMD Request" "Not requested,Requested"
bitfld.long 0x00 24. "         DDR1_BR8_CMD                      ,DDR1_BR8_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " DDR1_BR7_CMD                ,DDR1_BR7_CMD Request" "Not requested,Requested"
bitfld.long 0x00 22. "         DDR1_BR6_CMD                      ,DDR1_BR6_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 21. " DDR1_BR5_CMD                ,DDR1_BR5_CMD Request" "Not requested,Requested"
bitfld.long 0x00 20. "         DDR1_BR4_CMD                      ,DDR1_BR4_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 19. " DDR1_BR3_CMD                ,DDR1_BR3_CMD Request" "Not requested,Requested"
bitfld.long 0x00 18. "         DDR1_BR2_CMD                      ,DDR1_BR2_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " DDR1_BR1_CMD                ,DDR1_BR1_CMD Request" "Not requested,Requested"
bitfld.long 0x00 16. "         DDR1_BR0_CMD                      ,DDR1_BR0_CMD Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 15. " DDR1_DDLL                   ,DDR1_DDLL Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR1_COMP                         ,DDR1_COMP Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR1_BR11                   ,DDR1_BR11 Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR1_BR10                         ,DDR1_BR10 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR1_BR9                    ,DDR1_BR9 Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR1_BR8                          ,DDR1_BR8 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR1_BR7                    ,DDR1_BR7 Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR1_BR6                          ,DDR1_BR6 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR1_BR5                    ,DDR1_BR5 Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR1_BR4                          ,DDR1_BR4 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR1_BR3                    ,DDR1_BR3 Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR1_BR2                          ,DDR1_BR2 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR1_BR1                    ,DDR1_BR1 Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR1_BR0                          ,DDR1_BR0 Request" "Not requested,Requested"
rgroup.long 0x98++0x03
line.long 0x00 "IO_DPD5_STATUS_0,DPD Status 5 Register"
bitfld.long 0x00 28. " DDR1_RESET                  ,DDR1_RESET Status" "Off,On"
bitfld.long 0x00 27. "                   DDR1_BR11_CMD                     ,DDR1_BR11_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 26. " DDR1_BR10_CMD               ,DDR1_BR10_CMD Status" "Off,On"
bitfld.long 0x00 25. "                   DDR1_BR9_CMD                      ,DDR1_BR9_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " DDR1_BR8_CMD                ,DDR1_BR8_CMD Status" "Off,On"
bitfld.long 0x00 23. "                   DDR1_BR7_CMD                      ,DDR1_BR7_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 22. " DDR1_BR6_CMD                ,DDR1_BR6_CMD Status" "Off,On"
bitfld.long 0x00 21. "                   DDR1_BR5_CMD                      ,DDR1_BR5_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 20. " DDR1_BR4_CMD                ,DDR1_BR4_CMD Status" "Off,On"
bitfld.long 0x00 19. "                   DDR1_BR3_CMD                      ,DDR1_BR3_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " DDR1_BR2_CMD                ,DDR1_BR2_CMD Status" "Off,On"
bitfld.long 0x00 17. "                   DDR1_BR1_CMD                      ,DDR1_BR1_CMD Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " DDR1_BR0_CMD                ,DDR1_BR0_CMD Status" "Off,On"
bitfld.long 0x00 15. "                   DDR1_DDLL                         ,DDR1_DDLL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR1_COMP                   ,DDR1_COMP Status" "Off,On"
bitfld.long 0x00 11. "                   DDR1_BR11                         ,DDR1_BR11 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR1_BR10                   ,DDR1_BR10 Status" "Off,On"
bitfld.long 0x00 9. "                   DDR1_BR9                          ,DDR1_BR9 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR1_BR8                    ,DDR1_BR8 Status" "Off,On"
bitfld.long 0x00 7. "                   DDR1_BR7                          ,DDR1_BR7 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR1_BR6                    ,DDR1_BR6 Status" "Off,On"
bitfld.long 0x00 5. "                   DDR1_BR5                          ,DDR1_BR5 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR1_BR4                    ,DDR1_BR4 Status" "Off,On"
bitfld.long 0x00 3. "                   DDR1_BR3                          ,DDR1_BR3 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR1_BR2                    ,DDR1_BR2 Status" "Off,On"
bitfld.long 0x00 1. "                   DDR1_BR1                          ,DDR1_BR1 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR1_BR0                    ,DDR1_BR0 Status" "Off,On"
group.long 0x9C++0x03
line.long 0x00 "IO_DPD6_REQ_0,DPD Request 6 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               DDR1_DDLL_VTTGEN                  ,DDR1_DDLL_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " DDR1_COMP_VTTGEN            ,DDR1_COMP_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 27. "         DDR1_BR11_VTTGEN                  ,DDR1_BR11_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " DDR1_BR10_VTTGEN            ,DDR1_BR10_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 25. "         DDR1_BR9_VTTGEN                   ,DDR1_BR9_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " DDR1_BR8_VTTGEN             ,DDR1_BR8_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 23. "         DDR1_BR7_VTTGEN                   ,DDR1_BR7_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " DDR1_BR6_VTTGEN             ,DDR1_BR6_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 21. "         DDR1_BR5_VTTGEN                   ,DDR1_BR5_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 20. " DDR1_BR4_VTTGEN             ,DDR1_BR4_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 19. "         DDR1_BR3_VTTGEN                   ,DDR1_BR3_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " DDR1_BR2_VTTGEN             ,DDR1_BR2_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 17. "         DDR1_BR1_VTTGEN                   ,DDR1_BR1_VTTGEN Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " DDR1_BR0_VTTGEN             ,DDR1_BR0_VTTGEN Request" "Not requested,Requested"
bitfld.long 0x00 12. "         DDR1_COMP_BG                      ,DDR1_COMP_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 11. " DDR1_BR11_BG                ,DDR1_BR11_BG Request" "Not requested,Requested"
bitfld.long 0x00 10. "         DDR1_BR10_BG                      ,DDR1_BR10_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 9. " DDR1_BR9_BG                 ,DDR1_BR9_BG Request" "Not requested,Requested"
bitfld.long 0x00 8. "         DDR1_BR8_BG                       ,DDR1_BR8_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 7. " DDR1_BR7_BG                 ,DDR1_BR7_BG Request" "Not requested,Requested"
bitfld.long 0x00 6. "         DDR1_BR6_BG                       ,DDR1_BR6_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 5. " DDR1_BR5_BG                 ,DDR1_BR5_BG Request" "Not requested,Requested"
bitfld.long 0x00 4. "         DDR1_BR4_BG                       ,DDR1_BR4_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 3. " DDR1_BR3_BG                 ,DDR1_BR3_BG Request" "Not requested,Requested"
bitfld.long 0x00 2. "         DDR1_BR2_BG                       ,DDR1_BR2_BG Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 1. " DDR1_BR1_BG                 ,DDR1_BR1_BG Request" "Not requested,Requested"
bitfld.long 0x00 0. "         DDR1_BR0_BG                       ,DDR1_BR0_BG Request" "Not requested,Requested"
rgroup.long 0xA0++0x03
line.long 0x00 "IO_DPD6_STATUS_0,DPD Status 5 Register"
bitfld.long 0x00 29. " DDR1_DDLL_VTTGEN            ,DDR1_DDLL_VTTGEN Status" "Off,On"
bitfld.long 0x00 28. "                   DDR1_COMP_VTTGEN                  ,DDR1_COMP_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " DDR1_BR11_VTTGEN            ,DDR1_BR11_VTTGEN Status" "Off,On"
bitfld.long 0x00 26. "                   DDR1_BR10_VTTGEN                  ,DDR1_BR10_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " DDR1_BR9_VTTGEN             ,DDR1_BR9_VTTGEN Status" "Off,On"
bitfld.long 0x00 24. "                   DDR1_BR8_VTTGEN                   ,DDR1_BR8_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " DDR1_BR7_VTTGEN             ,DDR1_BR7_VTTGEN Status" "Off,On"
bitfld.long 0x00 22. "                   DDR1_BR6_VTTGEN                   ,DDR1_BR6_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 21. " DDR1_BR5_VTTGEN             ,DDR1_BR5_VTTGEN Status" "Off,On"
bitfld.long 0x00 20. "                   DDR1_BR4_VTTGEN                   ,DDR1_BR4_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " DDR1_BR3_VTTGEN             ,DDR1_BR3_VTTGEN Status" "Off,On"
bitfld.long 0x00 18. "                   DDR1_BR2_VTTGEN                   ,DDR1_BR2_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " DDR1_BR1_VTTGEN             ,DDR1_BR1_VTTGEN Status" "Off,On"
bitfld.long 0x00 16. "                   DDR1_BR0_VTTGEN                   ,DDR1_BR0_VTTGEN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 12. " DDR1_COMP_BG                ,DDR1_COMP_BG Status" "Off,On"
bitfld.long 0x00 11. "                   DDR1_BR11_BG                      ,DDR1_BR11_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 10. " DDR1_BR10_BG                ,DDR1_BR10_BG Status" "Off,On"
bitfld.long 0x00 9. "                   DDR1_BR9_BG                       ,DDR1_BR9_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 8. " DDR1_BR8_BG                 ,DDR1_BR8_BG Status" "Off,On"
bitfld.long 0x00 7. "                   DDR1_BR7_BG                       ,DDR1_BR7_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 6. " DDR1_BR6_BG                 ,DDR1_BR6_BG Status" "Off,On"
bitfld.long 0x00 5. "                   DDR1_BR5_BG                       ,DDR1_BR5_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 4. " DDR1_BR4_BG                 ,DDR1_BR4_BG Status" "Off,On"
bitfld.long 0x00 3. "                   DDR1_BR3_BG                       ,DDR1_BR3_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 2. " DDR1_BR2_BG                 ,DDR1_BR2_BG Status" "Off,On"
bitfld.long 0x00 1. "                   DDR1_BR1_BG                       ,DDR1_BR1_BG Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " DDR1_BR0_BG                 ,DDR1_BR0_BG Status" "Off,On"
group.long 0xA4++0x03
line.long 0x00 "IO_DPD7_REQ_0,DPD Request 7 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 29. "               UART3_TX                          ,UART3_TX Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 28. " UART3_RX                    ,UART3_RX Request" "Not requested,Requested"
bitfld.long 0x00 27. "         UART3_RTS                         ,UART3_RTS Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 26. " UART3_CTS                   ,UART3_CTS Request" "Not requested,Requested"
bitfld.long 0x00 25. "         CAN_GPIO5                         ,CAN_GPIO5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 24. " CAN_GPIO4                   ,CAN_GPIO4 Request" "Not requested,Requested"
bitfld.long 0x00 23. "         CAN_GPIO3                         ,CAN_GPIO3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 22. " CAN_GPIO2                   ,CAN_GPIO2 Request" "Not requested,Requested"
bitfld.long 0x00 19. "         GPIO_SW3                          ,GPIO_SW3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 18. " GPIO_SW2                    ,GPIO_SW2 Request" "Not requested,Requested"
bitfld.long 0x00 17. "         GPIO_SEN9                         ,GPIO_SEN9 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 16. " GPIO_SEN8                   ,GPIO_SEN8 Request" "Not requested,Requested"
bitfld.long 0x00 15. "         GPIO_SEN7                         ,GPIO_SEN7 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " GPIO_SEN6                   ,GPIO_SEN6 Request" "Not requested,Requested"
bitfld.long 0x00 13. "         GPIO_SEN5                         ,GPIO_SEN5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 12. " GPIO_SEN4                   ,GPIO_SEN4 Request" "Not requested,Requested"
bitfld.long 0x00 11. "         GPIO_SEN3                         ,GPIO_SEN3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 10. " GPIO_SEN2                   ,GPIO_SEN2 Request" "Not requested,Requested"
bitfld.long 0x00 9. "         GPIO_SEN1                         ,GPIO_SEN1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 8. " GPIO_SEN0                   ,GPIO_SEN0 Request" "Not requested,Requested"
bitfld.long 0x00 7. "         CAN_GPIO1                         ,CAN_GPIO1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " CAN_GPIO0                   ,CAN_GPIO0 Request" "Not requested,Requested"
bitfld.long 0x00 5. "         CAN1_DOUT                         ,CAN1_DOUT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " CAN1_DIN                    ,CAN1_DIN Request" "Not requested,Requested"
bitfld.long 0x00 3. "         CAN0_DOUT                         ,CAN0_DOUT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 2. " CAN0_DIN                    ,CAN0_DIN Request" "Not requested,Requested"
bitfld.long 0x00 0. "         BATT_OC                           ,DDR1_BR0_BG Request" "Not requested,Requested"
rgroup.long 0xA8++0x03
line.long 0x00 "IO_DPD7_STATUS_0,DPD Status 7 Register"
bitfld.long 0x00 29. " UART3_TX                    ,UART3_TX Status" "Off,On"
bitfld.long 0x00 28. "                   UART3_RX                          ,UART3_RX Status" "Off,On"
textline "                                       "
bitfld.long 0x00 27. " UART3_RTS                   ,UART3_RTS Status" "Off,On"
bitfld.long 0x00 26. "                   UART3_CTS                         ,UART3_CTS Status" "Off,On"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO5                   ,CAN_GPIO5 Status" "Off,On"
bitfld.long 0x00 24. "                   CAN_GPIO4                         ,CAN_GPIO4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 23. " CAN_GPIO3                   ,CAN_GPIO3 Status" "Off,On"
bitfld.long 0x00 22. "                   CAN_GPIO2                         ,CAN_GPIO2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 19. " GPIO_SW3                    ,GPIO_SW3 Status" "Off,On"
bitfld.long 0x00 18. "                   GPIO_SW2                          ,GPIO_SW2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 17. " GPIO_SEN9                   ,GPIO_SEN9 Status" "Off,On"
bitfld.long 0x00 16. "                   GPIO_SEN8                         ,GPIO_SEN8 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 15. " GPIO_SEN7                   ,GPIO_SEN7 Status" "Off,On"
bitfld.long 0x00 14. "                   GPIO_SEN6                         ,GPIO_SEN6 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 13. " GPIO_SEN5                   ,GPIO_SEN5 Status" "Off,On"
bitfld.long 0x00 12. "                   GPIO_SEN4                         ,GPIO_SEN4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 11. " GPIO_SEN3                   ,GPIO_SEN3 Status" "Off,On"
bitfld.long 0x00 10. "                   GPIO_SEN2                         ,GPIO_SEN2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 9. " GPIO_SEN1                   ,GPIO_SEN1 Status" "Off,On"
bitfld.long 0x00 8. "                   GPIO_SEN0                         ,GPIO_SEN0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " CAN_GPIO1                   ,CAN_GPIO1 Status" "Off,On"
bitfld.long 0x00 6. "                   CAN_GPIO0                         ,CAN_GPIO0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " CAN1_DOUT                   ,CAN1_DOUT Status" "Off,On"
bitfld.long 0x00 4. "                   CAN1_DIN                          ,CAN1_DIN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 3. " CAN0_DOUT                   ,CAN0_DOUT Status" "Off,On"
bitfld.long 0x00 2. "                   CAN0_DIN                          ,CAN0_DIN Status" "Off,On"
textline "                                       "
bitfld.long 0x00 0. " BATT_OC                     ,BATT_OC Status" "Off,On"
group.long 0xAC++0x03
line.long 0x00 "IO_DPD8_REQ_0,DPD Request 8 Register"
bitfld.long 0x00 30.--31. " CODE                        ,Code of operation for all set bits" "IDLE,DPD_OFF,DPD_ON,?..."
bitfld.long 0x00 26. "               CAN_GPIO7                         ,CAN_GPIO7 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO6                   ,CAN_GPIO6 Request" "Not requested,Requested"
bitfld.long 0x00 24. "         VCOMP_ALERT                       ,VCOMP_ALERT Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 23. " TOUCH_CLK                   ,TOUCH_CLK Request" "Not requested,Requested"
bitfld.long 0x00 18. "         PWR_I2C_SDA                       ,PWR_I2C_SDA Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 17. " PWR_I2C_SCL                 ,PWR_I2C_SCL Request" "Not requested,Requested"
bitfld.long 0x00 16. "         POWER_ON                          ,POWER_ON Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 14. " GPIO_SW4                    ,GPIO_SW4 Request" "Not requested,Requested"
bitfld.long 0x00 13. "         GPIO_DIS5                         ,GPIO_DIS5 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 12. " GPIO_DIS4                   ,GPIO_DIS4 Request" "Not requested,Requested"
bitfld.long 0x00 11. "         GPIO_DIS3                         ,GPIO_DIS3 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 10. " GPIO_DIS2                   ,GPIO_DIS2 Request" "Not requested,Requested"
bitfld.long 0x00 9. "         GPIO_DIS1                         ,GPIO_DIS1 Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 8. " GPIO_DIS0                   ,GPIO_DIS0 Request" "Not requested,Requested"
bitfld.long 0x00 7. "         GEN8_I2C_SDA                      ,GEN8_I2C_SDA Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 6. " GEN8_I2C_SCL                ,GEN8_I2C_SCL Request" "Not requested,Requested"
bitfld.long 0x00 5. "         UART7_TX                          ,UART7_TX Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 4. " UART7_RX                    ,UART7_RX Request" "Not requested,Requested"
bitfld.long 0x00 1. "         SAFE_STATE                        ,SAFE_STATE Request" "Not requested,Requested"
textline "                                       "
bitfld.long 0x00 0. " GPIO_SW1                    ,GPIO_SW1 Request" "Not requested,Requested"
rgroup.long 0xB0++0x03
line.long 0x00 "IO_DPD8_STATUS_0,DPD Status 8 Register"
bitfld.long 0x00 26. " CAN_GPIO7                   ,CAN_GPIO7 Status" "Off,On"
bitfld.long 0x00 25. "                   CAN_GPIO6                         ,CAN_GPIO6 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 24. " VCOMP_ALERT                 ,VCOMP_ALERT Status" "Off,On"
bitfld.long 0x00 23. "                   TOUCH_CLK                         ,TOUCH_CLK Status" "Off,On"
textline "                                       "
bitfld.long 0x00 18. " PWR_I2C_SDA                 ,PWR_I2C_SDA Status" "Off,On"
bitfld.long 0x00 17. "                   PWR_I2C_SCL                       ,PWR_I2C_SCL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 16. " POWER_ON                    ,POWER_ON Status" "Off,On"
bitfld.long 0x00 14. "                   GPIO_SW4                          ,GPIO_SW4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 13. " GPIO_DIS5                   ,GPIO_DIS5 Status" "Off,On"
bitfld.long 0x00 12. "                   GPIO_DIS4                         ,GPIO_DIS4 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 11. " GPIO_DIS3                   ,GPIO_DIS3 Status" "Off,On"
bitfld.long 0x00 10. "                   GPIO_DIS2                         ,GPIO_DIS2 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 9. " GPIO_DIS1                   ,GPIO_DIS1 Status" "Off,On"
bitfld.long 0x00 8. "                   GPIO_DIS0                         ,GPIO_DIS0 Status" "Off,On"
textline "                                       "
bitfld.long 0x00 7. " GEN8_I2C_SDA                ,GEN8_I2C_SDA Status" "Off,On"
bitfld.long 0x00 6. "                   GEN8_I2C_SCL                      ,GEN8_I2C_SCL Status" "Off,On"
textline "                                       "
bitfld.long 0x00 5. " UART7_TX                    ,UART7_TX Status" "Off,On"
bitfld.long 0x00 4. "                   UART7_RX                          ,UART7_RX Status" "Off,On"
textline "                                       "
bitfld.long 0x00 1. " SAFE_STATE                  ,SAFE_STATE Status" "Off,On"
bitfld.long 0x00 0. "                   GPIO_SW1                          ,GPIO_SW1 Status" "Off,On"
group.long 0xB4++0x37
line.long 0x00 "IO_DPD7_OFF_MASK_0,DPD Mask Off 7 Register"
bitfld.long 0x00 29. " UART3_TX                    ,UART3_TX Request" "Not masked,Masked"
bitfld.long 0x00 28. "            UART3_RX                          ,UART3_RX Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 27. " UART3_RTS                   ,UART3_RTS Request" "Not masked,Masked"
bitfld.long 0x00 26. "            UART3_CTS                         ,UART3_CTS Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 25. " CAN_GPIO5                   ,CAN_GPIO5 Request" "Not masked,Masked"
bitfld.long 0x00 24. "            CAN_GPIO4                         ,CAN_GPIO4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 23. " CAN_GPIO3                   ,CAN_GPIO3 Request" "Not masked,Masked"
bitfld.long 0x00 22. "            CAN_GPIO2                         ,CAN_GPIO2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 19. " GPIO_SW3                    ,GPIO_SW3 Request" "Not masked,Masked"
bitfld.long 0x00 18. "            GPIO_SW2                          ,GPIO_SW2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 17. " GPIO_SEN9                   ,GPIO_SEN9 Request" "Not masked,Masked"
bitfld.long 0x00 16. "            GPIO_SEN8                         ,GPIO_SEN8 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 15. " GPIO_SEN7                   ,GPIO_SEN7 Request" "Not masked,Masked"
bitfld.long 0x00 14. "            GPIO_SEN6                         ,GPIO_SEN6 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 13. " GPIO_SEN5                   ,GPIO_SEN5 Request" "Not masked,Masked"
bitfld.long 0x00 12. "            GPIO_SEN4                         ,GPIO_SEN4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 11. " GPIO_SEN3                   ,GPIO_SEN3 Request" "Not masked,Masked"
bitfld.long 0x00 10. "            GPIO_SEN2                         ,GPIO_SEN2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 9. " GPIO_SEN1                   ,GPIO_SEN1 Request" "Not masked,Masked"
bitfld.long 0x00 8. "            GPIO_SEN0                         ,GPIO_SEN0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 7. " CAN_GPIO1                   ,CAN_GPIO1 Request" "Not masked,Masked"
bitfld.long 0x00 6. "            CAN_GPIO0                         ,CAN_GPIO0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 5. " CAN1_DOUT                   ,CAN1_DOUT Request" "Not masked,Masked"
bitfld.long 0x00 4. "            CAN1_DIN                          ,CAN1_DIN Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 3. " CAN0_DOUT                   ,CAN0_DOUT Request" "Not masked,Masked"
bitfld.long 0x00 2. "            CAN0_DIN                          ,CAN0_DIN Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x00 0. " BATT_OC                     ,BATT_OC Request" "Not masked,Masked"
line.long 0x04 "IO_DPD8_OFF_MASK_0,DPD Mask Off 8 Register"
bitfld.long 0x04 26. " CAN_GPIO7                   ,CAN_GPIO7 Request" "Not masked,Masked"
bitfld.long 0x04 25. "            CAN_GPIO6                         ,CAN_GPIO6 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 24. " VCOMP_ALERT                 ,VCOMP_ALERT Request" "Not masked,Masked"
bitfld.long 0x04 23. "            TOUCH_CLK                         ,TOUCH_CLK Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 18. " PWR_I2C_SDA                 ,PWR_I2C_SDA Request" "Not masked,Masked"
bitfld.long 0x04 17. "            PWR_I2C_SCL                       ,PWR_I2C_SCL Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 16. " POWER_ON                    ,POWER_ON Request" "Not masked,Masked"
bitfld.long 0x04 14. "            GPIO_SW4                          ,GPIO_SW4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 13. " GPIO_DIS5                   ,GPIO_DIS5 Request" "Not masked,Masked"
bitfld.long 0x04 12. "            GPIO_DIS4                         ,GPIO_DIS4 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 11. " GPIO_DIS3                   ,GPIO_DIS3 Request" "Not masked,Masked"
bitfld.long 0x04 10. "            GPIO_DIS2                         ,GPIO_DIS2 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 9. " GPIO_DIS1                   ,GPIO_DIS1 Request" "Not masked,Masked"
bitfld.long 0x04 8. "            GPIO_DIS0                         ,GPIO_DIS0 Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 7. " GEN8_I2C_SDA                ,GEN8_I2C_SDA Request" "Not masked,Masked"
bitfld.long 0x04 6. "            GEN8_I2C_SCL                      ,GEN8_I2C_SCL Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 5. " UART7_TX                    ,UART7_TX Request" "Not masked,Masked"
bitfld.long 0x04 4. "            UART7_RX                          ,UART7_RX Request" "Not masked,Masked"
textline "                                       "
bitfld.long 0x04 1. " SAFE_STATE                  ,SAFE_STATE Request" "Not masked,Masked"
bitfld.long 0x04 0. "            GPIO_SW1                          ,GPIO_SW1 Request" "Not masked,Masked"
line.long 0x08 "SEL_DPD_TIM_0,SEL_DPD_TIM_0"
hexmask.long.byte 0x08 0.--6. 1. " SEL_DPD_TIM                 ,Timer which separates e_dpd deassertion time from sel_dpd deassertion time"
line.long 0x0C "VDDP_SEL_0,Power set for new DDR pads"
bitfld.long 0x0C 0.--1. " DATA                        ,VDDP sel bits to DDR pads xm0" "00,01,10,11"
line.long 0x10 "VDDP_SEL_MEM1_0,VDDP_SEL_MEM1_0"
bitfld.long 0x10 0.--1. " DATA                        ,VDDP sel bits to DDR pads xm1" "00,01,10,11"
line.long 0x14 "DDR_CFG_0,Package type for CAR/PMC control"
bitfld.long 0x14 30.--31. " BR11_DPD_IO_CMD             ,DPD_IO_CMD for brick-11" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 28.--29. "             BR10_DPD_IO_CMD                   ,DPD_IO_CMD for brick-10" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 26.--27. " BR9_DPD_IO_CMD              ,DPD_IO_CMD for brick-9" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 24.--25. "             BR8_DPD_IO_CMD                    ,DPD_IO_CMD for brick-8" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 22.--23. " BR7_DPD_IO_CMD              ,DPD_IO_CMD for brick-7" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 20.--21. "             BR6_DPD_IO_CMD                    ,DPD_IO_CMD for brick-6" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 18.--19. " BR5_DPD_IO_CMD              ,DPD_IO_CMD for brick-5" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 16.--17. "             BR4_DPD_IO_CMD                    ,DPD_IO_CMD for brick-4" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 14.--15. " BR3_DPD_IO_CMD              ,DPD_IO_CMD for brick-3" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 12.--13. "             BR2_DPD_IO_CMD                    ,DPD_IO_CMD for brick-2" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x14 10.--11. " BR1_DPD_IO_CMD              ,DPD_IO_CMD for brick-1" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x14 8.--9. "             BR0_DPD_IO_CMD                    ,DPD_IO_CMD for brick-0" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
line.long 0x18 "DDR_CFG_MEM1_0,DDR_CFG_MEM1_0"
bitfld.long 0x18 30.--31. " BR11_DPD_IO_CMD             ,DPD_IO_CMD for brick-11" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 28.--29. "             BR10_DPD_IO_CMD                   ,DPD_IO_CMD for brick-10" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 26.--27. " BR9_DPD_IO_CMD              ,DPD_IO_CMD for brick-9" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 24.--25. "             BR8_DPD_IO_CMD                    ,DPD_IO_CMD for brick-8" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 22.--23. " BR7_DPD_IO_CMD              ,DPD_IO_CMD for brick-7" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 20.--21. "             BR6_DPD_IO_CMD                    ,DPD_IO_CMD for brick-6" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 18.--19. " BR5_DPD_IO_CMD              ,DPD_IO_CMD for brick-5" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 16.--17. "             BR4_DPD_IO_CMD                    ,DPD_IO_CMD for brick-4" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 14.--15. " BR3_DPD_IO_CMD              ,DPD_IO_CMD for brick-3" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 12.--13. "             BR2_DPD_IO_CMD                    ,DPD_IO_CMD for brick-2" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
textline "                                       "
bitfld.long 0x18 10.--11. " BR1_DPD_IO_CMD              ,DPD_IO_CMD for brick-1" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
bitfld.long 0x18 8.--9. "             BR0_DPD_IO_CMD                    ,DPD_IO_CMD for brick-0" "HOLD_LOW,HOLD_HIGH,HOLD_HIZ,?..."
line.long 0x1C "DSI_SEL_DPD_0,SEL_DPD for DSI pad control"
bitfld.long 0x1C 3. " SET_DSID                    ,DSID set" "Off,On"
bitfld.long 0x1C 2. "                   SET_DSIC                          ,DSIC set" "Off,On"
textline "                                       "
bitfld.long 0x1C 1. " SET_DSIB                    ,DSIB set" "Off,On"
bitfld.long 0x1C 0. "                   SET_DSIA                          ,DSIA set" "Off,On"
line.long 0x20 "TSC_MULT_0,PMC_TSC_MULT_0"
bitfld.long 0x20 17.--19. " TICK_SEL                    ,Select one of the six binary time stamp counter bits" "BIT0,BIT1,BIT2,BIT3,BIT4,BIT5,?..."
rbitfld.long 0x20 16. "                  FREQ_STS                          ,Clock frequency being used for counter" "Fast,Slow"
textline "                                       "
hexmask.long.word 0x20 0.--15. 1. " MULT_VAL                    ,TSC multiply value"
line.long 0x24 "GLB_AMAP_CFG_0,GLB_AMAP_CFG"
bitfld.long 0x24 4. " PCIE_A4                     ,PCIE A4" "MMIO,DRAM"
bitfld.long 0x24 3. "                  PCIE_A3                           ,PCIE A3" "MMIO,DRAM"
textline "                                       "
bitfld.long 0x24 2. " PCIE_A2                     , PCIE A2" "MMIO,DRAM"
bitfld.long 0x24 1. "                  PCIE_A1                           , PCIE A1" "MMIO,DRAM"
line.long 0x28 "STICKY_BITS_0,STICKY_BITS_0"
bitfld.long 0x28 12. " CAMERA                      ,Drives the pmc2camera_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 11. "              VI_EF                             ,Drives the pmc2vi_csief_secure_enable signal" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 10. " VI_CD                       ,Drives the pmc2vi_csicd_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 9. "              VI_AB                             ,Drives the pmc2vi_csiab_secure_enable signal" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 8. " VI                          ,Drives the pmc2vi_channel_secure_enable signal" "Disabled,Enabled"
bitfld.long 0x28 7. "              CDD_EN                            ,Customer Denver 2 DFD Enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x28 0. " HDA_LPBK_DIS                ,Sticky one bit to disable the loopback in HDA codec" "Disabled,Enabled"
line.long 0x2C "WEAK_BIAS_0,PMC WEAK BIAS_0 Controller"
bitfld.long 0x2C 31. " VTTLP_E_WB_COMP             ,Weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x2C 30. "              VTT_E_WB_DDLL                     ,weak bias enable for ddll pad" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 29. " VTT_E_WB_BR11               ,weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x2C 28. "              VTT_E_WB_BR10                     ,weak bias enable for brick10" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 27. " VTT_E_WB_BR9                ,weak bias enable for brick9" "Disabled,Enabled"
bitfld.long 0x2C 26. "              VTT_E_WB_BR8                      ,weak bias enable for brick8" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 25. " VTT_E_WB_BR7                ,weak bias enable for brick7" "Disabled,Enabled"
bitfld.long 0x2C 24. "              VTT_E_WB_BR6                      ,weak bias enable for brick6" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 23. " VTT_E_WB_BR5                ,weak bias enable for brick5" "Disabled,Enabled"
bitfld.long 0x2C 22. "              VTT_E_WB_BR4                      ,weak bias enable for brick4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 21. " VTT_E_WB_BR3                ,weak bias enable for brick3" "Disabled,Enabled"
bitfld.long 0x2C 20. "              VTT_E_WB_BR2                      ,weak bias enable for brick2" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x2C 19. " VTT_E_WB_BR1                ,weak bias enable for brick1" "Disabled,Enabled"
bitfld.long 0x2C 18. "              VTT_E_WB_BR0                      ,weak bias enable for brick0" "Disabled,Enabled"
line.long 0x30 "WEAK_BIAS_MEM1_0,WEAK_BIAS_MEM1_0"
bitfld.long 0x30 31. " VTTLP_E_WB_COMP             ,Weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x30 30. "              VTTCDB_E_WB_DDLL                  ,Weak bias enable for ddll pad" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 29. " VTT_E_WB_BR11               ,weak bias enable for brick11" "Disabled,Enabled"
bitfld.long 0x30 28. "              VTT_E_WB_BR10                     ,weak bias enable for brick10" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 27. " VTT_E_WB_BR9                ,weak bias enable for brick9" "Disabled,Enabled"
bitfld.long 0x30 26. "              VTT_E_WB_BR8                      ,weak bias enable for brick8" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 25. " VTT_E_WB_BR7                ,weak bias enable for brick7" "Disabled,Enabled"
bitfld.long 0x30 24. "              VTT_E_WB_BR6                      ,weak bias enable for brick6" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 23. " VTT_E_WB_BR5                ,weak bias enable for brick5" "Disabled,Enabled"
bitfld.long 0x30 22. "              VTT_E_WB_BR4                      ,weak bias enable for brick4" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 21. " VTT_E_WB_BR3                ,weak bias enable for brick3" "Disabled,Enabled"
bitfld.long 0x30 20. "              VTT_E_WB_BR2                      ,weak bias enable for brick2" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x30 19. " VTT_E_WB_BR1                ,weak bias enable for brick1" "Disabled,Enabled"
bitfld.long 0x30 18. "              VTT_E_WB_BR0                      ,weak bias enable for brick0" "Disabled,Enabled"
line.long 0x34 "GPU_RG_CNTRL_0,GPU_RG_CNTRL_0"
bitfld.long 0x34 1. " PWRGOOD                     ,Enabling and removing GPU-PWRGOOD" "Disabled,Enabled"
bitfld.long 0x34 0. "              RAIL_CLAMP                        ,Enabling and removing GPU-SOC clamps" "Disabled,Enabled"
rgroup.long 0xEC++0x03
line.long 0x00 "GPU_SRAM_STATUS_0,GPU_SRAM_STATUS_0"
bitfld.long 0x00 1. " RG_SD_EXIT_DONE             ,RG_SD_EXIT_DONE" "Not done,Done"
bitfld.long 0x00 0. "              RG_SD_ENTRY_DONE                  ,RG_SD_ENTRY_DONE" "Not done,Done"
group.long 0xF0++0x1B
line.long 0x00 "SRAM_RAIL_CLAMP_0,SRAM_RAIL_CLAMP_0"
bitfld.long 0x00 0. " SRAM_RAIL_CLAMP             ,Enabling and removing SRAM RAIL clamps" "Disabled,Enabled"
line.long 0x04 "UFSHC_PWR_CNTRL_0,UFSHC_PWR_CNTRL_0"
bitfld.long 0x04 1. " LP_PWR_READY                ,Signal used to indicate to the AO logic of UFSHC that PSW domain is powered up" "Not ready,Ready"
bitfld.long 0x04 0. "             LP_ISOL_EN                        ,Clamp signal used to isolate the UFSHC AO logic inputs coming from PSW domain" "Disabled,Enabled"
line.long 0x08 "CNTRL2_0,CNTRL2_0"
bitfld.long 0x08 11. " SYSCLK_DATA                 ,SYS_CLK_REQ data value" "Disabled,Enabled"
bitfld.long 0x08 10. "              SYSCLK_ORRIDE                     ,SYS_CLK_REQ data override mux control" "HW,SYSCLK_DATA"
line.long 0x0C "EVENT_COUNTER_0,Event counter 0"
bitfld.long 0x0C 20. " EN                          ,COUNT enable/disable" "Off,On"
bitfld.long 0x0C 16.--19. "                   SEL                               ,Event Selections" "LP0 to LP0BB,LP0 to ACTIVE,LP0BB to ACTIVE,LP0BB to LP0,?..."
textline "                                       "
hexmask.long.word 0x0C 0.--15. 1. " COUNT                       ,Event counter"
line.long 0x10 "FUSE_CONTROL_0,Fuse Control 0 Register"
setclrfld.long 0x10 18. 0x10 16. 0x10 17. " KPS18_SET/CLR               ,KPS18" "LOW,HIGH"
setclrfld.long 0x10 10. 0x10 8. 0x10 9. "                  PS18_SET/CLR                      ,PS18" "LOW,HIGH"
textline "                                       "
bitfld.long 0x10 1. " DISABLE_REDIRECTION         ,Sticky disable redirection bit, reset at cold and warm reset" "Off,On"
bitfld.long 0x10 0. "                   ENABLE_REDIRECTION                ,Enable redirection bit - only reset at cold reset" "Off,On"
line.long 0x14 "DIRECT_THERMTRIP_CFG_0,THERMTRIP Configuration Register"
bitfld.long 0x14 5. " THERMTRIP_LOCK              ,Lock THERMTRIP_EN and AOTAG THERMTRIP threshold" "Disabled,Enabled"
bitfld.long 0x14 4. "              THERMTRIP_EN                      ,Assert PMC to SHUTDOWN sideband to PMIC on a thermal sensor reset event" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x14 0.--3. " SHDN_ASSERT_PULSE_WIDTH     ,Asserted SHUTDOWN pin remains for the programmed number of 32K clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "DEBUG_AUTHENTICATION_0,Debug Authentication Register"
bitfld.long 0x18 10. " SCE_SECURE_DEBUG            ,SCE_SECURE_DEBUG" "Off,On"
bitfld.long 0x18 9. "                   SPE_SECURE_DEBUG                  ,SPE_SECURE_DEBUG" "Off,On"
textline "                                       "
bitfld.long 0x18 8. " BPMP_SECURE_DEBUG           ,BPMP_SECURE_DEBUG" "Off,On"
bitfld.long 0x18 5. "                   DBGEN                             ,DBGEN" "Off,On"
textline "                                       "
bitfld.long 0x18 4. " NIDEN                       ,NIDEN" "Off,On"
bitfld.long 0x18 3. "                   SPIDEN                            ,SPIDEN" "Off,On"
textline "                                       "
bitfld.long 0x18 2. " SPNIDEN                     ,SPNIDEN" "Off,On"
bitfld.long 0x18 1. "                   DEVICEEN                          ,DEVICEEN" "Off,On"
textline "                                       "
bitfld.long 0x18 0. " JTAG_ENABLE                 ,JTAG_ENABLE" "Off,On"
if (((per.l(ad:0x0C360000+0x108))&0x8)==0x8)
group.long 0x10C++0x03
line.long 0x00 "RAMDUMP_CTL_STATUS_0,RAMDUMP_CTL_STATUS_0"
rbitfld.long 0x00 29.--31. " RAMDUMP_CSTATE              ,Current State of RAMDUMP FSM" "IDLE,CACHEFLUSH,DRAM_SELF_REFRESH,WAIT,WAIT_FOR_SW_ACK,DEBUG_RESET_ACK,ASSERT_CMD_HOLD_LOW,ASSERT_DPD"
bitfld.long 0x00 23. "   RAMDUMP_2ND_BOOT_COMPLETE         ,Software needs to set this bit before initiating DRAM dump to host PC" "Not set,Set"
textline "                                       "
bitfld.long 0x00 10. " RAMDUMP_STATUS_6            ,RAM-dump 6 Status" "Not set,Set"
bitfld.long 0x00 9. "               RAMDUMP_DEASSERT_DRAM_SEL_DPD_CMD ,Deassert sel_dpd_cmd triggered by software" "Not set,Set"
textline "                                       "
bitfld.long 0x00 8. " RAMDUMP_DEASSERT_DRAM_DPD   ,Deassert e-dpd and sel-dpd triggered by software" "Not set,Set"
rbitfld.long 0x00 7. "               DRAM_SELF_REFRESH_REQUEST_TIMEOUT ,DRAM could not be put in self refresh" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 6. " DRAM_IN_SELF_REFRESH        ,MC was able to successfully put DRAM into Self Refresh" "Not occurred,Occurred"
rbitfld.long 0x00 5. "          CCPLEX_CACHEFLUSH_REQUEST_TIMEOUT ,CCPLEX cache flush failed" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 4. " CCPLEX_CACHEFLUSH_DONE      ,CCPLEX cache flush successful" "In progress,Completed"
rbitfld.long 0x00 3. "           WDT_DFD_RST_ACK                   ,WDT_DFD_RST_ACK" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 2. " WDT_DFD_RST_REQ             ,WDT_DFD_RST_REQ" "Not occurred,Occurred"
textline "                                       "
bitfld.long 0x00 0. " RAMDUMP_EN                  ,RAM-dump enable" "Disabled,Enabled"
else
group.long 0x10C++0x03
line.long 0x00 "RAMDUMP_CTL_STATUS_0,RAMDUMP_CTL_STATUS_0"
rbitfld.long 0x00 29.--31. " RAMDUMP_CSTATE              ,Current State of RAMDUMP FSM" "IDLE,CACHEFLUSH,DRAM_SELF_REFRESH,WAIT,WAIT_FOR_SW_ACK,DEBUG_RESET_ACK,ASSERT_CMD_HOLD_LOW,ASSERT_DPD"
bitfld.long 0x00 23. "   RAMDUMP_2ND_BOOT_COMPLETE         ,Software needs to set this bit before initiating DRAM dump to host PC" "Not set,Set"
textline "                                       "
bitfld.long 0x00 10. " RAMDUMP_STATUS_6            ,RAM-dump 6 Status" "Not set,Set"
bitfld.long 0x00 9. "               RAMDUMP_DEASSERT_DRAM_SEL_DPD_CMD ,Deassert sel_dpd_cmd triggered by software" "Not set,Set"
textline "                                       "
bitfld.long 0x00 8. " RAMDUMP_DEASSERT_DRAM_DPD   ,Deassert e-dpd and sel-dpd triggered by software" "Not set,Set"
rbitfld.long 0x00 7. "               DRAM_SELF_REFRESH_REQUEST_TIMEOUT ,DRAM could not be put in self refresh" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 6. " DRAM_IN_SELF_REFRESH        ,MC was able to successfully put DRAM into Self Refresh" "Not occurred,Occurred"
rbitfld.long 0x00 5. "          CCPLEX_CACHEFLUSH_REQUEST_TIMEOUT ,CCPLEX cache flush failed" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 4. " CCPLEX_CACHEFLUSH_DONE      ,CCPLEX cache flush successful" "In progress,Completed"
rbitfld.long 0x00 3. "           WDT_DFD_RST_ACK                   ,WDT_DFD_RST_ACK" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 2. " WDT_DFD_RST_REQ             ,WDT_DFD_RST_REQ" "Not occurred,Occurred"
textline "                                       "
rbitfld.long 0x00 0. " RAMDUMP_EN                  ,RAM-dump enable" "Disabled,Enabled"
endif
group.long 0x110++0x13
line.long 0x00 "RAMDUMP_TIMEOUT_0,RAMDUMP_TIMEOUT_0"
line.long 0x04 "RST_REQ_CONFIG_0,RST_REQ_CONFIG_0"
bitfld.long 0x04 8. " RESET_OUT_POLARITY          ,Determine polarity of RESET_OUT_OB output from PMC" "ACTLO,?..."
rbitfld.long 0x04 5. "                 L2AOWDTRST_PMIC_SEQ_EN            ,Enables Sideband WDT_RESET_OUT for AOWDT DBG cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 4. " L2RST_PMIC_SEQ_EN           ,Enables Sideband WDT_RESET_OUT for WDT DBG cases" "Disabled,Enabled"
rbitfld.long 0x04 3. "              L1CRST_PMIC_SEQ_EN                ,Enables Sideband WDT_RESET_OUT for software reset cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 2. " L1BHSMRST_PMIC_SEQ_EN       ,Enables Sideband WDT_RESET_OUT for HSM reset cases" "Disabled,Enabled"
rbitfld.long 0x04 1. "              L1BAOWDTRST_PMIC_SEQ_EN           ,Enables Sideband WDT_RESET_OUT for AOWDT use cases" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x04 0. " L1BWDTRST_PMIC_SEQ_EN       ,Enables Sideband WDT_RESET_OUT for WDT use cases" "Disabled,Enabled"
line.long 0x08 "RST_REQ_CNTVAL_0,RST_REQ_CNTVAL_0"
hexmask.long.byte 0x08 24.--31. 1. " L2RST                       ,Number of pmc_clk (32K) cycles before L2 reset deassertion"
hexmask.long.byte 0x08 16.--23. 1. "                    L1CRST                            ,Number of pmc_clk (32K) cycles before L1c reset deassertion"
textline "                                       "
hexmask.long.byte 0x08 8.--15. 1. " L1BRST                      ,Number of pmc_clk (32K) cycles before L1b reset deassertion"
hexmask.long.byte 0x08 0.--7. 1. "                    L1ARST                            ,Number of pmc_clk (32K) cycles before L1a reset deassertion"
line.long 0x0C "DDR_CNTRL_0,DDR Control Register"
bitfld.long 0x0C 21. " VTTCDB_VDDA_E_REG           ,VTTCDB_VDDA_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 20. "              VTTLP_VDDA_E_REG                  ,VTTLP_VDDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 19. " DDR_RESET_DPD_IO            ,DPD_IO for Reset Pad - xm0" "No reset,Reset"
bitfld.long 0x0C 18. "              CMD_HOLD_LOW_BR11                 ,Cmd_hold_low for DDR brick11" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 17. " CMD_HOLD_LOW_BR10           ,Cmd_hold_low for DDR brick10" "Disabled,Enabled"
bitfld.long 0x0C 16. "              CMD_HOLD_LOW_BR9                  ,Cmd_hold_low for DDR brick9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 15. " CMD_HOLD_LOW_BR8            ,Cmd_hold_low for DDR brick8" "Disabled,Enabled"
bitfld.long 0x0C 14. "              CMD_HOLD_LOW_BR7                  ,Cmd_hold_low for DDR brick7" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 13. " CMD_HOLD_LOW_BR6            ,Cmd_hold_low for DDR brick6" "Disabled,Enabled"
bitfld.long 0x0C 12. "              CMD_HOLD_LOW_BR5                  ,Cmd_hold_low for DDR brick5" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 11. " CMD_HOLD_LOW_BR4            ,Cmd_hold_low for DDR brick4" "Disabled,Enabled"
bitfld.long 0x0C 10. "              CMD_HOLD_LOW_BR3                  ,Cmd_hold_low for DDR brick3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 9. " CMD_HOLD_LOW_BR2            ,Cmd_hold_low for DDR brick2" "Disabled,Enabled"
bitfld.long 0x0C 8. "              CMD_HOLD_LOW_BR1                  ,Cmd_hold_low for DDR brick1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 7. " CMD_HOLD_LOW_BR0            ,Cmd_hold_low for DDR brick0" "Disabled,Enabled"
bitfld.long 0x0C 5.--6. "              CMD_SEL_MODE                      ,CMD_SEL_MODE" "0,1,2,3"
textline "                                       "
bitfld.long 0x0C 4. " VTT_VCLAMP_E_REG            ,VTT_VCLAMP_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 3. "              VTT_VDA_E_REG                     ,VTT_VDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 2. " VTT_VAUXP_E_REG             ,VTT_VAUXP_E_REG" "Disabled,Enabled"
bitfld.long 0x0C 0.--1. "              DDR_DPD_IO                        ,Common DPD I/O for DDR pads, not needed, potential can tristate" "0,1,2,3"
line.long 0x10 "DDR_CNTRL_MEM1_0,DDR_CNTRL_MEM1_0"
bitfld.long 0x10 21. " VTTCDB_VDDA_E_REG           ,VTTCDB_VDDA_E_REG" "Disabled,Enabled"
bitfld.long 0x10 20. "              VTTLP_VDDA_E_REG                  ,VTTLP_VDDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 19. " DDR_RESET_DPD_IO            ,DPD_IO for Reset Pad - xm1" "No reset,Reset"
bitfld.long 0x10 18. "              CMD_HOLD_LOW_BR11                 ,Cmd_hold_low for DDR brick11" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 17. " CMD_HOLD_LOW_BR10           ,Cmd_hold_low for DDR brick10" "Disabled,Enabled"
bitfld.long 0x10 16. "              CMD_HOLD_LOW_BR9                  ,Cmd_hold_low for DDR brick9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 15. " CMD_HOLD_LOW_BR8            ,Cmd_hold_low for DDR brick8" "Disabled,Enabled"
bitfld.long 0x10 14. "              CMD_HOLD_LOW_BR7                  ,Cmd_hold_low for DDR brick7" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 13. " CMD_HOLD_LOW_BR6            ,Cmd_hold_low for DDR brick6" "Disabled,Enabled"
bitfld.long 0x10 12. "              CMD_HOLD_LOW_BR5                  ,Cmd_hold_low for DDR brick5" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 11. " CMD_HOLD_LOW_BR4            ,Cmd_hold_low for DDR brick4" "Disabled,Enabled"
bitfld.long 0x10 10. "              CMD_HOLD_LOW_BR3                  ,Cmd_hold_low for DDR brick3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 9. " CMD_HOLD_LOW_BR2            ,Cmd_hold_low for DDR brick2" "Disabled,Enabled"
bitfld.long 0x10 8. "              CMD_HOLD_LOW_BR1                  ,Cmd_hold_low for DDR brick1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 7. " CMD_HOLD_LOW_BR0            ,Cmd_hold_low for DDR brick0" "Disabled,Enabled"
bitfld.long 0x10 5.--6. "              CMD_SEL_MODE                      ,CMD_SEL_MODE" "0,1,2,3"
textline "                                       "
bitfld.long 0x10 4. " VTT_VCLAMP_E_REG            ,VTT_VCLAMP_E_REG" "Disabled,Enabled"
bitfld.long 0x10 3. "              VTT_VDA_E_REG                     ,VTT_VDA_E_REG" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x10 2. " VTT_VAUXP_E_REG             ,VTT_VAUXP_E_REG" "Disabled,Enabled"
bitfld.long 0x10 0.--1. "              DDR_DPD_IO                        ,Common DPD I/O for DDR pads, not needed, potential can tristate" "0,1,2,3"
group.long 0x1D4++0x2F
line.long 0x00 "VFMON_ACTION_0,VFMON_ACTION_0"
bitfld.long 0x00 12.--13. " VRAIL_4_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 10.--11. "                  VRAIL_3_FAULT_ACTION              ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 8.--9. " VRAIL_2_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 6.--7. "                  VRAIL_1_FAULT_ACTION              ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 4.--5. " VRAIL_0_FAULT_ACTION        ,Action triggered by FV Monitor due to Vrail_0 fault" "None,INTR,RST,?..."
bitfld.long 0x00 2.--3. "                  F32K_FAULT_ACTION                 ,Action triggered by FV Monitor due to 32K Clock Variation" "None,INTR,RST,?..."
textline "                                       "
bitfld.long 0x00 0.--1. " FOSC_FAULT_ACTION           ,Action triggered by FV Monitor due to OSC Clock Variation" "None,INTR,RST,?..."
line.long 0x04 "VFMON_INT_STATUS_0,VFMON_INT_STATUS_0"
eventfld.long 0x04 6. " VRAIL_4_FAULT               ,VRAIL_4_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 5. "          VRAIL_3_FAULT                     ,VRAIL_3_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 4. " VRAIL_2_FAULT               ,VRAIL_2_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 3. "          VRAIL_1_FAULT                     ,VRAIL_1_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 2. " VRAIL_0_FAULT               ,VRAIL_0_FAULT" "No interrupt,Interrupt"
eventfld.long 0x04 1. "          F32K_FAULT                        ,F32K_FAULT" "No interrupt,Interrupt"
textline "                                       "
eventfld.long 0x04 0. " FOSC_FAULT                  ,FOSC_FAULT" "No interrupt,Interrupt"
line.long 0x08 "VFMON_INT_MASK_0,VFMON_INT_MASK_0"
bitfld.long 0x08 6. " VRAIL_4_FAULT               ,Whether VRAIL_4_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 5. "            VRAIL_3_FAULT                     ,Whether VRAIL_3_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 4. " VRAIL_2_FAULT               ,Whether VRAIL_2_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 3. "            VRAIL_1_FAULT                     ,Whether VRAIL_1_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 2. " VRAIL_0_FAULT               ,Whether VRAIL_0_FAULT causes an interrupt or not" "Not masked,Masked"
bitfld.long 0x08 1. "            F32K_FAULT                        ,Whether F32K_FAULT causes an interrupt or not" "Not masked,Masked"
textline "                                       "
bitfld.long 0x08 0. " FOSC_FAULT                  ,Whether FOSC_FAULT causes an interrupt or not" "Not masked,Masked"
line.long 0x0C "VFMON_CONFIG_0,VFMON_CONFIG_0"
bitfld.long 0x0C 24.--29. " CLOCK_MON_TMAX              ,Maximum Threshold of RO clock cycles within divided OSC clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 18.--23. "                    CLOCK_MON_TMIN                    ,Minimum Threshold of RO clock cycles within divided OSC clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                       "
bitfld.long 0x0C 14.--17. " OSC_CLK_DIV                 ,OSC clock divider value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x0C 4.--13. 1. "                    COMP_PERIOD_COUNT                 ,Periodicity of clock monitoring, when Periodic Monitoring is enabled"
textline "                                       "
bitfld.long 0x0C 2. " CLOCK_MONITOR_MODE          ,CLOCK_MONITOR mode" "CONT,PERIODIC"
bitfld.long 0x0C 1. "              CLK32_MONITOR_EN                  ,Whether 32 KHz clock monitoring is enabled or disabled" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 0. " CLOCK_MONITOR_EN            ,Whether clock monitoring is enabled or disabled" "Disabled,Enabled"
line.long 0x10 "VFMON_OSC_TIMING_0,VFMON_OSC_TIMING_0"
hexmask.long.byte 0x10 16.--23. 1. " TEN_COUNT                   ,Delay from asserting EN to the point of using the OSC cell output"
hexmask.long.word 0x10 0.--8. 1. "                    TIDDQ_EN                          ,Delay from exiting IDDQ to enabling the OSC cell, specified in terms of XTAL cycles"
line.long 0x14 "VFMON_CLK32_THRESHOLD_0,VFMON_CLK32_THRESHOLD_0"
hexmask.long.word 0x14 16.--26. 1. " CLK32_MON_TMAX              ,Maximum XTAL clock cycles expected to be contained in one 32 KHz clock period"
hexmask.long.word 0x14 0.--10. 1. "                  CLK32_MON_TMIN                    ,Minimum XTAL clock cycles expected to be contained in one 32 KHz clock period"
line.long 0x18 "POWER_GATE_TIMERS_0,POWER_GATE_TIMERS_0"
hexmask.long.byte 0x18 8.--15. 1. " TFORCE2ZONE                 ,TFORCE2ZONE"
hexmask.long.byte 0x18 0.--7. 1. "                    TZONE2FORCE                       ,TZONE2FORCE"
line.long 0x1C "LOGIC_ZONE_DELAY_0,LOGIC_ZONE_DELAY_0"
bitfld.long 0x1C 28.--31. " LZONE_TIMER7                ,LZONE_TIMER7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 24.--27. "                    LZONE_TIMER6                      ,LZONE_TIMER6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 20.--23. " LZONE_TIMER5                ,LZONE_TIMER5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 16.--19. "                    LZONE_TIMER4                      ,LZONE_TIMER4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 12.--15. " LZONE_TIMER3                ,LZONE_TIMER3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 8.--11. "                    LZONE_TIMER2                      ,LZONE_TIMER2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x1C 4.--7. " LZONE_TIMER1                ,LZONE_TIMER1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 0.--3. "                    LZONE_TIMER0                      ,LZONE_TIMER0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "SRAM_ZONE_DELAY_0,SRAM_ZONE_DELAY_0"
bitfld.long 0x20 28.--31. " SZONE_TIMER7                ,SZONE_TIMER7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 24.--27. "                    SZONE_TIMER6                      ,SZONE_TIMER6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 20.--23. " SZONE_TIMER5                ,SZONE_TIMER5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 16.--19. "                    SZONE_TIMER4                      ,SZONE_TIMER4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 12.--15. " SZONE_TIMER3                ,SZONE_TIMER3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 8.--11. "                    SZONE_TIMER2                      ,SZONE_TIMER2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x20 4.--7. " SZONE_TIMER1                ,SZONE_TIMER1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 0.--3. "                    SZONE_TIMER0                      ,SZONE_TIMER0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x24 "ZONE_CONFIG_0,ZONE_CONFIG_0"
bitfld.long 0x24 3. " SRAM_DSLP_ZONE_EN           ,SRAM_DSLP_ZONE_EN" "Disabled,Enabled"
bitfld.long 0x24 2. "              SRAM_SLP_ZONE_EN                  ,SRAM_SLP_ZONE_EN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x24 1. " SRAM_SD_ZONE_EN             ,SRAM_SD_ZONE_EN" "Disabled,Enabled"
bitfld.long 0x24 0. "              LOGIC_SLEEP_ZONE_EN               ,LOGIC_SLEEP_ZONE_EN" "Disabled,Enabled"
line.long 0x28 "INTER_PARTITION_PG_DELAY_0,INTER_PARTITION_PG_DELAY_0"
hexmask.long.byte 0x28 0.--7. 1. " INTER_PART_DELAY            ,INTER_PART_DELAY"
line.long 0x2C "AO_PG_TIMERS_0,AO_PG_TIMERS_0"
hexmask.long.byte 0x2C 8.--15. 1. " SLEEP2CLAMP_DELAY           ,SLEEP2CLAMP_DELAY"
hexmask.long.byte 0x2C 0.--7. 1. "                    CLAMP2SLEEP_DELAY                 ,CLAMP2SLEEP_DELAY"
rgroup.long 0x204++0x03
line.long 0x00 "PG_STATUS_0,PG_STATUS_0"
bitfld.long 0x00 3. " PENDING_SC7_REMOVE_SD_START ,Indicates that SC7 RAM SD deassertion in progress" "Done,Pending"
bitfld.long 0x00 2. "               PENDING_SC7_ASSERT_SD_START       ,Indicates that SC7 RAM SD assertion in progress" "Done,Pending"
textline "                                       "
bitfld.long 0x00 1. " PENDING_RESET_SD_START      ,Indicates that reset deassertion of all RAM SDs in progress - will be high at Power on Reset" "Done,Pending"
bitfld.long 0x00 0. "               PENDING_START                     ,Indicates whether there is any pending start bit for any of the partitions - for the PG FSM (for software requests only)" "Done,Pending"
textline "                                                  "
width 41.
group.long 0x208++0x03
line.long 0x00 "PART_AUD_POWER_GATE_CONTROL_0,PART_AUD_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x208+0x04)++0x03
line.long 0x00 "PART_AUD_POWER_GATE_STATUS_0,PART_AUD_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x208+0x08)++0x03
line.long 0x00 "PART_AUD_CLAMP_CONTROL_0,PART_AUD_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x214++0x03
line.long 0x00 "PART_DFD_POWER_GATE_CONTROL_0,PART_DFD_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x214+0x04)++0x03
line.long 0x00 "PART_DFD_POWER_GATE_STATUS_0,PART_DFD_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x214+0x08)++0x03
line.long 0x00 "PART_DFD_CLAMP_CONTROL_0,PART_DFD_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x220++0x03
line.long 0x00 "PART_DISP_POWER_GATE_CONTROL_0,PART_DISP_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x220+0x04)++0x03
line.long 0x00 "PART_DISP_POWER_GATE_STATUS_0,PART_DISP_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x220+0x08)++0x03
line.long 0x00 "PART_DISP_CLAMP_CONTROL_0,PART_DISP_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x22C++0x03
line.long 0x00 "PART_DISPB_POWER_GATE_CONTROL_0,PART_DISPB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x22C+0x04)++0x03
line.long 0x00 "PART_DISPB_POWER_GATE_STATUS_0,PART_DISPB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x22C+0x08)++0x03
line.long 0x00 "PART_DISPB_CLAMP_CONTROL_0,PART_DISPB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x238++0x03
line.long 0x00 "PART_DISPC_POWER_GATE_CONTROL_0,PART_DISPC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x238+0x04)++0x03
line.long 0x00 "PART_DISPC_POWER_GATE_STATUS_0,PART_DISPC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x238+0x08)++0x03
line.long 0x00 "PART_DISPC_CLAMP_CONTROL_0,PART_DISPC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x244++0x03
line.long 0x00 "PART_ISPA_POWER_GATE_CONTROL_0,PART_ISPA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x244+0x04)++0x03
line.long 0x00 "PART_ISPA_POWER_GATE_STATUS_0,PART_ISPA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x244+0x08)++0x03
line.long 0x00 "PART_ISPA_CLAMP_CONTROL_0,PART_ISPA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x250++0x03
line.long 0x00 "PART_NVDEC_POWER_GATE_CONTROL_0,PART_NVDEC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x250+0x04)++0x03
line.long 0x00 "PART_NVDEC_POWER_GATE_STATUS_0,PART_NVDEC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x250+0x08)++0x03
line.long 0x00 "PART_NVDEC_CLAMP_CONTROL_0,PART_NVDEC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x25C++0x03
line.long 0x00 "PART_NVJPG_POWER_GATE_CONTROL_0,PART_NVJPG_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x25C+0x04)++0x03
line.long 0x00 "PART_NVJPG_POWER_GATE_STATUS_0,PART_NVJPG_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x25C+0x08)++0x03
line.long 0x00 "PART_NVJPG_CLAMP_CONTROL_0,PART_NVJPG_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x268++0x03
line.long 0x00 "PART_MPE_POWER_GATE_CONTROL_0,PART_MPE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x268+0x04)++0x03
line.long 0x00 "PART_MPE_POWER_GATE_STATUS_0,PART_MPE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x268+0x08)++0x03
line.long 0x00 "PART_MPE_CLAMP_CONTROL_0,PART_MPE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x274++0x03
line.long 0x00 "PART_PCX_POWER_GATE_CONTROL_0,PART_PCX_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x274+0x04)++0x03
line.long 0x00 "PART_PCX_POWER_GATE_STATUS_0,PART_PCX_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x274+0x08)++0x03
line.long 0x00 "PART_PCX_CLAMP_CONTROL_0,PART_PCX_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x280++0x03
line.long 0x00 "PART_SAX_POWER_GATE_CONTROL_0,PART_SAX_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x280+0x04)++0x03
line.long 0x00 "PART_SAX_POWER_GATE_STATUS_0,PART_SAX_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x280+0x08)++0x03
line.long 0x00 "PART_SAX_CLAMP_CONTROL_0,PART_SAX_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x28C++0x03
line.long 0x00 "PART_VE_POWER_GATE_CONTROL_0,PART_VE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x28C+0x04)++0x03
line.long 0x00 "PART_VE_POWER_GATE_STATUS_0,PART_VE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x28C+0x08)++0x03
line.long 0x00 "PART_VE_CLAMP_CONTROL_0,PART_VE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x298++0x03
line.long 0x00 "PART_VIC_POWER_GATE_CONTROL_0,PART_VIC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x298+0x04)++0x03
line.long 0x00 "PART_VIC_POWER_GATE_STATUS_0,PART_VIC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x298+0x08)++0x03
line.long 0x00 "PART_VIC_CLAMP_CONTROL_0,PART_VIC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "PART_XUSBA_POWER_GATE_CONTROL_0,PART_XUSBA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2A4+0x04)++0x03
line.long 0x00 "PART_XUSBA_POWER_GATE_STATUS_0,PART_XUSBA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2A4+0x08)++0x03
line.long 0x00 "PART_XUSBA_CLAMP_CONTROL_0,PART_XUSBA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2B0++0x03
line.long 0x00 "PART_XUSBB_POWER_GATE_CONTROL_0,PART_XUSBB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2B0+0x04)++0x03
line.long 0x00 "PART_XUSBB_POWER_GATE_STATUS_0,PART_XUSBB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2B0+0x08)++0x03
line.long 0x00 "PART_XUSBB_CLAMP_CONTROL_0,PART_XUSBB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "PART_XUSBC_POWER_GATE_CONTROL_0,PART_XUSBC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2BC+0x04)++0x03
line.long 0x00 "PART_XUSBC_POWER_GATE_STATUS_0,PART_XUSBC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2BC+0x08)++0x03
line.long 0x00 "PART_XUSBC_CLAMP_CONTROL_0,PART_XUSBC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2C8++0x03
line.long 0x00 "PART_SCRATCH_POWER_GATE_CONTROL_0,PART_SCRATCH_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2C8+0x04)++0x03
line.long 0x00 "PART_SCRATCH_POWER_GATE_STATUS_0,PART_SCRATCH_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2C8+0x08)++0x03
line.long 0x00 "PART_SCRATCH_CLAMP_CONTROL_0,PART_SCRATCH_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2D4++0x03
line.long 0x00 "PART_AONPG_POWER_GATE_CONTROL_0,PART_AONPG_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2D4+0x04)++0x03
line.long 0x00 "PART_AONPG_POWER_GATE_STATUS_0,PART_AONPG_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2D4+0x08)++0x03
line.long 0x00 "PART_AONPG_CLAMP_CONTROL_0,PART_AONPG_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2E0++0x03
line.long 0x00 "PART_CAR_POWER_GATE_CONTROL_0,PART_CAR_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2E0+0x04)++0x03
line.long 0x00 "PART_CAR_POWER_GATE_STATUS_0,PART_CAR_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2E0+0x08)++0x03
line.long 0x00 "PART_CAR_CLAMP_CONTROL_0,PART_CAR_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2EC++0x03
line.long 0x00 "PART_EMCA_POWER_GATE_CONTROL_0,PART_EMCA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2EC+0x04)++0x03
line.long 0x00 "PART_EMCA_POWER_GATE_STATUS_0,PART_EMCA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2EC+0x08)++0x03
line.long 0x00 "PART_EMCA_CLAMP_CONTROL_0,PART_EMCA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x2F8++0x03
line.long 0x00 "PART_EMCB_POWER_GATE_CONTROL_0,PART_EMCB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x2F8+0x04)++0x03
line.long 0x00 "PART_EMCB_POWER_GATE_STATUS_0,PART_EMCB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x2F8+0x08)++0x03
line.long 0x00 "PART_EMCB_CLAMP_CONTROL_0,PART_EMCB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x304++0x03
line.long 0x00 "PART_HOST_POWER_GATE_CONTROL_0,PART_HOST_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x304+0x04)++0x03
line.long 0x00 "PART_HOST_POWER_GATE_STATUS_0,PART_HOST_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x304+0x08)++0x03
line.long 0x00 "PART_HOST_CLAMP_CONTROL_0,PART_HOST_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x310++0x03
line.long 0x00 "PART_MCA_POWER_GATE_CONTROL_0,PART_MCA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x310+0x04)++0x03
line.long 0x00 "PART_MCA_POWER_GATE_STATUS_0,PART_MCA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x310+0x08)++0x03
line.long 0x00 "PART_MCA_CLAMP_CONTROL_0,PART_MCA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x31C++0x03
line.long 0x00 "PART_MCB_POWER_GATE_CONTROL_0,PART_MCB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x31C+0x04)++0x03
line.long 0x00 "PART_MCB_POWER_GATE_STATUS_0,PART_MCB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x31C+0x08)++0x03
line.long 0x00 "PART_MCB_CLAMP_CONTROL_0,PART_MCB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x328++0x03
line.long 0x00 "PART_MCHA_POWER_GATE_CONTROL_0,PART_MCHA_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x328+0x04)++0x03
line.long 0x00 "PART_MCHA_POWER_GATE_STATUS_0,PART_MCHA_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x328+0x08)++0x03
line.long 0x00 "PART_MCHA_CLAMP_CONTROL_0,PART_MCHA_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x334++0x03
line.long 0x00 "PART_MCHB_POWER_GATE_CONTROL_0,PART_MCHB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x334+0x04)++0x03
line.long 0x00 "PART_MCHB_POWER_GATE_STATUS_0,PART_MCHB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x334+0x08)++0x03
line.long 0x00 "PART_MCHB_CLAMP_CONTROL_0,PART_MCHB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x340++0x03
line.long 0x00 "PART_MCHBB_POWER_GATE_CONTROL_0,PART_MCHBB_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x340+0x04)++0x03
line.long 0x00 "PART_MCHBB_POWER_GATE_STATUS_0,PART_MCHBB_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x340+0x08)++0x03
line.long 0x00 "PART_MCHBB_CLAMP_CONTROL_0,PART_MCHBB_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x34C++0x03
line.long 0x00 "PART_NIC_POWER_GATE_CONTROL_0,PART_NIC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x34C+0x04)++0x03
line.long 0x00 "PART_NIC_POWER_GATE_STATUS_0,PART_NIC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x34C+0x08)++0x03
line.long 0x00 "PART_NIC_CLAMP_CONTROL_0,PART_NIC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x358++0x03
line.long 0x00 "PART_SEC_POWER_GATE_CONTROL_0,PART_SEC_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x358+0x04)++0x03
line.long 0x00 "PART_SEC_POWER_GATE_STATUS_0,PART_SEC_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x358+0x08)++0x03
line.long 0x00 "PART_SEC_CLAMP_CONTROL_0,PART_SEC_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x364++0x03
line.long 0x00 "PART_UFS_POWER_GATE_CONTROL_0,PART_UFS_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x364+0x04)++0x03
line.long 0x00 "PART_UFS_POWER_GATE_STATUS_0,PART_UFS_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x364+0x08)++0x03
line.long 0x00 "PART_UFS_CLAMP_CONTROL_0,PART_UFS_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x370++0x03
line.long 0x00 "PART_BPMP_POWER_GATE_CONTROL_0,PART_BPMP_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x370+0x04)++0x03
line.long 0x00 "PART_BPMP_POWER_GATE_STATUS_0,PART_BPMP_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x370+0x08)++0x03
line.long 0x00 "PART_BPMP_CLAMP_CONTROL_0,PART_BPMP_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x37C++0x03
line.long 0x00 "PART_SCE_POWER_GATE_CONTROL_0,PART_SCE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x37C+0x04)++0x03
line.long 0x00 "PART_SCE_POWER_GATE_STATUS_0,PART_SCE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x37C+0x08)++0x03
line.long 0x00 "PART_SCE_CLAMP_CONTROL_0,PART_SCE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x388++0x03
line.long 0x00 "PART_AOPG_TCM0_POWER_GATE_CONTROL_0,PART_AOPG_TCM0_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x388+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM0_POWER_GATE_STATUS_0,PART_AOPG_TCM0_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x388+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM0_CLAMP_CONTROL_0,PART_AOPG_TCM0_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x394++0x03
line.long 0x00 "PART_AOPG_TCM1_POWER_GATE_CONTROL_0,PART_AOPG_TCM1_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x394+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM1_POWER_GATE_STATUS_0,PART_AOPG_TCM1_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x394+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM1_CLAMP_CONTROL_0,PART_AOPG_TCM1_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3A0++0x03
line.long 0x00 "PART_AOPG_TCM2_POWER_GATE_CONTROL_0,PART_AOPG_TCM2_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3A0+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM2_POWER_GATE_STATUS_0,PART_AOPG_TCM2_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3A0+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM2_CLAMP_CONTROL_0,PART_AOPG_TCM2_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3AC++0x03
line.long 0x00 "PART_AOPG_TCM3_POWER_GATE_CONTROL_0,PART_AOPG_TCM3_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3AC+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM3_POWER_GATE_STATUS_0,PART_AOPG_TCM3_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3AC+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM3_CLAMP_CONTROL_0,PART_AOPG_TCM3_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3B8++0x03
line.long 0x00 "PART_AOPG_TCM4_POWER_GATE_CONTROL_0,PART_AOPG_TCM4_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3B8+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM4_POWER_GATE_STATUS_0,PART_AOPG_TCM4_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3B8+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM4_CLAMP_CONTROL_0,PART_AOPG_TCM4_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3C4++0x03
line.long 0x00 "PART_AOPG_TCM5_POWER_GATE_CONTROL_0,PART_AOPG_TCM5_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3C4+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM5_POWER_GATE_STATUS_0,PART_AOPG_TCM5_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3C4+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM5_CLAMP_CONTROL_0,PART_AOPG_TCM5_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3D0++0x03
line.long 0x00 "PART_AOPG_TCM6_POWER_GATE_CONTROL_0,PART_AOPG_TCM6_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3D0+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM6_POWER_GATE_STATUS_0,PART_AOPG_TCM6_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3D0+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM6_CLAMP_CONTROL_0,PART_AOPG_TCM6_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3DC++0x03
line.long 0x00 "PART_AOPG_TCM7_POWER_GATE_CONTROL_0,PART_AOPG_TCM7_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3DC+0x04)++0x03
line.long 0x00 "PART_AOPG_TCM7_POWER_GATE_STATUS_0,PART_AOPG_TCM7_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3DC+0x08)++0x03
line.long 0x00 "PART_AOPG_TCM7_CLAMP_CONTROL_0,PART_AOPG_TCM7_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3E8++0x03
line.long 0x00 "PART_AOPG_CACHE_POWER_GATE_CONTROL_0,PART_AOPG_CACHE_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3E8+0x04)++0x03
line.long 0x00 "PART_AOPG_CACHE_POWER_GATE_STATUS_0,PART_AOPG_CACHE_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3E8+0x08)++0x03
line.long 0x00 "PART_AOPG_CACHE_CLAMP_CONTROL_0,PART_AOPG_CACHE_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x3F4++0x03
line.long 0x00 "PART_AOPG_CAN0_POWER_GATE_CONTROL_0,PART_AOPG_CAN0_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x3F4+0x04)++0x03
line.long 0x00 "PART_AOPG_CAN0_POWER_GATE_STATUS_0,PART_AOPG_CAN0_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x3F4+0x08)++0x03
line.long 0x00 "PART_AOPG_CAN0_CLAMP_CONTROL_0,PART_AOPG_CAN0_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
group.long 0x400++0x03
line.long 0x00 "PART_AOPG_CAN1_POWER_GATE_CONTROL_0,PART_AOPG_CAN1_POWER_GATE_CONTROL_0"
bitfld.long 0x00 31. " INTER_PART_DELAY_EN ,INTER_PART_DELAY_EN" "Disabled,Enabled"
bitfld.long 0x00 8. "  START        ,START" "Done,Pending"
bitfld.long 0x00 3. "  SRAM_DSLP   ,SRAM_DSLP" "Off,On"
bitfld.long 0x00 2. "  SRAM_SLP        ,SRAM_SLP" "Off,On"
textline "                                                  "
bitfld.long 0x00 1. " SRAM_SD             ,SRAM_SD" "Off,On"
bitfld.long 0x00 0. "       LOGIC_SLEEP  ,LOGIC_SLEEP" "Off,On"
rgroup.long (0x400+0x04)++0x03
line.long 0x00 "PART_AOPG_CAN1_POWER_GATE_STATUS_0,PART_AOPG_CAN1_POWER_GATE_STATUS_0"
bitfld.long 0x00 3. " SRAM_DSLP_STS       ,SRAM_DSLP_STS" "Off,On"
bitfld.long 0x00 2. "       SRAM_SLP_STS ,SRAM_SLP_STS" "Off,On"
bitfld.long 0x00 1. "      SRAM_SD_STS ,SRAM_SD_STS" "Off,On"
bitfld.long 0x00 0. "  LOGIC_SLEEP_STS ,LOGIC_SLEEP_STS" "Off,On"
group.long (0x400+0x08)++0x03
line.long 0x00 "PART_AOPG_CAN1_CLAMP_CONTROL_0,PART_AOPG_CAN1_CLAMP_CONTROL_0"
bitfld.long 0x00 0. " CLAMP               ,CLAMP" "Disabled,Enabled"
textline "                                       "
width 30.
group.long 0x40C++0x0B
line.long 0x00 "PMC2LIC_INTR_STATUS_0,PMC2LIC_INTR_STATUS_0"
eventfld.long 0x00 1. " ILLEGAL_SRAM_LOGIC_POWER_STATE ,ILLEGAL_SRAM_LOGIC_POWER_STATE" "Not illegal,Illegal"
eventfld.long 0x00 0. "                   UNSUPPORTED_PG_REQUEST ,UNSUPPORTED_PG_REQUEST" "Not requested,Requested"
line.long 0x04 "PMC2LIC_INTR_ENABLE_0,PMC2LIC_INTR_ENABLE_0"
bitfld.long 0x04 1. " ILLEGAL_SRAM_LOGIC_POWER_STATE ,ENABLE bit for this interrupt source" "Disabled,Enabled"
bitfld.long 0x04 0. "                      UNSUPPORTED_PG_REQUEST ,ENABLE bit for this interrupt source" "Disabled,Enabled"
line.long 0x08 "AOVC_LOCK_CNTRL_0,AOVC_LOCK_CNTRL_0"
bitfld.long 0x08 6. " SW_LOCK_REQ                    ,Software can write to this register to request the LOCK_ID to be updated to SW_LOCK_REQ_ID" "Not requested,Requested"
bitfld.long 0x08 4.--5. "                 SW_LOCK_REQ_ID         ,Software can write to this register to request the LOCK_ID to be assigned to a particular master or free it up to NONE and then write to SW_LOCK_REQ" "Free,AOVC,APB_PWR_I2C,Illegal"
textline "                                       "
bitfld.long 0x08 0. " RELEASE                        ,RELEASE" "Not released,Released"
rgroup.long 0x418++0x03
line.long 0x00 "AOVC_LOCK_ID_STATUS_0,AOVC_LOCK_ID_STATUS_0"
bitfld.long 0x00 0.--1. " DATA                           ,DATA" "Free/None,AOVC(TXNGEN),APB_PWR_I2C(CVC or software),Illegal"
group.long 0x41C++0x03
line.long 0x00 "TEST_CLK_MUX_SEL_0,TEST_CLK_MUX_SEL_0"
bitfld.long 0x00 0. " SEL                            ,Mode for TSOSC selected" "Disabled,Enabled"
rgroup.long 0x420++0x07
line.long 0x00 "DPD_FSM_STATUS_0,DPD_FSM_STATUS_0"
bitfld.long 0x00 21.--23. " DPD8_CSTATE                    ,DPD8_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 18.--20. "                 DPD7_CSTATE            ,DPD7_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 15.--17. " DPD6_CSTATE                    ,DPD6_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 12.--14. "                 DPD5_CSTATE            ,DPD5_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 9.--11. " DPD4_CSTATE                    ,DPD4_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 6.--8. "                 DPD3_CSTATE            ,DPD3_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
textline "                                       "
bitfld.long 0x00 3.--5. " DPD2_CSTATE                    ,DPD2_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
bitfld.long 0x00 0.--2. "                 DPD1_CSTATE            ,DPD1_CSTATE" "Idle,ASSERT_WAIT,ASSERT,DEASSERT_WAIT,DEASSERT,?..."
line.long 0x04 "SC7_FSM_STATUS_0,SC7_FSM_STATUS_0"
bitfld.long 0x04 18. " SC7_WAIT_DPD_DIS               ,SC7_WAIT_DPD_DIS" "No,Yes"
bitfld.long 0x04 17. "                           SC7_REMOVE_SD          ,SC7_REMOVE_SD" "No,Yes"
textline "                                       "
bitfld.long 0x04 16. " SC7_REMOVE_RESET               ,SC7_REMOVE_RESET" "No,Yes"
bitfld.long 0x04 15. "                           SC7_REMOVE_SEL         ,SC7_REMOVE_SEL" "No,Yes"
textline "                                       "
bitfld.long 0x04 14. " SC7_REMOVE_E                   ,SC7_REMOVE_E" "No,Yes"
bitfld.long 0x04 13. "                           SC7_REMOVE_CLAMP       ,SC7_REMOVE_CLAMP" "No,Yes"
textline "                                       "
bitfld.long 0x04 12. " SC7_PWR_ON                     ,SC7_PWR_ON" "No,Yes"
bitfld.long 0x04 11. "                           SC7_ALLOW_AOUPG        ,SC7_ALLOW_AOUPG" "No,Yes"
textline "                                       "
bitfld.long 0x04 10. " SC7_OSC_ON                     ,SC7_OSC_ON" "No,Yes"
bitfld.long 0x04 9. "                           SC7_WAIT_FOR_RET       ,SC7_WAIT_FOR_RET" "No,Yes"
textline "                                       "
bitfld.long 0x04 8. " SC7_OSC_OFF                    ,SC7_OSC_OFF" "No,Yes"
bitfld.long 0x04 7. "                           SC7_ALLOW_AOPG         ,SC7_ALLOW_AOPG" "No,Yes"
textline "                                       "
bitfld.long 0x04 6. " SC7_PWR_OFF                    ,SC7_PWR_OFF" "No,Yes"
bitfld.long 0x04 5. "                           SC7_MAIN_CLAMP         ,SC7_MAIN_CLAMP" "No,Yes"
textline "                                       "
bitfld.long 0x04 4. " SC7_EARLY_CLAMP                ,SC7_EARLY_CLAMP" "No,Yes"
bitfld.long 0x04 3. "                           SC7_ASSERT_E           ,SC7_ASSERT_E" "No,Yes"
textline "                                       "
bitfld.long 0x04 2. " SC7_ASSERT_SEL                 ,SC7_ASSERT_SEL" "No,Yes"
bitfld.long 0x04 1. "                           SC7_ASSERT_SD          ,SC7_ASSERT_SD" "No,Yes"
textline "                                       "
bitfld.long 0x04 0. " SC7_IDLE                       ,SC7_IDLE" "No,Yes"
width 0x0B
tree.end
tree.end
tree "Real-Time Clock"
base ad:0x0C2A0000
width 19.
group.long 0x00++0x03
line.long 0x00 "RTC2_RTCCR_0,RTC Control Register"
bitfld.long 0x00 0. " HDBG                      ,Halt-on-debug" "Not asserted,Asserted"
rgroup.long 0x04++0x03
line.long 0x00 "RTC2_RTCBR_0,RTC Busy Register"
bitfld.long 0x00 0. " STATUS                    ,Idle and busy status" "Idle,Busy"
group.long 0x08++0x03
line.long 0x00 "RTC2_RTCSCR_0,RTC Seconds Counter Register"
rgroup.long 0x0C++0x07
line.long 0x00 "RTC2_RTCSSCR_0,RTC Shadowed Seconds Counter Register"
line.long 0x04 "RTC2_RTCMCR_0,RTC Milliseconds Counter Register"
hexmask.long.word 0x04 0.--9. 1. " MILLI_SECONDS             ,Milliseconds counter increments using Bresenham algorithm"
group.long 0x14++0x1B
line.long 0x00 "RTC2_RTCSAR0_0,RTC Seconds Alarm0 Registers"
line.long 0x04 "RTC2_RTCSAR1_0,RTC Seconds Alarm1 Registers"
line.long 0x08 "RTC2_RTCMAR_0,RTC Milliseconds Alarm Register"
hexmask.long.word 0x08 0.--9. 1. " VALUE                     ,Milliseconds match value"
line.long 0x0C "RTC2_RTCSCAR_0,RTC Second Countdown Alarm Register"
bitfld.long 0x0C 31. " ENABLE                    ,Enable bit for the countdown operation" "Disabled,Enabled"
bitfld.long 0x0C 30. "      PERIODIC                ,Internal counter is automatically reloaded after reaching 0" "Disabled,Enabled"
hexmask.long 0x0C 0.--29. 1. "      PTV                  ,Timer present trigger value"
line.long 0x10 "RTC2_RTCMCAR_0,RTC Millisecond Countdown Alarm Register"
bitfld.long 0x10 31. " ENABLE                    ,Enable bit for the countdown operation" "Disabled,Enabled"
bitfld.long 0x10 30. "      PERIODIC                ,Internal counter is automatically reloaded after reaching 0" "Disabled,Enabled"
hexmask.long 0x10 0.--29. 1. "      PTV                  ,Timer present trigger value"
line.long 0x14 "RTC2_RTCIER_0,RTC Interrupt Enable Register"
bitfld.long 0x14 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt" "Disabled,Enabled"
bitfld.long 0x14 3. "      SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt" "Disabled,Enabled"
bitfld.long 0x14 2. "      MSEC_ALARM           ,MSEC_ALARM interrupt" "Disabled,Enabled"
textline "                            "
bitfld.long 0x14 0.--1. " SEC_ALARM                 ,SEC_ALARM interrupt" "0,1,2,3"
line.long 0x18 "RTC2_RTCISR_0,RTC Interrupt Status Register"
eventfld.long 0x18 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 3. "  SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 2. "  MSEC_ALARM           ,MSEC_ALARM interrupt condition" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x18 1. " SEC_ALARM                 ,SEC_ALARM interrupt condition" "No interrupt,Interrupt"
eventfld.long 0x18 0. "  SEC_ALARM               ,SEC_ALARM interrupt condition" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "RTC2_RTCIVR_0,RTC Interrupt Valid Register"
bitfld.long 0x00 4. " MSEC_CDN_ALARM            ,MSEC_CDN_ALARM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 3. "  SEC_CDN_ALARM           ,SEC_CDN_ALARM interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  MSEC_ALARM           ,MSEC_ALARM interrupt" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 0.--1. " SEC_ALARM                 ,SEC_ALARM interrupt" "0,1,2,3"
group.long 0x38++0x07
line.long 0x00 "RTC2_RTCRSR_0,RTC Reference Selection Register"
bitfld.long 0x00 4.--5. " MBS                       ,MTSC Bit Select" "0,1,2,3"
bitfld.long 0x00 0. "             FR                      ,Free running" "0,1"
line.long 0x04 "RTC2_RTCDR_0,RTC Divider Register"
hexmask.long.word 0x04 16.--31. 1. " D                         ,Denominator"
hexmask.long.word 0x04 0.--15. 1. "          N                       ,Numerator"
group.long 0x100++0x03
line.long 0x00 "RTC2_AOWDTCR_0,RTC Always On Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WINDOWEDRESTARTDISABLEMAP ,Windowed restart disable map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "            ERRORTHRESHOLD          ,WDT logic asserts an error signal to HSM when ExpirationLevel > ErrorThreshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "             TSCREFERENCEENABLE   ,Select as timing reference transitions on a configured TSC bit" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 18. " CHALLENGERESPONSEENABLE   ,Enable the Challenge Response mode of operation" "Disabled,Enabled"
bitfld.long 0x00 17. "      WINDOWEDOPERATIONENABLE ,Enable the windowed mode of operation" "Disabled,Enabled"
bitfld.long 0x00 16. "      SYSTEMPORRESETENABLE ,Enable full system reset at fifth expiration of the counter, mostly at the same level as the signal from PMC asserted in case of a Power On Reset" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 15. " SYSTEMDEBUGRESETENABLE    ,Enable system-wide reset assertion at fourth expiration of the counter" "Disabled,Enabled"
bitfld.long 0x00 14. "      WAKECOLDENABLE          ,Wake cold enable" "Disabled,Enabled"
bitfld.long 0x00 13. "      WAKEENABLE           ,Wake enabled" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 12. " LOCALINTERRUPTENABLE      ,Enable normal priority interrupt assertion at first expiration of the counter, connected to local interrupt controller" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "      PERIOD                  ,Measured in periods of the timer selected as source. This is the reload value, so 0 is treated as maximum period"
bitfld.long 0x00 0.--3. "            TIMERSOURCE          ,Timer source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x104++0x03
line.long 0x00 "RTC2_AOWDTSR_0,RTC Always On Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR              , Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "      CURRENTEXPIRATIONCOUNT  ,Current expiration level" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 4.--11. 1. "             CURRENTCOUNT         ,Current value of the down counter"
textline "                            "
bitfld.long 0x00 3. " WAKECOLDSTATUS            ,Wake cold status" "0,1"
bitfld.long 0x00 2. "             WAKESTATUS              ,Wake status" "0,1"
bitfld.long 0x00 1. "             LOCALINTERRUPTSTATUS ,Current status of local interrupt" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 0. " ENABLED                   ,Enabled" "0,1"
group.long 0x108++0x0B
line.long 0x00 "RTC2_AOWDTCMDR_0,RTC Always On Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER            ,Disable counter" "0,1"
bitfld.long 0x00 0. "             STARTCOUNTER            ,Start counter" "0,1"
line.long 0x04 "RTC2_AOWDTUR_0,Always On Watchdog Timer Unlock Register"
line.long 0x08 "RTC2_AOWDTSCOR_0,Always On Watchdog Skip Configuration Register"
bitfld.long 0x08 12.--14. " SKIP3                     ,Skip value at expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 8.--10. "             SKIP2                   ,Skip value at expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 4.--6. "             SKIP1                ,Skip value at expiration count 1" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x08 0.--2. " SKIP0                     ,Skip value at expiration count 0" "0,1,2,3,4,5,6,7"
group.long 0x114++0x03
line.long 0x00 "RTC2_CLK_OVR_ON_0,RTC Clock Override On Register"
bitfld.long 0x00 1. " RTC                       ,SLCG override bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "Memory Controller"
tree "MCB"
base ad:0x02C10000
width 19.
group.long 0x00++0x07
line.long 0x00 "INTSTATUS_0,Interrupt Status Register"
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT     ,Generalized carve out interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "        DECERR_MTS_INT                  ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECERR_SEC_INT            ,The request violated the SEC carve out requirements" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 12. " DECERR_VPR_INT                      ,The request violated the VPR requirements" "No interrupt,Interrupt"
bitfld.long 0x00 11. "        INVALID_APB_ASID_UPDATE_INT     ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INVALID_SMMU_PAGE_INT     ,Address translation error" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INT                ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt"
bitfld.long 0x00 8. "        SECURITY_VIOLATION_INT          ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  DECERR_EMEM_INT           ,Address translation error EMEM address decode error" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 16. "            DECERR_MTS_INTMASK              ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 13. "      SECERR_SEC_INTMASK        ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 12. " DECERR_VPR_INTMASK                  ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 11. "            INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 10. "      INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK            ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 8. "            SECURITY_VIOLATION_INTMASK      ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 6. "      DECERR_EMEM_INTMASK       ,EMEM address decode error interrupt mask" "Masked,Unmasked"
textline "                            "
sif (cpuis("TEGRAX2"))
group.long 0xEC4++0x03
line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register"
bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY                    ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 18. "            SCRUB_ECC_WR_ACK_INTPRIORITY        ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 16. "            DECERR_MTS_INTPRIORITY              ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY                  ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 12. "            DECERR_VPR_INTPRIORITY              ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY      ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 10. "            INVALID_SMMU_PAGE_INTPRIORITY       ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY            ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 8. "            SECURITY_VIOLATION_INTPRIORITY      ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY                 ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
endif
if ((per.l(ad:0x02C10000+0x08)&0x70000000)==0x60000000)
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE  ,Invalid SMMU page error page permission was readable" "Not readable,Readable"
textline "                            "
bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE      ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable"
bitfld.long 0x00 25. "       ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure"
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
else
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
endif
rgroup.long 0x0C++0x03
line.long 0x00 "ERR_ADR_0,Error Data Capture Address"
textline "                            "
sif (!cpuis("TEGRAX2"))
group.long 0x10++0x13
line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register"
bitfld.long 0x00 0. " SMMU_ENABLE                         ,SMMU enable" "Disabled,Enabled"
line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register"
bitfld.long 0x04 31. " TLB_STATS_ENABLE                    ,Enable TLB hit and miss counters" "Disabled,Enabled"
bitfld.long 0x04 30. "            TLB_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x04 29. "      TLB_HIT_UNDER_MISS        ,Allow hits to pass misses in the TLB" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION         ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "            TLB_ACTIVE_LINES                ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register"
bitfld.long 0x08 31. " PTC_STATS_ENABLE                    ,Enable PTC hit and miss counters" "Disabled,Enabled"
bitfld.long 0x08 30. "            PTC_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x08 29. "      PTC_CACHE_ENABLE          ,Enable the PTC cache" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT                       ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--11. 1. "                  PTC_LINE_MASK                   ,XOR pattern for line generation"
hexmask.long.byte 0x08 0.--6. 1. "            PTC_INDEX_MAP             ,XOR pattern for tag generation"
line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register"
hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID                        ,ASID used to address SMMUT PTB register"
line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register"
bitfld.long 0x10 31. " ASID_READABLE                       ,Allow reads for this ASID" "Not allowed,Allowed"
bitfld.long 0x10 30. "         ASID_WRITEABLE                  ,Allow writes for this ASID" "Not allowed,Allowed"
textline "                            "
bitfld.long 0x10 29. " ASID_NONSECURE                      ,Allow non-secure access for this ASID" "Not allowed,Allowed"
hexmask.long.tbyte 0x10 0.--21. 1. "         ASID_PDE_BASE                   ,Pointer to page of PDEs"
group.long 0x30++0x07
line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register"
bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH                ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "            TLB_FLUSH_ASID                  ,ASID to match"
hexmask.long.tbyte 0x00 2.--19. 1. "            TLB_FLUSH_VA_GROUP        ,Virtual address to match for group flashes"
textline "                            "
bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH                  ,Flushing control" "All,,Section,Group"
line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register"
hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR                       ,Physical address of PTE group"
bitfld.long 0x04 3. "            PTC_NO_WAIT_IDLE_FLUSH          ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled"
bitfld.long 0x04 0. "      PTC_FLUSH_TYPE            ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr"
endif
textline "                              "
width 37.
if (((per.l(ad:0x02C10000+0x664))&0x01)==0x00)
group.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_BOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
group.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
group.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,Mask is ANDed with address and the resulting value is XORed to a single bit"
endif
group.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
else
rgroup.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_DOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
rgroup.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
rgroup.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,EMEM channel mask bits"
endif
rgroup.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
endif
group.long 0x70++0x07
line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base"
hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM           ,Base of the secured region"
line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound"
hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB       ,Size in MB of the secured region"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x07
line.long 0x00 "SECURITY_CFG3_0,Security Config3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI        ,SECURITY BOM HI" "0,1,2,3"
endif
group.long 0x90++0x37
line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration"
hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update"
hexmask.long.word 0x00 0.--8. 1. "        CYCLES_PER_UPDATE             ,Number of MCCLK cycles per deadline timer update"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING      ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled"
bitfld.long 0x04 30. "  LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x04 16.--24. 1. "       ARB_OUTSTANDING_COUNT  ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "      ARB_MAX_OUTSTANDING           ,Maximum number of requests"
textline "                                        "
line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD"
bitfld.long 0x08 0.--5. " RCD                    ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP"
hexmask.long.byte 0x0C 0.--6. 1. " RP                     ,Minimum number of cycles between an internal precharge and activate command to the same bank"
line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC"
hexmask.long.byte 0x10 0.--7. 1. " RC                     ,Minimum number of cycles between activate commands to the same bank"
line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS"
hexmask.long.byte 0x14 0.--6. 1. " RAS                    ,Minimum number of cycles between activate and precharge command to the same bank"
line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW"
bitfld.long 0x18 0.--5. " FAW                    ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD"
bitfld.long 0x1C 0.--4. " RRD                    ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE"
hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE                ,Minimum number of cycles between read and internal precharge commands"
line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE"
hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE                ,Minimum number of cycles between write and internal precharge commands"
line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R"
bitfld.long 0x28 0.--4. " R2R                    ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W"
bitfld.long 0x2C 0.--4. " W2W                    ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W"
hexmask.long.byte 0x30 0.--6. 1. " R2W                    ,Number of cycles to turn the bus from reads to writes"
line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R"
hexmask.long.byte 0x34 0.--6. 1. " W2R                    ,Number of cycles to turn the bus from reads to writes"
group.long 0xD0++0x0F
line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0"
hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN               ,Bubbles produced by a write to read bus turn"
hexmask.long.byte 0x00 16.--23. 1. "        R2W_TURN                      ,Bubbles produced by a read to write bys turn"
hexmask.long.byte 0x00 8.--15. 1. "          W2W_TURN           ,Bubbles produced by a write to write (other device) bus turn"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "       R2R_TURN               ,Bubbles produced by a read to read (other device) bus turn"
line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers"
hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER            ,Cost to cover the activate-to-write delay"
hexmask.long.byte 0x04 8.--15. 1. "        RCD_R_COVER                   ,Cost to cover the activate-to-read delay"
hexmask.long.byte 0x04 0.--7. 1. "          RC_COVER           ,Cost to cover the activate-to-activate delay"
textline "                                        "
line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds"
bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE                          ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 27. "                    MC_EMC_SAME_FREQ                               ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC"
textline "                                        "
bitfld.long 0x08 21.--26. "       EXPIRING_SOON_SLACK_THRESHOLD                 ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--20. "                   PRIORITY_INVERSION_ISO_THRESHOLD               ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x08 15. "       EMC_REQ_B2B_XFER                              ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled"
hexmask.long.byte 0x08 8.--14. 1. "             PRIORITY_INVERSION_THRESHOLD                   ,Maximum number of unexpired requests"
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. "       B2AA_HOLDOFF_THRESHOLD                        ,Activation hold off threshold"
line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1"
bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD         ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--25. "                   REFRESH_ACK_THRESHOLD_USAGE                    ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..."
textline "                                        "
bitfld.long 0x0C 21.--23. "       EXPIRING_SOON_SLACK_THRESHOLD_PD              ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..."
hexmask.long.word 0x0C 4.--12. 1. "  ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD        ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format"
textline "                                        "
bitfld.long 0x0C 3. "       COMBINED_INTERRUPT_MODE                       ,Combined interrupt mode" "Independent,Shadowed"
bitfld.long 0x0C 2. "          BLOCK_LP_CPU_WR_IF_SMMU_INP_HP                 ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked"
textline "                                        "
bitfld.long 0x0C 1. "       ALLOW_BCA_HOLDOFF_WHN_EXP                     ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled"
bitfld.long 0x0C 0. "             BLOCK_LP_CPU_RD_IF_SMMU_INP_HP                 ,Low priority CPU reads get blocked" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2"
bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS                             ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled"
group.long 0xE0++0x07
line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH                    ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   RING1-THROTTLE_CYCLES_LOW                      ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES                         ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x6B0++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle "
bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT  ,NISO throttle disable count event" "Disabled,Enabled"
bitfld.long 0x00 16.--21. "           RING1_THROTTLE_CYCLES_HIGH          ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                              "
bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES             ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x664++0x0B
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access" "Disabled,Enabled"
line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register"
bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU STRICT TZ aperture check" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter"
bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding ring3" "Disabled,Enabled"
bitfld.long 0x08 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x08 0.--8. 1. "               ARB_MAX_OUTSTANDING_RING3           ,ARB maximum outstanding ring3"
group.long 0x6B4++0x0B
line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter"
bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO           ,Limit outstanding NISO" "Disabled,Enabled"
bitfld.long 0x00 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_NISO  ,Limit during hold off override NISO" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x00 0.--8. 1. "               ARB_MAX_OUTSTANDING_NISO            ,The maximum number of requests allowed in the arbiter"
line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask"
bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC         ,NISO throttle mask VICPC" "Disabled,Enabled"
bitfld.long 0x04 28. "           NISO_THROTTLE_MASK_USBD             ,NISO throttle mask USBD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST          ,NISO throttle mask HOST" "Disabled,Enabled"
bitfld.long 0x04 23. "           NISO_THROTTLE_MASK_SD               ,NISO throttle mask SD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK            ,NISO throttle mask GK" "Disabled,Enabled"
bitfld.long 0x04 19. "           NISO_THROTTLE_MASK_MSE              ,NISO throttle mask MSE" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX          ,NISO throttle mask USBX" "Disabled,Enabled"
bitfld.long 0x04 9. "           NISO_THROTTLE_MASK_SAX              ,NISO throttle mask SAX" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX           ,NISO throttle mask PCX" "Disabled,Enabled"
bitfld.long 0x04 3. "           NISO_THROTTLE_MASK_AVP              ,NISO throttle mask AVP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB           ,NISO throttle mask APB" "Disabled,Enabled"
bitfld.long 0x04 1. "           NISO_THROTTLE_MASK_AHB              ,NISO throttle mask AHB" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask"
bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled"
bitfld.long 0x08 15. "           RING0_THROTTLE_MASK_RING1_OUTPUT    ,Ring0 throttle mask ring1 output" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1        ,Ring0 throttle mask ring1" "Disabled,Enabled"
bitfld.long 0x08 6. "           RING0_THROTTLE_MASK_FTOP            ,Ring0 throttle mask FTOP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC          ,Ring0 throttle mask PTC" "Disabled,Enabled"
bitfld.long 0x08 0. "           RING0_THROTTLE_MASK_MPCORER         ,Ring0 throttle mask MPCORER" "Disabled,Enabled"
group.long 0xB80++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD           ,NISO throttle mask DFD" "Disabled,Enabled"
bitfld.long 0x00 4. "           NISO_THROTTLE_MASK_HDAPC            ,NISO throttle mask HDAPC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM           ,NISO throttle mask SDM" "Disabled,Enabled"
bitfld.long 0x00 2. "           NISO_THROTTLE_MASK_GK2              ,NISO throttle mask GK2" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG           ,NISO throttle mask JPG" "Disabled,Enabled"
group.long 0x670++0x07
line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB              ,SEC carve out size MB"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x678++0x03
line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0"
bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3"
bitfld.long 0x00 18. "                  ERR_SEC_SWAP                        ,Error security swap" "No error,Error"
textline "                                              "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Error secure security" "Non secure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                                              "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 0.--6. 1. "                  ERR_SEC_ID                          ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slow EMCCLK during DSR" "Disabled,Enabled"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x6C0++0x07
line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration"
hexmask.long.word 0x00 0.--8. 1. " RFCPB                            ,PMC specifies the per-bank auto refresh cycle time"
line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW"
bitfld.long 0x04 0.--5. " CCDMW                            ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,Open work control threshold"
hexmask.long.byte 0x00 8.--14. 1. "                 REFPB_THRESH_DISABLE_HP             ,Low priority control threshold"
textline "                                              "
hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP           ,High priority control threshold"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,Explicit bank mode" "0,1"
hexmask.long.byte 0x04 8.--14. 1. "                  REFPB_THRESH_DISABLE_FORCE_CLOSE    ,Force bank closure,low threshold"
textline "                                              "
hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE  ,Force bank closure,high threshold"
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "           ETR_FLUSH_ENABLE                    ,ETR flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "           NVJPG_FLUSH_ENABLE                  ,NVJPG flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           APE_FLUSH_ENABLE                    ,APE flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           GPU_FLUSH_ENABLE                    ,GPU flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           SDMMC4A_FLUSH_ENABLE                ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "In progress,Done"
bitfld.long 0x04 12. "        ETR_HOTRESET_STATUS                 ,ETR hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "In progress,Done"
bitfld.long 0x04 8. "        NVJPG_HOTRESET_STATUS               ,NVJPG hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "In progress,Done"
bitfld.long 0x04 6. "        APE_HOTRESET_STATUS                 ,APE hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "In progress,Done"
bitfld.long 0x04 2. "        GPU_HOTRESET_STATUS                 ,GPU hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "In progress,Done"
bitfld.long 0x04 0. "        SDMMC4A_HOTRESET_STATUS             ,SDMMC4A hot reset status" "In progress,Done"
textline "                                              "
endif
sif (!cpuis("TEGRAX2"))
group.long 0xE8++0x07
line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides"
bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE          ,FIFO deadlock check override" "Disabled,Enabled"
bitfld.long 0x00 28. "             ARB_EMEM_SPO_OVERRIDE                          ,EMEM SPO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 27. "       ARB_EMEM_AP_OVERRIDE                          ,EMEM AP override" "Disabled,Enabled"
bitfld.long 0x00 26. "             ARB_HUM_FIFO_OVERRIDE                          ,Hum FIFO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 23. "       ISO_TA_OVERRIDE                               ,ISO TA override" "Disabled,Enabled"
bitfld.long 0x00 22. "             ISO_DA_OVERRIDE                                ,ISO DA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_BC_INHERIT_ON_PRIINV_OVERRIDE             ,ISO BC inherit on PRINV override" "Disabled,Enabled"
bitfld.long 0x00 20. "             ISO_BC_CAUSE_PRIINV_OVERRIDE                   ,ISO BC cause PRINV override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 19. "       ISO_BA_OVERRIDE                               ,ISO_BA override" "Disabled,Enabled"
bitfld.long 0x00 18. "             ISO_AA_OVERRIDE                                ,ISO AA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 17. "       ARB_EMEM_BUBBLECALC_OVERRIDE                  ,EMEM bubble CALC override" "Disabled,Enabled"
bitfld.long 0x00 16. "             ALLOC_ONE_BQ_PER_CLIENT                        ,Allocate one BQ per client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 14. "             PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 13. "       PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE     ,Priority inversion threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 12. "             PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE     ,Priority inversion bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 11. "       PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE  ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled"
bitfld.long 0x00 10. "             OBSERVED_DIRECTION_OVERRIDE                    ,Observed direction override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 9. "       BC2AA_HOLDHOFF_OVERRIDE                       ,BC2AA hold off override" "Disabled,Enabled"
bitfld.long 0x00 8. "             TS2AA_HOLDHOFF_OVERRIDE                        ,TS2AA hold off override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 4. "       EXPIRE_UPDATE_OVERRIDE                        ,Expire update override" "Disabled,Enabled"
bitfld.long 0x00 3. "             GPU_SLICE_MERGE_OVERRIDE                       ,Combine GPU traffic override" "Disabled,Enabled"
textline "                                        "
line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved"
hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3"
hexmask.long.byte 0x04 16.--23. 1. "           EMEM_ARB_RESERVED_BYTE2  ,EMEM ARB reserved byte2"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. "       EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 "
hexmask.long.byte 0x04 0.--7. 1. "           EMEM_ARB_RESERVED_BYTE0  ,EMEM ARB reserved byte0"
group.long 0x0F4++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides"
bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR      ,EMC response clock override" "Gated,Override"
bitfld.long 0x00 14. "     TSR_CLKEN_OVR            ,EARB TSR clock override" "Gated,Override"
textline "                                        "
bitfld.long 0x00 13. "       RING2_CLKEN_OVR         ,Ring2 clock override" "Gated,Always on"
bitfld.long 0x00 12. "    RING1_CLKEN_OVR          ,Ring1 clock override" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 11. "       CH_DDA_CLKEN_OVR        ,CH_DDA_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 10. "    HUB_DDA_CLKEN_OVR        ,HUB_DDA_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 9. "       WCAM_CLKEN_OVR          ,WCAM_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 8. "    PTC_CACHE_CLKEN_OVR      ,PTC_CACHE_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 7. "       PTC_CLKEN_OVR           ,PTC_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 6. "    TLB_CLKEN_OVR            ,TLB_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 5. "       WB_CLKEN_OVR            ,WB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 3. "    REGS_CLKEN_OVR           ,REGS_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 2. "       EARB_CLKEN_OVR          ,EARB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 0. "    CIF_CLKEN_OVR            ,CIF_CLKEN_OVR" "Gated,Always on"
group.long 0x0FC++0x07
line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger"
bitfld.long 0x00 0. " TIMING_UPDATE           ,Trigger a timing update event" "No trigger,Trigger"
textline "                                        "
line.long 0x04 "STAT_CONTROL_0,Statistic Control"
bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER     ,EMC PM stop trigger" "No trigger,Trigger"
bitfld.long 0x04 2. "   EMC_PM_START_TRIGGER     ,EEMC PM start trigger" "No trigger,Trigger"
textline "                                        "
bitfld.long 0x04 0.--1. "       EMC_GATHER              ,EMC gather" "RST,,Disabled,Enabled"
textline "                                        "
endif
group.long 0x200++0x03
line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE    ,SDMMC3A flush enable" "Disabled,Enabled"
bitfld.long 0x00 30. "     SDMMC2A_FLUSH_ENABLE     ,SDMMC2A flush enable" "Disabled,Enabled"
bitfld.long 0x00 29. "     SDMMC1A_FLUSH_ENABLE      ,SDMMC1A flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_FLUSH_ENABLE       ,TSEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 20. "     XUSB_DEV_FLUSH_ENABLE    ,XUSB DEV flush enable" "Disabled,Enabled"
bitfld.long 0x00 19. "     XUSB_HOST_FLUSH_ENABLE    ,XUSB host flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 18. "       VIC_FLUSH_ENABLE        ,VIC flush enable" "Disabled,Enabled"
bitfld.long 0x00 17. "     VI_FLUSH_ENABLE          ,VI flush enable" "Disabled,Enabled"
bitfld.long 0x00 15. "     SATA_FLUSH_ENABLE         ,SATA flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_FLUSH_ENABLE       ,PPCS flush enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     NVENC_FLUSH_ENABLE       ,NVENC flush enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     MPCORE_FLUSH_ENABLE       ,MPCORE flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_FLUSH_ENABLE       ,ISP2 flush enable" "Disabled,Enabled"
bitfld.long 0x00 7. "     HDA_FLUSH_ENABLE         ,HDA flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     HC_FLUSH_ENABLE           ,HC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 3. "       DCB_FLUSH_ENABLE        ,DCB flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     DC_FLUSH_ENABLE          ,DC flush enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     AVPC_FLUSH_ENABLE         ,AVPC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. "       AFI_FLUSH_ENABLE        ,AFI flush enable" "Disabled,Enabled"
rgroup.long 0x204++0x03
line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register"
bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done"
bitfld.long 0x00 30. "  SDMMC2A_HOTRESET_STATUS  ,SDMMC2A flush status" "In progress,Done"
bitfld.long 0x00 29. "  SDMMC1A_HOTRESET_STATUS   ,SDMMC1A flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_HOTRESET_STATUS    ,TSEC flush status" "In progress,Done"
bitfld.long 0x00 20. "  XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done"
bitfld.long 0x00 19. "  XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 18. "       VIC_HOTRESET_STATUS     ,VIC flush status" "In progress,Done"
bitfld.long 0x00 17. "  VI_HOTRESET_STATUS       ,VI flush status" "In progress,Done"
bitfld.long 0x00 15. "  SATA_HOTRESET_STATUS      ,SATA flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_HOTRESET_STATUS    ,PPCS flush status" "In progress,Done"
bitfld.long 0x00 11. "  NVENC_HOTRESET_STATUS    ,NVENC flush status" "In progress,Done"
bitfld.long 0x00 9. "  MPCORE_HOTRESET_STATUS    ,MPCORE flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_HOTRESET_STATUS    ,ISP flush status" "In progress,Done"
bitfld.long 0x00 7. "  HDA_HOTRESET_STATUS      ,HDA flush status" "In progress,Done"
bitfld.long 0x00 6. "  HC_HOTRESET_STATUS        ,HC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 3. "       DCB_HOTRESET_STATUS     ,DCB flush status" "In progress,Done"
bitfld.long 0x00 2. "  DC_HOTRESET_STATUS       ,DC flush status" "In progress,Done"
bitfld.long 0x00 1. "  AVPC_HOTRESET_STATUS      ,AVPC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 0. "       AFI_HOTRESET_STATUS     ,AFI flush status" "In progress,Done"
group.long 0x208++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings"
bitfld.long 0x00 31. " ISO_SATAR               ,Client SATAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 30. "     ISO_PPCSAHBSLVR          ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 29. "     ISO_PPCSAHBDMAR           ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       ISO_NVENCCSRD           ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 23. "     ISO_HOST1XR              ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 22. "     ISO_HOST1XDMAR            ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_HDAR                ,Client HDAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 17. "     ISO_DISPLAYHCB           ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 16. "     ISO_DISPLAYHC             ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       ISO_AVPCARM7R           ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 14. "     ISO_AFIR                 ,Client AFIR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 6. "     ISO_DISPLAY0CB            ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       ISO_DISPLAY0C           ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_DISPLAY0BB           ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 3. "     ISO_DISPLAY0B             ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       ISO_DISPLAY0AB          ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_DISPLAY0A            ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 0. "     ISO_PTCR                  ,Client PTCR is treated as an isochronous client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings"
bitfld.long 0x04 29. " ISO_SATAW               ,Client SATAW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 28. "     ISO_PPCSAHBSLVW          ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 27. "     ISO_PPCSAHBDMAW           ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       ISO_MPCOREW             ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 22. "     ISO_HOST1XW              ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 21. "     ISO_HDAW                  ,Client HDAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 18. "       ISO_AVPCARM7W           ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 17. "     ISO_AFIW                 ,Client AFIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 11. "     ISO_NVENCSWR              ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. "       ISO_MPCORER             ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings"
bitfld.long 0x08 26. " ISO_DISPLAYT            ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 25. "     ISO_GPUSWR               ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 24. "     ISO_GPUSRD                ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       ISO_TSECSWR             ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 20. "     ISO_TSECSRD              ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 17. "     ISO_ISPWBB                ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       ISO_ISPWAB              ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 14. "     ISO_ISPRAB               ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 13. "     ISO_XUSB_DEVW             ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       ISO_XUSB_DEVR           ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 11. "     ISO_XUSB_HOSTW           ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 10. "     ISO_XUSB_HOSTR            ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       ISO_ISPWB               ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 6. "     ISO_ISPWA                ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 4. "     ISO_ISPRA                 ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings"
bitfld.long 0x0C 31. " ISO_NVJPGSWR            ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     ISO_NVJPGSRD             ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     ISO_APEW                  ,Client APEW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       ISO_APER                ,Client APER is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     ISO_NVDECSWR             ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     ISO_NVDECSRD              ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       ISO_DISPLAYD            ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     ISO_VIW                  ,Client VIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     ISO_VICSWR                ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       ISO_VICSRD              ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     ISO_SDMMCWAB             ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     ISO_SDMMCW                ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       ISO_SDMMCWAA            ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     ISO_SDMMCWA              ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     ISO_SDMMCRAB              ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       ISO_SDMMCR              ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     ISO_SDMMCRAA             ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     ISO_SDMMCCRA              ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xB94++0x03
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " SO_GPUSWR2              ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "     ISO_GPUSRD2              ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "     ISO_TSECSWRB              ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 6. "        ISO_TSECSRDB            ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "     ISO_ETRW                 ,Client ETRW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_ETRR                  ,Client ETRR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. "        ISO_AXIAPW              ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_AXIAPR               ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_SESWR                 ,Client SESWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_SESRD               ,Client SESRD is treated as an isochronous client" "Disabled,Enabled"
group.long 0xBA8++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0"
bitfld.long 0x00 3. " ISO_NVDECSRD1           ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_VICSRD1              ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_NVDISPLAYR1           ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_APEDMAW             ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled"
endif
group.long 0x218++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 31. " HYST_SATAR              ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "     HYST_PPCSAHBSLVR         ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "     HYST_PPCSAHBDMAR          ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       HYST_NVENCSRD           ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "     HYST_HOST1XR             ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "     HYST_HOST1XDMAR           ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       HYST_HDAR               ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "     HYST_DISPLAYHCB          ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "     HYST_DISPLAYHC            ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       HYST_AVPCARM7R          ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "     HYST_AFIR                ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "     HYST_DISPLAY0CB           ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       HYST_DISPLAY0C          ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "     HYST_DISPLAY0BB          ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "     HYST_DISPLAY0B            ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       HYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "     HYST_DISPLAY0A           ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "     HYST_PTCR                 ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings"
bitfld.long 0x04 29. " HYST_SATAW              ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "     HYST_PPCSAHBSLVW         ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "     HYST_PPCSAHBDMAW          ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       HYST_MPCOREW            ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled"
sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1"))
bitfld.long 0x04 24. "     HYST_MPCORELPW           ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled"
endif
bitfld.long 0x04 22. "     HYST_HOST1XW             ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 21. "       HYST_HDAW               ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "     HYST_AVPCARM7W           ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "     HYST_AFIW                 ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 11. "       HYST_NVENCSWR           ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "     HYST_MPCORER             ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings"
bitfld.long 0x08 26. " HYST_DISPLAYT           ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "     HYST_GPUSWR              ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "     HYST_GPUSRD               ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       HYST_TSECSWR            ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "     HYST_TSECSRD             ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "     HYST_ISPWBB               ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       HYST_ISPWAB             ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "     HYST_ISPRAB              ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "     HYST_XUSB_DEVW            ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       HYST_XUSB_DEVR          ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "     HYST_XUSB_HOSTW          ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "     HYST_XUSB_HOSTR           ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       HYST_ISPWB              ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "     HYST_ISPWA               ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "     HYST_ISPRA                ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings"
bitfld.long 0x0C 31. " HYST_NVJPGSWR           ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     HYST_NVJPGSRD            ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     HYST_APEW                 ,Client APEW is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       HYST_APER               ,Client APER is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     HYST_NVDECSWR            ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     HYST_NVDECSRD             ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       HYST_DISPLAYD           ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     HYST_VIW                 ,Client VIW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     HYST_VICSWR               ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       HYST_VICSRD             ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     HYST_SDMMCWAB            ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     HYST_SDMMCW               ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       HYST_SDMMCWAA           ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     HYST_SDMMCWA             ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     HYST_SDMMCRAB             ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       HYST_SDMMCR             ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     HYST_SDMMCRAA            ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     HYST_SDMCRA               ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0"
bitfld.long 0x00 31. " HYST_APEDMAR             ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  HYST_SCEDMAW          ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  HYST_SCEDMAR      ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " HYST_SCEW                ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 27. "  HYST_SCER             ,Client SCER is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 26. "  HYST_AONDMAW      ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. " HYST_AONDMAR             ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 24. "  HYST_AONW             ,Client AONW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  HYST_AONR         ,Client AONR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 22. " HYST_BPMPDMAW            ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 21. "  HYST_BPMPDMAR         ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 20. "  HYST_BPMPW        ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " HYST_BPMPR               ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 18. "  HYST_NVDISPLAYR       ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  HYST_UFSHCW       ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 16. " HYST_UFSHCR              ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 15. "  HYST_EQOSW            ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  HYST_EQOSR        ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " HYST_AXISW               ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 12. "  HYST_AXISR            ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 9. "  HYST_GPUSWR2      ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 8. " HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "  HYST_TSECSWRB         ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  HYST_TSECSRDB     ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  HYST_ETRR             ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_SESWR        ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_SESRD               ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBA4++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0"
bitfld.long 0x00 3. " HYST_NVDECSRD1           ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  HYST_VICSRD1          ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_NVDISPLAYR1  ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_APEDMAW             ,Client APEDMAW  is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR              ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  DHYST_PPCSAHBSLVR     ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " DHYST_NVENCSRD           ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  DHYST_HOST1XR         ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "  DHYST_HOST1XDMAR  ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " DHYST_HDAR               ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  DHYST_DISPLAYHCB      ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "  DHYST_DISPLAYHC   ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " DHYST_AVPCARM7R          ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  DHYST_AFIR            ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  DHYST_DISPLAY0CB  ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " DHYST_DISPLAY0C          ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  DHYST_DISPLAY0BB      ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "  DHYST_DISPLAY0B   ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_DISPLAY0A       ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "  DHYST_PTCR        ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW              ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "  DHYST_PPCSAHBSLVW     ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "  DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 25. " DHYST_MPCOREW            ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "  DHYST_HOST1XW         ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 21. "  DHYST_HDAW        ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 18. " DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "  DHYST_AFIW            ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 11. "  DHYST_NVENCSWR    ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " DHYST_MPCORER            ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT           ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "  DHYST_GPUSWR          ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "  DHYST_GPUSRD      ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 23. " DHYST_A9AVPSCW           ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 22. "  DHYST_A9AVPSCR        ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 21. "  DHYST_TSECSWR     ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 20. " DHYST_TSECSRD            ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "  DHYST_ISPWBB          ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 16. "  DHYST_ISPWAB      ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 14. " DHYST_ISPRAB             ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "  DHYST_XUSB_DEVW       ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 12. "  DHYST_XUSB_DEVR   ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 11. " DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "  DHYST_XUSB_HOSTR      ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 7. "  DHYST_ISPWB       ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 6. " DHYST_ISPWA              ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "  DHYST_ISPRA           ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR           ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "  DHYST_NVJPGSRD        ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "  DHYST_APEW        ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 26. " DHYST_APER               ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "  DHYST_NVDECSWR        ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "  DHYST_NVDECSRD    ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 19. " DHYST_DISPLAYD           ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "  DHYST_VIW             ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "  DHYST_VICSWR      ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 12. " DHYST_VICSRD             ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "  DHYST_SDMMCWAB        ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "  DHYST_SDMMCW      ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA           ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "  DHYST_SDMMCWA         ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "  DHYST_SDMMCRAB    ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 2. " DHYST_SDMMCR             ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "  DHYST_SDMMCRAA        ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "  DHYST_SDMMCRA     ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2            ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "  DHYST_GPUSRD2         ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "  DHYST_TSECSWRB    ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 6. " DHYST_TSECSRDB           ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "  DHYST_ETRW            ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "  DHYST_ETRR        ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 3. " DHYST_AXIAPW             ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "  DHYST_AXIAPR          ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "  DHYST_SESWR       ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 0. " DHYST_SESRD              ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBF0++0x03
line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 3. " DHYST_NVDECSRD1          ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  DHYST_VICSRD1         ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " DHYST_APEDMAW            ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic"
bitfld.long 0x00 31. " DHYST_ENABLE             ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x1F
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0        ,DHYST delay bin 0"
line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1"
hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1        ,DHYST delay bin 1"
line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2"
hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2        ,DHYST delay bin 2"
line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3"
hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3        ,DHYST delay bin 3"
line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4"
hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4        ,DHYST delay bin 4"
line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5"
hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5        ,DHYST delay bin 5"
line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6"
hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6        ,DHYST delay bin 6"
line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7"
hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7        ,DHYST delay bin 7"
group.long 0xA60++0x03
line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC   ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled"
group.long 0xA70++0x07
line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC    ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled"
line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0"
bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP     ,Response clock-enable override for partition client FTOP" "Disabled,Enabled"
group.long 0xA80++0x03
line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3   ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled"
group.long 0xA3C++0x03
line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG      ,Response clock-enable override for partition client JPG" "Disabled,Enabled"
group.long 0xA14++0x03
line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST     ,Response clock-enable override for partition client HOST" "Disabled,Enabled"
group.long 0x2AC++0x03
line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS      ,Response clock-enable override for partition client DIS" "Disabled,Enabled"
group.long 0xA78++0x03
line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled"
group.long 0xA1C++0x03
line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC    ,Response clock-enable override for partition client VICPC" "Disabled,Enabled"
group.long 0xA58++0x03
line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC  ,RCLKEN override UFSHCPC" "Disabled,Enabled"
group.long 0xA6C++0x03
line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x228++0x0F
line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables"
bitfld.long 0x00 31. " SMMU_SATAR_ENABLE       ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 30. "     SMMU_PPCSAHBSLVR_ENABLE  ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 29. "     SMMU_PPCSAHBDMAR_ENABLE   ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       SMMU_NVENCSRD_ENABLE    ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 23. "     SMMU_HOST1XR_ENABLE      ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 22. "     SMMU_HOST1XDMAR_ENABLE    ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       SMMU_HDAR_ENABLE        ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 17. "     SMMU_DISPLAYHCB_ENABLE   ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 16. "     SMMU_DISPLAYHC_ENABLE     ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       SMMU_AVPCARM7R_ENABLE   ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 14. "     SMMU_AFIR_ENABLE         ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 6. "     SMMU_DISPLAY0CB_ENABLE    ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       SMMU_DISPLAY0C_ENABLE   ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 4. "     SMMU_DISPLAY0BB_ENABLE   ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 3. "     SMMU_DISPLAY0B_ENABLE     ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       SMMU_DISPLAY0AB_ENABLE  ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 1. "     SMMU_DISPLAY0A_ENABLE    ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled"
line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables"
bitfld.long 0x04 29. " SMMU_SATAW_ENABLE       ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 28. "     SMMU_PPCSAHBSLVW_ENABLE  ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 27. "     SMMU_PPCSAHBDMAW_ENABLE   ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 22. "       SMMU_HOST1XW_ENABLE     ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 21. "     SMMU_HDAW_ENABLE         ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 18. "     SMMU_AVPCARM7W_ENABLE     ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 17. "       SMMU_AFIW_ENABLE        ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 11. "     SMMU_NVENCSWR_ENABLE     ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled"
line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables"
bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE    ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled"
rbitfld.long 0x08 25. "     SMMU_GPUSWR_ENABLE       ,GPU translation is handled by SWID" "Disabled,Enabled"
rbitfld.long 0x08 24. "     SMMU_GPUSRD_ENABLE        ,GPU translation is handled by SWID" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       SMMU_TSECSWR_ENABLE     ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 20. "     MMU_TSECSRD_ENABLE       ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 17. "     SMMU_ISPWBB_ENABLE        ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       SMMU_ISPWAB_ENABLE      ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 14. "     SMMU_ISPRAB_ENABLE       ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x08 13. "     SMMU_XUSB_DEVW_ENABLE     ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       SMMU_XUSB_DEVR_ENABLE   ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 11. "     SMMU_XUSB_HOSTW_ENABLE   ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 10. "     SMMU_XUSB_HOSTR_ENABLE    ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       SMMU_ISPWB_ENABLE       ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 6. "     SMMU_ISPWA_ENABLE        ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 4. "     SMMU_ISPRA_ENABLE         ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled"
line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables"
bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE    ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 30. "     SMMU_NVJPGSRD_ENABLE     ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SMMU_APEW_ENABLE          ,Enable client APEW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       SMMU_APER_ENABLE        ,Enable client APER to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 25. "     SMMU_NVDECSWR_ENABLE     ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 24. "     SMMU_NVDECSRD_ENABLE      ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       SMMU_DISPLAYD_ENABLE    ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 18. "     SMMU_VIW_ENABLE          ,Client VIW  translation to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 13. "     SMMU_VICSWR_ENABLE        ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       SMMU_VICSRD_ENABLE      ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x0C 7. "     SMMU_SDMMCWAB_ENABLE     ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 6. "     SMMU_SDMMCW_ENABLE        ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       SMMU_SDMMWAA_ENABLE     ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 4. "     SMMU_SDMMCWA_ENABLE      ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 3. "     SMMU_SDMMCRAB_ENABLE      ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       SMMU_SDMMCR_ENABLE      ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 1. "     SMMU_SDMMCRAA_ENABLE     ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 0. "     SMMU_SDMMCRA_ENABLE       ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled"
textline " "
width 23.
if (((per.l(ad:0x02C10000+0x238))&0x80000000)==0x80000000)
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  AFI_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AFI_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AFI_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AFI_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x23C))&0x80000000)==0x80000000)
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  AVPC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x240))&0x80000000)==0x80000000)
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DC_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x244))&0x80000000)==0x80000000)
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DCB_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DCB_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DCB_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DCB_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x250))&0x80000000)==0x80000000)
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  HC_ASID         ,ASID to use when VA[3332] == 0x0"
else
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x254))&0x80000000)==0x80000000)
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  HDA_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  HDA_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  HDA_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  HDA_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x258))&0x80000000)==0x80000000)
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  ISP2_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x264))&0x80000000)==0x80000000)
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " NVENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  NVENC_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " MSENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x268))&0x80000000)==0x80000000)
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV_ASID         ,ASID to use for NV translation" "0,1,2,3"
else
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x26C))&0x80000000)==0x80000000)
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV2_ASID        ,ASID to use for NV2 translation" "0,1,2,3"
else
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x270))&0x80000000)==0x80000000)
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  PPCS_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x274))&0x80000000)==0x80000000)
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  SATA_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SATA_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SATA_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SATA_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x280))&0x80000000)==0x80000000)
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  VI_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  VI_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  VI_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  VI_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x284))&0x80000000)==0x80000000)
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  VIC_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x288))&0x80000000)==0x80000000)
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x28C))&0x80000000)==0x80000000)
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x294))&0x80000000)==0x80000000)
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE  ,TSEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  TSEC_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_SMMU_ENABLE      ,TSEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0x298))&0x80000000)==0x80000000)
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " SMMU_ENABLE           ,PPCS1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  ASID            ,ASID to use when VA[3332] == 0x0"
else
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE     ,PPCS1 translation enable" "Disabled,Enabled"
endif
endif
width 34.
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x404++0x03
line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX      ,Response clock-enable override for partition client USBX" "Disabled,Enabled"
group.long 0x2B8++0x03
line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX       ,Response clock-enable override for partition client PCX" "Disabled,Enabled"
group.long 0xE08++0x03
line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2      ,Response clock-enable override for partition client MSE2" "Disabled,Enabled"
group.long 0xA7C++0x03
line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2    ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled"
group.long 0xA4C++0x03
line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD       ,Response clock-enable override for partition client DFD" "Disabled,Enabled"
group.long 0xE00++0x03
line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2      ,Response clock-enable override for partition client NVD2" "Disabled,Enabled"
group.long 0xA44++0x03
line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM       ,Response clock-enable override for partition client SDM" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB       ,Response clock-enable override for partition client APB" "Disabled,Enabled"
group.long 0xA08++0x03
line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP       ,Response clock-enable override for partition client ISP" "Disabled,Enabled"
group.long 0xA18++0x03
line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD      ,Response clock-enable override for partition client USBD" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE       ,Response clock-enable override for partition client MSE" "Disabled,Enabled"
group.long 0xA10++0x03
line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD       ,Response clock-enable override for partition client AUD" "Disabled,Enabled"
group.long 0xA54++0x03
line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC       ,Response clock-enable override for partition client NIC" "Disabled,Enabled"
group.long 0xA40++0x03
line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2       ,Response clock-enable override for partition client GK2" "Disabled,Enabled"
group.long 0xA64++0x03
line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled"
group.long 0xE04++0x03
line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3      ,Response clock-enable override for partition client NVD3" "Disabled,Enabled"
group.long 0x2C0++0x03
line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX       ,Response clock-enable override for partition client SAX" "Disabled,Enabled"
group.long 0xA5C++0x03
line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC    ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled"
group.long 0xA38++0x03
line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD       ,Response clock-enable override for partition client NVD" "Disabled,Enabled"
group.long 0xA50++0x03
line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1      ,Response clock-enable override for partition client SDM1" "Disabled,Enabled"
group.long 0xA48++0x03
line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC     ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled"
group.long 0xA68++0x03
line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC     ,Response clock-enable override for partition client AONPC" "Disabled,Enabled"
group.long 0xA04++0x03
line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD        ,Response clock-enable override for partition client SD" "Disabled,Enabled"
group.long 0xA84++0x03
line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2      ,Response clock-enable override for partition client DIS2" "Disabled,Enabled"
group.long 0x2D8++0x03
line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE        ,Response clock-enable override for partition client VE" "Disabled,Enabled"
group.long 0xA00++0x03
line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0"
bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES  ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled"
bitfld.long 0x00 3. "                 RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled"
textline "                                           "
endif
sif (!cpuis("TEGRAX2"))
group.long 0x418++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register"
bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE             ,SDMMC3A VPR override" "Disabled,Enabled"
bitfld.long 0x00 30. "          SDMMC2A_VPR_OVERRIDE                 ,SDMMC2A VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE             ,SDMMC1A VPR override" "Disabled,Enabled"
bitfld.long 0x00 26. "          DC1_VPR_OVERRIDE                     ,DC1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE               ,PPCS1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 22. "          TSEC_VPR_OVERRIDE                    ,TSEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE            ,XUSB SEV VPR override" "Disabled,Enabled"
bitfld.long 0x00 19. "          XUSB_HOST_VPR_OVERRIDE               ,XUSB HOST VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 18. " VIC_VPR_OVERRIDE                 ,VIC VPR override" "Disabled,Enabled"
bitfld.long 0x00 17. "          VI_VPR_OVERRIDE                      ,VI VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " SATA_VPR_OVERRIDE                ,SATA VPR override" "Disabled,Enabled"
bitfld.long 0x00 14. "          PPCS_VPR_OVERRIDE                    ,PPCS VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE               ,NVENC VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          MPCORE_VPR_OVERRIDE                  ,MPCORE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE                ,ISP2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          HDA_VPR_OVERRIDE                     ,HDA VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HC_VPR_OVERRIDE                  ,HC VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          DCB_VPR_OVERRIDE                     ,DCB VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DC_VPR_OVERRIDE                  ,DC VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          AVPC_VPR_OVERRIDE                    ,AVPC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " AFI_VPR_OVERRIDE                 ,AFI VPR override" "Disabled,Enabled"
group.long 0x590++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register"
bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE              ,NVDEC1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 15. "          TSECB1_VPR_OVERRIDE                  ,TSECB11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE               ,TSEC11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 13. "          TSECB_VPR_OVERRIDE                   ,TSECB1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 12. " ETR_VPR_OVERRIDE                 ,ETR1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 11. "          AXIAP_VPR_OVERRIDE                   ,AXIAP1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 10. " SE1_VPR_OVERRIDE                 ,SE11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          HC1_VPR_OVERRIDE                     ,HC11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE               ,NVJPG1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          SE_VPR_OVERRIDE                      ,SE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " APE_VPR_OVERRIDE                 ,APE VPR override" "Disabled,Enabled"
bitfld.long 0x00 5. "          NVDEC_VPR_OVERRIDE                   ,NVDEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE               ,PPCS2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          GPUB_VPR_OVERRIDE                    ,GBUP VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " GPU_VPR_OVERRIDE                 ,GPU VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          ISP2B_VPR_OVERRIDE                   ,ISP2B VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE             ,SDMMC4A VPR override" "Disabled,Enabled"
textline "                                           "
group.long 0x600++0x03
line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask"
hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0         ,TLB set selection mask 0"
group.long 0x608++0x03
line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection"
bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS   ,Display snap ring write access" "Enabled,Disabled"
bitfld.long 0x00 1. "          DISB_SNAP_RING                       ,DISB snap ring" "RING0,RING1"
textline "                                           "
bitfld.long 0x00 0. " DIS_SNAP_RING                    ,DIS snap ring" "RING0,RING1"
endif
sif (cpuis("TEGRAX2"))
group.long 0x648++0x07
line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0"
hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM                   ,Base address for the VPR address space"
line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB               ,Size of the VPR region in megabytes"
group.long 0x978++0x03
line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0"
bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI            ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3"
group.long 0x650++0x03
line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register  0"
bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled"
bitfld.long 0x00 0. "  VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1"
textline "                                           "
endif
rgroup.long 0x654++0x03
line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0"
bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI                   ,Higher address bits of erring address" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_VPR_SWAP                         ,Error VPR swap" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_VPR_SECURITY                 ,Error VPR security" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_VPR_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_VPR_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "              ERR_VPR_ID                           ,Client identifier"
rgroup.long 0x658++0x03
line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address"
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x03
line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI           ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3"
group.long 0xF80++0x07
line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB          ,Enable REGIF HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_MC                ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_EMC           ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0"
bitfld.long 0x04 31. " LOCK_REGIF_CONFIG         ,Lock REGIF configuration" "Disabled,Enabled"
bitfld.long 0x04 24.--25. "  ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3"
bitfld.long 0x04 16.--17. "      ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3"
textline "                                           "
bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "        ENABLE_REGIF_BROADCAST_EMC     ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF90++0x0F
line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_UNICAST0_MC       ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_UNICAST0_EMC  ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0"
bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3"
bitfld.long 0x04 8.--11. "         ENABLE_REGIF_UNICAST1_MC       ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "     ENABLE_REGIF_UNICAST1_EMC  ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3"
bitfld.long 0x08 8.--11. "         ENABLE_REGIF_UNICAST2_MC       ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "     ENABLE_REGIF_UNICAST2_EMC  ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3"
bitfld.long 0x0C 8.--11. "         ENABLE_REGIF_UNICAST3_MC       ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "     ENABLE_REGIF_UNICAST3_EMC  ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF2C++0x03
line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0"
bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT      ,SCRUB ECC WR ACK Interrupt" "Clear,Set"
group.long 0xF24++0x07
line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0"
bitfld.long 0x00 24. " COMMON_INTR               ,Common interrupt" "Clear,Set"
bitfld.long 0x00 17. "     HUB1_INTR                      ,Hub 1 interrupt" "Clear,Set"
bitfld.long 0x00 16. "  HUB0_INTR                  ,Hub 0 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 3. " MC3_INTR                  ,Channel 3 interrupt" "Clear,Set"
bitfld.long 0x00 2. "     MC2_INTR                       ,Channel 2 interrupt" "Clear,Set"
bitfld.long 0x00 1. "  MC1_INTR                   ,Channel 1 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 0. " MC0_INTR                  ,Channel 0 interrupt" "Clear,Set"
line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0"
bitfld.long 0x04 24. " COMMON_CRITICAL_INTR      ,Common critical interrupt" "Clear,Set"
bitfld.long 0x04 17. "     HUB1_CRITICAL_INTR             ,Hub 1 critical interrupt" "Clear,Set"
bitfld.long 0x04 16. "  HUB0_CRITICAL_INTR         ,Hub 0 critical interrupt." "Clear,Set"
textline "                                           "
bitfld.long 0x04 3. " MC3_CRITICAL_INTR         ,Channel 3 critical interrupt." "Clear,Set"
bitfld.long 0x04 2. "     MC2_CRITICAL_INTR              ,Channel 2 critical interrupt." "Clear,Set"
bitfld.long 0x04 1. "  MC1_CRITICAL_INTR          ,Channel 1 critical interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x04 0. " MC0_CRITICAL_INTR         ,Channel 0 critical interrupt" "Clear,Set"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x964++0x03
line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming"
bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS            ,IRAM configuration write access disable" "No,Yes"
group.long 0x664++0x03
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access disable" "No,Yes"
group.long 0x668++0x07
line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register"
bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU strict TrustZone aperture check enable" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding RING3" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_RING3            ,Maximum number of requests allowed in the arbiter when limit is enabled"
group.long 0x670++0x0B
line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0"
hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB             ,Size of the SEC carve out region"
line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0"
bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_SEC_SWAP                         ,ERR_SEC_SWAP" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Set if transaction was secure" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--6. 1. "              ERR_SEC_ID                           ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled"
group.long 0x6B0++0x17
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH        ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                NISO_THROTTLE_CYCLES                 ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO           ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDOFF_OVERRIDE_NISO   ,Overrides the limiting of NISO transactions" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_NISO             ,The maximum number of requests allowed in the arbiter"
line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC         ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 28. "          NISO_THROTTLE_MASK_USBD              ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST          ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 23. "          NISO_THROTTLE_MASK_SD                ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK            ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 19. "          NISO_THROTTLE_MASK_MSE               ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX          ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 9. "          NISO_THROTTLE_MASK_SAX               ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX           ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 3. "          NISO_THROTTLE_MASK_AVP               ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB           ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 1. "          NISO_THROTTLE_MASK_AHB               ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask"
bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled"
bitfld.long 0x0C 15. "          RING0_THROTTLE_MASK_RING1_OUTPUT     ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1        ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled"
bitfld.long 0x0C 6. "          RING0_THROTTLE_MASK_FTOP             ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC          ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x0C 0. "          RING0_THROTTLE_MASK_MPCORER          ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB"
hexmask.long.word 0x10 0.--8. 1. " RFCPB                            ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank"
line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW"
bitfld.long 0x14 0.--5. " CCDMW                            ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued"
textline "                                           "
hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP          ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority"
hexmask.long.byte 0x00 0.--6. 1. "                REFPB_THRESH_ENABLE_HP               ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled"
textline "                                           "
hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure"
hexmask.long.byte 0x04 0.--6. 1. "                REFPB_THRESH_ENABLE_FORCE_CLOSE      ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure"
group.long 0x968++0x03
line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0"
bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE       ,Multi-bank replay override enable" "Disabled,Enabled"
bitfld.long 0x00 5. "          EXPIRE_UPDATE_DEADLOCK_OVERRIDE      ,Expire update deadlock override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY        ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..."
bitfld.long 0x00 0.--1. "  CPU_WRITE_PAGE_OPEN_POLICY           ,CPU write page open policy" "Disabled,All,Eack_hint,?..."
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ETR_FLUSH_ENABLE                     ,ETR flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "          NVJPG_FLUSH_ENABLE                   ,NVJPG flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          APE_FLUSH_ENABLE                     ,APE flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "          GPU_FLUSH_ENABLE                     ,GPU flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          SDMMC4A_FLUSH_ENABLE                 ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "Done,In progress"
bitfld.long 0x04 12. "       ETR_HOTRESET_STATUS                  ,ETR hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "Done,In progress"
bitfld.long 0x04 8. "       NVJPG_HOTRESET_STATUS                ,NVJPG hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "Done,In progress"
bitfld.long 0x04 6. "       APE_HOTRESET_STATUS                  ,APE hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "Done,In progress"
bitfld.long 0x04 2. "       GPU_HOTRESET_STATUS                  ,GPU hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "Done,In progress"
bitfld.long 0x04 0. "       SDMMC4A_HOTRESET_STATUS              ,SDMMC4A hot reset status" "Done,In progress"
group.long 0x984++0x07
line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0"
line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0"
hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1     ,Video protect GPU override 1"
group.long 0x9A0++0x0F
line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM                 ,MTS carve out BOM"
line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB             ,MTS carve out size MB"
line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0"
bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI              ,MTS carve out BOM Hi" "0,1,2,3"
line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0"
bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS        ,MTS carve out write access" "Enabled,Disabled"
group.long 0x9B8++0x07
line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register"
bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI                 ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11"
line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration"
bitfld.long 0x04 0.--1. " SECURITY_BOM_HI                  ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11"
textline "                                           "
width 26.
if (((per.l(ad:0x02C10000+0x664))&0x01)==0x00)
group.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
else
rgroup.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
endif
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11"
if (((per.l(ad:0x02C10000+0xA88))&0x80000000)==0x80000000)
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      DC1_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC1_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC1_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC1_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xA94))&0x80000000)==0x80000000)
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xA98))&0x80000000)==0x80000000)
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xA9C))&0x80000000)==0x80000000)
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAA0))&0x80000000)==0x80000000)
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAA4))&0x80000000)==0x80000000)
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ISP2B_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2B_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2B_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2B_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAA8))&0x80000000)==0x80000000)
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPU_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPU_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPU_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPU_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAAC))&0x80000000)==0x80000000)
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPUB_ASID_3    ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPUB_ASID_2    ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPUB_ASID_1    ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPUB_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAB0))&0x80000000)==0x80000000)
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      PPCS2_ASID     ,ASID to use for PPCS2 translation"
else
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAB4))&0x80000000)==0x80000000)
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAB8))&0x80000000)==0x80000000)
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      APE_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xABC))&0x80000000)==0x80000000)
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAC0))&0x80000000)==0x80000000)
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVJPG_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAC4))&0x80000000)==0x80000000)
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      HC1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAC8))&0x80000000)==0x80000000)
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xACC))&0x80000000)==0x80000000)
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      AXIAP_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AXIAP_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AXIAP_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AXIAP_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAD0))&0x80000000)==0x80000000)
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ETR_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ETR_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ETR_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ETR_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAD4))&0x80000000)==0x80000000)
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAD8))&0x80000000)==0x80000000)
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSEC1_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC1_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC1_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC1_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xADC))&0x80000000)==0x80000000)
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB1_ASID_3  ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB1_ASID_2  ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB1_ASID_1  ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB1_ASID  ,ASID to use when VA[3332] == 0x0"
else
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C10000+0xAE0))&0x80000000)==0x80000000)
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC1_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
endif
textline " "
width 34.
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 4. "  NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 3. "  NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included"
textline "                                           "
bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 1. "  NISO_THROTTLE_MASK_JPG   ,Include JPG in the NISO meta-client group for throttling" "Not included,Included"
group.long 0xB84++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 9. " HYST_GPUSWR2           ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 8. "      HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "      HYST_TSECSWRB          ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HYST_TSECRDB           ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 5. "      HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      HYST_ETTR              ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " HYST_AXIAPW            ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "      HYST_AXIAPR              ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      HYST_SESWR             ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " HYST_SESRD             ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " ISO_GPUSWR2            ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "      ISO_GPUSRD2              ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "      ISO_TSECSWRB           ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " ISO_TSECRDB            ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "      ISO_ETRW                 ,Client ETRW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "      ISO_ETTR               ,Client ETTR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " ISO_AXIAPW             ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "      ISO_AXIAPR               ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "      ISO_SESWR              ,Client SESWR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " ISO_SESRD              ,Client SESRD is treated as a isochronous client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings"
rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE    ,Client GPUSWR2 translate by SMMU enable" ",Enabled"
rbitfld.long 0x00 8. "       SMMU_GPUSRD2_ENABLE      ,Client GPUSRD2 translate by SMMU enable" ",Enabled"
bitfld.long 0x00 7. "       SMMU_TSECSWRB_ENABLE   ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE    ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      SMMU_ETRW_ENABLE         ,Client ETRW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      SMMU_ETTR_ENABLE       ,Client ETTR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE     ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      SMMU_AXIAPR_ENABLE       ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SMMU_SESWR_ENABLE      ,Client SESWR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SMMU_SESRD_ENABLE      ,Client SESRD translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR            ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "      DHYST_PPCSAHBSLVR        ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "      DHYST_PPCSAHBDMAR      ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 28. " DHYST_NVENCSRD         ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "      DHYST_HOST1XR            ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "      DHYST_HOST1XDMAR       ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 21. " DHYST_HDAR             ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "      DHYST_DISPLAYHCB         ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "      DHYST_DISPLAYHC        ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " DHYST_AVPCARM7R        ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "      DHYST_AFIR               ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "      DHYST_DISPLAY0CB       ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " DHYST_DISPLAY0C        ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      DHYST_DISPLAY0BB         ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "      DHYST_DISPLAY0B        ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB       ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      DHYST_DISPLAY0A          ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "      DHYST_PTCR             ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW            ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "      DHYST_PPCSAHBSLVW        ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "      DHYST_PPCSAHBDMAW      ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 25. " DHYST_MPCOREW          ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 24. "      DHYST_MPCORELPW          ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "      DHYST_HOST1XW          ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 21. " DHYST_HDAW             ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "      DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "      DHYST_AFIW             ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 11. " DHYST_NVENCSWR         ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "      DHYST_MPCORER            ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT         ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "      DHYST_GPUSWR             ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "      DHYST_GPUSRD           ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 21. " DHYST_TSECSWR          ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "      DHYST_TSECSRD            ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "      DHYST_ISPWBB           ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 16. " DHYST_ISPWAB           ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "      DHYST_ISPRAB             ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "      DHYST_XUSB_DEVW        ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 12. " DHYST_XUSB_DEVR        ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "      DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "      DHYST_XUSB_HOSTR       ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " DHYST_ISPWB            ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "      DHYST_ISPWA              ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "      DHYST_ISPRA            ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR         ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DHYST_NVJPGSRD           ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "      DHYST_APEW             ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 26. " DHYST_APER             ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "      DHYST_NVDECSWR           ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "      DHYST_NVDECSRD         ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 19. " DHYST_DISPLAYD         ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "      DHYST_VIW                ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "      DHYST_VICSWR           ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 12. " DHYST_VICSRD           ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "      DHYST_SDMMCWAB           ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "      DHYST_SDMMCW           ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA         ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "      DHYST_SDMMCWA            ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "      DHYST_SDMMCRAB         ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " DHYST_SDMMCR           ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "      DHYST_SDMMCRAA           ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "      DHYST_SDMCRA           ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2          ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "      DHYST_GPUSRD2            ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "      DHYST_TSECSWRB         ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 6. " DHYST_TSECRDB          ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "      DHYST_ETRW               ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "      DHYST_ETTR             ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 3. " DHYST_AXIAPW           ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "      DHYST_AXIAPR             ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "      DHYST_SESWR            ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 0. " DHYST_SESRD            ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register"
bitfld.long 0x00 31. " DHYST_ENABLE           ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DHYST_BW_MON_INTERVAL    ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0      ,Timeout delay"
group.long 0xBD4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1      ,Timeout delay"
group.long 0xBD8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2      ,Timeout delay"
group.long 0xBDC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3      ,Timeout delay"
group.long 0xBE0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4      ,Timeout delay"
group.long 0xBE4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5      ,Timeout delay"
group.long 0xBE8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6      ,Timeout delay"
group.long 0xBEC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7      ,Timeout delay"
textline " "
width 25.
group.long 0x9DC++0x03
line.long 0x00 "DA_CONFIG0_0,DA Configuration Register"
bitfld.long 0x00 0. " NEW_ARB_SCHEME        ,New DA arbitration scheme use enable" "Disabled,Enabled"
textline " "
group.long 0x4E0++0x03
line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AHB          ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x54C++0x03
line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AUD          ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x44C++0x03
line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA"
group.long 0x440++0x03
line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2       ,DDA rate for RING2 PTSA"
group.long 0x530++0x03
line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD        ,DDA rate for USBD PTSA"
group.long 0x528++0x03
line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBX         ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBD         ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F0++0x03
line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_APB          ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x584++0x03
line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG         ,DDA rate for JPG PTSA"
group.long 0x420++0x03
line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DIS          ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4FC++0x03
line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AVP          ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F4++0x03
line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP         ,DDA rate for AVP PTSA"
group.long 0x480++0x03
line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING1        ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x424++0x03
line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DIS          ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D8++0x03
line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SD           ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C4++0x03
line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE         ,DDA rate for MSE PTSA"
group.long 0x558++0x03
line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC        ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B4++0x03
line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_PCX          ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A0++0x03
line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP         ,DDA rate for ISP PTSA"
group.long 0x48C++0x03
line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC      ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x448++0x03
line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING2        ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x548++0x03
line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD         ,DDA rate for AUD PTSA"
group.long 0x51C++0x03
line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HOST         ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x454++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER  ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D4++0x03
line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SD           ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1       ,DDA rate for RING1 PTSA"
group.long 0x588++0x03
line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_JPG          ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x62C++0x03
line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC        ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F8++0x03
line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AVP          ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x58C++0x03
line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_JPG          ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x63C++0x03
line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DFD          ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x554++0x03
line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC       ,DDA rate for VICPC PTSA"
group.long 0x544++0x03
line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK           ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x55C++0x03
line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC        ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x624++0x03
line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SDM          ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B8++0x03
line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX         ,DDA rate for SAX PTSA"
group.long 0x4B0++0x03
line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_PCX          ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4EC++0x03
line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_APB          ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x614++0x03
line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK2          ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4AC++0x03
line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX         ,DDA rate for PCX PTSA"
group.long 0x484++0x03
line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING1        ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x628++0x03
line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC       ,DDA rate for HDAPC PTSA"
group.long 0x450++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER  ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x618++0x03
line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK2          ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x550++0x03
line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AUD          ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x610++0x03
line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2         ,DDA rate for GK2 PTSA"
group.long 0x4A8++0x03
line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_ISP          ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x428++0x03
line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB        ,DDA rate for DISB PTSA"
group.long 0x49C++0x03
line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE2          ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x638++0x03
line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DFD          ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x50C++0x03
line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP        ,DDA rate for FTOP PTSA"
group.long 0x488++0x03
line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC     ,DDA rate for A9AVPPC PTSA"
group.long 0x498++0x03
line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE2          ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x52C++0x03
line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBX         ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x41C++0x03
line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS         ,DDA rate for DIS PTSA"
group.long 0x538++0x03
line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBD         ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x490++0x03
line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC      ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x524++0x03
line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX        ,DDA rate for USBX PTSA"
group.long 0x514++0x03
line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP         ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x630++0x03
line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC        ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D0++0x03
line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD          ,DDA rate for SD PTSA"
group.long 0x634++0x03
line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD         ,DDA rate for DFD PTSA"
group.long 0x510++0x03
line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP         ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x61C++0x03
line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM         ,DDA rate for SDM PTSA"
group.long 0x4DC++0x03
line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB         ,DDA rate for AHB PTSA"
group.long 0x460++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU    ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x444++0x03
line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING2        ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x620++0x03
line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SDM          ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4E8++0x03
line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB         ,DDA rate for APB PTSA"
group.long 0x4C8++0x03
line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MSE          ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x518++0x03
line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST        ,DDA rate for HOST PTSA"
group.long 0x434++0x03
line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE          ,DDA rate for VE PTSA"
group.long 0x4E4++0x03
line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AHB          ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4BC++0x03
line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SAX          ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x45C++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU    ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A4++0x03
line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_ISP          ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x520++0x03
line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HOST         ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C0++0x03
line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SAX          ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x438++0x03
line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE           ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x540++0x03
line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK           ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4CC++0x03
line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MSE          ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x430++0x03
line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DISB         ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x42C++0x03
line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DISB         ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x458++0x03
line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU   ,DDA rate for SMMU_SMMU PTSA"
group.long 0x494++0x03
line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2         ,DDA rate for VE2 PTSA"
group.long 0x53C++0x03
line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK          ,DDA rate for GK PTSA"
textline " "
group.long 0x960++0x03
line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register"
bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1"
hexmask.long.word 0x00 0.--11. 1. "     PTSA_GRANT_DECREMENT_FRAC ,Fractional portion"
textline " "
width 39.
group.long 0x2E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W              ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AVPCARM7R              ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW                 ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AXIAPR                 ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x380++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW              ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_DEVR              ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x384++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB                 ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3BC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA               ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMWRAA               ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3B8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA                ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRA                ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x370++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA                  ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR                  ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SESRD                  ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x374++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB                  ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWA                  ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B              ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0A              ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x394++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR                 ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_VICSRD                 ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB             ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3D8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR               ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVDECSRD               ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2FC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB             ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x390++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR                ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRD                ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT               ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAYHC              ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request"
group.long 0x694++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x348++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW            ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAW            ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x37C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW             ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_HOSTR             ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x344++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR            ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAR            ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB               ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRDB               ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW                   ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AFIR                   ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x698++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B  ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0B  ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C              ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3DC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW                   ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_APER                   ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A0++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C  ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0C  ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW               ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_A9AVPSCR               ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2                ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD2                ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB             ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0AB             ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x314++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW                ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW                 ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCR                 ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR               ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVJPGSRD               ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x34C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR                   ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW                   ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ETRR                   ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x320++0x03
line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW                ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_MPCORER                ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x398++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW                    ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x69C++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A4++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x350++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW                  ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SATAR                  ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x690++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A  ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0A  ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x310++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR                ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HOST1XDMAR             ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD               ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3AC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR                 ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD                 ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB               ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRAB               ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x388++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB                 ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWAB                 ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x328++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR               ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVENCSRD               ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x318++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW                   ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HDAR                   ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request"
endif
width 0x0B
tree.end
tree "MC0"
base ad:0x02C20000
width 19.
group.long 0x00++0x07
line.long 0x00 "INTSTATUS_0,Interrupt Status Register"
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT     ,Generalized carve out interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "        DECERR_MTS_INT                  ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECERR_SEC_INT            ,The request violated the SEC carve out requirements" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 12. " DECERR_VPR_INT                      ,The request violated the VPR requirements" "No interrupt,Interrupt"
bitfld.long 0x00 11. "        INVALID_APB_ASID_UPDATE_INT     ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INVALID_SMMU_PAGE_INT     ,Address translation error" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INT                ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt"
bitfld.long 0x00 8. "        SECURITY_VIOLATION_INT          ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  DECERR_EMEM_INT           ,Address translation error EMEM address decode error" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 16. "            DECERR_MTS_INTMASK              ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 13. "      SECERR_SEC_INTMASK        ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 12. " DECERR_VPR_INTMASK                  ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 11. "            INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 10. "      INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK            ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 8. "            SECURITY_VIOLATION_INTMASK      ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 6. "      DECERR_EMEM_INTMASK       ,EMEM address decode error interrupt mask" "Masked,Unmasked"
textline "                            "
sif (cpuis("TEGRAX2"))
group.long 0xEC4++0x03
line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register"
bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY                    ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 18. "            SCRUB_ECC_WR_ACK_INTPRIORITY        ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 16. "            DECERR_MTS_INTPRIORITY              ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY                  ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 12. "            DECERR_VPR_INTPRIORITY              ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY      ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 10. "            INVALID_SMMU_PAGE_INTPRIORITY       ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY            ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 8. "            SECURITY_VIOLATION_INTPRIORITY      ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY                 ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
endif
if ((per.l(ad:0x02C20000+0x08)&0x70000000)==0x60000000)
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE  ,Invalid SMMU page error page permission was readable" "Not readable,Readable"
textline "                            "
bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE      ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable"
bitfld.long 0x00 25. "       ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure"
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
else
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
endif
rgroup.long 0x0C++0x03
line.long 0x00 "ERR_ADR_0,Error Data Capture Address"
textline "                            "
sif (!cpuis("TEGRAX2"))
group.long 0x10++0x13
line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register"
bitfld.long 0x00 0. " SMMU_ENABLE                         ,SMMU enable" "Disabled,Enabled"
line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register"
bitfld.long 0x04 31. " TLB_STATS_ENABLE                    ,Enable TLB hit and miss counters" "Disabled,Enabled"
bitfld.long 0x04 30. "            TLB_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x04 29. "      TLB_HIT_UNDER_MISS        ,Allow hits to pass misses in the TLB" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION         ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "            TLB_ACTIVE_LINES                ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register"
bitfld.long 0x08 31. " PTC_STATS_ENABLE                    ,Enable PTC hit and miss counters" "Disabled,Enabled"
bitfld.long 0x08 30. "            PTC_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x08 29. "      PTC_CACHE_ENABLE          ,Enable the PTC cache" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT                       ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--11. 1. "                  PTC_LINE_MASK                   ,XOR pattern for line generation"
hexmask.long.byte 0x08 0.--6. 1. "            PTC_INDEX_MAP             ,XOR pattern for tag generation"
line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register"
hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID                        ,ASID used to address SMMUT PTB register"
line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register"
bitfld.long 0x10 31. " ASID_READABLE                       ,Allow reads for this ASID" "Not allowed,Allowed"
bitfld.long 0x10 30. "         ASID_WRITEABLE                  ,Allow writes for this ASID" "Not allowed,Allowed"
textline "                            "
bitfld.long 0x10 29. " ASID_NONSECURE                      ,Allow non-secure access for this ASID" "Not allowed,Allowed"
hexmask.long.tbyte 0x10 0.--21. 1. "         ASID_PDE_BASE                   ,Pointer to page of PDEs"
group.long 0x30++0x07
line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register"
bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH                ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "            TLB_FLUSH_ASID                  ,ASID to match"
hexmask.long.tbyte 0x00 2.--19. 1. "            TLB_FLUSH_VA_GROUP        ,Virtual address to match for group flashes"
textline "                            "
bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH                  ,Flushing control" "All,,Section,Group"
line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register"
hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR                       ,Physical address of PTE group"
bitfld.long 0x04 3. "            PTC_NO_WAIT_IDLE_FLUSH          ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled"
bitfld.long 0x04 0. "      PTC_FLUSH_TYPE            ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr"
endif
textline "                              "
width 37.
if (((per.l(ad:0x02C20000+0x664))&0x01)==0x00)
group.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_BOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
group.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
group.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,Mask is ANDed with address and the resulting value is XORed to a single bit"
endif
group.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
else
rgroup.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_DOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
rgroup.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
rgroup.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,EMEM channel mask bits"
endif
rgroup.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
endif
group.long 0x70++0x07
line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base"
hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM           ,Base of the secured region"
line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound"
hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB       ,Size in MB of the secured region"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x07
line.long 0x00 "SECURITY_CFG3_0,Security Config3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI        ,SECURITY BOM HI" "0,1,2,3"
endif
group.long 0x90++0x37
line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration"
hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update"
hexmask.long.word 0x00 0.--8. 1. "        CYCLES_PER_UPDATE             ,Number of MCCLK cycles per deadline timer update"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING      ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled"
bitfld.long 0x04 30. "  LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x04 16.--24. 1. "       ARB_OUTSTANDING_COUNT  ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "      ARB_MAX_OUTSTANDING           ,Maximum number of requests"
textline "                                        "
line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD"
bitfld.long 0x08 0.--5. " RCD                    ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP"
hexmask.long.byte 0x0C 0.--6. 1. " RP                     ,Minimum number of cycles between an internal precharge and activate command to the same bank"
line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC"
hexmask.long.byte 0x10 0.--7. 1. " RC                     ,Minimum number of cycles between activate commands to the same bank"
line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS"
hexmask.long.byte 0x14 0.--6. 1. " RAS                    ,Minimum number of cycles between activate and precharge command to the same bank"
line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW"
bitfld.long 0x18 0.--5. " FAW                    ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD"
bitfld.long 0x1C 0.--4. " RRD                    ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE"
hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE                ,Minimum number of cycles between read and internal precharge commands"
line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE"
hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE                ,Minimum number of cycles between write and internal precharge commands"
line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R"
bitfld.long 0x28 0.--4. " R2R                    ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W"
bitfld.long 0x2C 0.--4. " W2W                    ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W"
hexmask.long.byte 0x30 0.--6. 1. " R2W                    ,Number of cycles to turn the bus from reads to writes"
line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R"
hexmask.long.byte 0x34 0.--6. 1. " W2R                    ,Number of cycles to turn the bus from reads to writes"
group.long 0xD0++0x0F
line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0"
hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN               ,Bubbles produced by a write to read bus turn"
hexmask.long.byte 0x00 16.--23. 1. "        R2W_TURN                      ,Bubbles produced by a read to write bys turn"
hexmask.long.byte 0x00 8.--15. 1. "          W2W_TURN           ,Bubbles produced by a write to write (other device) bus turn"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "       R2R_TURN               ,Bubbles produced by a read to read (other device) bus turn"
line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers"
hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER            ,Cost to cover the activate-to-write delay"
hexmask.long.byte 0x04 8.--15. 1. "        RCD_R_COVER                   ,Cost to cover the activate-to-read delay"
hexmask.long.byte 0x04 0.--7. 1. "          RC_COVER           ,Cost to cover the activate-to-activate delay"
textline "                                        "
line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds"
bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE                          ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 27. "                    MC_EMC_SAME_FREQ                               ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC"
textline "                                        "
bitfld.long 0x08 21.--26. "       EXPIRING_SOON_SLACK_THRESHOLD                 ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--20. "                   PRIORITY_INVERSION_ISO_THRESHOLD               ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x08 15. "       EMC_REQ_B2B_XFER                              ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled"
hexmask.long.byte 0x08 8.--14. 1. "             PRIORITY_INVERSION_THRESHOLD                   ,Maximum number of unexpired requests"
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. "       B2AA_HOLDOFF_THRESHOLD                        ,Activation hold off threshold"
line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1"
bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD         ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--25. "                   REFRESH_ACK_THRESHOLD_USAGE                    ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..."
textline "                                        "
bitfld.long 0x0C 21.--23. "       EXPIRING_SOON_SLACK_THRESHOLD_PD              ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..."
hexmask.long.word 0x0C 4.--12. 1. "  ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD        ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format"
textline "                                        "
bitfld.long 0x0C 3. "       COMBINED_INTERRUPT_MODE                       ,Combined interrupt mode" "Independent,Shadowed"
bitfld.long 0x0C 2. "          BLOCK_LP_CPU_WR_IF_SMMU_INP_HP                 ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked"
textline "                                        "
bitfld.long 0x0C 1. "       ALLOW_BCA_HOLDOFF_WHN_EXP                     ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled"
bitfld.long 0x0C 0. "             BLOCK_LP_CPU_RD_IF_SMMU_INP_HP                 ,Low priority CPU reads get blocked" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2"
bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS                             ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled"
group.long 0xE0++0x07
line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH                    ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   RING1-THROTTLE_CYCLES_LOW                      ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES                         ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x6B0++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle "
bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT  ,NISO throttle disable count event" "Disabled,Enabled"
bitfld.long 0x00 16.--21. "           RING1_THROTTLE_CYCLES_HIGH          ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                              "
bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES             ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x664++0x0B
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access" "Disabled,Enabled"
line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register"
bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU STRICT TZ aperture check" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter"
bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding ring3" "Disabled,Enabled"
bitfld.long 0x08 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x08 0.--8. 1. "               ARB_MAX_OUTSTANDING_RING3           ,ARB maximum outstanding ring3"
group.long 0x6B4++0x0B
line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter"
bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO           ,Limit outstanding NISO" "Disabled,Enabled"
bitfld.long 0x00 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_NISO  ,Limit during hold off override NISO" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x00 0.--8. 1. "               ARB_MAX_OUTSTANDING_NISO            ,The maximum number of requests allowed in the arbiter"
line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask"
bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC         ,NISO throttle mask VICPC" "Disabled,Enabled"
bitfld.long 0x04 28. "           NISO_THROTTLE_MASK_USBD             ,NISO throttle mask USBD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST          ,NISO throttle mask HOST" "Disabled,Enabled"
bitfld.long 0x04 23. "           NISO_THROTTLE_MASK_SD               ,NISO throttle mask SD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK            ,NISO throttle mask GK" "Disabled,Enabled"
bitfld.long 0x04 19. "           NISO_THROTTLE_MASK_MSE              ,NISO throttle mask MSE" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX          ,NISO throttle mask USBX" "Disabled,Enabled"
bitfld.long 0x04 9. "           NISO_THROTTLE_MASK_SAX              ,NISO throttle mask SAX" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX           ,NISO throttle mask PCX" "Disabled,Enabled"
bitfld.long 0x04 3. "           NISO_THROTTLE_MASK_AVP              ,NISO throttle mask AVP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB           ,NISO throttle mask APB" "Disabled,Enabled"
bitfld.long 0x04 1. "           NISO_THROTTLE_MASK_AHB              ,NISO throttle mask AHB" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask"
bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled"
bitfld.long 0x08 15. "           RING0_THROTTLE_MASK_RING1_OUTPUT    ,Ring0 throttle mask ring1 output" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1        ,Ring0 throttle mask ring1" "Disabled,Enabled"
bitfld.long 0x08 6. "           RING0_THROTTLE_MASK_FTOP            ,Ring0 throttle mask FTOP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC          ,Ring0 throttle mask PTC" "Disabled,Enabled"
bitfld.long 0x08 0. "           RING0_THROTTLE_MASK_MPCORER         ,Ring0 throttle mask MPCORER" "Disabled,Enabled"
group.long 0xB80++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD           ,NISO throttle mask DFD" "Disabled,Enabled"
bitfld.long 0x00 4. "           NISO_THROTTLE_MASK_HDAPC            ,NISO throttle mask HDAPC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM           ,NISO throttle mask SDM" "Disabled,Enabled"
bitfld.long 0x00 2. "           NISO_THROTTLE_MASK_GK2              ,NISO throttle mask GK2" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG           ,NISO throttle mask JPG" "Disabled,Enabled"
group.long 0x670++0x07
line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB              ,SEC carve out size MB"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x678++0x03
line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0"
bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3"
bitfld.long 0x00 18. "                  ERR_SEC_SWAP                        ,Error security swap" "No error,Error"
textline "                                              "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Error secure security" "Non secure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                                              "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 0.--6. 1. "                  ERR_SEC_ID                          ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slow EMCCLK during DSR" "Disabled,Enabled"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x6C0++0x07
line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration"
hexmask.long.word 0x00 0.--8. 1. " RFCPB                            ,PMC specifies the per-bank auto refresh cycle time"
line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW"
bitfld.long 0x04 0.--5. " CCDMW                            ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,Open work control threshold"
hexmask.long.byte 0x00 8.--14. 1. "                 REFPB_THRESH_DISABLE_HP             ,Low priority control threshold"
textline "                                              "
hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP           ,High priority control threshold"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,Explicit bank mode" "0,1"
hexmask.long.byte 0x04 8.--14. 1. "                  REFPB_THRESH_DISABLE_FORCE_CLOSE    ,Force bank closure,low threshold"
textline "                                              "
hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE  ,Force bank closure,high threshold"
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "           ETR_FLUSH_ENABLE                    ,ETR flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "           NVJPG_FLUSH_ENABLE                  ,NVJPG flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           APE_FLUSH_ENABLE                    ,APE flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           GPU_FLUSH_ENABLE                    ,GPU flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           SDMMC4A_FLUSH_ENABLE                ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "In progress,Done"
bitfld.long 0x04 12. "        ETR_HOTRESET_STATUS                 ,ETR hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "In progress,Done"
bitfld.long 0x04 8. "        NVJPG_HOTRESET_STATUS               ,NVJPG hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "In progress,Done"
bitfld.long 0x04 6. "        APE_HOTRESET_STATUS                 ,APE hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "In progress,Done"
bitfld.long 0x04 2. "        GPU_HOTRESET_STATUS                 ,GPU hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "In progress,Done"
bitfld.long 0x04 0. "        SDMMC4A_HOTRESET_STATUS             ,SDMMC4A hot reset status" "In progress,Done"
textline "                                              "
endif
sif (!cpuis("TEGRAX2"))
group.long 0xE8++0x07
line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides"
bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE          ,FIFO deadlock check override" "Disabled,Enabled"
bitfld.long 0x00 28. "             ARB_EMEM_SPO_OVERRIDE                          ,EMEM SPO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 27. "       ARB_EMEM_AP_OVERRIDE                          ,EMEM AP override" "Disabled,Enabled"
bitfld.long 0x00 26. "             ARB_HUM_FIFO_OVERRIDE                          ,Hum FIFO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 23. "       ISO_TA_OVERRIDE                               ,ISO TA override" "Disabled,Enabled"
bitfld.long 0x00 22. "             ISO_DA_OVERRIDE                                ,ISO DA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_BC_INHERIT_ON_PRIINV_OVERRIDE             ,ISO BC inherit on PRINV override" "Disabled,Enabled"
bitfld.long 0x00 20. "             ISO_BC_CAUSE_PRIINV_OVERRIDE                   ,ISO BC cause PRINV override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 19. "       ISO_BA_OVERRIDE                               ,ISO_BA override" "Disabled,Enabled"
bitfld.long 0x00 18. "             ISO_AA_OVERRIDE                                ,ISO AA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 17. "       ARB_EMEM_BUBBLECALC_OVERRIDE                  ,EMEM bubble CALC override" "Disabled,Enabled"
bitfld.long 0x00 16. "             ALLOC_ONE_BQ_PER_CLIENT                        ,Allocate one BQ per client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 14. "             PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 13. "       PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE     ,Priority inversion threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 12. "             PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE     ,Priority inversion bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 11. "       PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE  ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled"
bitfld.long 0x00 10. "             OBSERVED_DIRECTION_OVERRIDE                    ,Observed direction override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 9. "       BC2AA_HOLDHOFF_OVERRIDE                       ,BC2AA hold off override" "Disabled,Enabled"
bitfld.long 0x00 8. "             TS2AA_HOLDHOFF_OVERRIDE                        ,TS2AA hold off override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 4. "       EXPIRE_UPDATE_OVERRIDE                        ,Expire update override" "Disabled,Enabled"
bitfld.long 0x00 3. "             GPU_SLICE_MERGE_OVERRIDE                       ,Combine GPU traffic override" "Disabled,Enabled"
textline "                                        "
line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved"
hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3"
hexmask.long.byte 0x04 16.--23. 1. "           EMEM_ARB_RESERVED_BYTE2  ,EMEM ARB reserved byte2"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. "       EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 "
hexmask.long.byte 0x04 0.--7. 1. "           EMEM_ARB_RESERVED_BYTE0  ,EMEM ARB reserved byte0"
group.long 0x0F4++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides"
bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR      ,EMC response clock override" "Gated,Override"
bitfld.long 0x00 14. "     TSR_CLKEN_OVR            ,EARB TSR clock override" "Gated,Override"
textline "                                        "
bitfld.long 0x00 13. "       RING2_CLKEN_OVR         ,Ring2 clock override" "Gated,Always on"
bitfld.long 0x00 12. "    RING1_CLKEN_OVR          ,Ring1 clock override" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 11. "       CH_DDA_CLKEN_OVR        ,CH_DDA_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 10. "    HUB_DDA_CLKEN_OVR        ,HUB_DDA_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 9. "       WCAM_CLKEN_OVR          ,WCAM_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 8. "    PTC_CACHE_CLKEN_OVR      ,PTC_CACHE_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 7. "       PTC_CLKEN_OVR           ,PTC_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 6. "    TLB_CLKEN_OVR            ,TLB_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 5. "       WB_CLKEN_OVR            ,WB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 3. "    REGS_CLKEN_OVR           ,REGS_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 2. "       EARB_CLKEN_OVR          ,EARB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 0. "    CIF_CLKEN_OVR            ,CIF_CLKEN_OVR" "Gated,Always on"
group.long 0x0FC++0x07
line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger"
bitfld.long 0x00 0. " TIMING_UPDATE           ,Trigger a timing update event" "No trigger,Trigger"
textline "                                        "
line.long 0x04 "STAT_CONTROL_0,Statistic Control"
bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER     ,EMC PM stop trigger" "No trigger,Trigger"
bitfld.long 0x04 2. "   EMC_PM_START_TRIGGER     ,EEMC PM start trigger" "No trigger,Trigger"
textline "                                        "
bitfld.long 0x04 0.--1. "       EMC_GATHER              ,EMC gather" "RST,,Disabled,Enabled"
textline "                                        "
endif
group.long 0x200++0x03
line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE    ,SDMMC3A flush enable" "Disabled,Enabled"
bitfld.long 0x00 30. "     SDMMC2A_FLUSH_ENABLE     ,SDMMC2A flush enable" "Disabled,Enabled"
bitfld.long 0x00 29. "     SDMMC1A_FLUSH_ENABLE      ,SDMMC1A flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_FLUSH_ENABLE       ,TSEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 20. "     XUSB_DEV_FLUSH_ENABLE    ,XUSB DEV flush enable" "Disabled,Enabled"
bitfld.long 0x00 19. "     XUSB_HOST_FLUSH_ENABLE    ,XUSB host flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 18. "       VIC_FLUSH_ENABLE        ,VIC flush enable" "Disabled,Enabled"
bitfld.long 0x00 17. "     VI_FLUSH_ENABLE          ,VI flush enable" "Disabled,Enabled"
bitfld.long 0x00 15. "     SATA_FLUSH_ENABLE         ,SATA flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_FLUSH_ENABLE       ,PPCS flush enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     NVENC_FLUSH_ENABLE       ,NVENC flush enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     MPCORE_FLUSH_ENABLE       ,MPCORE flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_FLUSH_ENABLE       ,ISP2 flush enable" "Disabled,Enabled"
bitfld.long 0x00 7. "     HDA_FLUSH_ENABLE         ,HDA flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     HC_FLUSH_ENABLE           ,HC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 3. "       DCB_FLUSH_ENABLE        ,DCB flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     DC_FLUSH_ENABLE          ,DC flush enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     AVPC_FLUSH_ENABLE         ,AVPC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. "       AFI_FLUSH_ENABLE        ,AFI flush enable" "Disabled,Enabled"
rgroup.long 0x204++0x03
line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register"
bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done"
bitfld.long 0x00 30. "  SDMMC2A_HOTRESET_STATUS  ,SDMMC2A flush status" "In progress,Done"
bitfld.long 0x00 29. "  SDMMC1A_HOTRESET_STATUS   ,SDMMC1A flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_HOTRESET_STATUS    ,TSEC flush status" "In progress,Done"
bitfld.long 0x00 20. "  XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done"
bitfld.long 0x00 19. "  XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 18. "       VIC_HOTRESET_STATUS     ,VIC flush status" "In progress,Done"
bitfld.long 0x00 17. "  VI_HOTRESET_STATUS       ,VI flush status" "In progress,Done"
bitfld.long 0x00 15. "  SATA_HOTRESET_STATUS      ,SATA flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_HOTRESET_STATUS    ,PPCS flush status" "In progress,Done"
bitfld.long 0x00 11. "  NVENC_HOTRESET_STATUS    ,NVENC flush status" "In progress,Done"
bitfld.long 0x00 9. "  MPCORE_HOTRESET_STATUS    ,MPCORE flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_HOTRESET_STATUS    ,ISP flush status" "In progress,Done"
bitfld.long 0x00 7. "  HDA_HOTRESET_STATUS      ,HDA flush status" "In progress,Done"
bitfld.long 0x00 6. "  HC_HOTRESET_STATUS        ,HC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 3. "       DCB_HOTRESET_STATUS     ,DCB flush status" "In progress,Done"
bitfld.long 0x00 2. "  DC_HOTRESET_STATUS       ,DC flush status" "In progress,Done"
bitfld.long 0x00 1. "  AVPC_HOTRESET_STATUS      ,AVPC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 0. "       AFI_HOTRESET_STATUS     ,AFI flush status" "In progress,Done"
group.long 0x208++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings"
bitfld.long 0x00 31. " ISO_SATAR               ,Client SATAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 30. "     ISO_PPCSAHBSLVR          ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 29. "     ISO_PPCSAHBDMAR           ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       ISO_NVENCCSRD           ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 23. "     ISO_HOST1XR              ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 22. "     ISO_HOST1XDMAR            ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_HDAR                ,Client HDAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 17. "     ISO_DISPLAYHCB           ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 16. "     ISO_DISPLAYHC             ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       ISO_AVPCARM7R           ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 14. "     ISO_AFIR                 ,Client AFIR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 6. "     ISO_DISPLAY0CB            ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       ISO_DISPLAY0C           ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_DISPLAY0BB           ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 3. "     ISO_DISPLAY0B             ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       ISO_DISPLAY0AB          ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_DISPLAY0A            ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 0. "     ISO_PTCR                  ,Client PTCR is treated as an isochronous client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings"
bitfld.long 0x04 29. " ISO_SATAW               ,Client SATAW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 28. "     ISO_PPCSAHBSLVW          ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 27. "     ISO_PPCSAHBDMAW           ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       ISO_MPCOREW             ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 22. "     ISO_HOST1XW              ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 21. "     ISO_HDAW                  ,Client HDAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 18. "       ISO_AVPCARM7W           ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 17. "     ISO_AFIW                 ,Client AFIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 11. "     ISO_NVENCSWR              ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. "       ISO_MPCORER             ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings"
bitfld.long 0x08 26. " ISO_DISPLAYT            ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 25. "     ISO_GPUSWR               ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 24. "     ISO_GPUSRD                ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       ISO_TSECSWR             ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 20. "     ISO_TSECSRD              ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 17. "     ISO_ISPWBB                ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       ISO_ISPWAB              ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 14. "     ISO_ISPRAB               ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 13. "     ISO_XUSB_DEVW             ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       ISO_XUSB_DEVR           ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 11. "     ISO_XUSB_HOSTW           ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 10. "     ISO_XUSB_HOSTR            ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       ISO_ISPWB               ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 6. "     ISO_ISPWA                ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 4. "     ISO_ISPRA                 ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings"
bitfld.long 0x0C 31. " ISO_NVJPGSWR            ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     ISO_NVJPGSRD             ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     ISO_APEW                  ,Client APEW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       ISO_APER                ,Client APER is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     ISO_NVDECSWR             ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     ISO_NVDECSRD              ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       ISO_DISPLAYD            ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     ISO_VIW                  ,Client VIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     ISO_VICSWR                ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       ISO_VICSRD              ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     ISO_SDMMCWAB             ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     ISO_SDMMCW                ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       ISO_SDMMCWAA            ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     ISO_SDMMCWA              ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     ISO_SDMMCRAB              ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       ISO_SDMMCR              ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     ISO_SDMMCRAA             ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     ISO_SDMMCCRA              ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xB94++0x03
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " SO_GPUSWR2              ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "     ISO_GPUSRD2              ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "     ISO_TSECSWRB              ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 6. "        ISO_TSECSRDB            ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "     ISO_ETRW                 ,Client ETRW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_ETRR                  ,Client ETRR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. "        ISO_AXIAPW              ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_AXIAPR               ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_SESWR                 ,Client SESWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_SESRD               ,Client SESRD is treated as an isochronous client" "Disabled,Enabled"
group.long 0xBA8++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0"
bitfld.long 0x00 3. " ISO_NVDECSRD1           ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_VICSRD1              ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_NVDISPLAYR1           ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_APEDMAW             ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled"
endif
group.long 0x218++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 31. " HYST_SATAR              ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "     HYST_PPCSAHBSLVR         ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "     HYST_PPCSAHBDMAR          ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       HYST_NVENCSRD           ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "     HYST_HOST1XR             ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "     HYST_HOST1XDMAR           ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       HYST_HDAR               ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "     HYST_DISPLAYHCB          ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "     HYST_DISPLAYHC            ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       HYST_AVPCARM7R          ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "     HYST_AFIR                ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "     HYST_DISPLAY0CB           ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       HYST_DISPLAY0C          ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "     HYST_DISPLAY0BB          ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "     HYST_DISPLAY0B            ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       HYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "     HYST_DISPLAY0A           ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "     HYST_PTCR                 ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings"
bitfld.long 0x04 29. " HYST_SATAW              ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "     HYST_PPCSAHBSLVW         ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "     HYST_PPCSAHBDMAW          ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       HYST_MPCOREW            ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled"
sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1"))
bitfld.long 0x04 24. "     HYST_MPCORELPW           ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled"
endif
bitfld.long 0x04 22. "     HYST_HOST1XW             ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 21. "       HYST_HDAW               ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "     HYST_AVPCARM7W           ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "     HYST_AFIW                 ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 11. "       HYST_NVENCSWR           ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "     HYST_MPCORER             ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings"
bitfld.long 0x08 26. " HYST_DISPLAYT           ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "     HYST_GPUSWR              ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "     HYST_GPUSRD               ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       HYST_TSECSWR            ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "     HYST_TSECSRD             ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "     HYST_ISPWBB               ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       HYST_ISPWAB             ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "     HYST_ISPRAB              ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "     HYST_XUSB_DEVW            ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       HYST_XUSB_DEVR          ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "     HYST_XUSB_HOSTW          ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "     HYST_XUSB_HOSTR           ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       HYST_ISPWB              ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "     HYST_ISPWA               ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "     HYST_ISPRA                ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings"
bitfld.long 0x0C 31. " HYST_NVJPGSWR           ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     HYST_NVJPGSRD            ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     HYST_APEW                 ,Client APEW is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       HYST_APER               ,Client APER is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     HYST_NVDECSWR            ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     HYST_NVDECSRD             ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       HYST_DISPLAYD           ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     HYST_VIW                 ,Client VIW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     HYST_VICSWR               ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       HYST_VICSRD             ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     HYST_SDMMCWAB            ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     HYST_SDMMCW               ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       HYST_SDMMCWAA           ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     HYST_SDMMCWA             ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     HYST_SDMMCRAB             ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       HYST_SDMMCR             ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     HYST_SDMMCRAA            ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     HYST_SDMCRA               ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0"
bitfld.long 0x00 31. " HYST_APEDMAR             ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  HYST_SCEDMAW          ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  HYST_SCEDMAR      ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " HYST_SCEW                ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 27. "  HYST_SCER             ,Client SCER is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 26. "  HYST_AONDMAW      ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. " HYST_AONDMAR             ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 24. "  HYST_AONW             ,Client AONW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  HYST_AONR         ,Client AONR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 22. " HYST_BPMPDMAW            ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 21. "  HYST_BPMPDMAR         ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 20. "  HYST_BPMPW        ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " HYST_BPMPR               ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 18. "  HYST_NVDISPLAYR       ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  HYST_UFSHCW       ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 16. " HYST_UFSHCR              ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 15. "  HYST_EQOSW            ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  HYST_EQOSR        ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " HYST_AXISW               ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 12. "  HYST_AXISR            ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 9. "  HYST_GPUSWR2      ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 8. " HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "  HYST_TSECSWRB         ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  HYST_TSECSRDB     ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  HYST_ETRR             ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_SESWR        ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_SESRD               ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBA4++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0"
bitfld.long 0x00 3. " HYST_NVDECSRD1           ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  HYST_VICSRD1          ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_NVDISPLAYR1  ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_APEDMAW             ,Client APEDMAW  is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR              ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  DHYST_PPCSAHBSLVR     ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " DHYST_NVENCSRD           ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  DHYST_HOST1XR         ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "  DHYST_HOST1XDMAR  ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " DHYST_HDAR               ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  DHYST_DISPLAYHCB      ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "  DHYST_DISPLAYHC   ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " DHYST_AVPCARM7R          ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  DHYST_AFIR            ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  DHYST_DISPLAY0CB  ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " DHYST_DISPLAY0C          ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  DHYST_DISPLAY0BB      ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "  DHYST_DISPLAY0B   ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_DISPLAY0A       ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "  DHYST_PTCR        ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW              ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "  DHYST_PPCSAHBSLVW     ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "  DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 25. " DHYST_MPCOREW            ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "  DHYST_HOST1XW         ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 21. "  DHYST_HDAW        ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 18. " DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "  DHYST_AFIW            ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 11. "  DHYST_NVENCSWR    ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " DHYST_MPCORER            ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT           ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "  DHYST_GPUSWR          ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "  DHYST_GPUSRD      ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 23. " DHYST_A9AVPSCW           ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 22. "  DHYST_A9AVPSCR        ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 21. "  DHYST_TSECSWR     ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 20. " DHYST_TSECSRD            ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "  DHYST_ISPWBB          ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 16. "  DHYST_ISPWAB      ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 14. " DHYST_ISPRAB             ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "  DHYST_XUSB_DEVW       ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 12. "  DHYST_XUSB_DEVR   ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 11. " DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "  DHYST_XUSB_HOSTR      ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 7. "  DHYST_ISPWB       ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 6. " DHYST_ISPWA              ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "  DHYST_ISPRA           ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR           ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "  DHYST_NVJPGSRD        ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "  DHYST_APEW        ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 26. " DHYST_APER               ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "  DHYST_NVDECSWR        ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "  DHYST_NVDECSRD    ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 19. " DHYST_DISPLAYD           ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "  DHYST_VIW             ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "  DHYST_VICSWR      ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 12. " DHYST_VICSRD             ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "  DHYST_SDMMCWAB        ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "  DHYST_SDMMCW      ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA           ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "  DHYST_SDMMCWA         ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "  DHYST_SDMMCRAB    ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 2. " DHYST_SDMMCR             ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "  DHYST_SDMMCRAA        ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "  DHYST_SDMMCRA     ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2            ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "  DHYST_GPUSRD2         ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "  DHYST_TSECSWRB    ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 6. " DHYST_TSECSRDB           ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "  DHYST_ETRW            ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "  DHYST_ETRR        ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 3. " DHYST_AXIAPW             ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "  DHYST_AXIAPR          ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "  DHYST_SESWR       ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 0. " DHYST_SESRD              ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBF0++0x03
line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 3. " DHYST_NVDECSRD1          ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  DHYST_VICSRD1         ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " DHYST_APEDMAW            ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic"
bitfld.long 0x00 31. " DHYST_ENABLE             ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x1F
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0        ,DHYST delay bin 0"
line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1"
hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1        ,DHYST delay bin 1"
line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2"
hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2        ,DHYST delay bin 2"
line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3"
hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3        ,DHYST delay bin 3"
line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4"
hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4        ,DHYST delay bin 4"
line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5"
hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5        ,DHYST delay bin 5"
line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6"
hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6        ,DHYST delay bin 6"
line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7"
hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7        ,DHYST delay bin 7"
group.long 0xA60++0x03
line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC   ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled"
group.long 0xA70++0x07
line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC    ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled"
line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0"
bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP     ,Response clock-enable override for partition client FTOP" "Disabled,Enabled"
group.long 0xA80++0x03
line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3   ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled"
group.long 0xA3C++0x03
line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG      ,Response clock-enable override for partition client JPG" "Disabled,Enabled"
group.long 0xA14++0x03
line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST     ,Response clock-enable override for partition client HOST" "Disabled,Enabled"
group.long 0x2AC++0x03
line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS      ,Response clock-enable override for partition client DIS" "Disabled,Enabled"
group.long 0xA78++0x03
line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled"
group.long 0xA1C++0x03
line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC    ,Response clock-enable override for partition client VICPC" "Disabled,Enabled"
group.long 0xA58++0x03
line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC  ,RCLKEN override UFSHCPC" "Disabled,Enabled"
group.long 0xA6C++0x03
line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x228++0x0F
line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables"
bitfld.long 0x00 31. " SMMU_SATAR_ENABLE       ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 30. "     SMMU_PPCSAHBSLVR_ENABLE  ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 29. "     SMMU_PPCSAHBDMAR_ENABLE   ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       SMMU_NVENCSRD_ENABLE    ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 23. "     SMMU_HOST1XR_ENABLE      ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 22. "     SMMU_HOST1XDMAR_ENABLE    ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       SMMU_HDAR_ENABLE        ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 17. "     SMMU_DISPLAYHCB_ENABLE   ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 16. "     SMMU_DISPLAYHC_ENABLE     ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       SMMU_AVPCARM7R_ENABLE   ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 14. "     SMMU_AFIR_ENABLE         ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 6. "     SMMU_DISPLAY0CB_ENABLE    ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       SMMU_DISPLAY0C_ENABLE   ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 4. "     SMMU_DISPLAY0BB_ENABLE   ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 3. "     SMMU_DISPLAY0B_ENABLE     ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       SMMU_DISPLAY0AB_ENABLE  ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 1. "     SMMU_DISPLAY0A_ENABLE    ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled"
line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables"
bitfld.long 0x04 29. " SMMU_SATAW_ENABLE       ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 28. "     SMMU_PPCSAHBSLVW_ENABLE  ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 27. "     SMMU_PPCSAHBDMAW_ENABLE   ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 22. "       SMMU_HOST1XW_ENABLE     ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 21. "     SMMU_HDAW_ENABLE         ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 18. "     SMMU_AVPCARM7W_ENABLE     ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 17. "       SMMU_AFIW_ENABLE        ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 11. "     SMMU_NVENCSWR_ENABLE     ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled"
line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables"
bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE    ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled"
rbitfld.long 0x08 25. "     SMMU_GPUSWR_ENABLE       ,GPU translation is handled by SWID" "Disabled,Enabled"
rbitfld.long 0x08 24. "     SMMU_GPUSRD_ENABLE        ,GPU translation is handled by SWID" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       SMMU_TSECSWR_ENABLE     ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 20. "     MMU_TSECSRD_ENABLE       ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 17. "     SMMU_ISPWBB_ENABLE        ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       SMMU_ISPWAB_ENABLE      ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 14. "     SMMU_ISPRAB_ENABLE       ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x08 13. "     SMMU_XUSB_DEVW_ENABLE     ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       SMMU_XUSB_DEVR_ENABLE   ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 11. "     SMMU_XUSB_HOSTW_ENABLE   ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 10. "     SMMU_XUSB_HOSTR_ENABLE    ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       SMMU_ISPWB_ENABLE       ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 6. "     SMMU_ISPWA_ENABLE        ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 4. "     SMMU_ISPRA_ENABLE         ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled"
line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables"
bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE    ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 30. "     SMMU_NVJPGSRD_ENABLE     ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SMMU_APEW_ENABLE          ,Enable client APEW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       SMMU_APER_ENABLE        ,Enable client APER to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 25. "     SMMU_NVDECSWR_ENABLE     ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 24. "     SMMU_NVDECSRD_ENABLE      ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       SMMU_DISPLAYD_ENABLE    ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 18. "     SMMU_VIW_ENABLE          ,Client VIW  translation to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 13. "     SMMU_VICSWR_ENABLE        ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       SMMU_VICSRD_ENABLE      ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x0C 7. "     SMMU_SDMMCWAB_ENABLE     ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 6. "     SMMU_SDMMCW_ENABLE        ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       SMMU_SDMMWAA_ENABLE     ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 4. "     SMMU_SDMMCWA_ENABLE      ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 3. "     SMMU_SDMMCRAB_ENABLE      ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       SMMU_SDMMCR_ENABLE      ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 1. "     SMMU_SDMMCRAA_ENABLE     ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 0. "     SMMU_SDMMCRA_ENABLE       ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled"
textline " "
width 23.
if (((per.l(ad:0x02C20000+0x238))&0x80000000)==0x80000000)
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  AFI_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AFI_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AFI_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AFI_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x23C))&0x80000000)==0x80000000)
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  AVPC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x240))&0x80000000)==0x80000000)
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DC_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x244))&0x80000000)==0x80000000)
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DCB_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DCB_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DCB_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DCB_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x250))&0x80000000)==0x80000000)
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  HC_ASID         ,ASID to use when VA[3332] == 0x0"
else
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x254))&0x80000000)==0x80000000)
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  HDA_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  HDA_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  HDA_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  HDA_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x258))&0x80000000)==0x80000000)
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  ISP2_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x264))&0x80000000)==0x80000000)
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " NVENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  NVENC_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " MSENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x268))&0x80000000)==0x80000000)
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV_ASID         ,ASID to use for NV translation" "0,1,2,3"
else
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x26C))&0x80000000)==0x80000000)
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV2_ASID        ,ASID to use for NV2 translation" "0,1,2,3"
else
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x270))&0x80000000)==0x80000000)
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  PPCS_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x274))&0x80000000)==0x80000000)
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  SATA_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SATA_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SATA_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SATA_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x280))&0x80000000)==0x80000000)
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  VI_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  VI_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  VI_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  VI_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x284))&0x80000000)==0x80000000)
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  VIC_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x288))&0x80000000)==0x80000000)
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x28C))&0x80000000)==0x80000000)
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x294))&0x80000000)==0x80000000)
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE  ,TSEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  TSEC_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_SMMU_ENABLE      ,TSEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0x298))&0x80000000)==0x80000000)
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " SMMU_ENABLE           ,PPCS1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  ASID            ,ASID to use when VA[3332] == 0x0"
else
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE     ,PPCS1 translation enable" "Disabled,Enabled"
endif
endif
width 34.
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x404++0x03
line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX      ,Response clock-enable override for partition client USBX" "Disabled,Enabled"
group.long 0x2B8++0x03
line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX       ,Response clock-enable override for partition client PCX" "Disabled,Enabled"
group.long 0xE08++0x03
line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2      ,Response clock-enable override for partition client MSE2" "Disabled,Enabled"
group.long 0xA7C++0x03
line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2    ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled"
group.long 0xA4C++0x03
line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD       ,Response clock-enable override for partition client DFD" "Disabled,Enabled"
group.long 0xE00++0x03
line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2      ,Response clock-enable override for partition client NVD2" "Disabled,Enabled"
group.long 0xA44++0x03
line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM       ,Response clock-enable override for partition client SDM" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB       ,Response clock-enable override for partition client APB" "Disabled,Enabled"
group.long 0xA08++0x03
line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP       ,Response clock-enable override for partition client ISP" "Disabled,Enabled"
group.long 0xA18++0x03
line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD      ,Response clock-enable override for partition client USBD" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE       ,Response clock-enable override for partition client MSE" "Disabled,Enabled"
group.long 0xA10++0x03
line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD       ,Response clock-enable override for partition client AUD" "Disabled,Enabled"
group.long 0xA54++0x03
line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC       ,Response clock-enable override for partition client NIC" "Disabled,Enabled"
group.long 0xA40++0x03
line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2       ,Response clock-enable override for partition client GK2" "Disabled,Enabled"
group.long 0xA64++0x03
line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled"
group.long 0xE04++0x03
line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3      ,Response clock-enable override for partition client NVD3" "Disabled,Enabled"
group.long 0x2C0++0x03
line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX       ,Response clock-enable override for partition client SAX" "Disabled,Enabled"
group.long 0xA5C++0x03
line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC    ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled"
group.long 0xA38++0x03
line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD       ,Response clock-enable override for partition client NVD" "Disabled,Enabled"
group.long 0xA50++0x03
line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1      ,Response clock-enable override for partition client SDM1" "Disabled,Enabled"
group.long 0xA48++0x03
line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC     ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled"
group.long 0xA68++0x03
line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC     ,Response clock-enable override for partition client AONPC" "Disabled,Enabled"
group.long 0xA04++0x03
line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD        ,Response clock-enable override for partition client SD" "Disabled,Enabled"
group.long 0xA84++0x03
line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2      ,Response clock-enable override for partition client DIS2" "Disabled,Enabled"
group.long 0x2D8++0x03
line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE        ,Response clock-enable override for partition client VE" "Disabled,Enabled"
group.long 0xA00++0x03
line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0"
bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES  ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled"
bitfld.long 0x00 3. "                 RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled"
textline "                                           "
endif
sif (!cpuis("TEGRAX2"))
group.long 0x418++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register"
bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE             ,SDMMC3A VPR override" "Disabled,Enabled"
bitfld.long 0x00 30. "          SDMMC2A_VPR_OVERRIDE                 ,SDMMC2A VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE             ,SDMMC1A VPR override" "Disabled,Enabled"
bitfld.long 0x00 26. "          DC1_VPR_OVERRIDE                     ,DC1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE               ,PPCS1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 22. "          TSEC_VPR_OVERRIDE                    ,TSEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE            ,XUSB SEV VPR override" "Disabled,Enabled"
bitfld.long 0x00 19. "          XUSB_HOST_VPR_OVERRIDE               ,XUSB HOST VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 18. " VIC_VPR_OVERRIDE                 ,VIC VPR override" "Disabled,Enabled"
bitfld.long 0x00 17. "          VI_VPR_OVERRIDE                      ,VI VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " SATA_VPR_OVERRIDE                ,SATA VPR override" "Disabled,Enabled"
bitfld.long 0x00 14. "          PPCS_VPR_OVERRIDE                    ,PPCS VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE               ,NVENC VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          MPCORE_VPR_OVERRIDE                  ,MPCORE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE                ,ISP2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          HDA_VPR_OVERRIDE                     ,HDA VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HC_VPR_OVERRIDE                  ,HC VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          DCB_VPR_OVERRIDE                     ,DCB VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DC_VPR_OVERRIDE                  ,DC VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          AVPC_VPR_OVERRIDE                    ,AVPC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " AFI_VPR_OVERRIDE                 ,AFI VPR override" "Disabled,Enabled"
group.long 0x590++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register"
bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE              ,NVDEC1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 15. "          TSECB1_VPR_OVERRIDE                  ,TSECB11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE               ,TSEC11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 13. "          TSECB_VPR_OVERRIDE                   ,TSECB1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 12. " ETR_VPR_OVERRIDE                 ,ETR1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 11. "          AXIAP_VPR_OVERRIDE                   ,AXIAP1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 10. " SE1_VPR_OVERRIDE                 ,SE11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          HC1_VPR_OVERRIDE                     ,HC11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE               ,NVJPG1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          SE_VPR_OVERRIDE                      ,SE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " APE_VPR_OVERRIDE                 ,APE VPR override" "Disabled,Enabled"
bitfld.long 0x00 5. "          NVDEC_VPR_OVERRIDE                   ,NVDEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE               ,PPCS2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          GPUB_VPR_OVERRIDE                    ,GBUP VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " GPU_VPR_OVERRIDE                 ,GPU VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          ISP2B_VPR_OVERRIDE                   ,ISP2B VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE             ,SDMMC4A VPR override" "Disabled,Enabled"
textline "                                           "
group.long 0x600++0x03
line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask"
hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0         ,TLB set selection mask 0"
group.long 0x608++0x03
line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection"
bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS   ,Display snap ring write access" "Enabled,Disabled"
bitfld.long 0x00 1. "          DISB_SNAP_RING                       ,DISB snap ring" "RING0,RING1"
textline "                                           "
bitfld.long 0x00 0. " DIS_SNAP_RING                    ,DIS snap ring" "RING0,RING1"
endif
sif (cpuis("TEGRAX2"))
group.long 0x648++0x07
line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0"
hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM                   ,Base address for the VPR address space"
line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB               ,Size of the VPR region in megabytes"
group.long 0x978++0x03
line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0"
bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI            ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3"
group.long 0x650++0x03
line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register  0"
bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled"
bitfld.long 0x00 0. "  VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1"
textline "                                           "
endif
rgroup.long 0x654++0x03
line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0"
bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI                   ,Higher address bits of erring address" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_VPR_SWAP                         ,Error VPR swap" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_VPR_SECURITY                 ,Error VPR security" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_VPR_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_VPR_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "              ERR_VPR_ID                           ,Client identifier"
rgroup.long 0x658++0x03
line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address"
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x03
line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI           ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3"
group.long 0xF80++0x07
line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB          ,Enable REGIF HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_MC                ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_EMC           ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0"
bitfld.long 0x04 31. " LOCK_REGIF_CONFIG         ,Lock REGIF configuration" "Disabled,Enabled"
bitfld.long 0x04 24.--25. "  ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3"
bitfld.long 0x04 16.--17. "      ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3"
textline "                                           "
bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "        ENABLE_REGIF_BROADCAST_EMC     ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF90++0x0F
line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_UNICAST0_MC       ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_UNICAST0_EMC  ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0"
bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3"
bitfld.long 0x04 8.--11. "         ENABLE_REGIF_UNICAST1_MC       ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "     ENABLE_REGIF_UNICAST1_EMC  ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3"
bitfld.long 0x08 8.--11. "         ENABLE_REGIF_UNICAST2_MC       ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "     ENABLE_REGIF_UNICAST2_EMC  ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3"
bitfld.long 0x0C 8.--11. "         ENABLE_REGIF_UNICAST3_MC       ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "     ENABLE_REGIF_UNICAST3_EMC  ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF2C++0x03
line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0"
bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT      ,SCRUB ECC WR ACK Interrupt" "Clear,Set"
group.long 0xF24++0x07
line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0"
bitfld.long 0x00 24. " COMMON_INTR               ,Common interrupt" "Clear,Set"
bitfld.long 0x00 17. "     HUB1_INTR                      ,Hub 1 interrupt" "Clear,Set"
bitfld.long 0x00 16. "  HUB0_INTR                  ,Hub 0 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 3. " MC3_INTR                  ,Channel 3 interrupt" "Clear,Set"
bitfld.long 0x00 2. "     MC2_INTR                       ,Channel 2 interrupt" "Clear,Set"
bitfld.long 0x00 1. "  MC1_INTR                   ,Channel 1 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 0. " MC0_INTR                  ,Channel 0 interrupt" "Clear,Set"
line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0"
bitfld.long 0x04 24. " COMMON_CRITICAL_INTR      ,Common critical interrupt" "Clear,Set"
bitfld.long 0x04 17. "     HUB1_CRITICAL_INTR             ,Hub 1 critical interrupt" "Clear,Set"
bitfld.long 0x04 16. "  HUB0_CRITICAL_INTR         ,Hub 0 critical interrupt." "Clear,Set"
textline "                                           "
bitfld.long 0x04 3. " MC3_CRITICAL_INTR         ,Channel 3 critical interrupt." "Clear,Set"
bitfld.long 0x04 2. "     MC2_CRITICAL_INTR              ,Channel 2 critical interrupt." "Clear,Set"
bitfld.long 0x04 1. "  MC1_CRITICAL_INTR          ,Channel 1 critical interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x04 0. " MC0_CRITICAL_INTR         ,Channel 0 critical interrupt" "Clear,Set"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x964++0x03
line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming"
bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS            ,IRAM configuration write access disable" "No,Yes"
group.long 0x664++0x03
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access disable" "No,Yes"
group.long 0x668++0x07
line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register"
bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU strict TrustZone aperture check enable" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding RING3" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_RING3            ,Maximum number of requests allowed in the arbiter when limit is enabled"
group.long 0x670++0x0B
line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0"
hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB             ,Size of the SEC carve out region"
line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0"
bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_SEC_SWAP                         ,ERR_SEC_SWAP" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Set if transaction was secure" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--6. 1. "              ERR_SEC_ID                           ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled"
group.long 0x6B0++0x17
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH        ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                NISO_THROTTLE_CYCLES                 ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO           ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDOFF_OVERRIDE_NISO   ,Overrides the limiting of NISO transactions" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_NISO             ,The maximum number of requests allowed in the arbiter"
line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC         ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 28. "          NISO_THROTTLE_MASK_USBD              ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST          ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 23. "          NISO_THROTTLE_MASK_SD                ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK            ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 19. "          NISO_THROTTLE_MASK_MSE               ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX          ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 9. "          NISO_THROTTLE_MASK_SAX               ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX           ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 3. "          NISO_THROTTLE_MASK_AVP               ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB           ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 1. "          NISO_THROTTLE_MASK_AHB               ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask"
bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled"
bitfld.long 0x0C 15. "          RING0_THROTTLE_MASK_RING1_OUTPUT     ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1        ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled"
bitfld.long 0x0C 6. "          RING0_THROTTLE_MASK_FTOP             ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC          ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x0C 0. "          RING0_THROTTLE_MASK_MPCORER          ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB"
hexmask.long.word 0x10 0.--8. 1. " RFCPB                            ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank"
line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW"
bitfld.long 0x14 0.--5. " CCDMW                            ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued"
textline "                                           "
hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP          ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority"
hexmask.long.byte 0x00 0.--6. 1. "                REFPB_THRESH_ENABLE_HP               ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled"
textline "                                           "
hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure"
hexmask.long.byte 0x04 0.--6. 1. "                REFPB_THRESH_ENABLE_FORCE_CLOSE      ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure"
group.long 0x968++0x03
line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0"
bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE       ,Multi-bank replay override enable" "Disabled,Enabled"
bitfld.long 0x00 5. "          EXPIRE_UPDATE_DEADLOCK_OVERRIDE      ,Expire update deadlock override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY        ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..."
bitfld.long 0x00 0.--1. "  CPU_WRITE_PAGE_OPEN_POLICY           ,CPU write page open policy" "Disabled,All,Eack_hint,?..."
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ETR_FLUSH_ENABLE                     ,ETR flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "          NVJPG_FLUSH_ENABLE                   ,NVJPG flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          APE_FLUSH_ENABLE                     ,APE flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "          GPU_FLUSH_ENABLE                     ,GPU flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          SDMMC4A_FLUSH_ENABLE                 ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "Done,In progress"
bitfld.long 0x04 12. "       ETR_HOTRESET_STATUS                  ,ETR hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "Done,In progress"
bitfld.long 0x04 8. "       NVJPG_HOTRESET_STATUS                ,NVJPG hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "Done,In progress"
bitfld.long 0x04 6. "       APE_HOTRESET_STATUS                  ,APE hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "Done,In progress"
bitfld.long 0x04 2. "       GPU_HOTRESET_STATUS                  ,GPU hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "Done,In progress"
bitfld.long 0x04 0. "       SDMMC4A_HOTRESET_STATUS              ,SDMMC4A hot reset status" "Done,In progress"
group.long 0x984++0x07
line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0"
line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0"
hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1     ,Video protect GPU override 1"
group.long 0x9A0++0x0F
line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM                 ,MTS carve out BOM"
line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB             ,MTS carve out size MB"
line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0"
bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI              ,MTS carve out BOM Hi" "0,1,2,3"
line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0"
bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS        ,MTS carve out write access" "Enabled,Disabled"
group.long 0x9B8++0x07
line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register"
bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI                 ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11"
line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration"
bitfld.long 0x04 0.--1. " SECURITY_BOM_HI                  ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11"
textline "                                           "
width 26.
if (((per.l(ad:0x02C20000+0x664))&0x01)==0x00)
group.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
else
rgroup.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
endif
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11"
if (((per.l(ad:0x02C20000+0xA88))&0x80000000)==0x80000000)
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      DC1_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC1_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC1_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC1_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xA94))&0x80000000)==0x80000000)
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xA98))&0x80000000)==0x80000000)
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xA9C))&0x80000000)==0x80000000)
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAA0))&0x80000000)==0x80000000)
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAA4))&0x80000000)==0x80000000)
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ISP2B_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2B_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2B_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2B_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAA8))&0x80000000)==0x80000000)
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPU_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPU_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPU_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPU_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAAC))&0x80000000)==0x80000000)
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPUB_ASID_3    ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPUB_ASID_2    ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPUB_ASID_1    ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPUB_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAB0))&0x80000000)==0x80000000)
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      PPCS2_ASID     ,ASID to use for PPCS2 translation"
else
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAB4))&0x80000000)==0x80000000)
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAB8))&0x80000000)==0x80000000)
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      APE_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xABC))&0x80000000)==0x80000000)
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAC0))&0x80000000)==0x80000000)
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVJPG_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAC4))&0x80000000)==0x80000000)
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      HC1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAC8))&0x80000000)==0x80000000)
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xACC))&0x80000000)==0x80000000)
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      AXIAP_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AXIAP_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AXIAP_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AXIAP_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAD0))&0x80000000)==0x80000000)
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ETR_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ETR_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ETR_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ETR_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAD4))&0x80000000)==0x80000000)
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAD8))&0x80000000)==0x80000000)
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSEC1_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC1_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC1_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC1_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xADC))&0x80000000)==0x80000000)
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB1_ASID_3  ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB1_ASID_2  ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB1_ASID_1  ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB1_ASID  ,ASID to use when VA[3332] == 0x0"
else
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C20000+0xAE0))&0x80000000)==0x80000000)
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC1_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
endif
textline " "
width 34.
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 4. "  NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 3. "  NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included"
textline "                                           "
bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 1. "  NISO_THROTTLE_MASK_JPG   ,Include JPG in the NISO meta-client group for throttling" "Not included,Included"
group.long 0xB84++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 9. " HYST_GPUSWR2           ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 8. "      HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "      HYST_TSECSWRB          ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HYST_TSECRDB           ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 5. "      HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      HYST_ETTR              ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " HYST_AXIAPW            ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "      HYST_AXIAPR              ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      HYST_SESWR             ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " HYST_SESRD             ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " ISO_GPUSWR2            ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "      ISO_GPUSRD2              ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "      ISO_TSECSWRB           ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " ISO_TSECRDB            ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "      ISO_ETRW                 ,Client ETRW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "      ISO_ETTR               ,Client ETTR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " ISO_AXIAPW             ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "      ISO_AXIAPR               ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "      ISO_SESWR              ,Client SESWR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " ISO_SESRD              ,Client SESRD is treated as a isochronous client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings"
rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE    ,Client GPUSWR2 translate by SMMU enable" ",Enabled"
rbitfld.long 0x00 8. "       SMMU_GPUSRD2_ENABLE      ,Client GPUSRD2 translate by SMMU enable" ",Enabled"
bitfld.long 0x00 7. "       SMMU_TSECSWRB_ENABLE   ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE    ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      SMMU_ETRW_ENABLE         ,Client ETRW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      SMMU_ETTR_ENABLE       ,Client ETTR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE     ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      SMMU_AXIAPR_ENABLE       ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SMMU_SESWR_ENABLE      ,Client SESWR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SMMU_SESRD_ENABLE      ,Client SESRD translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR            ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "      DHYST_PPCSAHBSLVR        ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "      DHYST_PPCSAHBDMAR      ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 28. " DHYST_NVENCSRD         ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "      DHYST_HOST1XR            ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "      DHYST_HOST1XDMAR       ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 21. " DHYST_HDAR             ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "      DHYST_DISPLAYHCB         ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "      DHYST_DISPLAYHC        ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " DHYST_AVPCARM7R        ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "      DHYST_AFIR               ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "      DHYST_DISPLAY0CB       ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " DHYST_DISPLAY0C        ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      DHYST_DISPLAY0BB         ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "      DHYST_DISPLAY0B        ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB       ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      DHYST_DISPLAY0A          ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "      DHYST_PTCR             ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW            ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "      DHYST_PPCSAHBSLVW        ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "      DHYST_PPCSAHBDMAW      ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 25. " DHYST_MPCOREW          ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 24. "      DHYST_MPCORELPW          ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "      DHYST_HOST1XW          ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 21. " DHYST_HDAW             ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "      DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "      DHYST_AFIW             ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 11. " DHYST_NVENCSWR         ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "      DHYST_MPCORER            ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT         ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "      DHYST_GPUSWR             ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "      DHYST_GPUSRD           ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 21. " DHYST_TSECSWR          ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "      DHYST_TSECSRD            ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "      DHYST_ISPWBB           ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 16. " DHYST_ISPWAB           ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "      DHYST_ISPRAB             ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "      DHYST_XUSB_DEVW        ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 12. " DHYST_XUSB_DEVR        ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "      DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "      DHYST_XUSB_HOSTR       ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " DHYST_ISPWB            ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "      DHYST_ISPWA              ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "      DHYST_ISPRA            ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR         ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DHYST_NVJPGSRD           ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "      DHYST_APEW             ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 26. " DHYST_APER             ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "      DHYST_NVDECSWR           ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "      DHYST_NVDECSRD         ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 19. " DHYST_DISPLAYD         ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "      DHYST_VIW                ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "      DHYST_VICSWR           ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 12. " DHYST_VICSRD           ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "      DHYST_SDMMCWAB           ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "      DHYST_SDMMCW           ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA         ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "      DHYST_SDMMCWA            ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "      DHYST_SDMMCRAB         ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " DHYST_SDMMCR           ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "      DHYST_SDMMCRAA           ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "      DHYST_SDMCRA           ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2          ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "      DHYST_GPUSRD2            ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "      DHYST_TSECSWRB         ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 6. " DHYST_TSECRDB          ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "      DHYST_ETRW               ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "      DHYST_ETTR             ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 3. " DHYST_AXIAPW           ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "      DHYST_AXIAPR             ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "      DHYST_SESWR            ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 0. " DHYST_SESRD            ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register"
bitfld.long 0x00 31. " DHYST_ENABLE           ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DHYST_BW_MON_INTERVAL    ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0      ,Timeout delay"
group.long 0xBD4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1      ,Timeout delay"
group.long 0xBD8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2      ,Timeout delay"
group.long 0xBDC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3      ,Timeout delay"
group.long 0xBE0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4      ,Timeout delay"
group.long 0xBE4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5      ,Timeout delay"
group.long 0xBE8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6      ,Timeout delay"
group.long 0xBEC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7      ,Timeout delay"
textline " "
width 25.
group.long 0x9DC++0x03
line.long 0x00 "DA_CONFIG0_0,DA Configuration Register"
bitfld.long 0x00 0. " NEW_ARB_SCHEME        ,New DA arbitration scheme use enable" "Disabled,Enabled"
textline " "
group.long 0x4E0++0x03
line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AHB          ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x54C++0x03
line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AUD          ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x44C++0x03
line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA"
group.long 0x440++0x03
line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2       ,DDA rate for RING2 PTSA"
group.long 0x530++0x03
line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD        ,DDA rate for USBD PTSA"
group.long 0x528++0x03
line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBX         ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBD         ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F0++0x03
line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_APB          ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x584++0x03
line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG         ,DDA rate for JPG PTSA"
group.long 0x420++0x03
line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DIS          ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4FC++0x03
line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AVP          ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F4++0x03
line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP         ,DDA rate for AVP PTSA"
group.long 0x480++0x03
line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING1        ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x424++0x03
line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DIS          ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D8++0x03
line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SD           ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C4++0x03
line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE         ,DDA rate for MSE PTSA"
group.long 0x558++0x03
line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC        ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B4++0x03
line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_PCX          ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A0++0x03
line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP         ,DDA rate for ISP PTSA"
group.long 0x48C++0x03
line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC      ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x448++0x03
line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING2        ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x548++0x03
line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD         ,DDA rate for AUD PTSA"
group.long 0x51C++0x03
line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HOST         ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x454++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER  ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D4++0x03
line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SD           ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1       ,DDA rate for RING1 PTSA"
group.long 0x588++0x03
line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_JPG          ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x62C++0x03
line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC        ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F8++0x03
line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AVP          ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x58C++0x03
line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_JPG          ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x63C++0x03
line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DFD          ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x554++0x03
line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC       ,DDA rate for VICPC PTSA"
group.long 0x544++0x03
line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK           ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x55C++0x03
line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC        ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x624++0x03
line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SDM          ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B8++0x03
line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX         ,DDA rate for SAX PTSA"
group.long 0x4B0++0x03
line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_PCX          ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4EC++0x03
line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_APB          ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x614++0x03
line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK2          ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4AC++0x03
line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX         ,DDA rate for PCX PTSA"
group.long 0x484++0x03
line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING1        ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x628++0x03
line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC       ,DDA rate for HDAPC PTSA"
group.long 0x450++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER  ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x618++0x03
line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK2          ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x550++0x03
line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AUD          ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x610++0x03
line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2         ,DDA rate for GK2 PTSA"
group.long 0x4A8++0x03
line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_ISP          ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x428++0x03
line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB        ,DDA rate for DISB PTSA"
group.long 0x49C++0x03
line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE2          ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x638++0x03
line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DFD          ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x50C++0x03
line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP        ,DDA rate for FTOP PTSA"
group.long 0x488++0x03
line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC     ,DDA rate for A9AVPPC PTSA"
group.long 0x498++0x03
line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE2          ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x52C++0x03
line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBX         ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x41C++0x03
line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS         ,DDA rate for DIS PTSA"
group.long 0x538++0x03
line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBD         ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x490++0x03
line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC      ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x524++0x03
line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX        ,DDA rate for USBX PTSA"
group.long 0x514++0x03
line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP         ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x630++0x03
line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC        ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D0++0x03
line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD          ,DDA rate for SD PTSA"
group.long 0x634++0x03
line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD         ,DDA rate for DFD PTSA"
group.long 0x510++0x03
line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP         ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x61C++0x03
line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM         ,DDA rate for SDM PTSA"
group.long 0x4DC++0x03
line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB         ,DDA rate for AHB PTSA"
group.long 0x460++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU    ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x444++0x03
line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING2        ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x620++0x03
line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SDM          ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4E8++0x03
line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB         ,DDA rate for APB PTSA"
group.long 0x4C8++0x03
line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MSE          ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x518++0x03
line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST        ,DDA rate for HOST PTSA"
group.long 0x434++0x03
line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE          ,DDA rate for VE PTSA"
group.long 0x4E4++0x03
line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AHB          ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4BC++0x03
line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SAX          ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x45C++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU    ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A4++0x03
line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_ISP          ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x520++0x03
line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HOST         ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C0++0x03
line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SAX          ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x438++0x03
line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE           ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x540++0x03
line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK           ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4CC++0x03
line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MSE          ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x430++0x03
line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DISB         ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x42C++0x03
line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DISB         ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x458++0x03
line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU   ,DDA rate for SMMU_SMMU PTSA"
group.long 0x494++0x03
line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2         ,DDA rate for VE2 PTSA"
group.long 0x53C++0x03
line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK          ,DDA rate for GK PTSA"
textline " "
group.long 0x960++0x03
line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register"
bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1"
hexmask.long.word 0x00 0.--11. 1. "     PTSA_GRANT_DECREMENT_FRAC ,Fractional portion"
textline " "
width 39.
group.long 0x2E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W              ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AVPCARM7R              ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW                 ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AXIAPR                 ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x380++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW              ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_DEVR              ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x384++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB                 ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3BC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA               ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMWRAA               ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3B8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA                ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRA                ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x370++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA                  ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR                  ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SESRD                  ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x374++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB                  ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWA                  ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B              ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0A              ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x394++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR                 ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_VICSRD                 ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB             ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3D8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR               ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVDECSRD               ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2FC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB             ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x390++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR                ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRD                ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT               ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAYHC              ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request"
group.long 0x694++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x348++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW            ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAW            ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x37C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW             ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_HOSTR             ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x344++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR            ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAR            ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB               ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRDB               ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW                   ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AFIR                   ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x698++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B  ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0B  ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C              ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3DC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW                   ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_APER                   ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A0++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C  ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0C  ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW               ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_A9AVPSCR               ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2                ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD2                ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB             ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0AB             ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x314++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW                ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW                 ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCR                 ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR               ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVJPGSRD               ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x34C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR                   ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW                   ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ETRR                   ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x320++0x03
line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW                ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_MPCORER                ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x398++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW                    ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x69C++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A4++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x350++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW                  ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SATAR                  ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x690++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A  ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0A  ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x310++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR                ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HOST1XDMAR             ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD               ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3AC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR                 ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD                 ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB               ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRAB               ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x388++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB                 ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWAB                 ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x328++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR               ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVENCSRD               ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x318++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW                   ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HDAR                   ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request"
endif
width 0x0B
tree.end
tree "MC1"
base ad:0x02C30000
width 19.
group.long 0x00++0x07
line.long 0x00 "INTSTATUS_0,Interrupt Status Register"
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT     ,Generalized carve out interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "        DECERR_MTS_INT                  ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECERR_SEC_INT            ,The request violated the SEC carve out requirements" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 12. " DECERR_VPR_INT                      ,The request violated the VPR requirements" "No interrupt,Interrupt"
bitfld.long 0x00 11. "        INVALID_APB_ASID_UPDATE_INT     ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INVALID_SMMU_PAGE_INT     ,Address translation error" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INT                ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt"
bitfld.long 0x00 8. "        SECURITY_VIOLATION_INT          ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  DECERR_EMEM_INT           ,Address translation error EMEM address decode error" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 16. "            DECERR_MTS_INTMASK              ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 13. "      SECERR_SEC_INTMASK        ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 12. " DECERR_VPR_INTMASK                  ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 11. "            INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 10. "      INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK            ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 8. "            SECURITY_VIOLATION_INTMASK      ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 6. "      DECERR_EMEM_INTMASK       ,EMEM address decode error interrupt mask" "Masked,Unmasked"
textline "                            "
sif (cpuis("TEGRAX2"))
group.long 0xEC4++0x03
line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register"
bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY                    ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 18. "            SCRUB_ECC_WR_ACK_INTPRIORITY        ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 16. "            DECERR_MTS_INTPRIORITY              ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY                  ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 12. "            DECERR_VPR_INTPRIORITY              ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY      ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 10. "            INVALID_SMMU_PAGE_INTPRIORITY       ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY            ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 8. "            SECURITY_VIOLATION_INTPRIORITY      ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY                 ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
endif
if ((per.l(ad:0x02C30000+0x08)&0x70000000)==0x60000000)
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE  ,Invalid SMMU page error page permission was readable" "Not readable,Readable"
textline "                            "
bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE      ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable"
bitfld.long 0x00 25. "       ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure"
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
else
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
endif
rgroup.long 0x0C++0x03
line.long 0x00 "ERR_ADR_0,Error Data Capture Address"
textline "                            "
sif (!cpuis("TEGRAX2"))
group.long 0x10++0x13
line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register"
bitfld.long 0x00 0. " SMMU_ENABLE                         ,SMMU enable" "Disabled,Enabled"
line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register"
bitfld.long 0x04 31. " TLB_STATS_ENABLE                    ,Enable TLB hit and miss counters" "Disabled,Enabled"
bitfld.long 0x04 30. "            TLB_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x04 29. "      TLB_HIT_UNDER_MISS        ,Allow hits to pass misses in the TLB" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION         ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "            TLB_ACTIVE_LINES                ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register"
bitfld.long 0x08 31. " PTC_STATS_ENABLE                    ,Enable PTC hit and miss counters" "Disabled,Enabled"
bitfld.long 0x08 30. "            PTC_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x08 29. "      PTC_CACHE_ENABLE          ,Enable the PTC cache" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT                       ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--11. 1. "                  PTC_LINE_MASK                   ,XOR pattern for line generation"
hexmask.long.byte 0x08 0.--6. 1. "            PTC_INDEX_MAP             ,XOR pattern for tag generation"
line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register"
hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID                        ,ASID used to address SMMUT PTB register"
line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register"
bitfld.long 0x10 31. " ASID_READABLE                       ,Allow reads for this ASID" "Not allowed,Allowed"
bitfld.long 0x10 30. "         ASID_WRITEABLE                  ,Allow writes for this ASID" "Not allowed,Allowed"
textline "                            "
bitfld.long 0x10 29. " ASID_NONSECURE                      ,Allow non-secure access for this ASID" "Not allowed,Allowed"
hexmask.long.tbyte 0x10 0.--21. 1. "         ASID_PDE_BASE                   ,Pointer to page of PDEs"
group.long 0x30++0x07
line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register"
bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH                ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "            TLB_FLUSH_ASID                  ,ASID to match"
hexmask.long.tbyte 0x00 2.--19. 1. "            TLB_FLUSH_VA_GROUP        ,Virtual address to match for group flashes"
textline "                            "
bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH                  ,Flushing control" "All,,Section,Group"
line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register"
hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR                       ,Physical address of PTE group"
bitfld.long 0x04 3. "            PTC_NO_WAIT_IDLE_FLUSH          ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled"
bitfld.long 0x04 0. "      PTC_FLUSH_TYPE            ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr"
endif
textline "                              "
width 37.
if (((per.l(ad:0x02C30000+0x664))&0x01)==0x00)
group.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_BOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
group.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
group.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,Mask is ANDed with address and the resulting value is XORed to a single bit"
endif
group.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
else
rgroup.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_DOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
rgroup.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
rgroup.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,EMEM channel mask bits"
endif
rgroup.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
endif
group.long 0x70++0x07
line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base"
hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM           ,Base of the secured region"
line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound"
hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB       ,Size in MB of the secured region"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x07
line.long 0x00 "SECURITY_CFG3_0,Security Config3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI        ,SECURITY BOM HI" "0,1,2,3"
endif
group.long 0x90++0x37
line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration"
hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update"
hexmask.long.word 0x00 0.--8. 1. "        CYCLES_PER_UPDATE             ,Number of MCCLK cycles per deadline timer update"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING      ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled"
bitfld.long 0x04 30. "  LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x04 16.--24. 1. "       ARB_OUTSTANDING_COUNT  ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "      ARB_MAX_OUTSTANDING           ,Maximum number of requests"
textline "                                        "
line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD"
bitfld.long 0x08 0.--5. " RCD                    ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP"
hexmask.long.byte 0x0C 0.--6. 1. " RP                     ,Minimum number of cycles between an internal precharge and activate command to the same bank"
line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC"
hexmask.long.byte 0x10 0.--7. 1. " RC                     ,Minimum number of cycles between activate commands to the same bank"
line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS"
hexmask.long.byte 0x14 0.--6. 1. " RAS                    ,Minimum number of cycles between activate and precharge command to the same bank"
line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW"
bitfld.long 0x18 0.--5. " FAW                    ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD"
bitfld.long 0x1C 0.--4. " RRD                    ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE"
hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE                ,Minimum number of cycles between read and internal precharge commands"
line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE"
hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE                ,Minimum number of cycles between write and internal precharge commands"
line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R"
bitfld.long 0x28 0.--4. " R2R                    ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W"
bitfld.long 0x2C 0.--4. " W2W                    ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W"
hexmask.long.byte 0x30 0.--6. 1. " R2W                    ,Number of cycles to turn the bus from reads to writes"
line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R"
hexmask.long.byte 0x34 0.--6. 1. " W2R                    ,Number of cycles to turn the bus from reads to writes"
group.long 0xD0++0x0F
line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0"
hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN               ,Bubbles produced by a write to read bus turn"
hexmask.long.byte 0x00 16.--23. 1. "        R2W_TURN                      ,Bubbles produced by a read to write bys turn"
hexmask.long.byte 0x00 8.--15. 1. "          W2W_TURN           ,Bubbles produced by a write to write (other device) bus turn"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "       R2R_TURN               ,Bubbles produced by a read to read (other device) bus turn"
line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers"
hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER            ,Cost to cover the activate-to-write delay"
hexmask.long.byte 0x04 8.--15. 1. "        RCD_R_COVER                   ,Cost to cover the activate-to-read delay"
hexmask.long.byte 0x04 0.--7. 1. "          RC_COVER           ,Cost to cover the activate-to-activate delay"
textline "                                        "
line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds"
bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE                          ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 27. "                    MC_EMC_SAME_FREQ                               ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC"
textline "                                        "
bitfld.long 0x08 21.--26. "       EXPIRING_SOON_SLACK_THRESHOLD                 ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--20. "                   PRIORITY_INVERSION_ISO_THRESHOLD               ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x08 15. "       EMC_REQ_B2B_XFER                              ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled"
hexmask.long.byte 0x08 8.--14. 1. "             PRIORITY_INVERSION_THRESHOLD                   ,Maximum number of unexpired requests"
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. "       B2AA_HOLDOFF_THRESHOLD                        ,Activation hold off threshold"
line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1"
bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD         ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--25. "                   REFRESH_ACK_THRESHOLD_USAGE                    ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..."
textline "                                        "
bitfld.long 0x0C 21.--23. "       EXPIRING_SOON_SLACK_THRESHOLD_PD              ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..."
hexmask.long.word 0x0C 4.--12. 1. "  ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD        ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format"
textline "                                        "
bitfld.long 0x0C 3. "       COMBINED_INTERRUPT_MODE                       ,Combined interrupt mode" "Independent,Shadowed"
bitfld.long 0x0C 2. "          BLOCK_LP_CPU_WR_IF_SMMU_INP_HP                 ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked"
textline "                                        "
bitfld.long 0x0C 1. "       ALLOW_BCA_HOLDOFF_WHN_EXP                     ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled"
bitfld.long 0x0C 0. "             BLOCK_LP_CPU_RD_IF_SMMU_INP_HP                 ,Low priority CPU reads get blocked" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2"
bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS                             ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled"
group.long 0xE0++0x07
line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH                    ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   RING1-THROTTLE_CYCLES_LOW                      ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES                         ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x6B0++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle "
bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT  ,NISO throttle disable count event" "Disabled,Enabled"
bitfld.long 0x00 16.--21. "           RING1_THROTTLE_CYCLES_HIGH          ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                              "
bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES             ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x664++0x0B
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access" "Disabled,Enabled"
line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register"
bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU STRICT TZ aperture check" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter"
bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding ring3" "Disabled,Enabled"
bitfld.long 0x08 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x08 0.--8. 1. "               ARB_MAX_OUTSTANDING_RING3           ,ARB maximum outstanding ring3"
group.long 0x6B4++0x0B
line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter"
bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO           ,Limit outstanding NISO" "Disabled,Enabled"
bitfld.long 0x00 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_NISO  ,Limit during hold off override NISO" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x00 0.--8. 1. "               ARB_MAX_OUTSTANDING_NISO            ,The maximum number of requests allowed in the arbiter"
line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask"
bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC         ,NISO throttle mask VICPC" "Disabled,Enabled"
bitfld.long 0x04 28. "           NISO_THROTTLE_MASK_USBD             ,NISO throttle mask USBD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST          ,NISO throttle mask HOST" "Disabled,Enabled"
bitfld.long 0x04 23. "           NISO_THROTTLE_MASK_SD               ,NISO throttle mask SD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK            ,NISO throttle mask GK" "Disabled,Enabled"
bitfld.long 0x04 19. "           NISO_THROTTLE_MASK_MSE              ,NISO throttle mask MSE" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX          ,NISO throttle mask USBX" "Disabled,Enabled"
bitfld.long 0x04 9. "           NISO_THROTTLE_MASK_SAX              ,NISO throttle mask SAX" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX           ,NISO throttle mask PCX" "Disabled,Enabled"
bitfld.long 0x04 3. "           NISO_THROTTLE_MASK_AVP              ,NISO throttle mask AVP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB           ,NISO throttle mask APB" "Disabled,Enabled"
bitfld.long 0x04 1. "           NISO_THROTTLE_MASK_AHB              ,NISO throttle mask AHB" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask"
bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled"
bitfld.long 0x08 15. "           RING0_THROTTLE_MASK_RING1_OUTPUT    ,Ring0 throttle mask ring1 output" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1        ,Ring0 throttle mask ring1" "Disabled,Enabled"
bitfld.long 0x08 6. "           RING0_THROTTLE_MASK_FTOP            ,Ring0 throttle mask FTOP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC          ,Ring0 throttle mask PTC" "Disabled,Enabled"
bitfld.long 0x08 0. "           RING0_THROTTLE_MASK_MPCORER         ,Ring0 throttle mask MPCORER" "Disabled,Enabled"
group.long 0xB80++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD           ,NISO throttle mask DFD" "Disabled,Enabled"
bitfld.long 0x00 4. "           NISO_THROTTLE_MASK_HDAPC            ,NISO throttle mask HDAPC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM           ,NISO throttle mask SDM" "Disabled,Enabled"
bitfld.long 0x00 2. "           NISO_THROTTLE_MASK_GK2              ,NISO throttle mask GK2" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG           ,NISO throttle mask JPG" "Disabled,Enabled"
group.long 0x670++0x07
line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB              ,SEC carve out size MB"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x678++0x03
line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0"
bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3"
bitfld.long 0x00 18. "                  ERR_SEC_SWAP                        ,Error security swap" "No error,Error"
textline "                                              "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Error secure security" "Non secure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                                              "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 0.--6. 1. "                  ERR_SEC_ID                          ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slow EMCCLK during DSR" "Disabled,Enabled"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x6C0++0x07
line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration"
hexmask.long.word 0x00 0.--8. 1. " RFCPB                            ,PMC specifies the per-bank auto refresh cycle time"
line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW"
bitfld.long 0x04 0.--5. " CCDMW                            ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,Open work control threshold"
hexmask.long.byte 0x00 8.--14. 1. "                 REFPB_THRESH_DISABLE_HP             ,Low priority control threshold"
textline "                                              "
hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP           ,High priority control threshold"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,Explicit bank mode" "0,1"
hexmask.long.byte 0x04 8.--14. 1. "                  REFPB_THRESH_DISABLE_FORCE_CLOSE    ,Force bank closure,low threshold"
textline "                                              "
hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE  ,Force bank closure,high threshold"
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "           ETR_FLUSH_ENABLE                    ,ETR flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "           NVJPG_FLUSH_ENABLE                  ,NVJPG flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           APE_FLUSH_ENABLE                    ,APE flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           GPU_FLUSH_ENABLE                    ,GPU flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           SDMMC4A_FLUSH_ENABLE                ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "In progress,Done"
bitfld.long 0x04 12. "        ETR_HOTRESET_STATUS                 ,ETR hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "In progress,Done"
bitfld.long 0x04 8. "        NVJPG_HOTRESET_STATUS               ,NVJPG hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "In progress,Done"
bitfld.long 0x04 6. "        APE_HOTRESET_STATUS                 ,APE hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "In progress,Done"
bitfld.long 0x04 2. "        GPU_HOTRESET_STATUS                 ,GPU hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "In progress,Done"
bitfld.long 0x04 0. "        SDMMC4A_HOTRESET_STATUS             ,SDMMC4A hot reset status" "In progress,Done"
textline "                                              "
endif
sif (!cpuis("TEGRAX2"))
group.long 0xE8++0x07
line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides"
bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE          ,FIFO deadlock check override" "Disabled,Enabled"
bitfld.long 0x00 28. "             ARB_EMEM_SPO_OVERRIDE                          ,EMEM SPO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 27. "       ARB_EMEM_AP_OVERRIDE                          ,EMEM AP override" "Disabled,Enabled"
bitfld.long 0x00 26. "             ARB_HUM_FIFO_OVERRIDE                          ,Hum FIFO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 23. "       ISO_TA_OVERRIDE                               ,ISO TA override" "Disabled,Enabled"
bitfld.long 0x00 22. "             ISO_DA_OVERRIDE                                ,ISO DA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_BC_INHERIT_ON_PRIINV_OVERRIDE             ,ISO BC inherit on PRINV override" "Disabled,Enabled"
bitfld.long 0x00 20. "             ISO_BC_CAUSE_PRIINV_OVERRIDE                   ,ISO BC cause PRINV override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 19. "       ISO_BA_OVERRIDE                               ,ISO_BA override" "Disabled,Enabled"
bitfld.long 0x00 18. "             ISO_AA_OVERRIDE                                ,ISO AA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 17. "       ARB_EMEM_BUBBLECALC_OVERRIDE                  ,EMEM bubble CALC override" "Disabled,Enabled"
bitfld.long 0x00 16. "             ALLOC_ONE_BQ_PER_CLIENT                        ,Allocate one BQ per client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 14. "             PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 13. "       PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE     ,Priority inversion threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 12. "             PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE     ,Priority inversion bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 11. "       PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE  ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled"
bitfld.long 0x00 10. "             OBSERVED_DIRECTION_OVERRIDE                    ,Observed direction override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 9. "       BC2AA_HOLDHOFF_OVERRIDE                       ,BC2AA hold off override" "Disabled,Enabled"
bitfld.long 0x00 8. "             TS2AA_HOLDHOFF_OVERRIDE                        ,TS2AA hold off override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 4. "       EXPIRE_UPDATE_OVERRIDE                        ,Expire update override" "Disabled,Enabled"
bitfld.long 0x00 3. "             GPU_SLICE_MERGE_OVERRIDE                       ,Combine GPU traffic override" "Disabled,Enabled"
textline "                                        "
line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved"
hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3"
hexmask.long.byte 0x04 16.--23. 1. "           EMEM_ARB_RESERVED_BYTE2  ,EMEM ARB reserved byte2"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. "       EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 "
hexmask.long.byte 0x04 0.--7. 1. "           EMEM_ARB_RESERVED_BYTE0  ,EMEM ARB reserved byte0"
group.long 0x0F4++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides"
bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR      ,EMC response clock override" "Gated,Override"
bitfld.long 0x00 14. "     TSR_CLKEN_OVR            ,EARB TSR clock override" "Gated,Override"
textline "                                        "
bitfld.long 0x00 13. "       RING2_CLKEN_OVR         ,Ring2 clock override" "Gated,Always on"
bitfld.long 0x00 12. "    RING1_CLKEN_OVR          ,Ring1 clock override" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 11. "       CH_DDA_CLKEN_OVR        ,CH_DDA_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 10. "    HUB_DDA_CLKEN_OVR        ,HUB_DDA_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 9. "       WCAM_CLKEN_OVR          ,WCAM_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 8. "    PTC_CACHE_CLKEN_OVR      ,PTC_CACHE_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 7. "       PTC_CLKEN_OVR           ,PTC_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 6. "    TLB_CLKEN_OVR            ,TLB_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 5. "       WB_CLKEN_OVR            ,WB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 3. "    REGS_CLKEN_OVR           ,REGS_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 2. "       EARB_CLKEN_OVR          ,EARB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 0. "    CIF_CLKEN_OVR            ,CIF_CLKEN_OVR" "Gated,Always on"
group.long 0x0FC++0x07
line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger"
bitfld.long 0x00 0. " TIMING_UPDATE           ,Trigger a timing update event" "No trigger,Trigger"
textline "                                        "
line.long 0x04 "STAT_CONTROL_0,Statistic Control"
bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER     ,EMC PM stop trigger" "No trigger,Trigger"
bitfld.long 0x04 2. "   EMC_PM_START_TRIGGER     ,EEMC PM start trigger" "No trigger,Trigger"
textline "                                        "
bitfld.long 0x04 0.--1. "       EMC_GATHER              ,EMC gather" "RST,,Disabled,Enabled"
textline "                                        "
endif
group.long 0x200++0x03
line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE    ,SDMMC3A flush enable" "Disabled,Enabled"
bitfld.long 0x00 30. "     SDMMC2A_FLUSH_ENABLE     ,SDMMC2A flush enable" "Disabled,Enabled"
bitfld.long 0x00 29. "     SDMMC1A_FLUSH_ENABLE      ,SDMMC1A flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_FLUSH_ENABLE       ,TSEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 20. "     XUSB_DEV_FLUSH_ENABLE    ,XUSB DEV flush enable" "Disabled,Enabled"
bitfld.long 0x00 19. "     XUSB_HOST_FLUSH_ENABLE    ,XUSB host flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 18. "       VIC_FLUSH_ENABLE        ,VIC flush enable" "Disabled,Enabled"
bitfld.long 0x00 17. "     VI_FLUSH_ENABLE          ,VI flush enable" "Disabled,Enabled"
bitfld.long 0x00 15. "     SATA_FLUSH_ENABLE         ,SATA flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_FLUSH_ENABLE       ,PPCS flush enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     NVENC_FLUSH_ENABLE       ,NVENC flush enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     MPCORE_FLUSH_ENABLE       ,MPCORE flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_FLUSH_ENABLE       ,ISP2 flush enable" "Disabled,Enabled"
bitfld.long 0x00 7. "     HDA_FLUSH_ENABLE         ,HDA flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     HC_FLUSH_ENABLE           ,HC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 3. "       DCB_FLUSH_ENABLE        ,DCB flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     DC_FLUSH_ENABLE          ,DC flush enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     AVPC_FLUSH_ENABLE         ,AVPC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. "       AFI_FLUSH_ENABLE        ,AFI flush enable" "Disabled,Enabled"
rgroup.long 0x204++0x03
line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register"
bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done"
bitfld.long 0x00 30. "  SDMMC2A_HOTRESET_STATUS  ,SDMMC2A flush status" "In progress,Done"
bitfld.long 0x00 29. "  SDMMC1A_HOTRESET_STATUS   ,SDMMC1A flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_HOTRESET_STATUS    ,TSEC flush status" "In progress,Done"
bitfld.long 0x00 20. "  XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done"
bitfld.long 0x00 19. "  XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 18. "       VIC_HOTRESET_STATUS     ,VIC flush status" "In progress,Done"
bitfld.long 0x00 17. "  VI_HOTRESET_STATUS       ,VI flush status" "In progress,Done"
bitfld.long 0x00 15. "  SATA_HOTRESET_STATUS      ,SATA flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_HOTRESET_STATUS    ,PPCS flush status" "In progress,Done"
bitfld.long 0x00 11. "  NVENC_HOTRESET_STATUS    ,NVENC flush status" "In progress,Done"
bitfld.long 0x00 9. "  MPCORE_HOTRESET_STATUS    ,MPCORE flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_HOTRESET_STATUS    ,ISP flush status" "In progress,Done"
bitfld.long 0x00 7. "  HDA_HOTRESET_STATUS      ,HDA flush status" "In progress,Done"
bitfld.long 0x00 6. "  HC_HOTRESET_STATUS        ,HC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 3. "       DCB_HOTRESET_STATUS     ,DCB flush status" "In progress,Done"
bitfld.long 0x00 2. "  DC_HOTRESET_STATUS       ,DC flush status" "In progress,Done"
bitfld.long 0x00 1. "  AVPC_HOTRESET_STATUS      ,AVPC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 0. "       AFI_HOTRESET_STATUS     ,AFI flush status" "In progress,Done"
group.long 0x208++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings"
bitfld.long 0x00 31. " ISO_SATAR               ,Client SATAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 30. "     ISO_PPCSAHBSLVR          ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 29. "     ISO_PPCSAHBDMAR           ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       ISO_NVENCCSRD           ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 23. "     ISO_HOST1XR              ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 22. "     ISO_HOST1XDMAR            ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_HDAR                ,Client HDAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 17. "     ISO_DISPLAYHCB           ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 16. "     ISO_DISPLAYHC             ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       ISO_AVPCARM7R           ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 14. "     ISO_AFIR                 ,Client AFIR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 6. "     ISO_DISPLAY0CB            ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       ISO_DISPLAY0C           ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_DISPLAY0BB           ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 3. "     ISO_DISPLAY0B             ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       ISO_DISPLAY0AB          ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_DISPLAY0A            ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 0. "     ISO_PTCR                  ,Client PTCR is treated as an isochronous client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings"
bitfld.long 0x04 29. " ISO_SATAW               ,Client SATAW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 28. "     ISO_PPCSAHBSLVW          ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 27. "     ISO_PPCSAHBDMAW           ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       ISO_MPCOREW             ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 22. "     ISO_HOST1XW              ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 21. "     ISO_HDAW                  ,Client HDAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 18. "       ISO_AVPCARM7W           ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 17. "     ISO_AFIW                 ,Client AFIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 11. "     ISO_NVENCSWR              ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. "       ISO_MPCORER             ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings"
bitfld.long 0x08 26. " ISO_DISPLAYT            ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 25. "     ISO_GPUSWR               ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 24. "     ISO_GPUSRD                ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       ISO_TSECSWR             ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 20. "     ISO_TSECSRD              ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 17. "     ISO_ISPWBB                ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       ISO_ISPWAB              ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 14. "     ISO_ISPRAB               ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 13. "     ISO_XUSB_DEVW             ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       ISO_XUSB_DEVR           ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 11. "     ISO_XUSB_HOSTW           ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 10. "     ISO_XUSB_HOSTR            ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       ISO_ISPWB               ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 6. "     ISO_ISPWA                ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 4. "     ISO_ISPRA                 ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings"
bitfld.long 0x0C 31. " ISO_NVJPGSWR            ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     ISO_NVJPGSRD             ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     ISO_APEW                  ,Client APEW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       ISO_APER                ,Client APER is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     ISO_NVDECSWR             ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     ISO_NVDECSRD              ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       ISO_DISPLAYD            ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     ISO_VIW                  ,Client VIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     ISO_VICSWR                ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       ISO_VICSRD              ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     ISO_SDMMCWAB             ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     ISO_SDMMCW                ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       ISO_SDMMCWAA            ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     ISO_SDMMCWA              ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     ISO_SDMMCRAB              ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       ISO_SDMMCR              ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     ISO_SDMMCRAA             ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     ISO_SDMMCCRA              ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xB94++0x03
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " SO_GPUSWR2              ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "     ISO_GPUSRD2              ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "     ISO_TSECSWRB              ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 6. "        ISO_TSECSRDB            ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "     ISO_ETRW                 ,Client ETRW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_ETRR                  ,Client ETRR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. "        ISO_AXIAPW              ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_AXIAPR               ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_SESWR                 ,Client SESWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_SESRD               ,Client SESRD is treated as an isochronous client" "Disabled,Enabled"
group.long 0xBA8++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0"
bitfld.long 0x00 3. " ISO_NVDECSRD1           ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_VICSRD1              ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_NVDISPLAYR1           ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_APEDMAW             ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled"
endif
group.long 0x218++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 31. " HYST_SATAR              ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "     HYST_PPCSAHBSLVR         ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "     HYST_PPCSAHBDMAR          ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       HYST_NVENCSRD           ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "     HYST_HOST1XR             ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "     HYST_HOST1XDMAR           ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       HYST_HDAR               ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "     HYST_DISPLAYHCB          ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "     HYST_DISPLAYHC            ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       HYST_AVPCARM7R          ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "     HYST_AFIR                ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "     HYST_DISPLAY0CB           ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       HYST_DISPLAY0C          ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "     HYST_DISPLAY0BB          ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "     HYST_DISPLAY0B            ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       HYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "     HYST_DISPLAY0A           ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "     HYST_PTCR                 ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings"
bitfld.long 0x04 29. " HYST_SATAW              ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "     HYST_PPCSAHBSLVW         ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "     HYST_PPCSAHBDMAW          ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       HYST_MPCOREW            ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled"
sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1"))
bitfld.long 0x04 24. "     HYST_MPCORELPW           ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled"
endif
bitfld.long 0x04 22. "     HYST_HOST1XW             ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 21. "       HYST_HDAW               ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "     HYST_AVPCARM7W           ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "     HYST_AFIW                 ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 11. "       HYST_NVENCSWR           ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "     HYST_MPCORER             ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings"
bitfld.long 0x08 26. " HYST_DISPLAYT           ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "     HYST_GPUSWR              ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "     HYST_GPUSRD               ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       HYST_TSECSWR            ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "     HYST_TSECSRD             ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "     HYST_ISPWBB               ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       HYST_ISPWAB             ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "     HYST_ISPRAB              ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "     HYST_XUSB_DEVW            ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       HYST_XUSB_DEVR          ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "     HYST_XUSB_HOSTW          ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "     HYST_XUSB_HOSTR           ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       HYST_ISPWB              ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "     HYST_ISPWA               ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "     HYST_ISPRA                ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings"
bitfld.long 0x0C 31. " HYST_NVJPGSWR           ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     HYST_NVJPGSRD            ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     HYST_APEW                 ,Client APEW is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       HYST_APER               ,Client APER is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     HYST_NVDECSWR            ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     HYST_NVDECSRD             ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       HYST_DISPLAYD           ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     HYST_VIW                 ,Client VIW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     HYST_VICSWR               ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       HYST_VICSRD             ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     HYST_SDMMCWAB            ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     HYST_SDMMCW               ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       HYST_SDMMCWAA           ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     HYST_SDMMCWA             ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     HYST_SDMMCRAB             ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       HYST_SDMMCR             ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     HYST_SDMMCRAA            ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     HYST_SDMCRA               ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0"
bitfld.long 0x00 31. " HYST_APEDMAR             ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  HYST_SCEDMAW          ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  HYST_SCEDMAR      ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " HYST_SCEW                ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 27. "  HYST_SCER             ,Client SCER is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 26. "  HYST_AONDMAW      ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. " HYST_AONDMAR             ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 24. "  HYST_AONW             ,Client AONW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  HYST_AONR         ,Client AONR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 22. " HYST_BPMPDMAW            ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 21. "  HYST_BPMPDMAR         ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 20. "  HYST_BPMPW        ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " HYST_BPMPR               ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 18. "  HYST_NVDISPLAYR       ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  HYST_UFSHCW       ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 16. " HYST_UFSHCR              ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 15. "  HYST_EQOSW            ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  HYST_EQOSR        ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " HYST_AXISW               ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 12. "  HYST_AXISR            ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 9. "  HYST_GPUSWR2      ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 8. " HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "  HYST_TSECSWRB         ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  HYST_TSECSRDB     ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  HYST_ETRR             ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_SESWR        ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_SESRD               ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBA4++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0"
bitfld.long 0x00 3. " HYST_NVDECSRD1           ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  HYST_VICSRD1          ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_NVDISPLAYR1  ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_APEDMAW             ,Client APEDMAW  is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR              ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  DHYST_PPCSAHBSLVR     ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " DHYST_NVENCSRD           ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  DHYST_HOST1XR         ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "  DHYST_HOST1XDMAR  ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " DHYST_HDAR               ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  DHYST_DISPLAYHCB      ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "  DHYST_DISPLAYHC   ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " DHYST_AVPCARM7R          ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  DHYST_AFIR            ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  DHYST_DISPLAY0CB  ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " DHYST_DISPLAY0C          ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  DHYST_DISPLAY0BB      ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "  DHYST_DISPLAY0B   ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_DISPLAY0A       ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "  DHYST_PTCR        ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW              ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "  DHYST_PPCSAHBSLVW     ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "  DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 25. " DHYST_MPCOREW            ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "  DHYST_HOST1XW         ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 21. "  DHYST_HDAW        ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 18. " DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "  DHYST_AFIW            ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 11. "  DHYST_NVENCSWR    ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " DHYST_MPCORER            ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT           ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "  DHYST_GPUSWR          ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "  DHYST_GPUSRD      ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 23. " DHYST_A9AVPSCW           ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 22. "  DHYST_A9AVPSCR        ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 21. "  DHYST_TSECSWR     ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 20. " DHYST_TSECSRD            ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "  DHYST_ISPWBB          ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 16. "  DHYST_ISPWAB      ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 14. " DHYST_ISPRAB             ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "  DHYST_XUSB_DEVW       ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 12. "  DHYST_XUSB_DEVR   ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 11. " DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "  DHYST_XUSB_HOSTR      ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 7. "  DHYST_ISPWB       ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 6. " DHYST_ISPWA              ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "  DHYST_ISPRA           ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR           ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "  DHYST_NVJPGSRD        ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "  DHYST_APEW        ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 26. " DHYST_APER               ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "  DHYST_NVDECSWR        ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "  DHYST_NVDECSRD    ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 19. " DHYST_DISPLAYD           ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "  DHYST_VIW             ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "  DHYST_VICSWR      ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 12. " DHYST_VICSRD             ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "  DHYST_SDMMCWAB        ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "  DHYST_SDMMCW      ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA           ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "  DHYST_SDMMCWA         ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "  DHYST_SDMMCRAB    ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 2. " DHYST_SDMMCR             ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "  DHYST_SDMMCRAA        ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "  DHYST_SDMMCRA     ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2            ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "  DHYST_GPUSRD2         ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "  DHYST_TSECSWRB    ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 6. " DHYST_TSECSRDB           ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "  DHYST_ETRW            ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "  DHYST_ETRR        ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 3. " DHYST_AXIAPW             ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "  DHYST_AXIAPR          ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "  DHYST_SESWR       ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 0. " DHYST_SESRD              ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBF0++0x03
line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 3. " DHYST_NVDECSRD1          ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  DHYST_VICSRD1         ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " DHYST_APEDMAW            ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic"
bitfld.long 0x00 31. " DHYST_ENABLE             ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x1F
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0        ,DHYST delay bin 0"
line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1"
hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1        ,DHYST delay bin 1"
line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2"
hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2        ,DHYST delay bin 2"
line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3"
hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3        ,DHYST delay bin 3"
line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4"
hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4        ,DHYST delay bin 4"
line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5"
hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5        ,DHYST delay bin 5"
line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6"
hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6        ,DHYST delay bin 6"
line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7"
hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7        ,DHYST delay bin 7"
group.long 0xA60++0x03
line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC   ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled"
group.long 0xA70++0x07
line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC    ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled"
line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0"
bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP     ,Response clock-enable override for partition client FTOP" "Disabled,Enabled"
group.long 0xA80++0x03
line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3   ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled"
group.long 0xA3C++0x03
line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG      ,Response clock-enable override for partition client JPG" "Disabled,Enabled"
group.long 0xA14++0x03
line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST     ,Response clock-enable override for partition client HOST" "Disabled,Enabled"
group.long 0x2AC++0x03
line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS      ,Response clock-enable override for partition client DIS" "Disabled,Enabled"
group.long 0xA78++0x03
line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled"
group.long 0xA1C++0x03
line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC    ,Response clock-enable override for partition client VICPC" "Disabled,Enabled"
group.long 0xA58++0x03
line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC  ,RCLKEN override UFSHCPC" "Disabled,Enabled"
group.long 0xA6C++0x03
line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x228++0x0F
line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables"
bitfld.long 0x00 31. " SMMU_SATAR_ENABLE       ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 30. "     SMMU_PPCSAHBSLVR_ENABLE  ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 29. "     SMMU_PPCSAHBDMAR_ENABLE   ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       SMMU_NVENCSRD_ENABLE    ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 23. "     SMMU_HOST1XR_ENABLE      ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 22. "     SMMU_HOST1XDMAR_ENABLE    ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       SMMU_HDAR_ENABLE        ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 17. "     SMMU_DISPLAYHCB_ENABLE   ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 16. "     SMMU_DISPLAYHC_ENABLE     ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       SMMU_AVPCARM7R_ENABLE   ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 14. "     SMMU_AFIR_ENABLE         ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 6. "     SMMU_DISPLAY0CB_ENABLE    ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       SMMU_DISPLAY0C_ENABLE   ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 4. "     SMMU_DISPLAY0BB_ENABLE   ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 3. "     SMMU_DISPLAY0B_ENABLE     ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       SMMU_DISPLAY0AB_ENABLE  ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 1. "     SMMU_DISPLAY0A_ENABLE    ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled"
line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables"
bitfld.long 0x04 29. " SMMU_SATAW_ENABLE       ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 28. "     SMMU_PPCSAHBSLVW_ENABLE  ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 27. "     SMMU_PPCSAHBDMAW_ENABLE   ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 22. "       SMMU_HOST1XW_ENABLE     ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 21. "     SMMU_HDAW_ENABLE         ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 18. "     SMMU_AVPCARM7W_ENABLE     ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 17. "       SMMU_AFIW_ENABLE        ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 11. "     SMMU_NVENCSWR_ENABLE     ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled"
line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables"
bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE    ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled"
rbitfld.long 0x08 25. "     SMMU_GPUSWR_ENABLE       ,GPU translation is handled by SWID" "Disabled,Enabled"
rbitfld.long 0x08 24. "     SMMU_GPUSRD_ENABLE        ,GPU translation is handled by SWID" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       SMMU_TSECSWR_ENABLE     ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 20. "     MMU_TSECSRD_ENABLE       ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 17. "     SMMU_ISPWBB_ENABLE        ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       SMMU_ISPWAB_ENABLE      ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 14. "     SMMU_ISPRAB_ENABLE       ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x08 13. "     SMMU_XUSB_DEVW_ENABLE     ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       SMMU_XUSB_DEVR_ENABLE   ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 11. "     SMMU_XUSB_HOSTW_ENABLE   ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 10. "     SMMU_XUSB_HOSTR_ENABLE    ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       SMMU_ISPWB_ENABLE       ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 6. "     SMMU_ISPWA_ENABLE        ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 4. "     SMMU_ISPRA_ENABLE         ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled"
line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables"
bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE    ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 30. "     SMMU_NVJPGSRD_ENABLE     ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SMMU_APEW_ENABLE          ,Enable client APEW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       SMMU_APER_ENABLE        ,Enable client APER to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 25. "     SMMU_NVDECSWR_ENABLE     ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 24. "     SMMU_NVDECSRD_ENABLE      ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       SMMU_DISPLAYD_ENABLE    ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 18. "     SMMU_VIW_ENABLE          ,Client VIW  translation to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 13. "     SMMU_VICSWR_ENABLE        ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       SMMU_VICSRD_ENABLE      ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x0C 7. "     SMMU_SDMMCWAB_ENABLE     ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 6. "     SMMU_SDMMCW_ENABLE        ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       SMMU_SDMMWAA_ENABLE     ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 4. "     SMMU_SDMMCWA_ENABLE      ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 3. "     SMMU_SDMMCRAB_ENABLE      ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       SMMU_SDMMCR_ENABLE      ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 1. "     SMMU_SDMMCRAA_ENABLE     ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 0. "     SMMU_SDMMCRA_ENABLE       ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled"
textline " "
width 23.
if (((per.l(ad:0x02C30000+0x238))&0x80000000)==0x80000000)
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  AFI_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AFI_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AFI_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AFI_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x23C))&0x80000000)==0x80000000)
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  AVPC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x240))&0x80000000)==0x80000000)
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DC_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x244))&0x80000000)==0x80000000)
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DCB_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DCB_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DCB_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DCB_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x250))&0x80000000)==0x80000000)
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  HC_ASID         ,ASID to use when VA[3332] == 0x0"
else
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x254))&0x80000000)==0x80000000)
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  HDA_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  HDA_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  HDA_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  HDA_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x258))&0x80000000)==0x80000000)
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  ISP2_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x264))&0x80000000)==0x80000000)
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " NVENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  NVENC_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " MSENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x268))&0x80000000)==0x80000000)
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV_ASID         ,ASID to use for NV translation" "0,1,2,3"
else
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x26C))&0x80000000)==0x80000000)
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV2_ASID        ,ASID to use for NV2 translation" "0,1,2,3"
else
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x270))&0x80000000)==0x80000000)
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  PPCS_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x274))&0x80000000)==0x80000000)
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  SATA_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SATA_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SATA_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SATA_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x280))&0x80000000)==0x80000000)
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  VI_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  VI_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  VI_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  VI_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x284))&0x80000000)==0x80000000)
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  VIC_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x288))&0x80000000)==0x80000000)
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x28C))&0x80000000)==0x80000000)
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x294))&0x80000000)==0x80000000)
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE  ,TSEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  TSEC_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_SMMU_ENABLE      ,TSEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0x298))&0x80000000)==0x80000000)
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " SMMU_ENABLE           ,PPCS1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  ASID            ,ASID to use when VA[3332] == 0x0"
else
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE     ,PPCS1 translation enable" "Disabled,Enabled"
endif
endif
width 34.
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x404++0x03
line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX      ,Response clock-enable override for partition client USBX" "Disabled,Enabled"
group.long 0x2B8++0x03
line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX       ,Response clock-enable override for partition client PCX" "Disabled,Enabled"
group.long 0xE08++0x03
line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2      ,Response clock-enable override for partition client MSE2" "Disabled,Enabled"
group.long 0xA7C++0x03
line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2    ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled"
group.long 0xA4C++0x03
line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD       ,Response clock-enable override for partition client DFD" "Disabled,Enabled"
group.long 0xE00++0x03
line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2      ,Response clock-enable override for partition client NVD2" "Disabled,Enabled"
group.long 0xA44++0x03
line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM       ,Response clock-enable override for partition client SDM" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB       ,Response clock-enable override for partition client APB" "Disabled,Enabled"
group.long 0xA08++0x03
line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP       ,Response clock-enable override for partition client ISP" "Disabled,Enabled"
group.long 0xA18++0x03
line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD      ,Response clock-enable override for partition client USBD" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE       ,Response clock-enable override for partition client MSE" "Disabled,Enabled"
group.long 0xA10++0x03
line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD       ,Response clock-enable override for partition client AUD" "Disabled,Enabled"
group.long 0xA54++0x03
line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC       ,Response clock-enable override for partition client NIC" "Disabled,Enabled"
group.long 0xA40++0x03
line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2       ,Response clock-enable override for partition client GK2" "Disabled,Enabled"
group.long 0xA64++0x03
line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled"
group.long 0xE04++0x03
line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3      ,Response clock-enable override for partition client NVD3" "Disabled,Enabled"
group.long 0x2C0++0x03
line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX       ,Response clock-enable override for partition client SAX" "Disabled,Enabled"
group.long 0xA5C++0x03
line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC    ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled"
group.long 0xA38++0x03
line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD       ,Response clock-enable override for partition client NVD" "Disabled,Enabled"
group.long 0xA50++0x03
line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1      ,Response clock-enable override for partition client SDM1" "Disabled,Enabled"
group.long 0xA48++0x03
line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC     ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled"
group.long 0xA68++0x03
line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC     ,Response clock-enable override for partition client AONPC" "Disabled,Enabled"
group.long 0xA04++0x03
line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD        ,Response clock-enable override for partition client SD" "Disabled,Enabled"
group.long 0xA84++0x03
line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2      ,Response clock-enable override for partition client DIS2" "Disabled,Enabled"
group.long 0x2D8++0x03
line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE        ,Response clock-enable override for partition client VE" "Disabled,Enabled"
group.long 0xA00++0x03
line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0"
bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES  ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled"
bitfld.long 0x00 3. "                 RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled"
textline "                                           "
endif
sif (!cpuis("TEGRAX2"))
group.long 0x418++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register"
bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE             ,SDMMC3A VPR override" "Disabled,Enabled"
bitfld.long 0x00 30. "          SDMMC2A_VPR_OVERRIDE                 ,SDMMC2A VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE             ,SDMMC1A VPR override" "Disabled,Enabled"
bitfld.long 0x00 26. "          DC1_VPR_OVERRIDE                     ,DC1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE               ,PPCS1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 22. "          TSEC_VPR_OVERRIDE                    ,TSEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE            ,XUSB SEV VPR override" "Disabled,Enabled"
bitfld.long 0x00 19. "          XUSB_HOST_VPR_OVERRIDE               ,XUSB HOST VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 18. " VIC_VPR_OVERRIDE                 ,VIC VPR override" "Disabled,Enabled"
bitfld.long 0x00 17. "          VI_VPR_OVERRIDE                      ,VI VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " SATA_VPR_OVERRIDE                ,SATA VPR override" "Disabled,Enabled"
bitfld.long 0x00 14. "          PPCS_VPR_OVERRIDE                    ,PPCS VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE               ,NVENC VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          MPCORE_VPR_OVERRIDE                  ,MPCORE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE                ,ISP2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          HDA_VPR_OVERRIDE                     ,HDA VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HC_VPR_OVERRIDE                  ,HC VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          DCB_VPR_OVERRIDE                     ,DCB VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DC_VPR_OVERRIDE                  ,DC VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          AVPC_VPR_OVERRIDE                    ,AVPC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " AFI_VPR_OVERRIDE                 ,AFI VPR override" "Disabled,Enabled"
group.long 0x590++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register"
bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE              ,NVDEC1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 15. "          TSECB1_VPR_OVERRIDE                  ,TSECB11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE               ,TSEC11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 13. "          TSECB_VPR_OVERRIDE                   ,TSECB1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 12. " ETR_VPR_OVERRIDE                 ,ETR1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 11. "          AXIAP_VPR_OVERRIDE                   ,AXIAP1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 10. " SE1_VPR_OVERRIDE                 ,SE11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          HC1_VPR_OVERRIDE                     ,HC11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE               ,NVJPG1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          SE_VPR_OVERRIDE                      ,SE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " APE_VPR_OVERRIDE                 ,APE VPR override" "Disabled,Enabled"
bitfld.long 0x00 5. "          NVDEC_VPR_OVERRIDE                   ,NVDEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE               ,PPCS2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          GPUB_VPR_OVERRIDE                    ,GBUP VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " GPU_VPR_OVERRIDE                 ,GPU VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          ISP2B_VPR_OVERRIDE                   ,ISP2B VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE             ,SDMMC4A VPR override" "Disabled,Enabled"
textline "                                           "
group.long 0x600++0x03
line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask"
hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0         ,TLB set selection mask 0"
group.long 0x608++0x03
line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection"
bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS   ,Display snap ring write access" "Enabled,Disabled"
bitfld.long 0x00 1. "          DISB_SNAP_RING                       ,DISB snap ring" "RING0,RING1"
textline "                                           "
bitfld.long 0x00 0. " DIS_SNAP_RING                    ,DIS snap ring" "RING0,RING1"
endif
sif (cpuis("TEGRAX2"))
group.long 0x648++0x07
line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0"
hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM                   ,Base address for the VPR address space"
line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB               ,Size of the VPR region in megabytes"
group.long 0x978++0x03
line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0"
bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI            ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3"
group.long 0x650++0x03
line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register  0"
bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled"
bitfld.long 0x00 0. "  VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1"
textline "                                           "
endif
rgroup.long 0x654++0x03
line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0"
bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI                   ,Higher address bits of erring address" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_VPR_SWAP                         ,Error VPR swap" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_VPR_SECURITY                 ,Error VPR security" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_VPR_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_VPR_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "              ERR_VPR_ID                           ,Client identifier"
rgroup.long 0x658++0x03
line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address"
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x03
line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI           ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3"
group.long 0xF80++0x07
line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB          ,Enable REGIF HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_MC                ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_EMC           ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0"
bitfld.long 0x04 31. " LOCK_REGIF_CONFIG         ,Lock REGIF configuration" "Disabled,Enabled"
bitfld.long 0x04 24.--25. "  ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3"
bitfld.long 0x04 16.--17. "      ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3"
textline "                                           "
bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "        ENABLE_REGIF_BROADCAST_EMC     ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF90++0x0F
line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_UNICAST0_MC       ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_UNICAST0_EMC  ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0"
bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3"
bitfld.long 0x04 8.--11. "         ENABLE_REGIF_UNICAST1_MC       ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "     ENABLE_REGIF_UNICAST1_EMC  ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3"
bitfld.long 0x08 8.--11. "         ENABLE_REGIF_UNICAST2_MC       ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "     ENABLE_REGIF_UNICAST2_EMC  ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3"
bitfld.long 0x0C 8.--11. "         ENABLE_REGIF_UNICAST3_MC       ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "     ENABLE_REGIF_UNICAST3_EMC  ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF2C++0x03
line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0"
bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT      ,SCRUB ECC WR ACK Interrupt" "Clear,Set"
group.long 0xF24++0x07
line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0"
bitfld.long 0x00 24. " COMMON_INTR               ,Common interrupt" "Clear,Set"
bitfld.long 0x00 17. "     HUB1_INTR                      ,Hub 1 interrupt" "Clear,Set"
bitfld.long 0x00 16. "  HUB0_INTR                  ,Hub 0 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 3. " MC3_INTR                  ,Channel 3 interrupt" "Clear,Set"
bitfld.long 0x00 2. "     MC2_INTR                       ,Channel 2 interrupt" "Clear,Set"
bitfld.long 0x00 1. "  MC1_INTR                   ,Channel 1 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 0. " MC0_INTR                  ,Channel 0 interrupt" "Clear,Set"
line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0"
bitfld.long 0x04 24. " COMMON_CRITICAL_INTR      ,Common critical interrupt" "Clear,Set"
bitfld.long 0x04 17. "     HUB1_CRITICAL_INTR             ,Hub 1 critical interrupt" "Clear,Set"
bitfld.long 0x04 16. "  HUB0_CRITICAL_INTR         ,Hub 0 critical interrupt." "Clear,Set"
textline "                                           "
bitfld.long 0x04 3. " MC3_CRITICAL_INTR         ,Channel 3 critical interrupt." "Clear,Set"
bitfld.long 0x04 2. "     MC2_CRITICAL_INTR              ,Channel 2 critical interrupt." "Clear,Set"
bitfld.long 0x04 1. "  MC1_CRITICAL_INTR          ,Channel 1 critical interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x04 0. " MC0_CRITICAL_INTR         ,Channel 0 critical interrupt" "Clear,Set"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x964++0x03
line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming"
bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS            ,IRAM configuration write access disable" "No,Yes"
group.long 0x664++0x03
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access disable" "No,Yes"
group.long 0x668++0x07
line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register"
bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU strict TrustZone aperture check enable" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding RING3" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_RING3            ,Maximum number of requests allowed in the arbiter when limit is enabled"
group.long 0x670++0x0B
line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0"
hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB             ,Size of the SEC carve out region"
line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0"
bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_SEC_SWAP                         ,ERR_SEC_SWAP" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Set if transaction was secure" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--6. 1. "              ERR_SEC_ID                           ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled"
group.long 0x6B0++0x17
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH        ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                NISO_THROTTLE_CYCLES                 ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO           ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDOFF_OVERRIDE_NISO   ,Overrides the limiting of NISO transactions" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_NISO             ,The maximum number of requests allowed in the arbiter"
line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC         ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 28. "          NISO_THROTTLE_MASK_USBD              ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST          ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 23. "          NISO_THROTTLE_MASK_SD                ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK            ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 19. "          NISO_THROTTLE_MASK_MSE               ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX          ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 9. "          NISO_THROTTLE_MASK_SAX               ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX           ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 3. "          NISO_THROTTLE_MASK_AVP               ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB           ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 1. "          NISO_THROTTLE_MASK_AHB               ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask"
bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled"
bitfld.long 0x0C 15. "          RING0_THROTTLE_MASK_RING1_OUTPUT     ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1        ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled"
bitfld.long 0x0C 6. "          RING0_THROTTLE_MASK_FTOP             ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC          ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x0C 0. "          RING0_THROTTLE_MASK_MPCORER          ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB"
hexmask.long.word 0x10 0.--8. 1. " RFCPB                            ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank"
line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW"
bitfld.long 0x14 0.--5. " CCDMW                            ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued"
textline "                                           "
hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP          ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority"
hexmask.long.byte 0x00 0.--6. 1. "                REFPB_THRESH_ENABLE_HP               ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled"
textline "                                           "
hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure"
hexmask.long.byte 0x04 0.--6. 1. "                REFPB_THRESH_ENABLE_FORCE_CLOSE      ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure"
group.long 0x968++0x03
line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0"
bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE       ,Multi-bank replay override enable" "Disabled,Enabled"
bitfld.long 0x00 5. "          EXPIRE_UPDATE_DEADLOCK_OVERRIDE      ,Expire update deadlock override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY        ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..."
bitfld.long 0x00 0.--1. "  CPU_WRITE_PAGE_OPEN_POLICY           ,CPU write page open policy" "Disabled,All,Eack_hint,?..."
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ETR_FLUSH_ENABLE                     ,ETR flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "          NVJPG_FLUSH_ENABLE                   ,NVJPG flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          APE_FLUSH_ENABLE                     ,APE flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "          GPU_FLUSH_ENABLE                     ,GPU flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          SDMMC4A_FLUSH_ENABLE                 ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "Done,In progress"
bitfld.long 0x04 12. "       ETR_HOTRESET_STATUS                  ,ETR hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "Done,In progress"
bitfld.long 0x04 8. "       NVJPG_HOTRESET_STATUS                ,NVJPG hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "Done,In progress"
bitfld.long 0x04 6. "       APE_HOTRESET_STATUS                  ,APE hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "Done,In progress"
bitfld.long 0x04 2. "       GPU_HOTRESET_STATUS                  ,GPU hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "Done,In progress"
bitfld.long 0x04 0. "       SDMMC4A_HOTRESET_STATUS              ,SDMMC4A hot reset status" "Done,In progress"
group.long 0x984++0x07
line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0"
line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0"
hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1     ,Video protect GPU override 1"
group.long 0x9A0++0x0F
line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM                 ,MTS carve out BOM"
line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB             ,MTS carve out size MB"
line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0"
bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI              ,MTS carve out BOM Hi" "0,1,2,3"
line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0"
bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS        ,MTS carve out write access" "Enabled,Disabled"
group.long 0x9B8++0x07
line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register"
bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI                 ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11"
line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration"
bitfld.long 0x04 0.--1. " SECURITY_BOM_HI                  ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11"
textline "                                           "
width 26.
if (((per.l(ad:0x02C30000+0x664))&0x01)==0x00)
group.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
else
rgroup.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
endif
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11"
if (((per.l(ad:0x02C30000+0xA88))&0x80000000)==0x80000000)
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      DC1_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC1_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC1_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC1_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xA94))&0x80000000)==0x80000000)
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xA98))&0x80000000)==0x80000000)
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xA9C))&0x80000000)==0x80000000)
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAA0))&0x80000000)==0x80000000)
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAA4))&0x80000000)==0x80000000)
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ISP2B_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2B_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2B_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2B_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAA8))&0x80000000)==0x80000000)
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPU_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPU_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPU_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPU_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAAC))&0x80000000)==0x80000000)
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPUB_ASID_3    ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPUB_ASID_2    ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPUB_ASID_1    ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPUB_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAB0))&0x80000000)==0x80000000)
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      PPCS2_ASID     ,ASID to use for PPCS2 translation"
else
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAB4))&0x80000000)==0x80000000)
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAB8))&0x80000000)==0x80000000)
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      APE_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xABC))&0x80000000)==0x80000000)
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAC0))&0x80000000)==0x80000000)
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVJPG_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAC4))&0x80000000)==0x80000000)
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      HC1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAC8))&0x80000000)==0x80000000)
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xACC))&0x80000000)==0x80000000)
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      AXIAP_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AXIAP_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AXIAP_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AXIAP_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAD0))&0x80000000)==0x80000000)
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ETR_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ETR_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ETR_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ETR_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAD4))&0x80000000)==0x80000000)
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAD8))&0x80000000)==0x80000000)
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSEC1_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC1_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC1_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC1_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xADC))&0x80000000)==0x80000000)
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB1_ASID_3  ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB1_ASID_2  ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB1_ASID_1  ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB1_ASID  ,ASID to use when VA[3332] == 0x0"
else
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C30000+0xAE0))&0x80000000)==0x80000000)
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC1_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
endif
textline " "
width 34.
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 4. "  NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 3. "  NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included"
textline "                                           "
bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 1. "  NISO_THROTTLE_MASK_JPG   ,Include JPG in the NISO meta-client group for throttling" "Not included,Included"
group.long 0xB84++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 9. " HYST_GPUSWR2           ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 8. "      HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "      HYST_TSECSWRB          ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HYST_TSECRDB           ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 5. "      HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      HYST_ETTR              ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " HYST_AXIAPW            ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "      HYST_AXIAPR              ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      HYST_SESWR             ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " HYST_SESRD             ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " ISO_GPUSWR2            ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "      ISO_GPUSRD2              ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "      ISO_TSECSWRB           ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " ISO_TSECRDB            ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "      ISO_ETRW                 ,Client ETRW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "      ISO_ETTR               ,Client ETTR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " ISO_AXIAPW             ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "      ISO_AXIAPR               ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "      ISO_SESWR              ,Client SESWR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " ISO_SESRD              ,Client SESRD is treated as a isochronous client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings"
rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE    ,Client GPUSWR2 translate by SMMU enable" ",Enabled"
rbitfld.long 0x00 8. "       SMMU_GPUSRD2_ENABLE      ,Client GPUSRD2 translate by SMMU enable" ",Enabled"
bitfld.long 0x00 7. "       SMMU_TSECSWRB_ENABLE   ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE    ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      SMMU_ETRW_ENABLE         ,Client ETRW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      SMMU_ETTR_ENABLE       ,Client ETTR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE     ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      SMMU_AXIAPR_ENABLE       ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SMMU_SESWR_ENABLE      ,Client SESWR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SMMU_SESRD_ENABLE      ,Client SESRD translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR            ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "      DHYST_PPCSAHBSLVR        ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "      DHYST_PPCSAHBDMAR      ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 28. " DHYST_NVENCSRD         ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "      DHYST_HOST1XR            ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "      DHYST_HOST1XDMAR       ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 21. " DHYST_HDAR             ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "      DHYST_DISPLAYHCB         ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "      DHYST_DISPLAYHC        ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " DHYST_AVPCARM7R        ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "      DHYST_AFIR               ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "      DHYST_DISPLAY0CB       ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " DHYST_DISPLAY0C        ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      DHYST_DISPLAY0BB         ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "      DHYST_DISPLAY0B        ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB       ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      DHYST_DISPLAY0A          ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "      DHYST_PTCR             ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW            ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "      DHYST_PPCSAHBSLVW        ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "      DHYST_PPCSAHBDMAW      ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 25. " DHYST_MPCOREW          ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 24. "      DHYST_MPCORELPW          ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "      DHYST_HOST1XW          ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 21. " DHYST_HDAW             ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "      DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "      DHYST_AFIW             ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 11. " DHYST_NVENCSWR         ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "      DHYST_MPCORER            ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT         ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "      DHYST_GPUSWR             ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "      DHYST_GPUSRD           ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 21. " DHYST_TSECSWR          ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "      DHYST_TSECSRD            ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "      DHYST_ISPWBB           ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 16. " DHYST_ISPWAB           ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "      DHYST_ISPRAB             ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "      DHYST_XUSB_DEVW        ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 12. " DHYST_XUSB_DEVR        ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "      DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "      DHYST_XUSB_HOSTR       ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " DHYST_ISPWB            ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "      DHYST_ISPWA              ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "      DHYST_ISPRA            ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR         ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DHYST_NVJPGSRD           ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "      DHYST_APEW             ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 26. " DHYST_APER             ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "      DHYST_NVDECSWR           ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "      DHYST_NVDECSRD         ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 19. " DHYST_DISPLAYD         ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "      DHYST_VIW                ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "      DHYST_VICSWR           ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 12. " DHYST_VICSRD           ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "      DHYST_SDMMCWAB           ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "      DHYST_SDMMCW           ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA         ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "      DHYST_SDMMCWA            ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "      DHYST_SDMMCRAB         ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " DHYST_SDMMCR           ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "      DHYST_SDMMCRAA           ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "      DHYST_SDMCRA           ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2          ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "      DHYST_GPUSRD2            ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "      DHYST_TSECSWRB         ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 6. " DHYST_TSECRDB          ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "      DHYST_ETRW               ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "      DHYST_ETTR             ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 3. " DHYST_AXIAPW           ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "      DHYST_AXIAPR             ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "      DHYST_SESWR            ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 0. " DHYST_SESRD            ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register"
bitfld.long 0x00 31. " DHYST_ENABLE           ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DHYST_BW_MON_INTERVAL    ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0      ,Timeout delay"
group.long 0xBD4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1      ,Timeout delay"
group.long 0xBD8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2      ,Timeout delay"
group.long 0xBDC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3      ,Timeout delay"
group.long 0xBE0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4      ,Timeout delay"
group.long 0xBE4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5      ,Timeout delay"
group.long 0xBE8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6      ,Timeout delay"
group.long 0xBEC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7      ,Timeout delay"
textline " "
width 25.
group.long 0x9DC++0x03
line.long 0x00 "DA_CONFIG0_0,DA Configuration Register"
bitfld.long 0x00 0. " NEW_ARB_SCHEME        ,New DA arbitration scheme use enable" "Disabled,Enabled"
textline " "
group.long 0x4E0++0x03
line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AHB          ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x54C++0x03
line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AUD          ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x44C++0x03
line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA"
group.long 0x440++0x03
line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2       ,DDA rate for RING2 PTSA"
group.long 0x530++0x03
line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD        ,DDA rate for USBD PTSA"
group.long 0x528++0x03
line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBX         ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBD         ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F0++0x03
line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_APB          ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x584++0x03
line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG         ,DDA rate for JPG PTSA"
group.long 0x420++0x03
line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DIS          ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4FC++0x03
line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AVP          ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F4++0x03
line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP         ,DDA rate for AVP PTSA"
group.long 0x480++0x03
line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING1        ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x424++0x03
line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DIS          ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D8++0x03
line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SD           ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C4++0x03
line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE         ,DDA rate for MSE PTSA"
group.long 0x558++0x03
line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC        ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B4++0x03
line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_PCX          ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A0++0x03
line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP         ,DDA rate for ISP PTSA"
group.long 0x48C++0x03
line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC      ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x448++0x03
line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING2        ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x548++0x03
line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD         ,DDA rate for AUD PTSA"
group.long 0x51C++0x03
line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HOST         ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x454++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER  ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D4++0x03
line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SD           ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1       ,DDA rate for RING1 PTSA"
group.long 0x588++0x03
line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_JPG          ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x62C++0x03
line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC        ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F8++0x03
line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AVP          ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x58C++0x03
line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_JPG          ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x63C++0x03
line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DFD          ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x554++0x03
line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC       ,DDA rate for VICPC PTSA"
group.long 0x544++0x03
line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK           ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x55C++0x03
line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC        ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x624++0x03
line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SDM          ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B8++0x03
line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX         ,DDA rate for SAX PTSA"
group.long 0x4B0++0x03
line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_PCX          ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4EC++0x03
line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_APB          ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x614++0x03
line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK2          ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4AC++0x03
line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX         ,DDA rate for PCX PTSA"
group.long 0x484++0x03
line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING1        ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x628++0x03
line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC       ,DDA rate for HDAPC PTSA"
group.long 0x450++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER  ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x618++0x03
line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK2          ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x550++0x03
line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AUD          ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x610++0x03
line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2         ,DDA rate for GK2 PTSA"
group.long 0x4A8++0x03
line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_ISP          ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x428++0x03
line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB        ,DDA rate for DISB PTSA"
group.long 0x49C++0x03
line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE2          ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x638++0x03
line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DFD          ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x50C++0x03
line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP        ,DDA rate for FTOP PTSA"
group.long 0x488++0x03
line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC     ,DDA rate for A9AVPPC PTSA"
group.long 0x498++0x03
line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE2          ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x52C++0x03
line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBX         ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x41C++0x03
line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS         ,DDA rate for DIS PTSA"
group.long 0x538++0x03
line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBD         ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x490++0x03
line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC      ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x524++0x03
line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX        ,DDA rate for USBX PTSA"
group.long 0x514++0x03
line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP         ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x630++0x03
line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC        ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D0++0x03
line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD          ,DDA rate for SD PTSA"
group.long 0x634++0x03
line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD         ,DDA rate for DFD PTSA"
group.long 0x510++0x03
line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP         ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x61C++0x03
line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM         ,DDA rate for SDM PTSA"
group.long 0x4DC++0x03
line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB         ,DDA rate for AHB PTSA"
group.long 0x460++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU    ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x444++0x03
line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING2        ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x620++0x03
line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SDM          ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4E8++0x03
line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB         ,DDA rate for APB PTSA"
group.long 0x4C8++0x03
line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MSE          ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x518++0x03
line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST        ,DDA rate for HOST PTSA"
group.long 0x434++0x03
line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE          ,DDA rate for VE PTSA"
group.long 0x4E4++0x03
line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AHB          ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4BC++0x03
line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SAX          ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x45C++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU    ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A4++0x03
line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_ISP          ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x520++0x03
line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HOST         ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C0++0x03
line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SAX          ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x438++0x03
line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE           ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x540++0x03
line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK           ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4CC++0x03
line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MSE          ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x430++0x03
line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DISB         ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x42C++0x03
line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DISB         ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x458++0x03
line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU   ,DDA rate for SMMU_SMMU PTSA"
group.long 0x494++0x03
line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2         ,DDA rate for VE2 PTSA"
group.long 0x53C++0x03
line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK          ,DDA rate for GK PTSA"
textline " "
group.long 0x960++0x03
line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register"
bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1"
hexmask.long.word 0x00 0.--11. 1. "     PTSA_GRANT_DECREMENT_FRAC ,Fractional portion"
textline " "
width 39.
group.long 0x2E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W              ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AVPCARM7R              ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW                 ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AXIAPR                 ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x380++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW              ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_DEVR              ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x384++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB                 ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3BC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA               ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMWRAA               ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3B8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA                ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRA                ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x370++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA                  ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR                  ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SESRD                  ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x374++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB                  ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWA                  ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B              ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0A              ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x394++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR                 ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_VICSRD                 ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB             ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3D8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR               ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVDECSRD               ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2FC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB             ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x390++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR                ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRD                ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT               ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAYHC              ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request"
group.long 0x694++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x348++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW            ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAW            ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x37C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW             ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_HOSTR             ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x344++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR            ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAR            ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB               ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRDB               ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW                   ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AFIR                   ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x698++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B  ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0B  ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C              ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3DC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW                   ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_APER                   ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A0++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C  ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0C  ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW               ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_A9AVPSCR               ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2                ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD2                ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB             ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0AB             ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x314++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW                ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW                 ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCR                 ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR               ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVJPGSRD               ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x34C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR                   ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW                   ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ETRR                   ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x320++0x03
line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW                ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_MPCORER                ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x398++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW                    ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x69C++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A4++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x350++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW                  ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SATAR                  ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x690++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A  ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0A  ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x310++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR                ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HOST1XDMAR             ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD               ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3AC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR                 ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD                 ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB               ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRAB               ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x388++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB                 ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWAB                 ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x328++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR               ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVENCSRD               ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x318++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW                   ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HDAR                   ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request"
endif
width 0x0B
tree.end
tree "MC2"
base ad:0x02C40000
width 19.
group.long 0x00++0x07
line.long 0x00 "INTSTATUS_0,Interrupt Status Register"
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT     ,Generalized carve out interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "        DECERR_MTS_INT                  ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECERR_SEC_INT            ,The request violated the SEC carve out requirements" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 12. " DECERR_VPR_INT                      ,The request violated the VPR requirements" "No interrupt,Interrupt"
bitfld.long 0x00 11. "        INVALID_APB_ASID_UPDATE_INT     ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INVALID_SMMU_PAGE_INT     ,Address translation error" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INT                ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt"
bitfld.long 0x00 8. "        SECURITY_VIOLATION_INT          ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  DECERR_EMEM_INT           ,Address translation error EMEM address decode error" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 16. "            DECERR_MTS_INTMASK              ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 13. "      SECERR_SEC_INTMASK        ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 12. " DECERR_VPR_INTMASK                  ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 11. "            INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 10. "      INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK            ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 8. "            SECURITY_VIOLATION_INTMASK      ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 6. "      DECERR_EMEM_INTMASK       ,EMEM address decode error interrupt mask" "Masked,Unmasked"
textline "                            "
sif (cpuis("TEGRAX2"))
group.long 0xEC4++0x03
line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register"
bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY                    ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 18. "            SCRUB_ECC_WR_ACK_INTPRIORITY        ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 16. "            DECERR_MTS_INTPRIORITY              ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY                  ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 12. "            DECERR_VPR_INTPRIORITY              ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY      ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 10. "            INVALID_SMMU_PAGE_INTPRIORITY       ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY            ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 8. "            SECURITY_VIOLATION_INTPRIORITY      ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY                 ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
endif
if ((per.l(ad:0x02C40000+0x08)&0x70000000)==0x60000000)
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE  ,Invalid SMMU page error page permission was readable" "Not readable,Readable"
textline "                            "
bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE      ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable"
bitfld.long 0x00 25. "       ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure"
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
else
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
endif
rgroup.long 0x0C++0x03
line.long 0x00 "ERR_ADR_0,Error Data Capture Address"
textline "                            "
sif (!cpuis("TEGRAX2"))
group.long 0x10++0x13
line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register"
bitfld.long 0x00 0. " SMMU_ENABLE                         ,SMMU enable" "Disabled,Enabled"
line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register"
bitfld.long 0x04 31. " TLB_STATS_ENABLE                    ,Enable TLB hit and miss counters" "Disabled,Enabled"
bitfld.long 0x04 30. "            TLB_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x04 29. "      TLB_HIT_UNDER_MISS        ,Allow hits to pass misses in the TLB" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION         ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "            TLB_ACTIVE_LINES                ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register"
bitfld.long 0x08 31. " PTC_STATS_ENABLE                    ,Enable PTC hit and miss counters" "Disabled,Enabled"
bitfld.long 0x08 30. "            PTC_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x08 29. "      PTC_CACHE_ENABLE          ,Enable the PTC cache" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT                       ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--11. 1. "                  PTC_LINE_MASK                   ,XOR pattern for line generation"
hexmask.long.byte 0x08 0.--6. 1. "            PTC_INDEX_MAP             ,XOR pattern for tag generation"
line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register"
hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID                        ,ASID used to address SMMUT PTB register"
line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register"
bitfld.long 0x10 31. " ASID_READABLE                       ,Allow reads for this ASID" "Not allowed,Allowed"
bitfld.long 0x10 30. "         ASID_WRITEABLE                  ,Allow writes for this ASID" "Not allowed,Allowed"
textline "                            "
bitfld.long 0x10 29. " ASID_NONSECURE                      ,Allow non-secure access for this ASID" "Not allowed,Allowed"
hexmask.long.tbyte 0x10 0.--21. 1. "         ASID_PDE_BASE                   ,Pointer to page of PDEs"
group.long 0x30++0x07
line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register"
bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH                ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "            TLB_FLUSH_ASID                  ,ASID to match"
hexmask.long.tbyte 0x00 2.--19. 1. "            TLB_FLUSH_VA_GROUP        ,Virtual address to match for group flashes"
textline "                            "
bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH                  ,Flushing control" "All,,Section,Group"
line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register"
hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR                       ,Physical address of PTE group"
bitfld.long 0x04 3. "            PTC_NO_WAIT_IDLE_FLUSH          ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled"
bitfld.long 0x04 0. "      PTC_FLUSH_TYPE            ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr"
endif
textline "                              "
width 37.
if (((per.l(ad:0x02C40000+0x664))&0x01)==0x00)
group.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_BOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
group.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
group.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,Mask is ANDed with address and the resulting value is XORed to a single bit"
endif
group.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
else
rgroup.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_DOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
rgroup.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
rgroup.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,EMEM channel mask bits"
endif
rgroup.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
endif
group.long 0x70++0x07
line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base"
hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM           ,Base of the secured region"
line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound"
hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB       ,Size in MB of the secured region"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x07
line.long 0x00 "SECURITY_CFG3_0,Security Config3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI        ,SECURITY BOM HI" "0,1,2,3"
endif
group.long 0x90++0x37
line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration"
hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update"
hexmask.long.word 0x00 0.--8. 1. "        CYCLES_PER_UPDATE             ,Number of MCCLK cycles per deadline timer update"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING      ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled"
bitfld.long 0x04 30. "  LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x04 16.--24. 1. "       ARB_OUTSTANDING_COUNT  ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "      ARB_MAX_OUTSTANDING           ,Maximum number of requests"
textline "                                        "
line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD"
bitfld.long 0x08 0.--5. " RCD                    ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP"
hexmask.long.byte 0x0C 0.--6. 1. " RP                     ,Minimum number of cycles between an internal precharge and activate command to the same bank"
line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC"
hexmask.long.byte 0x10 0.--7. 1. " RC                     ,Minimum number of cycles between activate commands to the same bank"
line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS"
hexmask.long.byte 0x14 0.--6. 1. " RAS                    ,Minimum number of cycles between activate and precharge command to the same bank"
line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW"
bitfld.long 0x18 0.--5. " FAW                    ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD"
bitfld.long 0x1C 0.--4. " RRD                    ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE"
hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE                ,Minimum number of cycles between read and internal precharge commands"
line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE"
hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE                ,Minimum number of cycles between write and internal precharge commands"
line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R"
bitfld.long 0x28 0.--4. " R2R                    ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W"
bitfld.long 0x2C 0.--4. " W2W                    ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W"
hexmask.long.byte 0x30 0.--6. 1. " R2W                    ,Number of cycles to turn the bus from reads to writes"
line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R"
hexmask.long.byte 0x34 0.--6. 1. " W2R                    ,Number of cycles to turn the bus from reads to writes"
group.long 0xD0++0x0F
line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0"
hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN               ,Bubbles produced by a write to read bus turn"
hexmask.long.byte 0x00 16.--23. 1. "        R2W_TURN                      ,Bubbles produced by a read to write bys turn"
hexmask.long.byte 0x00 8.--15. 1. "          W2W_TURN           ,Bubbles produced by a write to write (other device) bus turn"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "       R2R_TURN               ,Bubbles produced by a read to read (other device) bus turn"
line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers"
hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER            ,Cost to cover the activate-to-write delay"
hexmask.long.byte 0x04 8.--15. 1. "        RCD_R_COVER                   ,Cost to cover the activate-to-read delay"
hexmask.long.byte 0x04 0.--7. 1. "          RC_COVER           ,Cost to cover the activate-to-activate delay"
textline "                                        "
line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds"
bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE                          ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 27. "                    MC_EMC_SAME_FREQ                               ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC"
textline "                                        "
bitfld.long 0x08 21.--26. "       EXPIRING_SOON_SLACK_THRESHOLD                 ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--20. "                   PRIORITY_INVERSION_ISO_THRESHOLD               ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x08 15. "       EMC_REQ_B2B_XFER                              ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled"
hexmask.long.byte 0x08 8.--14. 1. "             PRIORITY_INVERSION_THRESHOLD                   ,Maximum number of unexpired requests"
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. "       B2AA_HOLDOFF_THRESHOLD                        ,Activation hold off threshold"
line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1"
bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD         ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--25. "                   REFRESH_ACK_THRESHOLD_USAGE                    ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..."
textline "                                        "
bitfld.long 0x0C 21.--23. "       EXPIRING_SOON_SLACK_THRESHOLD_PD              ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..."
hexmask.long.word 0x0C 4.--12. 1. "  ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD        ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format"
textline "                                        "
bitfld.long 0x0C 3. "       COMBINED_INTERRUPT_MODE                       ,Combined interrupt mode" "Independent,Shadowed"
bitfld.long 0x0C 2. "          BLOCK_LP_CPU_WR_IF_SMMU_INP_HP                 ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked"
textline "                                        "
bitfld.long 0x0C 1. "       ALLOW_BCA_HOLDOFF_WHN_EXP                     ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled"
bitfld.long 0x0C 0. "             BLOCK_LP_CPU_RD_IF_SMMU_INP_HP                 ,Low priority CPU reads get blocked" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2"
bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS                             ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled"
group.long 0xE0++0x07
line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH                    ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   RING1-THROTTLE_CYCLES_LOW                      ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES                         ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x6B0++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle "
bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT  ,NISO throttle disable count event" "Disabled,Enabled"
bitfld.long 0x00 16.--21. "           RING1_THROTTLE_CYCLES_HIGH          ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                              "
bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES             ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x664++0x0B
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access" "Disabled,Enabled"
line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register"
bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU STRICT TZ aperture check" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter"
bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding ring3" "Disabled,Enabled"
bitfld.long 0x08 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x08 0.--8. 1. "               ARB_MAX_OUTSTANDING_RING3           ,ARB maximum outstanding ring3"
group.long 0x6B4++0x0B
line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter"
bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO           ,Limit outstanding NISO" "Disabled,Enabled"
bitfld.long 0x00 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_NISO  ,Limit during hold off override NISO" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x00 0.--8. 1. "               ARB_MAX_OUTSTANDING_NISO            ,The maximum number of requests allowed in the arbiter"
line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask"
bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC         ,NISO throttle mask VICPC" "Disabled,Enabled"
bitfld.long 0x04 28. "           NISO_THROTTLE_MASK_USBD             ,NISO throttle mask USBD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST          ,NISO throttle mask HOST" "Disabled,Enabled"
bitfld.long 0x04 23. "           NISO_THROTTLE_MASK_SD               ,NISO throttle mask SD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK            ,NISO throttle mask GK" "Disabled,Enabled"
bitfld.long 0x04 19. "           NISO_THROTTLE_MASK_MSE              ,NISO throttle mask MSE" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX          ,NISO throttle mask USBX" "Disabled,Enabled"
bitfld.long 0x04 9. "           NISO_THROTTLE_MASK_SAX              ,NISO throttle mask SAX" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX           ,NISO throttle mask PCX" "Disabled,Enabled"
bitfld.long 0x04 3. "           NISO_THROTTLE_MASK_AVP              ,NISO throttle mask AVP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB           ,NISO throttle mask APB" "Disabled,Enabled"
bitfld.long 0x04 1. "           NISO_THROTTLE_MASK_AHB              ,NISO throttle mask AHB" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask"
bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled"
bitfld.long 0x08 15. "           RING0_THROTTLE_MASK_RING1_OUTPUT    ,Ring0 throttle mask ring1 output" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1        ,Ring0 throttle mask ring1" "Disabled,Enabled"
bitfld.long 0x08 6. "           RING0_THROTTLE_MASK_FTOP            ,Ring0 throttle mask FTOP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC          ,Ring0 throttle mask PTC" "Disabled,Enabled"
bitfld.long 0x08 0. "           RING0_THROTTLE_MASK_MPCORER         ,Ring0 throttle mask MPCORER" "Disabled,Enabled"
group.long 0xB80++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD           ,NISO throttle mask DFD" "Disabled,Enabled"
bitfld.long 0x00 4. "           NISO_THROTTLE_MASK_HDAPC            ,NISO throttle mask HDAPC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM           ,NISO throttle mask SDM" "Disabled,Enabled"
bitfld.long 0x00 2. "           NISO_THROTTLE_MASK_GK2              ,NISO throttle mask GK2" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG           ,NISO throttle mask JPG" "Disabled,Enabled"
group.long 0x670++0x07
line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB              ,SEC carve out size MB"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x678++0x03
line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0"
bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3"
bitfld.long 0x00 18. "                  ERR_SEC_SWAP                        ,Error security swap" "No error,Error"
textline "                                              "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Error secure security" "Non secure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                                              "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 0.--6. 1. "                  ERR_SEC_ID                          ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slow EMCCLK during DSR" "Disabled,Enabled"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x6C0++0x07
line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration"
hexmask.long.word 0x00 0.--8. 1. " RFCPB                            ,PMC specifies the per-bank auto refresh cycle time"
line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW"
bitfld.long 0x04 0.--5. " CCDMW                            ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,Open work control threshold"
hexmask.long.byte 0x00 8.--14. 1. "                 REFPB_THRESH_DISABLE_HP             ,Low priority control threshold"
textline "                                              "
hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP           ,High priority control threshold"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,Explicit bank mode" "0,1"
hexmask.long.byte 0x04 8.--14. 1. "                  REFPB_THRESH_DISABLE_FORCE_CLOSE    ,Force bank closure,low threshold"
textline "                                              "
hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE  ,Force bank closure,high threshold"
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "           ETR_FLUSH_ENABLE                    ,ETR flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "           NVJPG_FLUSH_ENABLE                  ,NVJPG flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           APE_FLUSH_ENABLE                    ,APE flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           GPU_FLUSH_ENABLE                    ,GPU flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           SDMMC4A_FLUSH_ENABLE                ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "In progress,Done"
bitfld.long 0x04 12. "        ETR_HOTRESET_STATUS                 ,ETR hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "In progress,Done"
bitfld.long 0x04 8. "        NVJPG_HOTRESET_STATUS               ,NVJPG hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "In progress,Done"
bitfld.long 0x04 6. "        APE_HOTRESET_STATUS                 ,APE hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "In progress,Done"
bitfld.long 0x04 2. "        GPU_HOTRESET_STATUS                 ,GPU hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "In progress,Done"
bitfld.long 0x04 0. "        SDMMC4A_HOTRESET_STATUS             ,SDMMC4A hot reset status" "In progress,Done"
textline "                                              "
endif
sif (!cpuis("TEGRAX2"))
group.long 0xE8++0x07
line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides"
bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE          ,FIFO deadlock check override" "Disabled,Enabled"
bitfld.long 0x00 28. "             ARB_EMEM_SPO_OVERRIDE                          ,EMEM SPO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 27. "       ARB_EMEM_AP_OVERRIDE                          ,EMEM AP override" "Disabled,Enabled"
bitfld.long 0x00 26. "             ARB_HUM_FIFO_OVERRIDE                          ,Hum FIFO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 23. "       ISO_TA_OVERRIDE                               ,ISO TA override" "Disabled,Enabled"
bitfld.long 0x00 22. "             ISO_DA_OVERRIDE                                ,ISO DA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_BC_INHERIT_ON_PRIINV_OVERRIDE             ,ISO BC inherit on PRINV override" "Disabled,Enabled"
bitfld.long 0x00 20. "             ISO_BC_CAUSE_PRIINV_OVERRIDE                   ,ISO BC cause PRINV override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 19. "       ISO_BA_OVERRIDE                               ,ISO_BA override" "Disabled,Enabled"
bitfld.long 0x00 18. "             ISO_AA_OVERRIDE                                ,ISO AA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 17. "       ARB_EMEM_BUBBLECALC_OVERRIDE                  ,EMEM bubble CALC override" "Disabled,Enabled"
bitfld.long 0x00 16. "             ALLOC_ONE_BQ_PER_CLIENT                        ,Allocate one BQ per client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 14. "             PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 13. "       PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE     ,Priority inversion threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 12. "             PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE     ,Priority inversion bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 11. "       PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE  ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled"
bitfld.long 0x00 10. "             OBSERVED_DIRECTION_OVERRIDE                    ,Observed direction override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 9. "       BC2AA_HOLDHOFF_OVERRIDE                       ,BC2AA hold off override" "Disabled,Enabled"
bitfld.long 0x00 8. "             TS2AA_HOLDHOFF_OVERRIDE                        ,TS2AA hold off override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 4. "       EXPIRE_UPDATE_OVERRIDE                        ,Expire update override" "Disabled,Enabled"
bitfld.long 0x00 3. "             GPU_SLICE_MERGE_OVERRIDE                       ,Combine GPU traffic override" "Disabled,Enabled"
textline "                                        "
line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved"
hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3"
hexmask.long.byte 0x04 16.--23. 1. "           EMEM_ARB_RESERVED_BYTE2  ,EMEM ARB reserved byte2"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. "       EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 "
hexmask.long.byte 0x04 0.--7. 1. "           EMEM_ARB_RESERVED_BYTE0  ,EMEM ARB reserved byte0"
group.long 0x0F4++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides"
bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR      ,EMC response clock override" "Gated,Override"
bitfld.long 0x00 14. "     TSR_CLKEN_OVR            ,EARB TSR clock override" "Gated,Override"
textline "                                        "
bitfld.long 0x00 13. "       RING2_CLKEN_OVR         ,Ring2 clock override" "Gated,Always on"
bitfld.long 0x00 12. "    RING1_CLKEN_OVR          ,Ring1 clock override" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 11. "       CH_DDA_CLKEN_OVR        ,CH_DDA_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 10. "    HUB_DDA_CLKEN_OVR        ,HUB_DDA_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 9. "       WCAM_CLKEN_OVR          ,WCAM_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 8. "    PTC_CACHE_CLKEN_OVR      ,PTC_CACHE_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 7. "       PTC_CLKEN_OVR           ,PTC_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 6. "    TLB_CLKEN_OVR            ,TLB_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 5. "       WB_CLKEN_OVR            ,WB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 3. "    REGS_CLKEN_OVR           ,REGS_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 2. "       EARB_CLKEN_OVR          ,EARB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 0. "    CIF_CLKEN_OVR            ,CIF_CLKEN_OVR" "Gated,Always on"
group.long 0x0FC++0x07
line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger"
bitfld.long 0x00 0. " TIMING_UPDATE           ,Trigger a timing update event" "No trigger,Trigger"
textline "                                        "
line.long 0x04 "STAT_CONTROL_0,Statistic Control"
bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER     ,EMC PM stop trigger" "No trigger,Trigger"
bitfld.long 0x04 2. "   EMC_PM_START_TRIGGER     ,EEMC PM start trigger" "No trigger,Trigger"
textline "                                        "
bitfld.long 0x04 0.--1. "       EMC_GATHER              ,EMC gather" "RST,,Disabled,Enabled"
textline "                                        "
endif
group.long 0x200++0x03
line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE    ,SDMMC3A flush enable" "Disabled,Enabled"
bitfld.long 0x00 30. "     SDMMC2A_FLUSH_ENABLE     ,SDMMC2A flush enable" "Disabled,Enabled"
bitfld.long 0x00 29. "     SDMMC1A_FLUSH_ENABLE      ,SDMMC1A flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_FLUSH_ENABLE       ,TSEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 20. "     XUSB_DEV_FLUSH_ENABLE    ,XUSB DEV flush enable" "Disabled,Enabled"
bitfld.long 0x00 19. "     XUSB_HOST_FLUSH_ENABLE    ,XUSB host flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 18. "       VIC_FLUSH_ENABLE        ,VIC flush enable" "Disabled,Enabled"
bitfld.long 0x00 17. "     VI_FLUSH_ENABLE          ,VI flush enable" "Disabled,Enabled"
bitfld.long 0x00 15. "     SATA_FLUSH_ENABLE         ,SATA flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_FLUSH_ENABLE       ,PPCS flush enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     NVENC_FLUSH_ENABLE       ,NVENC flush enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     MPCORE_FLUSH_ENABLE       ,MPCORE flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_FLUSH_ENABLE       ,ISP2 flush enable" "Disabled,Enabled"
bitfld.long 0x00 7. "     HDA_FLUSH_ENABLE         ,HDA flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     HC_FLUSH_ENABLE           ,HC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 3. "       DCB_FLUSH_ENABLE        ,DCB flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     DC_FLUSH_ENABLE          ,DC flush enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     AVPC_FLUSH_ENABLE         ,AVPC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. "       AFI_FLUSH_ENABLE        ,AFI flush enable" "Disabled,Enabled"
rgroup.long 0x204++0x03
line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register"
bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done"
bitfld.long 0x00 30. "  SDMMC2A_HOTRESET_STATUS  ,SDMMC2A flush status" "In progress,Done"
bitfld.long 0x00 29. "  SDMMC1A_HOTRESET_STATUS   ,SDMMC1A flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_HOTRESET_STATUS    ,TSEC flush status" "In progress,Done"
bitfld.long 0x00 20. "  XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done"
bitfld.long 0x00 19. "  XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 18. "       VIC_HOTRESET_STATUS     ,VIC flush status" "In progress,Done"
bitfld.long 0x00 17. "  VI_HOTRESET_STATUS       ,VI flush status" "In progress,Done"
bitfld.long 0x00 15. "  SATA_HOTRESET_STATUS      ,SATA flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_HOTRESET_STATUS    ,PPCS flush status" "In progress,Done"
bitfld.long 0x00 11. "  NVENC_HOTRESET_STATUS    ,NVENC flush status" "In progress,Done"
bitfld.long 0x00 9. "  MPCORE_HOTRESET_STATUS    ,MPCORE flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_HOTRESET_STATUS    ,ISP flush status" "In progress,Done"
bitfld.long 0x00 7. "  HDA_HOTRESET_STATUS      ,HDA flush status" "In progress,Done"
bitfld.long 0x00 6. "  HC_HOTRESET_STATUS        ,HC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 3. "       DCB_HOTRESET_STATUS     ,DCB flush status" "In progress,Done"
bitfld.long 0x00 2. "  DC_HOTRESET_STATUS       ,DC flush status" "In progress,Done"
bitfld.long 0x00 1. "  AVPC_HOTRESET_STATUS      ,AVPC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 0. "       AFI_HOTRESET_STATUS     ,AFI flush status" "In progress,Done"
group.long 0x208++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings"
bitfld.long 0x00 31. " ISO_SATAR               ,Client SATAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 30. "     ISO_PPCSAHBSLVR          ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 29. "     ISO_PPCSAHBDMAR           ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       ISO_NVENCCSRD           ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 23. "     ISO_HOST1XR              ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 22. "     ISO_HOST1XDMAR            ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_HDAR                ,Client HDAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 17. "     ISO_DISPLAYHCB           ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 16. "     ISO_DISPLAYHC             ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       ISO_AVPCARM7R           ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 14. "     ISO_AFIR                 ,Client AFIR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 6. "     ISO_DISPLAY0CB            ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       ISO_DISPLAY0C           ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_DISPLAY0BB           ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 3. "     ISO_DISPLAY0B             ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       ISO_DISPLAY0AB          ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_DISPLAY0A            ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 0. "     ISO_PTCR                  ,Client PTCR is treated as an isochronous client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings"
bitfld.long 0x04 29. " ISO_SATAW               ,Client SATAW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 28. "     ISO_PPCSAHBSLVW          ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 27. "     ISO_PPCSAHBDMAW           ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       ISO_MPCOREW             ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 22. "     ISO_HOST1XW              ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 21. "     ISO_HDAW                  ,Client HDAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 18. "       ISO_AVPCARM7W           ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 17. "     ISO_AFIW                 ,Client AFIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 11. "     ISO_NVENCSWR              ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. "       ISO_MPCORER             ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings"
bitfld.long 0x08 26. " ISO_DISPLAYT            ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 25. "     ISO_GPUSWR               ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 24. "     ISO_GPUSRD                ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       ISO_TSECSWR             ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 20. "     ISO_TSECSRD              ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 17. "     ISO_ISPWBB                ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       ISO_ISPWAB              ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 14. "     ISO_ISPRAB               ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 13. "     ISO_XUSB_DEVW             ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       ISO_XUSB_DEVR           ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 11. "     ISO_XUSB_HOSTW           ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 10. "     ISO_XUSB_HOSTR            ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       ISO_ISPWB               ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 6. "     ISO_ISPWA                ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 4. "     ISO_ISPRA                 ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings"
bitfld.long 0x0C 31. " ISO_NVJPGSWR            ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     ISO_NVJPGSRD             ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     ISO_APEW                  ,Client APEW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       ISO_APER                ,Client APER is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     ISO_NVDECSWR             ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     ISO_NVDECSRD              ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       ISO_DISPLAYD            ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     ISO_VIW                  ,Client VIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     ISO_VICSWR                ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       ISO_VICSRD              ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     ISO_SDMMCWAB             ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     ISO_SDMMCW                ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       ISO_SDMMCWAA            ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     ISO_SDMMCWA              ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     ISO_SDMMCRAB              ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       ISO_SDMMCR              ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     ISO_SDMMCRAA             ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     ISO_SDMMCCRA              ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xB94++0x03
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " SO_GPUSWR2              ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "     ISO_GPUSRD2              ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "     ISO_TSECSWRB              ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 6. "        ISO_TSECSRDB            ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "     ISO_ETRW                 ,Client ETRW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_ETRR                  ,Client ETRR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. "        ISO_AXIAPW              ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_AXIAPR               ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_SESWR                 ,Client SESWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_SESRD               ,Client SESRD is treated as an isochronous client" "Disabled,Enabled"
group.long 0xBA8++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0"
bitfld.long 0x00 3. " ISO_NVDECSRD1           ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_VICSRD1              ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_NVDISPLAYR1           ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_APEDMAW             ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled"
endif
group.long 0x218++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 31. " HYST_SATAR              ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "     HYST_PPCSAHBSLVR         ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "     HYST_PPCSAHBDMAR          ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       HYST_NVENCSRD           ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "     HYST_HOST1XR             ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "     HYST_HOST1XDMAR           ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       HYST_HDAR               ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "     HYST_DISPLAYHCB          ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "     HYST_DISPLAYHC            ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       HYST_AVPCARM7R          ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "     HYST_AFIR                ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "     HYST_DISPLAY0CB           ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       HYST_DISPLAY0C          ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "     HYST_DISPLAY0BB          ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "     HYST_DISPLAY0B            ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       HYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "     HYST_DISPLAY0A           ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "     HYST_PTCR                 ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings"
bitfld.long 0x04 29. " HYST_SATAW              ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "     HYST_PPCSAHBSLVW         ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "     HYST_PPCSAHBDMAW          ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       HYST_MPCOREW            ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled"
sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1"))
bitfld.long 0x04 24. "     HYST_MPCORELPW           ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled"
endif
bitfld.long 0x04 22. "     HYST_HOST1XW             ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 21. "       HYST_HDAW               ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "     HYST_AVPCARM7W           ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "     HYST_AFIW                 ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 11. "       HYST_NVENCSWR           ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "     HYST_MPCORER             ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings"
bitfld.long 0x08 26. " HYST_DISPLAYT           ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "     HYST_GPUSWR              ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "     HYST_GPUSRD               ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       HYST_TSECSWR            ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "     HYST_TSECSRD             ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "     HYST_ISPWBB               ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       HYST_ISPWAB             ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "     HYST_ISPRAB              ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "     HYST_XUSB_DEVW            ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       HYST_XUSB_DEVR          ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "     HYST_XUSB_HOSTW          ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "     HYST_XUSB_HOSTR           ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       HYST_ISPWB              ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "     HYST_ISPWA               ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "     HYST_ISPRA                ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings"
bitfld.long 0x0C 31. " HYST_NVJPGSWR           ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     HYST_NVJPGSRD            ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     HYST_APEW                 ,Client APEW is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       HYST_APER               ,Client APER is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     HYST_NVDECSWR            ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     HYST_NVDECSRD             ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       HYST_DISPLAYD           ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     HYST_VIW                 ,Client VIW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     HYST_VICSWR               ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       HYST_VICSRD             ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     HYST_SDMMCWAB            ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     HYST_SDMMCW               ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       HYST_SDMMCWAA           ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     HYST_SDMMCWA             ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     HYST_SDMMCRAB             ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       HYST_SDMMCR             ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     HYST_SDMMCRAA            ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     HYST_SDMCRA               ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0"
bitfld.long 0x00 31. " HYST_APEDMAR             ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  HYST_SCEDMAW          ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  HYST_SCEDMAR      ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " HYST_SCEW                ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 27. "  HYST_SCER             ,Client SCER is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 26. "  HYST_AONDMAW      ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. " HYST_AONDMAR             ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 24. "  HYST_AONW             ,Client AONW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  HYST_AONR         ,Client AONR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 22. " HYST_BPMPDMAW            ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 21. "  HYST_BPMPDMAR         ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 20. "  HYST_BPMPW        ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " HYST_BPMPR               ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 18. "  HYST_NVDISPLAYR       ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  HYST_UFSHCW       ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 16. " HYST_UFSHCR              ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 15. "  HYST_EQOSW            ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  HYST_EQOSR        ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " HYST_AXISW               ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 12. "  HYST_AXISR            ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 9. "  HYST_GPUSWR2      ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 8. " HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "  HYST_TSECSWRB         ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  HYST_TSECSRDB     ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  HYST_ETRR             ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_SESWR        ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_SESRD               ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBA4++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0"
bitfld.long 0x00 3. " HYST_NVDECSRD1           ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  HYST_VICSRD1          ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_NVDISPLAYR1  ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_APEDMAW             ,Client APEDMAW  is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR              ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  DHYST_PPCSAHBSLVR     ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " DHYST_NVENCSRD           ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  DHYST_HOST1XR         ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "  DHYST_HOST1XDMAR  ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " DHYST_HDAR               ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  DHYST_DISPLAYHCB      ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "  DHYST_DISPLAYHC   ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " DHYST_AVPCARM7R          ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  DHYST_AFIR            ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  DHYST_DISPLAY0CB  ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " DHYST_DISPLAY0C          ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  DHYST_DISPLAY0BB      ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "  DHYST_DISPLAY0B   ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_DISPLAY0A       ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "  DHYST_PTCR        ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW              ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "  DHYST_PPCSAHBSLVW     ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "  DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 25. " DHYST_MPCOREW            ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "  DHYST_HOST1XW         ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 21. "  DHYST_HDAW        ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 18. " DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "  DHYST_AFIW            ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 11. "  DHYST_NVENCSWR    ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " DHYST_MPCORER            ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT           ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "  DHYST_GPUSWR          ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "  DHYST_GPUSRD      ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 23. " DHYST_A9AVPSCW           ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 22. "  DHYST_A9AVPSCR        ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 21. "  DHYST_TSECSWR     ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 20. " DHYST_TSECSRD            ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "  DHYST_ISPWBB          ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 16. "  DHYST_ISPWAB      ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 14. " DHYST_ISPRAB             ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "  DHYST_XUSB_DEVW       ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 12. "  DHYST_XUSB_DEVR   ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 11. " DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "  DHYST_XUSB_HOSTR      ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 7. "  DHYST_ISPWB       ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 6. " DHYST_ISPWA              ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "  DHYST_ISPRA           ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR           ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "  DHYST_NVJPGSRD        ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "  DHYST_APEW        ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 26. " DHYST_APER               ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "  DHYST_NVDECSWR        ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "  DHYST_NVDECSRD    ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 19. " DHYST_DISPLAYD           ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "  DHYST_VIW             ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "  DHYST_VICSWR      ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 12. " DHYST_VICSRD             ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "  DHYST_SDMMCWAB        ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "  DHYST_SDMMCW      ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA           ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "  DHYST_SDMMCWA         ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "  DHYST_SDMMCRAB    ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 2. " DHYST_SDMMCR             ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "  DHYST_SDMMCRAA        ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "  DHYST_SDMMCRA     ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2            ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "  DHYST_GPUSRD2         ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "  DHYST_TSECSWRB    ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 6. " DHYST_TSECSRDB           ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "  DHYST_ETRW            ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "  DHYST_ETRR        ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 3. " DHYST_AXIAPW             ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "  DHYST_AXIAPR          ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "  DHYST_SESWR       ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 0. " DHYST_SESRD              ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBF0++0x03
line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 3. " DHYST_NVDECSRD1          ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  DHYST_VICSRD1         ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " DHYST_APEDMAW            ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic"
bitfld.long 0x00 31. " DHYST_ENABLE             ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x1F
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0        ,DHYST delay bin 0"
line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1"
hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1        ,DHYST delay bin 1"
line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2"
hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2        ,DHYST delay bin 2"
line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3"
hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3        ,DHYST delay bin 3"
line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4"
hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4        ,DHYST delay bin 4"
line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5"
hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5        ,DHYST delay bin 5"
line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6"
hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6        ,DHYST delay bin 6"
line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7"
hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7        ,DHYST delay bin 7"
group.long 0xA60++0x03
line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC   ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled"
group.long 0xA70++0x07
line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC    ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled"
line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0"
bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP     ,Response clock-enable override for partition client FTOP" "Disabled,Enabled"
group.long 0xA80++0x03
line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3   ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled"
group.long 0xA3C++0x03
line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG      ,Response clock-enable override for partition client JPG" "Disabled,Enabled"
group.long 0xA14++0x03
line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST     ,Response clock-enable override for partition client HOST" "Disabled,Enabled"
group.long 0x2AC++0x03
line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS      ,Response clock-enable override for partition client DIS" "Disabled,Enabled"
group.long 0xA78++0x03
line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled"
group.long 0xA1C++0x03
line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC    ,Response clock-enable override for partition client VICPC" "Disabled,Enabled"
group.long 0xA58++0x03
line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC  ,RCLKEN override UFSHCPC" "Disabled,Enabled"
group.long 0xA6C++0x03
line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x228++0x0F
line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables"
bitfld.long 0x00 31. " SMMU_SATAR_ENABLE       ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 30. "     SMMU_PPCSAHBSLVR_ENABLE  ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 29. "     SMMU_PPCSAHBDMAR_ENABLE   ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       SMMU_NVENCSRD_ENABLE    ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 23. "     SMMU_HOST1XR_ENABLE      ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 22. "     SMMU_HOST1XDMAR_ENABLE    ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       SMMU_HDAR_ENABLE        ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 17. "     SMMU_DISPLAYHCB_ENABLE   ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 16. "     SMMU_DISPLAYHC_ENABLE     ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       SMMU_AVPCARM7R_ENABLE   ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 14. "     SMMU_AFIR_ENABLE         ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 6. "     SMMU_DISPLAY0CB_ENABLE    ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       SMMU_DISPLAY0C_ENABLE   ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 4. "     SMMU_DISPLAY0BB_ENABLE   ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 3. "     SMMU_DISPLAY0B_ENABLE     ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       SMMU_DISPLAY0AB_ENABLE  ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 1. "     SMMU_DISPLAY0A_ENABLE    ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled"
line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables"
bitfld.long 0x04 29. " SMMU_SATAW_ENABLE       ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 28. "     SMMU_PPCSAHBSLVW_ENABLE  ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 27. "     SMMU_PPCSAHBDMAW_ENABLE   ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 22. "       SMMU_HOST1XW_ENABLE     ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 21. "     SMMU_HDAW_ENABLE         ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 18. "     SMMU_AVPCARM7W_ENABLE     ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 17. "       SMMU_AFIW_ENABLE        ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 11. "     SMMU_NVENCSWR_ENABLE     ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled"
line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables"
bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE    ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled"
rbitfld.long 0x08 25. "     SMMU_GPUSWR_ENABLE       ,GPU translation is handled by SWID" "Disabled,Enabled"
rbitfld.long 0x08 24. "     SMMU_GPUSRD_ENABLE        ,GPU translation is handled by SWID" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       SMMU_TSECSWR_ENABLE     ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 20. "     MMU_TSECSRD_ENABLE       ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 17. "     SMMU_ISPWBB_ENABLE        ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       SMMU_ISPWAB_ENABLE      ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 14. "     SMMU_ISPRAB_ENABLE       ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x08 13. "     SMMU_XUSB_DEVW_ENABLE     ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       SMMU_XUSB_DEVR_ENABLE   ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 11. "     SMMU_XUSB_HOSTW_ENABLE   ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 10. "     SMMU_XUSB_HOSTR_ENABLE    ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       SMMU_ISPWB_ENABLE       ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 6. "     SMMU_ISPWA_ENABLE        ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 4. "     SMMU_ISPRA_ENABLE         ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled"
line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables"
bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE    ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 30. "     SMMU_NVJPGSRD_ENABLE     ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SMMU_APEW_ENABLE          ,Enable client APEW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       SMMU_APER_ENABLE        ,Enable client APER to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 25. "     SMMU_NVDECSWR_ENABLE     ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 24. "     SMMU_NVDECSRD_ENABLE      ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       SMMU_DISPLAYD_ENABLE    ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 18. "     SMMU_VIW_ENABLE          ,Client VIW  translation to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 13. "     SMMU_VICSWR_ENABLE        ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       SMMU_VICSRD_ENABLE      ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x0C 7. "     SMMU_SDMMCWAB_ENABLE     ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 6. "     SMMU_SDMMCW_ENABLE        ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       SMMU_SDMMWAA_ENABLE     ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 4. "     SMMU_SDMMCWA_ENABLE      ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 3. "     SMMU_SDMMCRAB_ENABLE      ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       SMMU_SDMMCR_ENABLE      ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 1. "     SMMU_SDMMCRAA_ENABLE     ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 0. "     SMMU_SDMMCRA_ENABLE       ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled"
textline " "
width 23.
if (((per.l(ad:0x02C40000+0x238))&0x80000000)==0x80000000)
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  AFI_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AFI_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AFI_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AFI_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x23C))&0x80000000)==0x80000000)
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  AVPC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x240))&0x80000000)==0x80000000)
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DC_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x244))&0x80000000)==0x80000000)
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DCB_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DCB_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DCB_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DCB_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x250))&0x80000000)==0x80000000)
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  HC_ASID         ,ASID to use when VA[3332] == 0x0"
else
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x254))&0x80000000)==0x80000000)
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  HDA_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  HDA_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  HDA_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  HDA_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x258))&0x80000000)==0x80000000)
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  ISP2_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x264))&0x80000000)==0x80000000)
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " NVENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  NVENC_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " MSENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x268))&0x80000000)==0x80000000)
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV_ASID         ,ASID to use for NV translation" "0,1,2,3"
else
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x26C))&0x80000000)==0x80000000)
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV2_ASID        ,ASID to use for NV2 translation" "0,1,2,3"
else
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x270))&0x80000000)==0x80000000)
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  PPCS_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x274))&0x80000000)==0x80000000)
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  SATA_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SATA_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SATA_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SATA_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x280))&0x80000000)==0x80000000)
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  VI_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  VI_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  VI_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  VI_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x284))&0x80000000)==0x80000000)
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  VIC_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x288))&0x80000000)==0x80000000)
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x28C))&0x80000000)==0x80000000)
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x294))&0x80000000)==0x80000000)
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE  ,TSEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  TSEC_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_SMMU_ENABLE      ,TSEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0x298))&0x80000000)==0x80000000)
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " SMMU_ENABLE           ,PPCS1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  ASID            ,ASID to use when VA[3332] == 0x0"
else
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE     ,PPCS1 translation enable" "Disabled,Enabled"
endif
endif
width 34.
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x404++0x03
line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX      ,Response clock-enable override for partition client USBX" "Disabled,Enabled"
group.long 0x2B8++0x03
line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX       ,Response clock-enable override for partition client PCX" "Disabled,Enabled"
group.long 0xE08++0x03
line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2      ,Response clock-enable override for partition client MSE2" "Disabled,Enabled"
group.long 0xA7C++0x03
line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2    ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled"
group.long 0xA4C++0x03
line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD       ,Response clock-enable override for partition client DFD" "Disabled,Enabled"
group.long 0xE00++0x03
line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2      ,Response clock-enable override for partition client NVD2" "Disabled,Enabled"
group.long 0xA44++0x03
line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM       ,Response clock-enable override for partition client SDM" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB       ,Response clock-enable override for partition client APB" "Disabled,Enabled"
group.long 0xA08++0x03
line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP       ,Response clock-enable override for partition client ISP" "Disabled,Enabled"
group.long 0xA18++0x03
line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD      ,Response clock-enable override for partition client USBD" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE       ,Response clock-enable override for partition client MSE" "Disabled,Enabled"
group.long 0xA10++0x03
line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD       ,Response clock-enable override for partition client AUD" "Disabled,Enabled"
group.long 0xA54++0x03
line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC       ,Response clock-enable override for partition client NIC" "Disabled,Enabled"
group.long 0xA40++0x03
line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2       ,Response clock-enable override for partition client GK2" "Disabled,Enabled"
group.long 0xA64++0x03
line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled"
group.long 0xE04++0x03
line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3      ,Response clock-enable override for partition client NVD3" "Disabled,Enabled"
group.long 0x2C0++0x03
line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX       ,Response clock-enable override for partition client SAX" "Disabled,Enabled"
group.long 0xA5C++0x03
line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC    ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled"
group.long 0xA38++0x03
line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD       ,Response clock-enable override for partition client NVD" "Disabled,Enabled"
group.long 0xA50++0x03
line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1      ,Response clock-enable override for partition client SDM1" "Disabled,Enabled"
group.long 0xA48++0x03
line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC     ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled"
group.long 0xA68++0x03
line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC     ,Response clock-enable override for partition client AONPC" "Disabled,Enabled"
group.long 0xA04++0x03
line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD        ,Response clock-enable override for partition client SD" "Disabled,Enabled"
group.long 0xA84++0x03
line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2      ,Response clock-enable override for partition client DIS2" "Disabled,Enabled"
group.long 0x2D8++0x03
line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE        ,Response clock-enable override for partition client VE" "Disabled,Enabled"
group.long 0xA00++0x03
line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0"
bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES  ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled"
bitfld.long 0x00 3. "                 RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled"
textline "                                           "
endif
sif (!cpuis("TEGRAX2"))
group.long 0x418++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register"
bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE             ,SDMMC3A VPR override" "Disabled,Enabled"
bitfld.long 0x00 30. "          SDMMC2A_VPR_OVERRIDE                 ,SDMMC2A VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE             ,SDMMC1A VPR override" "Disabled,Enabled"
bitfld.long 0x00 26. "          DC1_VPR_OVERRIDE                     ,DC1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE               ,PPCS1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 22. "          TSEC_VPR_OVERRIDE                    ,TSEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE            ,XUSB SEV VPR override" "Disabled,Enabled"
bitfld.long 0x00 19. "          XUSB_HOST_VPR_OVERRIDE               ,XUSB HOST VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 18. " VIC_VPR_OVERRIDE                 ,VIC VPR override" "Disabled,Enabled"
bitfld.long 0x00 17. "          VI_VPR_OVERRIDE                      ,VI VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " SATA_VPR_OVERRIDE                ,SATA VPR override" "Disabled,Enabled"
bitfld.long 0x00 14. "          PPCS_VPR_OVERRIDE                    ,PPCS VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE               ,NVENC VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          MPCORE_VPR_OVERRIDE                  ,MPCORE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE                ,ISP2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          HDA_VPR_OVERRIDE                     ,HDA VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HC_VPR_OVERRIDE                  ,HC VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          DCB_VPR_OVERRIDE                     ,DCB VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DC_VPR_OVERRIDE                  ,DC VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          AVPC_VPR_OVERRIDE                    ,AVPC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " AFI_VPR_OVERRIDE                 ,AFI VPR override" "Disabled,Enabled"
group.long 0x590++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register"
bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE              ,NVDEC1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 15. "          TSECB1_VPR_OVERRIDE                  ,TSECB11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE               ,TSEC11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 13. "          TSECB_VPR_OVERRIDE                   ,TSECB1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 12. " ETR_VPR_OVERRIDE                 ,ETR1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 11. "          AXIAP_VPR_OVERRIDE                   ,AXIAP1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 10. " SE1_VPR_OVERRIDE                 ,SE11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          HC1_VPR_OVERRIDE                     ,HC11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE               ,NVJPG1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          SE_VPR_OVERRIDE                      ,SE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " APE_VPR_OVERRIDE                 ,APE VPR override" "Disabled,Enabled"
bitfld.long 0x00 5. "          NVDEC_VPR_OVERRIDE                   ,NVDEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE               ,PPCS2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          GPUB_VPR_OVERRIDE                    ,GBUP VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " GPU_VPR_OVERRIDE                 ,GPU VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          ISP2B_VPR_OVERRIDE                   ,ISP2B VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE             ,SDMMC4A VPR override" "Disabled,Enabled"
textline "                                           "
group.long 0x600++0x03
line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask"
hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0         ,TLB set selection mask 0"
group.long 0x608++0x03
line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection"
bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS   ,Display snap ring write access" "Enabled,Disabled"
bitfld.long 0x00 1. "          DISB_SNAP_RING                       ,DISB snap ring" "RING0,RING1"
textline "                                           "
bitfld.long 0x00 0. " DIS_SNAP_RING                    ,DIS snap ring" "RING0,RING1"
endif
sif (cpuis("TEGRAX2"))
group.long 0x648++0x07
line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0"
hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM                   ,Base address for the VPR address space"
line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB               ,Size of the VPR region in megabytes"
group.long 0x978++0x03
line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0"
bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI            ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3"
group.long 0x650++0x03
line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register  0"
bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled"
bitfld.long 0x00 0. "  VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1"
textline "                                           "
endif
rgroup.long 0x654++0x03
line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0"
bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI                   ,Higher address bits of erring address" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_VPR_SWAP                         ,Error VPR swap" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_VPR_SECURITY                 ,Error VPR security" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_VPR_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_VPR_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "              ERR_VPR_ID                           ,Client identifier"
rgroup.long 0x658++0x03
line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address"
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x03
line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI           ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3"
group.long 0xF80++0x07
line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB          ,Enable REGIF HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_MC                ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_EMC           ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0"
bitfld.long 0x04 31. " LOCK_REGIF_CONFIG         ,Lock REGIF configuration" "Disabled,Enabled"
bitfld.long 0x04 24.--25. "  ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3"
bitfld.long 0x04 16.--17. "      ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3"
textline "                                           "
bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "        ENABLE_REGIF_BROADCAST_EMC     ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF90++0x0F
line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_UNICAST0_MC       ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_UNICAST0_EMC  ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0"
bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3"
bitfld.long 0x04 8.--11. "         ENABLE_REGIF_UNICAST1_MC       ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "     ENABLE_REGIF_UNICAST1_EMC  ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3"
bitfld.long 0x08 8.--11. "         ENABLE_REGIF_UNICAST2_MC       ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "     ENABLE_REGIF_UNICAST2_EMC  ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3"
bitfld.long 0x0C 8.--11. "         ENABLE_REGIF_UNICAST3_MC       ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "     ENABLE_REGIF_UNICAST3_EMC  ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF2C++0x03
line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0"
bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT      ,SCRUB ECC WR ACK Interrupt" "Clear,Set"
group.long 0xF24++0x07
line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0"
bitfld.long 0x00 24. " COMMON_INTR               ,Common interrupt" "Clear,Set"
bitfld.long 0x00 17. "     HUB1_INTR                      ,Hub 1 interrupt" "Clear,Set"
bitfld.long 0x00 16. "  HUB0_INTR                  ,Hub 0 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 3. " MC3_INTR                  ,Channel 3 interrupt" "Clear,Set"
bitfld.long 0x00 2. "     MC2_INTR                       ,Channel 2 interrupt" "Clear,Set"
bitfld.long 0x00 1. "  MC1_INTR                   ,Channel 1 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 0. " MC0_INTR                  ,Channel 0 interrupt" "Clear,Set"
line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0"
bitfld.long 0x04 24. " COMMON_CRITICAL_INTR      ,Common critical interrupt" "Clear,Set"
bitfld.long 0x04 17. "     HUB1_CRITICAL_INTR             ,Hub 1 critical interrupt" "Clear,Set"
bitfld.long 0x04 16. "  HUB0_CRITICAL_INTR         ,Hub 0 critical interrupt." "Clear,Set"
textline "                                           "
bitfld.long 0x04 3. " MC3_CRITICAL_INTR         ,Channel 3 critical interrupt." "Clear,Set"
bitfld.long 0x04 2. "     MC2_CRITICAL_INTR              ,Channel 2 critical interrupt." "Clear,Set"
bitfld.long 0x04 1. "  MC1_CRITICAL_INTR          ,Channel 1 critical interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x04 0. " MC0_CRITICAL_INTR         ,Channel 0 critical interrupt" "Clear,Set"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x964++0x03
line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming"
bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS            ,IRAM configuration write access disable" "No,Yes"
group.long 0x664++0x03
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access disable" "No,Yes"
group.long 0x668++0x07
line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register"
bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU strict TrustZone aperture check enable" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding RING3" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_RING3            ,Maximum number of requests allowed in the arbiter when limit is enabled"
group.long 0x670++0x0B
line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0"
hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB             ,Size of the SEC carve out region"
line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0"
bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_SEC_SWAP                         ,ERR_SEC_SWAP" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Set if transaction was secure" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--6. 1. "              ERR_SEC_ID                           ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled"
group.long 0x6B0++0x17
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH        ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                NISO_THROTTLE_CYCLES                 ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO           ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDOFF_OVERRIDE_NISO   ,Overrides the limiting of NISO transactions" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_NISO             ,The maximum number of requests allowed in the arbiter"
line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC         ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 28. "          NISO_THROTTLE_MASK_USBD              ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST          ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 23. "          NISO_THROTTLE_MASK_SD                ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK            ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 19. "          NISO_THROTTLE_MASK_MSE               ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX          ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 9. "          NISO_THROTTLE_MASK_SAX               ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX           ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 3. "          NISO_THROTTLE_MASK_AVP               ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB           ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 1. "          NISO_THROTTLE_MASK_AHB               ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask"
bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled"
bitfld.long 0x0C 15. "          RING0_THROTTLE_MASK_RING1_OUTPUT     ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1        ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled"
bitfld.long 0x0C 6. "          RING0_THROTTLE_MASK_FTOP             ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC          ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x0C 0. "          RING0_THROTTLE_MASK_MPCORER          ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB"
hexmask.long.word 0x10 0.--8. 1. " RFCPB                            ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank"
line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW"
bitfld.long 0x14 0.--5. " CCDMW                            ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued"
textline "                                           "
hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP          ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority"
hexmask.long.byte 0x00 0.--6. 1. "                REFPB_THRESH_ENABLE_HP               ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled"
textline "                                           "
hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure"
hexmask.long.byte 0x04 0.--6. 1. "                REFPB_THRESH_ENABLE_FORCE_CLOSE      ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure"
group.long 0x968++0x03
line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0"
bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE       ,Multi-bank replay override enable" "Disabled,Enabled"
bitfld.long 0x00 5. "          EXPIRE_UPDATE_DEADLOCK_OVERRIDE      ,Expire update deadlock override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY        ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..."
bitfld.long 0x00 0.--1. "  CPU_WRITE_PAGE_OPEN_POLICY           ,CPU write page open policy" "Disabled,All,Eack_hint,?..."
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ETR_FLUSH_ENABLE                     ,ETR flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "          NVJPG_FLUSH_ENABLE                   ,NVJPG flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          APE_FLUSH_ENABLE                     ,APE flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "          GPU_FLUSH_ENABLE                     ,GPU flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          SDMMC4A_FLUSH_ENABLE                 ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "Done,In progress"
bitfld.long 0x04 12. "       ETR_HOTRESET_STATUS                  ,ETR hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "Done,In progress"
bitfld.long 0x04 8. "       NVJPG_HOTRESET_STATUS                ,NVJPG hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "Done,In progress"
bitfld.long 0x04 6. "       APE_HOTRESET_STATUS                  ,APE hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "Done,In progress"
bitfld.long 0x04 2. "       GPU_HOTRESET_STATUS                  ,GPU hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "Done,In progress"
bitfld.long 0x04 0. "       SDMMC4A_HOTRESET_STATUS              ,SDMMC4A hot reset status" "Done,In progress"
group.long 0x984++0x07
line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0"
line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0"
hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1     ,Video protect GPU override 1"
group.long 0x9A0++0x0F
line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM                 ,MTS carve out BOM"
line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB             ,MTS carve out size MB"
line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0"
bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI              ,MTS carve out BOM Hi" "0,1,2,3"
line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0"
bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS        ,MTS carve out write access" "Enabled,Disabled"
group.long 0x9B8++0x07
line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register"
bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI                 ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11"
line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration"
bitfld.long 0x04 0.--1. " SECURITY_BOM_HI                  ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11"
textline "                                           "
width 26.
if (((per.l(ad:0x02C40000+0x664))&0x01)==0x00)
group.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
else
rgroup.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
endif
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11"
if (((per.l(ad:0x02C40000+0xA88))&0x80000000)==0x80000000)
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      DC1_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC1_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC1_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC1_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xA94))&0x80000000)==0x80000000)
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xA98))&0x80000000)==0x80000000)
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xA9C))&0x80000000)==0x80000000)
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAA0))&0x80000000)==0x80000000)
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAA4))&0x80000000)==0x80000000)
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ISP2B_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2B_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2B_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2B_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAA8))&0x80000000)==0x80000000)
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPU_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPU_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPU_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPU_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAAC))&0x80000000)==0x80000000)
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPUB_ASID_3    ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPUB_ASID_2    ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPUB_ASID_1    ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPUB_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAB0))&0x80000000)==0x80000000)
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      PPCS2_ASID     ,ASID to use for PPCS2 translation"
else
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAB4))&0x80000000)==0x80000000)
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAB8))&0x80000000)==0x80000000)
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      APE_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xABC))&0x80000000)==0x80000000)
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAC0))&0x80000000)==0x80000000)
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVJPG_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAC4))&0x80000000)==0x80000000)
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      HC1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAC8))&0x80000000)==0x80000000)
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xACC))&0x80000000)==0x80000000)
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      AXIAP_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AXIAP_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AXIAP_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AXIAP_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAD0))&0x80000000)==0x80000000)
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ETR_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ETR_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ETR_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ETR_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAD4))&0x80000000)==0x80000000)
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAD8))&0x80000000)==0x80000000)
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSEC1_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC1_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC1_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC1_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xADC))&0x80000000)==0x80000000)
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB1_ASID_3  ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB1_ASID_2  ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB1_ASID_1  ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB1_ASID  ,ASID to use when VA[3332] == 0x0"
else
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C40000+0xAE0))&0x80000000)==0x80000000)
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC1_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
endif
textline " "
width 34.
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 4. "  NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 3. "  NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included"
textline "                                           "
bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 1. "  NISO_THROTTLE_MASK_JPG   ,Include JPG in the NISO meta-client group for throttling" "Not included,Included"
group.long 0xB84++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 9. " HYST_GPUSWR2           ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 8. "      HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "      HYST_TSECSWRB          ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HYST_TSECRDB           ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 5. "      HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      HYST_ETTR              ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " HYST_AXIAPW            ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "      HYST_AXIAPR              ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      HYST_SESWR             ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " HYST_SESRD             ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " ISO_GPUSWR2            ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "      ISO_GPUSRD2              ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "      ISO_TSECSWRB           ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " ISO_TSECRDB            ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "      ISO_ETRW                 ,Client ETRW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "      ISO_ETTR               ,Client ETTR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " ISO_AXIAPW             ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "      ISO_AXIAPR               ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "      ISO_SESWR              ,Client SESWR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " ISO_SESRD              ,Client SESRD is treated as a isochronous client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings"
rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE    ,Client GPUSWR2 translate by SMMU enable" ",Enabled"
rbitfld.long 0x00 8. "       SMMU_GPUSRD2_ENABLE      ,Client GPUSRD2 translate by SMMU enable" ",Enabled"
bitfld.long 0x00 7. "       SMMU_TSECSWRB_ENABLE   ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE    ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      SMMU_ETRW_ENABLE         ,Client ETRW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      SMMU_ETTR_ENABLE       ,Client ETTR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE     ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      SMMU_AXIAPR_ENABLE       ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SMMU_SESWR_ENABLE      ,Client SESWR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SMMU_SESRD_ENABLE      ,Client SESRD translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR            ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "      DHYST_PPCSAHBSLVR        ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "      DHYST_PPCSAHBDMAR      ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 28. " DHYST_NVENCSRD         ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "      DHYST_HOST1XR            ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "      DHYST_HOST1XDMAR       ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 21. " DHYST_HDAR             ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "      DHYST_DISPLAYHCB         ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "      DHYST_DISPLAYHC        ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " DHYST_AVPCARM7R        ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "      DHYST_AFIR               ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "      DHYST_DISPLAY0CB       ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " DHYST_DISPLAY0C        ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      DHYST_DISPLAY0BB         ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "      DHYST_DISPLAY0B        ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB       ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      DHYST_DISPLAY0A          ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "      DHYST_PTCR             ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW            ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "      DHYST_PPCSAHBSLVW        ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "      DHYST_PPCSAHBDMAW      ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 25. " DHYST_MPCOREW          ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 24. "      DHYST_MPCORELPW          ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "      DHYST_HOST1XW          ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 21. " DHYST_HDAW             ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "      DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "      DHYST_AFIW             ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 11. " DHYST_NVENCSWR         ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "      DHYST_MPCORER            ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT         ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "      DHYST_GPUSWR             ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "      DHYST_GPUSRD           ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 21. " DHYST_TSECSWR          ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "      DHYST_TSECSRD            ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "      DHYST_ISPWBB           ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 16. " DHYST_ISPWAB           ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "      DHYST_ISPRAB             ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "      DHYST_XUSB_DEVW        ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 12. " DHYST_XUSB_DEVR        ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "      DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "      DHYST_XUSB_HOSTR       ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " DHYST_ISPWB            ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "      DHYST_ISPWA              ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "      DHYST_ISPRA            ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR         ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DHYST_NVJPGSRD           ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "      DHYST_APEW             ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 26. " DHYST_APER             ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "      DHYST_NVDECSWR           ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "      DHYST_NVDECSRD         ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 19. " DHYST_DISPLAYD         ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "      DHYST_VIW                ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "      DHYST_VICSWR           ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 12. " DHYST_VICSRD           ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "      DHYST_SDMMCWAB           ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "      DHYST_SDMMCW           ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA         ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "      DHYST_SDMMCWA            ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "      DHYST_SDMMCRAB         ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " DHYST_SDMMCR           ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "      DHYST_SDMMCRAA           ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "      DHYST_SDMCRA           ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2          ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "      DHYST_GPUSRD2            ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "      DHYST_TSECSWRB         ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 6. " DHYST_TSECRDB          ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "      DHYST_ETRW               ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "      DHYST_ETTR             ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 3. " DHYST_AXIAPW           ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "      DHYST_AXIAPR             ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "      DHYST_SESWR            ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 0. " DHYST_SESRD            ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register"
bitfld.long 0x00 31. " DHYST_ENABLE           ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DHYST_BW_MON_INTERVAL    ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0      ,Timeout delay"
group.long 0xBD4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1      ,Timeout delay"
group.long 0xBD8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2      ,Timeout delay"
group.long 0xBDC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3      ,Timeout delay"
group.long 0xBE0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4      ,Timeout delay"
group.long 0xBE4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5      ,Timeout delay"
group.long 0xBE8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6      ,Timeout delay"
group.long 0xBEC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7      ,Timeout delay"
textline " "
width 25.
group.long 0x9DC++0x03
line.long 0x00 "DA_CONFIG0_0,DA Configuration Register"
bitfld.long 0x00 0. " NEW_ARB_SCHEME        ,New DA arbitration scheme use enable" "Disabled,Enabled"
textline " "
group.long 0x4E0++0x03
line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AHB          ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x54C++0x03
line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AUD          ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x44C++0x03
line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA"
group.long 0x440++0x03
line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2       ,DDA rate for RING2 PTSA"
group.long 0x530++0x03
line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD        ,DDA rate for USBD PTSA"
group.long 0x528++0x03
line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBX         ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBD         ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F0++0x03
line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_APB          ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x584++0x03
line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG         ,DDA rate for JPG PTSA"
group.long 0x420++0x03
line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DIS          ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4FC++0x03
line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AVP          ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F4++0x03
line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP         ,DDA rate for AVP PTSA"
group.long 0x480++0x03
line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING1        ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x424++0x03
line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DIS          ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D8++0x03
line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SD           ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C4++0x03
line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE         ,DDA rate for MSE PTSA"
group.long 0x558++0x03
line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC        ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B4++0x03
line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_PCX          ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A0++0x03
line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP         ,DDA rate for ISP PTSA"
group.long 0x48C++0x03
line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC      ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x448++0x03
line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING2        ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x548++0x03
line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD         ,DDA rate for AUD PTSA"
group.long 0x51C++0x03
line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HOST         ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x454++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER  ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D4++0x03
line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SD           ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1       ,DDA rate for RING1 PTSA"
group.long 0x588++0x03
line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_JPG          ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x62C++0x03
line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC        ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F8++0x03
line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AVP          ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x58C++0x03
line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_JPG          ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x63C++0x03
line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DFD          ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x554++0x03
line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC       ,DDA rate for VICPC PTSA"
group.long 0x544++0x03
line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK           ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x55C++0x03
line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC        ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x624++0x03
line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SDM          ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B8++0x03
line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX         ,DDA rate for SAX PTSA"
group.long 0x4B0++0x03
line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_PCX          ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4EC++0x03
line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_APB          ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x614++0x03
line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK2          ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4AC++0x03
line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX         ,DDA rate for PCX PTSA"
group.long 0x484++0x03
line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING1        ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x628++0x03
line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC       ,DDA rate for HDAPC PTSA"
group.long 0x450++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER  ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x618++0x03
line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK2          ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x550++0x03
line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AUD          ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x610++0x03
line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2         ,DDA rate for GK2 PTSA"
group.long 0x4A8++0x03
line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_ISP          ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x428++0x03
line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB        ,DDA rate for DISB PTSA"
group.long 0x49C++0x03
line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE2          ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x638++0x03
line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DFD          ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x50C++0x03
line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP        ,DDA rate for FTOP PTSA"
group.long 0x488++0x03
line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC     ,DDA rate for A9AVPPC PTSA"
group.long 0x498++0x03
line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE2          ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x52C++0x03
line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBX         ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x41C++0x03
line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS         ,DDA rate for DIS PTSA"
group.long 0x538++0x03
line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBD         ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x490++0x03
line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC      ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x524++0x03
line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX        ,DDA rate for USBX PTSA"
group.long 0x514++0x03
line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP         ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x630++0x03
line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC        ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D0++0x03
line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD          ,DDA rate for SD PTSA"
group.long 0x634++0x03
line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD         ,DDA rate for DFD PTSA"
group.long 0x510++0x03
line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP         ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x61C++0x03
line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM         ,DDA rate for SDM PTSA"
group.long 0x4DC++0x03
line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB         ,DDA rate for AHB PTSA"
group.long 0x460++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU    ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x444++0x03
line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING2        ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x620++0x03
line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SDM          ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4E8++0x03
line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB         ,DDA rate for APB PTSA"
group.long 0x4C8++0x03
line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MSE          ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x518++0x03
line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST        ,DDA rate for HOST PTSA"
group.long 0x434++0x03
line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE          ,DDA rate for VE PTSA"
group.long 0x4E4++0x03
line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AHB          ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4BC++0x03
line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SAX          ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x45C++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU    ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A4++0x03
line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_ISP          ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x520++0x03
line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HOST         ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C0++0x03
line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SAX          ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x438++0x03
line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE           ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x540++0x03
line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK           ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4CC++0x03
line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MSE          ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x430++0x03
line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DISB         ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x42C++0x03
line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DISB         ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x458++0x03
line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU   ,DDA rate for SMMU_SMMU PTSA"
group.long 0x494++0x03
line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2         ,DDA rate for VE2 PTSA"
group.long 0x53C++0x03
line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK          ,DDA rate for GK PTSA"
textline " "
group.long 0x960++0x03
line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register"
bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1"
hexmask.long.word 0x00 0.--11. 1. "     PTSA_GRANT_DECREMENT_FRAC ,Fractional portion"
textline " "
width 39.
group.long 0x2E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W              ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AVPCARM7R              ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW                 ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AXIAPR                 ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x380++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW              ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_DEVR              ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x384++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB                 ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3BC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA               ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMWRAA               ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3B8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA                ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRA                ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x370++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA                  ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR                  ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SESRD                  ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x374++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB                  ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWA                  ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B              ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0A              ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x394++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR                 ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_VICSRD                 ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB             ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3D8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR               ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVDECSRD               ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2FC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB             ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x390++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR                ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRD                ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT               ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAYHC              ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request"
group.long 0x694++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x348++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW            ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAW            ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x37C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW             ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_HOSTR             ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x344++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR            ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAR            ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB               ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRDB               ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW                   ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AFIR                   ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x698++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B  ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0B  ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C              ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3DC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW                   ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_APER                   ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A0++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C  ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0C  ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW               ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_A9AVPSCR               ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2                ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD2                ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB             ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0AB             ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x314++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW                ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW                 ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCR                 ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR               ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVJPGSRD               ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x34C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR                   ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW                   ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ETRR                   ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x320++0x03
line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW                ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_MPCORER                ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x398++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW                    ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x69C++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A4++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x350++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW                  ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SATAR                  ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x690++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A  ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0A  ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x310++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR                ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HOST1XDMAR             ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD               ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3AC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR                 ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD                 ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB               ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRAB               ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x388++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB                 ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWAB                 ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x328++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR               ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVENCSRD               ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x318++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW                   ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HDAR                   ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request"
endif
width 0x0B
tree.end
tree "MC3"
base ad:0x02C50000
width 19.
group.long 0x00++0x07
line.long 0x00 "INTSTATUS_0,Interrupt Status Register"
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INT     ,Generalized carve out interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "        DECERR_MTS_INT                  ,Access violation on MTS carve out region in the memory controller" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  SECERR_SEC_INT            ,The request violated the SEC carve out requirements" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 12. " DECERR_VPR_INT                      ,The request violated the VPR requirements" "No interrupt,Interrupt"
bitfld.long 0x00 11. "        INVALID_APB_ASID_UPDATE_INT     ,ASID update through APB interface resulted in an error" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INVALID_SMMU_PAGE_INT     ,Address translation error" "No interrupt,Interrupt"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INT                ,Warning that a pending request has reached the deadlock-prevention slack threshold" "No interrupt,Interrupt"
bitfld.long 0x00 8. "        SECURITY_VIOLATION_INT          ,Address translation error non secure access was attempted to a secured region" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  DECERR_EMEM_INT           ,Address translation error EMEM address decode error" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
bitfld.long 0x04 17. " DECCER_GENERALIZED_CARVEOUT_INTMASK ,Generalized carve out interrupt interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 16. "            DECERR_MTS_INTMASK              ,Access violation on MTS carve out region in the memory controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 13. "      SECERR_SEC_INTMASK        ,The request violated the SEC carve out requirements interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 12. " DECERR_VPR_INTMASK                  ,The request violated the VPR requirements interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 11. "            INVALID_APB_ASID_UPDATE_INTMASK ,ASID update through APB interface resulted in an error interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 10. "      INVALID_SMMU_PAGE_INTMASK ,Address translation error interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 9. " ARBITRATION_EMEM_INTMASK            ,Warning that a pending request has reached the deadlock-prevention slack threshold interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 8. "            SECURITY_VIOLATION_INTMASK      ,Non secure access was attempted to a secured region interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 6. "      DECERR_EMEM_INTMASK       ,EMEM address decode error interrupt mask" "Masked,Unmasked"
textline "                            "
sif (cpuis("TEGRAX2"))
group.long 0xEC4++0x03
line.long 0x00 "INTPRIORITY_0,Interrupt Priority Register"
bitfld.long 0x00 19. " WCAM_ERR_INTPRIORITY                    ,WCAM detects an error in use of ENCR enable ENKR REY SET or ECC enable interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 18. "            SCRUB_ECC_WR_ACK_INTPRIORITY        ,Prevents SCRUB ECC WR ACK interrupt from triggering a high-priority interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 17. " DECERR_GENERALIZED_CARVEOUT_INTPRIORITY ,Generalized carve out interrupt priority interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 16. "            DECERR_MTS_INTPRIORITY              ,DECERR MTS Interrupt priority interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 13. " SECERR_SEC_INTPRIORITY                  ,Prevents SECERR secure interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 12. "            DECERR_VPR_INTPRIORITY              ,Prevents DECERR VPR interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 11. " NVALID_APB_ASID_UPDATE_INTPRIORITY      ,Prevents invalid APB ASID update interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 10. "            INVALID_SMMU_PAGE_INTPRIORITY       ,Prevents INVALID SMMU PAGE interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 9. " ARBITRATION_EMEM_INTPRIORITY            ,Prevents ARBITRATION EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
bitfld.long 0x00 8. "            SECURITY_VIOLATION_INTPRIORITY      ,Prevents security violation interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
bitfld.long 0x00 6. " DECERR_EMEM_INTPRIORITY                 ,Prevents DECERR EMEM interrupt from triggering an interrupt to the interrupt controller interrupt mask" "Masked,Unmasked"
textline "                            "
endif
if ((per.l(ad:0x02C50000+0x08)&0x70000000)==0x60000000)
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
bitfld.long 0x00 27. " ERR_INVALID_SMMU_PAGE_READABLE  ,Invalid SMMU page error page permission was readable" "Not readable,Readable"
textline "                            "
bitfld.long 0x00 26. " ERR_INVALID_SMMU_PAGE_WRITABLE      ,Invalid SMMU page error page permission was writeable" "Not writeable,Writeable"
bitfld.long 0x00 25. "       ERR_INVALID_SMMU_PAGE_NONSECURE ,Invalid SMMU page error page permission was non-secure" "Secure,Non-secure"
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in error ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
else
rgroup.long 0x08++0x03
line.long 0x00 "ERR_STATUS_0,Memory Controller Error Data Capture Status"
bitfld.long 0x00 28.--30. " ERR_TYPE                            ,Type of the corresponding error" ",,DECERR EMEM,Security trust zone,,,Invalid SMMU page,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 20.--21. " ERR_ADR_HI                          ,Higher address bits of erring address whose lower bits are available in ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "                 ERR_SWAP                        ,Swap bit for transaction" "0,1"
textline "                            "
bitfld.long 0x00 17. " ERR_SECURITY                        ,Transaction security" "Non secure,Secure"
bitfld.long 0x00 16. "          ERR_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                            "
bitfld.long 0x00 12.--14. " ERR_ADR1                            ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "                ERR_ID                          ,Client identifier of the access that caused the error"
endif
rgroup.long 0x0C++0x03
line.long 0x00 "ERR_ADR_0,Error Data Capture Address"
textline "                            "
sif (!cpuis("TEGRAX2"))
group.long 0x10++0x13
line.long 0x00 "SMMU_CONFIG_0,SMMU Enable Register"
bitfld.long 0x00 0. " SMMU_ENABLE                         ,SMMU enable" "Disabled,Enabled"
line.long 0x04 "SMMU_TLB_CONFIG_0,Translation Lookaside Buffer Configuration Register"
bitfld.long 0x04 31. " TLB_STATS_ENABLE                    ,Enable TLB hit and miss counters" "Disabled,Enabled"
bitfld.long 0x04 30. "            TLB_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x04 29. "      TLB_HIT_UNDER_MISS        ,Allow hits to pass misses in the TLB" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " TLB_ROUND_ROBIN_ARBITRATION         ,Forces round robin arbitration between TLB hit and miss FIFOs" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "            TLB_ACTIVE_LINES                ,Set the number of active lines" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "SMMU_PTC_CONFIG_0,Page Table Cache Configuration Register"
bitfld.long 0x08 31. " PTC_STATS_ENABLE                    ,Enable PTC hit and miss counters" "Disabled,Enabled"
bitfld.long 0x08 30. "            PTC_STATS_TEST                  ,Set stats registers to all 1s" "Disabled,Enabled"
bitfld.long 0x08 29. "      PTC_CACHE_ENABLE          ,Enable the PTC cache" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24.--27. " PTC_REQ_LIMIT                       ,Limit outstanding PTC fill requests to the DRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--11. 1. "                  PTC_LINE_MASK                   ,XOR pattern for line generation"
hexmask.long.byte 0x08 0.--6. 1. "            PTC_INDEX_MAP             ,XOR pattern for tag generation"
line.long 0x0C "SMMU_PTB_ASID_0,Page Table Base ASID Register"
hexmask.long.byte 0x0C 0.--6. 1. " CURRENT_ASID                        ,ASID used to address SMMUT PTB register"
line.long 0x10 "SMMU_PTB_DATA_0,Page Table Base Data Register"
bitfld.long 0x10 31. " ASID_READABLE                       ,Allow reads for this ASID" "Not allowed,Allowed"
bitfld.long 0x10 30. "         ASID_WRITEABLE                  ,Allow writes for this ASID" "Not allowed,Allowed"
textline "                            "
bitfld.long 0x10 29. " ASID_NONSECURE                      ,Allow non-secure access for this ASID" "Not allowed,Allowed"
hexmask.long.tbyte 0x10 0.--21. 1. "         ASID_PDE_BASE                   ,Pointer to page of PDEs"
group.long 0x30++0x07
line.long 0x00 "SMMU_TLB_FLUSH_0,Translation Lookaside Buffer Flush Register"
bitfld.long 0x00 31. " TLB_FLUSH_ASID_MATCH                ,Only entries matching TLB flush ASID are flushed" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "            TLB_FLUSH_ASID                  ,ASID to match"
hexmask.long.tbyte 0x00 2.--19. 1. "            TLB_FLUSH_VA_GROUP        ,Virtual address to match for group flashes"
textline "                            "
bitfld.long 0x00 0.--1. " TLB_FLUSH_VA_MATCH                  ,Flushing control" "All,,Section,Group"
line.long 0x04 "SMMU_PTC_FLUSH_0,Page Table Cache Flush Register"
hexmask.long 0x04 4.--31. 0x10 " PTC_FLUSH_ADR                       ,Physical address of PTE group"
bitfld.long 0x04 3. "            PTC_NO_WAIT_IDLE_FLUSH          ,Set bit to immediately flush without waiting for hit FIFO to go idle" "Disabled,Enabled"
bitfld.long 0x04 0. "      PTC_FLUSH_TYPE            ,Flushing control (Flush entire PTC ADR,or only the one addressed by ADR)" "All,Adr"
endif
textline "                              "
width 37.
if (((per.l(ad:0x02C50000+0x664))&0x01)==0x00)
group.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_BOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
group.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
group.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects which memory controller channels are enabled for normal read/writes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,Mask is ANDed with address and the resulting value is XORed to a single bit"
endif
group.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
else
rgroup.long 0x50++0x0F
line.long 0x00 "EMEM_CFG_0,External Memory Aperture Configuration"
bitfld.long 0x00 31. " EMEM_DOM               ,Base of DRAM memory in GBs" "B2GB,B0GB"
hexmask.long.word 0x00 0.--13. 1. "      EMEM_SIZE_MB                  ,External memory aperture size in megabytes"
line.long 0x04 "EMEM_ADR_CFG_0,External Memory Address Configuration For System"
bitfld.long 0x04 0. " EMEM_NUMDEV            ,Number of populated DRAM devices" "N1,N2"
line.long 0x08 "EMEM_ADR_CFG_DEV0_0,External Memory Address Configuration For Device 0"
bitfld.long 0x08 16.--19. " EMEM_DEV0_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x08 8.--9. "     EMEM_DEV0_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x08 0.--2. "          EMEM_DEV0_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
line.long 0x0C "EMEM_ADR_CFG_DEV1_0,External Memory Address Configuration For Device 1"
bitfld.long 0x0C 16.--19. " EMEM_DEV1_DEVSIZE      ,Density of the first attached DRAM device" ",,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB,8GB,768MB,384MB,?..."
bitfld.long 0x0C 8.--9. "     EMEM_DEV1_BANKWIDTH           ,Width of bank address of the first attached DRAM device" ",,W2,W3"
bitfld.long 0x0C 0.--2. "          EMEM_DEV1_COLWIDTH ,Width of column address of the first attached DRAM device" ",W8,W9,W10,W11,W12,?..."
sif (!cpuis("TEGRAX2"))
rgroup.long 0x60++0x03
line.long 0x00 "EMEM_ADR_CFG_CHANNEL_MASK_0,External Memory Address Configuration Channel Select Mask"
hexmask.long.tbyte 0x00 9.--31. 1. " EMEM_CHANNEL_MASK      ,EMEM channel mask bits"
else
rgroup.long 0xDF8++0x07
line.long 0x00 "MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0,External Memory Address Configuration Channel Select Mask"
bitfld.long 0x00 0.--3. " EMEM_CHANNEL_ENABLE    ,Selects memory controller channels" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_EMEM_ADR_CFG_CHANNEL_MASK_0,EMEM ADR Configuration Channel Mask 1 Register"
hexmask.long.tbyte 0x04 9.--31. 1. " EMEM_CHANNEL_MASK_1    ,EMEM channel mask bits"
endif
rgroup.long 0x64++0x0B
line.long 0x00 "EMEM_ADR_CFG_BANK_MASK_0_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x00 10.--31. 1. " EMEM_BANK_MASK_0       ,EMEM bank mask bits 0"
line.long 0x04 "EMEM_ADR_CFG_BANK_MASK_1_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x04 10.--31. 1. " EMEM_BANK_MASK_1       ,EMEM bank mask bits 1"
line.long 0x08 "EMEM_ADR_CFG_BANK_MASK_2_0,External Memory Address Configuration Bank Select Mask"
hexmask.long.tbyte 0x08 10.--31. 1. " EMEM_BANK_MASK_2       ,EMEM bank mask bits 2"
endif
group.long 0x70++0x07
line.long 0x00 "SECURITY_CFG0_0,Secure Region Configuration For Base"
hexmask.long.word 0x00 20.--31. 0x10 " SECURITY_BOM           ,Base of the secured region"
line.long 0x04 "SECURITY_CFG1_0,Secure Region Configuration For Bound"
hexmask.long.word 0x04 0.--12. 1. " SECURITY_SIZE_MB       ,Size in MB of the secured region"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x07
line.long 0x00 "SECURITY_CFG3_0,Security Config3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI        ,SECURITY BOM HI" "0,1,2,3"
endif
group.long 0x90++0x37
line.long 0x00 "EMEM_ARB_CFG_0,External Memory Arbitration Configuration"
hexmask.long.byte 0x00 16.--20. 1. " EXTRA_TICKS_PER_UPDATE ,Number of extra ticks to add every deadline timer update"
hexmask.long.word 0x00 0.--8. 1. "        CYCLES_PER_UPDATE             ,Number of MCCLK cycles per deadline timer update"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_0,External Memory Arbitration Configuration For Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING      ,Total number of requests in the arbitration is limited to the value in ARB_MAX_OUTSTANDING" "Disabled,Enabled"
bitfld.long 0x04 30. "  LIMIT_DURING_HOLDOFF_OVERRIDE ,Override the limiting of transactions" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x04 16.--24. 1. "       ARB_OUTSTANDING_COUNT  ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "      ARB_MAX_OUTSTANDING           ,Maximum number of requests"
textline "                                        "
line.long 0x08 "EMEM_ARB_TIMING_RCD_0,External Memory Arbitration Configuration For DRAM Timing TRCD"
bitfld.long 0x08 0.--5. " RCD                    ,Minimum number of cycles between activate commands to the same bank" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EMEM_ARB_TIMING_RP_0,External Memory Arbitration Configuration For DRAM Timing TRP"
hexmask.long.byte 0x0C 0.--6. 1. " RP                     ,Minimum number of cycles between an internal precharge and activate command to the same bank"
line.long 0x10 "EMEM_ARB_TIMING_RC_0,External Memory Arbitration Configuration For DRAM Timing TRC"
hexmask.long.byte 0x10 0.--7. 1. " RC                     ,Minimum number of cycles between activate commands to the same bank"
line.long 0x14 "EMEM_ARB_TIMING_RAS_0,External Memory Arbitration Configuration For DRAM Timing TRAS"
hexmask.long.byte 0x14 0.--6. 1. " RAS                    ,Minimum number of cycles between activate and precharge command to the same bank"
line.long 0x18 "EMEM_ARB_TIMING_FAW_0,External Memory Arbitration Configuration For DRAM Timing TFAW"
bitfld.long 0x18 0.--5. " FAW                    ,tFAW setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "EMEM_ARB_TIMING_RRD_0,External Memory Arbitration Configuration For DRAM Timing TRRD"
bitfld.long 0x1C 0.--4. " RRD                    ,Minimum number of cycles between activate command and activate command to a different bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "EMEM_ARB_TIMING_RAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TRAP2PRE"
hexmask.long.byte 0x20 0.--6. 1. " RAP2PRE                ,Minimum number of cycles between read and internal precharge commands"
line.long 0x24 "EMEM_ARB_TIMING_WAP2PRE_0,External Memory Arbitration Configuration For DRAM Timing TWAP2PRE"
hexmask.long.byte 0x24 0.--6. 1. " WAP2PRE                ,Minimum number of cycles between write and internal precharge commands"
line.long 0x28 "EMEM_ARB_TIMING_R2R_0,External Memory Arbitration Configuration For DRAM Timing TR2R"
bitfld.long 0x28 0.--4. " R2R                    ,Minimum number of cycles between consecutive read commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x2C "EMEM_ARB_TIMING_W2W_0,External Memory Arbitration Configuration For DRAM Timing TW2W"
bitfld.long 0x2C 0.--4. " W2W                    ,Minimum number of cycles between consecutive write commands to different devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "EMEM_ARB_TIMING_R2W_0,External Memory Arbitration Configuration For DRAM Timing TR2W"
hexmask.long.byte 0x30 0.--6. 1. " R2W                    ,Number of cycles to turn the bus from reads to writes"
line.long 0x34 "EMEM_ARB_TIMING_W2R_0,External Memory Arbitration Configuration For DRAM Timing TW2R"
hexmask.long.byte 0x34 0.--6. 1. " W2R                    ,Number of cycles to turn the bus from reads to writes"
group.long 0xD0++0x0F
line.long 0x00 "EMEM_ARB_DA_TURNS_0,External Memory Arbitration Configuration For Direction Arbiter Turns 0"
hexmask.long.byte 0x00 24.--31. 1. " W2R_TURN               ,Bubbles produced by a write to read bus turn"
hexmask.long.byte 0x00 16.--23. 1. "        R2W_TURN                      ,Bubbles produced by a read to write bys turn"
hexmask.long.byte 0x00 8.--15. 1. "          W2W_TURN           ,Bubbles produced by a write to write (other device) bus turn"
textline "                                        "
hexmask.long.byte 0x00 0.--7. 1. "       R2R_TURN               ,Bubbles produced by a read to read (other device) bus turn"
line.long 0x04 "EMEM_ARB_DA_COVERS_0,External Memory Arbitration Configuration For Direction Arbiter Covers"
hexmask.long.byte 0x04 16.--23. 1. " RCD_W_COVER            ,Cost to cover the activate-to-write delay"
hexmask.long.byte 0x04 8.--15. 1. "        RCD_R_COVER                   ,Cost to cover the activate-to-read delay"
hexmask.long.byte 0x04 0.--7. 1. "          RC_COVER           ,Cost to cover the activate-to-activate delay"
textline "                                        "
line.long 0x08 "EMEM_ARB_MISC0_0,External Memory Arbitration Configuration For Miscellaneous Thresholds"
bitfld.long 0x08 28.--30. " ATOMS_PER_DVFS_PULSE                          ,Atoms per DVFS pulse setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 27. "                    MC_EMC_SAME_FREQ                               ,Memory controller data request frequency is the half/same as EMC" "EMC/2,Same as EMC"
textline "                                        "
bitfld.long 0x08 21.--26. "       EXPIRING_SOON_SLACK_THRESHOLD                 ,Slack threshold below which an isochronous request is considered to be expiring soon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--20. "                   PRIORITY_INVERSION_ISO_THRESHOLD               ,Maximum number of unexpired or expired and not synchronous requests" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x08 15. "       EMC_REQ_B2B_XFER                              ,Allow EMC transactions on back to back clocks regardless of EMC consumption bandwidth" "Disabled,Enabled"
hexmask.long.byte 0x08 8.--14. 1. "             PRIORITY_INVERSION_THRESHOLD                   ,Maximum number of unexpired requests"
textline "                                        "
hexmask.long.byte 0x08 0.--7. 1. "       B2AA_HOLDOFF_THRESHOLD                        ,Activation hold off threshold"
line.long 0x0C "EMEM_ARB_MISC1_0,External Memory Arbitration Configuration For Miscellaneous Threshold 1"
bitfld.long 0x0C 28.--31. " DEADLOCK_PREVENTATION_SLACK_THRESHOLD         ,Deadlock prevention slack threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--25. "                   REFRESH_ACK_THRESHOLD_USAGE                    ,Threshold's select for refresh-acknowledge signal" "Normal,ISO,None,?..."
textline "                                        "
bitfld.long 0x0C 21.--23. "       EXPIRING_SOON_SLACK_THRESHOLD_PD              ,Slack threshold below which an isochronous request is considered to be expiring soon" "ZERO_TICKS,ONE_TICK,TWO_TICKS,FOUR_TICKS,EIGHT_TICKS,Use SLACK_THRESHOLD,?..."
hexmask.long.word 0x0C 4.--12. 1. "  ALT_DEADLOCK_PREVENTION_SLACK_THRESHOLD        ,Use the absolute value of deadlock prevention slack threshold instead of 2^n format"
textline "                                        "
bitfld.long 0x0C 3. "       COMBINED_INTERRUPT_MODE                       ,Combined interrupt mode" "Independent,Shadowed"
bitfld.long 0x0C 2. "          BLOCK_LP_CPU_WR_IF_SMMU_INP_HP                 ,Low priority CPU writes blocked while SMMU output is high priority" "Not blocked,Blocked"
textline "                                        "
bitfld.long 0x0C 1. "       ALLOW_BCA_HOLDOFF_WHN_EXP                     ,Allows BCA hold off to occur even when expired requests are present" "Disabled,Enabled"
bitfld.long 0x0C 0. "             BLOCK_LP_CPU_RD_IF_SMMU_INP_HP                 ,Low priority CPU reads get blocked" "Disabled,Enabled"
group.long 0xC8++0x03
line.long 0x00 "EMEM_ARB_MISC2_0,External Memory Arbitration Configuration For Miscellaneous Threshold 2"
bitfld.long 0x00 0. " ALLOW_B2B_TA_REQS                             ,Transaction arbiter grant requests on back-to-back cycles enable" "Disabled,Enabled"
group.long 0xE0++0x07
line.long 0x00 "EMEM_ARB_RING1_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " RING1_THROTTLE_CYCLES_HIGH                    ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   RING1-THROTTLE_CYCLES_LOW                      ,Cycles of throttle when transaction count is below threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_RING3_THROTTLE_0,External Memory Arbitration Configuration For Snap Arbiter Throttle"
bitfld.long 0x04 0.--4. " RING3_THROTTLE_CYCLES                         ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0x6B0++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,External Memory Arbitration Configuration Snap Arbiter Throttle "
bitfld.long 0x00 31. " NISO_THROTTLE_DISABLE_CNT_EVENT  ,NISO throttle disable count event" "Disabled,Enabled"
bitfld.long 0x00 16.--21. "           RING1_THROTTLE_CYCLES_HIGH          ,Cycles of throttle when transaction count is greater than or equal to threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                              "
bitfld.long 0x00 0.--5. " NISO_THROTTLE_CYCLES             ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x664++0x0B
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0,Access Control Bit For EMEM Configuration Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access" "Disabled,Enabled"
line.long 0x04 "TZ_SECURITY_CTRL_0,TrustZone Security Control Register"
bitfld.long 0x04 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU STRICT TZ aperture check" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Highest Ring Outstanding Request Limiter"
bitfld.long 0x08 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding ring3" "Disabled,Enabled"
bitfld.long 0x08 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_RING3 ,Limit during hold off override ring3" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x08 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x08 0.--8. 1. "               ARB_MAX_OUTSTANDING_RING3           ,ARB maximum outstanding ring3"
group.long 0x6B4++0x0B
line.long 0x00 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,External Memory Arbitration Configuration:Outstanding Request Limiter"
bitfld.long 0x00 31. " LIMIT_OUTSTANDING_NISO           ,Limit outstanding NISO" "Disabled,Enabled"
bitfld.long 0x00 30. "           LIMIT_DURING_HOLDOFF_OVERRIDE_NISO  ,Limit during hold off override NISO" "Disabled,Enabled"
textline "                                              "
hexmask.long.word 0x00 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x00 0.--8. 1. "               ARB_MAX_OUTSTANDING_NISO            ,The maximum number of requests allowed in the arbiter"
line.long 0x04 "EMEM_ARB_NISO_THROTTLE_MASK_0,External Memory Arbitration Configuration:Throttle Mask"
bitfld.long 0x04 29. " NISO_THROTTLE_MASK_VICPC         ,NISO throttle mask VICPC" "Disabled,Enabled"
bitfld.long 0x04 28. "           NISO_THROTTLE_MASK_USBD             ,NISO throttle mask USBD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 27. " NISO_THROTTLE_MASK_HOST          ,NISO throttle mask HOST" "Disabled,Enabled"
bitfld.long 0x04 23. "           NISO_THROTTLE_MASK_SD               ,NISO throttle mask SD" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 22. " NISO_THROTTLE_MASK_GK            ,NISO throttle mask GK" "Disabled,Enabled"
bitfld.long 0x04 19. "           NISO_THROTTLE_MASK_MSE              ,NISO throttle mask MSE" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 17. " NISO_THROTTLE_MASK_USBX          ,NISO throttle mask USBX" "Disabled,Enabled"
bitfld.long 0x04 9. "           NISO_THROTTLE_MASK_SAX              ,NISO throttle mask SAX" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " NISO_THROTTLE_MASK_PCX           ,NISO throttle mask PCX" "Disabled,Enabled"
bitfld.long 0x04 3. "           NISO_THROTTLE_MASK_AVP              ,NISO throttle mask AVP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 2. " NISO_THROTTLE_MASK_APB           ,NISO throttle mask APB" "Disabled,Enabled"
bitfld.long 0x04 1. "           NISO_THROTTLE_MASK_AHB              ,NISO throttle mask AHB" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_RING0_THROTTLE_MASK_0,External Memory Arbitration Configuration:Ring0 Input Throttle Mask"
bitfld.long 0x08 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,ARB outstanding count above SMMU" "Disabled,Enabled"
bitfld.long 0x08 15. "           RING0_THROTTLE_MASK_RING1_OUTPUT    ,Ring0 throttle mask ring1 output" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 7. " RING0_THROTTLE_MASK_RING1        ,Ring0 throttle mask ring1" "Disabled,Enabled"
bitfld.long 0x08 6. "           RING0_THROTTLE_MASK_FTOP            ,Ring0 throttle mask FTOP" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 2. " RING0_THROTTLE_MASK_PTC          ,Ring0 throttle mask PTC" "Disabled,Enabled"
bitfld.long 0x08 0. "           RING0_THROTTLE_MASK_MPCORER         ,Ring0 throttle mask MPCORER" "Disabled,Enabled"
group.long 0xB80++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,External Memory Arbitration Configuration:Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD           ,NISO throttle mask DFD" "Disabled,Enabled"
bitfld.long 0x00 4. "           NISO_THROTTLE_MASK_HDAPC            ,NISO throttle mask HDAPC" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " NISO_THROTTLE_MASK_SDM           ,NISO throttle mask SDM" "Disabled,Enabled"
bitfld.long 0x00 2. "           NISO_THROTTLE_MASK_GK2              ,NISO throttle mask GK2" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " NISO_THROTTLE_MASK_JPG           ,NISO throttle mask JPG" "Disabled,Enabled"
group.long 0x670++0x07
line.long 0x00 "SEC_CARVEOUT_BOM_0,Security Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,SEC Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB              ,SEC carve out size MB"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x678++0x03
line.long 0x00 "SEC_CARVEOUT_REG_CTRL_0,Security Carve Out Register Control 0"
bitfld.long 0x00 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other security carve out aperture registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Error Security Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of erring address whose lower bits are available in the error ADR register" "0,1,2,3"
bitfld.long 0x00 18. "                  ERR_SEC_SWAP                        ,Error security swap" "No error,Error"
textline "                                              "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Error secure security" "Non secure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                          ,Direction of the access that caused the error" "Read,Write"
textline "                                              "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second sub partition unique address bits" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 0.--6. 1. "                  ERR_SEC_ID                          ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Error Security ADR 0"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Configuration"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slow EMCCLK during DSR" "Disabled,Enabled"
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Security Carve Out ADR HI 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI              ,Security carve out BOM HI" "0,1,2,3"
group.long 0x6C0++0x07
line.long 0x00 "EMEM_ARB_TIMING_RFCPB_0,External Memory Arbitration Configuration"
hexmask.long.word 0x00 0.--8. 1. " RFCPB                            ,PMC specifies the per-bank auto refresh cycle time"
line.long 0x04 "EMEM_ARB_TIMING_CCDMW_0,External Memory Arbitration Configuration:DRAM Timing:tCCDMW"
bitfld.long 0x04 0.--5. " CCDMW                            ,PMC This field supports LPDDR4 DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,External Memory Arbitration Configuration Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,Open work control threshold"
hexmask.long.byte 0x00 8.--14. 1. "                 REFPB_THRESH_DISABLE_HP             ,Low priority control threshold"
textline "                                              "
hexmask.long.byte 0x00 0.--6. 1. " REFPB_THRESH_ENABLE_HP           ,High priority control threshold"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,External Memory Arbitration Configuration:REFPB-Bank control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,Explicit bank mode" "0,1"
hexmask.long.byte 0x04 8.--14. 1. "                  REFPB_THRESH_DISABLE_FORCE_CLOSE    ,Force bank closure,low threshold"
textline "                                              "
hexmask.long.byte 0x04 0.--6. 1. " REFPB_THRESH_ENABLE_FORCE_CLOSE  ,Force bank closure,high threshold"
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "           ETR_FLUSH_ENABLE                    ,ETR flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "           NVJPG_FLUSH_ENABLE                  ,NVJPG flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           APE_FLUSH_ENABLE                    ,APE flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           GPU_FLUSH_ENABLE                    ,GPU flush enable" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           SDMMC4A_FLUSH_ENABLE                ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "In progress,Done"
bitfld.long 0x04 12. "        ETR_HOTRESET_STATUS                 ,ETR hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "In progress,Done"
bitfld.long 0x04 8. "        NVJPG_HOTRESET_STATUS               ,NVJPG hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "In progress,Done"
bitfld.long 0x04 6. "        APE_HOTRESET_STATUS                 ,APE hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "In progress,Done"
bitfld.long 0x04 2. "        GPU_HOTRESET_STATUS                 ,GPU hot reset status" "In progress,Done"
textline "                                              "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "In progress,Done"
bitfld.long 0x04 0. "        SDMMC4A_HOTRESET_STATUS             ,SDMMC4A hot reset status" "In progress,Done"
textline "                                              "
endif
sif (!cpuis("TEGRAX2"))
group.long 0xE8++0x07
line.long 0x00 "EMEM_ARB_OVERRIDE_0,External Memory Arbitration Configuration For Feature Overrides"
bitfld.long 0x00 31. " ARB_HUM_FIFO_DEADLOCK_CHECK_OVERRIDE          ,FIFO deadlock check override" "Disabled,Enabled"
bitfld.long 0x00 28. "             ARB_EMEM_SPO_OVERRIDE                          ,EMEM SPO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 27. "       ARB_EMEM_AP_OVERRIDE                          ,EMEM AP override" "Disabled,Enabled"
bitfld.long 0x00 26. "             ARB_HUM_FIFO_OVERRIDE                          ,Hum FIFO override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 23. "       ISO_TA_OVERRIDE                               ,ISO TA override" "Disabled,Enabled"
bitfld.long 0x00 22. "             ISO_DA_OVERRIDE                                ,ISO DA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_BC_INHERIT_ON_PRIINV_OVERRIDE             ,ISO BC inherit on PRINV override" "Disabled,Enabled"
bitfld.long 0x00 20. "             ISO_BC_CAUSE_PRIINV_OVERRIDE                   ,ISO BC cause PRINV override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 19. "       ISO_BA_OVERRIDE                               ,ISO_BA override" "Disabled,Enabled"
bitfld.long 0x00 18. "             ISO_AA_OVERRIDE                                ,ISO AA override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 17. "       ARB_EMEM_BUBBLECALC_OVERRIDE                  ,EMEM bubble CALC override" "Disabled,Enabled"
bitfld.long 0x00 16. "             ALLOC_ONE_BQ_PER_CLIENT                        ,Allocate one BQ per client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       PRIORITY_INVERSION_ISO_THRESHOLD_BUS_OVERRIDE ,Priority inversion is threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 14. "             PRIORITY_INVERSION_ISO_THRESHOLD_BANK_OVERRIDE ,Priority inversion threshold bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 13. "       PRIORITY_INVERSION_THRESHOLD_BUS_OVERRIDE     ,Priority inversion threshold BUS override" "Disabled,Enabled"
bitfld.long 0x00 12. "             PRIORITY_INVERSION_THRESHOLD_BANK_OVERRIDE     ,Priority inversion bank override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 11. "       PRIORITY_INVERSION_EQ_PRI_LEN_LIMIT_OVERRIDE  ,Priority inversion EQ PRI LEN limit override" "Disabled,Enabled"
bitfld.long 0x00 10. "             OBSERVED_DIRECTION_OVERRIDE                    ,Observed direction override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 9. "       BC2AA_HOLDHOFF_OVERRIDE                       ,BC2AA hold off override" "Disabled,Enabled"
bitfld.long 0x00 8. "             TS2AA_HOLDHOFF_OVERRIDE                        ,TS2AA hold off override" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 4. "       EXPIRE_UPDATE_OVERRIDE                        ,Expire update override" "Disabled,Enabled"
bitfld.long 0x00 3. "             GPU_SLICE_MERGE_OVERRIDE                       ,Combine GPU traffic override" "Disabled,Enabled"
textline "                                        "
line.long 0x04 "EMEM_ARB_RSV_0,EMEM Arbiter Reserved"
hexmask.long.byte 0x04 24.--31. 1. " EMEM_ARB_RESERVED_BYTE3 ,EMEM ARB reserved byte 3"
hexmask.long.byte 0x04 16.--23. 1. "           EMEM_ARB_RESERVED_BYTE2  ,EMEM ARB reserved byte2"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. "       EMEM_ARB_RESERVED_BYTE1 ,EMEM ARB reserved byte1 "
hexmask.long.byte 0x04 0.--7. 1. "           EMEM_ARB_RESERVED_BYTE0  ,EMEM ARB reserved byte0"
group.long 0x0F4++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,Second-Level Clock Enable Overrides"
bitfld.long 0x00 15. " EMC_RESP_CLKEN_OVR      ,EMC response clock override" "Gated,Override"
bitfld.long 0x00 14. "     TSR_CLKEN_OVR            ,EARB TSR clock override" "Gated,Override"
textline "                                        "
bitfld.long 0x00 13. "       RING2_CLKEN_OVR         ,Ring2 clock override" "Gated,Always on"
bitfld.long 0x00 12. "    RING1_CLKEN_OVR          ,Ring1 clock override" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 11. "       CH_DDA_CLKEN_OVR        ,CH_DDA_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 10. "    HUB_DDA_CLKEN_OVR        ,HUB_DDA_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 9. "       WCAM_CLKEN_OVR          ,WCAM_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 8. "    PTC_CACHE_CLKEN_OVR      ,PTC_CACHE_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 7. "       PTC_CLKEN_OVR           ,PTC_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 6. "    TLB_CLKEN_OVR            ,TLB_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 5. "       WB_CLKEN_OVR            ,WB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 3. "    REGS_CLKEN_OVR           ,REGS_CLKEN_OVR" "Gated,Always on"
textline "                                        "
bitfld.long 0x00 2. "       EARB_CLKEN_OVR          ,EARB_CLKEN_OVR" "Gated,Always on"
bitfld.long 0x00 0. "    CIF_CLKEN_OVR            ,CIF_CLKEN_OVR" "Gated,Always on"
group.long 0x0FC++0x07
line.long 0x00 "TIMING_CONTROL_0 ,Shadowed Registers Update Trigger"
bitfld.long 0x00 0. " TIMING_UPDATE           ,Trigger a timing update event" "No trigger,Trigger"
textline "                                        "
line.long 0x04 "STAT_CONTROL_0,Statistic Control"
bitfld.long 0x04 3. " EMC_PM_STOP_TRIGGER     ,EMC PM stop trigger" "No trigger,Trigger"
bitfld.long 0x04 2. "   EMC_PM_START_TRIGGER     ,EEMC PM start trigger" "No trigger,Trigger"
textline "                                        "
bitfld.long 0x04 0.--1. "       EMC_GATHER              ,EMC gather" "RST,,Disabled,Enabled"
textline "                                        "
endif
group.long 0x200++0x03
line.long 0x00 "CLIENT_HOTRESET_CTRL_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 31. " SDMMC3A_FLUSH_ENABLE    ,SDMMC3A flush enable" "Disabled,Enabled"
bitfld.long 0x00 30. "     SDMMC2A_FLUSH_ENABLE     ,SDMMC2A flush enable" "Disabled,Enabled"
bitfld.long 0x00 29. "     SDMMC1A_FLUSH_ENABLE      ,SDMMC1A flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_FLUSH_ENABLE       ,TSEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 20. "     XUSB_DEV_FLUSH_ENABLE    ,XUSB DEV flush enable" "Disabled,Enabled"
bitfld.long 0x00 19. "     XUSB_HOST_FLUSH_ENABLE    ,XUSB host flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 18. "       VIC_FLUSH_ENABLE        ,VIC flush enable" "Disabled,Enabled"
bitfld.long 0x00 17. "     VI_FLUSH_ENABLE          ,VI flush enable" "Disabled,Enabled"
bitfld.long 0x00 15. "     SATA_FLUSH_ENABLE         ,SATA flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_FLUSH_ENABLE       ,PPCS flush enable" "Disabled,Enabled"
bitfld.long 0x00 11. "     NVENC_FLUSH_ENABLE       ,NVENC flush enable" "Disabled,Enabled"
bitfld.long 0x00 9. "     MPCORE_FLUSH_ENABLE       ,MPCORE flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_FLUSH_ENABLE       ,ISP2 flush enable" "Disabled,Enabled"
bitfld.long 0x00 7. "     HDA_FLUSH_ENABLE         ,HDA flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "     HC_FLUSH_ENABLE           ,HC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 3. "       DCB_FLUSH_ENABLE        ,DCB flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     DC_FLUSH_ENABLE          ,DC flush enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     AVPC_FLUSH_ENABLE         ,AVPC flush enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. "       AFI_FLUSH_ENABLE        ,AFI flush enable" "Disabled,Enabled"
rgroup.long 0x204++0x03
line.long 0x00 "CLIENT_HOTRESET_STATUS_0,Memory Client Hot Reset Status Register"
bitfld.long 0x00 31. " SDMMC3A_HOTRESET_STATUS ,SDMMC3A flush status" "In progress,Done"
bitfld.long 0x00 30. "  SDMMC2A_HOTRESET_STATUS  ,SDMMC2A flush status" "In progress,Done"
bitfld.long 0x00 29. "  SDMMC1A_HOTRESET_STATUS   ,SDMMC1A flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 22. "       TSEC_HOTRESET_STATUS    ,TSEC flush status" "In progress,Done"
bitfld.long 0x00 20. "  XUSB_DEV_HOTRESET_STATUS ,XUSB DEV flush status" "In progress,Done"
bitfld.long 0x00 19. "  XUSB_HOST_HOTRESET_STATUS ,XUSB Host flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 18. "       VIC_HOTRESET_STATUS     ,VIC flush status" "In progress,Done"
bitfld.long 0x00 17. "  VI_HOTRESET_STATUS       ,VI flush status" "In progress,Done"
bitfld.long 0x00 15. "  SATA_HOTRESET_STATUS      ,SATA flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 14. "       PPCS_HOTRESET_STATUS    ,PPCS flush status" "In progress,Done"
bitfld.long 0x00 11. "  NVENC_HOTRESET_STATUS    ,NVENC flush status" "In progress,Done"
bitfld.long 0x00 9. "  MPCORE_HOTRESET_STATUS    ,MPCORE flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 8. "       ISP2_HOTRESET_STATUS    ,ISP flush status" "In progress,Done"
bitfld.long 0x00 7. "  HDA_HOTRESET_STATUS      ,HDA flush status" "In progress,Done"
bitfld.long 0x00 6. "  HC_HOTRESET_STATUS        ,HC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 3. "       DCB_HOTRESET_STATUS     ,DCB flush status" "In progress,Done"
bitfld.long 0x00 2. "  DC_HOTRESET_STATUS       ,DC flush status" "In progress,Done"
bitfld.long 0x00 1. "  AVPC_HOTRESET_STATUS      ,AVPC flush status" "In progress,Done"
textline "                                        "
bitfld.long 0x00 0. "       AFI_HOTRESET_STATUS     ,AFI flush status" "In progress,Done"
group.long 0x208++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_0_0,Per-Client Isochronous Settings"
bitfld.long 0x00 31. " ISO_SATAR               ,Client SATAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 30. "     ISO_PPCSAHBSLVR          ,Client PPCSAHBSLVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 29. "     ISO_PPCSAHBDMAR           ,Client PPCSAHBDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       ISO_NVENCCSRD           ,Client NVENCSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 23. "     ISO_HOST1XR              ,Client HOST1XR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 22. "     ISO_HOST1XDMAR            ,Client HOST1XDMAR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       ISO_HDAR                ,Client HDAR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 17. "     ISO_DISPLAYHCB           ,Client DISPLAYHCB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 16. "     ISO_DISPLAYHC             ,Client DISPLAYHC is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       ISO_AVPCARM7R           ,Client AVPCARM7R is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 14. "     ISO_AFIR                 ,Client AFIR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 6. "     ISO_DISPLAY0CB            ,Client DISPLAY0CB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       ISO_DISPLAY0C           ,Client DISPLAY0C is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_DISPLAY0BB           ,Client DISPLAY0BB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 3. "     ISO_DISPLAY0B             ,Client DISPLAY0B is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       ISO_DISPLAY0AB          ,Client DISPLAY0AB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_DISPLAY0A            ,Client DISPLAY0A is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 0. "     ISO_PTCR                  ,Client PTCR is treated as an isochronous client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_ISOCHRONOUS_1_0,Per-Client Isochronous Settings"
bitfld.long 0x04 29. " ISO_SATAW               ,Client SATAW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 28. "     ISO_PPCSAHBSLVW          ,Client PPCSAHBSLVW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 27. "     ISO_PPCSAHBDMAW           ,Client PPCSAHBDMAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       ISO_MPCOREW             ,Client MPCOREW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 22. "     ISO_HOST1XW              ,Client HOST1XW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 21. "     ISO_HDAW                  ,Client HDAW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 18. "       ISO_AVPCARM7W           ,Client AVPCARM7W is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 17. "     ISO_AFIW                 ,Client AFIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x04 11. "     ISO_NVENCSWR              ,Client NVENCSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. "       ISO_MPCORER             ,Client MPCORER is treated as an isochronous client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_ISOCHRONOUS_2_0,Per-Client Isochronous Settings"
bitfld.long 0x08 26. " ISO_DISPLAYT            ,Client DISPLAYT is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 25. "     ISO_GPUSWR               ,Client GPUSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 24. "     ISO_GPUSRD                ,Client GPUSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       ISO_TSECSWR             ,Client TSECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 20. "     ISO_TSECSRD              ,Client TSECSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 17. "     ISO_ISPWBB                ,Client ISPWBB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       ISO_ISPWAB              ,Client ISPWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 14. "     ISO_ISPRAB               ,Client ISPRAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 13. "     ISO_XUSB_DEVW             ,Client XUSB DEVQ is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       ISO_XUSB_DEVR           ,Client XUSB DEVR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 11. "     ISO_XUSB_HOSTW           ,Client XUSB HOSTW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 10. "     ISO_XUSB_HOSTR            ,Client XUSB HOSTR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       ISO_ISPWB               ,Client ISPWB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 6. "     ISO_ISPWA                ,Client ISPWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x08 4. "     ISO_ISPRA                 ,Client ISPRA is treated as an isochronous client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_ISOCHRONOUS_3_0,Per-Client Isochronous Settings"
bitfld.long 0x0C 31. " ISO_NVJPGSWR            ,Client NVJPGSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     ISO_NVJPGSRD             ,Client NVJPGSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     ISO_APEW                  ,Client APEW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       ISO_APER                ,Client APER is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     ISO_NVDECSWR             ,Client NVDECSWR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     ISO_NVDECSRD              ,Client NVDECSRD is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       ISO_DISPLAYD            ,Client DISPLAYD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     ISO_VIW                  ,Client VIW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     ISO_VICSWR                ,Client VICSWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       ISO_VICSRD              ,Client VICSRD is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     ISO_SDMMCWAB             ,Client SDMMCWAB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     ISO_SDMMCW                ,Client SDMMCW is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       ISO_SDMMCWAA            ,Client SDMMCWAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     ISO_SDMMCWA              ,Client SDMMCWA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     ISO_SDMMCRAB              ,Client SDMMCRAB is treated as an isochronous client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       ISO_SDMMCR              ,Client SDMMCR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     ISO_SDMMCRAA             ,Client SDMMCRAA is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     ISO_SDMMCCRA              ,Client SDMMCRA is treated as an isochronous client" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xB94++0x03
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " SO_GPUSWR2              ,Client gpuswr2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "     ISO_GPUSRD2              ,Client gpusrd2 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "     ISO_TSECSWRB              ,Client TSECSWRB is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 6. "        ISO_TSECSRDB            ,Client TSECSRDB is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "     ISO_ETRW                 ,Client ETRW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "     ISO_ETRR                  ,Client ETRR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. "        ISO_AXIAPW              ,Client AXIAPW is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_AXIAPR               ,Client AXIAPR is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_SESWR                 ,Client SESWR is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_SESRD               ,Client SESRD is treated as an isochronous client" "Disabled,Enabled"
group.long 0xBA8++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_5_0,EMEM_ARB_ISOCHRONOUS_5_0"
bitfld.long 0x00 3. " ISO_NVDECSRD1           ,Client nvdecsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "     ISO_VICSRD1              ,Client vicsrd1 is treated as an isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "     ISO_NVDISPLAYR1           ,Client nvdisplayr1 is treated as an isochronous client" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. "        ISO_APEDMAW             ,Client APEDMAW is treated as an isochronous client" "Disabled,Enabled"
endif
group.long 0x218++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_0_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 31. " HYST_SATAR              ,Client SATAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "     HYST_PPCSAHBSLVR         ,Client PPCSAHBSLVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "     HYST_PPCSAHBDMAR          ,Client PPCSAHBDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       HYST_NVENCSRD           ,Client NVENCSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "     HYST_HOST1XR             ,Client HOST1XR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "     HYST_HOST1XDMAR           ,Client HOST1XDMAR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       HYST_HDAR               ,Client HDAR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "     HYST_DISPLAYHCB          ,Client DISPLAYHCB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "     HYST_DISPLAYHC            ,Client DISPLAYHC is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       HYST_AVPCARM7R          ,Client AVPCARM7R is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "     HYST_AFIR                ,Client AFIR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "     HYST_DISPLAY0CB           ,Client DISPLAY0CB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       HYST_DISPLAY0C          ,Client DISPLAY0C is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "     HYST_DISPLAY0BB          ,Client DISPLAY0BB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "     HYST_DISPLAY0B            ,Client DISPLAY0B is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       HYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "     HYST_DISPLAY0A           ,Client DISPLAY0A is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "     HYST_PTCR                 ,Client PTCR is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_HYSTERESIS_1_0,Per-Client Hysteresis Settings"
bitfld.long 0x04 29. " HYST_SATAW              ,Client SATAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "     HYST_PPCSAHBSLVW         ,Client PPCSAHBSLVW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "     HYST_PPCSAHBDMAW          ,Client PPCSAHBDMAW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 25. "       HYST_MPCOREW            ,Client MPCOREW is treated as an hysteresis client" "Disabled,Enabled"
sif (!cpuis("TEGRAX2")&&!cpuis("TEGRAX1"))
bitfld.long 0x04 24. "     HYST_MPCORELPW           ,Client MPCORELPW is treated as an hysteresis client" "Disabled,Enabled"
endif
bitfld.long 0x04 22. "     HYST_HOST1XW             ,Client HOST1XW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 21. "       HYST_HDAW               ,Client HDAW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "     HYST_AVPCARM7W           ,Client AVPCARM7W is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "     HYST_AFIW                 ,Client AFIW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 11. "       HYST_NVENCSWR           ,Client NVENCSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "     HYST_MPCORER             ,Client MPCORER is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_HYSTERESIS_2_0,Per-Client Hysteresis Settings"
bitfld.long 0x08 26. " HYST_DISPLAYT           ,Client DISPLAYT is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "     HYST_GPUSWR              ,Client GPUSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "     HYST_GPUSRD               ,Client GPSURD is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       HYST_TSECSWR            ,Client TSECSWR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "     HYST_TSECSRD             ,Client TSECSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "     HYST_ISPWBB               ,Client ISPWBB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       HYST_ISPWAB             ,Client ISPWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "     HYST_ISPRAB              ,Client ISPRAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "     HYST_XUSB_DEVW            ,Client XUSB DEVW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       HYST_XUSB_DEVR          ,Client XUSB DEVR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "     HYST_XUSB_HOSTW          ,Client XUSB HOSTW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "     HYST_XUSB_HOSTR           ,Client XUSB HOSTR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       HYST_ISPWB              ,Client ISPWB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "     HYST_ISPWA               ,Client ISPWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "     HYST_ISPRA                ,Client ISPRA is treated as an hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_HYSTERESIS_3_0,Per-Client Hysteresis Settings"
bitfld.long 0x0C 31. " HYST_NVJPGSWR           ,Client NVJPGSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "     HYST_NVJPGSRD            ,Client NVJPGSRD is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "     HYST_APEW                 ,Client APEW is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       HYST_APER               ,Client APER is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "     HYST_NVDECSWR            ,Client NVDECSWR is treated as hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "     HYST_NVDECSRD             ,Client NVDECSRD is treated as hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       HYST_DISPLAYD           ,Client DISPLAYD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "     HYST_VIW                 ,Client VIW is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "     HYST_VICSWR               ,Client VICSWR is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       HYST_VICSRD             ,Client VICSRD is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "     HYST_SDMMCWAB            ,Client SDMMCWAB is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "     HYST_SDMMCW               ,Client SDMMCW is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       HYST_SDMMCWAA           ,Client SDMMCWAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "     HYST_SDMMCWA             ,Client SDMMCWA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "     HYST_SDMMCRAB             ,Client SDMMCRAB is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       HYST_SDMMCR             ,Client SDMMCR is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "     HYST_SDMMCRAA            ,Client SDMMCRAA is treated as an hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "     HYST_SDMCRA               ,Client SDMCRA is treated as an hysteresis client" "Disabled,Enabled"
textline "                                        "
sif (cpuis("TEGRAX2"))
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,EMEM ARB Hysteresis4 0"
bitfld.long 0x00 31. " HYST_APEDMAR             ,Client APEDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  HYST_SCEDMAW          ,Client SCEDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  HYST_SCEDMAR      ,Client SCEDMAR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " HYST_SCEW                ,Client SCEW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 27. "  HYST_SCER             ,Client SCER is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 26. "  HYST_AONDMAW      ,Client AONDMAW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. " HYST_AONDMAR             ,Client AONDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 24. "  HYST_AONW             ,Client AONW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  HYST_AONR         ,Client AONR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 22. " HYST_BPMPDMAW            ,Client BPMPDMAW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 21. "  HYST_BPMPDMAR         ,Client BPMPDMAR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 20. "  HYST_BPMPW        ,Client BPMPW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " HYST_BPMPR               ,Client BPMPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 18. "  HYST_NVDISPLAYR       ,Client NVDISPLAYR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  HYST_UFSHCW       ,Client UFSHCW is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 16. " HYST_UFSHCR              ,Client UFSHCR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 15. "  HYST_EQOSW            ,Client EQOSW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  HYST_EQOSR        ,Client EQOSR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. " HYST_AXISW               ,Client AXISW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 12. "  HYST_AXISR            ,Client AXISR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 9. "  HYST_GPUSWR2      ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 8. " HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "  HYST_TSECSWRB         ,Client TSECSWRB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  HYST_TSECSRDB     ,Client TSECSRDB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  HYST_ETRR             ,Client ETRR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_SESWR        ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_SESRD               ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBA4++0x03
line.long 0x00 "EMEM_ARB_HYSTERESIS_5_0,EMEM ARB Hysteresis5_0"
bitfld.long 0x00 3. " HYST_NVDECSRD1           ,Client NVDECSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  HYST_VICSRD1          ,Client VICSRD1 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  HYST_NVDISPLAYR1  ,Client NVDISPLAYR1 is treated as a hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " HYST_APEDMAW             ,Client APEDMAW  is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR              ,Client SATAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "  DHYST_PPCSAHBSLVR     ,Client PPCSAHBSLVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "  DHYST_PPCSAHBDMAR ,Client PPCSAHBDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 28. " DHYST_NVENCSRD           ,Client NVENCSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "  DHYST_HOST1XR         ,Client HOST1XR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "  DHYST_HOST1XDMAR  ,Client HOST1XDMAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. " DHYST_HDAR               ,Client HDAR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "  DHYST_DISPLAYHCB      ,Client DISPLAYHCB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "  DHYST_DISPLAYHC   ,Client DISPLAYHC is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " DHYST_AVPCARM7R          ,Client AVPCARM7R is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "  DHYST_AFIR            ,Client AFIR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "  DHYST_DISPLAY0CB  ,Client DISPLAY0CB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. " DHYST_DISPLAY0C          ,Client DISPLAY0C is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "  DHYST_DISPLAY0BB      ,Client DISPLAY0BB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "  DHYST_DISPLAY0B   ,Client DISPLAY0B is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB         ,Client DISPLAY0AB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_DISPLAY0A       ,Client DISPLAY0A is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "  DHYST_PTCR        ,Client PTCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW              ,Client SATAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "  DHYST_PPCSAHBSLVW     ,Client PPCSAHBSLVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "  DHYST_PPCSAHBDMAW ,Client PPCSAHBDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 25. " DHYST_MPCOREW            ,Client MPCOREW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "  DHYST_HOST1XW         ,Client HOST1XW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 21. "  DHYST_HDAW        ,Client HDAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 18. " DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "  DHYST_AFIW            ,Client AFIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 11. "  DHYST_NVENCSWR    ,Client NVENCSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x04 7. " DHYST_MPCORER            ,Client MPCORER is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT           ,Client DISPLAYT is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "  DHYST_GPUSWR          ,Client GPUSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "  DHYST_GPUSRD      ,Client GPUSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 23. " DHYST_A9AVPSCW           ,Client A9AVPSCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 22. "  DHYST_A9AVPSCR        ,Client A9AVPSCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 21. "  DHYST_TSECSWR     ,Client TSECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 20. " DHYST_TSECSRD            ,Client TSECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "  DHYST_ISPWBB          ,Client ISPWBB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 16. "  DHYST_ISPWAB      ,Client ISPWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 14. " DHYST_ISPRAB             ,Client ISPRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "  DHYST_XUSB_DEVW       ,Client XUSB DEVW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 12. "  DHYST_XUSB_DEVR   ,Client XUSB DEVR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 11. " DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "  DHYST_XUSB_HOSTR      ,Client XUSB HOSTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 7. "  DHYST_ISPWB       ,Client ISPWB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x08 6. " DHYST_ISPWA              ,Client ISPWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "  DHYST_ISPRA           ,Client ISPRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR           ,Client NVJPGSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "  DHYST_NVJPGSRD        ,Client NVJPGSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "  DHYST_APEW        ,Client APEW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 26. " DHYST_APER               ,Client APER is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "  DHYST_NVDECSWR        ,Client NVDECSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "  DHYST_NVDECSRD    ,Client NVDECSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 19. " DHYST_DISPLAYD           ,Client DISPLAYD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "  DHYST_VIW             ,Client VIW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "  DHYST_VICSWR      ,Client VICSWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 12. " DHYST_VICSRD             ,Client VICSRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "  DHYST_SDMMCWAB        ,Client SDMMCWAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "  DHYST_SDMMCW      ,Client SDMMCW is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA           ,Client SDMMCWAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "  DHYST_SDMMCWA         ,Client SDMMCWA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "  DHYST_SDMMCRAB    ,Client SDMMCRAB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x0C 2. " DHYST_SDMMCR             ,Client SDMMCR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "  DHYST_SDMMCRAA        ,Client SDMMCRAA is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "  DHYST_SDMMCRA     ,Client SDMMCRA is treated as a dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2            ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "  DHYST_GPUSRD2         ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "  DHYST_TSECSWRB    ,Client TSECSWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 6. " DHYST_TSECSRDB           ,Client TSECSRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "  DHYST_ETRW            ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "  DHYST_ETRR        ,Client ETRR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 3. " DHYST_AXIAPW             ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "  DHYST_AXIAPR          ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "  DHYST_SESWR       ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x10 0. " DHYST_SESRD              ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBF0++0x03
line.long 0x00 "EMEM_ARB_DHYSTERESIS_5_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 3. " DHYST_NVDECSRD1          ,Client NVDECSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "  DHYST_VICSRD1         ,Client VICSRD1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "  DHYST_NVDISPLAYR1 ,Client NVDISPLAYR1 is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 0. " DHYST_APEDMAW            ,Client APEDMAW is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Control Register For Dynamic Hysteresis Logic"
bitfld.long 0x00 31. " DHYST_ENABLE             ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  DHYST_BW_MON_INTERVAL ,Bandwidth monitor interval for dynamic hysteresis" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x1F
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0        ,DHYST delay bin 0"
line.long 0x04 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 1"
hexmask.long.word 0x04 0.--11. 1. " DHYST_DELAY_BIN_1        ,DHYST delay bin 1"
line.long 0x08 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 2"
hexmask.long.word 0x08 0.--11. 1. " DHYST_DELAY_BIN_2        ,DHYST delay bin 2"
line.long 0x0C "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 3"
hexmask.long.word 0x0C 0.--11. 1. " DHYST_DELAY_BIN_3        ,DHYST delay bin 3"
line.long 0x10 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 4"
hexmask.long.word 0x10 0.--11. 1. " DHYST_DELAY_BIN_4        ,DHYST delay bin 4"
line.long 0x14 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 5"
hexmask.long.word 0x14 0.--11. 1. " DHYST_DELAY_BIN_5        ,DHYST delay bin 5"
line.long 0x18 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 6"
hexmask.long.word 0x18 0.--11. 1. " DHYST_DELAY_BIN_6        ,DHYST delay bin 6"
line.long 0x1C "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Controls The TimeOut Delay For Dynamic Hysteresis Hold Off 7"
hexmask.long.word 0x1C 0.--11. 1. " DHYST_DELAY_BIN_7        ,DHYST delay bin 7"
group.long 0xA60++0x03
line.long 0x00 "BPMPPC_EXTRA_SNAP_LEVELS_0,BPMPPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPPC   ,Response clock-enable override for partition client BPMPPC" "Disabled,Enabled"
group.long 0xA70++0x07
line.long 0x00 "SCEPC_EXTRA_SNAP_LEVELS_0,SCEPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SCEPC    ,Response clock-enable override for partition client SCEPC" "Disabled,Enabled"
line.long 0x04 "SCEDMAPC_EXTRA_SNAP_LEVELS_0,SCEDMAPC Extra Snap Levels 0"
bitfld.long 0x04 3. " RCLKEN_OVERRIDE_SCEDMAPC ,Response clock-enable override for partition client SCEDMAPC" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "FTOP_EXTRA_SNAP_LEVELS_0,FTOP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_FTOP     ,Response clock-enable override for partition client FTOP" "Disabled,Enabled"
group.long 0xA80++0x03
line.long 0x00 "VICPC3_EXTRA_SNAP_LEVELS_0,VICPC3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC3   ,Response clock-enable override for partition client VICPC3" "Disabled,Enabled"
group.long 0xA3C++0x03
line.long 0x00 "JPG_EXTRA_SNAP_LEVELS_0,JPG Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_JPG      ,Response clock-enable override for partition client JPG" "Disabled,Enabled"
group.long 0xA14++0x03
line.long 0x00 "HOST_EXTRA_SNAP_LEVELS_0,HOST Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HOST     ,Response clock-enable override for partition client HOST" "Disabled,Enabled"
group.long 0x2AC++0x03
line.long 0x00 "DIS_EXTRA_SNAP_LEVELS_0,DIS Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS      ,Response clock-enable override for partition client DIS" "Disabled,Enabled"
group.long 0xA78++0x03
line.long 0x00 "APEDMAPC_EXTRA_SNAP_LEVELS_0,APEDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APEDMAPC ,Response clock-enable override for partition client APEDMAPC" "Disabled,Enabled"
group.long 0xA1C++0x03
line.long 0x00 "VICPC_EXTRA_SNAP_LEVELS_0,VICPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC    ,Response clock-enable override for partition client VICPC" "Disabled,Enabled"
group.long 0xA58++0x03
line.long 0x00 "UFSHCPC_EXTRA_SNAP_LEVELS_0,UFSHCPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_UFSHCPC  ,RCLKEN override UFSHCPC" "Disabled,Enabled"
group.long 0xA6C++0x03
line.long 0x00 "AONDMAPC_EXTRA_SNAP_LEVELS_0,AONDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONDMAPC ,Response clock-enable override for partition client AONDMAPC" "Disabled,Enabled"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x228++0x0F
line.long 0x00 "SMMU_TRANSLATION_ENABLE_0_0,Per-Client SMMU Translation Enables"
bitfld.long 0x00 31. " SMMU_SATAR_ENABLE       ,Enable client SATAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 30. "     SMMU_PPCSAHBSLVR_ENABLE  ,Enable client PPCSAHBSLVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 29. "     SMMU_PPCSAHBDMAR_ENABLE   ,Enable client PPCSAHBDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 28. "       SMMU_NVENCSRD_ENABLE    ,Enable client NVENCSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 23. "     SMMU_HOST1XR_ENABLE      ,Enable client HOST1XR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 22. "     SMMU_HOST1XDMAR_ENABLE    ,Enable client HOST1XDMAR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 21. "       SMMU_HDAR_ENABLE        ,Enable client HDAR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 17. "     SMMU_DISPLAYHCB_ENABLE   ,Enable client DISPLAYHCB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 16. "     SMMU_DISPLAYHC_ENABLE     ,Enable client DISPLAYHC to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 15. "       SMMU_AVPCARM7R_ENABLE   ,Enable client AVPCARM7R to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 14. "     SMMU_AFIR_ENABLE         ,Enable client AFIR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 6. "     SMMU_DISPLAY0CB_ENABLE    ,Enable client DISPLAY0CB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 5. "       SMMU_DISPLAY0C_ENABLE   ,Enable client DISPLAY0C to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 4. "     SMMU_DISPLAY0BB_ENABLE   ,Enable client DISPLAY0BB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 3. "     SMMU_DISPLAY0B_ENABLE     ,Enable client DISPLAY0B to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 2. "       SMMU_DISPLAY0AB_ENABLE  ,Enable client DISPLAY0AB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x00 1. "     SMMU_DISPLAY0A_ENABLE    ,Enable client DISPLAY0A to be translated by SMMU" "Disabled,Enabled"
line.long 0x04 "SMMU_TRANSLATION_ENABLE_1_0,Per-Client SMMU Translation Enables"
bitfld.long 0x04 29. " SMMU_SATAW_ENABLE       ,Enable client SATAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 28. "     SMMU_PPCSAHBSLVW_ENABLE  ,Enable client PPCSAHBSLVW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 27. "     SMMU_PPCSAHBDMAW_ENABLE   ,Enable client PPCSAHBDMAW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 22. "       SMMU_HOST1XW_ENABLE     ,Enable client HOST1XW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 21. "     SMMU_HDAW_ENABLE         ,Enable client HDAW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 18. "     SMMU_AVPCARM7W_ENABLE     ,Enable client AVPCARM7W to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 17. "       SMMU_AFIW_ENABLE        ,Enable client AFIW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x04 11. "     SMMU_NVENCSWR_ENABLE     ,Enable client NVENCSWR to be translated by SMMU" "Disabled,Enabled"
line.long 0x08 "SMMU_TRANSLATION_ENABLE_2_0,Per-Client SMMU Translation Enables"
bitfld.long 0x08 26. " SMMU_DISPLAYT_ENABLE    ,Enable client DISPLAYT to be translated by SMMU" "Disabled,Enabled"
rbitfld.long 0x08 25. "     SMMU_GPUSWR_ENABLE       ,GPU translation is handled by SWID" "Disabled,Enabled"
rbitfld.long 0x08 24. "     SMMU_GPUSRD_ENABLE        ,GPU translation is handled by SWID" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 21. "       SMMU_TSECSWR_ENABLE     ,Enable client TSECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 20. "     MMU_TSECSRD_ENABLE       ,Enable client TSECSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 17. "     SMMU_ISPWBB_ENABLE        ,Enable client ISPWBB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 16. "       SMMU_ISPWAB_ENABLE      ,Enable client ISPWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 14. "     SMMU_ISPRAB_ENABLE       ,Enable client ISPRAB to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x08 13. "     SMMU_XUSB_DEVW_ENABLE     ,Enable client XUSB DEVW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 12. "       SMMU_XUSB_DEVR_ENABLE   ,Enable client XUSB DEVR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 11. "     SMMU_XUSB_HOSTW_ENABLE   ,Enable client XUSB HOSTW to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 10. "     SMMU_XUSB_HOSTR_ENABLE    ,Enable client XUSB HOSTR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x08 7. "       SMMU_ISPWB_ENABLE       ,Enable client ISPWB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 6. "     SMMU_ISPWA_ENABLE        ,Enable client ISPWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x08 4. "     SMMU_ISPRA_ENABLE         ,Enable client ISPRA to be translated by SMMU" "Disabled,Enabled"
line.long 0x0C "SMMU_TRANSLATION_ENABLE_3_0,Per-Client SMMU Translation Enables"
bitfld.long 0x0C 31. " SMMU_NVJPGSWR_ENABLE    ,Enable client NVJPGSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 30. "     SMMU_NVJPGSRD_ENABLE     ,Enable client NVJPGSRD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 27. "     SMMU_APEW_ENABLE          ,Enable client APEW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 26. "       SMMU_APER_ENABLE        ,Enable client APER to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 25. "     SMMU_NVDECSWR_ENABLE     ,Enable client NVDECSWR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 24. "     SMMU_NVDECSRD_ENABLE      ,Enable client NVDECSRD to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 19. "       SMMU_DISPLAYD_ENABLE    ,Enable client DISPLAYD to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 18. "     SMMU_VIW_ENABLE          ,Client VIW  translation to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 13. "     SMMU_VICSWR_ENABLE        ,Enable client VICSWR to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 12. "       SMMU_VICSRD_ENABLE      ,Enable client VICSRD to be translated by SMMU" "DIsabled,Enabled"
bitfld.long 0x0C 7. "     SMMU_SDMMCWAB_ENABLE     ,Enable client SDMMCWAB to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 6. "     SMMU_SDMMCW_ENABLE        ,Enable client SDMMCW to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 5. "       SMMU_SDMMWAA_ENABLE     ,Enable client SDMMCWAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 4. "     SMMU_SDMMCWA_ENABLE      ,Enable client SDMMCWA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 3. "     SMMU_SDMMCRAB_ENABLE      ,Enable client SDMMCRAB to be translated by SMMU" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x0C 2. "       SMMU_SDMMCR_ENABLE      ,Enable client SDMMCR to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 1. "     SMMU_SDMMCRAA_ENABLE     ,Enable client SDMMCRAA to be translated by SMMU" "Disabled,Enabled"
bitfld.long 0x0C 0. "     SMMU_SDMMCRA_ENABLE       ,Enable client SDMMCRA to be translated by SMMU" "Disabled,Enabled"
textline " "
width 23.
if (((per.l(ad:0x02C50000+0x238))&0x80000000)==0x80000000)
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  AFI_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AFI_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AFI_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AFI_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x238++0x03
line.long 0x00 "SMMU_AFI_ASID_0,SMMU AFI ASID Assignment Register"
bitfld.long 0x00 31. " AFI_SMMU_ENABLE       ,AFI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x23C))&0x80000000)==0x80000000)
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  AVPC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x23C++0x03
line.long 0x00 "SMMU_AVPC_ASID_0,SMMU AVPC ASID Assignment Register"
bitfld.long 0x00 31. " AVPC_SMMU_ENABLE      ,AVPC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x240))&0x80000000)==0x80000000)
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DC_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x240++0x03
line.long 0x00 "SMMU_DC_ASID_0,SMMU DC ASID Assignment Register"
bitfld.long 0x00 31. " DC_SMMU_ENABLE        ,DC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x244))&0x80000000)==0x80000000)
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  DCB_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DCB_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DCB_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DCB_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x244++0x03
line.long 0x00 "SMMU_DCB_ASID_0,SMMU DCB ASID Assignment Register"
bitfld.long 0x00 31. " DCB_SMMU_ENABLE       ,DCB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x250))&0x80000000)==0x80000000)
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  HC_ASID         ,ASID to use when VA[3332] == 0x0"
else
group.long 0x250++0x03
line.long 0x00 "SMMU_HC_ASID_0,SMMU HC ASID Assignment Register"
bitfld.long 0x00 31. " HC_SMMU_ENABLE        ,HC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x254))&0x80000000)==0x80000000)
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  HDA_ASID_3      ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  HDA_ASID_2      ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  HDA_ASID_1      ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  HDA_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x254++0x03
line.long 0x00 "SMMU_HDA_ASID_0,SMMU HDA ASID Assignment Register"
bitfld.long 0x00 31. " HDA_SMMU_ENABLE       ,HDA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x258))&0x80000000)==0x80000000)
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  ISP2_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x258++0x03
line.long 0x00 "SMMU_ISP2_ASID_0,SMMU ISP2 ASID Assignment Register"
bitfld.long 0x00 31. " ISP2_SMMU_ENABLE      ,ISP2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x264))&0x80000000)==0x80000000)
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " NVENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  NVENC_ASID      ,ASID to use when VA[3332] == 0x0"
else
group.long 0x264++0x03
line.long 0x00 "SMMU_NVENC_ASID_0,SMMU NVENC ASID Assignment Register"
bitfld.long 0x00 31. " MSENC_SMMU_ENABLE     ,NVENC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x268))&0x80000000)==0x80000000)
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV_ASID         ,ASID to use for NV translation" "0,1,2,3"
else
group.long 0x268++0x03
line.long 0x00 "SMMU_NV_ASID_0,SMMU NV ASID Assignment Register"
bitfld.long 0x00 31. " NV_SMMU_ENABLE        ,NV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x26C))&0x80000000)==0x80000000)
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "  NV2_ASID        ,ASID to use for NV2 translation" "0,1,2,3"
else
group.long 0x26C++0x03
line.long 0x00 "SMMU_NV2_ASID_0,SMMU NV2 ASID Assignment Register"
bitfld.long 0x00 31. " NV2_SMMU_ENABLE       ,NV2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x270))&0x80000000)==0x80000000)
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  PPCS_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x270++0x03
line.long 0x00 "SMMU_PPCS_ASID_0,SMMU PPCS ASID Assignment Register"
bitfld.long 0x00 31. " PPCS_SMMU_ENABLE      ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x274))&0x80000000)==0x80000000)
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  SATA_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SATA_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SATA_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SATA_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x274++0x03
line.long 0x00 "SMMU_SATA_ASID_0,SMMU SATA ASID Assignment Register"
bitfld.long 0x00 31. " SATA_SMMU_ENABLE      ,SATA translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x280))&0x80000000)==0x80000000)
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  VI_ASID_3       ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  VI_ASID_2       ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  VI_ASID_1       ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  VI_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0x280++0x03
line.long 0x00 "SMMU_VI_ASID_0,SMMU VI ASID Assignment Register"
bitfld.long 0x00 31. " VI_SMMU_ENABLE        ,VI translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x284))&0x80000000)==0x80000000)
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  VIC_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0x284++0x03
line.long 0x00 "SMMU_VIC_ASID_0,SMMU VIC ASID Assignment Register"
bitfld.long 0x00 31. " VIC_SMMU_ENABLE       ,VIC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x288))&0x80000000)==0x80000000)
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x288++0x03
line.long 0x00 "SMMU_XUSB_HOST_ASID_0,SMMU XUSB_HOST ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_HOST_SMMU_ENABLE ,XUSB HOST translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x28C))&0x80000000)==0x80000000)
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  XUSB_DEV_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  XUSB_DEV_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  XUSB_DEV_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  XUSB_DEV_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0x28C++0x03
line.long 0x00 "SMMU_XUSB_DEV_ASID_0,SMMU XUSB_DEV ASID Assignment Register"
bitfld.long 0x00 31. " XUSB_DEV_SMMU_ENABLE  ,XUSB DEV translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x294))&0x80000000)==0x80000000)
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_DEV_SMMU_ENABLE  ,TSEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "  TSEC_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0x294++0x03
line.long 0x00 "SMMU_TSEC_ASID_0,SMMU TSEC ASID Assignment Register"
bitfld.long 0x00 31. " TSEC_SMMU_ENABLE      ,TSEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0x298))&0x80000000)==0x80000000)
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " SMMU_ENABLE           ,PPCS1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "  ASID            ,ASID to use when VA[3332] == 0x0"
else
group.long 0x298++0x03
line.long 0x00 "SMMU_PPCS1_ASID_0,SMMU PPCS1 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS1_SMMU_ENABLE     ,PPCS1 translation enable" "Disabled,Enabled"
endif
endif
width 34.
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x404++0x03
line.long 0x00 "USBX_EXTRA_SNAP_LEVELS_0,USBX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBX      ,Response clock-enable override for partition client USBX" "Disabled,Enabled"
group.long 0x2B8++0x03
line.long 0x00 "PCX_EXTRA_SNAP_LEVELS_0,PCX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_PCX       ,Response clock-enable override for partition client PCX" "Disabled,Enabled"
group.long 0xE08++0x03
line.long 0x00 "MSE2_EXTRA_SNAP_LEVELS_0,MSE2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE2      ,Response clock-enable override for partition client MSE2" "Disabled,Enabled"
group.long 0xA7C++0x03
line.long 0x00 "VICPC2_EXTRA_SNAP_LEVELS_0,VICPC2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VICPC2    ,Response clock-enable override for partition client VICPC2" "Disabled,Enabled"
group.long 0xA4C++0x03
line.long 0x00 "DFD_EXTRA_SNAP_LEVELS_0,DFD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DFD       ,Response clock-enable override for partition client DFD" "Disabled,Enabled"
group.long 0xE00++0x03
line.long 0x00 "NVD2_EXTRA_SNAP_LEVELS_0,NVD2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD2      ,Response clock-enable override for partition client NVD2" "Disabled,Enabled"
group.long 0xA44++0x03
line.long 0x00 "SDM_EXTRA_SNAP_LEVELS_0,SDM Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM       ,Response clock-enable override for partition client SDM" "Disabled,Enabled"
group.long 0x2A4++0x03
line.long 0x00 "APB_EXTRA_SNAP_LEVELS_0,APB Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_APB       ,Response clock-enable override for partition client APB" "Disabled,Enabled"
group.long 0xA08++0x03
line.long 0x00 "ISP_EXTRA_SNAP_LEVELS_0,ISP Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_ISP       ,Response clock-enable override for partition client ISP" "Disabled,Enabled"
group.long 0xA18++0x03
line.long 0x00 "USBD_EXTRA_SNAP_LEVELS_0,USBD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_USBD      ,Response clock-enable override for partition client USBD" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "MSE_EXTRA_SNAP_LEVELS_0,MSE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_MSE       ,Response clock-enable override for partition client MSE" "Disabled,Enabled"
group.long 0xA10++0x03
line.long 0x00 "AUD_EXTRA_SNAP_LEVELS_0,AUD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AUD       ,Response clock-enable override for partition client AUD" "Disabled,Enabled"
group.long 0xA54++0x03
line.long 0x00 "NIC_EXTRA_SNAP_LEVELS_0,NIC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NIC       ,Response clock-enable override for partition client NIC" "Disabled,Enabled"
group.long 0xA40++0x03
line.long 0x00 "GK2_EXTRA_SNAP_LEVELS_0,GK2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_GK2       ,Response clock-enable override for partition client GK2" "Disabled,Enabled"
group.long 0xA64++0x03
line.long 0x00 "BPMPDMAPC_EXTRA_SNAP_LEVELS_0,BPMPDMAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_BPMPDMAPC ,Response clock-enable override for partition client BPMPDMAPC" "Disabled,Enabled"
group.long 0xE04++0x03
line.long 0x00 "NVD3_EXTRA_SNAP_LEVELS_0,NVD3 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD3      ,Response clock-enable override for partition client NVD3" "Disabled,Enabled"
group.long 0x2C0++0x03
line.long 0x00 "SAX_EXTRA_SNAP_LEVELS_0,SAX Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SAX       ,Response clock-enable override for partition client SAX" "Disabled,Enabled"
group.long 0xA5C++0x03
line.long 0x00 "EQOSPC_EXTRA_SNAP_LEVELS_0,EQOSPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_EQOSPC    ,Response clock-enable override for partition client EQOSPC" "Disabled,Enabled"
group.long 0xA38++0x03
line.long 0x00 "NVD_EXTRA_SNAP_LEVELS_0,NVD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_NVD       ,Response clock-enable override for partition client NVD" "Disabled,Enabled"
group.long 0xA50++0x03
line.long 0x00 "SDM1_EXTRA_SNAP_LEVELS_0,SDM1 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SDM1      ,Response clock-enable override for partition client SDM1" "Disabled,Enabled"
group.long 0xA48++0x03
line.long 0x00 "HDAPC_EXTRA_SNAP_LEVELS_0,HDAPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_HDAPC     ,Response clock-enable override for partition client HDAPC" "Disabled,Enabled"
group.long 0xA68++0x03
line.long 0x00 "AONPC_EXTRA_SNAP_LEVELS_0,AONPC Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_AONPC     ,Response clock-enable override for partition client AONPC" "Disabled,Enabled"
group.long 0xA04++0x03
line.long 0x00 "SD_EXTRA_SNAP_LEVELS_0,SD Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_SD        ,Response clock-enable override for partition client SD" "Disabled,Enabled"
group.long 0xA84++0x03
line.long 0x00 "DIS2_EXTRA_SNAP_LEVELS_0,DIS2 Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_DIS2      ,Response clock-enable override for partition client DIS2" "Disabled,Enabled"
group.long 0x2D8++0x03
line.long 0x00 "VE_EXTRA_SNAP_LEVELS_0,VE Extra Snap Levels 0"
bitfld.long 0x00 3. " RCLKEN_OVERRIDE_VE        ,Response clock-enable override for partition client VE" "Disabled,Enabled"
group.long 0xA00++0x03
line.long 0x00 "GK_EXTRA_SNAP_LEVELS_0,GK Extra Snap Levels 0"
bitfld.long 0x00 31. " GPU_ENABLE_OOO_RESPONSES  ,Enable response mode for GPU and GPU2 read AXICIFs" "Disabled,Enabled"
bitfld.long 0x00 3. "                 RCLKEN_OVERRIDE_GK ,Response clock-enable override for partition client GK" "Disabled,Enabled"
textline "                                           "
endif
sif (!cpuis("TEGRAX2"))
group.long 0x418++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE_0,Memory Controller VPR Override Register"
bitfld.long 0x00 31. " SDMMC3A_VPR_OVERRIDE             ,SDMMC3A VPR override" "Disabled,Enabled"
bitfld.long 0x00 30. "          SDMMC2A_VPR_OVERRIDE                 ,SDMMC2A VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 29. " SDMMC1A_VPR_OVERRIDE             ,SDMMC1A VPR override" "Disabled,Enabled"
bitfld.long 0x00 26. "          DC1_VPR_OVERRIDE                     ,DC1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 23. " PPCS1_VPR_OVERRIDE               ,PPCS1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 22. "          TSEC_VPR_OVERRIDE                    ,TSEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 20. " XUSB_DEV_VPR_OVERRIDE            ,XUSB SEV VPR override" "Disabled,Enabled"
bitfld.long 0x00 19. "          XUSB_HOST_VPR_OVERRIDE               ,XUSB HOST VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 18. " VIC_VPR_OVERRIDE                 ,VIC VPR override" "Disabled,Enabled"
bitfld.long 0x00 17. "          VI_VPR_OVERRIDE                      ,VI VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " SATA_VPR_OVERRIDE                ,SATA VPR override" "Disabled,Enabled"
bitfld.long 0x00 14. "          PPCS_VPR_OVERRIDE                    ,PPCS VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " NVENC_VPR_OVERRIDE               ,NVENC VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          MPCORE_VPR_OVERRIDE                  ,MPCORE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " ISP2_VPR_OVERRIDE                ,ISP2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          HDA_VPR_OVERRIDE                     ,HDA VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HC_VPR_OVERRIDE                  ,HC VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          DCB_VPR_OVERRIDE                     ,DCB VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DC_VPR_OVERRIDE                  ,DC VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          AVPC_VPR_OVERRIDE                    ,AVPC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " AFI_VPR_OVERRIDE                 ,AFI VPR override" "Disabled,Enabled"
group.long 0x590++0x03
line.long 0x00 "VIDEO_PROTECT_VPR_OVERRIDE1_0,Memory Controller VPR OVERRIDE Register"
bitfld.long 0x00 16. " NVDEC1_VPR_OVERRIDE              ,NVDEC1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 15. "          TSECB1_VPR_OVERRIDE                  ,TSECB11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 14. " TSEC1_VPR_OVERRIDE               ,TSEC11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 13. "          TSECB_VPR_OVERRIDE                   ,TSECB1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 12. " ETR_VPR_OVERRIDE                 ,ETR1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 11. "          AXIAP_VPR_OVERRIDE                   ,AXIAP1 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 10. " SE1_VPR_OVERRIDE                 ,SE11 VPR override" "Disabled,Enabled"
bitfld.long 0x00 9. "          HC1_VPR_OVERRIDE                     ,HC11 VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 8. " NVJPG_VPR_OVERRIDE               ,NVJPG1 VPR override" "Disabled,Enabled"
bitfld.long 0x00 7. "          SE_VPR_OVERRIDE                      ,SE VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " APE_VPR_OVERRIDE                 ,APE VPR override" "Disabled,Enabled"
bitfld.long 0x00 5. "          NVDEC_VPR_OVERRIDE                   ,NVDEC VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 4. " PPCS2_VPR_OVERRIDE               ,PPCS2 VPR override" "Disabled,Enabled"
bitfld.long 0x00 3. "          GPUB_VPR_OVERRIDE                    ,GBUP VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " GPU_VPR_OVERRIDE                 ,GPU VPR override" "Disabled,Enabled"
bitfld.long 0x00 1. "          ISP2B_VPR_OVERRIDE                   ,ISP2B VPR override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SDMMC4A_VPR_OVERRIDE             ,SDMMC4A VPR override" "Disabled,Enabled"
textline "                                           "
group.long 0x600++0x03
line.long 0x00 "SMMUTLB_SET_SELECTION_MASK_0_0,TLB Set Selection Mask"
hexmask.long.word 0x00 15.--23. 1. " TLB_SET_SELECTION_MASK_0         ,TLB set selection mask 0"
group.long 0x608++0x03
line.long 0x00 "DISPLAY_SNAP_RING_0,Display Arbiter Ring Selection"
bitfld.long 0x00 31. " DISPLAY_SNAP_RING_WRITE_ACCESS   ,Display snap ring write access" "Enabled,Disabled"
bitfld.long 0x00 1. "          DISB_SNAP_RING                       ,DISB snap ring" "RING0,RING1"
textline "                                           "
bitfld.long 0x00 0. " DIS_SNAP_RING                    ,DIS snap ring" "RING0,RING1"
endif
sif (cpuis("TEGRAX2"))
group.long 0x648++0x07
line.long 0x00 "VIDEO_PROTECT_BOM_0,Video Protect BOM 0"
hexmask.long.word 0x00 20.--31. 0x10 " VIDEO_PROTECT_BOM                   ,Base address for the VPR address space"
line.long 0x04 "VIDEO_PROTECT_SIZE_MB_0,Video Protect Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " VIDEO_PROTECT_SIZE_MB               ,Size of the VPR region in megabytes"
group.long 0x978++0x03
line.long 0x00 "VIDEO_PROTECT_BOM_ADR_HI_0,Video Protect BOM ADR HI 0"
bitfld.long 0x00 0.--1. " VIDEO_PROTECT_BOM_ADR_HI            ,Higher address bits beyond 32 bits of byte-aligned address of the base address of VPR space" "0,1,2,3"
group.long 0x650++0x03
line.long 0x00 "VIDEO_PROTECT_REG_CTRL_0,Control Video Protect Register  0"
bitfld.long 0x00 1. " VIDEO_PROTECT_ALLOW_TZ_WRITE_ACCESS ,Allow TrustZone writes to VPR aperature registers" "Disabled,Enabled"
bitfld.long 0x00 0. "  VIDEO_PROTECT_WRITE_ACCESS ,Sticky bit to control the writes to all VPR aperture registers including this one" "RING0,RING1"
textline "                                           "
endif
rgroup.long 0x654++0x03
line.long 0x00 "ERR_VPR_STATUS_0,Memory Controller Error VPR Status 0"
bitfld.long 0x00 20.--21. " ERR_VPR_ADR_HI                   ,Higher address bits of erring address" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_VPR_SWAP                         ,Error VPR swap" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_VPR_SECURITY                 ,Error VPR security" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_VPR_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_VPR_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--7. 1. "              ERR_VPR_ID                           ,Client identifier"
rgroup.long 0x658++0x03
line.long 0x00 "ERR_VPR_ADR_0,Memory Controller Lower Bits Of Erring Address"
textline "                                           "
sif (cpuis("TEGRAX2"))
group.long 0x9BC++0x03
line.long 0x00 "MC_SECURITY_CFG3_0,Memory Controller Security Configuration 3 0"
bitfld.long 0x00 0.--1. " SECURITY_BOM_HI           ,Higher address bits of the base of the secured region limited to MB granularity" "0,1,2,3"
group.long 0xF80++0x07
line.long 0x00 "MC_REGIF_CONFIG_0,Memory Controller REGIF Configuration 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_HUB          ,Enable REGIF HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_MC                ,Enable REGIF memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_EMC           ,Enable REGIF EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_BROADCAST_0,Memory Controller REGIF Broadcast 0"
bitfld.long 0x04 31. " LOCK_REGIF_CONFIG         ,Lock REGIF configuration" "Disabled,Enabled"
bitfld.long 0x04 24.--25. "  ENABLE_REGIF_BROADCAST_HUB_SID ,Enable REGIF broadcast HUB SID" "0,1,2,3"
bitfld.long 0x04 16.--17. "      ENABLE_REGIF_BROADCAST_HUB ,Enable REGIF broadcast HUB" "0,1,2,3"
textline "                                           "
bitfld.long 0x04 8.--11. " ENABLE_REGIF_BROADCAST_MC ,Enable REGIF broadcast memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "        ENABLE_REGIF_BROADCAST_EMC     ,Enable REGIF broadcast EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF90++0x0F
line.long 0x00 "MC_REGIF_UNICAST0_0,Memory Controller REGIF UNICAST0 0"
bitfld.long 0x00 16.--17. " ENABLE_REGIF_UNICAST0_HUB ,Enable REGIF UNICAST0 HUB" "0,1,2,3"
bitfld.long 0x00 8.--11. "         ENABLE_REGIF_UNICAST0_MC       ,Enable REGIF UNICAST0 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "     ENABLE_REGIF_UNICAST0_EMC  ,Enable REGIF UNICAST0 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MC_REGIF_UNICAST1_0,Memory Controller REGIF UNICAST1 0"
bitfld.long 0x04 16.--17. " ENABLE_REGIF_UNICAST1_HUB ,Enable REGIF UNICAST1 HUB" "0,1,2,3"
bitfld.long 0x04 8.--11. "         ENABLE_REGIF_UNICAST1_MC       ,Enable REGIF UNICAST1 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "     ENABLE_REGIF_UNICAST1_EMC  ,Enable REGIF UNICAST1 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MC_REGIF_UNICAST2_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x08 16.--17. " ENABLE_REGIF_UNICAST2_HUB ,Enable REGIF UNICAST2 HUB" "0,1,2,3"
bitfld.long 0x08 8.--11. "         ENABLE_REGIF_UNICAST2_MC       ,Enable REGIF UNICAST2 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "     ENABLE_REGIF_UNICAST2_EMC  ,Enable REGIF UNICAST2 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "MC_REGIF_UNICAST3_0,Memory Controller REGIF UNICAST2 0"
bitfld.long 0x0C 16.--17. " ENABLE_REGIF_UNICAST3_HUB ,Enable REGIF UNICAST3 HUB" "0,1,2,3"
bitfld.long 0x0C 8.--11. "         ENABLE_REGIF_UNICAST3_MC       ,Enable REGIF UNICAST3 memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "     ENABLE_REGIF_UNICAST3_EMC  ,Enable REGIF UNICAST3 EMC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xF2C++0x03
line.long 0x00 "MC_HUBC_INTSTATUS_0,Memory Controller HUBC Interrupt Status 0"
bitfld.long 0x00 0. " SCRUB_ECC_WR_ACK_INT      ,SCRUB ECC WR ACK Interrupt" "Clear,Set"
group.long 0xF24++0x07
line.long 0x00 "MC_GLOBAL_INTSTATUS_0,Memory Controller Global Interrupt Status 0"
bitfld.long 0x00 24. " COMMON_INTR               ,Common interrupt" "Clear,Set"
bitfld.long 0x00 17. "     HUB1_INTR                      ,Hub 1 interrupt" "Clear,Set"
bitfld.long 0x00 16. "  HUB0_INTR                  ,Hub 0 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 3. " MC3_INTR                  ,Channel 3 interrupt" "Clear,Set"
bitfld.long 0x00 2. "     MC2_INTR                       ,Channel 2 interrupt" "Clear,Set"
bitfld.long 0x00 1. "  MC1_INTR                   ,Channel 1 interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x00 0. " MC0_INTR                  ,Channel 0 interrupt" "Clear,Set"
line.long 0x04 "MC_GLOBAL_CRITICAL_INTSTATUS_0,Memory Controller Global Critical Interrupt Status 0"
bitfld.long 0x04 24. " COMMON_CRITICAL_INTR      ,Common critical interrupt" "Clear,Set"
bitfld.long 0x04 17. "     HUB1_CRITICAL_INTR             ,Hub 1 critical interrupt" "Clear,Set"
bitfld.long 0x04 16. "  HUB0_CRITICAL_INTR         ,Hub 0 critical interrupt." "Clear,Set"
textline "                                           "
bitfld.long 0x04 3. " MC3_CRITICAL_INTR         ,Channel 3 critical interrupt." "Clear,Set"
bitfld.long 0x04 2. "     MC2_CRITICAL_INTR              ,Channel 2 critical interrupt." "Clear,Set"
bitfld.long 0x04 1. "  MC1_CRITICAL_INTR          ,Channel 1 critical interrupt" "Clear,Set"
textline "                                           "
bitfld.long 0x04 0. " MC0_CRITICAL_INTR         ,Channel 0 critical interrupt" "Clear,Set"
endif
sif (!cpuis("TEGRAX2"))
group.long 0x964++0x03
line.long 0x00 "IRAM_REG_CTRL_0,Access Control Register For IRAM Aperture Programming"
bitfld.long 0x00 0. " IRAM_CFG_WRITE_ACCESS            ,IRAM configuration write access disable" "No,Yes"
group.long 0x664++0x03
line.long 0x00 "EMEM_CFG_ACCESS_CTRL_0 ,Access Control Bit For EMEM_CFG Registers"
bitfld.long 0x00 0. " EMEM_CFG_WRITE_ACCESS            ,EMEM configuration write access disable" "No,Yes"
group.long 0x668++0x07
line.long 0x00 "TZ_SECURITY_CTRL_0,Trustzone Security Control Register"
bitfld.long 0x00 0. " CPU_STRICT_TZ_APERTURE_CHECK     ,CPU strict TrustZone aperture check enable" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_RING3_0,External Memory Arbitration Configuration"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_RING3          ,Limit outstanding RING3" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDHOFF_OVERRIDE_RING3 ,Limit holdhoff override RING3" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_RING3      ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_RING3            ,Maximum number of requests allowed in the arbiter when limit is enabled"
group.long 0x670++0x0B
line.long 0x00 "SEC_CARVEOUT_BOM_0,Memory Controller Sec Carve Out Bom 0"
hexmask.long.word 0x00 20.--31. 0x10 " SEC_CARVEOUT_BOM                 ,Base address for the SEC carve out address space"
line.long 0x04 "SEC_CARVEOUT_SIZE_MB_0,Memory Controller Sec Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " SEC_CARVEOUT_SIZE_MB             ,Size of the SEC carve out region"
line.long 0x08 "SEC_CARVEOUT_REG_CTRL_0,Memory Controller Sec Carve Out Register Control 0"
bitfld.long 0x08 0. " SEC_CARVEOUT_WRITE_ACCESS        ,Sticky bit to control the writes to the other SEC Carve Out registers" "Enabled,Disabled"
rgroup.long 0x67C++0x07
line.long 0x00 "ERR_SEC_STATUS_0,Memory Controller Error Sec Status 0"
bitfld.long 0x00 20.--21. " ERR_SEC_ADR_HI                   ,Higher address bits of Erring address whose lower bits are available in the ERR_ADR register" "b00,b01,b10,b11"
bitfld.long 0x00 18. "               ERR_SEC_SWAP                         ,ERR_SEC_SWAP" "0,1"
textline "                                           "
bitfld.long 0x00 17. " ERR_SEC_SECURITY                 ,Set if transaction was secure" "Nonsecure,Secure"
bitfld.long 0x00 16. "         ERR_SEC_RW                           ,Direction of the access that caused the error" "Read,Write"
textline "                                           "
bitfld.long 0x00 12.--14. " ERR_SEC_ADR1                     ,Second subpartition unique address bits" "b000,b001,b010,b011,b100,b101,b110,b111"
hexmask.long.byte 0x00 0.--6. 1. "              ERR_SEC_ID                           ,Client identifier of the access that caused the error"
line.long 0x04 "ERR_SEC_ADR_0,Memory Controller Lower Address Bits Of Erring Address"
group.long 0x684++0x07
line.long 0x00 "PC_IDLE_CLOCK_GATE_CONFIG_0,Partition Idle Clock Gate Config"
bitfld.long 0x00 0.--4. " CLOCK_GATE_IDLE_TICKS            ,Number of idle ticks before a partition client is clock-gated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STUTTER_CONTROL_0,Memory Controller Stutter Control 0"
bitfld.long 0x04 0. " SLOW_EMCCLK_DURING_DSR           ,Slowing the EMC during dynamic self refresh" "Disabled,Enabled"
group.long 0x6B0++0x17
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_0,Snap Arbiter Throttle"
bitfld.long 0x00 16.--20. " NISO_THROTTLE_CYCLES_HIGH        ,Cycles of throttle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                NISO_THROTTLE_CYCLES                 ,Cycles of throttle after each request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "EMEM_ARB_OUTSTANDING_REQ_NISO_0,Highest Ring Input NISO Outstanding Request Limiter"
bitfld.long 0x04 31. " LIMIT_OUTSTANDING_NISO           ,Requests into NISO are throttled after the request count reaches ARB_MAX_OUTSTANDING_NISO" "Disabled,Enabled"
bitfld.long 0x04 30. "          LIMIT_DURING_HOLDOFF_OVERRIDE_NISO   ,Overrides the limiting of NISO transactions" "Disabled,Enabled"
textline "                                           "
hexmask.long.word 0x04 16.--24. 1. " ARB_OUTSTANDING_COUNT_NISO       ,Current number of outstanding requests"
hexmask.long.word 0x04 0.--8. 1. "              ARB_MAX_OUTSTANDING_NISO             ,The maximum number of requests allowed in the arbiter"
line.long 0x08 "EMEM_ARB_NISO_THROTTLE_MASK_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x08 29. " NISO_THROTTLE_MASK_VICPC         ,Include VICPC in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 28. "          NISO_THROTTLE_MASK_USBD              ,Include USBD in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 27. " NISO_THROTTLE_MASK_HOST          ,Include HOST in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 23. "          NISO_THROTTLE_MASK_SD                ,Include SD in the NISO meta client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 22. " NISO_THROTTLE_MASK_GK            ,Include GK in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 19. "          NISO_THROTTLE_MASK_MSE               ,Include MSE in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 17. " NISO_THROTTLE_MASK_USBX          ,Include USBX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 9. "          NISO_THROTTLE_MASK_SAX               ,Include SAX in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " NISO_THROTTLE_MASK_PCX           ,Include PCX in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 3. "          NISO_THROTTLE_MASK_AVP               ,Include AVP in the NISO meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 2. " NISO_THROTTLE_MASK_APB           ,Include APB in the NISO meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x08 1. "          NISO_THROTTLE_MASK_AHB               ,Include AHB in the NISO meta-client group for throttling" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_RING0_THROTTLE_MASK_0,Ring0 Input Throttle Mask"
bitfld.long 0x0C 31. " ARB_OUTSTANDING_COUNT_ABOVE_SMMU ,Enable ARB_OUTSTANDING count includes requests in SMMU" "Disabled,Enabled"
bitfld.long 0x0C 15. "          RING0_THROTTLE_MASK_RING1_OUTPUT     ,Include the RING1 output in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 7. " RING0_THROTTLE_MASK_RING1        ,Include the RING1 in the ring0 meta-client group throttling" "Disabled,Enabled"
bitfld.long 0x0C 6. "          RING0_THROTTLE_MASK_FTOP             ,Include FTOP in the ring0 meta-client group throttling" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " RING0_THROTTLE_MASK_PTC          ,Include MEM in the ring0 meta-client group for throttling" "Disabled,Enabled"
bitfld.long 0x0C 0. "          RING0_THROTTLE_MASK_MPCORER          ,Include MPCORER in the ring0 meta-client group for throttling" "Disabled,Enabled"
textline "                                           "
line.long 0x10 "EMEM_ARB_TIMING_RFCPB_0,DRAM Timing TRFCPB"
hexmask.long.word 0x10 0.--8. 1. " RFCPB                            ,Minimum number of cycles between a per-bank auto refresh command and a subsequent per-bank refresh or activate command to that bank"
line.long 0x14 "EMEM_ARB_TIMING_CCDMW_0,DRAM Timing TCCDMW"
bitfld.long 0x14 0.--5. " CCDMW                            ,DRAM CAS to CAS delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x6F0++0x07
line.long 0x00 "EMEM_ARB_REFPB_HP_CTRL_0,Per Bank Refresh High Priority Control"
hexmask.long.byte 0x00 16.--22. 1. " REFPB_OPEN_WORK_THRESH           ,If the number of requests to open pages is greater or equal this value a per-bank refresh is favoured to be issued"
textline "                                           "
hexmask.long.byte 0x00 8.--14. 1. " REFPB_THRESH_DISABLE_HP          ,If the number of REFpb requests is less or equal this value per-bank refreshes become low-priority"
hexmask.long.byte 0x00 0.--6. 1. "                REFPB_THRESH_ENABLE_HP               ,If the number of REFpb requests is greater or equal this value per-bank refreshes become high-priority"
line.long 0x04 "EMEM_ARB_REFPB_BANK_CTRL_0,Bank Control"
bitfld.long 0x04 31. " REFPB_EXPLICIT_BANK_MODE         ,REFpb simultaneous issue to more than one rank disable" "Enabled,Disabled"
textline "                                           "
hexmask.long.byte 0x04 8.--14. 1. " REFPB_THRESH_DISABLE_FORCE_CLOSE ,If the number of REFpb requests is less or equal this value per-bank refreshes will force bank closure"
hexmask.long.byte 0x04 0.--6. 1. "                REFPB_THRESH_ENABLE_FORCE_CLOSE      ,If the number of REFpb requests is greater or equal this value per-bank refreshes will force bank closure"
group.long 0x968++0x03
line.long 0x00 "EMEM_ARB_OVERRIDE_1_0,Memory Controller EMEM ARB Override 1_0"
bitfld.long 0x00 11. " MULTI_BANK_REPLAY_OVERRIDE       ,Multi-bank replay override enable" "Disabled,Enabled"
bitfld.long 0x00 5. "          EXPIRE_UPDATE_DEADLOCK_OVERRIDE      ,Expire update deadlock override" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2.--4. " CPU_READ_PAGE_OPEN_POLICY        ,CPU read page open policy" "Disabled,All,Eack_active,Early_ack_enable,Po_hint,?..."
bitfld.long 0x00 0.--1. "  CPU_WRITE_PAGE_OPEN_POLICY           ,CPU write page open policy" "Disabled,All,Eack_hint,?..."
group.long 0x970++0x07
line.long 0x00 "CLIENT_HOTRESET_CTRL_1_0,Memory Client Hot Reset Control Register"
bitfld.long 0x00 13. " TSECB_FLUSH_ENABLE               ,TSECB flush enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ETR_FLUSH_ENABLE                     ,ETR flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 11. " AXIAP_FLUSH_ENABLE               ,AXIAP flush enable" "Disabled,Enabled"
bitfld.long 0x00 8. "          NVJPG_FLUSH_ENABLE                   ,NVJPG flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 7. " SE_FLUSH_ENABLE                  ,SE flush enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          APE_FLUSH_ENABLE                     ,APE flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " NVDEC_FLUSH_ENABLE               ,NVDEC flush enable" "Disabled,Enabled"
bitfld.long 0x00 2. "          GPU_FLUSH_ENABLE                     ,GPU flush enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " ISP2B_FLUSH_ENABLE               ,ISP2B flush enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          SDMMC4A_FLUSH_ENABLE                 ,SDMMC4A flush enable" "Disabled,Enabled"
line.long 0x04 "CLIENT_HOTRESET_STATUS_1_0,Memory Client Hot Reset Status Register"
bitfld.long 0x04 13. " TSECB_HOTRESET_STATUS            ,TSECB hot reset status" "Done,In progress"
bitfld.long 0x04 12. "       ETR_HOTRESET_STATUS                  ,ETR hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 11. " AXIAP_HOTRESET_STATUS            ,AXIAP hot reset status" "Done,In progress"
bitfld.long 0x04 8. "       NVJPG_HOTRESET_STATUS                ,NVJPG hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 7. " SE_HOTRESET_STATUS               ,SE hot reset status" "Done,In progress"
bitfld.long 0x04 6. "       APE_HOTRESET_STATUS                  ,APE hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 5. " NVDEC_HOTRESET_STATUS            ,NVDEC hot reset status" "Done,In progress"
bitfld.long 0x04 2. "       GPU_HOTRESET_STATUS                  ,GPU hot reset status" "Done,In progress"
textline "                                           "
bitfld.long 0x04 1. " ISP2B_HOTRESET_STATUS            ,ISP2B hot reset status" "Done,In progress"
bitfld.long 0x04 0. "       SDMMC4A_HOTRESET_STATUS              ,SDMMC4A hot reset status" "Done,In progress"
group.long 0x984++0x07
line.long 0x00 "VIDEO_PROTECT_GPU_OVERRIDE_0_0,Memory Controller Video Protect GPU Override 0 0"
line.long 0x04 "VIDEO_PROTECT_GPU_OVERRIDE_1_0,Memory Controller Video Protect GPU Override 1 0"
hexmask.long.word 0x04 0.--15. 1. " VIDEO_PROTECT_GPU_OVERRIDE_1     ,Video protect GPU override 1"
group.long 0x9A0++0x0F
line.long 0x00 "MTS_CARVEOUT_BOM_0,Memory Controller MTS Carve Out BOM 0"
hexmask.long.word 0x00 20.--31. 1. " MTS_CARVEOUT_BOM                 ,MTS carve out BOM"
line.long 0x04 "MTS_CARVEOUT_SIZE_MB_0,Memory Controller MTS Carve Out Size MB 0"
hexmask.long.word 0x04 0.--11. 1. " MTS_CARVEOUT_SIZE_MB             ,MTS carve out size MB"
line.long 0x08 "MTS_CARVEOUT_ADR_HI_0,Memory Controller Mts Carve Out Address Hi 0"
bitfld.long 0x08 0.--1. " MTS_CARVEOUT_BOM_HI              ,MTS carve out BOM Hi" "0,1,2,3"
line.long 0x0C "MTS_CARVEOUT_REG_CTRL_0,Memory Controller MTS carve out reg control 0"
bitfld.long 0x0C 0. " MTS_CARVEOUT_WRITE_ACCESS        ,MTS carve out write access" "Enabled,Disabled"
group.long 0x9B8++0x07
line.long 0x00 "SMMU_PTC_FLUSH_1_0,Page Table Cache Flush Address Register"
bitfld.long 0x00 0.--1. " PTC_FLUSH_ADR_HI                 ,Physical address of PTE group to match for address flushes" "b00,b01,b10,b11"
line.long 0x04 "SECURITY_CFG3_0,Secure/Carveout Region Configuration"
bitfld.long 0x04 0.--1. " SECURITY_BOM_HI                  ,Higher address bits beyond 32 bits of the base of the secured region" "b00,b01,b10,b11"
textline "                                           "
width 26.
if (((per.l(ad:0x02C50000+0x664))&0x01)==0x00)
group.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
else
rgroup.long 0x9C0++0x0F
line.long 0x00 "EMEM_BANK_SWIZZLE_CFG0_0,Bank Swizzling Register CFG0"
hexmask.long.word 0x00 0.--15. 1. " EMEM_BANK_MASK0     ,EMEM bank mask 0"
line.long 0x04 "EMEM_BANK_SWIZZLE_CFG1_0,Bank Swizzling Register CFG1"
hexmask.long.word 0x04 0.--15. 1. " EMEM_BANK_MASK1     ,EMEM bank mask 1"
line.long 0x08 "EMEM_BANK_SWIZZLE_CFG2_0,Bank Swizzling Register CFG2"
hexmask.long.word 0x08 0.--15. 1. " EMEM_BANK_MASK2     ,EMEM bank mask 2"
line.long 0x0C "EMEM_BANK_SWIZZLE_CFG3_0,Bank Swizzling Register CFG3"
bitfld.long 0x0C 0.--2. " EMEM_BANK_SWIZCOL   ,EMEM Bank SWIZCOL" "None,1Kb,2Kb,2Kb_offset_2,2Kb_offset_4,?..."
endif
group.long 0x9D4++0x03
line.long 0x00 "SEC_CARVEOUT_ADR_HI_0,Memory Controller Sec Carve Out Address Hi 0"
bitfld.long 0x00 0.--1. " SEC_CARVEOUT_BOM_HI ,Higher address bits beyond 32 bits of the base address of the SEC carve out space" "b00,b01,b10,b11"
if (((per.l(ad:0x02C50000+0xA88))&0x80000000)==0x80000000)
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      DC1_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  DC1_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  DC1_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  DC1_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA88++0x03
line.long 0x00 "SMMU_DC1_ASID_0,SMMU DC1 ASID Assignment Register"
bitfld.long 0x00 31. " DC1_SMMU_ENABLE     ,PPCS translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xA94))&0x80000000)==0x80000000)
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC1A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC1A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC1A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC1A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA94++0x03
line.long 0x00 "SMMU_SDMMC1A_ASID_0,SMMU SDMMC1A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC1A_SMMU_ENABLE ,SDMMC1A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xA98))&0x80000000)==0x80000000)
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC2A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC2A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC2A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC2A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA98++0x03
line.long 0x00 "SMMU_SDMMC2A_ASID_0,SMMU SDMMC2A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC2A_SMMU_ENABLE ,SDMMC2A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xA9C))&0x80000000)==0x80000000)
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC3A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC3A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC3A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC3A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xA9C++0x03
line.long 0x00 "SMMU_SDMMC3A_ASID_0,SMMU SDMMC3A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC3A_SMMU_ENABLE ,SDMMC3A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAA0))&0x80000000)==0x80000000)
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      SDMMC4A_ASID_3 ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  SDMMC4A_ASID_2 ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  SDMMC4A_ASID_1 ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  SDMMC4A_ASID ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA0++0x03
line.long 0x00 "SMMU_SDMMC4A_ASID_0,SMMU SDMMC4A ASID Assignment Register"
bitfld.long 0x00 31. " SDMMC4A_SMMU_ENABLE ,SDMMC4A translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAA4))&0x80000000)==0x80000000)
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ISP2B_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ISP2B_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ISP2B_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ISP2B_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA4++0x03
line.long 0x00 "SMMU_ISP2B_ASID_0,SMMU ISP2B ASID Assignment Register"
bitfld.long 0x00 31. " ISP2B_SMMU_ENABLE   ,ISP2B translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAA8))&0x80000000)==0x80000000)
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPU_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPU_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPU_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPU_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAA8++0x03
line.long 0x00 "SMMU_GPU_ASID_0,SMMU GPU ASID Assignment Register"
bitfld.long 0x00 31. " GPU_SMMU_ENABLE     ,GPU translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAAC))&0x80000000)==0x80000000)
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      GPUB_ASID_3    ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  GPUB_ASID_2    ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  GPUB_ASID_1    ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  GPUB_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAAC++0x03
line.long 0x00 "SMMU_GPUB_ASID_0,SMMU GPUB ASID Assignment Register"
bitfld.long 0x00 31. " GPUB_SMMU_ENABLE    ,GPUB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAB0))&0x80000000)==0x80000000)
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      PPCS2_ASID     ,ASID to use for PPCS2 translation"
else
group.long 0xAB0++0x03
line.long 0x00 "SMMU_PPCS2_ASID_0,SMMU PPCS2 ASID Assignment Register"
bitfld.long 0x00 31. " PPCS2_SMMU_ENABLE   ,PPCS2 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAB4))&0x80000000)==0x80000000)
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB4++0x03
line.long 0x00 "SMMU_NVDEC_ASID_0,SMMU NVDEC ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC_SMMU_ENABLE   ,NVDEC translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAB8))&0x80000000)==0x80000000)
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      APE_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAB8++0x03
line.long 0x00 "SMMU_APE_ASID_0,SMMU APE ASID Assignment Register"
bitfld.long 0x00 31. " APE_SMMU_ENABLE     ,APE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xABC))&0x80000000)==0x80000000)
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE_ASID        ,ASID to use when VA[3332] == 0x0"
else
group.long 0xABC++0x03
line.long 0x00 "SMMU_SE_ASID_0,SMMU SE ASID Assignment Register"
bitfld.long 0x00 31. " SE_SMMU_ENABLE      ,SE translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAC0))&0x80000000)==0x80000000)
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVJPG_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC0++0x03
line.long 0x00 "SMMU_NVJPG_ASID_0,SMMU NVJPG ASID Assignment Register"
bitfld.long 0x00 31. " NVJPG_SMMU_ENABLE   ,NVJPG translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAC4))&0x80000000)==0x80000000)
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      HC1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC4++0x03
line.long 0x00 "SMMU_HC1_ASID_0,SMMU HC1 ASID Assignment Register"
bitfld.long 0x00 31. " HC1_SMMU_ENABLE     ,HC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAC8))&0x80000000)==0x80000000)
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      SE1_ASID       ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAC8++0x03
line.long 0x00 "SMMU_SE1_ASID_0,SMMU SE1 ASID Assignment Register"
bitfld.long 0x00 31. " SE1_SMMU_ENABLE     ,SE1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xACC))&0x80000000)==0x80000000)
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      AXIAP_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  AXIAP_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  AXIAP_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  AXIAP_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xACC++0x03
line.long 0x00 "SMMU_AXIAP_ASID_0,SMMU AXIAP ASID Assignment Register"
bitfld.long 0x00 31. " AXIAP_SMMU_ENABLE   ,AXIAP translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAD0))&0x80000000)==0x80000000)
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      ETR_ASID_3     ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  ETR_ASID_2     ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  ETR_ASID_1     ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  ETR_ASID     ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD0++0x03
line.long 0x00 "SMMU_ETR_ASID_0,SMMU ETR ASID Assignment Register"
bitfld.long 0x00 31. " ETR_SMMU_ENABLE     ,ETR translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAD4))&0x80000000)==0x80000000)
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD4++0x03
line.long 0x00 "SMMU_TSECB_ASID_0,SMMU TSECB ASID Assignment Register"
bitfld.long 0x00 31. " TSECB_SMMU_ENABLE   ,TSECB translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAD8))&0x80000000)==0x80000000)
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSEC1_ASID_3   ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSEC1_ASID_2   ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSEC1_ASID_1   ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSEC1_ASID   ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAD8++0x03
line.long 0x00 "SMMU_TSEC1_ASID_0,SMMU TSEC1 ASID Assignment Register"
bitfld.long 0x00 31. " TSEC1_SMMU_ENABLE   ,TSEC1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xADC))&0x80000000)==0x80000000)
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "      TSECB1_ASID_3  ,ASID to use when VA[3332] == 0x3"
hexmask.long.byte 0x00 16.--22. 1. "  TSECB1_ASID_2  ,ASID to use when VA[3332] == 0x2"
hexmask.long.byte 0x00 8.--14. 1. "  TSECB1_ASID_1  ,ASID to use when VA[3332] == 0x1"
hexmask.long.byte 0x00 0.--6. 1. "  TSECB1_ASID  ,ASID to use when VA[3332] == 0x0"
else
group.long 0xADC++0x03
line.long 0x00 "SMMU_TSECB1_ASID_0,SMMU TSECB1 ASID Assignment Register"
bitfld.long 0x00 31. " TSECB1_SMMU_ENABLE  ,TSECB1 translation enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C50000+0xAE0))&0x80000000)==0x80000000)
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "      NVDEC1_ASID    ,ASID to use when VA[3332] == 0x0"
else
group.long 0xAE0++0x03
line.long 0x00 "SMMU_NVDEC1_ASID_0,SMMU NVDEC1 ASID Assignment Register"
bitfld.long 0x00 31. " NVDEC1_SMMU_ENABLE  ,NVDEC1 translation enable" "Disabled,Enabled"
endif
textline " "
width 34.
group.long 0xB84++0x03
line.long 0x00 "EMEM_ARB_NISO_THROTTLE_MASK_1_0,Highest Ring Input NISO Throttle Mask"
bitfld.long 0x00 5. " NISO_THROTTLE_MASK_DFD ,Include DFD in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 4. "  NISO_THROTTLE_MASK_HDAPC ,Include HDAPC,in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 3. "  NISO_THROTTLE_MASK_SDM ,Include SDM in the NISO meta-client group for throttling" "Not included,Included"
textline "                                           "
bitfld.long 0x00 2. " NISO_THROTTLE_MASK_GK2 ,Include GK2 in the NISO meta-client group for throttling" "Not included,Included"
bitfld.long 0x00 1. "  NISO_THROTTLE_MASK_JPG   ,Include JPG in the NISO meta-client group for throttling" "Not included,Included"
group.long 0xB84++0x0F
line.long 0x00 "EMEM_ARB_HYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x00 9. " HYST_GPUSWR2           ,Client GPUSWR2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 8. "      HYST_GPUSRD2             ,Client GPUSRD2 is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 7. "      HYST_TSECSWRB          ,Client TSECWRB is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " HYST_TSECRDB           ,Client RSECRDB is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 5. "      HYST_ETRW                ,Client ETRW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      HYST_ETTR              ,Client ETTR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " HYST_AXIAPW            ,Client AXIAPW is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 2. "      HYST_AXIAPR              ,Client AXIAPR is treated as a hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      HYST_SESWR             ,Client SESWR is treated as a hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " HYST_SESRD             ,Client SESRD is treated as a hysteresis client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_ARB_ISOCHRONOUS_4_0,Per-Client Isochronous Settings"
bitfld.long 0x00 9. " ISO_GPUSWR2            ,Client GPUSWR2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 8. "      ISO_GPUSRD2              ,Client GPUSRD2 is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 7. "      ISO_TSECSWRB           ,Client TSECWRB is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " ISO_TSECRDB            ,Client RSECRDB is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 5. "      ISO_ETRW                 ,Client ETRW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 4. "      ISO_ETTR               ,Client ETTR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " ISO_AXIAPW             ,Client AXIAPW is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 2. "      ISO_AXIAPR               ,Client AXIAPR is treated as a isochronous client" "Disabled,Enabled"
bitfld.long 0x00 1. "      ISO_SESWR              ,Client SESWR is treated as a isochronous client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " ISO_SESRD              ,Client SESRD is treated as a isochronous client" "Disabled,Enabled"
group.long 0xB94++0x0F
line.long 0x00 "EMEM_SMMU_TRANSLATION_ENABLE_4_0,Per-Client Translation Settings"
rbitfld.long 0x00 9. " SMMU_GPUSWR2_ENABLE    ,Client GPUSWR2 translate by SMMU enable" ",Enabled"
rbitfld.long 0x00 8. "       SMMU_GPUSRD2_ENABLE      ,Client GPUSRD2 translate by SMMU enable" ",Enabled"
bitfld.long 0x00 7. "       SMMU_TSECSWRB_ENABLE   ,Client TSECWRB translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 6. " SMMU_TSECRDB_ENABLE    ,Client RSECRDB translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      SMMU_ETRW_ENABLE         ,Client ETRW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      SMMU_ETTR_ENABLE       ,Client ETTR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " SMMU_AXIAPW_ENABLE     ,Client AXIAPW translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      SMMU_AXIAPR_ENABLE       ,Client AXIAPR translate by SMMU enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      SMMU_SESWR_ENABLE      ,Client SESWR translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 0. " SMMU_SESRD_ENABLE      ,Client SESRD translate by SMMU enable" "Disabled,Enabled"
textline "                                           "
group.long 0xBB0++0x13
line.long 0x00 "EMEM_ARB_DHYSTERESIS_0_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x00 31. " DHYST_SATAR            ,Client SATAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 30. "      DHYST_PPCSAHBSLVR        ,Client PPCSAHBSLVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 29. "      DHYST_PPCSAHBDMAR      ,Client PPCSAHBDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 28. " DHYST_NVENCSRD         ,Client NVENCSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 23. "      DHYST_HOST1XR            ,Client HOST1XR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 22. "      DHYST_HOST1XDMAR       ,Client HOST1XDMAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 21. " DHYST_HDAR             ,Client HDAR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 17. "      DHYST_DISPLAYHCB         ,Client DISPLAYHCB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 16. "      DHYST_DISPLAYHC        ,Client DISPLAYHC is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 15. " DHYST_AVPCARM7R        ,Client AVPCARM7R is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 14. "      DHYST_AFIR               ,Client AFIR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 6. "      DHYST_DISPLAY0CB       ,Client DISPLAY0CB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " DHYST_DISPLAY0C        ,Client DISPLAY0C is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 4. "      DHYST_DISPLAY0BB         ,Client DISPLAY0BB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 3. "      DHYST_DISPLAY0B        ,Client DISPLAY0B is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 2. " DHYST_DISPLAY0AB       ,Client DISPLAY0AB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 1. "      DHYST_DISPLAY0A          ,Client DISPLAY0A is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x00 0. "      DHYST_PTCR             ,Client PTCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x04 "EMEM_ARB_DHYSTERESIS_1_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x04 29. " DHYST_SATAW            ,Client SATAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 28. "      DHYST_PPCSAHBSLVW        ,Client PPCSAHBSLVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 27. "      DHYST_PPCSAHBDMAW      ,Client PPCSAHBDMAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 25. " DHYST_MPCOREW          ,Client MPCOREW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 24. "      DHYST_MPCORELPW          ,Client MPCORELPW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 22. "      DHYST_HOST1XW          ,Client HOST1XW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 21. " DHYST_HDAW             ,Client HDAW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 18. "      DHYST_AVPCARM7W          ,Client AVPCARM7W is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 17. "      DHYST_AFIW             ,Client AFIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 11. " DHYST_NVENCSWR         ,Client NVENCSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x04 7. "      DHYST_MPCORER            ,Client MPCORER is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x08 "EMEM_ARB_DHYSTERESIS_2_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x08 26. " DHYST_DISPLAYT         ,Client DISPLAYT is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 25. "      DHYST_GPUSWR             ,Client GPUSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 24. "      DHYST_GPUSRD           ,Client GPSURD is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 21. " DHYST_TSECSWR          ,Client TSECSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 20. "      DHYST_TSECSRD            ,Client TSECSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 17. "      DHYST_ISPWBB           ,Client ISPWBB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 16. " DHYST_ISPWAB           ,Client ISPWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 14. "      DHYST_ISPRAB             ,Client ISPRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 13. "      DHYST_XUSB_DEVW        ,Client XUSB DEVW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 12. " DHYST_XUSB_DEVR        ,Client XUSB DEVR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 11. "      DHYST_XUSB_HOSTW         ,Client XUSB HOSTW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 10. "      DHYST_XUSB_HOSTR       ,Client XUSB HOSTR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x08 7. " DHYST_ISPWB            ,Client ISPWB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 6. "      DHYST_ISPWA              ,Client ISPWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x08 4. "      DHYST_ISPRA            ,Client ISPRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x0C "EMEM_ARB_DHYSTERESIS_3_0,Per-Client Dynamic Hysteresis Settings"
bitfld.long 0x0C 31. " DHYST_NVJPGSWR         ,Client NVJPGSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DHYST_NVJPGSRD           ,Client NVJPGSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 27. "      DHYST_APEW             ,Client APEW is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 26. " DHYST_APER             ,Client APER is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 25. "      DHYST_NVDECSWR           ,Client NVDECSWR is treated as dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 24. "      DHYST_NVDECSRD         ,Client NVDECSRD is treated as dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 19. " DHYST_DISPLAYD         ,Client DISPLAYD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 18. "      DHYST_VIW                ,Client VIW is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 13. "      DHYST_VICSWR           ,Client VICSWR is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 12. " DHYST_VICSRD           ,Client VICSRD is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 7. "      DHYST_SDMMCWAB           ,Client SDMMCWAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 6. "      DHYST_SDMMCW           ,Client SDMMCW is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 5. " DHYST_SDMMCWAA         ,Client SDMMCWAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 4. "      DHYST_SDMMCWA            ,Client SDMMCWA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 3. "      DHYST_SDMMCRAB         ,Client SDMMCRAB is treated as an dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x0C 2. " DHYST_SDMMCR           ,Client SDMMCR is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 1. "      DHYST_SDMMCRAA           ,Client SDMMCRAA is treated as an dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x0C 0. "      DHYST_SDMCRA           ,Client SDMCRA is treated as an dynamic hysteresis client" "Disabled,Enabled"
line.long 0x10 "EMEM_ARB_DHYSTERESIS_4_0,Per-Client Hysteresis Settings"
bitfld.long 0x10 9. " DHYST_GPUSWR2          ,Client GPUSWR2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 8. "      DHYST_GPUSRD2            ,Client GPUSRD2 is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 7. "      DHYST_TSECSWRB         ,Client TSECWRB is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 6. " DHYST_TSECRDB          ,Client RSECRDB is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 5. "      DHYST_ETRW               ,Client ETRW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 4. "      DHYST_ETTR             ,Client ETTR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 3. " DHYST_AXIAPW           ,Client AXIAPW is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 2. "      DHYST_AXIAPR             ,Client AXIAPR is treated as a dynamic hysteresis client" "Disabled,Enabled"
bitfld.long 0x10 1. "      DHYST_SESWR            ,Client SESWR is treated as a dynamic hysteresis client" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x10 0. " DHYST_SESRD            ,Client SESRD is treated as a dynamic hysteresis client" "Disabled,Enabled"
group.long 0xBCC++0x03
line.long 0x00 "EMEM_ARB_DHYST_CTRL_0,Dynamic Hysteresis Logic Control Register"
bitfld.long 0x00 31. " DHYST_ENABLE           ,Dynamic hysteresis logic enable" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DHYST_BW_MON_INTERVAL    ,Dynamic hysteresis bandwidth monitor interval" "8 MCLK,16 MCLK,32 MCLK,64 MCLK"
group.long 0xBD0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_0_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 0"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_0      ,Timeout delay"
group.long 0xBD4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_1_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 1"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_1      ,Timeout delay"
group.long 0xBD8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_2_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 2"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_2      ,Timeout delay"
group.long 0xBDC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_3_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 3"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_3      ,Timeout delay"
group.long 0xBE0++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_4_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 4"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_4      ,Timeout delay"
group.long 0xBE4++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_5_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 5"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_5      ,Timeout delay"
group.long 0xBE8++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_6_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 6"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_6      ,Timeout delay"
group.long 0xBEC++0x03
line.long 0x00 "EMEM_ARB_DHYST_TIMEOUT_UTIL_7_0,Timeout Delay For Dynamic Hysteresis Hold-off Control 7"
hexmask.long.word 0x00 0.--11. 1. " DHYST_DELAY_BIN_7      ,Timeout delay"
textline " "
width 25.
group.long 0x9DC++0x03
line.long 0x00 "DA_CONFIG0_0,DA Configuration Register"
bitfld.long 0x00 0. " NEW_ARB_SCHEME        ,New DA arbitration scheme use enable" "Disabled,Enabled"
textline " "
group.long 0x4E0++0x03
line.long 0x00 "AHB_PTSA_MIN_0,AHB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AHB          ,DDA minimum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x54C++0x03
line.long 0x00 "AUD_PTSA_MIN_0,AUD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AUD          ,DDA minimum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x44C++0x03
line.long 0x00 "MLL_MPCORER_PTSA_RATE_0,MLL MPCORER PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MLL_MPCORER ,DDA rate for MLL_MPCORER PTSA"
group.long 0x440++0x03
line.long 0x00 "RING2_PTSA_RATE_0,RING2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING2       ,DDA rate for RING2 PTSA"
group.long 0x530++0x03
line.long 0x00 "USBD_PTSA_RATE_0,USBD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBD        ,DDA rate for USBD PTSA"
group.long 0x528++0x03
line.long 0x00 "USBX_PTSA_MIN_0,USBX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBX         ,DDA minimum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x534++0x03
line.long 0x00 "USBD_PTSA_MIN_0,USBD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_USBD         ,DDA minimum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F0++0x03
line.long 0x00 "APB_PTSA_MAX_0,APB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_APB          ,DDA maximum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x584++0x03
line.long 0x00 "JPG_PTSA_RATE_0,JPG PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_JPG         ,DDA rate for JPG PTSA"
group.long 0x420++0x03
line.long 0x00 "DIS_PTSA_MIN_0,DIS PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DIS          ,DDA minimum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4FC++0x03
line.long 0x00 "AVP_PTSA_MAX_0,AVP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AVP          ,DDA maximum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F4++0x03
line.long 0x00 "AVP_PTSA_RATE_0,AVP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AVP         ,DDA rate for AVP PTSA"
group.long 0x480++0x03
line.long 0x00 "RING1_PTSA_MIN_0,RING1 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING1        ,DDA minimum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x424++0x03
line.long 0x00 "DIS_PTSA_MAX_0,DIS PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DIS          ,DDA maximum value for direct client DIS PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D8++0x03
line.long 0x00 "SD_PTSA_MAX_0,SD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SD           ,DDA maximum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C4++0x03
line.long 0x00 "MSE_PTSA_RATE_0,MSE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_MSE         ,DDA rate for MSE PTSA"
group.long 0x558++0x03
line.long 0x00 "VICPC_PTSA_MIN_0,VICPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VICPC        ,DDA minimum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B4++0x03
line.long 0x00 "PCX_PTSA_MAX_0,PCX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_PCX          ,DDA maximum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A0++0x03
line.long 0x00 "ISP_PTSA_RATE_0,ISP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_ISP         ,DDA rate for ISP PTSA"
group.long 0x48C++0x03
line.long 0x00 "A9AVPPC_PTSA_MIN_0,A9AVPPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_A9AVPPC      ,DDA minimum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x448++0x03
line.long 0x00 "RING2_PTSA_MAX_0,RING2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING2        ,DDA maximum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x548++0x03
line.long 0x00 "AUD_PTSA_RATE_0,AUD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AUD         ,DDA rate for AUD PTSA"
group.long 0x51C++0x03
line.long 0x00 "HOST_PTSA_MIN_0,HOST PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HOST         ,DDA minimum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x454++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MAX_0,MLL_MPCORER PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MLL_MPCORER  ,DDA maximum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D4++0x03
line.long 0x00 "SD_PTSA_MIN_0,SD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SD           ,DDA minimum value for direct client SD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "RING1_PTSA_RATE_0,RING1 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_RING1       ,DDA rate for RING1 PTSA"
group.long 0x588++0x03
line.long 0x00 "JPG_PTSA_MIN_0,JPG PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_JPG          ,DDA minimum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x62C++0x03
line.long 0x00 "HDAPC_PTSA_MIN_0,HDAPC PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_HDAPC        ,DDA minimum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4F8++0x03
line.long 0x00 "AVP_PTSA_MIN_0,AVP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_AVP          ,DDA minimum value for direct client AVP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x58C++0x03
line.long 0x00 "JPG_PTSA_MAX_0,JPG PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_JPG          ,DDA maximum value for direct client JPG PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x43C++0x03
line.long 0x00 "VE_PTSA_MAX_0,VE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE           ,DDA maximum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x63C++0x03
line.long 0x00 "DFD_PTSA_MAX_0,DFD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DFD          ,DDA maximum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x554++0x03
line.long 0x00 "VICPC_PTSA_RATE_0,VICPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VICPC       ,DDA rate for VICPC PTSA"
group.long 0x544++0x03
line.long 0x00 "GK_PTSA_MAX_0,GK PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK           ,DDA maximum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x55C++0x03
line.long 0x00 "VICPC_PTSA_MAX_0,VICPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VICPC        ,DDA maximum value for direct client VICPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x624++0x03
line.long 0x00 "SDM_PTSA_MAX_0,SDM PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SDM          ,DDA maximum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4B8++0x03
line.long 0x00 "SAX_PTSA_RATE_0,SAX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SAX         ,DDA rate for SAX PTSA"
group.long 0x4B0++0x03
line.long 0x00 "PCX_PTSA_MIN_0,PCX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_PCX          ,DDA minimum value for direct client PCX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4EC++0x03
line.long 0x00 "APB_PTSA_MIN_0,APB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_APB          ,DDA minimum value for direct client APB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x614++0x03
line.long 0x00 "GK2_PTSA_MIN_0,GK2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK2          ,DDA minimum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4AC++0x03
line.long 0x00 "PCX_PTSA_RATE_0,PCX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_PCX         ,DDA rate for PCX PTSA"
group.long 0x484++0x03
line.long 0x00 "RING1_PTSA_MAX_0,RING1 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_RING1        ,DDA maximum value for direct client RING1 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x628++0x03
line.long 0x00 "HDAPC_PTSA_RATE_0,HDAPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HDAPC       ,DDA rate for HDAPC PTSA"
group.long 0x450++0x03
line.long 0x00 "MLL_MPCORER_PTSA_MIN_0,MLL_MPCORER PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MLL_MPCORER  ,DDA minimum value for direct client MLL_MPCORER PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x618++0x03
line.long 0x00 "GK2_PTSA_MAX_0,GK2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_GK2          ,DDA maximum value for direct client GK2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x550++0x03
line.long 0x00 "AUD_PTSA_MAX_0,AUD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AUD          ,DDA maximum value for direct client AUD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x610++0x03
line.long 0x00 "GK2_PTSA_RATE_0,GK2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK2         ,DDA rate for GK2 PTSA"
group.long 0x4A8++0x03
line.long 0x00 "ISP_PTSA_MAX_0,ISP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_ISP          ,DDA maximum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x428++0x03
line.long 0x00 "DISB_PTSA_RATE_0,DISB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DISB        ,DDA rate for DISB PTSA"
group.long 0x49C++0x03
line.long 0x00 "VE2_PTSA_MAX_0,VE2 PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_VE2          ,DDA maximum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x638++0x03
line.long 0x00 "DFD_PTSA_MIN_0,DFD PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DFD          ,DDA minimum value for direct client DFD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x50C++0x03
line.long 0x00 "FTOP_PTSA_RATE_0,FTOP PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_FTOP        ,DDA rate for FTOP PTSA"
group.long 0x488++0x03
line.long 0x00 "A9AVPPC_PTSA_RATE_0,A9AVPPC PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_A9AVPPC     ,DDA rate for A9AVPPC PTSA"
group.long 0x498++0x03
line.long 0x00 "VE2_PTSA_MIN_0,VE2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE2          ,DDA minimum value for direct client VE2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x52C++0x03
line.long 0x00 "USBX_PTSA_MAX_0,USBX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBX         ,DDA maximum value for direct client USBX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x41C++0x03
line.long 0x00 "DIS_PTSA_RATE_0,DIS PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DIS         ,DDA rate for DIS PTSA"
group.long 0x538++0x03
line.long 0x00 "USBD_PTSA_MAX_0,USBD PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_USBD         ,DDA maximum value for direct client USBD PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x490++0x03
line.long 0x00 "A9AVPPC_PTSA_MAX_0,A9AVPPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_A9AVPPC      ,DDA maximum value for direct client A9AVPPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x524++0x03
line.long 0x00 "USBX_PTSA_RATE_0,USBX PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_USBX        ,DDA rate for USBX PTSA"
group.long 0x514++0x03
line.long 0x00 "FTOP_PTSA_MAX_0,FTOP PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_FTOP         ,DDA maximum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x630++0x03
line.long 0x00 "HDAPC_PTSA_MAX_0,HDAPC PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HDAPC        ,DDA maximum value for direct client HDAPC PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4D0++0x03
line.long 0x00 "SD_PTSA_RATE_0,SD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SD          ,DDA rate for SD PTSA"
group.long 0x634++0x03
line.long 0x00 "DFD_PTSA_RATE_0,DFD PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_DFD         ,DDA rate for DFD PTSA"
group.long 0x510++0x03
line.long 0x00 "FTOP_PTSA_MIN_0,FTOP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_FTOP         ,DDA minimum value for direct client FTOP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x61C++0x03
line.long 0x00 "SDM_PTSA_RATE_0,SDM PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SDM         ,DDA rate for SDM PTSA"
group.long 0x4DC++0x03
line.long 0x00 "AHB_PTSA_RATE_0,AHB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_AHB         ,DDA rate for AHB PTSA"
group.long 0x460++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MAX_0,SMMU_SMMU PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SMMU_SMMU    ,DDA maximum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x444++0x03
line.long 0x00 "RING2_PTSA_MIN_0,RING2 PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_RING2        ,DDA minimum value for direct client RING2 PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x620++0x03
line.long 0x00 "SDM_PTSA_MIN_0,SDM PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SDM          ,DDA minimum value for direct client SDM PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4E8++0x03
line.long 0x00 "APB_PTSA_RATE_0,APB PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_APB         ,DDA rate for APB PTSA"
group.long 0x4C8++0x03
line.long 0x00 "MSE_PTSA_MIN_0,MSE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_MSE          ,DDA minimum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x518++0x03
line.long 0x00 "HOST_PTSA_RATE_0,HOST PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_HOST        ,DDA rate for HOST PTSA"
group.long 0x434++0x03
line.long 0x00 "VE_PTSA_RATE_0,VE PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE          ,DDA rate for VE PTSA"
group.long 0x4E4++0x03
line.long 0x00 "AHB_PTSA_MAX_0,AHB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_AHB          ,DDA maximum value for direct client AHB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4BC++0x03
line.long 0x00 "SAX_PTSA_MIN_0,SAX PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SAX          ,DDA minimum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x45C++0x03
line.long 0x00 "SMMU_SMMU_PTSA_MIN_0,SMMU_SMMU PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_SMMU_SMMU    ,DDA minimum value for direct client SMMU_SMMU PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4A4++0x03
line.long 0x00 "ISP_PTSA_MIN_0,ISP PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_ISP          ,DDA minimum value for direct client ISP PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x520++0x03
line.long 0x00 "HOST_PTSA_MAX_0,HOST PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_HOST         ,DDA maximum value for direct client HOST PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4C0++0x03
line.long 0x00 "SAX_PTSA_MAX_0,SAX PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_SAX          ,DDA maximum value for direct client SAX PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x438++0x03
line.long 0x00 "VE_PTSA_MIN_0,VE PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_VE           ,DDA minimum value for direct client VE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x540++0x03
line.long 0x00 "GK_PTSA_MIN_0,GK PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_GK           ,DDA minimum value for direct client GK PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x4CC++0x03
line.long 0x00 "MSE_PTSA_MAX_0,MSE PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_MSE          ,DDA maximum value for direct client MSE PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x430++0x03
line.long 0x00 "DISB_PTSA_MAX_0,DISB PTSA Maximum Value"
bitfld.long 0x00 0.--5. " PTSA_MAX_DISB         ,DDA maximum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x42C++0x03
line.long 0x00 "DISB_PTSA_MIN_0,DISB PTSA Minimum Value"
bitfld.long 0x00 0.--5. " PTSA_MIN_DISB         ,DDA minimum value for direct client DISB PTSA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x458++0x03
line.long 0x00 "SMMU_SMMU_PTSA_RATE_0,SMMU_SMMU PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_SMMU_SMMU   ,DDA rate for SMMU_SMMU PTSA"
group.long 0x494++0x03
line.long 0x00 "VE2_PTSA_RATE_0,VE2 PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_VE2         ,DDA rate for VE2 PTSA"
group.long 0x53C++0x03
line.long 0x00 "GK_PTSA_RATE_0,GK PTSA Rate"
hexmask.long.word 0x00 0.--11. 1. " PTSA_RATE_GK          ,DDA rate for GK PTSA"
textline " "
group.long 0x960++0x03
line.long 0x00 "PTSA_GRANT_DECREMENT_0,PTSA Grant Decrement Register"
bitfld.long 0x00 12. " PTSA_GRANT_DECREMENT_INT ,Integer portion" "0,1"
hexmask.long.word 0x00 0.--11. 1. "     PTSA_GRANT_DECREMENT_FRAC ,Fractional portion"
textline " "
width 39.
group.long 0x2E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AVPC_0_0,Latency Allowance Settings For AVPC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AVPCARM7W              ,Number of ticks a request from AVPCARM7W may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AVPCARM7R              ,Number of ticks a request from AVPCARM7R may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AXIAP_0_0,Latency Allowance Settings For AXIAP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AXIAPW                 ,Number of ticks a request from AXIAPW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AXIAPR                 ,Number of ticks a request from AXIAPR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x380++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_1_0,Latency Allowance Settings For XUSB_DEV Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_DEVW              ,Number of ticks a request from XUSB_DEVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_DEVR              ,Number of ticks a request from XUSB_DEVR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x384++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_0_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRAB                 ,Number of ticks a request from ISPRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3BC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAA_0_0,Latency Allowance Settings For SDMMC2A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAA               ,Number of ticks a request from SDMMCWAA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMWRAA               ,Number of ticks a request from SDMMCRAA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3B8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCA_0_0,Latency Allowance Settings For SDMMC1A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWA                ,Number of ticks a request from SDMMCWA may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRA                ,Number of ticks a request from SDMMCRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x370++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_0_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_ISPRA                  ,Number of ticks a request from ISPRA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SE_0_0,Latency Allowance Settings For SE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SESWR                  ,Number of ticks a request from SESWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SESRD                  ,Number of ticks a request from SESRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x374++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2_1_0,Latency Allowance Settings For ISP2 Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWB                  ,Number of ticks a request from ISPWB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWA                  ,Number of ticks a request from ISPWA may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_0_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0B              ,Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0A              ,Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x394++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VIC_0_0,Latency Allowance Settings For VIC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_VICSWR                 ,Number of ticks a request from VICSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_VICSRD                 ,Number of ticks a request from VICSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_1_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0CB             ,Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3D8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVDEC_0_0,Latency Allowance Settings For NVDEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVDECSWR               ,Number of ticks a request from NVDECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVDECSRD               ,Number of ticks a request from NVDECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2FC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_2_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYHCB             ,Number of ticks a request from DISPLAYHCB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x390++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSEC_0_0,Latency Allowance Settings For TSEC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWR                ,Number of ticks a request from TSECSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRD                ,Number of ticks a request from TSECSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_2_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAYT               ,Number of ticks a request from DISPLAYT may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAYHC              ,Number of ticks a request from DISPLAYHC may wait in the EMEM arbiter before becoming high priority request"
group.long 0x694++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0,Scaled Latency Allowance Settings For DISPLAY0AB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0AB ,(Hi) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0AB ,(Lo) Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x348++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_1_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVW            ,Number of ticks a request from PPCSAHBSLVW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAW            ,Number of ticks a request from PPCSSAHBDMAW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x37C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_XUSB_0_0,Latency Allowance Settings For XUSB_HOST Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_XUSB_HOSTW             ,Number of ticks a request from XUSB_HOSTW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_XUSB_HOSTR             ,Number of ticks a request from XUSB_HOSTR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x344++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PPCS_0_0,Latency Allowance Settings For PPCS Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_PPCSAHBSLVR            ,Number of ticks a request from PPCSAHBSLVR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_PPCSAHBDMAR            ,Number of ticks a request from PPCSAHBDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3F0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_TSECB_0_0,Latency Allowance Settings For TSECB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_TSECSWRB               ,Number of ticks a request from TSECSWRB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_TSECSRDB               ,Number of ticks a request from TSECSRDB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2E0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_AFI_0_0,Latency Allowance Settings For AFI Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_AFIW                   ,Number of ticks a request from AFIW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_AFIR                   ,Number of ticks a request from AFIR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x698++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0,Latency Allowance Settings For DISPLAY0B"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0B  ,(Hi) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0B  ,(Lo) Number of ticks a request from DISPLAY0B may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_1_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAY0C              ,Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3DC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_APE_0_0,Latency Allowance Settings For APE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_APEW                   ,Number of ticks a request from APEW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_APER                   ,Number of ticks a request from APER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A0++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0,Latency Allowance Settings For DISPLAY0C"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0C  ,(Hi) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0C  ,(Lo) Number of ticks a request from DISPLAY0C may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3A4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_A9AVP_0_0,Latency Allowance Settings For A9AVP Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_A9AVPSCW               ,Number of ticks a request from A9AVPSCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_A9AVPSCR               ,Number of ticks a request from A9AVPSCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU2_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR2                ,Number of ticks a request from GPUSWR2 may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD2                ,Number of ticks a request from GPUSRD2 may wait in the EMEM arbiter before becoming high priority request"
group.long 0x2F4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DCB_0_0,Latency Allowance Settings For DCB Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_DISPLAY0BB             ,Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_DISPLAY0AB             ,Number of ticks a request from DISPLAY0AB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x314++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_1_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_HOST1XW                ,Number of ticks a request from HOST1XW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C0++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMC_0_0,Latency Allowance Settings For SDMMC3A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCW                 ,Number of ticks a request from SDMMCW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCR                 ,Number of ticks a request from SDMMCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3E4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVJPG_0_0,Latency Allowance Settings For NVJPG Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVJPGSWR               ,Number of ticks a request from NVJPGSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVJPGSRD               ,Number of ticks a request from NVJPGSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x34C++0x03
line.long 0x00 "LATENCY_ALLOWANCE_PTC_0_0,Latency Allowance Settings For PTC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_PTCR                   ,Number of ticks a request from PTCR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3EC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ETR_0_0,Latency Allowance Settings For ETR Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ETRW                   ,Number of ticks a request from ETRW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ETRR                   ,Number of ticks a request from ETRR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x320++0x03
line.long 0x00 "LATENCY_ALLOWANCE_MPCORE_0_0,Latency Allowance Settings For MPCORE Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_MPCOREW                ,Number of ticks a request from MPCOREW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_MPCORER                ,Number of ticks a request from MPCORER may wait in the EMEM arbiter before becoming high priority request"
group.long 0x398++0x03
line.long 0x00 "LATENCY_ALLOWANCE_VI2_0_0,Latency Allowance Settings For VI Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_VIW                    ,Number of ticks a request from VIW may wait in the EMEM arbiter before becoming high priority request"
group.long 0x69C++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0,Latency Allowance Settings For DISPLAY0BB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0BB ,(Hi) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0BB ,(Lo) Number of ticks a request from DISPLAY0BB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x6A4++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0,Latency Allowance Settings For DISPLAY0CB"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0CB ,(Hi) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0CB ,(Lo) Number of ticks a request from DISPLAY0CB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x350++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SATA_0_0,Latency Allowance Settings For SATA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SATAW                  ,Number of ticks a request from SATAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SATAR                  ,Number of ticks a request from SATAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x690++0x03
line.long 0x00 "SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0,Latency Allowance Settings For DISPLAY0A"
hexmask.long.byte 0x00 16.--23. 1. " SCALED_2_ALLOWANCE_HI_DISPLAY0A  ,(Hi) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  SCALED_2_ALLOWANCE_LO_DISPLAY0A  ,(Lo) Number of ticks a request from DISPLAY0A may wait in the EMEM arbiter before becoming high priority request"
group.long 0x310++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HC_0_0,Latency Allowance Settings For HC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HOST1XR                ,Number of ticks a request from HOST1XR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HOST1XDMAR             ,Number of ticks a request from HOST1XDMAR may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C8++0x03
line.long 0x00 "LATENCY_ALLOWANCE_DC_3_0,Latency Allowance Settings For DC Clients"
hexmask.long.byte 0x00 0.--7. 1. " ALLOWANCE_DISPLAYD               ,Number of ticks a request from DISPLAYD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3AC++0x03
line.long 0x00 "LATENCY_ALLOWANCE_GPU_0_0,Latency Allowance Settings For GPU Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_GPUSWR                 ,Number of ticks a request from GPUSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_GPUSRD                 ,Number of ticks a request from GPUSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x3C4++0x03
line.long 0x00 "LATENCY_ALLOWANCE_SDMMCAB_0_0,Latency Allowance Settings For SDNNC4A Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_SDMMCWAB               ,Number of ticks a request from SDMMCWAB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_SDMMCRAB               ,Number of ticks a request from SDMMCRAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x388++0x03
line.long 0x00 "LATENCY_ALLOWANCE_ISP2B_1_0,Latency Allowance Settings For ISP2B Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_ISPWBB                 ,Number of ticks a request from ISPWBB may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_ISPWAB                 ,Number of ticks a request from ISPWAB may wait in the EMEM arbiter before becoming high priority request"
group.long 0x328++0x03
line.long 0x00 "LATENCY_ALLOWANCE_NVENC_0_0,Latency Allowance Settings For NVENC Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_NVENCSWR               ,Number of ticks a request from NVENCSWR may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_NVENCSRD               ,Number of ticks a request from NVENCSRD may wait in the EMEM arbiter before becoming high priority request"
group.long 0x318++0x03
line.long 0x00 "LATENCY_ALLOWANCE_HDA_0_0,Latency Allowance Settings For HDA Clients"
hexmask.long.byte 0x00 16.--23. 1. " ALLOWANCE_HDAW                   ,Number of ticks a request from HDAW may wait in the EMEM arbiter before becoming high priority request"
hexmask.long.byte 0x00 0.--7. 1. "  ALLOWANCE_HDAR                   ,Number of ticks a request from HDAR may wait in the EMEM arbiter before becoming high priority request"
endif
width 0x0B
tree.end
tree "EMCB"
base ad:0x02C60000
width 21.
group.long 0x00++0x13
line.long 0x00 "INSTATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT           ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  ECC_ERR_BUF_OVF_INT              ,ECC Error Buffer overflow" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 11. "   ECC_CORR_ERR_INT              ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  ECC_UNCORR_ERR_INT               ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt"
textline "                            "
textfld "  "
endif
eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT          ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt"
eventfld.long 0x00 8. "  CCFIFO_OVERFLOW_INT              ,Clock change FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 7. "   DLL_ALARM_INT                ,Indicate DLL alarm has been set" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 6. "   ACCESS_TO_SR_DPD_DEV_INT      ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt"
eventfld.long 0x00 5. "  MRR_DIVLD_INT                    ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt"
eventfld.long 0x00 4. "   CLKCHANGE_COMPLETE_INT       ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 3. "   REFRESH_OVERFLOW_INT          ,Refresh request overflow timeout" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK       ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "      ECC_ERR_BUF_OVF_INTMASK          ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 11. "   ECC_CORR_ERR_INTMASK          ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "      ECC_UNCORR_ERR_INTMASK           ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                            "
textfld "  "
endif
bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK      ,Mask for DLL lock timeout interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "      CCFIFO_OVERFLOW_INTMASK          ,Mask for clock change FIFO overflow" "Masked,Unmasked"
bitfld.long 0x04 7. "       DLL_ALARM_INTMASK            ,Indicate DLL alarm has been set" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 6. "   ACCESS_TO_SR_DPD_DEV_INTMASK  ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
bitfld.long 0x04 5. "      MRR_DIVLD_INTMASK                ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "       CLKCHANGE_COMPLETE_INTMASK   ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 3. "   REFRESH_OVERFLOW_INTMASK      ,Mask for refresh request overflow timeout" "Masked,Unmasked"
line.long 0x08 "DBG_0,Debug Register"
bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP           ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled"
bitfld.long 0x08 30. "      WRITE_ACTIVE_ONLY                ,Write active version of the register only" "Disabled,Enabled"
bitfld.long 0x08 29. "       ALLOW_HOSTIF_DURING_CCFIFO   ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 28. "   ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled"
bitfld.long 0x08 26.--27. "      CFG_SWAP                         ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..."
bitfld.long 0x08 25. "  AUTOCAL_ALLOW_WRITE_MUX      ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24. "   CFG_PRIORITY                  ,Priority of cfg accesses to the DRAM" "Disabled,Enabled"
bitfld.long 0x08 13. "      SUPPRESS_WRITE_CMD               ,Suppress write command sent to DRAM" "Disabled,Enabled"
bitfld.long 0x08 12. "       SUPPRESS_READ_CMD            ,Suppress read command sent to DRAM" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 11. "   STRETCH_MRW_RESET             ,Stretch MRW RESET command to three clocks" "Disabled,Enabled"
bitfld.long 0x08 10. "      AP_REQ_BUSY_CTRL                 ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled"
bitfld.long 0x08 9. "       READ_DQM_CTRL                ,DQM signal control" "Managed,Always on"
textline "                            "
bitfld.long 0x08 2. "   FORCE_UPDATE                  ,Active state update enable" "Disabled,Enabled"
bitfld.long 0x08 1. "      WRITE_MUX                        ,Controls state of the writes to the configuration registers" "Assembly,Active"
bitfld.long 0x08 0. "       READ_MUX                     ,Controls state of the reads to the configuration registers" "Active,Assembly"
line.long 0x0C "CFG_0,Configuration Register"
bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD               ,DRAM clock stop (power down)" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DRAM_CLKSTOP_SR                  ,DRAM clock stop (self-refresh)" "Disabled,Enabled"
bitfld.long 0x0C 29. "       DRAM_ACPD                    ,Opportunistic active power down for DRAM controller" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 28. "   DYN_SELF_REF                  ,DYN_SELF_REF" "Disabled,Enabled"
bitfld.long 0x0C 26. "      REQACT_ASYNC                     ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled"
bitfld.long 0x0C 25. "       AUTO_PRE_WR                  ,MC auto-precharge indication for writes" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 24. "   AUTO_PRE_RD                   ,MC auto-precharge indication for reads" "Disabled,Enabled"
bitfld.long 0x0C 23. "      MAN_PRE_WR                       ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled"
bitfld.long 0x0C 22. "       MAN_PRE_RD                   ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 21. "   PERIODIC_QRST                 ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. "      WAIT_FOR_NVDISPLAY_READY_B4_CC   ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 18. "   DSR_VTTGEN_DRV_EN             ,Enable VTTGEN controls during DSR" "Disabled,Enabled"
bitfld.long 0x0C 16.--17. "      EMC2MC_CLK_RATIO                 ,EMC to MC clock ratio" "2x,1x,4x,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 9. "             WAIT_FOR_ISP2B_READY_B4_CC   ,Wait for isp2b ready event" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 8. "   WAIT_FOR_VI2_READY_B4_CC      ,Wait for vi2 ready event" "Disabled,Enabled"
bitfld.long 0x0C 7. "      WAIT_FOR_ISP2_B4_CC              ,Wait for isp2 ready event" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 6. "   INVERT_DQM                    ,Invert DQM polarity" "Not inverted,Inverted"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 5. "  WAIT_FOR_DISPLAYB_READY_B4_CC    ,Wait for display ready event" "Disabled,Enabled"
bitfld.long 0x0C 4. "       WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled"
endif
line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]"
bitfld.long 0x10 0. " EMEM_NUMDEV                   ,Number of populated DRAM devises" "N1,N2"
group.long 0x20++0x07
line.long 0x00 "REFCTRL_0,Refresh Control Register"
bitfld.long 0x00 31. " REF_VALID                     ,Enable refresh controller" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DEVICE_REFRESH_DISABLE           ,Refresh disable to individual attached device" "0,1,2,3"
line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins"
bitfld.long 0x04 17. " PIN_GPIO_EN[1]                ,General purpose DRAM I/O[1] enable" "Disabled,Enabled"
bitfld.long 0x04 16. "      PIN_GPIO_EN[0]                   ,General purpose DRAM I/O[0] enable" "Disabled,Enabled"
bitfld.long 0x04 13. "       PIN_GPIO[1]                  ,General purpose DRAM I/O[1] activate" "Inactive,Active"
textline "                            "
bitfld.long 0x04 12. "   PIN_GPIO[0]                   ,General purpose DRAM I/O[0] activate" "Inactive,Active"
bitfld.long 0x04 8. "      PIN_RESET                        ,DDR3 RESET# pin level" "Active,Inactive"
bitfld.long 0x04 4. "       PIN_DQM                      ,Used to always mask DRAM writes" "Normal,Inactive"
textline "                            "
bitfld.long 0x04 2. "   PIN_CKE_PER_DEV               ,Per device CKE enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      PIN_CKEB                         ,Level of the CKEB pin" "Power down,Normal"
bitfld.long 0x04 0. "     PIN_CKE                      ,Level of the CKE pin" "Power down,Normal"
textline "                            "
group.long 0x28++0x93
line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers"
bitfld.long 0x00 0. " TIMING_UPDATE             ,Timing update event" "Disabled,Enabled"
line.long 0x04 "RC_0,DRAM RC Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RC                        ,Row cycle time"
line.long 0x08 "RFC_0,DRAM RFC Timing Parameter"
hexmask.long.word 0x08 0.--9. 1. " RFC                       ,Auto refresh cycle time"
line.long 0x0C "RAS_0,DRAM RAS Timing Parameter"
bitfld.long 0x0C 0.--5. " RAS                       ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "RP_0,DRAM RP Timing Parameter"
bitfld.long 0x10 0.--5. " RP                        ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "R2W_0,DRAM R2W Timing Parameter"
bitfld.long 0x14 0.--5. " R2W                       ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "W2R_0,DRAM W2R Timing Parameter"
bitfld.long 0x18 0.--5. " W2R                       ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "R2P_0,DRAM R2P Timing Parameter"
bitfld.long 0x1C 0.--5. " R2P                       ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "W2P_0,DRAM W2P Timing Parameter"
hexmask.long.byte 0x20 0.--6. 1. " W2P                       ,Write to precharge commands for the same bank number of cycles"
line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter"
bitfld.long 0x24 0.--5. " RD_RCD                    ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter"
bitfld.long 0x28 0.--5. " WR_RCD                    ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x2C "RRD_0,DRAM RRD Timing Parameter"
bitfld.long 0x2C 0.--4. " RRD                       ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "REXT_0,DRAM REXT Timing Parameter"
bitfld.long 0x30 0.--4. " REXT                      ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x34 "WDV_0,DRAM WDV Timing Parameter"
bitfld.long 0x34 0.--5. " WDV                       ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..."
line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter"
bitfld.long 0x38 0.--5. " QUSE                      ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "QRST_0,DRAM QRST Timing Parameter"
bitfld.long 0x3C 16.--20. " QRST_DURATION             ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x3C 0.--6. 1. "      QRST                   ,Time from expiration of QSAFE until reset is issued"
line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter"
hexmask.long.byte 0x40 0.--6. 1. " QSAFE                     ,Time from a read command to when it is safe to issue a QRST"
line.long 0x44 "RDV_0,DRAM RDV Timing Parameter"
hexmask.long.byte 0x44 0.--6. 1. " RDV                       ,Time from read command to latching the read data from the pad macros"
line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter"
hexmask.long.word 0x48 6.--15. 1. " REFRESH                   ,Interval between refresh requests"
bitfld.long 0x48 0.--5. "           REFRESH_LO             ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count"
bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM         ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..."
line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter"
bitfld.long 0x50 0.--5. " PDEX2WR                   ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter"
bitfld.long 0x54 0.--5. " PDEX2RD                   ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter"
bitfld.long 0x58 0.--5. " PCHG2PDEN                 ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter"
bitfld.long 0x5C 0.--5. " ACT2PDEN                  ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter"
hexmask.long.word 0x60 0.--8. 1. " AR2PDEN                   ,Timing delay from an autorefresh command to power down entry"
line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter"
hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN                   ,Timing delay from a read/write command to power down entry"
line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter"
hexmask.long.word 0x68 0.--9. 1. " TXSR                      ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL"
line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter"
bitfld.long 0x6C 0.--5. " TCKE                      ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter"
hexmask.long.byte 0x70 0.--6. 1. " TFAW                      ,Width of the FAW for 8-bank devices"
line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter"
bitfld.long 0x74 0.--5. " TRPAB                     ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter"
hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE                ,Minimum number of cycles of a stable clock period"
line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter"
bitfld.long 0x7C 0.--4. " TCLKSTOP                  ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter"
hexmask.long.word 0x80 0.--13. 1. " TREFBW                    ,Width of the burst-refresh window"
line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter"
bitfld.long 0x84 0.--3. " TPPD                      ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x88 "ODT_WRITE_0,ODT Write Control"
bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE   ,ODT enable during write" "Disabled,Enabled"
bitfld.long 0x88 8.--11. "       ODT_WR_DURATION        ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x88 5. "        SHARE_ONE_ODT                        ,Share one ODT" "Disabled,Enabled"
textline "                            "
bitfld.long 0x88 4. "   DRIVE_BOTH_ODT            ,ODTs' assertion for the requested or both devices" "Requested,Both"
bitfld.long 0x88 0.--3. "      ODT_WR_DELAY           ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter"
hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR                  ,Precharge-precharge delay"
line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter"
bitfld.long 0x90 0.--4. " WEXT                      ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0xBC++0x03
line.long 0x00 "TRTM_0,TRTM Timing Parameter"
hexmask.long.byte 0x00 0.--6. 1. " TRTM                      ,Read to MRW delay"
group.long 0xF8++0x07
line.long 0x00 "TWTM_0,TWTM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWTM                      ,Read to MRW/MRR delay"
line.long 0x04 "TRATM_0,TRATM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TRATM                     ,Read with AP to MRW/MRR delay"
group.long 0x108++0x07
line.long 0x00 "TWATM_0,TWATM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWATM                     ,Read with AP to MRW/MRR delay"
line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR2REF                    ,Read to refresh delay"
endif
group.long 0xC0++0x03
line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter"
hexmask.long.word 0x00 0.--8. 1. " RFS_SLR                   ,Stagger refresh cycle time between ranks"
group.long 0xC4++0x1B
line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT         ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command"
hexmask.long.word 0x00 0.--9. 1. "           MRS_EXT1_WAIT_CNT      ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command"
line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT         ,Number of EMC clocks to wait [MRS long command]"
hexmask.long.word 0x04 0.--9. 1. "           MRS_SHORT_WAIT_CNT     ,Number of EMC clocks to wait [MRS short command]"
line.long 0x08 "MRS_0,Command Trigger For MRS"
bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "   USE_MRS_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   MRS_BA                    ,Registers to be addressed in DRAM" "MRS,?..."
hexmask.long.word 0x08 0.--13. 1. "            MRS_ADR                ,Mode-register data to be written"
line.long 0x0C "EMRS_0,Command Trigger For EMRS"
bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "   USE_EMRS_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS_BA                   ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS_ADR               ,Mode-register data to be written"
line.long 0x10 "REF_0,Command Trigger For Refresh"
bitfld.long 0x10 30.--31. " REF_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
hexmask.long.word 0x10 8.--18. 1. "   REF_NUM                ,Number of refresh cycles (REF_NUM+1)"
textline "                            "
bitfld.long 0x10 1. "   REF_NORMAL                ,Refresh execution mechanism" "Immediate,Normal"
bitfld.long 0x10 0. "      REF_CMD                ,Refresh to all DRAM banks" "Disabled,Enabled"
line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL"
bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x14 0. "   PRE_CMD                ,PRECHARGE to all DRAM banks" "Disabled,Enabled"
line.long 0x18 "NOP_0,Command Trigger For NOP"
bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x18 0. "   NOP_CMD                ,NOP to all DRAM banks" "Disabled,Enabled"
if ((per.l(ad:0x02C60000+0xE0)&0x1)==0x1)
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 8. "   ACTIVE_SELF_REF        ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High"
bitfld.long 0x00 0. "      SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
else
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 0. "                                    SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
endif
group.long 0xE4++0x13
line.long 0x00 "DPD_0,Command Trigger For DPD"
bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x00 0. "   DPD_CMD                ,Issue a deep power down command" "Disabled,Enabled"
line.long 0x04 "MRW_0,Command Trigger For MRW"
bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x04 26.--27. "   USE_MRW_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x04 16.--23. 0x01 "   MRW_MA                    ,Register address"
hexmask.long.byte 0x04 0.--7. 1. "             MRW_OP                 ,Data to be written"
line.long 0x08 "MRR_0,Command Trigger For MRR"
bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN           ,Active-low chip-select" "Illegal,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "        USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x08 16.--23. 0x01 "   MRR_MA                    ,Register address"
hexmask.long.word 0x08 0.--15. 1. "             MRR_OP                 ,Data returned"
line.long 0x0C "CMDQ_0,Command QUEUE Depth Register"
bitfld.long 0x0C 24.--28. " RW_WD_DEPTH               ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--14. "             PRE_DEPTH              ,Pre depth" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x0C 8.--10. "   ACT_DEPTH                 ,Act depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--4. "              RW_DEPTH               ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register"
bitfld.long 0x10 24.--27. " MCWD_DEPTH                ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--10. "             MCACT_DEPTH            ,MCACT depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "         MCREQ_DEPTH                          ,MCREQ depth" "0,1,2,3,4,5,6,7"
group.long 0x100++0x07
line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register"
hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3          ,Config FBIO spare 3"
hexmask.long.byte 0x00 16.--23. 1. "             CFG_FBIO_SPARE_2       ,Config FBIO spare 2"
hexmask.long.byte 0x00 8.--15. 1. "        CFG_FBIO_SPARE_1                     ,Config FBIO spare 1"
textline "                            "
hexmask.long.byte 0x00 2.--7. 1. "   CFG_FBIO_SPARE_0          ,Config FBIO spare 0"
bitfld.long 0x00 1. "             CFG_ADR_EN             ,Write once after powering up EMC" "Disabled,Enabled"
bitfld.long 0x00 0. "  CFG_SWAP_DLL                         ,Config swap DLL" "0,1"
line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register"
bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO   ,Drive data bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 30. "       DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 28. "  MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. "   CMD_BUS_RETURN_TO_ZERO    ,Drive command bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 26. "       CMD_BUS_RETURN_TO_ONE  ,Drives the command bus back to a one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 25. "  LPDDR3_DRAM                          ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 24. "   LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "       ERR_RD_BUBBLE          ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x04 13.--15. "   EMC2PMACRO_CFG_QUSE_MODE  ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..."
bitfld.long 0x04 12. "  CMD_2T_TIMING          ,2T command timing" "Disabled,Enabled"
bitfld.long 0x04 10. "  DISABLE_CONCURRENT_AUTOPRE           ,Disable reads/writes to a device until precharge command" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 8. "   CMD_TX_EN                 ,Controls TX_EN on the command bricks" "No,Yes"
bitfld.long 0x04 4. "            DRAM_                  ,DRAM width" "X32,X64"
bitfld.long 0x04 2.--3. "       DRAM_BURST                           ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16"
textline "                            "
bitfld.long 0x04 0.--1. "   DRAM_TYPE                 ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2"
sif (cpuis("TEGRAX2"))
group.long 0x110++0x07
line.long 0x00 "ACT_0,Command Trigger: Act"
bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN        ,Active low chip-select" "0,1,2,3"
bitfld.long 0x00 23.--25. "              SW_ACT_BANK            ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--15. 1. "         SW_ACT_ROW                           ,Row number to be activated"
line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done"
bitfld.long 0x04 0. " MEM_INIT_DONE             ,This bit is set by boot sequence when DRAM initiation is done" "0,1"
endif
group.long 0x114++0x0B
line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register"
bitfld.long 0x00 0.--2. " CFG_QUSE_LATE             ,FBIO configuration register" "0,1,2,3,4,5,6,7"
line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter"
bitfld.long 0x04 0.--5. " PDEX2CKE                  ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter"
bitfld.long 0x08 0.--5. " CKE2PDEN                  ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hgroup.long 0x120++0x03
hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved"
group.long 0x124++0x1F
line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD"
hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD            ,Number of idle cycles to wait before allowing power-down entry"
line.long 0x04 "MPC_0,MPC CMD (LP4 Only)"
bitfld.long 0x04 30.--31. " MPC_DEV                   ,SELECTN" "0,1,2,3"
bitfld.long 0x04 26.--27. "              MPC_SUBP_SELECTN       ,Active-low subchannel select" "Both,Subp1,Subp0,?..."
bitfld.long 0x04 9. "     MPC_WR                               ,Send CAS2 (required for FIFO WR)" "Not send,Send"
textline "                            "
bitfld.long 0x04 8. "   MPC_RD                    ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send"
bitfld.long 0x04 7. "       MPC_CAS2               ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send"
hexmask.long.byte 0x04 0.--6. 1. "  MPC_OP                               ,MPC OP code"
line.long 0x08 "EMRS2_0,EMRS2 Command Trigger"
bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "           USE_EMRS2_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   EMRS2_BA                  ,EMRS2 BA" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x08 0.--13. 1. "          EMRS2_ADR              ,Mode register data to be written"
line.long 0x0C "EMRS3_0,EMRS3 Command Trigger"
bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "           USE_EMRS3_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS3_BA                  ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS3_ADR              ,Mode register data to be written"
line.long 0x10 "MRW2_0,MRW2 Command Trigger"
bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x10 26.--27. "           USE_MRW2_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x10 16.--23. 0x01 "   MRW2_MA                   ,Register address"
hexmask.long.byte 0x10 0.--7. 1. "             MRW2_OP                ,Data to be written"
line.long 0x14 "MRW3_0,MRW3 Command Trigger"
bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x14 26.--27. "           USE_MRR_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x14 16.--23. 0x01 "   MRW3_MA                   ,Register address"
hexmask.long.byte 0x14 0.--7. 1. "             MRW3_OP                ,Data to be written"
line.long 0x18 "MRW4_0,MRW4 Command Trigger"
bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x18 26.--27. "           USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x18 16.--23. 0x01 "   MRW4_MA                   ,Register address"
hexmask.long.byte 0x18 0.--7. 1. "             MRW4_OP                ,Data to be written"
line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register"
bitfld.long 0x1C 31. " OBS_BUS_CLKEN             ,OBS bus clock enable" "Disabled,Enabled"
bitfld.long 0x1C 8. "       PAD_CONFIG_OVR         ,Pad config override" "Disabled,Enabled"
bitfld.long 0x1C 7. "  TR_CLKEN_OVR                         ,TR clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 6. "   STATS_CLKEN_OVR           ,Stats clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 3. "       RR_CLKEN_OVR           ,RR clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 2. "  DRAMC_CLKEN_OVR                      ,DRAMC clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 1. "   CMDQ_CLKEN_OVR            ,CMDQ clock enable override" "Disabled,Enabled"
group.long 0x144++0x1B
line.long 0x00 "R2R_0,R2R_0 Timing Parameter"
bitfld.long 0x00 0.--3. " R2R                       ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter"
bitfld.long 0x04 0.--3. " W2W                       ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter"
bitfld.long 0x08 0.--5. " EINPUT                    ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter"
bitfld.long 0x0C 0.--5. " EINPUT_DURATION           ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter"
bitfld.long 0x10 0.--5. " RXTERM                    ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter"
bitfld.long 0x14 0.--5. " TCKESR                    ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "TPD_0,TPD_0 Timing Parameter"
bitfld.long 0x18 0.--5. " TPD                       ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
width 23.
group.long 0x2A4++0x07
line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads"
rbitfld.long 0x00 31. " AUTO_CAL_START                             ,Starts a complete autocal cycle with measure FSM" "Not started,Started"
bitfld.long 0x00 30. "            AUTO_CAL_COMP_PAD_FLIP                     ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE                            ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled"
bitfld.long 0x00 25.--28. "               AUTO_CAL_NUM_SAMPLES                       ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK                        ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled"
bitfld.long 0x00 19.--23. "               AUTO_CAL_WAIT_AFTER_EN                     ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                              ,Autocal measure step interval" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 11.--15. "                      AUTO_CAL_UPDATE_DELAY                      ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL                      ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled"
bitfld.long 0x00 9. "               AUTO_CAL_MEASURE_STALL                     ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 7. "               AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START                      ,Triggers an autocal update FSM cycle" "Disabled,Enabled"
rbitfld.long 0x00 1. "               AUTO_CAL_TRANSFER_START                    ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START                     ,Triggers an autocal compute FSM cycle" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval"
hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL                          ,Calibration interval value"
rgroup.long 0x2AC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN                       ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF0_DRVUP                       ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1"
bitfld.long 0x00 8. "                      AUTO_CAL_PU_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_ACTIVE                            ,Autocal activity status" "Inactive,Active"
bitfld.long 0x00 3. "               AUTO_CAL_UPDATE_ACTIVE                     ,Autocal update activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE                   ,Autocal transfer activity status" "Inactive,Active"
bitfld.long 0x00 1. "               AUTO_CAL_COMPUTE_ACTIVE                    ,Autocal compute activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE                    ,Autocal measure activity status" "Inactive,Active"
sif (cpuis("TEGRAX2"))
endif
group.long 0x2B0++0x03
line.long 0x00 "REQ_CTRL_0,Request Status/Control"
bitfld.long 0x00 1. " STALL_ALL_WRITES                           ,Stall incoming write transactions" "Allow,Stall"
bitfld.long 0x00 0. "                  STALL_ALL_READS                            ,Stall incoming read transactions" "Allow,Stall"
rgroup.long 0x2B4++0x03
line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status"
bitfld.long 0x00 27. " ACPD_FSM_IDLE[1]                           ,Device[1] power-down FSM is idle" "No,Yes"
bitfld.long 0x00 26. "                    ACPD_FSM_IDLE[0]                           ,Device[0] power-down FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 25. " DSR_FSM_IDLE[1]                            ,Device[1] dynamic self refresh FSM is idle" "No,Yes"
bitfld.long 0x00 24. "                    DSR_FSM_IDLE[0]                            ,Device[0] dynamic self refresh FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 23. " TIMING_UPDATE_STALLED                      ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed"
bitfld.long 0x00 22. "          ZQ_FSM_IDLE                                ,Indicate auto ZQ state machine is idle" "Not idle,Idle"
textline "                                "
bitfld.long 0x00 21. " CFG_ZQ_ACTIVE                              ,Indicates ZQ configuration access is active" "Not active,Active"
bitfld.long 0x00 20. "             MRR_DIVLD                                  ,MRR data available for reading" "Not available,Available"
textline "                                "
bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE                             ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13. "                     DRAM_IN_DPD_DEV[1]                         ,Device[1] in deep powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0]                         ,Device[0] in deep powerdown state" "No,Yes"
bitfld.long 0x00 11. "                    DRAM_IN_ACTIVE_SELF_REFRESH[1]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
bitfld.long 0x00 9. "                    DRAM_IN_SELF_REFRESH_DEV[1]                ,Device[1] in active self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0]                ,Device[0] in active self-refresh" "No,Yes"
bitfld.long 0x00 5. "                    DRAM_IN_POWERDOWN_DEV[1]                   ,Device[1] in powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0]                   ,Device[0] in powerdown state" "No,Yes"
bitfld.long 0x00 2. "                    NO_OUTSTANDING_TRANSACTIONS                ,All non-stalled requests complete status" "Not completed,Completed"
textline "                                "
bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY                         ,Request FIFO is empty" "Not empty,Empty"
group.long 0x2B8++0x03
line.long 0x00 "CFG_2_0,EMC Configuration"
bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT                           ,Gives priority to activates" "Disabled,Enabled"
bitfld.long 0x00 30. "               IGNORE_MC_A_BUS                            ,Ignore the MC *_A_* bus" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE         ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled"
bitfld.long 0x00 28. "               DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE     ,Don't clear timing counters when clock change happen" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY                        ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check"
bitfld.long 0x00 25. "  ALLOW_REF_DURING_CC_PRE_EXE                ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 24. " DSR_STUTTER_ENABLE                         ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled"
bitfld.long 0x00 23. "               CHK_PDEX2RD_TO_START_WR                    ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR"
textline "                                "
bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF                    ,Always generate precharge all bank after refresh" "Disabled,Enabled"
bitfld.long 0x00 20. "               COMBINED_INTERRUPT_MODE                    ,Interrupt mode" "Combined,Independent"
textline "                                "
bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR                        ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled"
bitfld.long 0x00 11. "               DIS_CNTR_WITH_CFG_TIMING_UPDATE            ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled"
textline "                                "
bitfld.long 0x00 7. " EARLY_TRFC_8_CLK                           ,Early TRFC" "16 clocks,8 clocks"
bitfld.long 0x00 3.--5. "              ZQ_EXTRA_DELAY                             ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x00 2. " REF_AFTER_SREF                             ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLKCHANGE_PD_ENABLE                        ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE                       ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL"
rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK            ,Override_val in use" "No,Yes"
rbitfld.long 0x00 30. "                    DLL_RESET                                  ,Reset pulse sent to DLL's on next shadow update" "No,Yes"
textline "                                "
bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE                      ,Disable override of DLL logic" "Disabled,Enabled"
rbitfld.long 0x00 26. "               CFG_DLL_UPDATE_AT_NXT_REFRESH              ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes"
textline "                                "
hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL                       ,Value to use in place of DLI output"
bitfld.long 0x00 15. "                   CFG_DLL_TESTEN                             ,Enable DLL test mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT                       ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               CFG_DLL_TESTSEL                            ,Select DLL test output" "0,1,2,3"
textline "                                "
bitfld.long 0x00 8.--10. " CFG_DLL_UDSET                              ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..."
bitfld.long 0x00 6.--7. "                  CFG_DLL_MODE                               ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock"
textline "                                "
bitfld.long 0x00 5. " CFG_DLL_LOWSPEED                           ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled"
rbitfld.long 0x00 4. "               CFG_DLL_STALL_RW_UNTIL_LOCK                ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC                  ,Enable stalling of all DRAM traffic" "Disabled,Enabled"
bitfld.long 0x00 2. "               CFG_DLL_OVERRIDE_EN                        ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK               ,Stall all traffic until DLL locks" "Disabled,Enabled"
bitfld.long 0x00 0. "               CFG_DLL_EN                                 ,Enable digital DLL" "Disabled,Enabled"
if ((per.l(ad:0x02C60000+0x2BC)&0xC0)==0x80)
group.long 0x2C0++0x03
line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD                         ,Interval between runs in uSec"
else
hgroup.long 0x2C0++0x03
hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
endif
rgroup.long 0x2C4++0x03
line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status"
bitfld.long 0x00 18. " DLL_ALARM_MIN                              ,DLL alarm MIN status" "No alarm,Alarm"
bitfld.long 0x00 17. "               DLL_PRIV_UPDATED                           ,DLL private update status" "Not updated,Updated"
textline "                                "
bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS                         ,DLL calibration in-progress status" "Done,In progress"
bitfld.long 0x00 15. "            DLL_LOCK                                   ,DLL lock status" "Not locked,Locked"
textline "                                "
bitfld.long 0x00 14. " DLL_ALARM                                  ,DLL alarm status" "No alarm,Alarm"
bitfld.long 0x00 13. "               DLL_LOCK_TIMEOUT                           ,DLL lock timeout status" "No timeout,Timeout"
textline "                                "
hexmask.long.word 0x00 0.--10. 1. " DLL_OUT                                    ,DLL_OUT"
group.long 0x2C8++0x13
line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration"
bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE                 ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--11. "                     DLL_NUM_STALL_CYCLES                       ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT                     ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "             CFG_DLL_UPDATE_IDLE                        ,Update dig DLL during idle" "Disabled,Enabled"
line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK                                   ,Programmed to RDV"
line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WDV_MASK                                   ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK                             ,Programmed to RDV_EARLY"
line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter"
hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY                                  ,Time from read command to latching the read data from the pad macros"
sif cpuis("TEGRAX2")
elif (cpuis("TEGRAX1"))
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
endif
group.long 0x2E0++0x0F
line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration"
hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI                           ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD"
hexmask.long.word 0x00 0.--9. 1. "                   ZCAL_INTERVAL_LO                           ,ZCAL_INTERVAL_LO"
line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration"
bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED                       ,ZQ resistor is shared across ranks" "Disabled,Enabled"
bitfld.long 0x04 16.--21. "               ZCAL_LATCH_CNT                             ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT                              ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD"
line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration"
bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,?..."
hexmask.long.byte 0x08 16.--23. 1. "                   ZQ_MRW_MA                                  ,MRW MA field to be sent after ZCAL_INTERVAL"
textline "                                "
hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP                                  ,MRW OP field to be sent after ZCAL_INTERVAL"
line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration"
bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,Neither"
bitfld.long 0x0C 4. "                ZQ_CAL_LENGTH                              ,Indicate short or long ZQ calibration" "Short,Long"
textline "                                "
bitfld.long 0x0C 1. " ZQ_LATCH_CMD                               ,(LPDDR4 only) Issues a ZQ latch command" "0,1"
bitfld.long 0x0C 0. "                      ZQ_CAL_CMD                                 ,(DDR3 only) Issues a ZQ calibration command" "0,1"
group.long 0x2F4++0x03
line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL                     ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
endif
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD              ,Enable weak pull-down" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PD_E_WKPU              ,Enable weak pull-up" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL         ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL         ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                "
bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 8.--9. "                     EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
textline "                                "
bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 2.--5. "                     EMC2TMC_CFG_XM2COMP_PD_TEST_MODE           ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
endif
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
endif
textline "                                "
width 35.
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
endif
group.long 0x310++0x0F
line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register"
bitfld.long 0x00 30.--31. " DQ_PHASE_MIN                               ,DPD phase lower limiter" "0,1,2,3"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 29. "                      CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on command" "Disabled,Enabled"
endif
textline "                                   "
bitfld.long 0x00 24.--28. "          DQ_DPD_EXIT_DELAY                          ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "                     DQ_PHASE_RAMP_IN_TIME                      ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 12.--16. "          DQ_PHASE_RAMP_OUT_TIME                     ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--11. "                     DQ_PHASE_HOLD_MIN                          ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. "          DQ_DPD_ENTRY_DELAY                         ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register"
bitfld.long 0x04 30.--31. " CMD_PHASE_MIN                              ,DPD phase lower limiter" "0,1,2,3"
textline "                                   "
bitfld.long 0x04 29. "          CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on cmd" "Disabled,Enabled"
bitfld.long 0x04 24.--28. "               CMD_DPD_EXIT_DELAY                         ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 20.--23. "          CMD_PHASE_RAMP_IN_TIME                     ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--16. "                     CMD_PHASE_RAMP_OUT_TIME                    ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 8.--11. "          CMD_PHASE_HOLD_MIN                         ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                     CMD_DPD_ENTRY_DELAY                        ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register"
bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8         ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x08 14.--15. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7         ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 12.--13. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6         ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x08 10.--11. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5         ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 8.--9. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4         ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x08 6.--7. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3         ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 4.--5. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2         ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x08 2.--3. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1         ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 0.--1. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0         ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register"
bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8        ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 14.--15. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7        ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 12.--13. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6        ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 10.--11. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5        ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 8.--9. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4        ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x0C 6.--7. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3        ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 4.--5. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2        ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x0C 2.--3. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1        ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 0.--1. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0        ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
group.long 0x324++0x03
line.long 0x00 "SCRATCH0_0,Scratch Register For General Use"
group.long 0x330++0x07
line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1                       ,Data brick control RFU1"
hexmask.long.word 0x00 0.--15. 1. "                   CMD_BRICK_CTRL_RFU1                        ,Command brick control RFU1"
line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2                       ,Data brick control RFU2"
hexmask.long.word 0x04 0.--15. 1. "                   CMD_BRICK_CTRL_RFU2                        ,Command brick control RFU2"
group.long 0x380++0x0B
line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP                               ,Mapping of CMD brick 0 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD0_DQ2_MAP                               ,Mapping of CMD brick 0 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD0_DQ1_MAP                               ,Mapping of CMD brick 0 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD0_DQ0_MAP                               ,Mapping of CMD brick 0 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP                               ,Mapping of CMD brick 0 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD0_DQ6_MAP                               ,Mapping of CMD brick 0 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD0_DQ5_MAP                               ,Mapping of CMD brick 0 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD0_DQ4_MAP                               ,Mapping of CMD brick 0 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP                            ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD0_DQSN_MAP                              ,Mapping of CMD brick 0 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD0_DQSP_MAP                              ,Mapping of CMD brick 0 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD0_DQ8_MAP                               ,Mapping of CMD brick 0 data pin 8"
group.long 0x38C++0x0B
line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP                               ,Mapping of CMD brick 1 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD1_DQ2_MAP                               ,Mapping of CMD brick 1 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD1_DQ1_MAP                               ,Mapping of CMD brick 1 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD1_DQ0_MAP                               ,Mapping of CMD brick 1 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP                               ,Mapping of CMD brick 1 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD1_DQ6_MAP                               ,Mapping of CMD brick 1 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD1_DQ5_MAP                               ,Mapping of CMD brick 1 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD1_DQ4_MAP                               ,Mapping of CMD brick 1 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP                            ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD1_DQSN_MAP                              ,Mapping of CMD brick 1 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD1_DQSP_MAP                              ,Mapping of CMD brick 1 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD1_DQ8_MAP                               ,Mapping of CMD brick 1 data pin 8"
group.long 0x398++0x0B
line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP                               ,Mapping of CMD brick 2 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD2_DQ2_MAP                               ,Mapping of CMD brick 2 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD2_DQ1_MAP                               ,Mapping of CMD brick 2 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD2_DQ0_MAP                               ,Mapping of CMD brick 2 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP                               ,Mapping of CMD brick 2 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD2_DQ6_MAP                               ,Mapping of CMD brick 2 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD2_DQ5_MAP                               ,Mapping of CMD brick 2 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD2_DQ4_MAP                               ,Mapping of CMD brick 2 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP                            ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD2_DQSN_MAP                              ,Mapping of CMD brick 2 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD2_DQSP_MAP                              ,Mapping of CMD brick 2 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD2_DQ8_MAP                               ,Mapping of CMD brick 2 data pin 8"
group.long 0x3A4++0x0B
line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP                               ,Mapping of CMD brick 3 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD3_DQ2_MAP                               ,Mapping of CMD brick 3 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD3_DQ1_MAP                               ,Mapping of CMD brick 3 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD3_DQ0_MAP                               ,Mapping of CMD brick 3 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP                               ,Mapping of CMD brick 3 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD3_DQ6_MAP                               ,Mapping of CMD brick 3 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD3_DQ5_MAP                               ,Mapping of CMD brick 3 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD3_DQ4_MAP                               ,Mapping of CMD brick 3 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP                            ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD3_DQSN_MAP                              ,Mapping of CMD brick 3 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD3_DQSP_MAP                              ,Mapping of CMD brick 3 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD3_DQ8_MAP                               ,Mapping of CMD brick 3 data pin 8"
group.long 0x3B0++0x17
line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register"
bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP                           ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 24.--27. "             BYTE6_DQ_CMD_MAP                           ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 20.--23. "          BYTE5_DQ_CMD_MAP                           ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 16.--19. "             BYTE4_DQ_CMD_MAP                           ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 12.--15. "          BYTE3_DQ_CMD_MAP                           ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 8.--11. "             BYTE2_DQ_CMD_MAP                           ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 4.--7. "          BYTE1_DQ_CMD_MAP                           ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 0.--3. "             BYTE0_DQ_CMD_MAP                           ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
line.long 0x04 "TR_TIMING_0_0,Training Timing Register"
bitfld.long 0x04 23.--26. " T_CATR_RD2VREF                             ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--21. "                     T_DHTRAIN                                  ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 12.--15. "          T_DSTRAIN                                  ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--9. 1. "                     T_VREF_LONG                                ,Delay between CAVREF and CATR reads"
line.long 0x08 "TR_CTRL_0_0,Training Control Register 0"
bitfld.long 0x08 8. " CATR_ENABLE                                ,CA Training enable" "Disabled,Enabled"
bitfld.long 0x08 5.--7. "               CAVREF_DQS_DURATION                        ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x08 4. "          CAVREF_RIVE_DQS                            ,Drive DQS" "0,1"
bitfld.long 0x08 0.--3. "                      CAVREF_TX_BYTE_MASK                        ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TR_CTRL_1_0,Training Control Register 1"
bitfld.long 0x0C 4. " ENABLE_TR_QRST                             ,TR QRST select" "Disabled,Enabled"
bitfld.long 0x0C 3. "               ENABLE_TR_QSAFE                            ,TR QSAFE select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 2. "          ENABLE_TR_RDV_MASK                         ,TR RDV_MASK select" "Disabled,Enabled"
bitfld.long 0x0C 1. "               ENABLE_TR_QPOP                             ,TR QPOP select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 0. "          ENABLE_TR_RDV                              ,TR RDV select" "Disabled,Enabled"
line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register"
bitfld.long 0x10 0. " CLK_SWITCH_BACK                            ,Clock switch back request trigger" "Not triggered,Triggered"
line.long 0x14 "TR_RDV_0,Training RDV Register"
hexmask.long.byte 0x14 0.--6. 1. " TR_RDV                                     ,Training RDV value"
rgroup.long 0x3C8++0x0F
line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE            ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE             ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE                 ,Unstall memory read|write after clock change" "Disabled,Enabled"
line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register"
hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle"
hexmask.long.byte 0x0C 16.--21. 1. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle"
textline "                                   "
hexmask.long.byte 0x0C 8.--13. 1. "          AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle"
hexmask.long.byte 0x0C 0.--5. 1. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle"
group.long 0x3D8++0x0F
line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes"
bitfld.long 0x00 16.--18. " SEL_DPD_DLY                                ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8. "                      DATA_SEL_DPD_EN                            ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5. "          ODT_SEL_DPD_EN                             ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled"
bitfld.long 0x00 4. "               RESET_SEL_DPD_EN                           ,Assert SEL_DPD for reset pad" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. "          CA_SEL_DPD_EN                              ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled"
bitfld.long 0x00 2. "               CLK_SEL_DPD_EN                             ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled"
line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count"
hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT                            ,Pre-refresh request count"
line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry"
bitfld.long 0x08 31. " DSR_PER_DEVICE                             ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled"
hexmask.long.word 0x08 0.--15. 1. "               DSR_THRESHOLD                              ,Number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL"
hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL                                    ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL"
group.long 0x3E8++0x07
line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset"
bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1                      ,Count-by VALUE clock increments select" "256,1"
hexmask.long.word 0x00 16.--30. 1. "                    CCFIFO_STALL_CNT                           ,CCFIFO stall counter value"
textline "                                   "
hexmask.long.word 0x00 0.--15. 0x01 "          CCFIFO_ADDR                                ,Clock change FIFO address register"
line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register"
rgroup.long 0x3F0++0x03
line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status"
hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT                               ,CCFIFO count"
group.long 0x3F4++0x0F
line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter"
hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE                           ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x00 0.--6. 1. "                     TR_QPOP                                    ,Time from training read command to pop data from the pad macro FIFO"
line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK                                ,Training RDV mask bits"
line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter"
hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE                                   ,Training time from a read command to when it is safe to issue a QRST"
line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter"
bitfld.long 0x0C 16.--20. " TR_QRST_DURATION                           ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x0C 0.--6. 1. "              TR_QRST                                    ,Training time from a read command to when it is safe to issue a QRST"
group.long 0x404++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL                   ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE0_BIT6_SEL                   ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE0_BIT5_SEL                   ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE0_BIT4_SEL                   ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE0_BIT3_SEL                   ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE0_BIT2_SEL                   ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE0_BIT1_SEL                   ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE0_BIT0_SEL                   ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x408++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL                   ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE1_BIT6_SEL                   ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE1_BIT5_SEL                   ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE1_BIT4_SEL                   ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE1_BIT3_SEL                   ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE1_BIT2_SEL                   ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE1_BIT1_SEL                   ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE1_BIT0_SEL                   ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x40C++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL                   ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE2_BIT6_SEL                   ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE2_BIT5_SEL                   ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE2_BIT4_SEL                   ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE2_BIT3_SEL                   ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE2_BIT2_SEL                   ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE2_BIT1_SEL                   ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE2_BIT0_SEL                   ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x410++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL                   ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE3_BIT6_SEL                   ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE3_BIT5_SEL                   ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE3_BIT4_SEL                   ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE3_BIT3_SEL                   ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE3_BIT2_SEL                   ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE3_BIT1_SEL                   ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE3_BIT0_SEL                   ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x418++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL                   ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE0_BIT6_SEL                   ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE0_BIT5_SEL                   ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE0_BIT4_SEL                   ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE0_BIT3_SEL                   ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE0_BIT2_SEL                   ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE0_BIT1_SEL                   ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE0_BIT0_SEL                   ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x41C++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL                   ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE1_BIT6_SEL                   ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE1_BIT5_SEL                   ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE1_BIT4_SEL                   ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE1_BIT3_SEL                   ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE1_BIT2_SEL                   ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE1_BIT1_SEL                   ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE1_BIT0_SEL                   ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x420++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL                   ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE2_BIT6_SEL                   ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE2_BIT5_SEL                   ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE2_BIT4_SEL                   ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE2_BIT3_SEL                   ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE2_BIT2_SEL                   ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE2_BIT1_SEL                   ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE2_BIT0_SEL                   ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x424++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL                   ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE3_BIT6_SEL                   ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE3_BIT5_SEL                   ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE3_BIT4_SEL                   ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE3_BIT3_SEL                   ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE3_BIT2_SEL                   ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE3_BIT1_SEL                   ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE3_BIT0_SEL                   ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x428++0x03
line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter"
bitfld.long 0x00 0. " ISSUE_QRST                                 ,Sets QRST to pads|macros" "0,1"
group.long 0x440++0x0B
line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1"
line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2"
line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3"
sif (cpuis("TEGRAX2"))
group.long 0x44C++0x0B
line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels"
bitfld.long 0x00 3. " INT_CH3                                    ,Set when there is a interrupt from channel-3" "None,Interrupt"
bitfld.long 0x00 2. "              INT_CH2                                    ,Set when there is a interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x00 1. "          INT_CH1                                    ,Set when there is a interrupt from channel-1" "None,Interrupt"
bitfld.long 0x00 0. "              INT_CH0                                    ,Set when there is a interrupt from channel-0" "None,Interrupt"
line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels"
bitfld.long 0x04 3. " CRITICAL_INT_CH3                           ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              CRITICAL_INT_CH2                           ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          CRITICAL_INT_CH1                           ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              CRITICAL_INT_CH0                           ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits"
bitfld.long 0x08 4.--7. " RESET_RFU                                  ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2. "                     RESET_EN                                   ,Enables the TH path when set to 0" "None,INT"
textline "                                   "
bitfld.long 0x08 1. "          RESET_E_INPUT                              ,When set to 1 enables the RX path for reset pads" "None,Interrupt"
bitfld.long 0x08 0. "              RESET_E_WKPD                               ,When set to 1 enables the weak pad for reset pads" "None,Interrupt"
endif
group.long 0x458++0x17
line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2"
bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 24.--25. "                  AUTO_CAL_DQS_PU_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 22.--23. "          AUTO_CAL_DQ_PD_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 20.--21. "                  AUTO_CAL_DQ_PU_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 18.--19. "          AUTO_CAL_DQS_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 16.--17. "                  AUTO_CAL_DQS_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 14.--15. "          AUTO_CAL_DQ_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 12.--13. "                  AUTO_CAL_DQ_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 10.--11. "          AUTO_CAL_CMD_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 8.--9. "                  AUTO_CAL_CMD_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 6.--7. "          AUTO_CAL_CA_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 4.--5. "                  AUTO_CAL_CA_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 2.--3. "          AUTO_CAL_CLK_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 0.--1. "                  AUTO_CAL_CLK_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                   "
bitfld.long 0x00 8.--13. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x460++0x0F
line.long 0x00 "TR_DVFS,Training DVFS Register"
bitfld.long 0x00 0. " TRAINING_DVFS                              ,DVFS training enable" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register"
bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE                       ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled"
bitfld.long 0x04 30. "               AUTO_CAL_STALL_ALL_TRAFFIC                 ,Stall all traffic for an autocal update" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x04 29. "          AUTO_CAL_COMPUTE_START_DVFS                ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled"
hexmask.long.byte 0x04 21.--27. 1. "               CAL_WAIT_AFTER_DVFS                        ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM"
textline "                                   "
bitfld.long 0x04 16.--20. "          AUTO_CAL_UPDATE_TIMEOUT                    ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS"
bitfld.long 0x04 8.--11. "           AUTO_CAL_WAIT_BEFORE_UPDATE                ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--5. "          AUTO_CAL_NUM_STALL_CYCLES                  ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter"
bitfld.long 0x08 28.--29. " IBDLY_MODE                                 ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
hexmask.long.byte 0x08 0.--6. 1. "              IBDLY                                      ,Specifies when to change IBDLY for DQ|DQS"
line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter"
bitfld.long 0x0C 28.--29. " OBDLY_MODE                                 ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
bitfld.long 0x0C 0.--5. "              OBDLY                                      ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x470++0x07
line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register"
bitfld.long 0x00 31. " DISPLAY_STUTTER_EN                         ,Display stutter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "               ASR_THRESHOLD                              ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels"
bitfld.long 0x04 3. " NONCRITICAL_INT_CH3                        ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              NONCRITICAL_INT_CH2                        ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          NONCRITICAL_INT_CH1                        ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              NONCRITICAL_INT_CH0                        ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
endif
textline "                                   "
width 26.
group.long 0x480++0x03
line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter"
hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN                                ,Cycles to wait from DSR exit"
group.long 0x48C++0x13
line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--4. " WE_DURATION                                ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x04 0.--4. " WS_DURATION                                ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WEV                                        ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter"
bitfld.long 0x0C 0.--5. " WSV                                        ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x10 "CFG_3_0,EMC Configuration Register 3"
bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16                            ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      MRR_BYTESEL                                ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7"
group.long 0x4A0++0x03
line.long 0x00 "MRW5_0,Command Trigger MRW5"
bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN                           ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW5_CNT                               ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
hexmask.long.byte 0x00 16.--23. 0x01 "  MRW5_MA                                    ,Register address"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW5_OP                                    ,Data to be written"
group.long 0x4A4++0x03
line.long 0x00 "MRW6 _0,Command Trigger MRW6 "
bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW6 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW6 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW6 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW6 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW6 _SP0                                  ,Data to be written to subp0"
group.long 0x4A8++0x03
line.long 0x00 "MRW7 _0,Command Trigger MRW7 "
bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW7 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW7 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW7 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW7 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW7 _SP0                                  ,Data to be written to subp0"
group.long 0x4AC++0x03
line.long 0x00 "MRW8 _0,Command Trigger MRW8 "
bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW8 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW8 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW8 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW8 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW8 _SP0                                  ,Data to be written to subp0"
group.long 0x4B0++0x03
line.long 0x00 "MRW9 _0,Command Trigger MRW9 "
bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW9 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW9 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW9 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW9 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW9 _SP0                                  ,Data to be written to subp0"
group.long 0x4B4++0x03
line.long 0x00 "MRW10_0,Command Trigger MRW10"
bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW10_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW10_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW10_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW10_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW10_SP0                                  ,Data to be written to subp0"
group.long 0x4B8++0x03
line.long 0x00 "MRW11_0,Command Trigger MRW11"
bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW11_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW11_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW11_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW11_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW11_SP0                                  ,Data to be written to subp0"
group.long 0x4BC++0x03
line.long 0x00 "MRW12_0,Command Trigger MRW12"
bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW12_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW12_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW12_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW12_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW12_SP0                                  ,Data to be written to subp0"
group.long 0x4C0++0x03
line.long 0x00 "MRW13_0,Command Trigger MRW13"
bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW13_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW13_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW13_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW13_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW13_SP0                                  ,Data to be written to subp0"
group.long 0x4C4++0x03
line.long 0x00 "MRW14_0,Command Trigger MRW14"
bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW14_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW14_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW14_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW14_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW14_SP0                                  ,Data to be written to subp0"
group.long 0x4D0++0x03
line.long 0x00 "MRW15_0,Command Trigger MRW15"
bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW15_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW15_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW15_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW15_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW15_SP0                                  ,Data to be written to subp0"
group.long 0x4D4++0x07
line.long 0x00 "CFG_SYNC_0,Sync Configuration 0"
bitfld.long 0x00 0. " CHANNEL_SYNC                               ,Channel sync" "0,1"
line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0"
bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE                     ,No ramp for DI/DT enable" "Disabled,Enabled"
group.long 0x4E0++0x03
line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--5. " WDV_CHK_BASE                               ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x510++0x07
line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK           ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x00 10. "               ECC_UNCORR_ERR_CRITICAL_INTMASK            ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 9. "  DLL_LOCK_TIMEOUT_CRITICAL_INTMASK          ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x00 8. "               CCFIFO_OVERFLOW_CRITICAL_INTMASK           ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 7. "  DLL_ALARM_CRITICAL_INTMASK                 ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x00 6. "               ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK      ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 5. "  MRR_DIVLD_CRITICAL_INTMASK                 ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x00 4. "               CLKCHANGE_COMPLETE_CRITICAL_INTMASK        ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 3. "  REFRESH_OVERFLOW_CRITICAL_INTMASK          ,Mask for refresh request overflow time out" "Masked,Unmasked"
line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK        ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "               ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK        ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 11. "  ECC_CORR_ERR_NONCRITICAL_INTMASK           ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "               ECC_UNCORR_ERR_NONCRITICAL_INTMASK         ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 9. "  DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK       ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "               CCFIFO_OVERFLOW_NONCRITICAL_INTMASK        ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 7. "  DLL_ALARM_NONCRITICAL_INTMASK              ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x04 6. "               ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK   ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 5. "  MRR_DIVLD_NONCRITICAL_INTMASK              ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "               CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK     ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 3. "  REFRESH_OVERFLOW_NONCRITICAL_INTMASK       ,Mask for refresh request overflow time out" "Masked,Unmasked"
endif
group.long 0x554++0x1F
line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0"
bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass"
bitfld.long 0x00 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass"
bitfld.long 0x00 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass"
bitfld.long 0x00 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass"
bitfld.long 0x00 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass"
bitfld.long 0x00 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass"
bitfld.long 0x00 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x00 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x00 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x00 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x00 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x00 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x00 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register"
bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE                   ,Pipe clock override enable" "Disabled,Enabled"
line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0"
bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 11. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 10. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 9. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 8. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 7. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 6. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 5. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 4. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 3. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 2. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 1. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 0. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0"
bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 26. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 25. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 24. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 23. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 22. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 21. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 20. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 19. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 18. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 17. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 16. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x10 "QPOP_0,DRAM Timing Parameter"
hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE                              ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x10 0.--6. 1. "                     QPOP                                       ,Time from read command to pop data from the pad macro FIFO"
line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x14 29. " QUSE_SHORTEN_2UI                           ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten"
bitfld.long 0x14 28. "              QUSE_EXTEND_UI                             ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend"
textline "                                  "
bitfld.long 0x14 0.--3. "  QUSE_DURATION                              ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x18 31. " CFG_STATIC_TERM                            ,IOBRICK internally disables termination based on DOE" "0,1"
bitfld.long 0x18 0.--3. "                      PUTERM_DURATION                            ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls"
bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX                  ,Bias current going out to brick receiver" "Disabled,Enabled"
bitfld.long 0x1C 2. "               BIAS0_DSC_E_PWRD_IBIAS_VTTGEN              ,Disables biasing current going out to VTTGEN cells" "No,Yes"
textline "                                  "
bitfld.long 0x1C 1. "  BIAS0_DSC_E_PWRD                           ,Disables all DC current paths within entire cell" "No,Yes"
bitfld.long 0x1C 0. "                    BIAS0_DSC_BG_SEL_N                         ,Select BandGap reference current" "Enabled,Disabled"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14.--15. "  EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                  "
bitfld.long 0x00 10.--11. "  EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 8.--9. "    EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                  "
bitfld.long 0x00 6.--7. "  EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 2.--5. "    EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--1. "  EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 28. "  AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 25. "  AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 23. "  AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 16.--21. "  AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.byte 0x04 2.--8. 1. "  AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C60000+0x20))&0x80000000)==0x80000000)
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 31. " REFPB_VALID                                ,REFpb operation enable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "               REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
else
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 24.--26. "                                                                   REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
endif
group.long 0x584++0x03
line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
bitfld.long 0x00 17. "               SEND_RD1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
textline "                                   "
endif
bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0                        ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled"
bitfld.long 0x00 15. "               DISABLE_CCDP1_WR_SPACING                   ,Write command spacing of tCCD+1 disable" "No,Yes"
textline "                                  "
bitfld.long 0x00 14. "  DISABLE_CCDP1_RD_SPACING                   ,Read command spacing of tCCD+1 disable" "No,Yes"
bitfld.long 0x00 13. "                    SUBP_ADDR_MODE                             ,DRAM SUBP address width" "x32,x16"
textline "                                  "
bitfld.long 0x00 12. "  ZQCAL_LATCH_ENABLE                         ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               ZQCAL_MPC_ENABLE                           ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. "  QPOP_RD_PREAMBLE_TOGGLE                    ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               CS_POLARITY                                ,DRAM chip select active polarity" "Low,High"
textline "                                  "
bitfld.long 0x00 8. "  MRR_DBI                                    ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               RD_DBI                                     ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. "  WR_DBI                                     ,EMC write data bus inversion protocol enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               MASKED_WR                                  ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 4. "  LPDDR4_CMD_MAP                             ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               QUSE_CCDP1_EXTEND                          ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. "  CH1_ENABLE                                 ,CH1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               CH0_ENABLE                                 ,CH0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. "  DRAM_EMCCLK_2TO1                           ,Specifies how much faster is dramclk than emcclk" "1x,2x"
sif (cpuis("TEGRAX2"))
group.long 0x710++0x03
line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register"
bitfld.long 0x00 8. " USE_SELF_REF_STATE                         ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled"
bitfld.long 0x00 4. "               ENCR_TWEAK_CHECK_ENABLE                    ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On"
textline "                                  "
bitfld.long 0x00 3. "  ECC_ENCR_CFG_LOCK                          ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On"
bitfld.long 0x00 2. "                    ECC_DYNAMIC_BYPASS_DISABLE                 ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On"
textline "                                  "
bitfld.long 0x00 1. "  ECC_ENCR_DISABLE                           ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On"
bitfld.long 0x00 0. "                    ECC_CHECK_DISABLE                          ,Setting this bit disables EMC ECC check/correct functions" "Off,On"
group.long 0xAC0++0x13
line.long 0x00 "ECC_CONTROL_0,ECC Control Register"
hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT                           ,Error buffer limit"
bitfld.long 0x00 2. "                     ERR_BUFFER_LOAD                            ,Error Buffer Load" "No load,Load"
textline "                                  "
bitfld.long 0x00 1. "  ERR_BUFFER_RESET                           ,Error Buffer Reset" "No reset,Reset"
bitfld.long 0x00 0. "               ERR_BUFFER_MODE                            ,Error Buffer Mode" "Ring,Write stop"
rgroup.long 0xAC4++0x13
line.long 0x00 "ECC_STATUS_0,ECC Error Status"
hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH                           ,The physical size (in number of entries) of ECC error buffer"
hexmask.long.byte 0x00 16.--23. 1. "                     ERR_BUFFER_CNT                             ,The number of errors physically residing in ECC error buffer"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  ERR_BUFFER_WR_PTR                          ,The ECC error buffer write pointer"
hexmask.long.byte 0x00 0.--7. 1. "                     ERR_BUFFER_RD_PTR                          ,The ECC error buffer read pointer"
line.long 0x04 "ECC_STATUS_0,ECC Error Status"
hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0                      ,Computed syndrome in ECC word"
bitfld.long 0x04 16.--17. "                   ECC_EERR_PAR_SP0                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x04 6.--15. 1. "  ECC_DERR_SYNDROME_SP0                      ,Computed syndrome in data word"
bitfld.long 0x04 3. "                   ECC_ERR_POISON_SP0                         ,Poisoned request" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0.--1. "  ECC_DERR_PAR_SP0                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors"
hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1                      ,Computed syndrome in ECC word"
bitfld.long 0x08 16.--17. "                   ECC_EERR_PAR_SP1                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x08 6.--15. 1. "  ECC_DERR_SYNDROME_SP1                      ,Computed syndrome in data word"
bitfld.long 0x08 0.--1. "                   ECC_DERR_PAR_SP1                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob"
bitfld.long 0x0C 28.--30. " ECC_ERR_BANK                               ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 8.--23. 1. "                      ECC_ERR_ROW                                ,ECC_ERR_ROW"
textline "                                  "
bitfld.long 0x0C 0.--5. "  ECC_ERR_GOB                                ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug"
hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID                               ,Request ID"
bitfld.long 0x10 20.--21. "                     ECC_ERR_SEQ                                ,Burst sequence" "0,1,2,3"
textline "                                  "
bitfld.long 0x10 19. "  ECC_ERR_SWAP                               ,Swap" "No swap,Swap"
bitfld.long 0x10 17.--18. "                ECC_ERR_SIZE                               ,Size" "R64B,R32B,R16B,?..."
textline "                                  "
bitfld.long 0x10 16. "  ECC_ERR_DEVICE                             ,DRAM device" "Disabled,Enabled"
bitfld.long 0x10 12.--14. "               ECC_ERR_COL_SP1                            ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 8.--10. "  ECC_ERR_COL_SP0                            ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--7. "                      ECC_ERR_EMC_ID                             ,EMC device/channel number" "0,1,2,3"
group.long 0xADC++0x03
line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register"
rbitfld.long 0x00 28.--31. " KEY_INIT_DONE                              ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                     KEY_STATE_CLEAR                            ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 8.--11. "  KEY_DISTRIB_ERR                            ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     KEY_ACTIVE                                 ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x588++0x27
line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "                      RANK0_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 15.--17. "  RANK0_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "                      RANK0_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 9.--11. "  RANK0_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "                      RANK0_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  RANK0_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      RANK0_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 18.--20. "                      RANK1_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 15.--17. "  RANK1_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--14. "                      RANK1_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 9.--11. "  RANK1_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--8. "                      RANK1_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 3.--5. "  RANK1_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                      RANK1_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter"
hexmask.long.word 0x08 0.--8. 1. " RFCPB                                      ,Specifies the per-bank auto refresh cycle time"
line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 18.--20. "                      RANK0_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 15.--17. "  RANK0_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "                      RANK0_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 9.--11. "  RANK0_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 6.--8. "                      RANK0_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 3.--5. "  RANK0_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "                      RANK0_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18.--20. "                      RANK1_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 15.--17. "  RANK1_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12.--14. "                      RANK1_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 9.--11. "  RANK1_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--8. "                      RANK1_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 3.--5. "  RANK1_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      RANK1_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0"
bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 0.--2. "                      CH0_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1"
bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0.--2. "                      CH1_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0"
bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "                      CH0_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1"
bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                      CH1_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0"
bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 10.--14. "                     RANK0_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x24 5.--9. "  RANK0_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 0.--4. "                     RANK0_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
else
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x5B8++0x13
line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1"
bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "                     RANK0_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 5.--9. "  RANK0_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                     RANK0_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2"
bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 10.--14. "                     RANK1_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x04 5.--9. "  RANK1_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     RANK1_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " CCDMW                                      ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3"
bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 10.--14. "                     RANK1_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x0C 5.--9. "  RANK1_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "                     RANK1_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register"
bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11      ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled"
bitfld.long 0x10 26. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10      ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 25. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9       ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled"
bitfld.long 0x10 24. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8       ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 23. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7       ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled"
bitfld.long 0x10 22. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6       ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 21. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5       ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled"
bitfld.long 0x10 20. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4       ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 19. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3       ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled"
bitfld.long 0x10 18. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2       ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 17. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1       ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled"
bitfld.long 0x10 16. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0       ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 15. "  RANK_SWIZZLE                               ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
else
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
wgroup.long 0x5D0++0x07
line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register"
bitfld.long 0x00 29. " PROTOBIST_APC                              ,Controls the auto-precharge function of transaction" "0,1"
bitfld.long 0x00 28. "                      PROTOBIST_A_RDY                            ,Indicates active interface is ready" "Not ready,Ready"
textline "                                  "
hexmask.long.word 0x00 12.--27. 1. "  PROTOBIST_A_ROW                            ,Row control during protobist mode"
bitfld.long 0x00 11. "                   PROTOBIST_A_REF                            ,Refresh control during active request in protobist" "0,1"
textline "                                  "
bitfld.long 0x00 9.--10. "  PROTOBIST_A_DEV                            ,Devsel control during active request in protobist" "0,1,2,3"
bitfld.long 0x00 6.--8. "                      PROTOBIST_BANK                             ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  PROTOBIST_A_BANK                           ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      PROTOBIST_A_BANK1                          ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7"
line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register"
bitfld.long 0x04 28. " PROTOBIST_SWAP                             ,Swap control during protobist mode" "0,1"
bitfld.long 0x04 26.--27. "                      PROTOBIST_SIZE                             ,Size control during protobist mode" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 25. "  PROTOBIST_MASKED_WRITE                     ,Mask write control during protobist mode" "0,1"
bitfld.long 0x04 24. "                      PROTOBIST_T_DEV                            ,Dev control during Xfre request of protobist mode" "0,1"
textline "                                  "
bitfld.long 0x04 21.--23. "  PROTOBIST_T_COL1                           ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x04 9.--20. 1. "                      PROTOBIST_T_COL                            ,Column control during protobist"
textline "                                  "
bitfld.long 0x04 8. "  PROTOBIST_T_RDY                            ,Indicates transfer interface is ready" "Not ready,Ready"
hexmask.long.byte 0x04 0.--7. 1. "              PROTOBIST_CGID                             ,Request ID of transaction control"
group.long 0x5D8++0x0B
line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " PROTOBIST_RESET                            ,PROTOBIST reset" "No reset,Reset"
textline "                                   "
endif
bitfld.long 0x00 16.--18. " PROTOBIST_REQ                              ,Protobist request" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 15. "                      PROTOBIST_READ_ACK                         ,Protobist read ACK" "0,1"
textline "                                  "
bitfld.long 0x00 14. "  PROTOBIST_START                            ,Protobist start" "0,1"
bitfld.long 0x00 13. "                      PROTOBIST_W_BE                             ,Protobist mode control for byte enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. "  PROTOBIST_MODE                             ,Protobist mode control indicates bist mode" "0,1"
bitfld.long 0x00 8.--11. "                      PROTOBIST_RDI_SEL                          ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. "  PROTOBIST_TAG                              ,Protobist mode tag control"
line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register"
line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register"
rgroup.long 0x5EC++0x03
line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register"
group.long 0x5E4++0x07
line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0"
bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START                  ,Ignore DLLCAL start trim priv value" "0,1"
bitfld.long 0x00 28. "                      DDLLCAL_CTRL_DUAL_PASS_LOCK                ,2 pass lock" "0,1"
textline "                                  "
bitfld.long 0x00 24.--27. "  DDLLCAL_CTRL_STEP_SIZE                     ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                     DDLLCAL_CTRL_END_COUNT                     ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 16.--19. "  DDLLCAL_CTRL_FILTER_BITS                   ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                     DDLLCAL_CTRL_SAMPLE_COUNT                  ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15"
textline "                                  "
hexmask.long.byte 0x00 4.--11. 1. "  DDLLCAL_CTRL_SAMPLE_DELAY                  ,Delay to allow DLL value to settle"
bitfld.long 0x00 0.--3. "                     DDLLCAL_UPDATE_CNT_LIMIT                   ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE                          ,RFU" "0,1,2,3"
bitfld.long 0x04 24.--25. "                      DDLL_VTTDDLL_SPARE                         ,RFU" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 22. "  DDLL_VTTLP_VDDA_E_REGSW                    ,Active high. Enable to switch to low power regulator" "Low,High"
bitfld.long 0x04 21. "                   DDLL_VTTDDLL_VDDA_E_REG                    ,Enable DLL regulator" "0,1"
textline "                                  "
bitfld.long 0x04 20. "  DDLL_VTTDDLL_E_WB                          ,Active high to enable the weak bias for DDLL" "0,1"
textline "                                   "
endif
bitfld.long 0x04 16. " DDLL_BYPASS                                ,Bypass" "0,1"
bitfld.long 0x04 12.--15. "                      DDLL_RFU                                   ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 11. "  E_DDLL_PWRD                                ,Master DLL powerdown" "0,1"
hexmask.long.word 0x04 0.--10. 1. "                      DDLLCAL_CTRL_START_TRIM                    ,Calibration start value"
group.long 0x5F0++0x07
line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay"
hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY                        ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)"
line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control"
bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE           ,Disallow configuration reads during a timing update" "Allow,Disallow"
bitfld.long 0x04 30. "               STALL_WRITES_DURING_TIMING_UPDATE          ,Disallow configuration writes during a timing update" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 29. "  LINKED_TIMING_UPDATE_TIMEOUT               ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled"
bitfld.long 0x04 28. "               LINKED_TIMING_UPDATE                       ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 9.--10. "  UPDATE_DLL_IN_UPDATE                       ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 8. "                UPDATE_DLL_IN_CLKCHANGE                    ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow"
textline "                                  "
bitfld.long 0x04 1.--2. "  UPDATE_AUTOCAL_IN_UPDATE                   ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 0. "                UPDATE_AUTO_CAL_IN_CLKCHANGE               ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow"
sif (cpuis("TEGRAX2"))
group.long 0x5F8++0x07
line.long 0x00 "DLL_CFG_2_0,DLL Config register 2"
bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL                       ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     DDLL_VTTDDLL_VDDA_LVL                      ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_3_0,DLL Config register 3"
bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL                   ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x04 16.--17. "    DDLL_VTTDDLL_VDDA_WB_CTRL                  ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
textline "                                  "
bitfld.long 0x04 8.--12. "  DDLL_VTTCDB_VDDA_CTRL                      ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     DDLL_VTTDDLL_VDDA_CTRL                     ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
width 15.
tree "PMACRO Registers"
tree "QUSE DDLL Register"
group.long 0x600++0x03
line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank0 byte0"
group.long 0x604++0x03
line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank0 byte2"
group.long 0x608++0x03
line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank0 byte4"
group.long 0x60C++0x03
line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank0 byte6"
group.long 0x610++0x03
line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank0 command0"
group.long 0x614++0x03
line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank0 command2"
textline "                                             "
group.long 0x620++0x03
line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank1 byte0"
group.long 0x624++0x03
line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank1 byte2"
group.long 0x628++0x03
line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank1 byte4"
group.long 0x62C++0x03
line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank1 byte6"
group.long 0x630++0x03
line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank1 command0"
group.long 0x634++0x03
line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank1 command2"
tree.end
tree "OB DDLL Long Registers"
group.long 0x640++0x03
line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank0 byte0"
group.long 0x644++0x03
line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank0 byte2"
group.long 0x648++0x03
line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank0 byte4"
group.long 0x64C++0x03
line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank0 byte6"
group.long 0x650++0x03
line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank0 command0"
group.long 0x654++0x03
line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank0 command2"
textline "                                             "
group.long 0x660++0x03
line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank1 byte0"
group.long 0x664++0x03
line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank1 byte2"
group.long 0x668++0x03
line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank1 byte4"
group.long 0x66C++0x03
line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank1 byte6"
group.long 0x670++0x03
line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank1 command0"
group.long 0x674++0x03
line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank1 command2"
textline "                                             "
group.long 0x680++0x03
line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank0 byte0"
group.long 0x684++0x03
line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank0 byte2"
group.long 0x688++0x03
line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank0 byte4"
group.long 0x68C++0x03
line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank0 byte6"
group.long 0x690++0x03
line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank0 Command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank0 Command0"
group.long 0x694++0x03
line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank0 Command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank0 Command2"
textline "                                             "
group.long 0x6A0++0x03
line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank1 byte0"
group.long 0x6A4++0x03
line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank1 byte2"
group.long 0x6A8++0x03
line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank1 byte4"
group.long 0x6AC++0x03
line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank1 byte6"
group.long 0x6B0++0x03
line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank1 command0"
group.long 0x6B4++0x03
line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank1 command2"
tree.end
tree "IB DDLL DQS Long Registers"
group.long 0x6C0++0x03
line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank0 byte0"
group.long 0x6C4++0x03
line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank0 byte2"
group.long 0x6C8++0x03
line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank0 byte4"
group.long 0x6CC++0x03
line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank0 byte6"
group.long 0x6D0++0x03
line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank0 command0"
group.long 0x6D4++0x03
line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank0 command2"
textline "                                             "
group.long 0x6E0++0x03
line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank1 byte0"
group.long 0x6E4++0x03
line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank1 byte2"
group.long 0x6E8++0x03
line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank1 byte4"
group.long 0x6EC++0x03
line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank1 byte6"
group.long 0x6F0++0x03
line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank1 command0"
group.long 0x6F4++0x03
line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank1 command2"
tree.end
textline "                                             "
width 22.
group.long 0x700++0x03
line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3           ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE2           ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE1           ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE0           ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x704++0x03
line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7           ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE7         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE7       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE6           ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE6           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE6         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE6       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE5           ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE5           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE5         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE5       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE4           ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE4           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE4         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE4       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x708++0x03
line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3           ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_CMD3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_CMD3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_CMD2           ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_CMD2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_CMD2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_CMD2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_CMD1           ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_CMD1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_CMD1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_CMD1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_CMD0           ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_CMD0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_CMD0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_CMD0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x720++0x03
line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1              ,Byte1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE1       ,Byte1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE1        ,Programmed to TX PWRD value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE1      ,Programmed to TX PWRD value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE0              ,Byte0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE0       ,Byte0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE0        ,Programmed to TX PWRD value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE0      ,Programmed to TX PWRD value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1"
group.long 0x724++0x03
line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3              ,Byte3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE3       ,Byte3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE3        ,Programmed to TX PWRD value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE3      ,Programmed to TX PWRD value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE2              ,Byte2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE2       ,Byte2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE2        ,Programmed to TX PWRD value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE2      ,Programmed to TX PWRD value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1"
group.long 0x728++0x03
line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5              ,Byte5 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE5       ,Byte5 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE5        ,Programmed to TX PWRD value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE5      ,Programmed to TX PWRD value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE4              ,Byte4 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE4       ,Byte4 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE4        ,Programmed to TX PWRD value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE4      ,Programmed to TX PWRD value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1"
group.long 0x72C++0x03
line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7              ,Byte7 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE7       ,Byte7 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE7        ,Programmed to TX PWRD value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE7      ,Programmed to TX PWRD value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE6              ,Byte6 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE6       ,Byte6 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE6        ,Programmed to TX PWRD value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE6      ,Programmed to TX PWRD value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1"
group.long 0x730++0x03
line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1              ,Cmd1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD1       ,Cmd1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD1                ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD1        ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD1      ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD0              ,Cmd0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD0       ,Cmd0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD0                ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD0        ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD0      ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1"
group.long 0x734++0x03
line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3              ,Cmd3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD3       ,Cmd3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD3                ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD3        ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD3      ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD2              ,Cmd2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD2       ,Cmd2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD2                ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD2        ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD2      ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x740++0x03
line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1"
group.long 0x744++0x03
line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1"
group.long 0x748++0x03
line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1"
group.long 0x74C++0x03
line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1"
group.long 0x750++0x03
line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1"
group.long 0x754++0x03
line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x760++0x03
line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass"
bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 30. "            CMD_DDLLCAL_BIT_TXDQ_BYPASS         ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 29. "            CMD_DDLLCAL_BIT_TXDQS_BYPASS      ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 27. "          CMD_DDLLCAL_BYTE_QU_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 26. "            CMD_DDLLCAL_BYTE_RXDQS_BYPASS       ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 25. "            CMD_DDLLCAL_BYTE_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 24. "          CMD_DDLLCAL_BYTE_TXDQ_BYPASS    ,Bypass the DDLL calibration value" "0,1"
bitfld.long 0x00 23. "            CMD_DDLL_BIT_RXDQ_BYPASS            ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 22. "    CMD_DDLL_BIT_TXDQS_BYPASS         ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 21. "          CMD_DDLL_BIT_TXDQ_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 20. "    CMD_DDLL_BYTE_RXRT_BYPASS           ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 19. "    CMD_DDLL_BYTE_QU_BYPASS           ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          CMD_DDLL_BYTE_RXDQS_BYPASS      ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 17. "    CMD_DDLL_BYTE_TXDQS_BYPASS          ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_DDLL_BYTE_TXDQ_BYPASS         ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 15. "          DATA_DDLLCAL_BIT_RXDQ_BYPASS    ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 14. "            DATA_DDLLCAL_BIT_TXDQ_BYPASS        ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 13. "            DATA_DDLLCAL_BIT_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 11. "          DATA_DDLLCAL_BYTE_QU_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 10. "            DATA_DDLLCAL_BYTE_RXRQS_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 9. "            DATA_DDLLCAL_BYTE_TXDQS_BYPASS    ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DATA_DDLLCAL_BYTE_TXDQ_BYPASS   ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 7. "            DATA_DDLL_BIT_RXDQ_BYPASS           ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 6. "    DATA_DDLL_BIT_TXDQS_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 5. "          DATA_DDLL_BIT_TXDQ_BYPASS       ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 4. "    DATA_DDLL_BYTE_RXRT_BYPASS          ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 3. "    DATA_DDLL_BYTE_QU_BYPASS          ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DATA_DDLL_BYTE_RXDQS_BYPASS     ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 1. "    DATA_DDLL_BYTE_TXDQS_BYPASS         ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    DATA_DDLL_BYTE_TXDQ_BYPASS        ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
group.long 0x770++0x03
line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x774++0x03
line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE7            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE7         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE7         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE7          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE7        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE7       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE6            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE6          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE6       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE6             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE6        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE6      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE6           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE5          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE5        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE5           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE5           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE5      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE5          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE5         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE4        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE4            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE4         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE4         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE4          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE4        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE4       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x778++0x03
line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_CMD3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_CMD3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_CMD3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_CMD3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_CMD3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_CMD3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_CMD2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_CMD2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_CMD2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_CMD2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_CMD2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_CMD2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_CMD2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_CMD1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_CMD1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_CMD1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_CMD1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_CMD1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_CMD1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_CMD1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_CMD0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_CMD0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_CMD0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_CMD0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_CMD0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_CMD0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_CMD0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
group.long 0x780++0x03
line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE3      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE3       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE3      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE3         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE3                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE0                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x784++0x03
line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE7      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE7       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE7      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE7         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE7                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE6      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE6       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE6      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE6         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE6                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE5      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE5       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE5      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE5         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE5                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE4      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE4       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE4      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE4         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE4                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x788++0x03
line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_MISC2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_MISC2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_MISC2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_MISC2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_MISC1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_MISC1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_MISC1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_MISC1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_MISC0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_MISC0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_MISC0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_MISC0                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_RESET      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_RESET       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_RESET      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_RESET         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_RESET                 ,IO_CMD input path enable" "Disabled,Enabled"
width 17.
tree "OB DDLL Short DQ Registers"
group.long 0x800++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x810++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x820++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x830++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x840++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x850++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x860++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x870++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x880++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x890++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8A0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8B0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x900++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x910++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x920++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x930++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x940++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x950++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x960++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x970++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x980++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x990++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9A0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9B0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
tree.end
tree "IB DDLL Short DQ Register"
group.long 0xA00++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA10++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA20++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA30++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA40++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA50++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA60++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA70++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA80++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA90++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAA0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAB0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xB00++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
group.long 0xB10++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
group.long 0xB20++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
group.long 0xB30++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
group.long 0xB40++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
group.long 0xB50++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
group.long 0xB60++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
group.long 0xB70++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
group.long 0xB80++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
group.long 0xB90++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
group.long 0xBA0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
group.long 0xBB0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
tree.end
textline "                 "
width 32.
group.long 0xBE0++0x03
line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3                              ,Programmed to IB Vref value for DQ of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE2                              ,Programmed to IB Vref value for DQ of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE1                              ,Programmed to IB Vref value for DQ of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE0                              ,Programmed to IB Vref value for DQ of BYTE0"
group.long 0xBE4++0x03
line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7                              ,Programmed to IB Vref value for DQ of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE6                              ,Programmed to IB Vref value for DQ of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE5                              ,Programmed to IB Vref value for DQ of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE4                              ,Programmed to IB Vref value for DQ of BYTE4"
group.long 0xBE8++0x03
line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3                              ,Programmed to IB Vref value for DQ of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_CMD2                              ,Programmed to IB Vref value for DQ of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_CMD1                              ,Programmed to IB Vref value for DQ of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_CMD0                              ,Programmed to IB Vref value for DQ of CMD0"
group.long 0xBF0++0x03
line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3                             ,Programmed to IB Vref value for DQS of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE2                             ,Programmed to IB Vref value for DQS of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE1                             ,Programmed to IB Vref value for DQS of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE0                             ,Programmed to IB Vref value for DQS of BYTE0"
group.long 0xBF4++0x03
line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7                             ,Programmed to IB Vref value for DQS of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE6                             ,Programmed to IB Vref value for DQS of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE5                             ,Programmed to IB Vref value for DQS of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE4                             ,Programmed to IB Vref value for DQS of BYTE4"
group.long 0xBF8++0x03
line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3                             ,Programmed to IB Vref value for DQS of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_CMD2                             ,Programmed to IB Vref value for DQS of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_CMD1                             ,Programmed to IB Vref value for DQS of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_CMD0                             ,Programmed to IB Vref value for DQS of CMD0"
textline "                                "
group.long 0xC00++0x03
line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1                           ,Programmed to CKE1 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE0                           ,Programmed to CKE0 trimmer value"
group.long 0xC04++0x03
line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3                           ,Programmed to CKE3 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE2                           ,Programmed to CKE2 trimmer value"
group.long 0xC08++0x03
line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5                           ,Programmed to CKE5 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE4                           ,Programmed to CKE4 trimmer value"
group.long 0xC0C++0x03
line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7                           ,Programmed to CKE7 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE6                           ,Programmed to CKE6 trimmer value"
group.long 0xC10++0x03
line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0                           ,Programmed to MISC0 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_RESET                           ,Programmed to RESET trimmer value"
group.long 0xC14++0x03
line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2                           ,Programmed to MISC2 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_MISC1                           ,Programmed to MISC1 trimmer value"
textline "                                "
group.long 0xC20++0x03
line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3                          ,Programmed to CKE3 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE2                          ,Programmed to CKE2 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE1                          ,Programmed to CKE1 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE0                          ,Programmed to CKE0 fine trimmer value"
group.long 0xC24++0x03
line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7                          ,Programmed to CKE7 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE6                          ,Programmed to CKE6 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE5                          ,Programmed to CKE5 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE4                          ,Programmed to CKE4 fine trimmer value"
group.long 0xC28++0x03
line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2                          ,Programmed to MISC2 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_MISC1                          ,Programmed to MISC1 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_MISC0                          ,Programmed to MISC0 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_RESET                          ,Programmed to RESET fine trimmer value"
textline "                                "
group.long 0xC30++0x07
line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control"
bitfld.long 0x00 27. " DISABLE_CFG_CMD3           ,CMD3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 26. "               DISABLE_CFG_CMD2           ,CMD2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " DISABLE_CFG_CMD1           ,CMD1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 24. "               DISABLE_CFG_CMD0           ,CMD0 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " DISABLE_CFG_BYTE7          ,BYTE7 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 22. "               DISABLE_CFG_BYTE6          ,BYTE6 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 21. " DISABLE_CFG_BYTE5          ,BYTE5 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 20. "               DISABLE_CFG_BYTE4          ,BYTE4 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " DISABLE_CFG_BYTE3          ,BYTE3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 18. "               DISABLE_CFG_BYTE2          ,BYTE2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 17. " DISABLE_CFG_BYTE1          ,BYTE1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 16. "               DISABLE_CFG_BYTE0          ,BYTE0 pad macro configuration read|write disable" "No,Yes"
line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW         ,Enable switch to low power regulator" "Disabled,Enabled"
textline "                                         "
endif
bitfld.long 0x04 16.--19. " VTT_VDDA_LVL               ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL              ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                VTT_VCLAMP_LVL             ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xC38++0x03
line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register"
bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL              ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                VTT_VAUXP_CTRL             ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL            ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xC3C++0x2F
line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL      ,BG current bias select" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 16.--17. "              DDLL_DDLL_BG_ILVL_CTRL     ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL       ,BANDGAP output current level control" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 8.--9. "              BG_ILVL_CTRL               ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
endif
bitfld.long 0x00 4.--6. " BG_SETUP                   ,Temperature coefficient control" "0,1,2,3,4,5,6,7"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "                 BGLP_E_PWRD                ,BGLP E PWRD" "0,1"
endif
textline "                                         "
bitfld.long 0x00 1. " BG_MODE                    ,Regulator mode" "High performance,Low power"
bitfld.long 0x00 0. "  BG_E_PWRD                  ,Power down regulator" "0,1"
line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads"
bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE        ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..."
bitfld.long 0x04 25. "  TX_E_DDLL_TCLK             ,TX E DDLL TCLK" "0,1"
textline "                                         "
bitfld.long 0x04 24. " E_TX_NMOS_DRVUP            ,E TX NMOS DRVUP" "0,1"
bitfld.long 0x04 20.--21. "                 TX_DCC_MODE                ,TX DCC mode" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 16.--17. " MEM_MODE                   ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..."
bitfld.long 0x04 13. "      TX_SEL_MV_CYCLE            ,Multi-voltage timing path timing closure" "1 cycle,2 cycles"
textline "                                         "
bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE      ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 9. "     E_PWRD                     ,DC current paths within entire brick cell disable" "Enabled,Disabled"
textline "                                         "
bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE      ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 0.--1. "     QUSE_MODE                  ,Pad quse mode" "0,1,2,3"
line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs"
bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL    ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 24.--25. "            DATA_DQ_TX_DRVDN_ZCTRL     ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL    ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 20.--21. "            DATA_DQ_TX_DRVUP_ZCTRL     ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL     ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 16.--17. "            CMD_DQ_TX_DRVDN_ZCTRL      ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL     ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 12.--13. "            CMD_DQ_TX_DRVUP_ZCTRL      ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL    ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 8.--9. "            DQ_RX_DRVDN_TERM_ZCTRL     ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL    ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 4.--5. "            DQ_RX_DRVUP_TERM_ZCTRL     ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL         ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 0.--1. "            CMD_TX_DRVUP_ZCTRL         ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick"
bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM          ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "                DQS_RX_DRVUP_TERM          ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM           ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                DQ_RX_DRVUP_TERM           ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick"
bitfld.long 0x10 8.--13. " CMD_TX_DRVDN               ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                CMD_TX_DRVUP               ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad"
bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL             ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 22. "                CMD_RX_E_DIRECT_ZI         ,Command RX E direct ZI" "0,1"
textline "                                         "
bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD        ,Command RX E IBIAS PWRD" "0,1"
bitfld.long 0x14 16.--20. "                 CMD_DQS_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON        ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x14 14. "          CMD_DQ_RX_E_RDIV           ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE       ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x14 12. "          CMD_DQS_RX_E_DIFF_MODE     ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL    ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 4.--5. "                 CMD_DQS_RX_MODE            ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE             ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad"
bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 22. "                DATA_RX_E_DIRECT_ZI        ,Data RX E Direct ZI" "0,1"
textline "                                         "
bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD       ,Data RX E IBIAS PWRD" "0,1"
bitfld.long 0x18 16.--20. "                 DATA_DQS_RX_CTRL           ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON       ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x18 14. "          DATA_DQ_RX_E_RDIV          ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE      ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x18 12. "          DATA_DQS_RX_E_DIFF_MODE    ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL   ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4.--5. "                 DATA_DQS_RX_MODE           ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE            ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad"
bitfld.long 0x1C 13. " CMD_E_PWRD_RX              ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x1C 12. "          CMD_DDLL_QU_SEL_M2CLK      ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE      ,Command DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x1C 4.--5. "        CMD_DQSP_RX_TERM_MODE      ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE        ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad"
bitfld.long 0x20 13. " DATA_E_PWRD_RX             ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x20 12. "          DATA_DDLL_QU_SEL_M2CLK     ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE     ,Data DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x20 4.--5. "        DATA_DQSP_RX_TERM_MODE     ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE       ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad"
bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON      ,Command DQS TX drive force on" "0,1"
bitfld.long 0x24 26. "                 CMD_DQ_TX_DRVFORCEON       ,Command DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON      ,Command command TX drive force on" "0,1"
bitfld.long 0x24 24. "                 CMD_CMD_TX_E_DCC           ,Command command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 20. "          CMD_DQSN_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC          ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x24 14.--15. "          CMD_DQS_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 12. "          CMD_DQSP_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 9. "     CMD_DQSP_TX_E_DCC          ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 8. " CMD_DQS_E_IVREF            ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x24 6.--7. "          CMD_DQ_TX_EBOOST_PU_MODE   ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU           ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 4. "          CMD_DQ_TX_E_WKPD           ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE   ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 1. "     CMD_DQ_TX_E_DCC            ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 0. " CMD_DQ_E_IVREF             ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad"
bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON     ,Data DQS TX drive force on" "0,1"
bitfld.long 0x28 26. "                 DATA_DQ_TX_DRVFORCEON      ,Data DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON     ,Data command TX drive force on" "0,1"
bitfld.long 0x28 24. "                 DATA_CMD_TX_E_DCC          ,Data command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 20. "          DATA_DQSN_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC         ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x28 14.--15. "          DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 12. "          DATA_DQSP_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 9. "     DATA_DQSP_TX_E_DCC         ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 8. " DATA_DQS_E_IVREF           ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x28 6.--7. "          DATA_DQ_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU          ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 4. "          DATA_DQ_TX_E_WKPD          ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 1. "     DATA_DQ_TX_E_DCC           ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 0. " DATA_DQ_E_IVREF            ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks"
bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN        ,Command DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 2. "                 CMD_DQ_TX_BPSDYNEN         ,Command DQ TX BPSDYNEN" "0,1"
textline "                                         "
bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN       ,Data DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 0. "                 DATA_DQ_TX_BPSDYNEN        ,Data DQ TX BPSDYNEN" "0,1"
sif (cpuis("TEGRAX2"))
group.long 0xC6C++0x03
line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register"
hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD          ,DSR VTT VDDA Load"
bitfld.long 0x00 0.--3. "                DSR_VTT_VDDA_LVL           ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC70++0x0B
line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick"
bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN          ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                DATA_DQS_TX_DRVUP          ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN           ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                DATA_DQ_TX_DRVUP           ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick"
bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN           ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                CMD_DQS_TX_DRVUP           ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN            ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                CMD_DQ_TX_DRVUP            ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs"
bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS          ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "          E_CAL_UPDATE_HIGH          ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY         ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
group.long 0xCE0++0x0B
line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves"
hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL                             ,Calibration value"
line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values"
bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN              ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 27. "            CMD_DDLL_OFFSET_BYTE_RXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 25. "            CMD_DDLL_OFFSET_BYTE_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 23. "            CMD_DDLL_OFFSET_BIT_RXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 21. "            CMD_DDLL_OFFSET_BIT_TXDQS_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 16. "            DATA_DDLL_OFFSET_BYTE_QU_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 14. "            DATA_DDLL_OFFSET_BYTE_TXCMD_EN          ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 12. "            DATA_DDLL_OFFSET_BYTE_TXDQ_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 10. "            DATA_DDLL_OFFSET_BIT_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 8. "            DATA_DDLL_OFFSET_BIT_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 0.--5. " DDLL_OFFSET                             ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training"
bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN     ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 27. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 25. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 23. "            CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 21. "            CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 16. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 14. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 12. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 10. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 8. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET                    ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0xCEC++0x03
line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0"
bitfld.long 0x00 0. " SEL_NEG_IB                              ,Select negative edge flop as output" "Disabled,Enabled"
endif
group.long 0xCF0++0x0F
line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register"
hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD                           ,VTT VDDA Load"
hexmask.long.byte 0x00 8.--15. 1. "                  VTT_VAUXP_LOAD                          ,VTT VAUXP Load"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD                         ,VTT VCLAMP Load"
line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3"
hexmask.long.word 0x04 0.--10. 1. " IB_RXRT                                 ,Programmed to IB DQ receive path retiming"
line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0"
bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
textline "                                         "
bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
bitfld.long 0x08 2. "            CH0_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
textline "                                         "
bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
bitfld.long 0x08 0. "                   CH0_TRAINING_ENABLED                    ,Channel 0 training enable" "Disabled,Enabled"
line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1"
bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
bitfld.long 0x0C 3. "           CH1_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
bitfld.long 0x0C 1. "         CH1_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
textline "                                         "
bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED                    ,Channel 1 training enable" "Disabled,Enabled"
tree.end
width 27.
tree "TRAINING Registers"
group.long 0xE00++0x03
line.long 0x00 "CMD_0,Main Register For Launching Training"
bitfld.long 0x00 31. " GO                   ,Start training" "Not started,Started"
bitfld.long 0x00 30. "    PERIODIC             ,Start periodic training" "Not started,Started"
bitfld.long 0x00 8. "    QUSE_VREF      ,Initiates DQS_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 7. "   RD_VREF           ,Initiates IB_DQ_VREF training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 6. " WR_VREF              ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 5. "  CA_VREF              ,Initiates CA_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 4. "  QUSE           ,Initiates QUSE training" "Not initiated,Initiated"
bitfld.long 0x00 3. "   WR                ,Initiates WR training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 2. " RD                   ,Initiates RD training" "Not initiated,Initiated"
bitfld.long 0x00 1. "  CA                   ,Initiates CA training" "Not initiated,Initiated"
bitfld.long 0x00 0. "  PRIME          ,Writes the custom pattern into MPC register" "Disabled,Enabled"
if ((per.l(ad:0x02C60000+0xE04)&0x00010000)==0x00010000)
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Rank to train" "RANK0,RANK1"
bitfld.long 0x00 13. "           UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
else
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0"
bitfld.long 0x00 13. "  UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
endif
rgroup.long 0xE08++0x03
line.long 0x00 "STATUS_0,Read Back For Training Status"
bitfld.long 0x00 0.--1. " STATUS               ,Training status" "Done,Running,Error,?..."
group.long 0xE0C++0x3F
line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep"
bitfld.long 0x00 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x00 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x00 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x00 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x00 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x00 10.--18. 1. "           MAXIMUM              ,Maximum"
hexmask.long.word 0x00 0.--8. 1. "           MINIMUM        ,Minimum"
line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep"
bitfld.long 0x04 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x04 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x04 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x04 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x04 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x04 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x04 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x04 10.--19. 1. "           MAXIMUM              ,2's complement"
hexmask.long.word 0x04 0.--9. 1. "           MINIMUM        ,2' complement"
line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training"
hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x08 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x08 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x08 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x08 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x08 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x08 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x08 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep"
bitfld.long 0x0C 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x0C 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x0C 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x0C 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x0C 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x0C 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x0C 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x0C 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x0C 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x0C 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep"
hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x10 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x10 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x10 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x10 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x10 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x10 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x10 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep"
bitfld.long 0x14 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x14 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x14 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x14 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x14 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep"
bitfld.long 0x18 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x18 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x18 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x18 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x18 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x18 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x18 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x18 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x18 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x18 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x18 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep"
hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x1C 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x1C 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x1C 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x1C 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x1C 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x1C 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x1C 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep"
bitfld.long 0x20 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x20 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x20 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x20 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x20 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep"
bitfld.long 0x24 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x24 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x24 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x24 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x24 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x24 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x24 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x24 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x24 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x24 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x24 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep"
hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x28 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x28 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x28 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x28 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x28 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x28 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x28 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep"
hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT             ,Number of NOPs between 2 CA training reads"
line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training"
bitfld.long 0x30 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x30 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x30 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x30 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x30 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep"
bitfld.long 0x34 31. " TADR_ENABLE          ,Set to disabled" "Disabled,?..."
hexmask.long.byte 0x34 12.--19. 1. "       TADR_MAX             ,Maximum tADR allowed in tCK"
hexmask.long.word 0x34 0.--11. 1. "             TADR_SETTING   ,CA BRLSHFT + CA trimmer during tADR training"
line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK"
hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY          ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 16.--23. 1. "             PRIV_DELAY           ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 8.--15. 1. "             SHORT_TRIMMER  ,Settle time for short trimmer"
hexmask.long.byte 0x38 0.--7. 1. "              LONG_TRIMMER      ,Settle time for long trimmer"
line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers"
bitfld.long 0x3C 24.--27. " WINDOW_LIMIT         ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 0.--7. 1. "             SELECT               ,Specifies output on DQ registers"
group.long 0xE5C++0x13
line.long 0x00 "MPC_0,MPC-RD Registers Data"
hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN       ,Invert pattern"
hexmask.long.word 0x00 0.--15. 1. "           DATA                 ,Data"
line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM"
bitfld.long 0x04 31. " WRITE                ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered"
bitfld.long 0x04 16.--19. "  FORMAT               ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 0x01 "             SELECT_OFFSET  ,Location to write in pattern RAM"
line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM"
line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM"
line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK"
hexmask.long.word 0x10 16.--31. 1. " OB                   ,Settle time for WRITE|CA Vrefs"
hexmask.long.word 0x10 0.--15. 1. "           IB                   ,Settle time for READ|QUSE Vrefs"
sif (cpuis("TEGRAX2"))
group.long 0xE98++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xE9C++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA0++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA4++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA8++0x03
line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEAC++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB0++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB4++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB8++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEBC++0x03
line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0xEC0++0x07
line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results"
hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 16.--23. 1. "             RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 0.--7. 1. "             RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results"
hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 16.--23. 1. "             RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 0.--7. 1. "             RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
group.long 0xED0++0x03
line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep"
bitfld.long 0x00 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x00 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x00 0.--7. 1. "             MINIMUM              ,Minimum"
tree.end
width 0x0B
tree.end
tree "EMC0"
base ad:0x02C70000
width 21.
group.long 0x00++0x13
line.long 0x00 "INSTATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT           ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  ECC_ERR_BUF_OVF_INT              ,ECC Error Buffer overflow" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 11. "   ECC_CORR_ERR_INT              ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  ECC_UNCORR_ERR_INT               ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt"
textline "                            "
textfld "  "
endif
eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT          ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt"
eventfld.long 0x00 8. "  CCFIFO_OVERFLOW_INT              ,Clock change FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 7. "   DLL_ALARM_INT                ,Indicate DLL alarm has been set" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 6. "   ACCESS_TO_SR_DPD_DEV_INT      ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt"
eventfld.long 0x00 5. "  MRR_DIVLD_INT                    ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt"
eventfld.long 0x00 4. "   CLKCHANGE_COMPLETE_INT       ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 3. "   REFRESH_OVERFLOW_INT          ,Refresh request overflow timeout" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK       ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "      ECC_ERR_BUF_OVF_INTMASK          ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 11. "   ECC_CORR_ERR_INTMASK          ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "      ECC_UNCORR_ERR_INTMASK           ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                            "
textfld "  "
endif
bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK      ,Mask for DLL lock timeout interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "      CCFIFO_OVERFLOW_INTMASK          ,Mask for clock change FIFO overflow" "Masked,Unmasked"
bitfld.long 0x04 7. "       DLL_ALARM_INTMASK            ,Indicate DLL alarm has been set" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 6. "   ACCESS_TO_SR_DPD_DEV_INTMASK  ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
bitfld.long 0x04 5. "      MRR_DIVLD_INTMASK                ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "       CLKCHANGE_COMPLETE_INTMASK   ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 3. "   REFRESH_OVERFLOW_INTMASK      ,Mask for refresh request overflow timeout" "Masked,Unmasked"
line.long 0x08 "DBG_0,Debug Register"
bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP           ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled"
bitfld.long 0x08 30. "      WRITE_ACTIVE_ONLY                ,Write active version of the register only" "Disabled,Enabled"
bitfld.long 0x08 29. "       ALLOW_HOSTIF_DURING_CCFIFO   ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 28. "   ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled"
bitfld.long 0x08 26.--27. "      CFG_SWAP                         ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..."
bitfld.long 0x08 25. "  AUTOCAL_ALLOW_WRITE_MUX      ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24. "   CFG_PRIORITY                  ,Priority of cfg accesses to the DRAM" "Disabled,Enabled"
bitfld.long 0x08 13. "      SUPPRESS_WRITE_CMD               ,Suppress write command sent to DRAM" "Disabled,Enabled"
bitfld.long 0x08 12. "       SUPPRESS_READ_CMD            ,Suppress read command sent to DRAM" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 11. "   STRETCH_MRW_RESET             ,Stretch MRW RESET command to three clocks" "Disabled,Enabled"
bitfld.long 0x08 10. "      AP_REQ_BUSY_CTRL                 ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled"
bitfld.long 0x08 9. "       READ_DQM_CTRL                ,DQM signal control" "Managed,Always on"
textline "                            "
bitfld.long 0x08 2. "   FORCE_UPDATE                  ,Active state update enable" "Disabled,Enabled"
bitfld.long 0x08 1. "      WRITE_MUX                        ,Controls state of the writes to the configuration registers" "Assembly,Active"
bitfld.long 0x08 0. "       READ_MUX                     ,Controls state of the reads to the configuration registers" "Active,Assembly"
line.long 0x0C "CFG_0,Configuration Register"
bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD               ,DRAM clock stop (power down)" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DRAM_CLKSTOP_SR                  ,DRAM clock stop (self-refresh)" "Disabled,Enabled"
bitfld.long 0x0C 29. "       DRAM_ACPD                    ,Opportunistic active power down for DRAM controller" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 28. "   DYN_SELF_REF                  ,DYN_SELF_REF" "Disabled,Enabled"
bitfld.long 0x0C 26. "      REQACT_ASYNC                     ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled"
bitfld.long 0x0C 25. "       AUTO_PRE_WR                  ,MC auto-precharge indication for writes" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 24. "   AUTO_PRE_RD                   ,MC auto-precharge indication for reads" "Disabled,Enabled"
bitfld.long 0x0C 23. "      MAN_PRE_WR                       ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled"
bitfld.long 0x0C 22. "       MAN_PRE_RD                   ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 21. "   PERIODIC_QRST                 ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. "      WAIT_FOR_NVDISPLAY_READY_B4_CC   ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 18. "   DSR_VTTGEN_DRV_EN             ,Enable VTTGEN controls during DSR" "Disabled,Enabled"
bitfld.long 0x0C 16.--17. "      EMC2MC_CLK_RATIO                 ,EMC to MC clock ratio" "2x,1x,4x,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 9. "             WAIT_FOR_ISP2B_READY_B4_CC   ,Wait for isp2b ready event" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 8. "   WAIT_FOR_VI2_READY_B4_CC      ,Wait for vi2 ready event" "Disabled,Enabled"
bitfld.long 0x0C 7. "      WAIT_FOR_ISP2_B4_CC              ,Wait for isp2 ready event" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 6. "   INVERT_DQM                    ,Invert DQM polarity" "Not inverted,Inverted"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 5. "  WAIT_FOR_DISPLAYB_READY_B4_CC    ,Wait for display ready event" "Disabled,Enabled"
bitfld.long 0x0C 4. "       WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled"
endif
line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]"
bitfld.long 0x10 0. " EMEM_NUMDEV                   ,Number of populated DRAM devises" "N1,N2"
group.long 0x20++0x07
line.long 0x00 "REFCTRL_0,Refresh Control Register"
bitfld.long 0x00 31. " REF_VALID                     ,Enable refresh controller" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DEVICE_REFRESH_DISABLE           ,Refresh disable to individual attached device" "0,1,2,3"
line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins"
bitfld.long 0x04 17. " PIN_GPIO_EN[1]                ,General purpose DRAM I/O[1] enable" "Disabled,Enabled"
bitfld.long 0x04 16. "      PIN_GPIO_EN[0]                   ,General purpose DRAM I/O[0] enable" "Disabled,Enabled"
bitfld.long 0x04 13. "       PIN_GPIO[1]                  ,General purpose DRAM I/O[1] activate" "Inactive,Active"
textline "                            "
bitfld.long 0x04 12. "   PIN_GPIO[0]                   ,General purpose DRAM I/O[0] activate" "Inactive,Active"
bitfld.long 0x04 8. "      PIN_RESET                        ,DDR3 RESET# pin level" "Active,Inactive"
bitfld.long 0x04 4. "       PIN_DQM                      ,Used to always mask DRAM writes" "Normal,Inactive"
textline "                            "
bitfld.long 0x04 2. "   PIN_CKE_PER_DEV               ,Per device CKE enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      PIN_CKEB                         ,Level of the CKEB pin" "Power down,Normal"
bitfld.long 0x04 0. "     PIN_CKE                      ,Level of the CKE pin" "Power down,Normal"
textline "                            "
group.long 0x28++0x93
line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers"
bitfld.long 0x00 0. " TIMING_UPDATE             ,Timing update event" "Disabled,Enabled"
line.long 0x04 "RC_0,DRAM RC Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RC                        ,Row cycle time"
line.long 0x08 "RFC_0,DRAM RFC Timing Parameter"
hexmask.long.word 0x08 0.--9. 1. " RFC                       ,Auto refresh cycle time"
line.long 0x0C "RAS_0,DRAM RAS Timing Parameter"
bitfld.long 0x0C 0.--5. " RAS                       ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "RP_0,DRAM RP Timing Parameter"
bitfld.long 0x10 0.--5. " RP                        ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "R2W_0,DRAM R2W Timing Parameter"
bitfld.long 0x14 0.--5. " R2W                       ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "W2R_0,DRAM W2R Timing Parameter"
bitfld.long 0x18 0.--5. " W2R                       ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "R2P_0,DRAM R2P Timing Parameter"
bitfld.long 0x1C 0.--5. " R2P                       ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "W2P_0,DRAM W2P Timing Parameter"
hexmask.long.byte 0x20 0.--6. 1. " W2P                       ,Write to precharge commands for the same bank number of cycles"
line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter"
bitfld.long 0x24 0.--5. " RD_RCD                    ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter"
bitfld.long 0x28 0.--5. " WR_RCD                    ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x2C "RRD_0,DRAM RRD Timing Parameter"
bitfld.long 0x2C 0.--4. " RRD                       ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "REXT_0,DRAM REXT Timing Parameter"
bitfld.long 0x30 0.--4. " REXT                      ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x34 "WDV_0,DRAM WDV Timing Parameter"
bitfld.long 0x34 0.--5. " WDV                       ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..."
line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter"
bitfld.long 0x38 0.--5. " QUSE                      ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "QRST_0,DRAM QRST Timing Parameter"
bitfld.long 0x3C 16.--20. " QRST_DURATION             ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x3C 0.--6. 1. "      QRST                   ,Time from expiration of QSAFE until reset is issued"
line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter"
hexmask.long.byte 0x40 0.--6. 1. " QSAFE                     ,Time from a read command to when it is safe to issue a QRST"
line.long 0x44 "RDV_0,DRAM RDV Timing Parameter"
hexmask.long.byte 0x44 0.--6. 1. " RDV                       ,Time from read command to latching the read data from the pad macros"
line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter"
hexmask.long.word 0x48 6.--15. 1. " REFRESH                   ,Interval between refresh requests"
bitfld.long 0x48 0.--5. "           REFRESH_LO             ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count"
bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM         ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..."
line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter"
bitfld.long 0x50 0.--5. " PDEX2WR                   ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter"
bitfld.long 0x54 0.--5. " PDEX2RD                   ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter"
bitfld.long 0x58 0.--5. " PCHG2PDEN                 ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter"
bitfld.long 0x5C 0.--5. " ACT2PDEN                  ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter"
hexmask.long.word 0x60 0.--8. 1. " AR2PDEN                   ,Timing delay from an autorefresh command to power down entry"
line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter"
hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN                   ,Timing delay from a read/write command to power down entry"
line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter"
hexmask.long.word 0x68 0.--9. 1. " TXSR                      ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL"
line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter"
bitfld.long 0x6C 0.--5. " TCKE                      ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter"
hexmask.long.byte 0x70 0.--6. 1. " TFAW                      ,Width of the FAW for 8-bank devices"
line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter"
bitfld.long 0x74 0.--5. " TRPAB                     ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter"
hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE                ,Minimum number of cycles of a stable clock period"
line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter"
bitfld.long 0x7C 0.--4. " TCLKSTOP                  ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter"
hexmask.long.word 0x80 0.--13. 1. " TREFBW                    ,Width of the burst-refresh window"
line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter"
bitfld.long 0x84 0.--3. " TPPD                      ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x88 "ODT_WRITE_0,ODT Write Control"
bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE   ,ODT enable during write" "Disabled,Enabled"
bitfld.long 0x88 8.--11. "       ODT_WR_DURATION        ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x88 5. "        SHARE_ONE_ODT                        ,Share one ODT" "Disabled,Enabled"
textline "                            "
bitfld.long 0x88 4. "   DRIVE_BOTH_ODT            ,ODTs' assertion for the requested or both devices" "Requested,Both"
bitfld.long 0x88 0.--3. "      ODT_WR_DELAY           ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter"
hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR                  ,Precharge-precharge delay"
line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter"
bitfld.long 0x90 0.--4. " WEXT                      ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0xBC++0x03
line.long 0x00 "TRTM_0,TRTM Timing Parameter"
hexmask.long.byte 0x00 0.--6. 1. " TRTM                      ,Read to MRW delay"
group.long 0xF8++0x07
line.long 0x00 "TWTM_0,TWTM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWTM                      ,Read to MRW/MRR delay"
line.long 0x04 "TRATM_0,TRATM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TRATM                     ,Read with AP to MRW/MRR delay"
group.long 0x108++0x07
line.long 0x00 "TWATM_0,TWATM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWATM                     ,Read with AP to MRW/MRR delay"
line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR2REF                    ,Read to refresh delay"
endif
group.long 0xC0++0x03
line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter"
hexmask.long.word 0x00 0.--8. 1. " RFS_SLR                   ,Stagger refresh cycle time between ranks"
group.long 0xC4++0x1B
line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT         ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command"
hexmask.long.word 0x00 0.--9. 1. "           MRS_EXT1_WAIT_CNT      ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command"
line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT         ,Number of EMC clocks to wait [MRS long command]"
hexmask.long.word 0x04 0.--9. 1. "           MRS_SHORT_WAIT_CNT     ,Number of EMC clocks to wait [MRS short command]"
line.long 0x08 "MRS_0,Command Trigger For MRS"
bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "   USE_MRS_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   MRS_BA                    ,Registers to be addressed in DRAM" "MRS,?..."
hexmask.long.word 0x08 0.--13. 1. "            MRS_ADR                ,Mode-register data to be written"
line.long 0x0C "EMRS_0,Command Trigger For EMRS"
bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "   USE_EMRS_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS_BA                   ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS_ADR               ,Mode-register data to be written"
line.long 0x10 "REF_0,Command Trigger For Refresh"
bitfld.long 0x10 30.--31. " REF_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
hexmask.long.word 0x10 8.--18. 1. "   REF_NUM                ,Number of refresh cycles (REF_NUM+1)"
textline "                            "
bitfld.long 0x10 1. "   REF_NORMAL                ,Refresh execution mechanism" "Immediate,Normal"
bitfld.long 0x10 0. "      REF_CMD                ,Refresh to all DRAM banks" "Disabled,Enabled"
line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL"
bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x14 0. "   PRE_CMD                ,PRECHARGE to all DRAM banks" "Disabled,Enabled"
line.long 0x18 "NOP_0,Command Trigger For NOP"
bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x18 0. "   NOP_CMD                ,NOP to all DRAM banks" "Disabled,Enabled"
if ((per.l(ad:0x02C70000+0xE0)&0x1)==0x1)
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 8. "   ACTIVE_SELF_REF        ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High"
bitfld.long 0x00 0. "      SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
else
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 0. "                                    SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
endif
group.long 0xE4++0x13
line.long 0x00 "DPD_0,Command Trigger For DPD"
bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x00 0. "   DPD_CMD                ,Issue a deep power down command" "Disabled,Enabled"
line.long 0x04 "MRW_0,Command Trigger For MRW"
bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x04 26.--27. "   USE_MRW_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x04 16.--23. 0x01 "   MRW_MA                    ,Register address"
hexmask.long.byte 0x04 0.--7. 1. "             MRW_OP                 ,Data to be written"
line.long 0x08 "MRR_0,Command Trigger For MRR"
bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN           ,Active-low chip-select" "Illegal,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "        USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x08 16.--23. 0x01 "   MRR_MA                    ,Register address"
hexmask.long.word 0x08 0.--15. 1. "             MRR_OP                 ,Data returned"
line.long 0x0C "CMDQ_0,Command QUEUE Depth Register"
bitfld.long 0x0C 24.--28. " RW_WD_DEPTH               ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--14. "             PRE_DEPTH              ,Pre depth" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x0C 8.--10. "   ACT_DEPTH                 ,Act depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--4. "              RW_DEPTH               ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register"
bitfld.long 0x10 24.--27. " MCWD_DEPTH                ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--10. "             MCACT_DEPTH            ,MCACT depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "         MCREQ_DEPTH                          ,MCREQ depth" "0,1,2,3,4,5,6,7"
group.long 0x100++0x07
line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register"
hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3          ,Config FBIO spare 3"
hexmask.long.byte 0x00 16.--23. 1. "             CFG_FBIO_SPARE_2       ,Config FBIO spare 2"
hexmask.long.byte 0x00 8.--15. 1. "        CFG_FBIO_SPARE_1                     ,Config FBIO spare 1"
textline "                            "
hexmask.long.byte 0x00 2.--7. 1. "   CFG_FBIO_SPARE_0          ,Config FBIO spare 0"
bitfld.long 0x00 1. "             CFG_ADR_EN             ,Write once after powering up EMC" "Disabled,Enabled"
bitfld.long 0x00 0. "  CFG_SWAP_DLL                         ,Config swap DLL" "0,1"
line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register"
bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO   ,Drive data bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 30. "       DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 28. "  MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. "   CMD_BUS_RETURN_TO_ZERO    ,Drive command bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 26. "       CMD_BUS_RETURN_TO_ONE  ,Drives the command bus back to a one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 25. "  LPDDR3_DRAM                          ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 24. "   LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "       ERR_RD_BUBBLE          ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x04 13.--15. "   EMC2PMACRO_CFG_QUSE_MODE  ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..."
bitfld.long 0x04 12. "  CMD_2T_TIMING          ,2T command timing" "Disabled,Enabled"
bitfld.long 0x04 10. "  DISABLE_CONCURRENT_AUTOPRE           ,Disable reads/writes to a device until precharge command" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 8. "   CMD_TX_EN                 ,Controls TX_EN on the command bricks" "No,Yes"
bitfld.long 0x04 4. "            DRAM_                  ,DRAM width" "X32,X64"
bitfld.long 0x04 2.--3. "       DRAM_BURST                           ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16"
textline "                            "
bitfld.long 0x04 0.--1. "   DRAM_TYPE                 ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2"
sif (cpuis("TEGRAX2"))
group.long 0x110++0x07
line.long 0x00 "ACT_0,Command Trigger: Act"
bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN        ,Active low chip-select" "0,1,2,3"
bitfld.long 0x00 23.--25. "              SW_ACT_BANK            ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--15. 1. "         SW_ACT_ROW                           ,Row number to be activated"
line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done"
bitfld.long 0x04 0. " MEM_INIT_DONE             ,This bit is set by boot sequence when DRAM initiation is done" "0,1"
endif
group.long 0x114++0x0B
line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register"
bitfld.long 0x00 0.--2. " CFG_QUSE_LATE             ,FBIO configuration register" "0,1,2,3,4,5,6,7"
line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter"
bitfld.long 0x04 0.--5. " PDEX2CKE                  ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter"
bitfld.long 0x08 0.--5. " CKE2PDEN                  ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hgroup.long 0x120++0x03
hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved"
group.long 0x124++0x1F
line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD"
hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD            ,Number of idle cycles to wait before allowing power-down entry"
line.long 0x04 "MPC_0,MPC CMD (LP4 Only)"
bitfld.long 0x04 30.--31. " MPC_DEV                   ,SELECTN" "0,1,2,3"
bitfld.long 0x04 26.--27. "              MPC_SUBP_SELECTN       ,Active-low subchannel select" "Both,Subp1,Subp0,?..."
bitfld.long 0x04 9. "     MPC_WR                               ,Send CAS2 (required for FIFO WR)" "Not send,Send"
textline "                            "
bitfld.long 0x04 8. "   MPC_RD                    ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send"
bitfld.long 0x04 7. "       MPC_CAS2               ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send"
hexmask.long.byte 0x04 0.--6. 1. "  MPC_OP                               ,MPC OP code"
line.long 0x08 "EMRS2_0,EMRS2 Command Trigger"
bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "           USE_EMRS2_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   EMRS2_BA                  ,EMRS2 BA" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x08 0.--13. 1. "          EMRS2_ADR              ,Mode register data to be written"
line.long 0x0C "EMRS3_0,EMRS3 Command Trigger"
bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "           USE_EMRS3_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS3_BA                  ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS3_ADR              ,Mode register data to be written"
line.long 0x10 "MRW2_0,MRW2 Command Trigger"
bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x10 26.--27. "           USE_MRW2_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x10 16.--23. 0x01 "   MRW2_MA                   ,Register address"
hexmask.long.byte 0x10 0.--7. 1. "             MRW2_OP                ,Data to be written"
line.long 0x14 "MRW3_0,MRW3 Command Trigger"
bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x14 26.--27. "           USE_MRR_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x14 16.--23. 0x01 "   MRW3_MA                   ,Register address"
hexmask.long.byte 0x14 0.--7. 1. "             MRW3_OP                ,Data to be written"
line.long 0x18 "MRW4_0,MRW4 Command Trigger"
bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x18 26.--27. "           USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x18 16.--23. 0x01 "   MRW4_MA                   ,Register address"
hexmask.long.byte 0x18 0.--7. 1. "             MRW4_OP                ,Data to be written"
line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register"
bitfld.long 0x1C 31. " OBS_BUS_CLKEN             ,OBS bus clock enable" "Disabled,Enabled"
bitfld.long 0x1C 8. "       PAD_CONFIG_OVR         ,Pad config override" "Disabled,Enabled"
bitfld.long 0x1C 7. "  TR_CLKEN_OVR                         ,TR clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 6. "   STATS_CLKEN_OVR           ,Stats clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 3. "       RR_CLKEN_OVR           ,RR clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 2. "  DRAMC_CLKEN_OVR                      ,DRAMC clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 1. "   CMDQ_CLKEN_OVR            ,CMDQ clock enable override" "Disabled,Enabled"
group.long 0x144++0x1B
line.long 0x00 "R2R_0,R2R_0 Timing Parameter"
bitfld.long 0x00 0.--3. " R2R                       ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter"
bitfld.long 0x04 0.--3. " W2W                       ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter"
bitfld.long 0x08 0.--5. " EINPUT                    ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter"
bitfld.long 0x0C 0.--5. " EINPUT_DURATION           ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter"
bitfld.long 0x10 0.--5. " RXTERM                    ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter"
bitfld.long 0x14 0.--5. " TCKESR                    ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "TPD_0,TPD_0 Timing Parameter"
bitfld.long 0x18 0.--5. " TPD                       ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
width 23.
group.long 0x2A4++0x07
line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads"
rbitfld.long 0x00 31. " AUTO_CAL_START                             ,Starts a complete autocal cycle with measure FSM" "Not started,Started"
bitfld.long 0x00 30. "            AUTO_CAL_COMP_PAD_FLIP                     ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE                            ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled"
bitfld.long 0x00 25.--28. "               AUTO_CAL_NUM_SAMPLES                       ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK                        ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled"
bitfld.long 0x00 19.--23. "               AUTO_CAL_WAIT_AFTER_EN                     ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                              ,Autocal measure step interval" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 11.--15. "                      AUTO_CAL_UPDATE_DELAY                      ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL                      ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled"
bitfld.long 0x00 9. "               AUTO_CAL_MEASURE_STALL                     ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 7. "               AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START                      ,Triggers an autocal update FSM cycle" "Disabled,Enabled"
rbitfld.long 0x00 1. "               AUTO_CAL_TRANSFER_START                    ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START                     ,Triggers an autocal compute FSM cycle" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval"
hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL                          ,Calibration interval value"
rgroup.long 0x2AC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN                       ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF0_DRVUP                       ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1"
bitfld.long 0x00 8. "                      AUTO_CAL_PU_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_ACTIVE                            ,Autocal activity status" "Inactive,Active"
bitfld.long 0x00 3. "               AUTO_CAL_UPDATE_ACTIVE                     ,Autocal update activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE                   ,Autocal transfer activity status" "Inactive,Active"
bitfld.long 0x00 1. "               AUTO_CAL_COMPUTE_ACTIVE                    ,Autocal compute activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE                    ,Autocal measure activity status" "Inactive,Active"
sif (cpuis("TEGRAX2"))
group.long 0x3D4++0x03
line.long 0x00 "AUTO_CAL_STATUS2_0,AUTOCAL Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x2B0++0x03
line.long 0x00 "REQ_CTRL_0,Request Status/Control"
bitfld.long 0x00 1. " STALL_ALL_WRITES                           ,Stall incoming write transactions" "Allow,Stall"
bitfld.long 0x00 0. "                  STALL_ALL_READS                            ,Stall incoming read transactions" "Allow,Stall"
rgroup.long 0x2B4++0x03
line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status"
bitfld.long 0x00 27. " ACPD_FSM_IDLE[1]                           ,Device[1] power-down FSM is idle" "No,Yes"
bitfld.long 0x00 26. "                    ACPD_FSM_IDLE[0]                           ,Device[0] power-down FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 25. " DSR_FSM_IDLE[1]                            ,Device[1] dynamic self refresh FSM is idle" "No,Yes"
bitfld.long 0x00 24. "                    DSR_FSM_IDLE[0]                            ,Device[0] dynamic self refresh FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 23. " TIMING_UPDATE_STALLED                      ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed"
bitfld.long 0x00 22. "          ZQ_FSM_IDLE                                ,Indicate auto ZQ state machine is idle" "Not idle,Idle"
textline "                                "
bitfld.long 0x00 21. " CFG_ZQ_ACTIVE                              ,Indicates ZQ configuration access is active" "Not active,Active"
bitfld.long 0x00 20. "             MRR_DIVLD                                  ,MRR data available for reading" "Not available,Available"
textline "                                "
bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE                             ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13. "                     DRAM_IN_DPD_DEV[1]                         ,Device[1] in deep powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0]                         ,Device[0] in deep powerdown state" "No,Yes"
bitfld.long 0x00 11. "                    DRAM_IN_ACTIVE_SELF_REFRESH[1]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
bitfld.long 0x00 9. "                    DRAM_IN_SELF_REFRESH_DEV[1]                ,Device[1] in active self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0]                ,Device[0] in active self-refresh" "No,Yes"
bitfld.long 0x00 5. "                    DRAM_IN_POWERDOWN_DEV[1]                   ,Device[1] in powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0]                   ,Device[0] in powerdown state" "No,Yes"
bitfld.long 0x00 2. "                    NO_OUTSTANDING_TRANSACTIONS                ,All non-stalled requests complete status" "Not completed,Completed"
textline "                                "
bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY                         ,Request FIFO is empty" "Not empty,Empty"
group.long 0x2B8++0x03
line.long 0x00 "CFG_2_0,EMC Configuration"
bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT                           ,Gives priority to activates" "Disabled,Enabled"
bitfld.long 0x00 30. "               IGNORE_MC_A_BUS                            ,Ignore the MC *_A_* bus" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE         ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled"
bitfld.long 0x00 28. "               DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE     ,Don't clear timing counters when clock change happen" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY                        ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check"
bitfld.long 0x00 25. "  ALLOW_REF_DURING_CC_PRE_EXE                ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 24. " DSR_STUTTER_ENABLE                         ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled"
bitfld.long 0x00 23. "               CHK_PDEX2RD_TO_START_WR                    ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR"
textline "                                "
bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF                    ,Always generate precharge all bank after refresh" "Disabled,Enabled"
bitfld.long 0x00 20. "               COMBINED_INTERRUPT_MODE                    ,Interrupt mode" "Combined,Independent"
textline "                                "
bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR                        ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled"
bitfld.long 0x00 11. "               DIS_CNTR_WITH_CFG_TIMING_UPDATE            ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled"
textline "                                "
bitfld.long 0x00 7. " EARLY_TRFC_8_CLK                           ,Early TRFC" "16 clocks,8 clocks"
bitfld.long 0x00 3.--5. "              ZQ_EXTRA_DELAY                             ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x00 2. " REF_AFTER_SREF                             ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLKCHANGE_PD_ENABLE                        ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE                       ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL"
rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK            ,Override_val in use" "No,Yes"
rbitfld.long 0x00 30. "                    DLL_RESET                                  ,Reset pulse sent to DLL's on next shadow update" "No,Yes"
textline "                                "
bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE                      ,Disable override of DLL logic" "Disabled,Enabled"
rbitfld.long 0x00 26. "               CFG_DLL_UPDATE_AT_NXT_REFRESH              ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes"
textline "                                "
hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL                       ,Value to use in place of DLI output"
bitfld.long 0x00 15. "                   CFG_DLL_TESTEN                             ,Enable DLL test mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT                       ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               CFG_DLL_TESTSEL                            ,Select DLL test output" "0,1,2,3"
textline "                                "
bitfld.long 0x00 8.--10. " CFG_DLL_UDSET                              ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..."
bitfld.long 0x00 6.--7. "                  CFG_DLL_MODE                               ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock"
textline "                                "
bitfld.long 0x00 5. " CFG_DLL_LOWSPEED                           ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled"
rbitfld.long 0x00 4. "               CFG_DLL_STALL_RW_UNTIL_LOCK                ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC                  ,Enable stalling of all DRAM traffic" "Disabled,Enabled"
bitfld.long 0x00 2. "               CFG_DLL_OVERRIDE_EN                        ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK               ,Stall all traffic until DLL locks" "Disabled,Enabled"
bitfld.long 0x00 0. "               CFG_DLL_EN                                 ,Enable digital DLL" "Disabled,Enabled"
if ((per.l(ad:0x02C70000+0x2BC)&0xC0)==0x80)
group.long 0x2C0++0x03
line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD                         ,Interval between runs in uSec"
else
hgroup.long 0x2C0++0x03
hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
endif
rgroup.long 0x2C4++0x03
line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status"
bitfld.long 0x00 18. " DLL_ALARM_MIN                              ,DLL alarm MIN status" "No alarm,Alarm"
bitfld.long 0x00 17. "               DLL_PRIV_UPDATED                           ,DLL private update status" "Not updated,Updated"
textline "                                "
bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS                         ,DLL calibration in-progress status" "Done,In progress"
bitfld.long 0x00 15. "            DLL_LOCK                                   ,DLL lock status" "Not locked,Locked"
textline "                                "
bitfld.long 0x00 14. " DLL_ALARM                                  ,DLL alarm status" "No alarm,Alarm"
bitfld.long 0x00 13. "               DLL_LOCK_TIMEOUT                           ,DLL lock timeout status" "No timeout,Timeout"
textline "                                "
hexmask.long.word 0x00 0.--10. 1. " DLL_OUT                                    ,DLL_OUT"
group.long 0x2C8++0x13
line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration"
bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE                 ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--11. "                     DLL_NUM_STALL_CYCLES                       ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT                     ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "             CFG_DLL_UPDATE_IDLE                        ,Update dig DLL during idle" "Disabled,Enabled"
line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK                                   ,Programmed to RDV"
line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WDV_MASK                                   ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK                             ,Programmed to RDV_EARLY"
line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter"
hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY                                  ,Time from read command to latching the read data from the pad macros"
sif cpuis("TEGRAX2")
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value"
elif (cpuis("TEGRAX1"))
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x42C++0x03
line.long 0x00 "AUTO_CAL_CONFIG9_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 6. " AUTO_CAL_OVERRIDE_DQS_TERM                 ,Update DQS term auto-calibration values" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_OVERRIDE_DQS                      ,Update DQS auto-calibration values" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_OVERRIDE_DQ_TERM                  ,Update  DQ term autocal values" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_OVERRIDE_DQ                       ,Update DQ autocal valuess" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_OVERRIDE_CMD                      ,Update CMD autocal values" "Disabled,Enabled"
bitfld.long 0x00 1. "               AUTO_CAL_OVERRIDE_CLK                      ,Update  CLK autocal values" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_OVERRIDE_CA                       ,Update CA autocal values" "Disabled,Enabled"
endif
group.long 0x2E0++0x0F
line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration"
hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI                           ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD"
hexmask.long.word 0x00 0.--9. 1. "                   ZCAL_INTERVAL_LO                           ,ZCAL_INTERVAL_LO"
line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration"
bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED                       ,ZQ resistor is shared across ranks" "Disabled,Enabled"
bitfld.long 0x04 16.--21. "               ZCAL_LATCH_CNT                             ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT                              ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD"
line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration"
bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,?..."
hexmask.long.byte 0x08 16.--23. 1. "                   ZQ_MRW_MA                                  ,MRW MA field to be sent after ZCAL_INTERVAL"
textline "                                "
hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP                                  ,MRW OP field to be sent after ZCAL_INTERVAL"
line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration"
bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,Neither"
bitfld.long 0x0C 4. "                ZQ_CAL_LENGTH                              ,Indicate short or long ZQ calibration" "Short,Long"
textline "                                "
bitfld.long 0x0C 1. " ZQ_LATCH_CMD                               ,(LPDDR4 only) Issues a ZQ latch command" "0,1"
bitfld.long 0x0C 0. "                      ZQ_CAL_CMD                                 ,(DDR3 only) Issues a ZQ calibration command" "0,1"
group.long 0x2F4++0x03
line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL                     ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
endif
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD              ,Enable weak pull-down" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PD_E_WKPU              ,Enable weak pull-up" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL         ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL         ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                "
bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 8.--9. "                     EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
textline "                                "
bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 2.--5. "                     EMC2TMC_CFG_XM2COMP_PD_TEST_MODE           ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
sif (cpuis("TEGRAX2"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
elif (cpuis("TEGRAX1"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
endif
sif (cpuis("TEGRAX2"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
elif (cpuis("TEGRAX1"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
endif
textline "                                "
width 35.
sif (cpuis("TEGRAX2"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 21. " XM2COMP_BGLP_E_PWRD                        ,[PMC] Active high to power down low power BANDGAP regulator" "Disabled,Enabled"
bitfld.long 0x00 20. "               XM2COMP_BG_E_PWRD                          ,[PMC] Active high to power down regulator" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
elif (cpuis("TEGRAX1"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
endif
group.long 0x310++0x0F
line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register"
bitfld.long 0x00 30.--31. " DQ_PHASE_MIN                               ,DPD phase lower limiter" "0,1,2,3"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 29. "                      CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on command" "Disabled,Enabled"
endif
textline "                                   "
bitfld.long 0x00 24.--28. "          DQ_DPD_EXIT_DELAY                          ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "                     DQ_PHASE_RAMP_IN_TIME                      ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 12.--16. "          DQ_PHASE_RAMP_OUT_TIME                     ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--11. "                     DQ_PHASE_HOLD_MIN                          ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. "          DQ_DPD_ENTRY_DELAY                         ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register"
bitfld.long 0x04 30.--31. " CMD_PHASE_MIN                              ,DPD phase lower limiter" "0,1,2,3"
textline "                                   "
bitfld.long 0x04 29. "          CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on cmd" "Disabled,Enabled"
bitfld.long 0x04 24.--28. "               CMD_DPD_EXIT_DELAY                         ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 20.--23. "          CMD_PHASE_RAMP_IN_TIME                     ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--16. "                     CMD_PHASE_RAMP_OUT_TIME                    ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 8.--11. "          CMD_PHASE_HOLD_MIN                         ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                     CMD_DPD_ENTRY_DELAY                        ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register"
bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8         ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x08 14.--15. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7         ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 12.--13. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6         ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x08 10.--11. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5         ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 8.--9. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4         ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x08 6.--7. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3         ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 4.--5. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2         ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x08 2.--3. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1         ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 0.--1. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0         ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register"
bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8        ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 14.--15. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7        ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 12.--13. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6        ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 10.--11. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5        ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 8.--9. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4        ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x0C 6.--7. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3        ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 4.--5. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2        ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x0C 2.--3. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1        ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 0.--1. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0        ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
group.long 0x324++0x03
line.long 0x00 "SCRATCH0_0,Scratch Register For General Use"
group.long 0x330++0x07
line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1                       ,Data brick control RFU1"
hexmask.long.word 0x00 0.--15. 1. "                   CMD_BRICK_CTRL_RFU1                        ,Command brick control RFU1"
line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2                       ,Data brick control RFU2"
hexmask.long.word 0x04 0.--15. 1. "                   CMD_BRICK_CTRL_RFU2                        ,Command brick control RFU2"
group.long 0x380++0x0B
line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP                               ,Mapping of CMD brick 0 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD0_DQ2_MAP                               ,Mapping of CMD brick 0 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD0_DQ1_MAP                               ,Mapping of CMD brick 0 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD0_DQ0_MAP                               ,Mapping of CMD brick 0 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP                               ,Mapping of CMD brick 0 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD0_DQ6_MAP                               ,Mapping of CMD brick 0 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD0_DQ5_MAP                               ,Mapping of CMD brick 0 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD0_DQ4_MAP                               ,Mapping of CMD brick 0 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP                            ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD0_DQSN_MAP                              ,Mapping of CMD brick 0 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD0_DQSP_MAP                              ,Mapping of CMD brick 0 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD0_DQ8_MAP                               ,Mapping of CMD brick 0 data pin 8"
group.long 0x38C++0x0B
line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP                               ,Mapping of CMD brick 1 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD1_DQ2_MAP                               ,Mapping of CMD brick 1 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD1_DQ1_MAP                               ,Mapping of CMD brick 1 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD1_DQ0_MAP                               ,Mapping of CMD brick 1 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP                               ,Mapping of CMD brick 1 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD1_DQ6_MAP                               ,Mapping of CMD brick 1 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD1_DQ5_MAP                               ,Mapping of CMD brick 1 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD1_DQ4_MAP                               ,Mapping of CMD brick 1 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP                            ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD1_DQSN_MAP                              ,Mapping of CMD brick 1 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD1_DQSP_MAP                              ,Mapping of CMD brick 1 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD1_DQ8_MAP                               ,Mapping of CMD brick 1 data pin 8"
group.long 0x398++0x0B
line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP                               ,Mapping of CMD brick 2 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD2_DQ2_MAP                               ,Mapping of CMD brick 2 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD2_DQ1_MAP                               ,Mapping of CMD brick 2 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD2_DQ0_MAP                               ,Mapping of CMD brick 2 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP                               ,Mapping of CMD brick 2 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD2_DQ6_MAP                               ,Mapping of CMD brick 2 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD2_DQ5_MAP                               ,Mapping of CMD brick 2 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD2_DQ4_MAP                               ,Mapping of CMD brick 2 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP                            ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD2_DQSN_MAP                              ,Mapping of CMD brick 2 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD2_DQSP_MAP                              ,Mapping of CMD brick 2 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD2_DQ8_MAP                               ,Mapping of CMD brick 2 data pin 8"
group.long 0x3A4++0x0B
line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP                               ,Mapping of CMD brick 3 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD3_DQ2_MAP                               ,Mapping of CMD brick 3 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD3_DQ1_MAP                               ,Mapping of CMD brick 3 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD3_DQ0_MAP                               ,Mapping of CMD brick 3 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP                               ,Mapping of CMD brick 3 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD3_DQ6_MAP                               ,Mapping of CMD brick 3 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD3_DQ5_MAP                               ,Mapping of CMD brick 3 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD3_DQ4_MAP                               ,Mapping of CMD brick 3 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP                            ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD3_DQSN_MAP                              ,Mapping of CMD brick 3 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD3_DQSP_MAP                              ,Mapping of CMD brick 3 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD3_DQ8_MAP                               ,Mapping of CMD brick 3 data pin 8"
group.long 0x3B0++0x17
line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register"
bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP                           ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 24.--27. "             BYTE6_DQ_CMD_MAP                           ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 20.--23. "          BYTE5_DQ_CMD_MAP                           ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 16.--19. "             BYTE4_DQ_CMD_MAP                           ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 12.--15. "          BYTE3_DQ_CMD_MAP                           ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 8.--11. "             BYTE2_DQ_CMD_MAP                           ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 4.--7. "          BYTE1_DQ_CMD_MAP                           ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 0.--3. "             BYTE0_DQ_CMD_MAP                           ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
line.long 0x04 "TR_TIMING_0_0,Training Timing Register"
bitfld.long 0x04 23.--26. " T_CATR_RD2VREF                             ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--21. "                     T_DHTRAIN                                  ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 12.--15. "          T_DSTRAIN                                  ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--9. 1. "                     T_VREF_LONG                                ,Delay between CAVREF and CATR reads"
line.long 0x08 "TR_CTRL_0_0,Training Control Register 0"
bitfld.long 0x08 8. " CATR_ENABLE                                ,CA Training enable" "Disabled,Enabled"
bitfld.long 0x08 5.--7. "               CAVREF_DQS_DURATION                        ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x08 4. "          CAVREF_RIVE_DQS                            ,Drive DQS" "0,1"
bitfld.long 0x08 0.--3. "                      CAVREF_TX_BYTE_MASK                        ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TR_CTRL_1_0,Training Control Register 1"
bitfld.long 0x0C 4. " ENABLE_TR_QRST                             ,TR QRST select" "Disabled,Enabled"
bitfld.long 0x0C 3. "               ENABLE_TR_QSAFE                            ,TR QSAFE select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 2. "          ENABLE_TR_RDV_MASK                         ,TR RDV_MASK select" "Disabled,Enabled"
bitfld.long 0x0C 1. "               ENABLE_TR_QPOP                             ,TR QPOP select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 0. "          ENABLE_TR_RDV                              ,TR RDV select" "Disabled,Enabled"
line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register"
bitfld.long 0x10 0. " CLK_SWITCH_BACK                            ,Clock switch back request trigger" "Not triggered,Triggered"
line.long 0x14 "TR_RDV_0,Training RDV Register"
hexmask.long.byte 0x14 0.--6. 1. " TR_RDV                                     ,Training RDV value"
rgroup.long 0x3C8++0x0F
line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE            ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE             ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE                 ,Unstall memory read|write after clock change" "Disabled,Enabled"
line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register"
hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle"
hexmask.long.byte 0x0C 16.--21. 1. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle"
textline "                                   "
hexmask.long.byte 0x0C 8.--13. 1. "          AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle"
hexmask.long.byte 0x0C 0.--5. 1. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle"
group.long 0x3D8++0x0F
line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes"
bitfld.long 0x00 16.--18. " SEL_DPD_DLY                                ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8. "                      DATA_SEL_DPD_EN                            ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5. "          ODT_SEL_DPD_EN                             ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled"
bitfld.long 0x00 4. "               RESET_SEL_DPD_EN                           ,Assert SEL_DPD for reset pad" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. "          CA_SEL_DPD_EN                              ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled"
bitfld.long 0x00 2. "               CLK_SEL_DPD_EN                             ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled"
line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count"
hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT                            ,Pre-refresh request count"
line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry"
bitfld.long 0x08 31. " DSR_PER_DEVICE                             ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled"
hexmask.long.word 0x08 0.--15. 1. "               DSR_THRESHOLD                              ,Number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL"
hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL                                    ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL"
group.long 0x3E8++0x07
line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset"
bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1                      ,Count-by VALUE clock increments select" "256,1"
hexmask.long.word 0x00 16.--30. 1. "                    CCFIFO_STALL_CNT                           ,CCFIFO stall counter value"
textline "                                   "
hexmask.long.word 0x00 0.--15. 0x01 "          CCFIFO_ADDR                                ,Clock change FIFO address register"
line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register"
rgroup.long 0x3F0++0x03
line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status"
hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT                               ,CCFIFO count"
group.long 0x3F4++0x0F
line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter"
hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE                           ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x00 0.--6. 1. "                     TR_QPOP                                    ,Time from training read command to pop data from the pad macro FIFO"
line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK                                ,Training RDV mask bits"
line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter"
hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE                                   ,Training time from a read command to when it is safe to issue a QRST"
line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter"
bitfld.long 0x0C 16.--20. " TR_QRST_DURATION                           ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x0C 0.--6. 1. "              TR_QRST                                    ,Training time from a read command to when it is safe to issue a QRST"
group.long 0x404++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL                   ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE0_BIT6_SEL                   ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE0_BIT5_SEL                   ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE0_BIT4_SEL                   ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE0_BIT3_SEL                   ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE0_BIT2_SEL                   ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE0_BIT1_SEL                   ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE0_BIT0_SEL                   ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x408++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL                   ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE1_BIT6_SEL                   ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE1_BIT5_SEL                   ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE1_BIT4_SEL                   ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE1_BIT3_SEL                   ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE1_BIT2_SEL                   ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE1_BIT1_SEL                   ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE1_BIT0_SEL                   ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x40C++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL                   ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE2_BIT6_SEL                   ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE2_BIT5_SEL                   ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE2_BIT4_SEL                   ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE2_BIT3_SEL                   ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE2_BIT2_SEL                   ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE2_BIT1_SEL                   ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE2_BIT0_SEL                   ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x410++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL                   ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE3_BIT6_SEL                   ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE3_BIT5_SEL                   ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE3_BIT4_SEL                   ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE3_BIT3_SEL                   ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE3_BIT2_SEL                   ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE3_BIT1_SEL                   ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE3_BIT0_SEL                   ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x418++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL                   ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE0_BIT6_SEL                   ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE0_BIT5_SEL                   ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE0_BIT4_SEL                   ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE0_BIT3_SEL                   ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE0_BIT2_SEL                   ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE0_BIT1_SEL                   ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE0_BIT0_SEL                   ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x41C++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL                   ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE1_BIT6_SEL                   ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE1_BIT5_SEL                   ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE1_BIT4_SEL                   ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE1_BIT3_SEL                   ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE1_BIT2_SEL                   ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE1_BIT1_SEL                   ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE1_BIT0_SEL                   ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x420++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL                   ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE2_BIT6_SEL                   ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE2_BIT5_SEL                   ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE2_BIT4_SEL                   ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE2_BIT3_SEL                   ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE2_BIT2_SEL                   ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE2_BIT1_SEL                   ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE2_BIT0_SEL                   ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x424++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL                   ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE3_BIT6_SEL                   ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE3_BIT5_SEL                   ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE3_BIT4_SEL                   ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE3_BIT3_SEL                   ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE3_BIT2_SEL                   ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE3_BIT1_SEL                   ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE3_BIT0_SEL                   ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x428++0x03
line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter"
bitfld.long 0x00 0. " ISSUE_QRST                                 ,Sets QRST to pads|macros" "0,1"
group.long 0x440++0x0B
line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1"
line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2"
line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3"
sif (cpuis("TEGRAX2"))
group.long 0x44C++0x0B
line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels"
bitfld.long 0x00 3. " INT_CH3                                    ,Set when there is a interrupt from channel-3" "None,Interrupt"
bitfld.long 0x00 2. "              INT_CH2                                    ,Set when there is a interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x00 1. "          INT_CH1                                    ,Set when there is a interrupt from channel-1" "None,Interrupt"
bitfld.long 0x00 0. "              INT_CH0                                    ,Set when there is a interrupt from channel-0" "None,Interrupt"
line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels"
bitfld.long 0x04 3. " CRITICAL_INT_CH3                           ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              CRITICAL_INT_CH2                           ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          CRITICAL_INT_CH1                           ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              CRITICAL_INT_CH0                           ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits"
bitfld.long 0x08 4.--7. " RESET_RFU                                  ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2. "                     RESET_EN                                   ,Enables the TH path when set to 0" "None,INT"
textline "                                   "
bitfld.long 0x08 1. "          RESET_E_INPUT                              ,When set to 1 enables the RX path for reset pads" "None,Interrupt"
bitfld.long 0x08 0. "              RESET_E_WKPD                               ,When set to 1 enables the weak pad for reset pads" "None,Interrupt"
endif
group.long 0x458++0x17
line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2"
bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 24.--25. "                  AUTO_CAL_DQS_PU_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 22.--23. "          AUTO_CAL_DQ_PD_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 20.--21. "                  AUTO_CAL_DQ_PU_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 18.--19. "          AUTO_CAL_DQS_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 16.--17. "                  AUTO_CAL_DQS_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 14.--15. "          AUTO_CAL_DQ_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 12.--13. "                  AUTO_CAL_DQ_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 10.--11. "          AUTO_CAL_CMD_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 8.--9. "                  AUTO_CAL_CMD_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 6.--7. "          AUTO_CAL_CA_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 4.--5. "                  AUTO_CAL_CA_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 2.--3. "          AUTO_CAL_CLK_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 0.--1. "                  AUTO_CAL_CLK_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
sif (cpuis("TEGRAX2"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--23. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value"
elif (cpuis("TEGRAX1"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                   "
bitfld.long 0x00 8.--13. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x460++0x0F
line.long 0x00 "TR_DVFS,Training DVFS Register"
bitfld.long 0x00 0. " TRAINING_DVFS                              ,DVFS training enable" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register"
bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE                       ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled"
bitfld.long 0x04 30. "               AUTO_CAL_STALL_ALL_TRAFFIC                 ,Stall all traffic for an autocal update" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x04 29. "          AUTO_CAL_COMPUTE_START_DVFS                ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled"
hexmask.long.byte 0x04 21.--27. 1. "               CAL_WAIT_AFTER_DVFS                        ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM"
textline "                                   "
bitfld.long 0x04 16.--20. "          AUTO_CAL_UPDATE_TIMEOUT                    ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS"
bitfld.long 0x04 8.--11. "           AUTO_CAL_WAIT_BEFORE_UPDATE                ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--5. "          AUTO_CAL_NUM_STALL_CYCLES                  ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter"
bitfld.long 0x08 28.--29. " IBDLY_MODE                                 ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
hexmask.long.byte 0x08 0.--6. 1. "              IBDLY                                      ,Specifies when to change IBDLY for DQ|DQS"
line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter"
bitfld.long 0x0C 28.--29. " OBDLY_MODE                                 ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
bitfld.long 0x0C 0.--5. "              OBDLY                                      ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x470++0x07
line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register"
bitfld.long 0x00 31. " DISPLAY_STUTTER_EN                         ,Display stutter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "               ASR_THRESHOLD                              ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels"
bitfld.long 0x04 3. " NONCRITICAL_INT_CH3                        ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              NONCRITICAL_INT_CH2                        ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          NONCRITICAL_INT_CH1                        ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              NONCRITICAL_INT_CH0                        ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
endif
textline "                                   "
width 26.
group.long 0x480++0x03
line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter"
hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN                                ,Cycles to wait from DSR exit"
group.long 0x48C++0x13
line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--4. " WE_DURATION                                ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x04 0.--4. " WS_DURATION                                ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WEV                                        ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter"
bitfld.long 0x0C 0.--5. " WSV                                        ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x10 "CFG_3_0,EMC Configuration Register 3"
bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16                            ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      MRR_BYTESEL                                ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7"
group.long 0x4A0++0x03
line.long 0x00 "MRW5_0,Command Trigger MRW5"
bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN                           ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW5_CNT                               ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
hexmask.long.byte 0x00 16.--23. 0x01 "  MRW5_MA                                    ,Register address"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW5_OP                                    ,Data to be written"
group.long 0x4A4++0x03
line.long 0x00 "MRW6 _0,Command Trigger MRW6 "
bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW6 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW6 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW6 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW6 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW6 _SP0                                  ,Data to be written to subp0"
group.long 0x4A8++0x03
line.long 0x00 "MRW7 _0,Command Trigger MRW7 "
bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW7 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW7 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW7 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW7 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW7 _SP0                                  ,Data to be written to subp0"
group.long 0x4AC++0x03
line.long 0x00 "MRW8 _0,Command Trigger MRW8 "
bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW8 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW8 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW8 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW8 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW8 _SP0                                  ,Data to be written to subp0"
group.long 0x4B0++0x03
line.long 0x00 "MRW9 _0,Command Trigger MRW9 "
bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW9 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW9 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW9 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW9 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW9 _SP0                                  ,Data to be written to subp0"
group.long 0x4B4++0x03
line.long 0x00 "MRW10_0,Command Trigger MRW10"
bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW10_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW10_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW10_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW10_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW10_SP0                                  ,Data to be written to subp0"
group.long 0x4B8++0x03
line.long 0x00 "MRW11_0,Command Trigger MRW11"
bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW11_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW11_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW11_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW11_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW11_SP0                                  ,Data to be written to subp0"
group.long 0x4BC++0x03
line.long 0x00 "MRW12_0,Command Trigger MRW12"
bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW12_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW12_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW12_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW12_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW12_SP0                                  ,Data to be written to subp0"
group.long 0x4C0++0x03
line.long 0x00 "MRW13_0,Command Trigger MRW13"
bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW13_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW13_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW13_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW13_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW13_SP0                                  ,Data to be written to subp0"
group.long 0x4C4++0x03
line.long 0x00 "MRW14_0,Command Trigger MRW14"
bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW14_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW14_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW14_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW14_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW14_SP0                                  ,Data to be written to subp0"
group.long 0x4D0++0x03
line.long 0x00 "MRW15_0,Command Trigger MRW15"
bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW15_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW15_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW15_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW15_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW15_SP0                                  ,Data to be written to subp0"
group.long 0x4D4++0x07
line.long 0x00 "CFG_SYNC_0,Sync Configuration 0"
bitfld.long 0x00 0. " CHANNEL_SYNC                               ,Channel sync" "0,1"
line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0"
bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE                     ,No ramp for DI/DT enable" "Disabled,Enabled"
group.long 0x4E0++0x03
line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--5. " WDV_CHK_BASE                               ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x510++0x07
line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK           ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x00 10. "               ECC_UNCORR_ERR_CRITICAL_INTMASK            ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 9. "  DLL_LOCK_TIMEOUT_CRITICAL_INTMASK          ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x00 8. "               CCFIFO_OVERFLOW_CRITICAL_INTMASK           ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 7. "  DLL_ALARM_CRITICAL_INTMASK                 ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x00 6. "               ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK      ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 5. "  MRR_DIVLD_CRITICAL_INTMASK                 ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x00 4. "               CLKCHANGE_COMPLETE_CRITICAL_INTMASK        ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 3. "  REFRESH_OVERFLOW_CRITICAL_INTMASK          ,Mask for refresh request overflow time out" "Masked,Unmasked"
line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK        ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "               ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK        ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 11. "  ECC_CORR_ERR_NONCRITICAL_INTMASK           ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "               ECC_UNCORR_ERR_NONCRITICAL_INTMASK         ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 9. "  DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK       ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "               CCFIFO_OVERFLOW_NONCRITICAL_INTMASK        ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 7. "  DLL_ALARM_NONCRITICAL_INTMASK              ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x04 6. "               ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK   ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 5. "  MRR_DIVLD_NONCRITICAL_INTMASK              ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "               CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK     ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 3. "  REFRESH_OVERFLOW_NONCRITICAL_INTMASK       ,Mask for refresh request overflow time out" "Masked,Unmasked"
endif
group.long 0x554++0x1F
line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0"
bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass"
bitfld.long 0x00 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass"
bitfld.long 0x00 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass"
bitfld.long 0x00 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass"
bitfld.long 0x00 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass"
bitfld.long 0x00 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass"
bitfld.long 0x00 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x00 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x00 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x00 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x00 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x00 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x00 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register"
bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE                   ,Pipe clock override enable" "Disabled,Enabled"
line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0"
bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 11. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 10. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 9. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 8. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 7. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 6. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 5. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 4. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 3. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 2. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 1. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 0. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0"
bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 26. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 25. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 24. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 23. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 22. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 21. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 20. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 19. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 18. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 17. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 16. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x10 "QPOP_0,DRAM Timing Parameter"
hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE                              ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x10 0.--6. 1. "                     QPOP                                       ,Time from read command to pop data from the pad macro FIFO"
line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x14 29. " QUSE_SHORTEN_2UI                           ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten"
bitfld.long 0x14 28. "              QUSE_EXTEND_UI                             ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend"
textline "                                  "
bitfld.long 0x14 0.--3. "  QUSE_DURATION                              ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x18 31. " CFG_STATIC_TERM                            ,IOBRICK internally disables termination based on DOE" "0,1"
bitfld.long 0x18 0.--3. "                      PUTERM_DURATION                            ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls"
bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX                  ,Bias current going out to brick receiver" "Disabled,Enabled"
bitfld.long 0x1C 2. "               BIAS0_DSC_E_PWRD_IBIAS_VTTGEN              ,Disables biasing current going out to VTTGEN cells" "No,Yes"
textline "                                  "
bitfld.long 0x1C 1. "  BIAS0_DSC_E_PWRD                           ,Disables all DC current paths within entire cell" "No,Yes"
bitfld.long 0x1C 0. "                    BIAS0_DSC_BG_SEL_N                         ,Select BandGap reference current" "Enabled,Disabled"
sif (cpuis("TEGRAX2"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value"
elif (cpuis("TEGRAX1"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 24.--28. " M2COMP_VTTLP_VDDA_CTRL                     ,PMC Fast-droop recovery or stability control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--23. "                     XM2COMP_VTTLP_SPARE                        ,PMC spare pins" "0,1,2,3"
textline "                                   "
bitfld.long 0x00 20.--21. " XM2COMP_VTTLP_VDDA_WB_CTRL                 ,PMC Weak Bias Level Control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x00 17. "    EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "               EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                   "
bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 10.--11. "                 EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                   "
bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 6.--7. "    EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                   "
bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--1. "                     EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTO CAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 28. " AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 25. " AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 23. " AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 16.--21. " AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                   "
hexmask.long.byte 0x04 2.--8. 1. " AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
else
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14.--15. "  EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                  "
bitfld.long 0x00 10.--11. "  EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 8.--9. "    EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                  "
bitfld.long 0x00 6.--7. "  EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 2.--5. "    EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--1. "  EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 28. "  AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 25. "  AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 23. "  AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 16.--21. "  AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.byte 0x04 2.--8. 1. "  AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C70000+0x20))&0x80000000)==0x80000000)
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 31. " REFPB_VALID                                ,REFpb operation enable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "               REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
else
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 24.--26. "                                                                   REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
endif
group.long 0x584++0x03
line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
bitfld.long 0x00 17. "               SEND_RD1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
textline "                                   "
endif
bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0                        ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled"
bitfld.long 0x00 15. "               DISABLE_CCDP1_WR_SPACING                   ,Write command spacing of tCCD+1 disable" "No,Yes"
textline "                                  "
bitfld.long 0x00 14. "  DISABLE_CCDP1_RD_SPACING                   ,Read command spacing of tCCD+1 disable" "No,Yes"
bitfld.long 0x00 13. "                    SUBP_ADDR_MODE                             ,DRAM SUBP address width" "x32,x16"
textline "                                  "
bitfld.long 0x00 12. "  ZQCAL_LATCH_ENABLE                         ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               ZQCAL_MPC_ENABLE                           ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. "  QPOP_RD_PREAMBLE_TOGGLE                    ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               CS_POLARITY                                ,DRAM chip select active polarity" "Low,High"
textline "                                  "
bitfld.long 0x00 8. "  MRR_DBI                                    ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               RD_DBI                                     ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. "  WR_DBI                                     ,EMC write data bus inversion protocol enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               MASKED_WR                                  ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 4. "  LPDDR4_CMD_MAP                             ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               QUSE_CCDP1_EXTEND                          ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. "  CH1_ENABLE                                 ,CH1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               CH0_ENABLE                                 ,CH0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. "  DRAM_EMCCLK_2TO1                           ,Specifies how much faster is dramclk than emcclk" "1x,2x"
sif (cpuis("TEGRAX2"))
group.long 0x710++0x03
line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register"
bitfld.long 0x00 8. " USE_SELF_REF_STATE                         ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled"
bitfld.long 0x00 4. "               ENCR_TWEAK_CHECK_ENABLE                    ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On"
textline "                                  "
bitfld.long 0x00 3. "  ECC_ENCR_CFG_LOCK                          ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On"
bitfld.long 0x00 2. "                    ECC_DYNAMIC_BYPASS_DISABLE                 ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On"
textline "                                  "
bitfld.long 0x00 1. "  ECC_ENCR_DISABLE                           ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On"
bitfld.long 0x00 0. "                    ECC_CHECK_DISABLE                          ,Setting this bit disables EMC ECC check/correct functions" "Off,On"
group.long 0xAC0++0x13
line.long 0x00 "ECC_CONTROL_0,ECC Control Register"
hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT                           ,Error buffer limit"
bitfld.long 0x00 2. "                     ERR_BUFFER_LOAD                            ,Error Buffer Load" "No load,Load"
textline "                                  "
bitfld.long 0x00 1. "  ERR_BUFFER_RESET                           ,Error Buffer Reset" "No reset,Reset"
bitfld.long 0x00 0. "               ERR_BUFFER_MODE                            ,Error Buffer Mode" "Ring,Write stop"
rgroup.long 0xAC4++0x13
line.long 0x00 "ECC_STATUS_0,ECC Error Status"
hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH                           ,The physical size (in number of entries) of ECC error buffer"
hexmask.long.byte 0x00 16.--23. 1. "                     ERR_BUFFER_CNT                             ,The number of errors physically residing in ECC error buffer"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  ERR_BUFFER_WR_PTR                          ,The ECC error buffer write pointer"
hexmask.long.byte 0x00 0.--7. 1. "                     ERR_BUFFER_RD_PTR                          ,The ECC error buffer read pointer"
line.long 0x04 "ECC_STATUS_0,ECC Error Status"
hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0                      ,Computed syndrome in ECC word"
bitfld.long 0x04 16.--17. "                   ECC_EERR_PAR_SP0                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x04 6.--15. 1. "  ECC_DERR_SYNDROME_SP0                      ,Computed syndrome in data word"
bitfld.long 0x04 3. "                   ECC_ERR_POISON_SP0                         ,Poisoned request" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0.--1. "  ECC_DERR_PAR_SP0                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors"
hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1                      ,Computed syndrome in ECC word"
bitfld.long 0x08 16.--17. "                   ECC_EERR_PAR_SP1                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x08 6.--15. 1. "  ECC_DERR_SYNDROME_SP1                      ,Computed syndrome in data word"
bitfld.long 0x08 0.--1. "                   ECC_DERR_PAR_SP1                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob"
bitfld.long 0x0C 28.--30. " ECC_ERR_BANK                               ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 8.--23. 1. "                      ECC_ERR_ROW                                ,ECC_ERR_ROW"
textline "                                  "
bitfld.long 0x0C 0.--5. "  ECC_ERR_GOB                                ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug"
hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID                               ,Request ID"
bitfld.long 0x10 20.--21. "                     ECC_ERR_SEQ                                ,Burst sequence" "0,1,2,3"
textline "                                  "
bitfld.long 0x10 19. "  ECC_ERR_SWAP                               ,Swap" "No swap,Swap"
bitfld.long 0x10 17.--18. "                ECC_ERR_SIZE                               ,Size" "R64B,R32B,R16B,?..."
textline "                                  "
bitfld.long 0x10 16. "  ECC_ERR_DEVICE                             ,DRAM device" "Disabled,Enabled"
bitfld.long 0x10 12.--14. "               ECC_ERR_COL_SP1                            ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 8.--10. "  ECC_ERR_COL_SP0                            ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--7. "                      ECC_ERR_EMC_ID                             ,EMC device/channel number" "0,1,2,3"
group.long 0xADC++0x03
line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register"
rbitfld.long 0x00 28.--31. " KEY_INIT_DONE                              ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                     KEY_STATE_CLEAR                            ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 8.--11. "  KEY_DISTRIB_ERR                            ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     KEY_ACTIVE                                 ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x588++0x27
line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "                      RANK0_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 15.--17. "  RANK0_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "                      RANK0_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 9.--11. "  RANK0_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "                      RANK0_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  RANK0_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      RANK0_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 18.--20. "                      RANK1_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 15.--17. "  RANK1_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--14. "                      RANK1_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 9.--11. "  RANK1_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--8. "                      RANK1_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 3.--5. "  RANK1_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                      RANK1_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter"
hexmask.long.word 0x08 0.--8. 1. " RFCPB                                      ,Specifies the per-bank auto refresh cycle time"
line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 18.--20. "                      RANK0_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 15.--17. "  RANK0_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "                      RANK0_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 9.--11. "  RANK0_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 6.--8. "                      RANK0_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 3.--5. "  RANK0_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "                      RANK0_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18.--20. "                      RANK1_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 15.--17. "  RANK1_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12.--14. "                      RANK1_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 9.--11. "  RANK1_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--8. "                      RANK1_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 3.--5. "  RANK1_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      RANK1_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0"
bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 0.--2. "                      CH0_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1"
bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0.--2. "                      CH1_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0"
bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "                      CH0_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1"
bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                      CH1_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0"
bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 10.--14. "                     RANK0_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x24 5.--9. "  RANK0_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 0.--4. "                     RANK0_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value"
else
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 1. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value"
else
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x5B8++0x13
line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1"
bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "                     RANK0_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 5.--9. "  RANK0_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                     RANK0_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2"
bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 10.--14. "                     RANK1_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x04 5.--9. "  RANK1_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     RANK1_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " CCDMW                                      ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3"
bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 10.--14. "                     RANK1_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x0C 5.--9. "  RANK1_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "                     RANK1_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register"
bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11      ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled"
bitfld.long 0x10 26. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10      ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 25. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9       ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled"
bitfld.long 0x10 24. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8       ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 23. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7       ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled"
bitfld.long 0x10 22. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6       ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 21. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5       ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled"
bitfld.long 0x10 20. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4       ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 19. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3       ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled"
bitfld.long 0x10 18. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2       ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 17. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1       ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled"
bitfld.long 0x10 16. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0       ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 15. "  RANK_SWIZZLE                               ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value"
else
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
wgroup.long 0x5D0++0x07
line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register"
bitfld.long 0x00 29. " PROTOBIST_APC                              ,Controls the auto-precharge function of transaction" "0,1"
bitfld.long 0x00 28. "                      PROTOBIST_A_RDY                            ,Indicates active interface is ready" "Not ready,Ready"
textline "                                  "
hexmask.long.word 0x00 12.--27. 1. "  PROTOBIST_A_ROW                            ,Row control during protobist mode"
bitfld.long 0x00 11. "                   PROTOBIST_A_REF                            ,Refresh control during active request in protobist" "0,1"
textline "                                  "
bitfld.long 0x00 9.--10. "  PROTOBIST_A_DEV                            ,Devsel control during active request in protobist" "0,1,2,3"
bitfld.long 0x00 6.--8. "                      PROTOBIST_BANK                             ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  PROTOBIST_A_BANK                           ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      PROTOBIST_A_BANK1                          ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7"
line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register"
bitfld.long 0x04 28. " PROTOBIST_SWAP                             ,Swap control during protobist mode" "0,1"
bitfld.long 0x04 26.--27. "                      PROTOBIST_SIZE                             ,Size control during protobist mode" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 25. "  PROTOBIST_MASKED_WRITE                     ,Mask write control during protobist mode" "0,1"
bitfld.long 0x04 24. "                      PROTOBIST_T_DEV                            ,Dev control during Xfre request of protobist mode" "0,1"
textline "                                  "
bitfld.long 0x04 21.--23. "  PROTOBIST_T_COL1                           ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x04 9.--20. 1. "                      PROTOBIST_T_COL                            ,Column control during protobist"
textline "                                  "
bitfld.long 0x04 8. "  PROTOBIST_T_RDY                            ,Indicates transfer interface is ready" "Not ready,Ready"
hexmask.long.byte 0x04 0.--7. 1. "              PROTOBIST_CGID                             ,Request ID of transaction control"
group.long 0x5D8++0x0B
line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " PROTOBIST_RESET                            ,PROTOBIST reset" "No reset,Reset"
textline "                                   "
endif
bitfld.long 0x00 16.--18. " PROTOBIST_REQ                              ,Protobist request" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 15. "                      PROTOBIST_READ_ACK                         ,Protobist read ACK" "0,1"
textline "                                  "
bitfld.long 0x00 14. "  PROTOBIST_START                            ,Protobist start" "0,1"
bitfld.long 0x00 13. "                      PROTOBIST_W_BE                             ,Protobist mode control for byte enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. "  PROTOBIST_MODE                             ,Protobist mode control indicates bist mode" "0,1"
bitfld.long 0x00 8.--11. "                      PROTOBIST_RDI_SEL                          ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. "  PROTOBIST_TAG                              ,Protobist mode tag control"
line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register"
line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register"
rgroup.long 0x5EC++0x03
line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register"
group.long 0x5E4++0x07
line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0"
bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START                  ,Ignore DLLCAL start trim priv value" "0,1"
bitfld.long 0x00 28. "                      DDLLCAL_CTRL_DUAL_PASS_LOCK                ,2 pass lock" "0,1"
textline "                                  "
bitfld.long 0x00 24.--27. "  DDLLCAL_CTRL_STEP_SIZE                     ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                     DDLLCAL_CTRL_END_COUNT                     ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 16.--19. "  DDLLCAL_CTRL_FILTER_BITS                   ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                     DDLLCAL_CTRL_SAMPLE_COUNT                  ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15"
textline "                                  "
hexmask.long.byte 0x00 4.--11. 1. "  DDLLCAL_CTRL_SAMPLE_DELAY                  ,Delay to allow DLL value to settle"
bitfld.long 0x00 0.--3. "                     DDLLCAL_UPDATE_CNT_LIMIT                   ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE                          ,RFU" "0,1,2,3"
bitfld.long 0x04 24.--25. "                      DDLL_VTTDDLL_SPARE                         ,RFU" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 22. "  DDLL_VTTLP_VDDA_E_REGSW                    ,Active high. Enable to switch to low power regulator" "Low,High"
bitfld.long 0x04 21. "                   DDLL_VTTDDLL_VDDA_E_REG                    ,Enable DLL regulator" "0,1"
textline "                                  "
bitfld.long 0x04 20. "  DDLL_VTTDDLL_E_WB                          ,Active high to enable the weak bias for DDLL" "0,1"
textline "                                   "
endif
bitfld.long 0x04 16. " DDLL_BYPASS                                ,Bypass" "0,1"
bitfld.long 0x04 12.--15. "                      DDLL_RFU                                   ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 11. "  E_DDLL_PWRD                                ,Master DLL powerdown" "0,1"
hexmask.long.word 0x04 0.--10. 1. "                      DDLLCAL_CTRL_START_TRIM                    ,Calibration start value"
group.long 0x5F0++0x07
line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay"
hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY                        ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)"
line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control"
bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE           ,Disallow configuration reads during a timing update" "Allow,Disallow"
bitfld.long 0x04 30. "               STALL_WRITES_DURING_TIMING_UPDATE          ,Disallow configuration writes during a timing update" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 29. "  LINKED_TIMING_UPDATE_TIMEOUT               ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled"
bitfld.long 0x04 28. "               LINKED_TIMING_UPDATE                       ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 9.--10. "  UPDATE_DLL_IN_UPDATE                       ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 8. "                UPDATE_DLL_IN_CLKCHANGE                    ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow"
textline "                                  "
bitfld.long 0x04 1.--2. "  UPDATE_AUTOCAL_IN_UPDATE                   ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 0. "                UPDATE_AUTO_CAL_IN_CLKCHANGE               ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow"
sif (cpuis("TEGRAX2"))
group.long 0x5F8++0x07
line.long 0x00 "DLL_CFG_2_0,DLL Config register 2"
bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL                       ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     DDLL_VTTDDLL_VDDA_LVL                      ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_3_0,DLL Config register 3"
bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL                   ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x04 16.--17. "    DDLL_VTTDDLL_VDDA_WB_CTRL                  ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
textline "                                  "
bitfld.long 0x04 8.--12. "  DDLL_VTTCDB_VDDA_CTRL                      ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     DDLL_VTTDDLL_VDDA_CTRL                     ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
width 15.
tree "PMACRO Registers"
tree "QUSE DDLL Register"
group.long 0x600++0x03
line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank0 byte0"
group.long 0x604++0x03
line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank0 byte2"
group.long 0x608++0x03
line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank0 byte4"
group.long 0x60C++0x03
line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank0 byte6"
group.long 0x610++0x03
line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank0 command0"
group.long 0x614++0x03
line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank0 command2"
textline "                                             "
group.long 0x620++0x03
line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank1 byte0"
group.long 0x624++0x03
line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank1 byte2"
group.long 0x628++0x03
line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank1 byte4"
group.long 0x62C++0x03
line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank1 byte6"
group.long 0x630++0x03
line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank1 command0"
group.long 0x634++0x03
line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank1 command2"
tree.end
tree "OB DDLL Long Registers"
group.long 0x640++0x03
line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank0 byte0"
group.long 0x644++0x03
line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank0 byte2"
group.long 0x648++0x03
line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank0 byte4"
group.long 0x64C++0x03
line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank0 byte6"
group.long 0x650++0x03
line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank0 command0"
group.long 0x654++0x03
line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank0 command2"
textline "                                             "
group.long 0x660++0x03
line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank1 byte0"
group.long 0x664++0x03
line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank1 byte2"
group.long 0x668++0x03
line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank1 byte4"
group.long 0x66C++0x03
line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank1 byte6"
group.long 0x670++0x03
line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank1 command0"
group.long 0x674++0x03
line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank1 command2"
textline "                                             "
group.long 0x680++0x03
line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank0 byte0"
group.long 0x684++0x03
line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank0 byte2"
group.long 0x688++0x03
line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank0 byte4"
group.long 0x68C++0x03
line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank0 byte6"
group.long 0x690++0x03
line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank0 Command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank0 Command0"
group.long 0x694++0x03
line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank0 Command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank0 Command2"
textline "                                             "
group.long 0x6A0++0x03
line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank1 byte0"
group.long 0x6A4++0x03
line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank1 byte2"
group.long 0x6A8++0x03
line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank1 byte4"
group.long 0x6AC++0x03
line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank1 byte6"
group.long 0x6B0++0x03
line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank1 command0"
group.long 0x6B4++0x03
line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank1 command2"
tree.end
tree "IB DDLL DQS Long Registers"
group.long 0x6C0++0x03
line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank0 byte0"
group.long 0x6C4++0x03
line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank0 byte2"
group.long 0x6C8++0x03
line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank0 byte4"
group.long 0x6CC++0x03
line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank0 byte6"
group.long 0x6D0++0x03
line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank0 command0"
group.long 0x6D4++0x03
line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank0 command2"
textline "                                             "
group.long 0x6E0++0x03
line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank1 byte0"
group.long 0x6E4++0x03
line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank1 byte2"
group.long 0x6E8++0x03
line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank1 byte4"
group.long 0x6EC++0x03
line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank1 byte6"
group.long 0x6F0++0x03
line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank1 command0"
group.long 0x6F4++0x03
line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank1 command2"
tree.end
textline "                                             "
width 22.
group.long 0x700++0x03
line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3           ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE2           ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE1           ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE0           ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x704++0x03
line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7           ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE7         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE7       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE6           ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE6           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE6         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE6       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE5           ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE5           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE5         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE5       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE4           ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE4           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE4         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE4       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x708++0x03
line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3           ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_CMD3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_CMD3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_CMD2           ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_CMD2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_CMD2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_CMD2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_CMD1           ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_CMD1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_CMD1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_CMD1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_CMD0           ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_CMD0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_CMD0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_CMD0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x720++0x03
line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1              ,Byte1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE1       ,Byte1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE1        ,Programmed to TX PWRD value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE1      ,Programmed to TX PWRD value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE0              ,Byte0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE0       ,Byte0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE0        ,Programmed to TX PWRD value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE0      ,Programmed to TX PWRD value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1"
group.long 0x724++0x03
line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3              ,Byte3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE3       ,Byte3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE3        ,Programmed to TX PWRD value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE3      ,Programmed to TX PWRD value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE2              ,Byte2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE2       ,Byte2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE2        ,Programmed to TX PWRD value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE2      ,Programmed to TX PWRD value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1"
group.long 0x728++0x03
line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5              ,Byte5 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE5       ,Byte5 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE5        ,Programmed to TX PWRD value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE5      ,Programmed to TX PWRD value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE4              ,Byte4 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE4       ,Byte4 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE4        ,Programmed to TX PWRD value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE4      ,Programmed to TX PWRD value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1"
group.long 0x72C++0x03
line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7              ,Byte7 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE7       ,Byte7 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE7        ,Programmed to TX PWRD value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE7      ,Programmed to TX PWRD value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE6              ,Byte6 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE6       ,Byte6 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE6        ,Programmed to TX PWRD value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE6      ,Programmed to TX PWRD value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1"
group.long 0x730++0x03
line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1              ,Cmd1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD1       ,Cmd1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD1                ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD1        ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD1      ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD0              ,Cmd0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD0       ,Cmd0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD0                ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD0        ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD0      ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1"
group.long 0x734++0x03
line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3              ,Cmd3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD3       ,Cmd3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD3                ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD3        ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD3      ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD2              ,Cmd2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD2       ,Cmd2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD2                ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD2        ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD2      ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x740++0x03
line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1"
group.long 0x744++0x03
line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1"
group.long 0x748++0x03
line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1"
group.long 0x74C++0x03
line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1"
group.long 0x750++0x03
line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1"
group.long 0x754++0x03
line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x760++0x03
line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass"
bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 30. "            CMD_DDLLCAL_BIT_TXDQ_BYPASS         ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 29. "            CMD_DDLLCAL_BIT_TXDQS_BYPASS      ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 27. "          CMD_DDLLCAL_BYTE_QU_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 26. "            CMD_DDLLCAL_BYTE_RXDQS_BYPASS       ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 25. "            CMD_DDLLCAL_BYTE_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 24. "          CMD_DDLLCAL_BYTE_TXDQ_BYPASS    ,Bypass the DDLL calibration value" "0,1"
bitfld.long 0x00 23. "            CMD_DDLL_BIT_RXDQ_BYPASS            ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 22. "    CMD_DDLL_BIT_TXDQS_BYPASS         ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 21. "          CMD_DDLL_BIT_TXDQ_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 20. "    CMD_DDLL_BYTE_RXRT_BYPASS           ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 19. "    CMD_DDLL_BYTE_QU_BYPASS           ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          CMD_DDLL_BYTE_RXDQS_BYPASS      ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 17. "    CMD_DDLL_BYTE_TXDQS_BYPASS          ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_DDLL_BYTE_TXDQ_BYPASS         ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 15. "          DATA_DDLLCAL_BIT_RXDQ_BYPASS    ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 14. "            DATA_DDLLCAL_BIT_TXDQ_BYPASS        ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 13. "            DATA_DDLLCAL_BIT_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 11. "          DATA_DDLLCAL_BYTE_QU_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 10. "            DATA_DDLLCAL_BYTE_RXRQS_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 9. "            DATA_DDLLCAL_BYTE_TXDQS_BYPASS    ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DATA_DDLLCAL_BYTE_TXDQ_BYPASS   ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 7. "            DATA_DDLL_BIT_RXDQ_BYPASS           ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 6. "    DATA_DDLL_BIT_TXDQS_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 5. "          DATA_DDLL_BIT_TXDQ_BYPASS       ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 4. "    DATA_DDLL_BYTE_RXRT_BYPASS          ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 3. "    DATA_DDLL_BYTE_QU_BYPASS          ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DATA_DDLL_BYTE_RXDQS_BYPASS     ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 1. "    DATA_DDLL_BYTE_TXDQS_BYPASS         ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    DATA_DDLL_BYTE_TXDQ_BYPASS        ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
group.long 0x770++0x03
line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x774++0x03
line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE7            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE7         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE7         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE7          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE7        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE7       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE6            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE6          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE6       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE6             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE6        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE6      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE6           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE5          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE5        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE5           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE5           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE5      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE5          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE5         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE4        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE4            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE4         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE4         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE4          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE4        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE4       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x778++0x03
line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_CMD3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_CMD3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_CMD3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_CMD3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_CMD3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_CMD3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_CMD2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_CMD2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_CMD2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_CMD2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_CMD2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_CMD2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_CMD2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_CMD1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_CMD1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_CMD1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_CMD1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_CMD1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_CMD1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_CMD1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_CMD0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_CMD0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_CMD0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_CMD0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_CMD0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_CMD0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_CMD0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
group.long 0x780++0x03
line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE3      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE3       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE3      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE3         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE3                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE0                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x784++0x03
line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE7      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE7       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE7      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE7         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE7                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE6      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE6       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE6      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE6         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE6                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE5      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE5       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE5      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE5         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE5                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE4      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE4       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE4      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE4         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE4                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x788++0x03
line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_MISC2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_MISC2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_MISC2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_MISC2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_MISC1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_MISC1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_MISC1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_MISC1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_MISC0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_MISC0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_MISC0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_MISC0                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_RESET      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_RESET       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_RESET      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_RESET         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_RESET                 ,IO_CMD input path enable" "Disabled,Enabled"
width 17.
tree "OB DDLL Short DQ Registers"
group.long 0x800++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x810++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x820++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x830++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x840++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x850++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x860++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x870++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x880++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x890++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8A0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8B0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x900++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x910++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x920++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x930++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x940++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x950++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x960++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x970++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x980++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x990++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9A0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9B0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
tree.end
tree "IB DDLL Short DQ Register"
group.long 0xA00++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA10++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA20++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA30++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA40++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA50++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA60++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA70++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA80++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA90++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAA0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAB0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xB00++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
group.long 0xB10++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
group.long 0xB20++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
group.long 0xB30++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
group.long 0xB40++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
group.long 0xB50++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
group.long 0xB60++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
group.long 0xB70++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
group.long 0xB80++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
group.long 0xB90++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
group.long 0xBA0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
group.long 0xBB0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
tree.end
textline "                 "
width 32.
group.long 0xBE0++0x03
line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3                              ,Programmed to IB Vref value for DQ of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE2                              ,Programmed to IB Vref value for DQ of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE1                              ,Programmed to IB Vref value for DQ of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE0                              ,Programmed to IB Vref value for DQ of BYTE0"
group.long 0xBE4++0x03
line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7                              ,Programmed to IB Vref value for DQ of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE6                              ,Programmed to IB Vref value for DQ of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE5                              ,Programmed to IB Vref value for DQ of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE4                              ,Programmed to IB Vref value for DQ of BYTE4"
group.long 0xBE8++0x03
line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3                              ,Programmed to IB Vref value for DQ of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_CMD2                              ,Programmed to IB Vref value for DQ of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_CMD1                              ,Programmed to IB Vref value for DQ of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_CMD0                              ,Programmed to IB Vref value for DQ of CMD0"
group.long 0xBF0++0x03
line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3                             ,Programmed to IB Vref value for DQS of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE2                             ,Programmed to IB Vref value for DQS of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE1                             ,Programmed to IB Vref value for DQS of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE0                             ,Programmed to IB Vref value for DQS of BYTE0"
group.long 0xBF4++0x03
line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7                             ,Programmed to IB Vref value for DQS of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE6                             ,Programmed to IB Vref value for DQS of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE5                             ,Programmed to IB Vref value for DQS of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE4                             ,Programmed to IB Vref value for DQS of BYTE4"
group.long 0xBF8++0x03
line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3                             ,Programmed to IB Vref value for DQS of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_CMD2                             ,Programmed to IB Vref value for DQS of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_CMD1                             ,Programmed to IB Vref value for DQS of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_CMD0                             ,Programmed to IB Vref value for DQS of CMD0"
textline "                                "
group.long 0xC00++0x03
line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1                           ,Programmed to CKE1 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE0                           ,Programmed to CKE0 trimmer value"
group.long 0xC04++0x03
line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3                           ,Programmed to CKE3 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE2                           ,Programmed to CKE2 trimmer value"
group.long 0xC08++0x03
line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5                           ,Programmed to CKE5 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE4                           ,Programmed to CKE4 trimmer value"
group.long 0xC0C++0x03
line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7                           ,Programmed to CKE7 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE6                           ,Programmed to CKE6 trimmer value"
group.long 0xC10++0x03
line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0                           ,Programmed to MISC0 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_RESET                           ,Programmed to RESET trimmer value"
group.long 0xC14++0x03
line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2                           ,Programmed to MISC2 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_MISC1                           ,Programmed to MISC1 trimmer value"
textline "                                "
group.long 0xC20++0x03
line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3                          ,Programmed to CKE3 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE2                          ,Programmed to CKE2 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE1                          ,Programmed to CKE1 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE0                          ,Programmed to CKE0 fine trimmer value"
group.long 0xC24++0x03
line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7                          ,Programmed to CKE7 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE6                          ,Programmed to CKE6 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE5                          ,Programmed to CKE5 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE4                          ,Programmed to CKE4 fine trimmer value"
group.long 0xC28++0x03
line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2                          ,Programmed to MISC2 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_MISC1                          ,Programmed to MISC1 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_MISC0                          ,Programmed to MISC0 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_RESET                          ,Programmed to RESET fine trimmer value"
textline "                                "
group.long 0xC30++0x07
line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control"
bitfld.long 0x00 27. " DISABLE_CFG_CMD3           ,CMD3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 26. "               DISABLE_CFG_CMD2           ,CMD2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " DISABLE_CFG_CMD1           ,CMD1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 24. "               DISABLE_CFG_CMD0           ,CMD0 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " DISABLE_CFG_BYTE7          ,BYTE7 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 22. "               DISABLE_CFG_BYTE6          ,BYTE6 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 21. " DISABLE_CFG_BYTE5          ,BYTE5 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 20. "               DISABLE_CFG_BYTE4          ,BYTE4 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " DISABLE_CFG_BYTE3          ,BYTE3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 18. "               DISABLE_CFG_BYTE2          ,BYTE2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 17. " DISABLE_CFG_BYTE1          ,BYTE1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 16. "               DISABLE_CFG_BYTE0          ,BYTE0 pad macro configuration read|write disable" "No,Yes"
line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW         ,Enable switch to low power regulator" "Disabled,Enabled"
textline "                                         "
endif
bitfld.long 0x04 16.--19. " VTT_VDDA_LVL               ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL              ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                VTT_VCLAMP_LVL             ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xC38++0x03
line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register"
bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL              ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                VTT_VAUXP_CTRL             ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL            ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xC3C++0x2F
line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL      ,BG current bias select" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 16.--17. "              DDLL_DDLL_BG_ILVL_CTRL     ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL       ,BANDGAP output current level control" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 8.--9. "              BG_ILVL_CTRL               ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
endif
bitfld.long 0x00 4.--6. " BG_SETUP                   ,Temperature coefficient control" "0,1,2,3,4,5,6,7"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "                 BGLP_E_PWRD                ,BGLP E PWRD" "0,1"
endif
textline "                                         "
bitfld.long 0x00 1. " BG_MODE                    ,Regulator mode" "High performance,Low power"
bitfld.long 0x00 0. "  BG_E_PWRD                  ,Power down regulator" "0,1"
line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads"
bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE        ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..."
bitfld.long 0x04 25. "  TX_E_DDLL_TCLK             ,TX E DDLL TCLK" "0,1"
textline "                                         "
bitfld.long 0x04 24. " E_TX_NMOS_DRVUP            ,E TX NMOS DRVUP" "0,1"
bitfld.long 0x04 20.--21. "                 TX_DCC_MODE                ,TX DCC mode" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 16.--17. " MEM_MODE                   ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..."
bitfld.long 0x04 13. "      TX_SEL_MV_CYCLE            ,Multi-voltage timing path timing closure" "1 cycle,2 cycles"
textline "                                         "
bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE      ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 9. "     E_PWRD                     ,DC current paths within entire brick cell disable" "Enabled,Disabled"
textline "                                         "
bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE      ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 0.--1. "     QUSE_MODE                  ,Pad quse mode" "0,1,2,3"
line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs"
bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL    ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 24.--25. "            DATA_DQ_TX_DRVDN_ZCTRL     ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL    ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 20.--21. "            DATA_DQ_TX_DRVUP_ZCTRL     ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL     ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 16.--17. "            CMD_DQ_TX_DRVDN_ZCTRL      ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL     ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 12.--13. "            CMD_DQ_TX_DRVUP_ZCTRL      ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL    ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 8.--9. "            DQ_RX_DRVDN_TERM_ZCTRL     ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL    ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 4.--5. "            DQ_RX_DRVUP_TERM_ZCTRL     ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL         ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 0.--1. "            CMD_TX_DRVUP_ZCTRL         ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick"
bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM          ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "                DQS_RX_DRVUP_TERM          ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM           ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                DQ_RX_DRVUP_TERM           ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick"
bitfld.long 0x10 8.--13. " CMD_TX_DRVDN               ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                CMD_TX_DRVUP               ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad"
bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL             ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 22. "                CMD_RX_E_DIRECT_ZI         ,Command RX E direct ZI" "0,1"
textline "                                         "
bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD        ,Command RX E IBIAS PWRD" "0,1"
bitfld.long 0x14 16.--20. "                 CMD_DQS_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON        ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x14 14. "          CMD_DQ_RX_E_RDIV           ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE       ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x14 12. "          CMD_DQS_RX_E_DIFF_MODE     ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL    ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 4.--5. "                 CMD_DQS_RX_MODE            ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE             ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad"
bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 22. "                DATA_RX_E_DIRECT_ZI        ,Data RX E Direct ZI" "0,1"
textline "                                         "
bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD       ,Data RX E IBIAS PWRD" "0,1"
bitfld.long 0x18 16.--20. "                 DATA_DQS_RX_CTRL           ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON       ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x18 14. "          DATA_DQ_RX_E_RDIV          ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE      ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x18 12. "          DATA_DQS_RX_E_DIFF_MODE    ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL   ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4.--5. "                 DATA_DQS_RX_MODE           ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE            ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad"
bitfld.long 0x1C 13. " CMD_E_PWRD_RX              ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x1C 12. "          CMD_DDLL_QU_SEL_M2CLK      ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE      ,Command DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x1C 4.--5. "        CMD_DQSP_RX_TERM_MODE      ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE        ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad"
bitfld.long 0x20 13. " DATA_E_PWRD_RX             ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x20 12. "          DATA_DDLL_QU_SEL_M2CLK     ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE     ,Data DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x20 4.--5. "        DATA_DQSP_RX_TERM_MODE     ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE       ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad"
bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON      ,Command DQS TX drive force on" "0,1"
bitfld.long 0x24 26. "                 CMD_DQ_TX_DRVFORCEON       ,Command DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON      ,Command command TX drive force on" "0,1"
bitfld.long 0x24 24. "                 CMD_CMD_TX_E_DCC           ,Command command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 20. "          CMD_DQSN_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC          ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x24 14.--15. "          CMD_DQS_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 12. "          CMD_DQSP_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 9. "     CMD_DQSP_TX_E_DCC          ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 8. " CMD_DQS_E_IVREF            ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x24 6.--7. "          CMD_DQ_TX_EBOOST_PU_MODE   ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU           ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 4. "          CMD_DQ_TX_E_WKPD           ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE   ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 1. "     CMD_DQ_TX_E_DCC            ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 0. " CMD_DQ_E_IVREF             ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad"
bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON     ,Data DQS TX drive force on" "0,1"
bitfld.long 0x28 26. "                 DATA_DQ_TX_DRVFORCEON      ,Data DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON     ,Data command TX drive force on" "0,1"
bitfld.long 0x28 24. "                 DATA_CMD_TX_E_DCC          ,Data command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 20. "          DATA_DQSN_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC         ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x28 14.--15. "          DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 12. "          DATA_DQSP_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 9. "     DATA_DQSP_TX_E_DCC         ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 8. " DATA_DQS_E_IVREF           ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x28 6.--7. "          DATA_DQ_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU          ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 4. "          DATA_DQ_TX_E_WKPD          ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 1. "     DATA_DQ_TX_E_DCC           ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 0. " DATA_DQ_E_IVREF            ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks"
bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN        ,Command DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 2. "                 CMD_DQ_TX_BPSDYNEN         ,Command DQ TX BPSDYNEN" "0,1"
textline "                                         "
bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN       ,Data DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 0. "                 DATA_DQ_TX_BPSDYNEN        ,Data DQ TX BPSDYNEN" "0,1"
sif (cpuis("TEGRAX2"))
group.long 0xC6C++0x03
line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register"
hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD          ,DSR VTT VDDA Load"
bitfld.long 0x00 0.--3. "                DSR_VTT_VDDA_LVL           ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC70++0x0B
line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick"
bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN          ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                DATA_DQS_TX_DRVUP          ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN           ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                DATA_DQ_TX_DRVUP           ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick"
bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN           ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                CMD_DQS_TX_DRVUP           ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN            ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                CMD_DQ_TX_DRVUP            ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs"
bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS          ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "          E_CAL_UPDATE_HIGH          ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY         ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
group.long 0xCE0++0x0B
line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves"
hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL                             ,Calibration value"
line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values"
bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN              ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 27. "            CMD_DDLL_OFFSET_BYTE_RXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 25. "            CMD_DDLL_OFFSET_BYTE_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 23. "            CMD_DDLL_OFFSET_BIT_RXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 21. "            CMD_DDLL_OFFSET_BIT_TXDQS_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 16. "            DATA_DDLL_OFFSET_BYTE_QU_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 14. "            DATA_DDLL_OFFSET_BYTE_TXCMD_EN          ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 12. "            DATA_DDLL_OFFSET_BYTE_TXDQ_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 10. "            DATA_DDLL_OFFSET_BIT_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 8. "            DATA_DDLL_OFFSET_BIT_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 0.--5. " DDLL_OFFSET                             ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training"
bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN     ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 27. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 25. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 23. "            CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 21. "            CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 16. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 14. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 12. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 10. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 8. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET                    ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0xCEC++0x03
line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0"
bitfld.long 0x00 0. " SEL_NEG_IB                              ,Select negative edge flop as output" "Disabled,Enabled"
endif
group.long 0xCF0++0x0F
line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register"
hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD                           ,VTT VDDA Load"
hexmask.long.byte 0x00 8.--15. 1. "                  VTT_VAUXP_LOAD                          ,VTT VAUXP Load"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD                         ,VTT VCLAMP Load"
line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3"
hexmask.long.word 0x04 0.--10. 1. " IB_RXRT                                 ,Programmed to IB DQ receive path retiming"
line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0"
bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
textline "                                         "
bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
bitfld.long 0x08 2. "            CH0_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
textline "                                         "
bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
bitfld.long 0x08 0. "                   CH0_TRAINING_ENABLED                    ,Channel 0 training enable" "Disabled,Enabled"
line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1"
bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
bitfld.long 0x0C 3. "           CH1_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
bitfld.long 0x0C 1. "         CH1_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
textline "                                         "
bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED                    ,Channel 1 training enable" "Disabled,Enabled"
tree.end
width 27.
tree "TRAINING Registers"
group.long 0xE00++0x03
line.long 0x00 "CMD_0,Main Register For Launching Training"
bitfld.long 0x00 31. " GO                   ,Start training" "Not started,Started"
bitfld.long 0x00 30. "    PERIODIC             ,Start periodic training" "Not started,Started"
bitfld.long 0x00 8. "    QUSE_VREF      ,Initiates DQS_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 7. "   RD_VREF           ,Initiates IB_DQ_VREF training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 6. " WR_VREF              ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 5. "  CA_VREF              ,Initiates CA_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 4. "  QUSE           ,Initiates QUSE training" "Not initiated,Initiated"
bitfld.long 0x00 3. "   WR                ,Initiates WR training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 2. " RD                   ,Initiates RD training" "Not initiated,Initiated"
bitfld.long 0x00 1. "  CA                   ,Initiates CA training" "Not initiated,Initiated"
bitfld.long 0x00 0. "  PRIME          ,Writes the custom pattern into MPC register" "Disabled,Enabled"
if ((per.l(ad:0x02C70000+0xE04)&0x00010000)==0x00010000)
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Rank to train" "RANK0,RANK1"
bitfld.long 0x00 13. "           UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
else
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0"
bitfld.long 0x00 13. "  UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
endif
rgroup.long 0xE08++0x03
line.long 0x00 "STATUS_0,Read Back For Training Status"
bitfld.long 0x00 0.--1. " STATUS               ,Training status" "Done,Running,Error,?..."
group.long 0xE0C++0x3F
line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep"
bitfld.long 0x00 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x00 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x00 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x00 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x00 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x00 10.--18. 1. "           MAXIMUM              ,Maximum"
hexmask.long.word 0x00 0.--8. 1. "           MINIMUM        ,Minimum"
line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep"
bitfld.long 0x04 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x04 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x04 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x04 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x04 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x04 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x04 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x04 10.--19. 1. "           MAXIMUM              ,2's complement"
hexmask.long.word 0x04 0.--9. 1. "           MINIMUM        ,2' complement"
line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training"
hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x08 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x08 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x08 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x08 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x08 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x08 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x08 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep"
bitfld.long 0x0C 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x0C 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x0C 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x0C 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x0C 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x0C 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x0C 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x0C 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x0C 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x0C 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep"
hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x10 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x10 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x10 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x10 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x10 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x10 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x10 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep"
bitfld.long 0x14 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x14 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x14 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x14 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x14 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep"
bitfld.long 0x18 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x18 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x18 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x18 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x18 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x18 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x18 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x18 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x18 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x18 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x18 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep"
hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x1C 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x1C 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x1C 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x1C 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x1C 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x1C 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x1C 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep"
bitfld.long 0x20 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x20 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x20 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x20 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x20 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep"
bitfld.long 0x24 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x24 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x24 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x24 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x24 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x24 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x24 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x24 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x24 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x24 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x24 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep"
hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x28 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x28 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x28 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x28 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x28 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x28 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x28 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep"
hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT             ,Number of NOPs between 2 CA training reads"
line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training"
bitfld.long 0x30 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x30 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x30 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x30 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x30 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep"
bitfld.long 0x34 31. " TADR_ENABLE          ,Set to disabled" "Disabled,?..."
hexmask.long.byte 0x34 12.--19. 1. "       TADR_MAX             ,Maximum tADR allowed in tCK"
hexmask.long.word 0x34 0.--11. 1. "             TADR_SETTING   ,CA BRLSHFT + CA trimmer during tADR training"
line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK"
hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY          ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 16.--23. 1. "             PRIV_DELAY           ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 8.--15. 1. "             SHORT_TRIMMER  ,Settle time for short trimmer"
hexmask.long.byte 0x38 0.--7. 1. "              LONG_TRIMMER      ,Settle time for long trimmer"
line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers"
bitfld.long 0x3C 24.--27. " WINDOW_LIMIT         ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 0.--7. 1. "             SELECT               ,Specifies output on DQ registers"
group.long 0xE5C++0x13
line.long 0x00 "MPC_0,MPC-RD Registers Data"
hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN       ,Invert pattern"
hexmask.long.word 0x00 0.--15. 1. "           DATA                 ,Data"
line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM"
bitfld.long 0x04 31. " WRITE                ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered"
bitfld.long 0x04 16.--19. "  FORMAT               ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 0x01 "             SELECT_OFFSET  ,Location to write in pattern RAM"
line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM"
line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM"
line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK"
hexmask.long.word 0x10 16.--31. 1. " OB                   ,Settle time for WRITE|CA Vrefs"
hexmask.long.word 0x10 0.--15. 1. "           IB                   ,Settle time for READ|QUSE Vrefs"
sif (cpuis("TEGRAX2"))
group.long 0xE98++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xE9C++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA0++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA4++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA8++0x03
line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEAC++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB0++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB4++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB8++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEBC++0x03
line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0xEC0++0x07
line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results"
hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 16.--23. 1. "             RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 0.--7. 1. "             RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results"
hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 16.--23. 1. "             RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 0.--7. 1. "             RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
group.long 0xED0++0x03
line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep"
bitfld.long 0x00 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x00 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x00 0.--7. 1. "             MINIMUM              ,Minimum"
tree.end
width 0x0B
tree.end
tree "EMC1"
base ad:0x02C80000
width 21.
group.long 0x00++0x13
line.long 0x00 "INSTATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT           ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  ECC_ERR_BUF_OVF_INT              ,ECC Error Buffer overflow" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 11. "   ECC_CORR_ERR_INT              ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  ECC_UNCORR_ERR_INT               ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt"
textline "                            "
textfld "  "
endif
eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT          ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt"
eventfld.long 0x00 8. "  CCFIFO_OVERFLOW_INT              ,Clock change FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 7. "   DLL_ALARM_INT                ,Indicate DLL alarm has been set" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 6. "   ACCESS_TO_SR_DPD_DEV_INT      ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt"
eventfld.long 0x00 5. "  MRR_DIVLD_INT                    ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt"
eventfld.long 0x00 4. "   CLKCHANGE_COMPLETE_INT       ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 3. "   REFRESH_OVERFLOW_INT          ,Refresh request overflow timeout" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK       ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "      ECC_ERR_BUF_OVF_INTMASK          ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 11. "   ECC_CORR_ERR_INTMASK          ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "      ECC_UNCORR_ERR_INTMASK           ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                            "
textfld "  "
endif
bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK      ,Mask for DLL lock timeout interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "      CCFIFO_OVERFLOW_INTMASK          ,Mask for clock change FIFO overflow" "Masked,Unmasked"
bitfld.long 0x04 7. "       DLL_ALARM_INTMASK            ,Indicate DLL alarm has been set" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 6. "   ACCESS_TO_SR_DPD_DEV_INTMASK  ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
bitfld.long 0x04 5. "      MRR_DIVLD_INTMASK                ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "       CLKCHANGE_COMPLETE_INTMASK   ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 3. "   REFRESH_OVERFLOW_INTMASK      ,Mask for refresh request overflow timeout" "Masked,Unmasked"
line.long 0x08 "DBG_0,Debug Register"
bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP           ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled"
bitfld.long 0x08 30. "      WRITE_ACTIVE_ONLY                ,Write active version of the register only" "Disabled,Enabled"
bitfld.long 0x08 29. "       ALLOW_HOSTIF_DURING_CCFIFO   ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 28. "   ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled"
bitfld.long 0x08 26.--27. "      CFG_SWAP                         ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..."
bitfld.long 0x08 25. "  AUTOCAL_ALLOW_WRITE_MUX      ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24. "   CFG_PRIORITY                  ,Priority of cfg accesses to the DRAM" "Disabled,Enabled"
bitfld.long 0x08 13. "      SUPPRESS_WRITE_CMD               ,Suppress write command sent to DRAM" "Disabled,Enabled"
bitfld.long 0x08 12. "       SUPPRESS_READ_CMD            ,Suppress read command sent to DRAM" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 11. "   STRETCH_MRW_RESET             ,Stretch MRW RESET command to three clocks" "Disabled,Enabled"
bitfld.long 0x08 10. "      AP_REQ_BUSY_CTRL                 ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled"
bitfld.long 0x08 9. "       READ_DQM_CTRL                ,DQM signal control" "Managed,Always on"
textline "                            "
bitfld.long 0x08 2. "   FORCE_UPDATE                  ,Active state update enable" "Disabled,Enabled"
bitfld.long 0x08 1. "      WRITE_MUX                        ,Controls state of the writes to the configuration registers" "Assembly,Active"
bitfld.long 0x08 0. "       READ_MUX                     ,Controls state of the reads to the configuration registers" "Active,Assembly"
line.long 0x0C "CFG_0,Configuration Register"
bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD               ,DRAM clock stop (power down)" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DRAM_CLKSTOP_SR                  ,DRAM clock stop (self-refresh)" "Disabled,Enabled"
bitfld.long 0x0C 29. "       DRAM_ACPD                    ,Opportunistic active power down for DRAM controller" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 28. "   DYN_SELF_REF                  ,DYN_SELF_REF" "Disabled,Enabled"
bitfld.long 0x0C 26. "      REQACT_ASYNC                     ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled"
bitfld.long 0x0C 25. "       AUTO_PRE_WR                  ,MC auto-precharge indication for writes" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 24. "   AUTO_PRE_RD                   ,MC auto-precharge indication for reads" "Disabled,Enabled"
bitfld.long 0x0C 23. "      MAN_PRE_WR                       ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled"
bitfld.long 0x0C 22. "       MAN_PRE_RD                   ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 21. "   PERIODIC_QRST                 ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. "      WAIT_FOR_NVDISPLAY_READY_B4_CC   ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 18. "   DSR_VTTGEN_DRV_EN             ,Enable VTTGEN controls during DSR" "Disabled,Enabled"
bitfld.long 0x0C 16.--17. "      EMC2MC_CLK_RATIO                 ,EMC to MC clock ratio" "2x,1x,4x,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 9. "             WAIT_FOR_ISP2B_READY_B4_CC   ,Wait for isp2b ready event" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 8. "   WAIT_FOR_VI2_READY_B4_CC      ,Wait for vi2 ready event" "Disabled,Enabled"
bitfld.long 0x0C 7. "      WAIT_FOR_ISP2_B4_CC              ,Wait for isp2 ready event" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 6. "   INVERT_DQM                    ,Invert DQM polarity" "Not inverted,Inverted"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 5. "  WAIT_FOR_DISPLAYB_READY_B4_CC    ,Wait for display ready event" "Disabled,Enabled"
bitfld.long 0x0C 4. "       WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled"
endif
line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]"
bitfld.long 0x10 0. " EMEM_NUMDEV                   ,Number of populated DRAM devises" "N1,N2"
group.long 0x20++0x07
line.long 0x00 "REFCTRL_0,Refresh Control Register"
bitfld.long 0x00 31. " REF_VALID                     ,Enable refresh controller" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DEVICE_REFRESH_DISABLE           ,Refresh disable to individual attached device" "0,1,2,3"
line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins"
bitfld.long 0x04 17. " PIN_GPIO_EN[1]                ,General purpose DRAM I/O[1] enable" "Disabled,Enabled"
bitfld.long 0x04 16. "      PIN_GPIO_EN[0]                   ,General purpose DRAM I/O[0] enable" "Disabled,Enabled"
bitfld.long 0x04 13. "       PIN_GPIO[1]                  ,General purpose DRAM I/O[1] activate" "Inactive,Active"
textline "                            "
bitfld.long 0x04 12. "   PIN_GPIO[0]                   ,General purpose DRAM I/O[0] activate" "Inactive,Active"
bitfld.long 0x04 8. "      PIN_RESET                        ,DDR3 RESET# pin level" "Active,Inactive"
bitfld.long 0x04 4. "       PIN_DQM                      ,Used to always mask DRAM writes" "Normal,Inactive"
textline "                            "
bitfld.long 0x04 2. "   PIN_CKE_PER_DEV               ,Per device CKE enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      PIN_CKEB                         ,Level of the CKEB pin" "Power down,Normal"
bitfld.long 0x04 0. "     PIN_CKE                      ,Level of the CKE pin" "Power down,Normal"
textline "                            "
group.long 0x28++0x93
line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers"
bitfld.long 0x00 0. " TIMING_UPDATE             ,Timing update event" "Disabled,Enabled"
line.long 0x04 "RC_0,DRAM RC Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RC                        ,Row cycle time"
line.long 0x08 "RFC_0,DRAM RFC Timing Parameter"
hexmask.long.word 0x08 0.--9. 1. " RFC                       ,Auto refresh cycle time"
line.long 0x0C "RAS_0,DRAM RAS Timing Parameter"
bitfld.long 0x0C 0.--5. " RAS                       ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "RP_0,DRAM RP Timing Parameter"
bitfld.long 0x10 0.--5. " RP                        ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "R2W_0,DRAM R2W Timing Parameter"
bitfld.long 0x14 0.--5. " R2W                       ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "W2R_0,DRAM W2R Timing Parameter"
bitfld.long 0x18 0.--5. " W2R                       ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "R2P_0,DRAM R2P Timing Parameter"
bitfld.long 0x1C 0.--5. " R2P                       ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "W2P_0,DRAM W2P Timing Parameter"
hexmask.long.byte 0x20 0.--6. 1. " W2P                       ,Write to precharge commands for the same bank number of cycles"
line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter"
bitfld.long 0x24 0.--5. " RD_RCD                    ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter"
bitfld.long 0x28 0.--5. " WR_RCD                    ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x2C "RRD_0,DRAM RRD Timing Parameter"
bitfld.long 0x2C 0.--4. " RRD                       ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "REXT_0,DRAM REXT Timing Parameter"
bitfld.long 0x30 0.--4. " REXT                      ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x34 "WDV_0,DRAM WDV Timing Parameter"
bitfld.long 0x34 0.--5. " WDV                       ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..."
line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter"
bitfld.long 0x38 0.--5. " QUSE                      ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "QRST_0,DRAM QRST Timing Parameter"
bitfld.long 0x3C 16.--20. " QRST_DURATION             ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x3C 0.--6. 1. "      QRST                   ,Time from expiration of QSAFE until reset is issued"
line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter"
hexmask.long.byte 0x40 0.--6. 1. " QSAFE                     ,Time from a read command to when it is safe to issue a QRST"
line.long 0x44 "RDV_0,DRAM RDV Timing Parameter"
hexmask.long.byte 0x44 0.--6. 1. " RDV                       ,Time from read command to latching the read data from the pad macros"
line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter"
hexmask.long.word 0x48 6.--15. 1. " REFRESH                   ,Interval between refresh requests"
bitfld.long 0x48 0.--5. "           REFRESH_LO             ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count"
bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM         ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..."
line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter"
bitfld.long 0x50 0.--5. " PDEX2WR                   ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter"
bitfld.long 0x54 0.--5. " PDEX2RD                   ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter"
bitfld.long 0x58 0.--5. " PCHG2PDEN                 ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter"
bitfld.long 0x5C 0.--5. " ACT2PDEN                  ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter"
hexmask.long.word 0x60 0.--8. 1. " AR2PDEN                   ,Timing delay from an autorefresh command to power down entry"
line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter"
hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN                   ,Timing delay from a read/write command to power down entry"
line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter"
hexmask.long.word 0x68 0.--9. 1. " TXSR                      ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL"
line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter"
bitfld.long 0x6C 0.--5. " TCKE                      ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter"
hexmask.long.byte 0x70 0.--6. 1. " TFAW                      ,Width of the FAW for 8-bank devices"
line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter"
bitfld.long 0x74 0.--5. " TRPAB                     ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter"
hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE                ,Minimum number of cycles of a stable clock period"
line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter"
bitfld.long 0x7C 0.--4. " TCLKSTOP                  ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter"
hexmask.long.word 0x80 0.--13. 1. " TREFBW                    ,Width of the burst-refresh window"
line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter"
bitfld.long 0x84 0.--3. " TPPD                      ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x88 "ODT_WRITE_0,ODT Write Control"
bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE   ,ODT enable during write" "Disabled,Enabled"
bitfld.long 0x88 8.--11. "       ODT_WR_DURATION        ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x88 5. "        SHARE_ONE_ODT                        ,Share one ODT" "Disabled,Enabled"
textline "                            "
bitfld.long 0x88 4. "   DRIVE_BOTH_ODT            ,ODTs' assertion for the requested or both devices" "Requested,Both"
bitfld.long 0x88 0.--3. "      ODT_WR_DELAY           ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter"
hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR                  ,Precharge-precharge delay"
line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter"
bitfld.long 0x90 0.--4. " WEXT                      ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0xBC++0x03
line.long 0x00 "TRTM_0,TRTM Timing Parameter"
hexmask.long.byte 0x00 0.--6. 1. " TRTM                      ,Read to MRW delay"
group.long 0xF8++0x07
line.long 0x00 "TWTM_0,TWTM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWTM                      ,Read to MRW/MRR delay"
line.long 0x04 "TRATM_0,TRATM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TRATM                     ,Read with AP to MRW/MRR delay"
group.long 0x108++0x07
line.long 0x00 "TWATM_0,TWATM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWATM                     ,Read with AP to MRW/MRR delay"
line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR2REF                    ,Read to refresh delay"
endif
group.long 0xC0++0x03
line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter"
hexmask.long.word 0x00 0.--8. 1. " RFS_SLR                   ,Stagger refresh cycle time between ranks"
group.long 0xC4++0x1B
line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT         ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command"
hexmask.long.word 0x00 0.--9. 1. "           MRS_EXT1_WAIT_CNT      ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command"
line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT         ,Number of EMC clocks to wait [MRS long command]"
hexmask.long.word 0x04 0.--9. 1. "           MRS_SHORT_WAIT_CNT     ,Number of EMC clocks to wait [MRS short command]"
line.long 0x08 "MRS_0,Command Trigger For MRS"
bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "   USE_MRS_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   MRS_BA                    ,Registers to be addressed in DRAM" "MRS,?..."
hexmask.long.word 0x08 0.--13. 1. "            MRS_ADR                ,Mode-register data to be written"
line.long 0x0C "EMRS_0,Command Trigger For EMRS"
bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "   USE_EMRS_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS_BA                   ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS_ADR               ,Mode-register data to be written"
line.long 0x10 "REF_0,Command Trigger For Refresh"
bitfld.long 0x10 30.--31. " REF_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
hexmask.long.word 0x10 8.--18. 1. "   REF_NUM                ,Number of refresh cycles (REF_NUM+1)"
textline "                            "
bitfld.long 0x10 1. "   REF_NORMAL                ,Refresh execution mechanism" "Immediate,Normal"
bitfld.long 0x10 0. "      REF_CMD                ,Refresh to all DRAM banks" "Disabled,Enabled"
line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL"
bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x14 0. "   PRE_CMD                ,PRECHARGE to all DRAM banks" "Disabled,Enabled"
line.long 0x18 "NOP_0,Command Trigger For NOP"
bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x18 0. "   NOP_CMD                ,NOP to all DRAM banks" "Disabled,Enabled"
if ((per.l(ad:0x02C80000+0xE0)&0x1)==0x1)
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 8. "   ACTIVE_SELF_REF        ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High"
bitfld.long 0x00 0. "      SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
else
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 0. "                                    SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
endif
group.long 0xE4++0x13
line.long 0x00 "DPD_0,Command Trigger For DPD"
bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x00 0. "   DPD_CMD                ,Issue a deep power down command" "Disabled,Enabled"
line.long 0x04 "MRW_0,Command Trigger For MRW"
bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x04 26.--27. "   USE_MRW_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x04 16.--23. 0x01 "   MRW_MA                    ,Register address"
hexmask.long.byte 0x04 0.--7. 1. "             MRW_OP                 ,Data to be written"
line.long 0x08 "MRR_0,Command Trigger For MRR"
bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN           ,Active-low chip-select" "Illegal,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "        USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x08 16.--23. 0x01 "   MRR_MA                    ,Register address"
hexmask.long.word 0x08 0.--15. 1. "             MRR_OP                 ,Data returned"
line.long 0x0C "CMDQ_0,Command QUEUE Depth Register"
bitfld.long 0x0C 24.--28. " RW_WD_DEPTH               ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--14. "             PRE_DEPTH              ,Pre depth" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x0C 8.--10. "   ACT_DEPTH                 ,Act depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--4. "              RW_DEPTH               ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register"
bitfld.long 0x10 24.--27. " MCWD_DEPTH                ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--10. "             MCACT_DEPTH            ,MCACT depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "         MCREQ_DEPTH                          ,MCREQ depth" "0,1,2,3,4,5,6,7"
group.long 0x100++0x07
line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register"
hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3          ,Config FBIO spare 3"
hexmask.long.byte 0x00 16.--23. 1. "             CFG_FBIO_SPARE_2       ,Config FBIO spare 2"
hexmask.long.byte 0x00 8.--15. 1. "        CFG_FBIO_SPARE_1                     ,Config FBIO spare 1"
textline "                            "
hexmask.long.byte 0x00 2.--7. 1. "   CFG_FBIO_SPARE_0          ,Config FBIO spare 0"
bitfld.long 0x00 1. "             CFG_ADR_EN             ,Write once after powering up EMC" "Disabled,Enabled"
bitfld.long 0x00 0. "  CFG_SWAP_DLL                         ,Config swap DLL" "0,1"
line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register"
bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO   ,Drive data bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 30. "       DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 28. "  MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. "   CMD_BUS_RETURN_TO_ZERO    ,Drive command bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 26. "       CMD_BUS_RETURN_TO_ONE  ,Drives the command bus back to a one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 25. "  LPDDR3_DRAM                          ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 24. "   LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "       ERR_RD_BUBBLE          ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x04 13.--15. "   EMC2PMACRO_CFG_QUSE_MODE  ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..."
bitfld.long 0x04 12. "  CMD_2T_TIMING          ,2T command timing" "Disabled,Enabled"
bitfld.long 0x04 10. "  DISABLE_CONCURRENT_AUTOPRE           ,Disable reads/writes to a device until precharge command" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 8. "   CMD_TX_EN                 ,Controls TX_EN on the command bricks" "No,Yes"
bitfld.long 0x04 4. "            DRAM_                  ,DRAM width" "X32,X64"
bitfld.long 0x04 2.--3. "       DRAM_BURST                           ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16"
textline "                            "
bitfld.long 0x04 0.--1. "   DRAM_TYPE                 ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2"
sif (cpuis("TEGRAX2"))
group.long 0x110++0x07
line.long 0x00 "ACT_0,Command Trigger: Act"
bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN        ,Active low chip-select" "0,1,2,3"
bitfld.long 0x00 23.--25. "              SW_ACT_BANK            ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--15. 1. "         SW_ACT_ROW                           ,Row number to be activated"
line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done"
bitfld.long 0x04 0. " MEM_INIT_DONE             ,This bit is set by boot sequence when DRAM initiation is done" "0,1"
endif
group.long 0x114++0x0B
line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register"
bitfld.long 0x00 0.--2. " CFG_QUSE_LATE             ,FBIO configuration register" "0,1,2,3,4,5,6,7"
line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter"
bitfld.long 0x04 0.--5. " PDEX2CKE                  ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter"
bitfld.long 0x08 0.--5. " CKE2PDEN                  ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hgroup.long 0x120++0x03
hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved"
group.long 0x124++0x1F
line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD"
hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD            ,Number of idle cycles to wait before allowing power-down entry"
line.long 0x04 "MPC_0,MPC CMD (LP4 Only)"
bitfld.long 0x04 30.--31. " MPC_DEV                   ,SELECTN" "0,1,2,3"
bitfld.long 0x04 26.--27. "              MPC_SUBP_SELECTN       ,Active-low subchannel select" "Both,Subp1,Subp0,?..."
bitfld.long 0x04 9. "     MPC_WR                               ,Send CAS2 (required for FIFO WR)" "Not send,Send"
textline "                            "
bitfld.long 0x04 8. "   MPC_RD                    ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send"
bitfld.long 0x04 7. "       MPC_CAS2               ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send"
hexmask.long.byte 0x04 0.--6. 1. "  MPC_OP                               ,MPC OP code"
line.long 0x08 "EMRS2_0,EMRS2 Command Trigger"
bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "           USE_EMRS2_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   EMRS2_BA                  ,EMRS2 BA" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x08 0.--13. 1. "          EMRS2_ADR              ,Mode register data to be written"
line.long 0x0C "EMRS3_0,EMRS3 Command Trigger"
bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "           USE_EMRS3_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS3_BA                  ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS3_ADR              ,Mode register data to be written"
line.long 0x10 "MRW2_0,MRW2 Command Trigger"
bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x10 26.--27. "           USE_MRW2_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x10 16.--23. 0x01 "   MRW2_MA                   ,Register address"
hexmask.long.byte 0x10 0.--7. 1. "             MRW2_OP                ,Data to be written"
line.long 0x14 "MRW3_0,MRW3 Command Trigger"
bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x14 26.--27. "           USE_MRR_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x14 16.--23. 0x01 "   MRW3_MA                   ,Register address"
hexmask.long.byte 0x14 0.--7. 1. "             MRW3_OP                ,Data to be written"
line.long 0x18 "MRW4_0,MRW4 Command Trigger"
bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x18 26.--27. "           USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x18 16.--23. 0x01 "   MRW4_MA                   ,Register address"
hexmask.long.byte 0x18 0.--7. 1. "             MRW4_OP                ,Data to be written"
line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register"
bitfld.long 0x1C 31. " OBS_BUS_CLKEN             ,OBS bus clock enable" "Disabled,Enabled"
bitfld.long 0x1C 8. "       PAD_CONFIG_OVR         ,Pad config override" "Disabled,Enabled"
bitfld.long 0x1C 7. "  TR_CLKEN_OVR                         ,TR clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 6. "   STATS_CLKEN_OVR           ,Stats clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 3. "       RR_CLKEN_OVR           ,RR clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 2. "  DRAMC_CLKEN_OVR                      ,DRAMC clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 1. "   CMDQ_CLKEN_OVR            ,CMDQ clock enable override" "Disabled,Enabled"
group.long 0x144++0x1B
line.long 0x00 "R2R_0,R2R_0 Timing Parameter"
bitfld.long 0x00 0.--3. " R2R                       ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter"
bitfld.long 0x04 0.--3. " W2W                       ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter"
bitfld.long 0x08 0.--5. " EINPUT                    ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter"
bitfld.long 0x0C 0.--5. " EINPUT_DURATION           ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter"
bitfld.long 0x10 0.--5. " RXTERM                    ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter"
bitfld.long 0x14 0.--5. " TCKESR                    ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "TPD_0,TPD_0 Timing Parameter"
bitfld.long 0x18 0.--5. " TPD                       ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
width 23.
group.long 0x2A4++0x07
line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads"
rbitfld.long 0x00 31. " AUTO_CAL_START                             ,Starts a complete autocal cycle with measure FSM" "Not started,Started"
bitfld.long 0x00 30. "            AUTO_CAL_COMP_PAD_FLIP                     ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE                            ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled"
bitfld.long 0x00 25.--28. "               AUTO_CAL_NUM_SAMPLES                       ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK                        ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled"
bitfld.long 0x00 19.--23. "               AUTO_CAL_WAIT_AFTER_EN                     ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                              ,Autocal measure step interval" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 11.--15. "                      AUTO_CAL_UPDATE_DELAY                      ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL                      ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled"
bitfld.long 0x00 9. "               AUTO_CAL_MEASURE_STALL                     ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 7. "               AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START                      ,Triggers an autocal update FSM cycle" "Disabled,Enabled"
rbitfld.long 0x00 1. "               AUTO_CAL_TRANSFER_START                    ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START                     ,Triggers an autocal compute FSM cycle" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval"
hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL                          ,Calibration interval value"
rgroup.long 0x2AC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN                       ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF0_DRVUP                       ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1"
bitfld.long 0x00 8. "                      AUTO_CAL_PU_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_ACTIVE                            ,Autocal activity status" "Inactive,Active"
bitfld.long 0x00 3. "               AUTO_CAL_UPDATE_ACTIVE                     ,Autocal update activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE                   ,Autocal transfer activity status" "Inactive,Active"
bitfld.long 0x00 1. "               AUTO_CAL_COMPUTE_ACTIVE                    ,Autocal compute activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE                    ,Autocal measure activity status" "Inactive,Active"
sif (cpuis("TEGRAX2"))
endif
group.long 0x2B0++0x03
line.long 0x00 "REQ_CTRL_0,Request Status/Control"
bitfld.long 0x00 1. " STALL_ALL_WRITES                           ,Stall incoming write transactions" "Allow,Stall"
bitfld.long 0x00 0. "                  STALL_ALL_READS                            ,Stall incoming read transactions" "Allow,Stall"
rgroup.long 0x2B4++0x03
line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status"
bitfld.long 0x00 27. " ACPD_FSM_IDLE[1]                           ,Device[1] power-down FSM is idle" "No,Yes"
bitfld.long 0x00 26. "                    ACPD_FSM_IDLE[0]                           ,Device[0] power-down FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 25. " DSR_FSM_IDLE[1]                            ,Device[1] dynamic self refresh FSM is idle" "No,Yes"
bitfld.long 0x00 24. "                    DSR_FSM_IDLE[0]                            ,Device[0] dynamic self refresh FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 23. " TIMING_UPDATE_STALLED                      ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed"
bitfld.long 0x00 22. "          ZQ_FSM_IDLE                                ,Indicate auto ZQ state machine is idle" "Not idle,Idle"
textline "                                "
bitfld.long 0x00 21. " CFG_ZQ_ACTIVE                              ,Indicates ZQ configuration access is active" "Not active,Active"
bitfld.long 0x00 20. "             MRR_DIVLD                                  ,MRR data available for reading" "Not available,Available"
textline "                                "
bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE                             ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13. "                     DRAM_IN_DPD_DEV[1]                         ,Device[1] in deep powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0]                         ,Device[0] in deep powerdown state" "No,Yes"
bitfld.long 0x00 11. "                    DRAM_IN_ACTIVE_SELF_REFRESH[1]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
bitfld.long 0x00 9. "                    DRAM_IN_SELF_REFRESH_DEV[1]                ,Device[1] in active self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0]                ,Device[0] in active self-refresh" "No,Yes"
bitfld.long 0x00 5. "                    DRAM_IN_POWERDOWN_DEV[1]                   ,Device[1] in powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0]                   ,Device[0] in powerdown state" "No,Yes"
bitfld.long 0x00 2. "                    NO_OUTSTANDING_TRANSACTIONS                ,All non-stalled requests complete status" "Not completed,Completed"
textline "                                "
bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY                         ,Request FIFO is empty" "Not empty,Empty"
group.long 0x2B8++0x03
line.long 0x00 "CFG_2_0,EMC Configuration"
bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT                           ,Gives priority to activates" "Disabled,Enabled"
bitfld.long 0x00 30. "               IGNORE_MC_A_BUS                            ,Ignore the MC *_A_* bus" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE         ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled"
bitfld.long 0x00 28. "               DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE     ,Don't clear timing counters when clock change happen" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY                        ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check"
bitfld.long 0x00 25. "  ALLOW_REF_DURING_CC_PRE_EXE                ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 24. " DSR_STUTTER_ENABLE                         ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled"
bitfld.long 0x00 23. "               CHK_PDEX2RD_TO_START_WR                    ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR"
textline "                                "
bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF                    ,Always generate precharge all bank after refresh" "Disabled,Enabled"
bitfld.long 0x00 20. "               COMBINED_INTERRUPT_MODE                    ,Interrupt mode" "Combined,Independent"
textline "                                "
bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR                        ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled"
bitfld.long 0x00 11. "               DIS_CNTR_WITH_CFG_TIMING_UPDATE            ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled"
textline "                                "
bitfld.long 0x00 7. " EARLY_TRFC_8_CLK                           ,Early TRFC" "16 clocks,8 clocks"
bitfld.long 0x00 3.--5. "              ZQ_EXTRA_DELAY                             ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x00 2. " REF_AFTER_SREF                             ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLKCHANGE_PD_ENABLE                        ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE                       ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL"
rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK            ,Override_val in use" "No,Yes"
rbitfld.long 0x00 30. "                    DLL_RESET                                  ,Reset pulse sent to DLL's on next shadow update" "No,Yes"
textline "                                "
bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE                      ,Disable override of DLL logic" "Disabled,Enabled"
rbitfld.long 0x00 26. "               CFG_DLL_UPDATE_AT_NXT_REFRESH              ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes"
textline "                                "
hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL                       ,Value to use in place of DLI output"
bitfld.long 0x00 15. "                   CFG_DLL_TESTEN                             ,Enable DLL test mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT                       ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               CFG_DLL_TESTSEL                            ,Select DLL test output" "0,1,2,3"
textline "                                "
bitfld.long 0x00 8.--10. " CFG_DLL_UDSET                              ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..."
bitfld.long 0x00 6.--7. "                  CFG_DLL_MODE                               ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock"
textline "                                "
bitfld.long 0x00 5. " CFG_DLL_LOWSPEED                           ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled"
rbitfld.long 0x00 4. "               CFG_DLL_STALL_RW_UNTIL_LOCK                ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC                  ,Enable stalling of all DRAM traffic" "Disabled,Enabled"
bitfld.long 0x00 2. "               CFG_DLL_OVERRIDE_EN                        ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK               ,Stall all traffic until DLL locks" "Disabled,Enabled"
bitfld.long 0x00 0. "               CFG_DLL_EN                                 ,Enable digital DLL" "Disabled,Enabled"
if ((per.l(ad:0x02C80000+0x2BC)&0xC0)==0x80)
group.long 0x2C0++0x03
line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD                         ,Interval between runs in uSec"
else
hgroup.long 0x2C0++0x03
hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
endif
rgroup.long 0x2C4++0x03
line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status"
bitfld.long 0x00 18. " DLL_ALARM_MIN                              ,DLL alarm MIN status" "No alarm,Alarm"
bitfld.long 0x00 17. "               DLL_PRIV_UPDATED                           ,DLL private update status" "Not updated,Updated"
textline "                                "
bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS                         ,DLL calibration in-progress status" "Done,In progress"
bitfld.long 0x00 15. "            DLL_LOCK                                   ,DLL lock status" "Not locked,Locked"
textline "                                "
bitfld.long 0x00 14. " DLL_ALARM                                  ,DLL alarm status" "No alarm,Alarm"
bitfld.long 0x00 13. "               DLL_LOCK_TIMEOUT                           ,DLL lock timeout status" "No timeout,Timeout"
textline "                                "
hexmask.long.word 0x00 0.--10. 1. " DLL_OUT                                    ,DLL_OUT"
group.long 0x2C8++0x13
line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration"
bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE                 ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--11. "                     DLL_NUM_STALL_CYCLES                       ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT                     ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "             CFG_DLL_UPDATE_IDLE                        ,Update dig DLL during idle" "Disabled,Enabled"
line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK                                   ,Programmed to RDV"
line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WDV_MASK                                   ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK                             ,Programmed to RDV_EARLY"
line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter"
hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY                                  ,Time from read command to latching the read data from the pad macros"
sif cpuis("TEGRAX2")
elif (cpuis("TEGRAX1"))
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
endif
group.long 0x2E0++0x0F
line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration"
hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI                           ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD"
hexmask.long.word 0x00 0.--9. 1. "                   ZCAL_INTERVAL_LO                           ,ZCAL_INTERVAL_LO"
line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration"
bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED                       ,ZQ resistor is shared across ranks" "Disabled,Enabled"
bitfld.long 0x04 16.--21. "               ZCAL_LATCH_CNT                             ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT                              ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD"
line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration"
bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,?..."
hexmask.long.byte 0x08 16.--23. 1. "                   ZQ_MRW_MA                                  ,MRW MA field to be sent after ZCAL_INTERVAL"
textline "                                "
hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP                                  ,MRW OP field to be sent after ZCAL_INTERVAL"
line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration"
bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,Neither"
bitfld.long 0x0C 4. "                ZQ_CAL_LENGTH                              ,Indicate short or long ZQ calibration" "Short,Long"
textline "                                "
bitfld.long 0x0C 1. " ZQ_LATCH_CMD                               ,(LPDDR4 only) Issues a ZQ latch command" "0,1"
bitfld.long 0x0C 0. "                      ZQ_CAL_CMD                                 ,(DDR3 only) Issues a ZQ calibration command" "0,1"
group.long 0x2F4++0x03
line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL                     ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
endif
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD              ,Enable weak pull-down" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PD_E_WKPU              ,Enable weak pull-up" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL         ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL         ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                "
bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 8.--9. "                     EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
textline "                                "
bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 2.--5. "                     EMC2TMC_CFG_XM2COMP_PD_TEST_MODE           ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
endif
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
endif
textline "                                "
width 35.
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
endif
group.long 0x310++0x0F
line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register"
bitfld.long 0x00 30.--31. " DQ_PHASE_MIN                               ,DPD phase lower limiter" "0,1,2,3"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 29. "                      CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on command" "Disabled,Enabled"
endif
textline "                                   "
bitfld.long 0x00 24.--28. "          DQ_DPD_EXIT_DELAY                          ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "                     DQ_PHASE_RAMP_IN_TIME                      ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 12.--16. "          DQ_PHASE_RAMP_OUT_TIME                     ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--11. "                     DQ_PHASE_HOLD_MIN                          ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. "          DQ_DPD_ENTRY_DELAY                         ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register"
bitfld.long 0x04 30.--31. " CMD_PHASE_MIN                              ,DPD phase lower limiter" "0,1,2,3"
textline "                                   "
bitfld.long 0x04 29. "          CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on cmd" "Disabled,Enabled"
bitfld.long 0x04 24.--28. "               CMD_DPD_EXIT_DELAY                         ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 20.--23. "          CMD_PHASE_RAMP_IN_TIME                     ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--16. "                     CMD_PHASE_RAMP_OUT_TIME                    ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 8.--11. "          CMD_PHASE_HOLD_MIN                         ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                     CMD_DPD_ENTRY_DELAY                        ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register"
bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8         ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x08 14.--15. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7         ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 12.--13. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6         ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x08 10.--11. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5         ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 8.--9. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4         ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x08 6.--7. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3         ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 4.--5. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2         ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x08 2.--3. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1         ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 0.--1. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0         ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register"
bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8        ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 14.--15. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7        ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 12.--13. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6        ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 10.--11. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5        ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 8.--9. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4        ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x0C 6.--7. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3        ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 4.--5. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2        ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x0C 2.--3. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1        ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 0.--1. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0        ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
group.long 0x324++0x03
line.long 0x00 "SCRATCH0_0,Scratch Register For General Use"
group.long 0x330++0x07
line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1                       ,Data brick control RFU1"
hexmask.long.word 0x00 0.--15. 1. "                   CMD_BRICK_CTRL_RFU1                        ,Command brick control RFU1"
line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2                       ,Data brick control RFU2"
hexmask.long.word 0x04 0.--15. 1. "                   CMD_BRICK_CTRL_RFU2                        ,Command brick control RFU2"
group.long 0x380++0x0B
line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP                               ,Mapping of CMD brick 0 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD0_DQ2_MAP                               ,Mapping of CMD brick 0 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD0_DQ1_MAP                               ,Mapping of CMD brick 0 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD0_DQ0_MAP                               ,Mapping of CMD brick 0 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP                               ,Mapping of CMD brick 0 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD0_DQ6_MAP                               ,Mapping of CMD brick 0 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD0_DQ5_MAP                               ,Mapping of CMD brick 0 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD0_DQ4_MAP                               ,Mapping of CMD brick 0 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP                            ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD0_DQSN_MAP                              ,Mapping of CMD brick 0 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD0_DQSP_MAP                              ,Mapping of CMD brick 0 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD0_DQ8_MAP                               ,Mapping of CMD brick 0 data pin 8"
group.long 0x38C++0x0B
line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP                               ,Mapping of CMD brick 1 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD1_DQ2_MAP                               ,Mapping of CMD brick 1 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD1_DQ1_MAP                               ,Mapping of CMD brick 1 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD1_DQ0_MAP                               ,Mapping of CMD brick 1 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP                               ,Mapping of CMD brick 1 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD1_DQ6_MAP                               ,Mapping of CMD brick 1 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD1_DQ5_MAP                               ,Mapping of CMD brick 1 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD1_DQ4_MAP                               ,Mapping of CMD brick 1 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP                            ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD1_DQSN_MAP                              ,Mapping of CMD brick 1 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD1_DQSP_MAP                              ,Mapping of CMD brick 1 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD1_DQ8_MAP                               ,Mapping of CMD brick 1 data pin 8"
group.long 0x398++0x0B
line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP                               ,Mapping of CMD brick 2 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD2_DQ2_MAP                               ,Mapping of CMD brick 2 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD2_DQ1_MAP                               ,Mapping of CMD brick 2 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD2_DQ0_MAP                               ,Mapping of CMD brick 2 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP                               ,Mapping of CMD brick 2 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD2_DQ6_MAP                               ,Mapping of CMD brick 2 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD2_DQ5_MAP                               ,Mapping of CMD brick 2 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD2_DQ4_MAP                               ,Mapping of CMD brick 2 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP                            ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD2_DQSN_MAP                              ,Mapping of CMD brick 2 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD2_DQSP_MAP                              ,Mapping of CMD brick 2 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD2_DQ8_MAP                               ,Mapping of CMD brick 2 data pin 8"
group.long 0x3A4++0x0B
line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP                               ,Mapping of CMD brick 3 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD3_DQ2_MAP                               ,Mapping of CMD brick 3 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD3_DQ1_MAP                               ,Mapping of CMD brick 3 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD3_DQ0_MAP                               ,Mapping of CMD brick 3 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP                               ,Mapping of CMD brick 3 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD3_DQ6_MAP                               ,Mapping of CMD brick 3 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD3_DQ5_MAP                               ,Mapping of CMD brick 3 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD3_DQ4_MAP                               ,Mapping of CMD brick 3 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP                            ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD3_DQSN_MAP                              ,Mapping of CMD brick 3 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD3_DQSP_MAP                              ,Mapping of CMD brick 3 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD3_DQ8_MAP                               ,Mapping of CMD brick 3 data pin 8"
group.long 0x3B0++0x17
line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register"
bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP                           ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 24.--27. "             BYTE6_DQ_CMD_MAP                           ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 20.--23. "          BYTE5_DQ_CMD_MAP                           ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 16.--19. "             BYTE4_DQ_CMD_MAP                           ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 12.--15. "          BYTE3_DQ_CMD_MAP                           ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 8.--11. "             BYTE2_DQ_CMD_MAP                           ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 4.--7. "          BYTE1_DQ_CMD_MAP                           ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 0.--3. "             BYTE0_DQ_CMD_MAP                           ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
line.long 0x04 "TR_TIMING_0_0,Training Timing Register"
bitfld.long 0x04 23.--26. " T_CATR_RD2VREF                             ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--21. "                     T_DHTRAIN                                  ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 12.--15. "          T_DSTRAIN                                  ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--9. 1. "                     T_VREF_LONG                                ,Delay between CAVREF and CATR reads"
line.long 0x08 "TR_CTRL_0_0,Training Control Register 0"
bitfld.long 0x08 8. " CATR_ENABLE                                ,CA Training enable" "Disabled,Enabled"
bitfld.long 0x08 5.--7. "               CAVREF_DQS_DURATION                        ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x08 4. "          CAVREF_RIVE_DQS                            ,Drive DQS" "0,1"
bitfld.long 0x08 0.--3. "                      CAVREF_TX_BYTE_MASK                        ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TR_CTRL_1_0,Training Control Register 1"
bitfld.long 0x0C 4. " ENABLE_TR_QRST                             ,TR QRST select" "Disabled,Enabled"
bitfld.long 0x0C 3. "               ENABLE_TR_QSAFE                            ,TR QSAFE select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 2. "          ENABLE_TR_RDV_MASK                         ,TR RDV_MASK select" "Disabled,Enabled"
bitfld.long 0x0C 1. "               ENABLE_TR_QPOP                             ,TR QPOP select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 0. "          ENABLE_TR_RDV                              ,TR RDV select" "Disabled,Enabled"
line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register"
bitfld.long 0x10 0. " CLK_SWITCH_BACK                            ,Clock switch back request trigger" "Not triggered,Triggered"
line.long 0x14 "TR_RDV_0,Training RDV Register"
hexmask.long.byte 0x14 0.--6. 1. " TR_RDV                                     ,Training RDV value"
rgroup.long 0x3C8++0x0F
line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE            ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE             ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE                 ,Unstall memory read|write after clock change" "Disabled,Enabled"
line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register"
hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle"
hexmask.long.byte 0x0C 16.--21. 1. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle"
textline "                                   "
hexmask.long.byte 0x0C 8.--13. 1. "          AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle"
hexmask.long.byte 0x0C 0.--5. 1. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle"
group.long 0x3D8++0x0F
line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes"
bitfld.long 0x00 16.--18. " SEL_DPD_DLY                                ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8. "                      DATA_SEL_DPD_EN                            ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5. "          ODT_SEL_DPD_EN                             ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled"
bitfld.long 0x00 4. "               RESET_SEL_DPD_EN                           ,Assert SEL_DPD for reset pad" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. "          CA_SEL_DPD_EN                              ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled"
bitfld.long 0x00 2. "               CLK_SEL_DPD_EN                             ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled"
line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count"
hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT                            ,Pre-refresh request count"
line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry"
bitfld.long 0x08 31. " DSR_PER_DEVICE                             ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled"
hexmask.long.word 0x08 0.--15. 1. "               DSR_THRESHOLD                              ,Number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL"
hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL                                    ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL"
group.long 0x3E8++0x07
line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset"
bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1                      ,Count-by VALUE clock increments select" "256,1"
hexmask.long.word 0x00 16.--30. 1. "                    CCFIFO_STALL_CNT                           ,CCFIFO stall counter value"
textline "                                   "
hexmask.long.word 0x00 0.--15. 0x01 "          CCFIFO_ADDR                                ,Clock change FIFO address register"
line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register"
rgroup.long 0x3F0++0x03
line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status"
hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT                               ,CCFIFO count"
group.long 0x3F4++0x0F
line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter"
hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE                           ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x00 0.--6. 1. "                     TR_QPOP                                    ,Time from training read command to pop data from the pad macro FIFO"
line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK                                ,Training RDV mask bits"
line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter"
hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE                                   ,Training time from a read command to when it is safe to issue a QRST"
line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter"
bitfld.long 0x0C 16.--20. " TR_QRST_DURATION                           ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x0C 0.--6. 1. "              TR_QRST                                    ,Training time from a read command to when it is safe to issue a QRST"
group.long 0x404++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL                   ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE0_BIT6_SEL                   ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE0_BIT5_SEL                   ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE0_BIT4_SEL                   ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE0_BIT3_SEL                   ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE0_BIT2_SEL                   ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE0_BIT1_SEL                   ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE0_BIT0_SEL                   ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x408++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL                   ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE1_BIT6_SEL                   ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE1_BIT5_SEL                   ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE1_BIT4_SEL                   ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE1_BIT3_SEL                   ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE1_BIT2_SEL                   ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE1_BIT1_SEL                   ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE1_BIT0_SEL                   ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x40C++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL                   ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE2_BIT6_SEL                   ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE2_BIT5_SEL                   ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE2_BIT4_SEL                   ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE2_BIT3_SEL                   ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE2_BIT2_SEL                   ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE2_BIT1_SEL                   ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE2_BIT0_SEL                   ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x410++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL                   ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE3_BIT6_SEL                   ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE3_BIT5_SEL                   ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE3_BIT4_SEL                   ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE3_BIT3_SEL                   ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE3_BIT2_SEL                   ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE3_BIT1_SEL                   ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE3_BIT0_SEL                   ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x418++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL                   ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE0_BIT6_SEL                   ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE0_BIT5_SEL                   ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE0_BIT4_SEL                   ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE0_BIT3_SEL                   ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE0_BIT2_SEL                   ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE0_BIT1_SEL                   ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE0_BIT0_SEL                   ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x41C++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL                   ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE1_BIT6_SEL                   ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE1_BIT5_SEL                   ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE1_BIT4_SEL                   ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE1_BIT3_SEL                   ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE1_BIT2_SEL                   ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE1_BIT1_SEL                   ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE1_BIT0_SEL                   ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x420++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL                   ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE2_BIT6_SEL                   ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE2_BIT5_SEL                   ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE2_BIT4_SEL                   ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE2_BIT3_SEL                   ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE2_BIT2_SEL                   ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE2_BIT1_SEL                   ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE2_BIT0_SEL                   ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x424++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL                   ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE3_BIT6_SEL                   ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE3_BIT5_SEL                   ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE3_BIT4_SEL                   ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE3_BIT3_SEL                   ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE3_BIT2_SEL                   ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE3_BIT1_SEL                   ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE3_BIT0_SEL                   ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x428++0x03
line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter"
bitfld.long 0x00 0. " ISSUE_QRST                                 ,Sets QRST to pads|macros" "0,1"
group.long 0x440++0x0B
line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1"
line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2"
line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3"
sif (cpuis("TEGRAX2"))
group.long 0x44C++0x0B
line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels"
bitfld.long 0x00 3. " INT_CH3                                    ,Set when there is a interrupt from channel-3" "None,Interrupt"
bitfld.long 0x00 2. "              INT_CH2                                    ,Set when there is a interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x00 1. "          INT_CH1                                    ,Set when there is a interrupt from channel-1" "None,Interrupt"
bitfld.long 0x00 0. "              INT_CH0                                    ,Set when there is a interrupt from channel-0" "None,Interrupt"
line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels"
bitfld.long 0x04 3. " CRITICAL_INT_CH3                           ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              CRITICAL_INT_CH2                           ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          CRITICAL_INT_CH1                           ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              CRITICAL_INT_CH0                           ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits"
bitfld.long 0x08 4.--7. " RESET_RFU                                  ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2. "                     RESET_EN                                   ,Enables the TH path when set to 0" "None,INT"
textline "                                   "
bitfld.long 0x08 1. "          RESET_E_INPUT                              ,When set to 1 enables the RX path for reset pads" "None,Interrupt"
bitfld.long 0x08 0. "              RESET_E_WKPD                               ,When set to 1 enables the weak pad for reset pads" "None,Interrupt"
endif
group.long 0x458++0x17
line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2"
bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 24.--25. "                  AUTO_CAL_DQS_PU_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 22.--23. "          AUTO_CAL_DQ_PD_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 20.--21. "                  AUTO_CAL_DQ_PU_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 18.--19. "          AUTO_CAL_DQS_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 16.--17. "                  AUTO_CAL_DQS_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 14.--15. "          AUTO_CAL_DQ_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 12.--13. "                  AUTO_CAL_DQ_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 10.--11. "          AUTO_CAL_CMD_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 8.--9. "                  AUTO_CAL_CMD_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 6.--7. "          AUTO_CAL_CA_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 4.--5. "                  AUTO_CAL_CA_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 2.--3. "          AUTO_CAL_CLK_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 0.--1. "                  AUTO_CAL_CLK_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                   "
bitfld.long 0x00 8.--13. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x460++0x0F
line.long 0x00 "TR_DVFS,Training DVFS Register"
bitfld.long 0x00 0. " TRAINING_DVFS                              ,DVFS training enable" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register"
bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE                       ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled"
bitfld.long 0x04 30. "               AUTO_CAL_STALL_ALL_TRAFFIC                 ,Stall all traffic for an autocal update" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x04 29. "          AUTO_CAL_COMPUTE_START_DVFS                ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled"
hexmask.long.byte 0x04 21.--27. 1. "               CAL_WAIT_AFTER_DVFS                        ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM"
textline "                                   "
bitfld.long 0x04 16.--20. "          AUTO_CAL_UPDATE_TIMEOUT                    ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS"
bitfld.long 0x04 8.--11. "           AUTO_CAL_WAIT_BEFORE_UPDATE                ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--5. "          AUTO_CAL_NUM_STALL_CYCLES                  ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter"
bitfld.long 0x08 28.--29. " IBDLY_MODE                                 ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
hexmask.long.byte 0x08 0.--6. 1. "              IBDLY                                      ,Specifies when to change IBDLY for DQ|DQS"
line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter"
bitfld.long 0x0C 28.--29. " OBDLY_MODE                                 ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
bitfld.long 0x0C 0.--5. "              OBDLY                                      ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x470++0x07
line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register"
bitfld.long 0x00 31. " DISPLAY_STUTTER_EN                         ,Display stutter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "               ASR_THRESHOLD                              ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels"
bitfld.long 0x04 3. " NONCRITICAL_INT_CH3                        ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              NONCRITICAL_INT_CH2                        ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          NONCRITICAL_INT_CH1                        ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              NONCRITICAL_INT_CH0                        ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
endif
textline "                                   "
width 26.
group.long 0x480++0x03
line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter"
hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN                                ,Cycles to wait from DSR exit"
group.long 0x48C++0x13
line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--4. " WE_DURATION                                ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x04 0.--4. " WS_DURATION                                ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WEV                                        ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter"
bitfld.long 0x0C 0.--5. " WSV                                        ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x10 "CFG_3_0,EMC Configuration Register 3"
bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16                            ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      MRR_BYTESEL                                ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7"
group.long 0x4A0++0x03
line.long 0x00 "MRW5_0,Command Trigger MRW5"
bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN                           ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW5_CNT                               ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
hexmask.long.byte 0x00 16.--23. 0x01 "  MRW5_MA                                    ,Register address"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW5_OP                                    ,Data to be written"
group.long 0x4A4++0x03
line.long 0x00 "MRW6 _0,Command Trigger MRW6 "
bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW6 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW6 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW6 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW6 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW6 _SP0                                  ,Data to be written to subp0"
group.long 0x4A8++0x03
line.long 0x00 "MRW7 _0,Command Trigger MRW7 "
bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW7 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW7 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW7 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW7 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW7 _SP0                                  ,Data to be written to subp0"
group.long 0x4AC++0x03
line.long 0x00 "MRW8 _0,Command Trigger MRW8 "
bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW8 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW8 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW8 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW8 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW8 _SP0                                  ,Data to be written to subp0"
group.long 0x4B0++0x03
line.long 0x00 "MRW9 _0,Command Trigger MRW9 "
bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW9 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW9 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW9 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW9 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW9 _SP0                                  ,Data to be written to subp0"
group.long 0x4B4++0x03
line.long 0x00 "MRW10_0,Command Trigger MRW10"
bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW10_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW10_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW10_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW10_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW10_SP0                                  ,Data to be written to subp0"
group.long 0x4B8++0x03
line.long 0x00 "MRW11_0,Command Trigger MRW11"
bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW11_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW11_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW11_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW11_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW11_SP0                                  ,Data to be written to subp0"
group.long 0x4BC++0x03
line.long 0x00 "MRW12_0,Command Trigger MRW12"
bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW12_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW12_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW12_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW12_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW12_SP0                                  ,Data to be written to subp0"
group.long 0x4C0++0x03
line.long 0x00 "MRW13_0,Command Trigger MRW13"
bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW13_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW13_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW13_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW13_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW13_SP0                                  ,Data to be written to subp0"
group.long 0x4C4++0x03
line.long 0x00 "MRW14_0,Command Trigger MRW14"
bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW14_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW14_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW14_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW14_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW14_SP0                                  ,Data to be written to subp0"
group.long 0x4D0++0x03
line.long 0x00 "MRW15_0,Command Trigger MRW15"
bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW15_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW15_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW15_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW15_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW15_SP0                                  ,Data to be written to subp0"
group.long 0x4D4++0x07
line.long 0x00 "CFG_SYNC_0,Sync Configuration 0"
bitfld.long 0x00 0. " CHANNEL_SYNC                               ,Channel sync" "0,1"
line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0"
bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE                     ,No ramp for DI/DT enable" "Disabled,Enabled"
group.long 0x4E0++0x03
line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--5. " WDV_CHK_BASE                               ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x510++0x07
line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK           ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x00 10. "               ECC_UNCORR_ERR_CRITICAL_INTMASK            ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 9. "  DLL_LOCK_TIMEOUT_CRITICAL_INTMASK          ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x00 8. "               CCFIFO_OVERFLOW_CRITICAL_INTMASK           ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 7. "  DLL_ALARM_CRITICAL_INTMASK                 ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x00 6. "               ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK      ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 5. "  MRR_DIVLD_CRITICAL_INTMASK                 ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x00 4. "               CLKCHANGE_COMPLETE_CRITICAL_INTMASK        ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 3. "  REFRESH_OVERFLOW_CRITICAL_INTMASK          ,Mask for refresh request overflow time out" "Masked,Unmasked"
line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK        ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "               ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK        ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 11. "  ECC_CORR_ERR_NONCRITICAL_INTMASK           ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "               ECC_UNCORR_ERR_NONCRITICAL_INTMASK         ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 9. "  DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK       ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "               CCFIFO_OVERFLOW_NONCRITICAL_INTMASK        ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 7. "  DLL_ALARM_NONCRITICAL_INTMASK              ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x04 6. "               ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK   ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 5. "  MRR_DIVLD_NONCRITICAL_INTMASK              ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "               CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK     ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 3. "  REFRESH_OVERFLOW_NONCRITICAL_INTMASK       ,Mask for refresh request overflow time out" "Masked,Unmasked"
endif
group.long 0x554++0x1F
line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0"
bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass"
bitfld.long 0x00 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass"
bitfld.long 0x00 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass"
bitfld.long 0x00 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass"
bitfld.long 0x00 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass"
bitfld.long 0x00 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass"
bitfld.long 0x00 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x00 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x00 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x00 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x00 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x00 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x00 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register"
bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE                   ,Pipe clock override enable" "Disabled,Enabled"
line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0"
bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 11. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 10. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 9. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 8. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 7. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 6. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 5. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 4. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 3. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 2. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 1. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 0. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0"
bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 26. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 25. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 24. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 23. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 22. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 21. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 20. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 19. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 18. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 17. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 16. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x10 "QPOP_0,DRAM Timing Parameter"
hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE                              ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x10 0.--6. 1. "                     QPOP                                       ,Time from read command to pop data from the pad macro FIFO"
line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x14 29. " QUSE_SHORTEN_2UI                           ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten"
bitfld.long 0x14 28. "              QUSE_EXTEND_UI                             ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend"
textline "                                  "
bitfld.long 0x14 0.--3. "  QUSE_DURATION                              ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x18 31. " CFG_STATIC_TERM                            ,IOBRICK internally disables termination based on DOE" "0,1"
bitfld.long 0x18 0.--3. "                      PUTERM_DURATION                            ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls"
bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX                  ,Bias current going out to brick receiver" "Disabled,Enabled"
bitfld.long 0x1C 2. "               BIAS0_DSC_E_PWRD_IBIAS_VTTGEN              ,Disables biasing current going out to VTTGEN cells" "No,Yes"
textline "                                  "
bitfld.long 0x1C 1. "  BIAS0_DSC_E_PWRD                           ,Disables all DC current paths within entire cell" "No,Yes"
bitfld.long 0x1C 0. "                    BIAS0_DSC_BG_SEL_N                         ,Select BandGap reference current" "Enabled,Disabled"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14.--15. "  EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                  "
bitfld.long 0x00 10.--11. "  EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 8.--9. "    EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                  "
bitfld.long 0x00 6.--7. "  EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 2.--5. "    EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--1. "  EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 28. "  AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 25. "  AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 23. "  AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 16.--21. "  AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.byte 0x04 2.--8. 1. "  AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C80000+0x20))&0x80000000)==0x80000000)
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 31. " REFPB_VALID                                ,REFpb operation enable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "               REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
else
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 24.--26. "                                                                   REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
endif
group.long 0x584++0x03
line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
bitfld.long 0x00 17. "               SEND_RD1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
textline "                                   "
endif
bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0                        ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled"
bitfld.long 0x00 15. "               DISABLE_CCDP1_WR_SPACING                   ,Write command spacing of tCCD+1 disable" "No,Yes"
textline "                                  "
bitfld.long 0x00 14. "  DISABLE_CCDP1_RD_SPACING                   ,Read command spacing of tCCD+1 disable" "No,Yes"
bitfld.long 0x00 13. "                    SUBP_ADDR_MODE                             ,DRAM SUBP address width" "x32,x16"
textline "                                  "
bitfld.long 0x00 12. "  ZQCAL_LATCH_ENABLE                         ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               ZQCAL_MPC_ENABLE                           ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. "  QPOP_RD_PREAMBLE_TOGGLE                    ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               CS_POLARITY                                ,DRAM chip select active polarity" "Low,High"
textline "                                  "
bitfld.long 0x00 8. "  MRR_DBI                                    ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               RD_DBI                                     ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. "  WR_DBI                                     ,EMC write data bus inversion protocol enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               MASKED_WR                                  ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 4. "  LPDDR4_CMD_MAP                             ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               QUSE_CCDP1_EXTEND                          ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. "  CH1_ENABLE                                 ,CH1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               CH0_ENABLE                                 ,CH0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. "  DRAM_EMCCLK_2TO1                           ,Specifies how much faster is dramclk than emcclk" "1x,2x"
sif (cpuis("TEGRAX2"))
group.long 0x710++0x03
line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register"
bitfld.long 0x00 8. " USE_SELF_REF_STATE                         ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled"
bitfld.long 0x00 4. "               ENCR_TWEAK_CHECK_ENABLE                    ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On"
textline "                                  "
bitfld.long 0x00 3. "  ECC_ENCR_CFG_LOCK                          ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On"
bitfld.long 0x00 2. "                    ECC_DYNAMIC_BYPASS_DISABLE                 ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On"
textline "                                  "
bitfld.long 0x00 1. "  ECC_ENCR_DISABLE                           ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On"
bitfld.long 0x00 0. "                    ECC_CHECK_DISABLE                          ,Setting this bit disables EMC ECC check/correct functions" "Off,On"
group.long 0xAC0++0x13
line.long 0x00 "ECC_CONTROL_0,ECC Control Register"
hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT                           ,Error buffer limit"
bitfld.long 0x00 2. "                     ERR_BUFFER_LOAD                            ,Error Buffer Load" "No load,Load"
textline "                                  "
bitfld.long 0x00 1. "  ERR_BUFFER_RESET                           ,Error Buffer Reset" "No reset,Reset"
bitfld.long 0x00 0. "               ERR_BUFFER_MODE                            ,Error Buffer Mode" "Ring,Write stop"
rgroup.long 0xAC4++0x13
line.long 0x00 "ECC_STATUS_0,ECC Error Status"
hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH                           ,The physical size (in number of entries) of ECC error buffer"
hexmask.long.byte 0x00 16.--23. 1. "                     ERR_BUFFER_CNT                             ,The number of errors physically residing in ECC error buffer"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  ERR_BUFFER_WR_PTR                          ,The ECC error buffer write pointer"
hexmask.long.byte 0x00 0.--7. 1. "                     ERR_BUFFER_RD_PTR                          ,The ECC error buffer read pointer"
line.long 0x04 "ECC_STATUS_0,ECC Error Status"
hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0                      ,Computed syndrome in ECC word"
bitfld.long 0x04 16.--17. "                   ECC_EERR_PAR_SP0                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x04 6.--15. 1. "  ECC_DERR_SYNDROME_SP0                      ,Computed syndrome in data word"
bitfld.long 0x04 3. "                   ECC_ERR_POISON_SP0                         ,Poisoned request" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0.--1. "  ECC_DERR_PAR_SP0                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors"
hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1                      ,Computed syndrome in ECC word"
bitfld.long 0x08 16.--17. "                   ECC_EERR_PAR_SP1                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x08 6.--15. 1. "  ECC_DERR_SYNDROME_SP1                      ,Computed syndrome in data word"
bitfld.long 0x08 0.--1. "                   ECC_DERR_PAR_SP1                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob"
bitfld.long 0x0C 28.--30. " ECC_ERR_BANK                               ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 8.--23. 1. "                      ECC_ERR_ROW                                ,ECC_ERR_ROW"
textline "                                  "
bitfld.long 0x0C 0.--5. "  ECC_ERR_GOB                                ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug"
hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID                               ,Request ID"
bitfld.long 0x10 20.--21. "                     ECC_ERR_SEQ                                ,Burst sequence" "0,1,2,3"
textline "                                  "
bitfld.long 0x10 19. "  ECC_ERR_SWAP                               ,Swap" "No swap,Swap"
bitfld.long 0x10 17.--18. "                ECC_ERR_SIZE                               ,Size" "R64B,R32B,R16B,?..."
textline "                                  "
bitfld.long 0x10 16. "  ECC_ERR_DEVICE                             ,DRAM device" "Disabled,Enabled"
bitfld.long 0x10 12.--14. "               ECC_ERR_COL_SP1                            ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 8.--10. "  ECC_ERR_COL_SP0                            ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--7. "                      ECC_ERR_EMC_ID                             ,EMC device/channel number" "0,1,2,3"
group.long 0xADC++0x03
line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register"
rbitfld.long 0x00 28.--31. " KEY_INIT_DONE                              ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                     KEY_STATE_CLEAR                            ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 8.--11. "  KEY_DISTRIB_ERR                            ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     KEY_ACTIVE                                 ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x588++0x27
line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "                      RANK0_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 15.--17. "  RANK0_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "                      RANK0_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 9.--11. "  RANK0_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "                      RANK0_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  RANK0_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      RANK0_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 18.--20. "                      RANK1_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 15.--17. "  RANK1_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--14. "                      RANK1_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 9.--11. "  RANK1_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--8. "                      RANK1_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 3.--5. "  RANK1_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                      RANK1_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter"
hexmask.long.word 0x08 0.--8. 1. " RFCPB                                      ,Specifies the per-bank auto refresh cycle time"
line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 18.--20. "                      RANK0_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 15.--17. "  RANK0_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "                      RANK0_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 9.--11. "  RANK0_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 6.--8. "                      RANK0_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 3.--5. "  RANK0_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "                      RANK0_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18.--20. "                      RANK1_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 15.--17. "  RANK1_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12.--14. "                      RANK1_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 9.--11. "  RANK1_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--8. "                      RANK1_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 3.--5. "  RANK1_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      RANK1_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0"
bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 0.--2. "                      CH0_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1"
bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0.--2. "                      CH1_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0"
bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "                      CH0_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1"
bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                      CH1_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0"
bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 10.--14. "                     RANK0_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x24 5.--9. "  RANK0_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 0.--4. "                     RANK0_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
else
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x5B8++0x13
line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1"
bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "                     RANK0_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 5.--9. "  RANK0_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                     RANK0_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2"
bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 10.--14. "                     RANK1_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x04 5.--9. "  RANK1_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     RANK1_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " CCDMW                                      ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3"
bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 10.--14. "                     RANK1_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x0C 5.--9. "  RANK1_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "                     RANK1_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register"
bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11      ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled"
bitfld.long 0x10 26. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10      ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 25. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9       ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled"
bitfld.long 0x10 24. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8       ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 23. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7       ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled"
bitfld.long 0x10 22. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6       ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 21. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5       ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled"
bitfld.long 0x10 20. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4       ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 19. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3       ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled"
bitfld.long 0x10 18. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2       ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 17. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1       ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled"
bitfld.long 0x10 16. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0       ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 15. "  RANK_SWIZZLE                               ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
else
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
wgroup.long 0x5D0++0x07
line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register"
bitfld.long 0x00 29. " PROTOBIST_APC                              ,Controls the auto-precharge function of transaction" "0,1"
bitfld.long 0x00 28. "                      PROTOBIST_A_RDY                            ,Indicates active interface is ready" "Not ready,Ready"
textline "                                  "
hexmask.long.word 0x00 12.--27. 1. "  PROTOBIST_A_ROW                            ,Row control during protobist mode"
bitfld.long 0x00 11. "                   PROTOBIST_A_REF                            ,Refresh control during active request in protobist" "0,1"
textline "                                  "
bitfld.long 0x00 9.--10. "  PROTOBIST_A_DEV                            ,Devsel control during active request in protobist" "0,1,2,3"
bitfld.long 0x00 6.--8. "                      PROTOBIST_BANK                             ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  PROTOBIST_A_BANK                           ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      PROTOBIST_A_BANK1                          ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7"
line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register"
bitfld.long 0x04 28. " PROTOBIST_SWAP                             ,Swap control during protobist mode" "0,1"
bitfld.long 0x04 26.--27. "                      PROTOBIST_SIZE                             ,Size control during protobist mode" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 25. "  PROTOBIST_MASKED_WRITE                     ,Mask write control during protobist mode" "0,1"
bitfld.long 0x04 24. "                      PROTOBIST_T_DEV                            ,Dev control during Xfre request of protobist mode" "0,1"
textline "                                  "
bitfld.long 0x04 21.--23. "  PROTOBIST_T_COL1                           ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x04 9.--20. 1. "                      PROTOBIST_T_COL                            ,Column control during protobist"
textline "                                  "
bitfld.long 0x04 8. "  PROTOBIST_T_RDY                            ,Indicates transfer interface is ready" "Not ready,Ready"
hexmask.long.byte 0x04 0.--7. 1. "              PROTOBIST_CGID                             ,Request ID of transaction control"
group.long 0x5D8++0x0B
line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " PROTOBIST_RESET                            ,PROTOBIST reset" "No reset,Reset"
textline "                                   "
endif
bitfld.long 0x00 16.--18. " PROTOBIST_REQ                              ,Protobist request" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 15. "                      PROTOBIST_READ_ACK                         ,Protobist read ACK" "0,1"
textline "                                  "
bitfld.long 0x00 14. "  PROTOBIST_START                            ,Protobist start" "0,1"
bitfld.long 0x00 13. "                      PROTOBIST_W_BE                             ,Protobist mode control for byte enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. "  PROTOBIST_MODE                             ,Protobist mode control indicates bist mode" "0,1"
bitfld.long 0x00 8.--11. "                      PROTOBIST_RDI_SEL                          ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. "  PROTOBIST_TAG                              ,Protobist mode tag control"
line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register"
line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register"
rgroup.long 0x5EC++0x03
line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register"
group.long 0x5E4++0x07
line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0"
bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START                  ,Ignore DLLCAL start trim priv value" "0,1"
bitfld.long 0x00 28. "                      DDLLCAL_CTRL_DUAL_PASS_LOCK                ,2 pass lock" "0,1"
textline "                                  "
bitfld.long 0x00 24.--27. "  DDLLCAL_CTRL_STEP_SIZE                     ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                     DDLLCAL_CTRL_END_COUNT                     ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 16.--19. "  DDLLCAL_CTRL_FILTER_BITS                   ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                     DDLLCAL_CTRL_SAMPLE_COUNT                  ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15"
textline "                                  "
hexmask.long.byte 0x00 4.--11. 1. "  DDLLCAL_CTRL_SAMPLE_DELAY                  ,Delay to allow DLL value to settle"
bitfld.long 0x00 0.--3. "                     DDLLCAL_UPDATE_CNT_LIMIT                   ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE                          ,RFU" "0,1,2,3"
bitfld.long 0x04 24.--25. "                      DDLL_VTTDDLL_SPARE                         ,RFU" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 22. "  DDLL_VTTLP_VDDA_E_REGSW                    ,Active high. Enable to switch to low power regulator" "Low,High"
bitfld.long 0x04 21. "                   DDLL_VTTDDLL_VDDA_E_REG                    ,Enable DLL regulator" "0,1"
textline "                                  "
bitfld.long 0x04 20. "  DDLL_VTTDDLL_E_WB                          ,Active high to enable the weak bias for DDLL" "0,1"
textline "                                   "
endif
bitfld.long 0x04 16. " DDLL_BYPASS                                ,Bypass" "0,1"
bitfld.long 0x04 12.--15. "                      DDLL_RFU                                   ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 11. "  E_DDLL_PWRD                                ,Master DLL powerdown" "0,1"
hexmask.long.word 0x04 0.--10. 1. "                      DDLLCAL_CTRL_START_TRIM                    ,Calibration start value"
group.long 0x5F0++0x07
line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay"
hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY                        ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)"
line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control"
bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE           ,Disallow configuration reads during a timing update" "Allow,Disallow"
bitfld.long 0x04 30. "               STALL_WRITES_DURING_TIMING_UPDATE          ,Disallow configuration writes during a timing update" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 29. "  LINKED_TIMING_UPDATE_TIMEOUT               ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled"
bitfld.long 0x04 28. "               LINKED_TIMING_UPDATE                       ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 9.--10. "  UPDATE_DLL_IN_UPDATE                       ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 8. "                UPDATE_DLL_IN_CLKCHANGE                    ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow"
textline "                                  "
bitfld.long 0x04 1.--2. "  UPDATE_AUTOCAL_IN_UPDATE                   ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 0. "                UPDATE_AUTO_CAL_IN_CLKCHANGE               ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow"
sif (cpuis("TEGRAX2"))
group.long 0x5F8++0x07
line.long 0x00 "DLL_CFG_2_0,DLL Config register 2"
bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL                       ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     DDLL_VTTDDLL_VDDA_LVL                      ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_3_0,DLL Config register 3"
bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL                   ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x04 16.--17. "    DDLL_VTTDDLL_VDDA_WB_CTRL                  ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
textline "                                  "
bitfld.long 0x04 8.--12. "  DDLL_VTTCDB_VDDA_CTRL                      ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     DDLL_VTTDDLL_VDDA_CTRL                     ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
width 15.
tree "PMACRO Registers"
tree "QUSE DDLL Register"
group.long 0x600++0x03
line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank0 byte0"
group.long 0x604++0x03
line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank0 byte2"
group.long 0x608++0x03
line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank0 byte4"
group.long 0x60C++0x03
line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank0 byte6"
group.long 0x610++0x03
line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank0 command0"
group.long 0x614++0x03
line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank0 command2"
textline "                                             "
group.long 0x620++0x03
line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank1 byte0"
group.long 0x624++0x03
line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank1 byte2"
group.long 0x628++0x03
line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank1 byte4"
group.long 0x62C++0x03
line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank1 byte6"
group.long 0x630++0x03
line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank1 command0"
group.long 0x634++0x03
line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank1 command2"
tree.end
tree "OB DDLL Long Registers"
group.long 0x640++0x03
line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank0 byte0"
group.long 0x644++0x03
line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank0 byte2"
group.long 0x648++0x03
line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank0 byte4"
group.long 0x64C++0x03
line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank0 byte6"
group.long 0x650++0x03
line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank0 command0"
group.long 0x654++0x03
line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank0 command2"
textline "                                             "
group.long 0x660++0x03
line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank1 byte0"
group.long 0x664++0x03
line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank1 byte2"
group.long 0x668++0x03
line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank1 byte4"
group.long 0x66C++0x03
line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank1 byte6"
group.long 0x670++0x03
line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank1 command0"
group.long 0x674++0x03
line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank1 command2"
textline "                                             "
group.long 0x680++0x03
line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank0 byte0"
group.long 0x684++0x03
line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank0 byte2"
group.long 0x688++0x03
line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank0 byte4"
group.long 0x68C++0x03
line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank0 byte6"
group.long 0x690++0x03
line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank0 Command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank0 Command0"
group.long 0x694++0x03
line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank0 Command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank0 Command2"
textline "                                             "
group.long 0x6A0++0x03
line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank1 byte0"
group.long 0x6A4++0x03
line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank1 byte2"
group.long 0x6A8++0x03
line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank1 byte4"
group.long 0x6AC++0x03
line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank1 byte6"
group.long 0x6B0++0x03
line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank1 command0"
group.long 0x6B4++0x03
line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank1 command2"
tree.end
tree "IB DDLL DQS Long Registers"
group.long 0x6C0++0x03
line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank0 byte0"
group.long 0x6C4++0x03
line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank0 byte2"
group.long 0x6C8++0x03
line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank0 byte4"
group.long 0x6CC++0x03
line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank0 byte6"
group.long 0x6D0++0x03
line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank0 command0"
group.long 0x6D4++0x03
line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank0 command2"
textline "                                             "
group.long 0x6E0++0x03
line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank1 byte0"
group.long 0x6E4++0x03
line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank1 byte2"
group.long 0x6E8++0x03
line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank1 byte4"
group.long 0x6EC++0x03
line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank1 byte6"
group.long 0x6F0++0x03
line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank1 command0"
group.long 0x6F4++0x03
line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank1 command2"
tree.end
textline "                                             "
width 22.
group.long 0x700++0x03
line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3           ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE2           ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE1           ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE0           ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x704++0x03
line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7           ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE7         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE7       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE6           ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE6           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE6         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE6       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE5           ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE5           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE5         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE5       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE4           ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE4           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE4         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE4       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x708++0x03
line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3           ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_CMD3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_CMD3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_CMD2           ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_CMD2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_CMD2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_CMD2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_CMD1           ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_CMD1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_CMD1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_CMD1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_CMD0           ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_CMD0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_CMD0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_CMD0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x720++0x03
line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1              ,Byte1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE1       ,Byte1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE1        ,Programmed to TX PWRD value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE1      ,Programmed to TX PWRD value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE0              ,Byte0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE0       ,Byte0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE0        ,Programmed to TX PWRD value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE0      ,Programmed to TX PWRD value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1"
group.long 0x724++0x03
line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3              ,Byte3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE3       ,Byte3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE3        ,Programmed to TX PWRD value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE3      ,Programmed to TX PWRD value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE2              ,Byte2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE2       ,Byte2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE2        ,Programmed to TX PWRD value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE2      ,Programmed to TX PWRD value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1"
group.long 0x728++0x03
line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5              ,Byte5 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE5       ,Byte5 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE5        ,Programmed to TX PWRD value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE5      ,Programmed to TX PWRD value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE4              ,Byte4 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE4       ,Byte4 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE4        ,Programmed to TX PWRD value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE4      ,Programmed to TX PWRD value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1"
group.long 0x72C++0x03
line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7              ,Byte7 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE7       ,Byte7 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE7        ,Programmed to TX PWRD value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE7      ,Programmed to TX PWRD value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE6              ,Byte6 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE6       ,Byte6 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE6        ,Programmed to TX PWRD value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE6      ,Programmed to TX PWRD value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1"
group.long 0x730++0x03
line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1              ,Cmd1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD1       ,Cmd1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD1                ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD1        ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD1      ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD0              ,Cmd0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD0       ,Cmd0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD0                ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD0        ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD0      ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1"
group.long 0x734++0x03
line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3              ,Cmd3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD3       ,Cmd3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD3                ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD3        ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD3      ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD2              ,Cmd2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD2       ,Cmd2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD2                ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD2        ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD2      ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x740++0x03
line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1"
group.long 0x744++0x03
line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1"
group.long 0x748++0x03
line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1"
group.long 0x74C++0x03
line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1"
group.long 0x750++0x03
line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1"
group.long 0x754++0x03
line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x760++0x03
line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass"
bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 30. "            CMD_DDLLCAL_BIT_TXDQ_BYPASS         ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 29. "            CMD_DDLLCAL_BIT_TXDQS_BYPASS      ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 27. "          CMD_DDLLCAL_BYTE_QU_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 26. "            CMD_DDLLCAL_BYTE_RXDQS_BYPASS       ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 25. "            CMD_DDLLCAL_BYTE_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 24. "          CMD_DDLLCAL_BYTE_TXDQ_BYPASS    ,Bypass the DDLL calibration value" "0,1"
bitfld.long 0x00 23. "            CMD_DDLL_BIT_RXDQ_BYPASS            ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 22. "    CMD_DDLL_BIT_TXDQS_BYPASS         ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 21. "          CMD_DDLL_BIT_TXDQ_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 20. "    CMD_DDLL_BYTE_RXRT_BYPASS           ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 19. "    CMD_DDLL_BYTE_QU_BYPASS           ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          CMD_DDLL_BYTE_RXDQS_BYPASS      ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 17. "    CMD_DDLL_BYTE_TXDQS_BYPASS          ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_DDLL_BYTE_TXDQ_BYPASS         ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 15. "          DATA_DDLLCAL_BIT_RXDQ_BYPASS    ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 14. "            DATA_DDLLCAL_BIT_TXDQ_BYPASS        ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 13. "            DATA_DDLLCAL_BIT_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 11. "          DATA_DDLLCAL_BYTE_QU_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 10. "            DATA_DDLLCAL_BYTE_RXRQS_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 9. "            DATA_DDLLCAL_BYTE_TXDQS_BYPASS    ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DATA_DDLLCAL_BYTE_TXDQ_BYPASS   ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 7. "            DATA_DDLL_BIT_RXDQ_BYPASS           ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 6. "    DATA_DDLL_BIT_TXDQS_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 5. "          DATA_DDLL_BIT_TXDQ_BYPASS       ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 4. "    DATA_DDLL_BYTE_RXRT_BYPASS          ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 3. "    DATA_DDLL_BYTE_QU_BYPASS          ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DATA_DDLL_BYTE_RXDQS_BYPASS     ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 1. "    DATA_DDLL_BYTE_TXDQS_BYPASS         ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    DATA_DDLL_BYTE_TXDQ_BYPASS        ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
group.long 0x770++0x03
line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x774++0x03
line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE7            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE7         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE7         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE7          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE7        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE7       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE6            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE6          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE6       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE6             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE6        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE6      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE6           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE5          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE5        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE5           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE5           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE5      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE5          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE5         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE4        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE4            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE4         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE4         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE4          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE4        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE4       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x778++0x03
line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_CMD3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_CMD3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_CMD3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_CMD3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_CMD3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_CMD3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_CMD2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_CMD2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_CMD2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_CMD2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_CMD2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_CMD2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_CMD2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_CMD1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_CMD1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_CMD1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_CMD1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_CMD1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_CMD1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_CMD1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_CMD0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_CMD0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_CMD0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_CMD0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_CMD0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_CMD0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_CMD0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
group.long 0x780++0x03
line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE3      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE3       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE3      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE3         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE3                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE0                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x784++0x03
line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE7      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE7       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE7      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE7         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE7                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE6      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE6       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE6      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE6         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE6                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE5      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE5       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE5      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE5         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE5                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE4      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE4       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE4      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE4         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE4                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x788++0x03
line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_MISC2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_MISC2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_MISC2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_MISC2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_MISC1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_MISC1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_MISC1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_MISC1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_MISC0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_MISC0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_MISC0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_MISC0                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_RESET      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_RESET       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_RESET      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_RESET         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_RESET                 ,IO_CMD input path enable" "Disabled,Enabled"
width 17.
tree "OB DDLL Short DQ Registers"
group.long 0x800++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x810++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x820++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x830++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x840++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x850++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x860++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x870++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x880++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x890++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8A0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8B0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x900++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x910++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x920++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x930++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x940++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x950++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x960++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x970++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x980++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x990++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9A0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9B0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
tree.end
tree "IB DDLL Short DQ Register"
group.long 0xA00++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA10++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA20++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA30++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA40++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA50++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA60++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA70++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA80++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA90++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAA0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAB0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xB00++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
group.long 0xB10++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
group.long 0xB20++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
group.long 0xB30++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
group.long 0xB40++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
group.long 0xB50++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
group.long 0xB60++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
group.long 0xB70++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
group.long 0xB80++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
group.long 0xB90++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
group.long 0xBA0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
group.long 0xBB0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
tree.end
textline "                 "
width 32.
group.long 0xBE0++0x03
line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3                              ,Programmed to IB Vref value for DQ of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE2                              ,Programmed to IB Vref value for DQ of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE1                              ,Programmed to IB Vref value for DQ of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE0                              ,Programmed to IB Vref value for DQ of BYTE0"
group.long 0xBE4++0x03
line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7                              ,Programmed to IB Vref value for DQ of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE6                              ,Programmed to IB Vref value for DQ of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE5                              ,Programmed to IB Vref value for DQ of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE4                              ,Programmed to IB Vref value for DQ of BYTE4"
group.long 0xBE8++0x03
line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3                              ,Programmed to IB Vref value for DQ of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_CMD2                              ,Programmed to IB Vref value for DQ of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_CMD1                              ,Programmed to IB Vref value for DQ of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_CMD0                              ,Programmed to IB Vref value for DQ of CMD0"
group.long 0xBF0++0x03
line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3                             ,Programmed to IB Vref value for DQS of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE2                             ,Programmed to IB Vref value for DQS of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE1                             ,Programmed to IB Vref value for DQS of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE0                             ,Programmed to IB Vref value for DQS of BYTE0"
group.long 0xBF4++0x03
line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7                             ,Programmed to IB Vref value for DQS of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE6                             ,Programmed to IB Vref value for DQS of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE5                             ,Programmed to IB Vref value for DQS of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE4                             ,Programmed to IB Vref value for DQS of BYTE4"
group.long 0xBF8++0x03
line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3                             ,Programmed to IB Vref value for DQS of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_CMD2                             ,Programmed to IB Vref value for DQS of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_CMD1                             ,Programmed to IB Vref value for DQS of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_CMD0                             ,Programmed to IB Vref value for DQS of CMD0"
textline "                                "
group.long 0xC00++0x03
line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1                           ,Programmed to CKE1 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE0                           ,Programmed to CKE0 trimmer value"
group.long 0xC04++0x03
line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3                           ,Programmed to CKE3 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE2                           ,Programmed to CKE2 trimmer value"
group.long 0xC08++0x03
line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5                           ,Programmed to CKE5 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE4                           ,Programmed to CKE4 trimmer value"
group.long 0xC0C++0x03
line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7                           ,Programmed to CKE7 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE6                           ,Programmed to CKE6 trimmer value"
group.long 0xC10++0x03
line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0                           ,Programmed to MISC0 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_RESET                           ,Programmed to RESET trimmer value"
group.long 0xC14++0x03
line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2                           ,Programmed to MISC2 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_MISC1                           ,Programmed to MISC1 trimmer value"
textline "                                "
group.long 0xC20++0x03
line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3                          ,Programmed to CKE3 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE2                          ,Programmed to CKE2 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE1                          ,Programmed to CKE1 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE0                          ,Programmed to CKE0 fine trimmer value"
group.long 0xC24++0x03
line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7                          ,Programmed to CKE7 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE6                          ,Programmed to CKE6 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE5                          ,Programmed to CKE5 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE4                          ,Programmed to CKE4 fine trimmer value"
group.long 0xC28++0x03
line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2                          ,Programmed to MISC2 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_MISC1                          ,Programmed to MISC1 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_MISC0                          ,Programmed to MISC0 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_RESET                          ,Programmed to RESET fine trimmer value"
textline "                                "
group.long 0xC30++0x07
line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control"
bitfld.long 0x00 27. " DISABLE_CFG_CMD3           ,CMD3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 26. "               DISABLE_CFG_CMD2           ,CMD2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " DISABLE_CFG_CMD1           ,CMD1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 24. "               DISABLE_CFG_CMD0           ,CMD0 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " DISABLE_CFG_BYTE7          ,BYTE7 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 22. "               DISABLE_CFG_BYTE6          ,BYTE6 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 21. " DISABLE_CFG_BYTE5          ,BYTE5 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 20. "               DISABLE_CFG_BYTE4          ,BYTE4 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " DISABLE_CFG_BYTE3          ,BYTE3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 18. "               DISABLE_CFG_BYTE2          ,BYTE2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 17. " DISABLE_CFG_BYTE1          ,BYTE1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 16. "               DISABLE_CFG_BYTE0          ,BYTE0 pad macro configuration read|write disable" "No,Yes"
line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW         ,Enable switch to low power regulator" "Disabled,Enabled"
textline "                                         "
endif
bitfld.long 0x04 16.--19. " VTT_VDDA_LVL               ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL              ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                VTT_VCLAMP_LVL             ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xC38++0x03
line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register"
bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL              ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                VTT_VAUXP_CTRL             ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL            ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xC3C++0x2F
line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL      ,BG current bias select" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 16.--17. "              DDLL_DDLL_BG_ILVL_CTRL     ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL       ,BANDGAP output current level control" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 8.--9. "              BG_ILVL_CTRL               ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
endif
bitfld.long 0x00 4.--6. " BG_SETUP                   ,Temperature coefficient control" "0,1,2,3,4,5,6,7"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "                 BGLP_E_PWRD                ,BGLP E PWRD" "0,1"
endif
textline "                                         "
bitfld.long 0x00 1. " BG_MODE                    ,Regulator mode" "High performance,Low power"
bitfld.long 0x00 0. "  BG_E_PWRD                  ,Power down regulator" "0,1"
line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads"
bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE        ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..."
bitfld.long 0x04 25. "  TX_E_DDLL_TCLK             ,TX E DDLL TCLK" "0,1"
textline "                                         "
bitfld.long 0x04 24. " E_TX_NMOS_DRVUP            ,E TX NMOS DRVUP" "0,1"
bitfld.long 0x04 20.--21. "                 TX_DCC_MODE                ,TX DCC mode" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 16.--17. " MEM_MODE                   ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..."
bitfld.long 0x04 13. "      TX_SEL_MV_CYCLE            ,Multi-voltage timing path timing closure" "1 cycle,2 cycles"
textline "                                         "
bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE      ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 9. "     E_PWRD                     ,DC current paths within entire brick cell disable" "Enabled,Disabled"
textline "                                         "
bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE      ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 0.--1. "     QUSE_MODE                  ,Pad quse mode" "0,1,2,3"
line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs"
bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL    ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 24.--25. "            DATA_DQ_TX_DRVDN_ZCTRL     ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL    ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 20.--21. "            DATA_DQ_TX_DRVUP_ZCTRL     ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL     ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 16.--17. "            CMD_DQ_TX_DRVDN_ZCTRL      ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL     ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 12.--13. "            CMD_DQ_TX_DRVUP_ZCTRL      ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL    ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 8.--9. "            DQ_RX_DRVDN_TERM_ZCTRL     ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL    ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 4.--5. "            DQ_RX_DRVUP_TERM_ZCTRL     ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL         ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 0.--1. "            CMD_TX_DRVUP_ZCTRL         ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick"
bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM          ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "                DQS_RX_DRVUP_TERM          ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM           ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                DQ_RX_DRVUP_TERM           ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick"
bitfld.long 0x10 8.--13. " CMD_TX_DRVDN               ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                CMD_TX_DRVUP               ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad"
bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL             ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 22. "                CMD_RX_E_DIRECT_ZI         ,Command RX E direct ZI" "0,1"
textline "                                         "
bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD        ,Command RX E IBIAS PWRD" "0,1"
bitfld.long 0x14 16.--20. "                 CMD_DQS_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON        ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x14 14. "          CMD_DQ_RX_E_RDIV           ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE       ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x14 12. "          CMD_DQS_RX_E_DIFF_MODE     ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL    ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 4.--5. "                 CMD_DQS_RX_MODE            ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE             ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad"
bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 22. "                DATA_RX_E_DIRECT_ZI        ,Data RX E Direct ZI" "0,1"
textline "                                         "
bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD       ,Data RX E IBIAS PWRD" "0,1"
bitfld.long 0x18 16.--20. "                 DATA_DQS_RX_CTRL           ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON       ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x18 14. "          DATA_DQ_RX_E_RDIV          ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE      ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x18 12. "          DATA_DQS_RX_E_DIFF_MODE    ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL   ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4.--5. "                 DATA_DQS_RX_MODE           ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE            ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad"
bitfld.long 0x1C 13. " CMD_E_PWRD_RX              ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x1C 12. "          CMD_DDLL_QU_SEL_M2CLK      ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE      ,Command DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x1C 4.--5. "        CMD_DQSP_RX_TERM_MODE      ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE        ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad"
bitfld.long 0x20 13. " DATA_E_PWRD_RX             ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x20 12. "          DATA_DDLL_QU_SEL_M2CLK     ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE     ,Data DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x20 4.--5. "        DATA_DQSP_RX_TERM_MODE     ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE       ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad"
bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON      ,Command DQS TX drive force on" "0,1"
bitfld.long 0x24 26. "                 CMD_DQ_TX_DRVFORCEON       ,Command DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON      ,Command command TX drive force on" "0,1"
bitfld.long 0x24 24. "                 CMD_CMD_TX_E_DCC           ,Command command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 20. "          CMD_DQSN_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC          ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x24 14.--15. "          CMD_DQS_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 12. "          CMD_DQSP_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 9. "     CMD_DQSP_TX_E_DCC          ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 8. " CMD_DQS_E_IVREF            ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x24 6.--7. "          CMD_DQ_TX_EBOOST_PU_MODE   ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU           ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 4. "          CMD_DQ_TX_E_WKPD           ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE   ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 1. "     CMD_DQ_TX_E_DCC            ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 0. " CMD_DQ_E_IVREF             ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad"
bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON     ,Data DQS TX drive force on" "0,1"
bitfld.long 0x28 26. "                 DATA_DQ_TX_DRVFORCEON      ,Data DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON     ,Data command TX drive force on" "0,1"
bitfld.long 0x28 24. "                 DATA_CMD_TX_E_DCC          ,Data command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 20. "          DATA_DQSN_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC         ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x28 14.--15. "          DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 12. "          DATA_DQSP_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 9. "     DATA_DQSP_TX_E_DCC         ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 8. " DATA_DQS_E_IVREF           ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x28 6.--7. "          DATA_DQ_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU          ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 4. "          DATA_DQ_TX_E_WKPD          ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 1. "     DATA_DQ_TX_E_DCC           ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 0. " DATA_DQ_E_IVREF            ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks"
bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN        ,Command DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 2. "                 CMD_DQ_TX_BPSDYNEN         ,Command DQ TX BPSDYNEN" "0,1"
textline "                                         "
bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN       ,Data DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 0. "                 DATA_DQ_TX_BPSDYNEN        ,Data DQ TX BPSDYNEN" "0,1"
sif (cpuis("TEGRAX2"))
group.long 0xC6C++0x03
line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register"
hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD          ,DSR VTT VDDA Load"
bitfld.long 0x00 0.--3. "                DSR_VTT_VDDA_LVL           ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC70++0x0B
line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick"
bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN          ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                DATA_DQS_TX_DRVUP          ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN           ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                DATA_DQ_TX_DRVUP           ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick"
bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN           ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                CMD_DQS_TX_DRVUP           ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN            ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                CMD_DQ_TX_DRVUP            ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs"
bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS          ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "          E_CAL_UPDATE_HIGH          ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY         ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
group.long 0xCE0++0x0B
line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves"
hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL                             ,Calibration value"
line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values"
bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN              ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 27. "            CMD_DDLL_OFFSET_BYTE_RXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 25. "            CMD_DDLL_OFFSET_BYTE_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 23. "            CMD_DDLL_OFFSET_BIT_RXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 21. "            CMD_DDLL_OFFSET_BIT_TXDQS_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 16. "            DATA_DDLL_OFFSET_BYTE_QU_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 14. "            DATA_DDLL_OFFSET_BYTE_TXCMD_EN          ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 12. "            DATA_DDLL_OFFSET_BYTE_TXDQ_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 10. "            DATA_DDLL_OFFSET_BIT_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 8. "            DATA_DDLL_OFFSET_BIT_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 0.--5. " DDLL_OFFSET                             ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training"
bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN     ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 27. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 25. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 23. "            CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 21. "            CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 16. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 14. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 12. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 10. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 8. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET                    ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0xCEC++0x03
line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0"
bitfld.long 0x00 0. " SEL_NEG_IB                              ,Select negative edge flop as output" "Disabled,Enabled"
endif
group.long 0xCF0++0x0F
line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register"
hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD                           ,VTT VDDA Load"
hexmask.long.byte 0x00 8.--15. 1. "                  VTT_VAUXP_LOAD                          ,VTT VAUXP Load"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD                         ,VTT VCLAMP Load"
line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3"
hexmask.long.word 0x04 0.--10. 1. " IB_RXRT                                 ,Programmed to IB DQ receive path retiming"
line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0"
bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
textline "                                         "
bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
bitfld.long 0x08 2. "            CH0_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
textline "                                         "
bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
bitfld.long 0x08 0. "                   CH0_TRAINING_ENABLED                    ,Channel 0 training enable" "Disabled,Enabled"
line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1"
bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
bitfld.long 0x0C 3. "           CH1_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
bitfld.long 0x0C 1. "         CH1_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
textline "                                         "
bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED                    ,Channel 1 training enable" "Disabled,Enabled"
tree.end
width 27.
tree "TRAINING Registers"
group.long 0xE00++0x03
line.long 0x00 "CMD_0,Main Register For Launching Training"
bitfld.long 0x00 31. " GO                   ,Start training" "Not started,Started"
bitfld.long 0x00 30. "    PERIODIC             ,Start periodic training" "Not started,Started"
bitfld.long 0x00 8. "    QUSE_VREF      ,Initiates DQS_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 7. "   RD_VREF           ,Initiates IB_DQ_VREF training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 6. " WR_VREF              ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 5. "  CA_VREF              ,Initiates CA_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 4. "  QUSE           ,Initiates QUSE training" "Not initiated,Initiated"
bitfld.long 0x00 3. "   WR                ,Initiates WR training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 2. " RD                   ,Initiates RD training" "Not initiated,Initiated"
bitfld.long 0x00 1. "  CA                   ,Initiates CA training" "Not initiated,Initiated"
bitfld.long 0x00 0. "  PRIME          ,Writes the custom pattern into MPC register" "Disabled,Enabled"
if ((per.l(ad:0x02C80000+0xE04)&0x00010000)==0x00010000)
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Rank to train" "RANK0,RANK1"
bitfld.long 0x00 13. "           UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
else
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0"
bitfld.long 0x00 13. "  UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
endif
rgroup.long 0xE08++0x03
line.long 0x00 "STATUS_0,Read Back For Training Status"
bitfld.long 0x00 0.--1. " STATUS               ,Training status" "Done,Running,Error,?..."
group.long 0xE0C++0x3F
line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep"
bitfld.long 0x00 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x00 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x00 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x00 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x00 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x00 10.--18. 1. "           MAXIMUM              ,Maximum"
hexmask.long.word 0x00 0.--8. 1. "           MINIMUM        ,Minimum"
line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep"
bitfld.long 0x04 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x04 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x04 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x04 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x04 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x04 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x04 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x04 10.--19. 1. "           MAXIMUM              ,2's complement"
hexmask.long.word 0x04 0.--9. 1. "           MINIMUM        ,2' complement"
line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training"
hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x08 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x08 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x08 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x08 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x08 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x08 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x08 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep"
bitfld.long 0x0C 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x0C 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x0C 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x0C 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x0C 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x0C 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x0C 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x0C 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x0C 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x0C 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep"
hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x10 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x10 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x10 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x10 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x10 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x10 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x10 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep"
bitfld.long 0x14 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x14 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x14 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x14 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x14 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep"
bitfld.long 0x18 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x18 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x18 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x18 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x18 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x18 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x18 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x18 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x18 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x18 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x18 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep"
hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x1C 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x1C 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x1C 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x1C 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x1C 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x1C 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x1C 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep"
bitfld.long 0x20 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x20 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x20 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x20 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x20 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep"
bitfld.long 0x24 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x24 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x24 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x24 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x24 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x24 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x24 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x24 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x24 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x24 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x24 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep"
hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x28 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x28 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x28 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x28 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x28 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x28 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x28 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep"
hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT             ,Number of NOPs between 2 CA training reads"
line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training"
bitfld.long 0x30 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x30 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x30 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x30 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x30 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep"
bitfld.long 0x34 31. " TADR_ENABLE          ,Set to disabled" "Disabled,?..."
hexmask.long.byte 0x34 12.--19. 1. "       TADR_MAX             ,Maximum tADR allowed in tCK"
hexmask.long.word 0x34 0.--11. 1. "             TADR_SETTING   ,CA BRLSHFT + CA trimmer during tADR training"
line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK"
hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY          ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 16.--23. 1. "             PRIV_DELAY           ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 8.--15. 1. "             SHORT_TRIMMER  ,Settle time for short trimmer"
hexmask.long.byte 0x38 0.--7. 1. "              LONG_TRIMMER      ,Settle time for long trimmer"
line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers"
bitfld.long 0x3C 24.--27. " WINDOW_LIMIT         ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 0.--7. 1. "             SELECT               ,Specifies output on DQ registers"
group.long 0xE5C++0x13
line.long 0x00 "MPC_0,MPC-RD Registers Data"
hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN       ,Invert pattern"
hexmask.long.word 0x00 0.--15. 1. "           DATA                 ,Data"
line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM"
bitfld.long 0x04 31. " WRITE                ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered"
bitfld.long 0x04 16.--19. "  FORMAT               ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 0x01 "             SELECT_OFFSET  ,Location to write in pattern RAM"
line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM"
line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM"
line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK"
hexmask.long.word 0x10 16.--31. 1. " OB                   ,Settle time for WRITE|CA Vrefs"
hexmask.long.word 0x10 0.--15. 1. "           IB                   ,Settle time for READ|QUSE Vrefs"
sif (cpuis("TEGRAX2"))
group.long 0xE98++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xE9C++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA0++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA4++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA8++0x03
line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEAC++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB0++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB4++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB8++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEBC++0x03
line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0xEC0++0x07
line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results"
hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 16.--23. 1. "             RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 0.--7. 1. "             RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results"
hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 16.--23. 1. "             RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 0.--7. 1. "             RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
group.long 0xED0++0x03
line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep"
bitfld.long 0x00 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x00 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x00 0.--7. 1. "             MINIMUM              ,Minimum"
tree.end
width 0x0B
tree.end
tree "EMC2"
base ad:0x02C90000
width 21.
group.long 0x00++0x13
line.long 0x00 "INSTATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT           ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  ECC_ERR_BUF_OVF_INT              ,ECC Error Buffer overflow" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 11. "   ECC_CORR_ERR_INT              ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  ECC_UNCORR_ERR_INT               ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt"
textline "                            "
textfld "  "
endif
eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT          ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt"
eventfld.long 0x00 8. "  CCFIFO_OVERFLOW_INT              ,Clock change FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 7. "   DLL_ALARM_INT                ,Indicate DLL alarm has been set" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 6. "   ACCESS_TO_SR_DPD_DEV_INT      ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt"
eventfld.long 0x00 5. "  MRR_DIVLD_INT                    ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt"
eventfld.long 0x00 4. "   CLKCHANGE_COMPLETE_INT       ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 3. "   REFRESH_OVERFLOW_INT          ,Refresh request overflow timeout" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK       ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "      ECC_ERR_BUF_OVF_INTMASK          ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 11. "   ECC_CORR_ERR_INTMASK          ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "      ECC_UNCORR_ERR_INTMASK           ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                            "
textfld "  "
endif
bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK      ,Mask for DLL lock timeout interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "      CCFIFO_OVERFLOW_INTMASK          ,Mask for clock change FIFO overflow" "Masked,Unmasked"
bitfld.long 0x04 7. "       DLL_ALARM_INTMASK            ,Indicate DLL alarm has been set" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 6. "   ACCESS_TO_SR_DPD_DEV_INTMASK  ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
bitfld.long 0x04 5. "      MRR_DIVLD_INTMASK                ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "       CLKCHANGE_COMPLETE_INTMASK   ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 3. "   REFRESH_OVERFLOW_INTMASK      ,Mask for refresh request overflow timeout" "Masked,Unmasked"
line.long 0x08 "DBG_0,Debug Register"
bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP           ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled"
bitfld.long 0x08 30. "      WRITE_ACTIVE_ONLY                ,Write active version of the register only" "Disabled,Enabled"
bitfld.long 0x08 29. "       ALLOW_HOSTIF_DURING_CCFIFO   ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 28. "   ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled"
bitfld.long 0x08 26.--27. "      CFG_SWAP                         ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..."
bitfld.long 0x08 25. "  AUTOCAL_ALLOW_WRITE_MUX      ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24. "   CFG_PRIORITY                  ,Priority of cfg accesses to the DRAM" "Disabled,Enabled"
bitfld.long 0x08 13. "      SUPPRESS_WRITE_CMD               ,Suppress write command sent to DRAM" "Disabled,Enabled"
bitfld.long 0x08 12. "       SUPPRESS_READ_CMD            ,Suppress read command sent to DRAM" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 11. "   STRETCH_MRW_RESET             ,Stretch MRW RESET command to three clocks" "Disabled,Enabled"
bitfld.long 0x08 10. "      AP_REQ_BUSY_CTRL                 ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled"
bitfld.long 0x08 9. "       READ_DQM_CTRL                ,DQM signal control" "Managed,Always on"
textline "                            "
bitfld.long 0x08 2. "   FORCE_UPDATE                  ,Active state update enable" "Disabled,Enabled"
bitfld.long 0x08 1. "      WRITE_MUX                        ,Controls state of the writes to the configuration registers" "Assembly,Active"
bitfld.long 0x08 0. "       READ_MUX                     ,Controls state of the reads to the configuration registers" "Active,Assembly"
line.long 0x0C "CFG_0,Configuration Register"
bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD               ,DRAM clock stop (power down)" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DRAM_CLKSTOP_SR                  ,DRAM clock stop (self-refresh)" "Disabled,Enabled"
bitfld.long 0x0C 29. "       DRAM_ACPD                    ,Opportunistic active power down for DRAM controller" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 28. "   DYN_SELF_REF                  ,DYN_SELF_REF" "Disabled,Enabled"
bitfld.long 0x0C 26. "      REQACT_ASYNC                     ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled"
bitfld.long 0x0C 25. "       AUTO_PRE_WR                  ,MC auto-precharge indication for writes" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 24. "   AUTO_PRE_RD                   ,MC auto-precharge indication for reads" "Disabled,Enabled"
bitfld.long 0x0C 23. "      MAN_PRE_WR                       ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled"
bitfld.long 0x0C 22. "       MAN_PRE_RD                   ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 21. "   PERIODIC_QRST                 ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. "      WAIT_FOR_NVDISPLAY_READY_B4_CC   ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 18. "   DSR_VTTGEN_DRV_EN             ,Enable VTTGEN controls during DSR" "Disabled,Enabled"
bitfld.long 0x0C 16.--17. "      EMC2MC_CLK_RATIO                 ,EMC to MC clock ratio" "2x,1x,4x,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 9. "             WAIT_FOR_ISP2B_READY_B4_CC   ,Wait for isp2b ready event" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 8. "   WAIT_FOR_VI2_READY_B4_CC      ,Wait for vi2 ready event" "Disabled,Enabled"
bitfld.long 0x0C 7. "      WAIT_FOR_ISP2_B4_CC              ,Wait for isp2 ready event" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 6. "   INVERT_DQM                    ,Invert DQM polarity" "Not inverted,Inverted"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 5. "  WAIT_FOR_DISPLAYB_READY_B4_CC    ,Wait for display ready event" "Disabled,Enabled"
bitfld.long 0x0C 4. "       WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled"
endif
line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]"
bitfld.long 0x10 0. " EMEM_NUMDEV                   ,Number of populated DRAM devises" "N1,N2"
group.long 0x20++0x07
line.long 0x00 "REFCTRL_0,Refresh Control Register"
bitfld.long 0x00 31. " REF_VALID                     ,Enable refresh controller" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DEVICE_REFRESH_DISABLE           ,Refresh disable to individual attached device" "0,1,2,3"
line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins"
bitfld.long 0x04 17. " PIN_GPIO_EN[1]                ,General purpose DRAM I/O[1] enable" "Disabled,Enabled"
bitfld.long 0x04 16. "      PIN_GPIO_EN[0]                   ,General purpose DRAM I/O[0] enable" "Disabled,Enabled"
bitfld.long 0x04 13. "       PIN_GPIO[1]                  ,General purpose DRAM I/O[1] activate" "Inactive,Active"
textline "                            "
bitfld.long 0x04 12. "   PIN_GPIO[0]                   ,General purpose DRAM I/O[0] activate" "Inactive,Active"
bitfld.long 0x04 8. "      PIN_RESET                        ,DDR3 RESET# pin level" "Active,Inactive"
bitfld.long 0x04 4. "       PIN_DQM                      ,Used to always mask DRAM writes" "Normal,Inactive"
textline "                            "
bitfld.long 0x04 2. "   PIN_CKE_PER_DEV               ,Per device CKE enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      PIN_CKEB                         ,Level of the CKEB pin" "Power down,Normal"
bitfld.long 0x04 0. "     PIN_CKE                      ,Level of the CKE pin" "Power down,Normal"
textline "                            "
group.long 0x28++0x93
line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers"
bitfld.long 0x00 0. " TIMING_UPDATE             ,Timing update event" "Disabled,Enabled"
line.long 0x04 "RC_0,DRAM RC Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RC                        ,Row cycle time"
line.long 0x08 "RFC_0,DRAM RFC Timing Parameter"
hexmask.long.word 0x08 0.--9. 1. " RFC                       ,Auto refresh cycle time"
line.long 0x0C "RAS_0,DRAM RAS Timing Parameter"
bitfld.long 0x0C 0.--5. " RAS                       ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "RP_0,DRAM RP Timing Parameter"
bitfld.long 0x10 0.--5. " RP                        ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "R2W_0,DRAM R2W Timing Parameter"
bitfld.long 0x14 0.--5. " R2W                       ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "W2R_0,DRAM W2R Timing Parameter"
bitfld.long 0x18 0.--5. " W2R                       ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "R2P_0,DRAM R2P Timing Parameter"
bitfld.long 0x1C 0.--5. " R2P                       ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "W2P_0,DRAM W2P Timing Parameter"
hexmask.long.byte 0x20 0.--6. 1. " W2P                       ,Write to precharge commands for the same bank number of cycles"
line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter"
bitfld.long 0x24 0.--5. " RD_RCD                    ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter"
bitfld.long 0x28 0.--5. " WR_RCD                    ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x2C "RRD_0,DRAM RRD Timing Parameter"
bitfld.long 0x2C 0.--4. " RRD                       ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "REXT_0,DRAM REXT Timing Parameter"
bitfld.long 0x30 0.--4. " REXT                      ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x34 "WDV_0,DRAM WDV Timing Parameter"
bitfld.long 0x34 0.--5. " WDV                       ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..."
line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter"
bitfld.long 0x38 0.--5. " QUSE                      ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "QRST_0,DRAM QRST Timing Parameter"
bitfld.long 0x3C 16.--20. " QRST_DURATION             ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x3C 0.--6. 1. "      QRST                   ,Time from expiration of QSAFE until reset is issued"
line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter"
hexmask.long.byte 0x40 0.--6. 1. " QSAFE                     ,Time from a read command to when it is safe to issue a QRST"
line.long 0x44 "RDV_0,DRAM RDV Timing Parameter"
hexmask.long.byte 0x44 0.--6. 1. " RDV                       ,Time from read command to latching the read data from the pad macros"
line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter"
hexmask.long.word 0x48 6.--15. 1. " REFRESH                   ,Interval between refresh requests"
bitfld.long 0x48 0.--5. "           REFRESH_LO             ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count"
bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM         ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..."
line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter"
bitfld.long 0x50 0.--5. " PDEX2WR                   ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter"
bitfld.long 0x54 0.--5. " PDEX2RD                   ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter"
bitfld.long 0x58 0.--5. " PCHG2PDEN                 ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter"
bitfld.long 0x5C 0.--5. " ACT2PDEN                  ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter"
hexmask.long.word 0x60 0.--8. 1. " AR2PDEN                   ,Timing delay from an autorefresh command to power down entry"
line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter"
hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN                   ,Timing delay from a read/write command to power down entry"
line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter"
hexmask.long.word 0x68 0.--9. 1. " TXSR                      ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL"
line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter"
bitfld.long 0x6C 0.--5. " TCKE                      ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter"
hexmask.long.byte 0x70 0.--6. 1. " TFAW                      ,Width of the FAW for 8-bank devices"
line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter"
bitfld.long 0x74 0.--5. " TRPAB                     ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter"
hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE                ,Minimum number of cycles of a stable clock period"
line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter"
bitfld.long 0x7C 0.--4. " TCLKSTOP                  ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter"
hexmask.long.word 0x80 0.--13. 1. " TREFBW                    ,Width of the burst-refresh window"
line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter"
bitfld.long 0x84 0.--3. " TPPD                      ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x88 "ODT_WRITE_0,ODT Write Control"
bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE   ,ODT enable during write" "Disabled,Enabled"
bitfld.long 0x88 8.--11. "       ODT_WR_DURATION        ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x88 5. "        SHARE_ONE_ODT                        ,Share one ODT" "Disabled,Enabled"
textline "                            "
bitfld.long 0x88 4. "   DRIVE_BOTH_ODT            ,ODTs' assertion for the requested or both devices" "Requested,Both"
bitfld.long 0x88 0.--3. "      ODT_WR_DELAY           ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter"
hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR                  ,Precharge-precharge delay"
line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter"
bitfld.long 0x90 0.--4. " WEXT                      ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0xBC++0x03
line.long 0x00 "TRTM_0,TRTM Timing Parameter"
hexmask.long.byte 0x00 0.--6. 1. " TRTM                      ,Read to MRW delay"
group.long 0xF8++0x07
line.long 0x00 "TWTM_0,TWTM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWTM                      ,Read to MRW/MRR delay"
line.long 0x04 "TRATM_0,TRATM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TRATM                     ,Read with AP to MRW/MRR delay"
group.long 0x108++0x07
line.long 0x00 "TWATM_0,TWATM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWATM                     ,Read with AP to MRW/MRR delay"
line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR2REF                    ,Read to refresh delay"
endif
group.long 0xC0++0x03
line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter"
hexmask.long.word 0x00 0.--8. 1. " RFS_SLR                   ,Stagger refresh cycle time between ranks"
group.long 0xC4++0x1B
line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT         ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command"
hexmask.long.word 0x00 0.--9. 1. "           MRS_EXT1_WAIT_CNT      ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command"
line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT         ,Number of EMC clocks to wait [MRS long command]"
hexmask.long.word 0x04 0.--9. 1. "           MRS_SHORT_WAIT_CNT     ,Number of EMC clocks to wait [MRS short command]"
line.long 0x08 "MRS_0,Command Trigger For MRS"
bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "   USE_MRS_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   MRS_BA                    ,Registers to be addressed in DRAM" "MRS,?..."
hexmask.long.word 0x08 0.--13. 1. "            MRS_ADR                ,Mode-register data to be written"
line.long 0x0C "EMRS_0,Command Trigger For EMRS"
bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "   USE_EMRS_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS_BA                   ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS_ADR               ,Mode-register data to be written"
line.long 0x10 "REF_0,Command Trigger For Refresh"
bitfld.long 0x10 30.--31. " REF_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
hexmask.long.word 0x10 8.--18. 1. "   REF_NUM                ,Number of refresh cycles (REF_NUM+1)"
textline "                            "
bitfld.long 0x10 1. "   REF_NORMAL                ,Refresh execution mechanism" "Immediate,Normal"
bitfld.long 0x10 0. "      REF_CMD                ,Refresh to all DRAM banks" "Disabled,Enabled"
line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL"
bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x14 0. "   PRE_CMD                ,PRECHARGE to all DRAM banks" "Disabled,Enabled"
line.long 0x18 "NOP_0,Command Trigger For NOP"
bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x18 0. "   NOP_CMD                ,NOP to all DRAM banks" "Disabled,Enabled"
if ((per.l(ad:0x02C90000+0xE0)&0x1)==0x1)
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 8. "   ACTIVE_SELF_REF        ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High"
bitfld.long 0x00 0. "      SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
else
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 0. "                                    SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
endif
group.long 0xE4++0x13
line.long 0x00 "DPD_0,Command Trigger For DPD"
bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x00 0. "   DPD_CMD                ,Issue a deep power down command" "Disabled,Enabled"
line.long 0x04 "MRW_0,Command Trigger For MRW"
bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x04 26.--27. "   USE_MRW_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x04 16.--23. 0x01 "   MRW_MA                    ,Register address"
hexmask.long.byte 0x04 0.--7. 1. "             MRW_OP                 ,Data to be written"
line.long 0x08 "MRR_0,Command Trigger For MRR"
bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN           ,Active-low chip-select" "Illegal,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "        USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x08 16.--23. 0x01 "   MRR_MA                    ,Register address"
hexmask.long.word 0x08 0.--15. 1. "             MRR_OP                 ,Data returned"
line.long 0x0C "CMDQ_0,Command QUEUE Depth Register"
bitfld.long 0x0C 24.--28. " RW_WD_DEPTH               ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--14. "             PRE_DEPTH              ,Pre depth" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x0C 8.--10. "   ACT_DEPTH                 ,Act depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--4. "              RW_DEPTH               ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register"
bitfld.long 0x10 24.--27. " MCWD_DEPTH                ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--10. "             MCACT_DEPTH            ,MCACT depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "         MCREQ_DEPTH                          ,MCREQ depth" "0,1,2,3,4,5,6,7"
group.long 0x100++0x07
line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register"
hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3          ,Config FBIO spare 3"
hexmask.long.byte 0x00 16.--23. 1. "             CFG_FBIO_SPARE_2       ,Config FBIO spare 2"
hexmask.long.byte 0x00 8.--15. 1. "        CFG_FBIO_SPARE_1                     ,Config FBIO spare 1"
textline "                            "
hexmask.long.byte 0x00 2.--7. 1. "   CFG_FBIO_SPARE_0          ,Config FBIO spare 0"
bitfld.long 0x00 1. "             CFG_ADR_EN             ,Write once after powering up EMC" "Disabled,Enabled"
bitfld.long 0x00 0. "  CFG_SWAP_DLL                         ,Config swap DLL" "0,1"
line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register"
bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO   ,Drive data bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 30. "       DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 28. "  MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. "   CMD_BUS_RETURN_TO_ZERO    ,Drive command bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 26. "       CMD_BUS_RETURN_TO_ONE  ,Drives the command bus back to a one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 25. "  LPDDR3_DRAM                          ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 24. "   LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "       ERR_RD_BUBBLE          ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x04 13.--15. "   EMC2PMACRO_CFG_QUSE_MODE  ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..."
bitfld.long 0x04 12. "  CMD_2T_TIMING          ,2T command timing" "Disabled,Enabled"
bitfld.long 0x04 10. "  DISABLE_CONCURRENT_AUTOPRE           ,Disable reads/writes to a device until precharge command" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 8. "   CMD_TX_EN                 ,Controls TX_EN on the command bricks" "No,Yes"
bitfld.long 0x04 4. "            DRAM_                  ,DRAM width" "X32,X64"
bitfld.long 0x04 2.--3. "       DRAM_BURST                           ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16"
textline "                            "
bitfld.long 0x04 0.--1. "   DRAM_TYPE                 ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2"
sif (cpuis("TEGRAX2"))
group.long 0x110++0x07
line.long 0x00 "ACT_0,Command Trigger: Act"
bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN        ,Active low chip-select" "0,1,2,3"
bitfld.long 0x00 23.--25. "              SW_ACT_BANK            ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--15. 1. "         SW_ACT_ROW                           ,Row number to be activated"
line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done"
bitfld.long 0x04 0. " MEM_INIT_DONE             ,This bit is set by boot sequence when DRAM initiation is done" "0,1"
endif
group.long 0x114++0x0B
line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register"
bitfld.long 0x00 0.--2. " CFG_QUSE_LATE             ,FBIO configuration register" "0,1,2,3,4,5,6,7"
line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter"
bitfld.long 0x04 0.--5. " PDEX2CKE                  ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter"
bitfld.long 0x08 0.--5. " CKE2PDEN                  ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hgroup.long 0x120++0x03
hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved"
group.long 0x124++0x1F
line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD"
hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD            ,Number of idle cycles to wait before allowing power-down entry"
line.long 0x04 "MPC_0,MPC CMD (LP4 Only)"
bitfld.long 0x04 30.--31. " MPC_DEV                   ,SELECTN" "0,1,2,3"
bitfld.long 0x04 26.--27. "              MPC_SUBP_SELECTN       ,Active-low subchannel select" "Both,Subp1,Subp0,?..."
bitfld.long 0x04 9. "     MPC_WR                               ,Send CAS2 (required for FIFO WR)" "Not send,Send"
textline "                            "
bitfld.long 0x04 8. "   MPC_RD                    ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send"
bitfld.long 0x04 7. "       MPC_CAS2               ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send"
hexmask.long.byte 0x04 0.--6. 1. "  MPC_OP                               ,MPC OP code"
line.long 0x08 "EMRS2_0,EMRS2 Command Trigger"
bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "           USE_EMRS2_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   EMRS2_BA                  ,EMRS2 BA" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x08 0.--13. 1. "          EMRS2_ADR              ,Mode register data to be written"
line.long 0x0C "EMRS3_0,EMRS3 Command Trigger"
bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "           USE_EMRS3_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS3_BA                  ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS3_ADR              ,Mode register data to be written"
line.long 0x10 "MRW2_0,MRW2 Command Trigger"
bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x10 26.--27. "           USE_MRW2_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x10 16.--23. 0x01 "   MRW2_MA                   ,Register address"
hexmask.long.byte 0x10 0.--7. 1. "             MRW2_OP                ,Data to be written"
line.long 0x14 "MRW3_0,MRW3 Command Trigger"
bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x14 26.--27. "           USE_MRR_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x14 16.--23. 0x01 "   MRW3_MA                   ,Register address"
hexmask.long.byte 0x14 0.--7. 1. "             MRW3_OP                ,Data to be written"
line.long 0x18 "MRW4_0,MRW4 Command Trigger"
bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x18 26.--27. "           USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x18 16.--23. 0x01 "   MRW4_MA                   ,Register address"
hexmask.long.byte 0x18 0.--7. 1. "             MRW4_OP                ,Data to be written"
line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register"
bitfld.long 0x1C 31. " OBS_BUS_CLKEN             ,OBS bus clock enable" "Disabled,Enabled"
bitfld.long 0x1C 8. "       PAD_CONFIG_OVR         ,Pad config override" "Disabled,Enabled"
bitfld.long 0x1C 7. "  TR_CLKEN_OVR                         ,TR clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 6. "   STATS_CLKEN_OVR           ,Stats clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 3. "       RR_CLKEN_OVR           ,RR clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 2. "  DRAMC_CLKEN_OVR                      ,DRAMC clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 1. "   CMDQ_CLKEN_OVR            ,CMDQ clock enable override" "Disabled,Enabled"
group.long 0x144++0x1B
line.long 0x00 "R2R_0,R2R_0 Timing Parameter"
bitfld.long 0x00 0.--3. " R2R                       ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter"
bitfld.long 0x04 0.--3. " W2W                       ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter"
bitfld.long 0x08 0.--5. " EINPUT                    ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter"
bitfld.long 0x0C 0.--5. " EINPUT_DURATION           ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter"
bitfld.long 0x10 0.--5. " RXTERM                    ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter"
bitfld.long 0x14 0.--5. " TCKESR                    ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "TPD_0,TPD_0 Timing Parameter"
bitfld.long 0x18 0.--5. " TPD                       ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
width 23.
group.long 0x2A4++0x07
line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads"
rbitfld.long 0x00 31. " AUTO_CAL_START                             ,Starts a complete autocal cycle with measure FSM" "Not started,Started"
bitfld.long 0x00 30. "            AUTO_CAL_COMP_PAD_FLIP                     ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE                            ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled"
bitfld.long 0x00 25.--28. "               AUTO_CAL_NUM_SAMPLES                       ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK                        ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled"
bitfld.long 0x00 19.--23. "               AUTO_CAL_WAIT_AFTER_EN                     ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                              ,Autocal measure step interval" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 11.--15. "                      AUTO_CAL_UPDATE_DELAY                      ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL                      ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled"
bitfld.long 0x00 9. "               AUTO_CAL_MEASURE_STALL                     ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 7. "               AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START                      ,Triggers an autocal update FSM cycle" "Disabled,Enabled"
rbitfld.long 0x00 1. "               AUTO_CAL_TRANSFER_START                    ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START                     ,Triggers an autocal compute FSM cycle" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval"
hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL                          ,Calibration interval value"
rgroup.long 0x2AC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN                       ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF0_DRVUP                       ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1"
bitfld.long 0x00 8. "                      AUTO_CAL_PU_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_ACTIVE                            ,Autocal activity status" "Inactive,Active"
bitfld.long 0x00 3. "               AUTO_CAL_UPDATE_ACTIVE                     ,Autocal update activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE                   ,Autocal transfer activity status" "Inactive,Active"
bitfld.long 0x00 1. "               AUTO_CAL_COMPUTE_ACTIVE                    ,Autocal compute activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE                    ,Autocal measure activity status" "Inactive,Active"
sif (cpuis("TEGRAX2"))
group.long 0x3D4++0x03
line.long 0x00 "AUTO_CAL_STATUS2_0,AUTOCAL Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x2B0++0x03
line.long 0x00 "REQ_CTRL_0,Request Status/Control"
bitfld.long 0x00 1. " STALL_ALL_WRITES                           ,Stall incoming write transactions" "Allow,Stall"
bitfld.long 0x00 0. "                  STALL_ALL_READS                            ,Stall incoming read transactions" "Allow,Stall"
rgroup.long 0x2B4++0x03
line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status"
bitfld.long 0x00 27. " ACPD_FSM_IDLE[1]                           ,Device[1] power-down FSM is idle" "No,Yes"
bitfld.long 0x00 26. "                    ACPD_FSM_IDLE[0]                           ,Device[0] power-down FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 25. " DSR_FSM_IDLE[1]                            ,Device[1] dynamic self refresh FSM is idle" "No,Yes"
bitfld.long 0x00 24. "                    DSR_FSM_IDLE[0]                            ,Device[0] dynamic self refresh FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 23. " TIMING_UPDATE_STALLED                      ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed"
bitfld.long 0x00 22. "          ZQ_FSM_IDLE                                ,Indicate auto ZQ state machine is idle" "Not idle,Idle"
textline "                                "
bitfld.long 0x00 21. " CFG_ZQ_ACTIVE                              ,Indicates ZQ configuration access is active" "Not active,Active"
bitfld.long 0x00 20. "             MRR_DIVLD                                  ,MRR data available for reading" "Not available,Available"
textline "                                "
bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE                             ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13. "                     DRAM_IN_DPD_DEV[1]                         ,Device[1] in deep powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0]                         ,Device[0] in deep powerdown state" "No,Yes"
bitfld.long 0x00 11. "                    DRAM_IN_ACTIVE_SELF_REFRESH[1]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
bitfld.long 0x00 9. "                    DRAM_IN_SELF_REFRESH_DEV[1]                ,Device[1] in active self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0]                ,Device[0] in active self-refresh" "No,Yes"
bitfld.long 0x00 5. "                    DRAM_IN_POWERDOWN_DEV[1]                   ,Device[1] in powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0]                   ,Device[0] in powerdown state" "No,Yes"
bitfld.long 0x00 2. "                    NO_OUTSTANDING_TRANSACTIONS                ,All non-stalled requests complete status" "Not completed,Completed"
textline "                                "
bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY                         ,Request FIFO is empty" "Not empty,Empty"
group.long 0x2B8++0x03
line.long 0x00 "CFG_2_0,EMC Configuration"
bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT                           ,Gives priority to activates" "Disabled,Enabled"
bitfld.long 0x00 30. "               IGNORE_MC_A_BUS                            ,Ignore the MC *_A_* bus" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE         ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled"
bitfld.long 0x00 28. "               DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE     ,Don't clear timing counters when clock change happen" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY                        ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check"
bitfld.long 0x00 25. "  ALLOW_REF_DURING_CC_PRE_EXE                ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 24. " DSR_STUTTER_ENABLE                         ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled"
bitfld.long 0x00 23. "               CHK_PDEX2RD_TO_START_WR                    ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR"
textline "                                "
bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF                    ,Always generate precharge all bank after refresh" "Disabled,Enabled"
bitfld.long 0x00 20. "               COMBINED_INTERRUPT_MODE                    ,Interrupt mode" "Combined,Independent"
textline "                                "
bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR                        ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled"
bitfld.long 0x00 11. "               DIS_CNTR_WITH_CFG_TIMING_UPDATE            ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled"
textline "                                "
bitfld.long 0x00 7. " EARLY_TRFC_8_CLK                           ,Early TRFC" "16 clocks,8 clocks"
bitfld.long 0x00 3.--5. "              ZQ_EXTRA_DELAY                             ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x00 2. " REF_AFTER_SREF                             ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLKCHANGE_PD_ENABLE                        ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE                       ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL"
rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK            ,Override_val in use" "No,Yes"
rbitfld.long 0x00 30. "                    DLL_RESET                                  ,Reset pulse sent to DLL's on next shadow update" "No,Yes"
textline "                                "
bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE                      ,Disable override of DLL logic" "Disabled,Enabled"
rbitfld.long 0x00 26. "               CFG_DLL_UPDATE_AT_NXT_REFRESH              ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes"
textline "                                "
hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL                       ,Value to use in place of DLI output"
bitfld.long 0x00 15. "                   CFG_DLL_TESTEN                             ,Enable DLL test mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT                       ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               CFG_DLL_TESTSEL                            ,Select DLL test output" "0,1,2,3"
textline "                                "
bitfld.long 0x00 8.--10. " CFG_DLL_UDSET                              ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..."
bitfld.long 0x00 6.--7. "                  CFG_DLL_MODE                               ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock"
textline "                                "
bitfld.long 0x00 5. " CFG_DLL_LOWSPEED                           ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled"
rbitfld.long 0x00 4. "               CFG_DLL_STALL_RW_UNTIL_LOCK                ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC                  ,Enable stalling of all DRAM traffic" "Disabled,Enabled"
bitfld.long 0x00 2. "               CFG_DLL_OVERRIDE_EN                        ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK               ,Stall all traffic until DLL locks" "Disabled,Enabled"
bitfld.long 0x00 0. "               CFG_DLL_EN                                 ,Enable digital DLL" "Disabled,Enabled"
if ((per.l(ad:0x02C90000+0x2BC)&0xC0)==0x80)
group.long 0x2C0++0x03
line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD                         ,Interval between runs in uSec"
else
hgroup.long 0x2C0++0x03
hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
endif
rgroup.long 0x2C4++0x03
line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status"
bitfld.long 0x00 18. " DLL_ALARM_MIN                              ,DLL alarm MIN status" "No alarm,Alarm"
bitfld.long 0x00 17. "               DLL_PRIV_UPDATED                           ,DLL private update status" "Not updated,Updated"
textline "                                "
bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS                         ,DLL calibration in-progress status" "Done,In progress"
bitfld.long 0x00 15. "            DLL_LOCK                                   ,DLL lock status" "Not locked,Locked"
textline "                                "
bitfld.long 0x00 14. " DLL_ALARM                                  ,DLL alarm status" "No alarm,Alarm"
bitfld.long 0x00 13. "               DLL_LOCK_TIMEOUT                           ,DLL lock timeout status" "No timeout,Timeout"
textline "                                "
hexmask.long.word 0x00 0.--10. 1. " DLL_OUT                                    ,DLL_OUT"
group.long 0x2C8++0x13
line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration"
bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE                 ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--11. "                     DLL_NUM_STALL_CYCLES                       ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT                     ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "             CFG_DLL_UPDATE_IDLE                        ,Update dig DLL during idle" "Disabled,Enabled"
line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK                                   ,Programmed to RDV"
line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WDV_MASK                                   ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK                             ,Programmed to RDV_EARLY"
line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter"
hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY                                  ,Time from read command to latching the read data from the pad macros"
sif cpuis("TEGRAX2")
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value"
elif (cpuis("TEGRAX1"))
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x42C++0x03
line.long 0x00 "AUTO_CAL_CONFIG9_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 6. " AUTO_CAL_OVERRIDE_DQS_TERM                 ,Update DQS term auto-calibration values" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_OVERRIDE_DQS                      ,Update DQS auto-calibration values" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_OVERRIDE_DQ_TERM                  ,Update  DQ term autocal values" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_OVERRIDE_DQ                       ,Update DQ autocal valuess" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_OVERRIDE_CMD                      ,Update CMD autocal values" "Disabled,Enabled"
bitfld.long 0x00 1. "               AUTO_CAL_OVERRIDE_CLK                      ,Update  CLK autocal values" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_OVERRIDE_CA                       ,Update CA autocal values" "Disabled,Enabled"
endif
group.long 0x2E0++0x0F
line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration"
hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI                           ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD"
hexmask.long.word 0x00 0.--9. 1. "                   ZCAL_INTERVAL_LO                           ,ZCAL_INTERVAL_LO"
line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration"
bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED                       ,ZQ resistor is shared across ranks" "Disabled,Enabled"
bitfld.long 0x04 16.--21. "               ZCAL_LATCH_CNT                             ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT                              ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD"
line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration"
bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,?..."
hexmask.long.byte 0x08 16.--23. 1. "                   ZQ_MRW_MA                                  ,MRW MA field to be sent after ZCAL_INTERVAL"
textline "                                "
hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP                                  ,MRW OP field to be sent after ZCAL_INTERVAL"
line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration"
bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,Neither"
bitfld.long 0x0C 4. "                ZQ_CAL_LENGTH                              ,Indicate short or long ZQ calibration" "Short,Long"
textline "                                "
bitfld.long 0x0C 1. " ZQ_LATCH_CMD                               ,(LPDDR4 only) Issues a ZQ latch command" "0,1"
bitfld.long 0x0C 0. "                      ZQ_CAL_CMD                                 ,(DDR3 only) Issues a ZQ calibration command" "0,1"
group.long 0x2F4++0x03
line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL                     ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
endif
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD              ,Enable weak pull-down" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PD_E_WKPU              ,Enable weak pull-up" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL         ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL         ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                "
bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 8.--9. "                     EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
textline "                                "
bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 2.--5. "                     EMC2TMC_CFG_XM2COMP_PD_TEST_MODE           ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
sif (cpuis("TEGRAX2"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
elif (cpuis("TEGRAX1"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
endif
sif (cpuis("TEGRAX2"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
elif (cpuis("TEGRAX1"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
endif
textline "                                "
width 35.
sif (cpuis("TEGRAX2"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 21. " XM2COMP_BGLP_E_PWRD                        ,[PMC] Active high to power down low power BANDGAP regulator" "Disabled,Enabled"
bitfld.long 0x00 20. "               XM2COMP_BG_E_PWRD                          ,[PMC] Active high to power down regulator" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
elif (cpuis("TEGRAX1"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
endif
group.long 0x310++0x0F
line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register"
bitfld.long 0x00 30.--31. " DQ_PHASE_MIN                               ,DPD phase lower limiter" "0,1,2,3"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 29. "                      CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on command" "Disabled,Enabled"
endif
textline "                                   "
bitfld.long 0x00 24.--28. "          DQ_DPD_EXIT_DELAY                          ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "                     DQ_PHASE_RAMP_IN_TIME                      ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 12.--16. "          DQ_PHASE_RAMP_OUT_TIME                     ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--11. "                     DQ_PHASE_HOLD_MIN                          ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. "          DQ_DPD_ENTRY_DELAY                         ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register"
bitfld.long 0x04 30.--31. " CMD_PHASE_MIN                              ,DPD phase lower limiter" "0,1,2,3"
textline "                                   "
bitfld.long 0x04 29. "          CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on cmd" "Disabled,Enabled"
bitfld.long 0x04 24.--28. "               CMD_DPD_EXIT_DELAY                         ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 20.--23. "          CMD_PHASE_RAMP_IN_TIME                     ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--16. "                     CMD_PHASE_RAMP_OUT_TIME                    ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 8.--11. "          CMD_PHASE_HOLD_MIN                         ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                     CMD_DPD_ENTRY_DELAY                        ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register"
bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8         ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x08 14.--15. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7         ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 12.--13. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6         ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x08 10.--11. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5         ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 8.--9. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4         ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x08 6.--7. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3         ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 4.--5. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2         ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x08 2.--3. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1         ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 0.--1. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0         ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register"
bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8        ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 14.--15. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7        ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 12.--13. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6        ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 10.--11. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5        ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 8.--9. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4        ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x0C 6.--7. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3        ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 4.--5. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2        ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x0C 2.--3. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1        ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 0.--1. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0        ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
group.long 0x324++0x03
line.long 0x00 "SCRATCH0_0,Scratch Register For General Use"
group.long 0x330++0x07
line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1                       ,Data brick control RFU1"
hexmask.long.word 0x00 0.--15. 1. "                   CMD_BRICK_CTRL_RFU1                        ,Command brick control RFU1"
line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2                       ,Data brick control RFU2"
hexmask.long.word 0x04 0.--15. 1. "                   CMD_BRICK_CTRL_RFU2                        ,Command brick control RFU2"
group.long 0x380++0x0B
line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP                               ,Mapping of CMD brick 0 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD0_DQ2_MAP                               ,Mapping of CMD brick 0 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD0_DQ1_MAP                               ,Mapping of CMD brick 0 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD0_DQ0_MAP                               ,Mapping of CMD brick 0 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP                               ,Mapping of CMD brick 0 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD0_DQ6_MAP                               ,Mapping of CMD brick 0 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD0_DQ5_MAP                               ,Mapping of CMD brick 0 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD0_DQ4_MAP                               ,Mapping of CMD brick 0 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP                            ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD0_DQSN_MAP                              ,Mapping of CMD brick 0 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD0_DQSP_MAP                              ,Mapping of CMD brick 0 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD0_DQ8_MAP                               ,Mapping of CMD brick 0 data pin 8"
group.long 0x38C++0x0B
line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP                               ,Mapping of CMD brick 1 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD1_DQ2_MAP                               ,Mapping of CMD brick 1 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD1_DQ1_MAP                               ,Mapping of CMD brick 1 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD1_DQ0_MAP                               ,Mapping of CMD brick 1 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP                               ,Mapping of CMD brick 1 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD1_DQ6_MAP                               ,Mapping of CMD brick 1 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD1_DQ5_MAP                               ,Mapping of CMD brick 1 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD1_DQ4_MAP                               ,Mapping of CMD brick 1 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP                            ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD1_DQSN_MAP                              ,Mapping of CMD brick 1 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD1_DQSP_MAP                              ,Mapping of CMD brick 1 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD1_DQ8_MAP                               ,Mapping of CMD brick 1 data pin 8"
group.long 0x398++0x0B
line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP                               ,Mapping of CMD brick 2 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD2_DQ2_MAP                               ,Mapping of CMD brick 2 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD2_DQ1_MAP                               ,Mapping of CMD brick 2 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD2_DQ0_MAP                               ,Mapping of CMD brick 2 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP                               ,Mapping of CMD brick 2 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD2_DQ6_MAP                               ,Mapping of CMD brick 2 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD2_DQ5_MAP                               ,Mapping of CMD brick 2 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD2_DQ4_MAP                               ,Mapping of CMD brick 2 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP                            ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD2_DQSN_MAP                              ,Mapping of CMD brick 2 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD2_DQSP_MAP                              ,Mapping of CMD brick 2 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD2_DQ8_MAP                               ,Mapping of CMD brick 2 data pin 8"
group.long 0x3A4++0x0B
line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP                               ,Mapping of CMD brick 3 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD3_DQ2_MAP                               ,Mapping of CMD brick 3 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD3_DQ1_MAP                               ,Mapping of CMD brick 3 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD3_DQ0_MAP                               ,Mapping of CMD brick 3 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP                               ,Mapping of CMD brick 3 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD3_DQ6_MAP                               ,Mapping of CMD brick 3 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD3_DQ5_MAP                               ,Mapping of CMD brick 3 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD3_DQ4_MAP                               ,Mapping of CMD brick 3 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP                            ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD3_DQSN_MAP                              ,Mapping of CMD brick 3 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD3_DQSP_MAP                              ,Mapping of CMD brick 3 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD3_DQ8_MAP                               ,Mapping of CMD brick 3 data pin 8"
group.long 0x3B0++0x17
line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register"
bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP                           ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 24.--27. "             BYTE6_DQ_CMD_MAP                           ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 20.--23. "          BYTE5_DQ_CMD_MAP                           ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 16.--19. "             BYTE4_DQ_CMD_MAP                           ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 12.--15. "          BYTE3_DQ_CMD_MAP                           ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 8.--11. "             BYTE2_DQ_CMD_MAP                           ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 4.--7. "          BYTE1_DQ_CMD_MAP                           ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 0.--3. "             BYTE0_DQ_CMD_MAP                           ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
line.long 0x04 "TR_TIMING_0_0,Training Timing Register"
bitfld.long 0x04 23.--26. " T_CATR_RD2VREF                             ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--21. "                     T_DHTRAIN                                  ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 12.--15. "          T_DSTRAIN                                  ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--9. 1. "                     T_VREF_LONG                                ,Delay between CAVREF and CATR reads"
line.long 0x08 "TR_CTRL_0_0,Training Control Register 0"
bitfld.long 0x08 8. " CATR_ENABLE                                ,CA Training enable" "Disabled,Enabled"
bitfld.long 0x08 5.--7. "               CAVREF_DQS_DURATION                        ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x08 4. "          CAVREF_RIVE_DQS                            ,Drive DQS" "0,1"
bitfld.long 0x08 0.--3. "                      CAVREF_TX_BYTE_MASK                        ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TR_CTRL_1_0,Training Control Register 1"
bitfld.long 0x0C 4. " ENABLE_TR_QRST                             ,TR QRST select" "Disabled,Enabled"
bitfld.long 0x0C 3. "               ENABLE_TR_QSAFE                            ,TR QSAFE select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 2. "          ENABLE_TR_RDV_MASK                         ,TR RDV_MASK select" "Disabled,Enabled"
bitfld.long 0x0C 1. "               ENABLE_TR_QPOP                             ,TR QPOP select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 0. "          ENABLE_TR_RDV                              ,TR RDV select" "Disabled,Enabled"
line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register"
bitfld.long 0x10 0. " CLK_SWITCH_BACK                            ,Clock switch back request trigger" "Not triggered,Triggered"
line.long 0x14 "TR_RDV_0,Training RDV Register"
hexmask.long.byte 0x14 0.--6. 1. " TR_RDV                                     ,Training RDV value"
rgroup.long 0x3C8++0x0F
line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE            ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE             ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE                 ,Unstall memory read|write after clock change" "Disabled,Enabled"
line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register"
hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle"
hexmask.long.byte 0x0C 16.--21. 1. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle"
textline "                                   "
hexmask.long.byte 0x0C 8.--13. 1. "          AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle"
hexmask.long.byte 0x0C 0.--5. 1. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle"
group.long 0x3D8++0x0F
line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes"
bitfld.long 0x00 16.--18. " SEL_DPD_DLY                                ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8. "                      DATA_SEL_DPD_EN                            ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5. "          ODT_SEL_DPD_EN                             ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled"
bitfld.long 0x00 4. "               RESET_SEL_DPD_EN                           ,Assert SEL_DPD for reset pad" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. "          CA_SEL_DPD_EN                              ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled"
bitfld.long 0x00 2. "               CLK_SEL_DPD_EN                             ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled"
line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count"
hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT                            ,Pre-refresh request count"
line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry"
bitfld.long 0x08 31. " DSR_PER_DEVICE                             ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled"
hexmask.long.word 0x08 0.--15. 1. "               DSR_THRESHOLD                              ,Number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL"
hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL                                    ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL"
group.long 0x3E8++0x07
line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset"
bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1                      ,Count-by VALUE clock increments select" "256,1"
hexmask.long.word 0x00 16.--30. 1. "                    CCFIFO_STALL_CNT                           ,CCFIFO stall counter value"
textline "                                   "
hexmask.long.word 0x00 0.--15. 0x01 "          CCFIFO_ADDR                                ,Clock change FIFO address register"
line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register"
rgroup.long 0x3F0++0x03
line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status"
hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT                               ,CCFIFO count"
group.long 0x3F4++0x0F
line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter"
hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE                           ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x00 0.--6. 1. "                     TR_QPOP                                    ,Time from training read command to pop data from the pad macro FIFO"
line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK                                ,Training RDV mask bits"
line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter"
hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE                                   ,Training time from a read command to when it is safe to issue a QRST"
line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter"
bitfld.long 0x0C 16.--20. " TR_QRST_DURATION                           ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x0C 0.--6. 1. "              TR_QRST                                    ,Training time from a read command to when it is safe to issue a QRST"
group.long 0x404++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL                   ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE0_BIT6_SEL                   ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE0_BIT5_SEL                   ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE0_BIT4_SEL                   ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE0_BIT3_SEL                   ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE0_BIT2_SEL                   ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE0_BIT1_SEL                   ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE0_BIT0_SEL                   ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x408++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL                   ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE1_BIT6_SEL                   ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE1_BIT5_SEL                   ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE1_BIT4_SEL                   ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE1_BIT3_SEL                   ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE1_BIT2_SEL                   ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE1_BIT1_SEL                   ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE1_BIT0_SEL                   ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x40C++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL                   ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE2_BIT6_SEL                   ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE2_BIT5_SEL                   ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE2_BIT4_SEL                   ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE2_BIT3_SEL                   ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE2_BIT2_SEL                   ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE2_BIT1_SEL                   ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE2_BIT0_SEL                   ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x410++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL                   ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE3_BIT6_SEL                   ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE3_BIT5_SEL                   ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE3_BIT4_SEL                   ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE3_BIT3_SEL                   ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE3_BIT2_SEL                   ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE3_BIT1_SEL                   ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE3_BIT0_SEL                   ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x418++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL                   ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE0_BIT6_SEL                   ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE0_BIT5_SEL                   ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE0_BIT4_SEL                   ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE0_BIT3_SEL                   ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE0_BIT2_SEL                   ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE0_BIT1_SEL                   ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE0_BIT0_SEL                   ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x41C++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL                   ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE1_BIT6_SEL                   ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE1_BIT5_SEL                   ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE1_BIT4_SEL                   ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE1_BIT3_SEL                   ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE1_BIT2_SEL                   ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE1_BIT1_SEL                   ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE1_BIT0_SEL                   ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x420++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL                   ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE2_BIT6_SEL                   ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE2_BIT5_SEL                   ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE2_BIT4_SEL                   ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE2_BIT3_SEL                   ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE2_BIT2_SEL                   ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE2_BIT1_SEL                   ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE2_BIT0_SEL                   ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x424++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL                   ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE3_BIT6_SEL                   ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE3_BIT5_SEL                   ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE3_BIT4_SEL                   ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE3_BIT3_SEL                   ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE3_BIT2_SEL                   ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE3_BIT1_SEL                   ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE3_BIT0_SEL                   ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x428++0x03
line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter"
bitfld.long 0x00 0. " ISSUE_QRST                                 ,Sets QRST to pads|macros" "0,1"
group.long 0x440++0x0B
line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1"
line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2"
line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3"
sif (cpuis("TEGRAX2"))
group.long 0x44C++0x0B
line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels"
bitfld.long 0x00 3. " INT_CH3                                    ,Set when there is a interrupt from channel-3" "None,Interrupt"
bitfld.long 0x00 2. "              INT_CH2                                    ,Set when there is a interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x00 1. "          INT_CH1                                    ,Set when there is a interrupt from channel-1" "None,Interrupt"
bitfld.long 0x00 0. "              INT_CH0                                    ,Set when there is a interrupt from channel-0" "None,Interrupt"
line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels"
bitfld.long 0x04 3. " CRITICAL_INT_CH3                           ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              CRITICAL_INT_CH2                           ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          CRITICAL_INT_CH1                           ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              CRITICAL_INT_CH0                           ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits"
bitfld.long 0x08 4.--7. " RESET_RFU                                  ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2. "                     RESET_EN                                   ,Enables the TH path when set to 0" "None,INT"
textline "                                   "
bitfld.long 0x08 1. "          RESET_E_INPUT                              ,When set to 1 enables the RX path for reset pads" "None,Interrupt"
bitfld.long 0x08 0. "              RESET_E_WKPD                               ,When set to 1 enables the weak pad for reset pads" "None,Interrupt"
endif
group.long 0x458++0x17
line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2"
bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 24.--25. "                  AUTO_CAL_DQS_PU_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 22.--23. "          AUTO_CAL_DQ_PD_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 20.--21. "                  AUTO_CAL_DQ_PU_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 18.--19. "          AUTO_CAL_DQS_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 16.--17. "                  AUTO_CAL_DQS_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 14.--15. "          AUTO_CAL_DQ_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 12.--13. "                  AUTO_CAL_DQ_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 10.--11. "          AUTO_CAL_CMD_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 8.--9. "                  AUTO_CAL_CMD_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 6.--7. "          AUTO_CAL_CA_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 4.--5. "                  AUTO_CAL_CA_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 2.--3. "          AUTO_CAL_CLK_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 0.--1. "                  AUTO_CAL_CLK_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
sif (cpuis("TEGRAX2"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--23. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value"
elif (cpuis("TEGRAX1"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                   "
bitfld.long 0x00 8.--13. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x460++0x0F
line.long 0x00 "TR_DVFS,Training DVFS Register"
bitfld.long 0x00 0. " TRAINING_DVFS                              ,DVFS training enable" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register"
bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE                       ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled"
bitfld.long 0x04 30. "               AUTO_CAL_STALL_ALL_TRAFFIC                 ,Stall all traffic for an autocal update" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x04 29. "          AUTO_CAL_COMPUTE_START_DVFS                ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled"
hexmask.long.byte 0x04 21.--27. 1. "               CAL_WAIT_AFTER_DVFS                        ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM"
textline "                                   "
bitfld.long 0x04 16.--20. "          AUTO_CAL_UPDATE_TIMEOUT                    ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS"
bitfld.long 0x04 8.--11. "           AUTO_CAL_WAIT_BEFORE_UPDATE                ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--5. "          AUTO_CAL_NUM_STALL_CYCLES                  ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter"
bitfld.long 0x08 28.--29. " IBDLY_MODE                                 ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
hexmask.long.byte 0x08 0.--6. 1. "              IBDLY                                      ,Specifies when to change IBDLY for DQ|DQS"
line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter"
bitfld.long 0x0C 28.--29. " OBDLY_MODE                                 ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
bitfld.long 0x0C 0.--5. "              OBDLY                                      ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x470++0x07
line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register"
bitfld.long 0x00 31. " DISPLAY_STUTTER_EN                         ,Display stutter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "               ASR_THRESHOLD                              ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels"
bitfld.long 0x04 3. " NONCRITICAL_INT_CH3                        ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              NONCRITICAL_INT_CH2                        ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          NONCRITICAL_INT_CH1                        ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              NONCRITICAL_INT_CH0                        ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
endif
textline "                                   "
width 26.
group.long 0x480++0x03
line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter"
hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN                                ,Cycles to wait from DSR exit"
group.long 0x48C++0x13
line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--4. " WE_DURATION                                ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x04 0.--4. " WS_DURATION                                ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WEV                                        ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter"
bitfld.long 0x0C 0.--5. " WSV                                        ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x10 "CFG_3_0,EMC Configuration Register 3"
bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16                            ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      MRR_BYTESEL                                ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7"
group.long 0x4A0++0x03
line.long 0x00 "MRW5_0,Command Trigger MRW5"
bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN                           ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW5_CNT                               ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
hexmask.long.byte 0x00 16.--23. 0x01 "  MRW5_MA                                    ,Register address"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW5_OP                                    ,Data to be written"
group.long 0x4A4++0x03
line.long 0x00 "MRW6 _0,Command Trigger MRW6 "
bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW6 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW6 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW6 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW6 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW6 _SP0                                  ,Data to be written to subp0"
group.long 0x4A8++0x03
line.long 0x00 "MRW7 _0,Command Trigger MRW7 "
bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW7 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW7 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW7 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW7 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW7 _SP0                                  ,Data to be written to subp0"
group.long 0x4AC++0x03
line.long 0x00 "MRW8 _0,Command Trigger MRW8 "
bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW8 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW8 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW8 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW8 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW8 _SP0                                  ,Data to be written to subp0"
group.long 0x4B0++0x03
line.long 0x00 "MRW9 _0,Command Trigger MRW9 "
bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW9 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW9 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW9 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW9 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW9 _SP0                                  ,Data to be written to subp0"
group.long 0x4B4++0x03
line.long 0x00 "MRW10_0,Command Trigger MRW10"
bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW10_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW10_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW10_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW10_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW10_SP0                                  ,Data to be written to subp0"
group.long 0x4B8++0x03
line.long 0x00 "MRW11_0,Command Trigger MRW11"
bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW11_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW11_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW11_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW11_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW11_SP0                                  ,Data to be written to subp0"
group.long 0x4BC++0x03
line.long 0x00 "MRW12_0,Command Trigger MRW12"
bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW12_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW12_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW12_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW12_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW12_SP0                                  ,Data to be written to subp0"
group.long 0x4C0++0x03
line.long 0x00 "MRW13_0,Command Trigger MRW13"
bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW13_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW13_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW13_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW13_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW13_SP0                                  ,Data to be written to subp0"
group.long 0x4C4++0x03
line.long 0x00 "MRW14_0,Command Trigger MRW14"
bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW14_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW14_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW14_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW14_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW14_SP0                                  ,Data to be written to subp0"
group.long 0x4D0++0x03
line.long 0x00 "MRW15_0,Command Trigger MRW15"
bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW15_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW15_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW15_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW15_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW15_SP0                                  ,Data to be written to subp0"
group.long 0x4D4++0x07
line.long 0x00 "CFG_SYNC_0,Sync Configuration 0"
bitfld.long 0x00 0. " CHANNEL_SYNC                               ,Channel sync" "0,1"
line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0"
bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE                     ,No ramp for DI/DT enable" "Disabled,Enabled"
group.long 0x4E0++0x03
line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--5. " WDV_CHK_BASE                               ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x510++0x07
line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK           ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x00 10. "               ECC_UNCORR_ERR_CRITICAL_INTMASK            ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 9. "  DLL_LOCK_TIMEOUT_CRITICAL_INTMASK          ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x00 8. "               CCFIFO_OVERFLOW_CRITICAL_INTMASK           ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 7. "  DLL_ALARM_CRITICAL_INTMASK                 ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x00 6. "               ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK      ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 5. "  MRR_DIVLD_CRITICAL_INTMASK                 ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x00 4. "               CLKCHANGE_COMPLETE_CRITICAL_INTMASK        ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 3. "  REFRESH_OVERFLOW_CRITICAL_INTMASK          ,Mask for refresh request overflow time out" "Masked,Unmasked"
line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK        ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "               ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK        ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 11. "  ECC_CORR_ERR_NONCRITICAL_INTMASK           ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "               ECC_UNCORR_ERR_NONCRITICAL_INTMASK         ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 9. "  DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK       ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "               CCFIFO_OVERFLOW_NONCRITICAL_INTMASK        ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 7. "  DLL_ALARM_NONCRITICAL_INTMASK              ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x04 6. "               ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK   ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 5. "  MRR_DIVLD_NONCRITICAL_INTMASK              ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "               CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK     ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 3. "  REFRESH_OVERFLOW_NONCRITICAL_INTMASK       ,Mask for refresh request overflow time out" "Masked,Unmasked"
endif
group.long 0x554++0x1F
line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0"
bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass"
bitfld.long 0x00 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass"
bitfld.long 0x00 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass"
bitfld.long 0x00 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass"
bitfld.long 0x00 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass"
bitfld.long 0x00 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass"
bitfld.long 0x00 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x00 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x00 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x00 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x00 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x00 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x00 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register"
bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE                   ,Pipe clock override enable" "Disabled,Enabled"
line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0"
bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 11. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 10. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 9. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 8. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 7. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 6. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 5. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 4. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 3. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 2. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 1. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 0. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0"
bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 26. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 25. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 24. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 23. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 22. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 21. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 20. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 19. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 18. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 17. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 16. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x10 "QPOP_0,DRAM Timing Parameter"
hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE                              ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x10 0.--6. 1. "                     QPOP                                       ,Time from read command to pop data from the pad macro FIFO"
line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x14 29. " QUSE_SHORTEN_2UI                           ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten"
bitfld.long 0x14 28. "              QUSE_EXTEND_UI                             ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend"
textline "                                  "
bitfld.long 0x14 0.--3. "  QUSE_DURATION                              ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x18 31. " CFG_STATIC_TERM                            ,IOBRICK internally disables termination based on DOE" "0,1"
bitfld.long 0x18 0.--3. "                      PUTERM_DURATION                            ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls"
bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX                  ,Bias current going out to brick receiver" "Disabled,Enabled"
bitfld.long 0x1C 2. "               BIAS0_DSC_E_PWRD_IBIAS_VTTGEN              ,Disables biasing current going out to VTTGEN cells" "No,Yes"
textline "                                  "
bitfld.long 0x1C 1. "  BIAS0_DSC_E_PWRD                           ,Disables all DC current paths within entire cell" "No,Yes"
bitfld.long 0x1C 0. "                    BIAS0_DSC_BG_SEL_N                         ,Select BandGap reference current" "Enabled,Disabled"
sif (cpuis("TEGRAX2"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0,0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value"
elif (cpuis("TEGRAX1"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 24.--28. " M2COMP_VTTLP_VDDA_CTRL                     ,PMC Fast-droop recovery or stability control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--23. "                     XM2COMP_VTTLP_SPARE                        ,PMC spare pins" "0,1,2,3"
textline "                                   "
bitfld.long 0x00 20.--21. " XM2COMP_VTTLP_VDDA_WB_CTRL                 ,PMC Weak Bias Level Control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x00 17. "    EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 16. " EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "               EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                   "
bitfld.long 0x00 12.--13. " EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 10.--11. "                 EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                   "
bitfld.long 0x00 8.--9. " EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 6.--7. "    EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                   "
bitfld.long 0x00 2.--5. " EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--1. "                     EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTO CAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 28. " AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 25. " AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 23. " AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 16.--21. " AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                   "
hexmask.long.byte 0x04 2.--8. 1. " AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
else
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14.--15. "  EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                  "
bitfld.long 0x00 10.--11. "  EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 8.--9. "    EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                  "
bitfld.long 0x00 6.--7. "  EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 2.--5. "    EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--1. "  EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 28. "  AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 25. "  AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 23. "  AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 16.--21. "  AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.byte 0x04 2.--8. 1. "  AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02C90000+0x20))&0x80000000)==0x80000000)
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 31. " REFPB_VALID                                ,REFpb operation enable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "               REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
else
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 24.--26. "                                                                   REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
endif
group.long 0x584++0x03
line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
bitfld.long 0x00 17. "               SEND_RD1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
textline "                                   "
endif
bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0                        ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled"
bitfld.long 0x00 15. "               DISABLE_CCDP1_WR_SPACING                   ,Write command spacing of tCCD+1 disable" "No,Yes"
textline "                                  "
bitfld.long 0x00 14. "  DISABLE_CCDP1_RD_SPACING                   ,Read command spacing of tCCD+1 disable" "No,Yes"
bitfld.long 0x00 13. "                    SUBP_ADDR_MODE                             ,DRAM SUBP address width" "x32,x16"
textline "                                  "
bitfld.long 0x00 12. "  ZQCAL_LATCH_ENABLE                         ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               ZQCAL_MPC_ENABLE                           ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. "  QPOP_RD_PREAMBLE_TOGGLE                    ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               CS_POLARITY                                ,DRAM chip select active polarity" "Low,High"
textline "                                  "
bitfld.long 0x00 8. "  MRR_DBI                                    ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               RD_DBI                                     ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. "  WR_DBI                                     ,EMC write data bus inversion protocol enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               MASKED_WR                                  ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 4. "  LPDDR4_CMD_MAP                             ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               QUSE_CCDP1_EXTEND                          ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. "  CH1_ENABLE                                 ,CH1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               CH0_ENABLE                                 ,CH0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. "  DRAM_EMCCLK_2TO1                           ,Specifies how much faster is dramclk than emcclk" "1x,2x"
sif (cpuis("TEGRAX2"))
group.long 0x710++0x03
line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register"
bitfld.long 0x00 8. " USE_SELF_REF_STATE                         ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled"
bitfld.long 0x00 4. "               ENCR_TWEAK_CHECK_ENABLE                    ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On"
textline "                                  "
bitfld.long 0x00 3. "  ECC_ENCR_CFG_LOCK                          ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On"
bitfld.long 0x00 2. "                    ECC_DYNAMIC_BYPASS_DISABLE                 ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On"
textline "                                  "
bitfld.long 0x00 1. "  ECC_ENCR_DISABLE                           ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On"
bitfld.long 0x00 0. "                    ECC_CHECK_DISABLE                          ,Setting this bit disables EMC ECC check/correct functions" "Off,On"
group.long 0xAC0++0x13
line.long 0x00 "ECC_CONTROL_0,ECC Control Register"
hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT                           ,Error buffer limit"
bitfld.long 0x00 2. "                     ERR_BUFFER_LOAD                            ,Error Buffer Load" "No load,Load"
textline "                                  "
bitfld.long 0x00 1. "  ERR_BUFFER_RESET                           ,Error Buffer Reset" "No reset,Reset"
bitfld.long 0x00 0. "               ERR_BUFFER_MODE                            ,Error Buffer Mode" "Ring,Write stop"
rgroup.long 0xAC4++0x13
line.long 0x00 "ECC_STATUS_0,ECC Error Status"
hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH                           ,The physical size (in number of entries) of ECC error buffer"
hexmask.long.byte 0x00 16.--23. 1. "                     ERR_BUFFER_CNT                             ,The number of errors physically residing in ECC error buffer"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  ERR_BUFFER_WR_PTR                          ,The ECC error buffer write pointer"
hexmask.long.byte 0x00 0.--7. 1. "                     ERR_BUFFER_RD_PTR                          ,The ECC error buffer read pointer"
line.long 0x04 "ECC_STATUS_0,ECC Error Status"
hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0                      ,Computed syndrome in ECC word"
bitfld.long 0x04 16.--17. "                   ECC_EERR_PAR_SP0                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x04 6.--15. 1. "  ECC_DERR_SYNDROME_SP0                      ,Computed syndrome in data word"
bitfld.long 0x04 3. "                   ECC_ERR_POISON_SP0                         ,Poisoned request" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0.--1. "  ECC_DERR_PAR_SP0                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors"
hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1                      ,Computed syndrome in ECC word"
bitfld.long 0x08 16.--17. "                   ECC_EERR_PAR_SP1                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x08 6.--15. 1. "  ECC_DERR_SYNDROME_SP1                      ,Computed syndrome in data word"
bitfld.long 0x08 0.--1. "                   ECC_DERR_PAR_SP1                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob"
bitfld.long 0x0C 28.--30. " ECC_ERR_BANK                               ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 8.--23. 1. "                      ECC_ERR_ROW                                ,ECC_ERR_ROW"
textline "                                  "
bitfld.long 0x0C 0.--5. "  ECC_ERR_GOB                                ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug"
hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID                               ,Request ID"
bitfld.long 0x10 20.--21. "                     ECC_ERR_SEQ                                ,Burst sequence" "0,1,2,3"
textline "                                  "
bitfld.long 0x10 19. "  ECC_ERR_SWAP                               ,Swap" "No swap,Swap"
bitfld.long 0x10 17.--18. "                ECC_ERR_SIZE                               ,Size" "R64B,R32B,R16B,?..."
textline "                                  "
bitfld.long 0x10 16. "  ECC_ERR_DEVICE                             ,DRAM device" "Disabled,Enabled"
bitfld.long 0x10 12.--14. "               ECC_ERR_COL_SP1                            ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 8.--10. "  ECC_ERR_COL_SP0                            ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--7. "                      ECC_ERR_EMC_ID                             ,EMC device/channel number" "0,1,2,3"
group.long 0xADC++0x03
line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register"
rbitfld.long 0x00 28.--31. " KEY_INIT_DONE                              ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                     KEY_STATE_CLEAR                            ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 8.--11. "  KEY_DISTRIB_ERR                            ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     KEY_ACTIVE                                 ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x588++0x27
line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "                      RANK0_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 15.--17. "  RANK0_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "                      RANK0_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 9.--11. "  RANK0_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "                      RANK0_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  RANK0_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      RANK0_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 18.--20. "                      RANK1_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 15.--17. "  RANK1_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--14. "                      RANK1_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 9.--11. "  RANK1_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--8. "                      RANK1_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 3.--5. "  RANK1_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                      RANK1_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter"
hexmask.long.word 0x08 0.--8. 1. " RFCPB                                      ,Specifies the per-bank auto refresh cycle time"
line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 18.--20. "                      RANK0_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 15.--17. "  RANK0_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "                      RANK0_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 9.--11. "  RANK0_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 6.--8. "                      RANK0_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 3.--5. "  RANK0_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "                      RANK0_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18.--20. "                      RANK1_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 15.--17. "  RANK1_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12.--14. "                      RANK1_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 9.--11. "  RANK1_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--8. "                      RANK1_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 3.--5. "  RANK1_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      RANK1_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0"
bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 0.--2. "                      CH0_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1"
bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0.--2. "                      CH1_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0"
bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "                      CH0_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1"
bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                      CH1_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0"
bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 10.--14. "                     RANK0_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x24 5.--9. "  RANK0_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 0.--4. "                     RANK0_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value"
else
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 1. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value"
hexmask.long.byte 0x00 0.--6. 1. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value"
else
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x5B8++0x13
line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1"
bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "                     RANK0_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 5.--9. "  RANK0_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                     RANK0_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2"
bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 10.--14. "                     RANK1_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x04 5.--9. "  RANK1_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     RANK1_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " CCDMW                                      ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3"
bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 10.--14. "                     RANK1_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x0C 5.--9. "  RANK1_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "                     RANK1_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register"
bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11      ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled"
bitfld.long 0x10 26. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10      ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 25. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9       ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled"
bitfld.long 0x10 24. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8       ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 23. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7       ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled"
bitfld.long 0x10 22. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6       ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 21. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5       ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled"
bitfld.long 0x10 20. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4       ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 19. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3       ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled"
bitfld.long 0x10 18. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2       ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 17. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1       ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled"
bitfld.long 0x10 16. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0       ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 15. "  RANK_SWIZZLE                               ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--23. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
bitfld.long 0x00 16.--19. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000,?..."
textline "                                  "
hexmask.long.byte 0x00 8.--14. 0x01 "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value"
hexmask.long.byte 0x00 0.--6. 0x01 "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value"
else
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
wgroup.long 0x5D0++0x07
line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register"
bitfld.long 0x00 29. " PROTOBIST_APC                              ,Controls the auto-precharge function of transaction" "0,1"
bitfld.long 0x00 28. "                      PROTOBIST_A_RDY                            ,Indicates active interface is ready" "Not ready,Ready"
textline "                                  "
hexmask.long.word 0x00 12.--27. 1. "  PROTOBIST_A_ROW                            ,Row control during protobist mode"
bitfld.long 0x00 11. "                   PROTOBIST_A_REF                            ,Refresh control during active request in protobist" "0,1"
textline "                                  "
bitfld.long 0x00 9.--10. "  PROTOBIST_A_DEV                            ,Devsel control during active request in protobist" "0,1,2,3"
bitfld.long 0x00 6.--8. "                      PROTOBIST_BANK                             ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  PROTOBIST_A_BANK                           ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      PROTOBIST_A_BANK1                          ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7"
line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register"
bitfld.long 0x04 28. " PROTOBIST_SWAP                             ,Swap control during protobist mode" "0,1"
bitfld.long 0x04 26.--27. "                      PROTOBIST_SIZE                             ,Size control during protobist mode" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 25. "  PROTOBIST_MASKED_WRITE                     ,Mask write control during protobist mode" "0,1"
bitfld.long 0x04 24. "                      PROTOBIST_T_DEV                            ,Dev control during Xfre request of protobist mode" "0,1"
textline "                                  "
bitfld.long 0x04 21.--23. "  PROTOBIST_T_COL1                           ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x04 9.--20. 1. "                      PROTOBIST_T_COL                            ,Column control during protobist"
textline "                                  "
bitfld.long 0x04 8. "  PROTOBIST_T_RDY                            ,Indicates transfer interface is ready" "Not ready,Ready"
hexmask.long.byte 0x04 0.--7. 1. "              PROTOBIST_CGID                             ,Request ID of transaction control"
group.long 0x5D8++0x0B
line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " PROTOBIST_RESET                            ,PROTOBIST reset" "No reset,Reset"
textline "                                   "
endif
bitfld.long 0x00 16.--18. " PROTOBIST_REQ                              ,Protobist request" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 15. "                      PROTOBIST_READ_ACK                         ,Protobist read ACK" "0,1"
textline "                                  "
bitfld.long 0x00 14. "  PROTOBIST_START                            ,Protobist start" "0,1"
bitfld.long 0x00 13. "                      PROTOBIST_W_BE                             ,Protobist mode control for byte enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. "  PROTOBIST_MODE                             ,Protobist mode control indicates bist mode" "0,1"
bitfld.long 0x00 8.--11. "                      PROTOBIST_RDI_SEL                          ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. "  PROTOBIST_TAG                              ,Protobist mode tag control"
line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register"
line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register"
rgroup.long 0x5EC++0x03
line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register"
group.long 0x5E4++0x07
line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0"
bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START                  ,Ignore DLLCAL start trim priv value" "0,1"
bitfld.long 0x00 28. "                      DDLLCAL_CTRL_DUAL_PASS_LOCK                ,2 pass lock" "0,1"
textline "                                  "
bitfld.long 0x00 24.--27. "  DDLLCAL_CTRL_STEP_SIZE                     ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                     DDLLCAL_CTRL_END_COUNT                     ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 16.--19. "  DDLLCAL_CTRL_FILTER_BITS                   ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                     DDLLCAL_CTRL_SAMPLE_COUNT                  ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15"
textline "                                  "
hexmask.long.byte 0x00 4.--11. 1. "  DDLLCAL_CTRL_SAMPLE_DELAY                  ,Delay to allow DLL value to settle"
bitfld.long 0x00 0.--3. "                     DDLLCAL_UPDATE_CNT_LIMIT                   ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE                          ,RFU" "0,1,2,3"
bitfld.long 0x04 24.--25. "                      DDLL_VTTDDLL_SPARE                         ,RFU" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 22. "  DDLL_VTTLP_VDDA_E_REGSW                    ,Active high. Enable to switch to low power regulator" "Low,High"
bitfld.long 0x04 21. "                   DDLL_VTTDDLL_VDDA_E_REG                    ,Enable DLL regulator" "0,1"
textline "                                  "
bitfld.long 0x04 20. "  DDLL_VTTDDLL_E_WB                          ,Active high to enable the weak bias for DDLL" "0,1"
textline "                                   "
endif
bitfld.long 0x04 16. " DDLL_BYPASS                                ,Bypass" "0,1"
bitfld.long 0x04 12.--15. "                      DDLL_RFU                                   ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 11. "  E_DDLL_PWRD                                ,Master DLL powerdown" "0,1"
hexmask.long.word 0x04 0.--10. 1. "                      DDLLCAL_CTRL_START_TRIM                    ,Calibration start value"
group.long 0x5F0++0x07
line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay"
hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY                        ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)"
line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control"
bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE           ,Disallow configuration reads during a timing update" "Allow,Disallow"
bitfld.long 0x04 30. "               STALL_WRITES_DURING_TIMING_UPDATE          ,Disallow configuration writes during a timing update" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 29. "  LINKED_TIMING_UPDATE_TIMEOUT               ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled"
bitfld.long 0x04 28. "               LINKED_TIMING_UPDATE                       ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 9.--10. "  UPDATE_DLL_IN_UPDATE                       ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 8. "                UPDATE_DLL_IN_CLKCHANGE                    ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow"
textline "                                  "
bitfld.long 0x04 1.--2. "  UPDATE_AUTOCAL_IN_UPDATE                   ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 0. "                UPDATE_AUTO_CAL_IN_CLKCHANGE               ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow"
sif (cpuis("TEGRAX2"))
group.long 0x5F8++0x07
line.long 0x00 "DLL_CFG_2_0,DLL Config register 2"
bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL                       ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     DDLL_VTTDDLL_VDDA_LVL                      ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_3_0,DLL Config register 3"
bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL                   ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x04 16.--17. "    DDLL_VTTDDLL_VDDA_WB_CTRL                  ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
textline "                                  "
bitfld.long 0x04 8.--12. "  DDLL_VTTCDB_VDDA_CTRL                      ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     DDLL_VTTDDLL_VDDA_CTRL                     ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
width 15.
tree "PMACRO Registers"
tree "QUSE DDLL Register"
group.long 0x600++0x03
line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank0 byte0"
group.long 0x604++0x03
line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank0 byte2"
group.long 0x608++0x03
line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank0 byte4"
group.long 0x60C++0x03
line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank0 byte6"
group.long 0x610++0x03
line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank0 command0"
group.long 0x614++0x03
line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank0 command2"
textline "                                             "
group.long 0x620++0x03
line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank1 byte0"
group.long 0x624++0x03
line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank1 byte2"
group.long 0x628++0x03
line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank1 byte4"
group.long 0x62C++0x03
line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank1 byte6"
group.long 0x630++0x03
line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank1 command0"
group.long 0x634++0x03
line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank1 command2"
tree.end
tree "OB DDLL Long Registers"
group.long 0x640++0x03
line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank0 byte0"
group.long 0x644++0x03
line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank0 byte2"
group.long 0x648++0x03
line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank0 byte4"
group.long 0x64C++0x03
line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank0 byte6"
group.long 0x650++0x03
line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank0 command0"
group.long 0x654++0x03
line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank0 command2"
textline "                                             "
group.long 0x660++0x03
line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank1 byte0"
group.long 0x664++0x03
line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank1 byte2"
group.long 0x668++0x03
line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank1 byte4"
group.long 0x66C++0x03
line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank1 byte6"
group.long 0x670++0x03
line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank1 command0"
group.long 0x674++0x03
line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank1 command2"
textline "                                             "
group.long 0x680++0x03
line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank0 byte0"
group.long 0x684++0x03
line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank0 byte2"
group.long 0x688++0x03
line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank0 byte4"
group.long 0x68C++0x03
line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank0 byte6"
group.long 0x690++0x03
line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank0 Command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank0 Command0"
group.long 0x694++0x03
line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank0 Command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank0 Command2"
textline "                                             "
group.long 0x6A0++0x03
line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank1 byte0"
group.long 0x6A4++0x03
line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank1 byte2"
group.long 0x6A8++0x03
line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank1 byte4"
group.long 0x6AC++0x03
line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank1 byte6"
group.long 0x6B0++0x03
line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank1 command0"
group.long 0x6B4++0x03
line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank1 command2"
tree.end
tree "IB DDLL DQS Long Registers"
group.long 0x6C0++0x03
line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank0 byte0"
group.long 0x6C4++0x03
line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank0 byte2"
group.long 0x6C8++0x03
line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank0 byte4"
group.long 0x6CC++0x03
line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank0 byte6"
group.long 0x6D0++0x03
line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank0 command0"
group.long 0x6D4++0x03
line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank0 command2"
textline "                                             "
group.long 0x6E0++0x03
line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank1 byte0"
group.long 0x6E4++0x03
line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank1 byte2"
group.long 0x6E8++0x03
line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank1 byte4"
group.long 0x6EC++0x03
line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank1 byte6"
group.long 0x6F0++0x03
line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank1 command0"
group.long 0x6F4++0x03
line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank1 command2"
tree.end
textline "                                             "
width 22.
group.long 0x700++0x03
line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3           ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE2           ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE1           ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE0           ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x704++0x03
line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7           ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE7         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE7       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE6           ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE6           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE6         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE6       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE5           ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE5           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE5         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE5       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE4           ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE4           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE4         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE4       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x708++0x03
line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3           ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_CMD3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_CMD3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_CMD2           ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_CMD2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_CMD2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_CMD2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_CMD1           ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_CMD1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_CMD1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_CMD1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_CMD0           ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_CMD0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_CMD0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_CMD0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x720++0x03
line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1              ,Byte1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE1       ,Byte1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE1        ,Programmed to TX PWRD value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE1      ,Programmed to TX PWRD value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE0              ,Byte0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE0       ,Byte0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE0        ,Programmed to TX PWRD value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE0      ,Programmed to TX PWRD value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1"
group.long 0x724++0x03
line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3              ,Byte3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE3       ,Byte3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE3        ,Programmed to TX PWRD value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE3      ,Programmed to TX PWRD value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE2              ,Byte2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE2       ,Byte2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE2        ,Programmed to TX PWRD value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE2      ,Programmed to TX PWRD value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1"
group.long 0x728++0x03
line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5              ,Byte5 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE5       ,Byte5 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE5        ,Programmed to TX PWRD value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE5      ,Programmed to TX PWRD value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE4              ,Byte4 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE4       ,Byte4 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE4        ,Programmed to TX PWRD value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE4      ,Programmed to TX PWRD value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1"
group.long 0x72C++0x03
line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7              ,Byte7 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE7       ,Byte7 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE7        ,Programmed to TX PWRD value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE7      ,Programmed to TX PWRD value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE6              ,Byte6 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE6       ,Byte6 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE6        ,Programmed to TX PWRD value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE6      ,Programmed to TX PWRD value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1"
group.long 0x730++0x03
line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1              ,Cmd1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD1       ,Cmd1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD1                ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD1        ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD1      ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD0              ,Cmd0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD0       ,Cmd0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD0                ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD0        ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD0      ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1"
group.long 0x734++0x03
line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3              ,Cmd3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD3       ,Cmd3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD3                ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD3        ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD3      ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD2              ,Cmd2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD2       ,Cmd2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD2                ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD2        ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD2      ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x740++0x03
line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1"
group.long 0x744++0x03
line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1"
group.long 0x748++0x03
line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1"
group.long 0x74C++0x03
line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1"
group.long 0x750++0x03
line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1"
group.long 0x754++0x03
line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x760++0x03
line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass"
bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 30. "            CMD_DDLLCAL_BIT_TXDQ_BYPASS         ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 29. "            CMD_DDLLCAL_BIT_TXDQS_BYPASS      ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 27. "          CMD_DDLLCAL_BYTE_QU_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 26. "            CMD_DDLLCAL_BYTE_RXDQS_BYPASS       ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 25. "            CMD_DDLLCAL_BYTE_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 24. "          CMD_DDLLCAL_BYTE_TXDQ_BYPASS    ,Bypass the DDLL calibration value" "0,1"
bitfld.long 0x00 23. "            CMD_DDLL_BIT_RXDQ_BYPASS            ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 22. "    CMD_DDLL_BIT_TXDQS_BYPASS         ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 21. "          CMD_DDLL_BIT_TXDQ_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 20. "    CMD_DDLL_BYTE_RXRT_BYPASS           ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 19. "    CMD_DDLL_BYTE_QU_BYPASS           ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          CMD_DDLL_BYTE_RXDQS_BYPASS      ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 17. "    CMD_DDLL_BYTE_TXDQS_BYPASS          ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_DDLL_BYTE_TXDQ_BYPASS         ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 15. "          DATA_DDLLCAL_BIT_RXDQ_BYPASS    ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 14. "            DATA_DDLLCAL_BIT_TXDQ_BYPASS        ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 13. "            DATA_DDLLCAL_BIT_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 11. "          DATA_DDLLCAL_BYTE_QU_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 10. "            DATA_DDLLCAL_BYTE_RXRQS_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 9. "            DATA_DDLLCAL_BYTE_TXDQS_BYPASS    ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DATA_DDLLCAL_BYTE_TXDQ_BYPASS   ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 7. "            DATA_DDLL_BIT_RXDQ_BYPASS           ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 6. "    DATA_DDLL_BIT_TXDQS_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 5. "          DATA_DDLL_BIT_TXDQ_BYPASS       ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 4. "    DATA_DDLL_BYTE_RXRT_BYPASS          ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 3. "    DATA_DDLL_BYTE_QU_BYPASS          ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DATA_DDLL_BYTE_RXDQS_BYPASS     ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 1. "    DATA_DDLL_BYTE_TXDQS_BYPASS         ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    DATA_DDLL_BYTE_TXDQ_BYPASS        ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
group.long 0x770++0x03
line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x774++0x03
line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE7            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE7         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE7         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE7          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE7        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE7       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE6            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE6          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE6       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE6             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE6        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE6      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE6           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE5          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE5        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE5           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE5           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE5      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE5          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE5         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE4        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE4            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE4         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE4         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE4          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE4        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE4       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x778++0x03
line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_CMD3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_CMD3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_CMD3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_CMD3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_CMD3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_CMD3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_CMD2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_CMD2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_CMD2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_CMD2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_CMD2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_CMD2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_CMD2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_CMD1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_CMD1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_CMD1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_CMD1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_CMD1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_CMD1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_CMD1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_CMD0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_CMD0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_CMD0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_CMD0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_CMD0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_CMD0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_CMD0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
group.long 0x780++0x03
line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE3      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE3       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE3      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE3         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE3                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE0                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x784++0x03
line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE7      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE7       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE7      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE7         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE7                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE6      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE6       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE6      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE6         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE6                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE5      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE5       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE5      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE5         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE5                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE4      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE4       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE4      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE4         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE4                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x788++0x03
line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_MISC2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_MISC2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_MISC2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_MISC2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_MISC1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_MISC1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_MISC1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_MISC1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_MISC0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_MISC0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_MISC0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_MISC0                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_RESET      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_RESET       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_RESET      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_RESET         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_RESET                 ,IO_CMD input path enable" "Disabled,Enabled"
width 17.
tree "OB DDLL Short DQ Registers"
group.long 0x800++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x810++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x820++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x830++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x840++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x850++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x860++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x870++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x880++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x890++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8A0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8B0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x900++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x910++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x920++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x930++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x940++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x950++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x960++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x970++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x980++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x990++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9A0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9B0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
tree.end
tree "IB DDLL Short DQ Register"
group.long 0xA00++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA10++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA20++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA30++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA40++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA50++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA60++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA70++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA80++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA90++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAA0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAB0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xB00++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
group.long 0xB10++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
group.long 0xB20++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
group.long 0xB30++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
group.long 0xB40++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
group.long 0xB50++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
group.long 0xB60++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
group.long 0xB70++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
group.long 0xB80++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
group.long 0xB90++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
group.long 0xBA0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
group.long 0xBB0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
tree.end
textline "                 "
width 32.
group.long 0xBE0++0x03
line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3                              ,Programmed to IB Vref value for DQ of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE2                              ,Programmed to IB Vref value for DQ of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE1                              ,Programmed to IB Vref value for DQ of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE0                              ,Programmed to IB Vref value for DQ of BYTE0"
group.long 0xBE4++0x03
line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7                              ,Programmed to IB Vref value for DQ of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE6                              ,Programmed to IB Vref value for DQ of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE5                              ,Programmed to IB Vref value for DQ of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE4                              ,Programmed to IB Vref value for DQ of BYTE4"
group.long 0xBE8++0x03
line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3                              ,Programmed to IB Vref value for DQ of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_CMD2                              ,Programmed to IB Vref value for DQ of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_CMD1                              ,Programmed to IB Vref value for DQ of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_CMD0                              ,Programmed to IB Vref value for DQ of CMD0"
group.long 0xBF0++0x03
line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3                             ,Programmed to IB Vref value for DQS of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE2                             ,Programmed to IB Vref value for DQS of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE1                             ,Programmed to IB Vref value for DQS of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE0                             ,Programmed to IB Vref value for DQS of BYTE0"
group.long 0xBF4++0x03
line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7                             ,Programmed to IB Vref value for DQS of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE6                             ,Programmed to IB Vref value for DQS of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE5                             ,Programmed to IB Vref value for DQS of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE4                             ,Programmed to IB Vref value for DQS of BYTE4"
group.long 0xBF8++0x03
line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3                             ,Programmed to IB Vref value for DQS of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_CMD2                             ,Programmed to IB Vref value for DQS of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_CMD1                             ,Programmed to IB Vref value for DQS of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_CMD0                             ,Programmed to IB Vref value for DQS of CMD0"
textline "                                "
group.long 0xC00++0x03
line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1                           ,Programmed to CKE1 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE0                           ,Programmed to CKE0 trimmer value"
group.long 0xC04++0x03
line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3                           ,Programmed to CKE3 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE2                           ,Programmed to CKE2 trimmer value"
group.long 0xC08++0x03
line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5                           ,Programmed to CKE5 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE4                           ,Programmed to CKE4 trimmer value"
group.long 0xC0C++0x03
line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7                           ,Programmed to CKE7 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE6                           ,Programmed to CKE6 trimmer value"
group.long 0xC10++0x03
line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0                           ,Programmed to MISC0 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_RESET                           ,Programmed to RESET trimmer value"
group.long 0xC14++0x03
line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2                           ,Programmed to MISC2 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_MISC1                           ,Programmed to MISC1 trimmer value"
textline "                                "
group.long 0xC20++0x03
line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3                          ,Programmed to CKE3 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE2                          ,Programmed to CKE2 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE1                          ,Programmed to CKE1 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE0                          ,Programmed to CKE0 fine trimmer value"
group.long 0xC24++0x03
line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7                          ,Programmed to CKE7 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE6                          ,Programmed to CKE6 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE5                          ,Programmed to CKE5 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE4                          ,Programmed to CKE4 fine trimmer value"
group.long 0xC28++0x03
line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2                          ,Programmed to MISC2 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_MISC1                          ,Programmed to MISC1 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_MISC0                          ,Programmed to MISC0 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_RESET                          ,Programmed to RESET fine trimmer value"
textline "                                "
group.long 0xC30++0x07
line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control"
bitfld.long 0x00 27. " DISABLE_CFG_CMD3           ,CMD3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 26. "               DISABLE_CFG_CMD2           ,CMD2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " DISABLE_CFG_CMD1           ,CMD1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 24. "               DISABLE_CFG_CMD0           ,CMD0 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " DISABLE_CFG_BYTE7          ,BYTE7 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 22. "               DISABLE_CFG_BYTE6          ,BYTE6 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 21. " DISABLE_CFG_BYTE5          ,BYTE5 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 20. "               DISABLE_CFG_BYTE4          ,BYTE4 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " DISABLE_CFG_BYTE3          ,BYTE3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 18. "               DISABLE_CFG_BYTE2          ,BYTE2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 17. " DISABLE_CFG_BYTE1          ,BYTE1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 16. "               DISABLE_CFG_BYTE0          ,BYTE0 pad macro configuration read|write disable" "No,Yes"
line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW         ,Enable switch to low power regulator" "Disabled,Enabled"
textline "                                         "
endif
bitfld.long 0x04 16.--19. " VTT_VDDA_LVL               ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL              ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                VTT_VCLAMP_LVL             ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xC38++0x03
line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register"
bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL              ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                VTT_VAUXP_CTRL             ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL            ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xC3C++0x2F
line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL      ,BG current bias select" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 16.--17. "              DDLL_DDLL_BG_ILVL_CTRL     ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL       ,BANDGAP output current level control" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 8.--9. "              BG_ILVL_CTRL               ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
endif
bitfld.long 0x00 4.--6. " BG_SETUP                   ,Temperature coefficient control" "0,1,2,3,4,5,6,7"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "                 BGLP_E_PWRD                ,BGLP E PWRD" "0,1"
endif
textline "                                         "
bitfld.long 0x00 1. " BG_MODE                    ,Regulator mode" "High performance,Low power"
bitfld.long 0x00 0. "  BG_E_PWRD                  ,Power down regulator" "0,1"
line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads"
bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE        ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..."
bitfld.long 0x04 25. "  TX_E_DDLL_TCLK             ,TX E DDLL TCLK" "0,1"
textline "                                         "
bitfld.long 0x04 24. " E_TX_NMOS_DRVUP            ,E TX NMOS DRVUP" "0,1"
bitfld.long 0x04 20.--21. "                 TX_DCC_MODE                ,TX DCC mode" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 16.--17. " MEM_MODE                   ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..."
bitfld.long 0x04 13. "      TX_SEL_MV_CYCLE            ,Multi-voltage timing path timing closure" "1 cycle,2 cycles"
textline "                                         "
bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE      ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 9. "     E_PWRD                     ,DC current paths within entire brick cell disable" "Enabled,Disabled"
textline "                                         "
bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE      ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 0.--1. "     QUSE_MODE                  ,Pad quse mode" "0,1,2,3"
line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs"
bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL    ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 24.--25. "            DATA_DQ_TX_DRVDN_ZCTRL     ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL    ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 20.--21. "            DATA_DQ_TX_DRVUP_ZCTRL     ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL     ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 16.--17. "            CMD_DQ_TX_DRVDN_ZCTRL      ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL     ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 12.--13. "            CMD_DQ_TX_DRVUP_ZCTRL      ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL    ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 8.--9. "            DQ_RX_DRVDN_TERM_ZCTRL     ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL    ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 4.--5. "            DQ_RX_DRVUP_TERM_ZCTRL     ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL         ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 0.--1. "            CMD_TX_DRVUP_ZCTRL         ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick"
bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM          ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "                DQS_RX_DRVUP_TERM          ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM           ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                DQ_RX_DRVUP_TERM           ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick"
bitfld.long 0x10 8.--13. " CMD_TX_DRVDN               ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                CMD_TX_DRVUP               ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad"
bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL             ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 22. "                CMD_RX_E_DIRECT_ZI         ,Command RX E direct ZI" "0,1"
textline "                                         "
bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD        ,Command RX E IBIAS PWRD" "0,1"
bitfld.long 0x14 16.--20. "                 CMD_DQS_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON        ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x14 14. "          CMD_DQ_RX_E_RDIV           ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE       ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x14 12. "          CMD_DQS_RX_E_DIFF_MODE     ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL    ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 4.--5. "                 CMD_DQS_RX_MODE            ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE             ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad"
bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 22. "                DATA_RX_E_DIRECT_ZI        ,Data RX E Direct ZI" "0,1"
textline "                                         "
bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD       ,Data RX E IBIAS PWRD" "0,1"
bitfld.long 0x18 16.--20. "                 DATA_DQS_RX_CTRL           ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON       ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x18 14. "          DATA_DQ_RX_E_RDIV          ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE      ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x18 12. "          DATA_DQS_RX_E_DIFF_MODE    ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL   ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4.--5. "                 DATA_DQS_RX_MODE           ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE            ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad"
bitfld.long 0x1C 13. " CMD_E_PWRD_RX              ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x1C 12. "          CMD_DDLL_QU_SEL_M2CLK      ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE      ,Command DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x1C 4.--5. "        CMD_DQSP_RX_TERM_MODE      ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE        ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad"
bitfld.long 0x20 13. " DATA_E_PWRD_RX             ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x20 12. "          DATA_DDLL_QU_SEL_M2CLK     ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE     ,Data DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x20 4.--5. "        DATA_DQSP_RX_TERM_MODE     ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE       ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad"
bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON      ,Command DQS TX drive force on" "0,1"
bitfld.long 0x24 26. "                 CMD_DQ_TX_DRVFORCEON       ,Command DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON      ,Command command TX drive force on" "0,1"
bitfld.long 0x24 24. "                 CMD_CMD_TX_E_DCC           ,Command command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 20. "          CMD_DQSN_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC          ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x24 14.--15. "          CMD_DQS_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 12. "          CMD_DQSP_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 9. "     CMD_DQSP_TX_E_DCC          ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 8. " CMD_DQS_E_IVREF            ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x24 6.--7. "          CMD_DQ_TX_EBOOST_PU_MODE   ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU           ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 4. "          CMD_DQ_TX_E_WKPD           ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE   ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 1. "     CMD_DQ_TX_E_DCC            ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 0. " CMD_DQ_E_IVREF             ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad"
bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON     ,Data DQS TX drive force on" "0,1"
bitfld.long 0x28 26. "                 DATA_DQ_TX_DRVFORCEON      ,Data DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON     ,Data command TX drive force on" "0,1"
bitfld.long 0x28 24. "                 DATA_CMD_TX_E_DCC          ,Data command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 20. "          DATA_DQSN_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC         ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x28 14.--15. "          DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 12. "          DATA_DQSP_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 9. "     DATA_DQSP_TX_E_DCC         ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 8. " DATA_DQS_E_IVREF           ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x28 6.--7. "          DATA_DQ_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU          ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 4. "          DATA_DQ_TX_E_WKPD          ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 1. "     DATA_DQ_TX_E_DCC           ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 0. " DATA_DQ_E_IVREF            ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks"
bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN        ,Command DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 2. "                 CMD_DQ_TX_BPSDYNEN         ,Command DQ TX BPSDYNEN" "0,1"
textline "                                         "
bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN       ,Data DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 0. "                 DATA_DQ_TX_BPSDYNEN        ,Data DQ TX BPSDYNEN" "0,1"
sif (cpuis("TEGRAX2"))
group.long 0xC6C++0x03
line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register"
hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD          ,DSR VTT VDDA Load"
bitfld.long 0x00 0.--3. "                DSR_VTT_VDDA_LVL           ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC70++0x0B
line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick"
bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN          ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                DATA_DQS_TX_DRVUP          ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN           ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                DATA_DQ_TX_DRVUP           ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick"
bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN           ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                CMD_DQS_TX_DRVUP           ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN            ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                CMD_DQ_TX_DRVUP            ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs"
bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS          ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "          E_CAL_UPDATE_HIGH          ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY         ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
group.long 0xCE0++0x0B
line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves"
hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL                             ,Calibration value"
line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values"
bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN              ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 27. "            CMD_DDLL_OFFSET_BYTE_RXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 25. "            CMD_DDLL_OFFSET_BYTE_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 23. "            CMD_DDLL_OFFSET_BIT_RXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 21. "            CMD_DDLL_OFFSET_BIT_TXDQS_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 16. "            DATA_DDLL_OFFSET_BYTE_QU_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 14. "            DATA_DDLL_OFFSET_BYTE_TXCMD_EN          ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 12. "            DATA_DDLL_OFFSET_BYTE_TXDQ_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 10. "            DATA_DDLL_OFFSET_BIT_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 8. "            DATA_DDLL_OFFSET_BIT_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 0.--5. " DDLL_OFFSET                             ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training"
bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN     ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 27. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 25. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 23. "            CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 21. "            CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 16. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 14. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 12. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 10. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 8. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET                    ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0xCEC++0x03
line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0"
bitfld.long 0x00 0. " SEL_NEG_IB                              ,Select negative edge flop as output" "Disabled,Enabled"
endif
group.long 0xCF0++0x0F
line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register"
hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD                           ,VTT VDDA Load"
hexmask.long.byte 0x00 8.--15. 1. "                  VTT_VAUXP_LOAD                          ,VTT VAUXP Load"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD                         ,VTT VCLAMP Load"
line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3"
hexmask.long.word 0x04 0.--10. 1. " IB_RXRT                                 ,Programmed to IB DQ receive path retiming"
line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0"
bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
textline "                                         "
bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
bitfld.long 0x08 2. "            CH0_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
textline "                                         "
bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
bitfld.long 0x08 0. "                   CH0_TRAINING_ENABLED                    ,Channel 0 training enable" "Disabled,Enabled"
line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1"
bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
bitfld.long 0x0C 3. "           CH1_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
bitfld.long 0x0C 1. "         CH1_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
textline "                                         "
bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED                    ,Channel 1 training enable" "Disabled,Enabled"
tree.end
width 27.
tree "TRAINING Registers"
group.long 0xE00++0x03
line.long 0x00 "CMD_0,Main Register For Launching Training"
bitfld.long 0x00 31. " GO                   ,Start training" "Not started,Started"
bitfld.long 0x00 30. "    PERIODIC             ,Start periodic training" "Not started,Started"
bitfld.long 0x00 8. "    QUSE_VREF      ,Initiates DQS_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 7. "   RD_VREF           ,Initiates IB_DQ_VREF training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 6. " WR_VREF              ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 5. "  CA_VREF              ,Initiates CA_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 4. "  QUSE           ,Initiates QUSE training" "Not initiated,Initiated"
bitfld.long 0x00 3. "   WR                ,Initiates WR training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 2. " RD                   ,Initiates RD training" "Not initiated,Initiated"
bitfld.long 0x00 1. "  CA                   ,Initiates CA training" "Not initiated,Initiated"
bitfld.long 0x00 0. "  PRIME          ,Writes the custom pattern into MPC register" "Disabled,Enabled"
if ((per.l(ad:0x02C90000+0xE04)&0x00010000)==0x00010000)
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Rank to train" "RANK0,RANK1"
bitfld.long 0x00 13. "           UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
else
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0"
bitfld.long 0x00 13. "  UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
endif
rgroup.long 0xE08++0x03
line.long 0x00 "STATUS_0,Read Back For Training Status"
bitfld.long 0x00 0.--1. " STATUS               ,Training status" "Done,Running,Error,?..."
group.long 0xE0C++0x3F
line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep"
bitfld.long 0x00 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x00 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x00 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x00 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x00 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x00 10.--18. 1. "           MAXIMUM              ,Maximum"
hexmask.long.word 0x00 0.--8. 1. "           MINIMUM        ,Minimum"
line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep"
bitfld.long 0x04 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x04 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x04 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x04 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x04 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x04 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x04 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x04 10.--19. 1. "           MAXIMUM              ,2's complement"
hexmask.long.word 0x04 0.--9. 1. "           MINIMUM        ,2' complement"
line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training"
hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x08 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x08 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x08 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x08 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x08 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x08 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x08 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep"
bitfld.long 0x0C 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x0C 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x0C 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x0C 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x0C 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x0C 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x0C 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x0C 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x0C 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x0C 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep"
hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x10 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x10 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x10 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x10 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x10 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x10 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x10 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep"
bitfld.long 0x14 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x14 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x14 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x14 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x14 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep"
bitfld.long 0x18 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x18 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x18 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x18 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x18 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x18 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x18 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x18 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x18 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x18 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x18 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep"
hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x1C 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x1C 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x1C 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x1C 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x1C 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x1C 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x1C 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep"
bitfld.long 0x20 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x20 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x20 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x20 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x20 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep"
bitfld.long 0x24 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x24 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x24 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x24 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x24 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x24 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x24 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x24 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x24 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x24 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x24 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep"
hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x28 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x28 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x28 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x28 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x28 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x28 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x28 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep"
hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT             ,Number of NOPs between 2 CA training reads"
line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training"
bitfld.long 0x30 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x30 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x30 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x30 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x30 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep"
bitfld.long 0x34 31. " TADR_ENABLE          ,Set to disabled" "Disabled,?..."
hexmask.long.byte 0x34 12.--19. 1. "       TADR_MAX             ,Maximum tADR allowed in tCK"
hexmask.long.word 0x34 0.--11. 1. "             TADR_SETTING   ,CA BRLSHFT + CA trimmer during tADR training"
line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK"
hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY          ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 16.--23. 1. "             PRIV_DELAY           ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 8.--15. 1. "             SHORT_TRIMMER  ,Settle time for short trimmer"
hexmask.long.byte 0x38 0.--7. 1. "              LONG_TRIMMER      ,Settle time for long trimmer"
line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers"
bitfld.long 0x3C 24.--27. " WINDOW_LIMIT         ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 0.--7. 1. "             SELECT               ,Specifies output on DQ registers"
group.long 0xE5C++0x13
line.long 0x00 "MPC_0,MPC-RD Registers Data"
hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN       ,Invert pattern"
hexmask.long.word 0x00 0.--15. 1. "           DATA                 ,Data"
line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM"
bitfld.long 0x04 31. " WRITE                ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered"
bitfld.long 0x04 16.--19. "  FORMAT               ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 0x01 "             SELECT_OFFSET  ,Location to write in pattern RAM"
line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM"
line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM"
line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK"
hexmask.long.word 0x10 16.--31. 1. " OB                   ,Settle time for WRITE|CA Vrefs"
hexmask.long.word 0x10 0.--15. 1. "           IB                   ,Settle time for READ|QUSE Vrefs"
sif (cpuis("TEGRAX2"))
group.long 0xE98++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xE9C++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA0++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA4++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA8++0x03
line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEAC++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB0++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB4++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB8++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEBC++0x03
line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0xEC0++0x07
line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results"
hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 16.--23. 1. "             RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 0.--7. 1. "             RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results"
hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 16.--23. 1. "             RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 0.--7. 1. "             RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
group.long 0xED0++0x03
line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep"
bitfld.long 0x00 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x00 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x00 0.--7. 1. "             MINIMUM              ,Minimum"
tree.end
width 0x0B
tree.end
tree "EMC3"
base ad:0x02CA0000
width 21.
group.long 0x00++0x13
line.long 0x00 "INSTATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 13. " TWEAK_UNDERFLOW_INT           ,EMC internal tweak FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  ECC_ERR_BUF_OVF_INT              ,ECC Error Buffer overflow" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 11. "   ECC_CORR_ERR_INT              ,Indicates that ECC logic has detected a correctable error" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  ECC_UNCORR_ERR_INT               ,Indicates that ECC logic has detected an uncorrectable error" "No interrupt,Interrupt"
textline "                            "
textfld "  "
endif
eventfld.long 0x00 9. " DLL_LOCK_TIMEOUT_INT          ,Indicate a DLL lock timeout has occurred" "No interrupt,Interrupt"
eventfld.long 0x00 8. "  CCFIFO_OVERFLOW_INT              ,Clock change FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 7. "   DLL_ALARM_INT                ,Indicate DLL alarm has been set" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 6. "   ACCESS_TO_SR_DPD_DEV_INT      ,Indicate system attempt to access a self-refresh/deep-powered-down device" "No interrupt,Interrupt"
eventfld.long 0x00 5. "  MRR_DIVLD_INT                    ,LPDDR2 MRR data is available to be read" "No interrupt,Interrupt"
eventfld.long 0x00 4. "   CLKCHANGE_COMPLETE_INT       ,CAR/EMC clock-change handshake complete" "No interrupt,Interrupt"
textline "                            "
eventfld.long 0x00 3. "   REFRESH_OVERFLOW_INT          ,Refresh request overflow timeout" "No interrupt,Interrupt"
line.long 0x04 "INTMASK_0,Interrupt Mask Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_INTMASK       ,Mask for tweak FIFO underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "      ECC_ERR_BUF_OVF_INTMASK          ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 11. "   ECC_CORR_ERR_INTMASK          ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "      ECC_UNCORR_ERR_INTMASK           ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                            "
textfld "  "
endif
bitfld.long 0x04 9. " DLL_LOCK_TIMEOUT_INTMASK      ,Mask for DLL lock timeout interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "      CCFIFO_OVERFLOW_INTMASK          ,Mask for clock change FIFO overflow" "Masked,Unmasked"
bitfld.long 0x04 7. "       DLL_ALARM_INTMASK            ,Indicate DLL alarm has been set" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 6. "   ACCESS_TO_SR_DPD_DEV_INTMASK  ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
bitfld.long 0x04 5. "      MRR_DIVLD_INTMASK                ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "       CLKCHANGE_COMPLETE_INTMASK   ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                            "
bitfld.long 0x04 3. "   REFRESH_OVERFLOW_INTMASK      ,Mask for refresh request overflow timeout" "Masked,Unmasked"
line.long 0x08 "DBG_0,Debug Register"
bitfld.long 0x08 31. " AUTOCAL_IGNORE_SWAP           ,Registers controlled by autocal FSM do not obey CFG_SWAP setting" "Disabled,Enabled"
bitfld.long 0x08 30. "      WRITE_ACTIVE_ONLY                ,Write active version of the register only" "Disabled,Enabled"
bitfld.long 0x08 29. "       ALLOW_HOSTIF_DURING_CCFIFO   ,Unblock hostif requests for debugging training|DVFS hangs" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 28. "   ALLOW_EMC1_PCMACRO_CFG_ACCESS ,EMC1 config access to be sent to the pad macro" "Disabled,Enabled"
bitfld.long 0x08 26.--27. "      CFG_SWAP                         ,Configuration swap feature enable" "Active only,Swap,Assembly only,?..."
bitfld.long 0x08 25. "  AUTOCAL_ALLOW_WRITE_MUX      ,Registers controlled by autocal FSM obey WRITE_MUX|WRITE_ACTIVE_ONLY settings" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 24. "   CFG_PRIORITY                  ,Priority of cfg accesses to the DRAM" "Disabled,Enabled"
bitfld.long 0x08 13. "      SUPPRESS_WRITE_CMD               ,Suppress write command sent to DRAM" "Disabled,Enabled"
bitfld.long 0x08 12. "       SUPPRESS_READ_CMD            ,Suppress read command sent to DRAM" "Disabled,Enabled"
textline "                            "
bitfld.long 0x08 11. "   STRETCH_MRW_RESET             ,Stretch MRW RESET command to three clocks" "Disabled,Enabled"
bitfld.long 0x08 10. "      AP_REQ_BUSY_CTRL                 ,APC fifo busy signal enable to stall requests to the EMC" "Disabled,Enabled"
bitfld.long 0x08 9. "       READ_DQM_CTRL                ,DQM signal control" "Managed,Always on"
textline "                            "
bitfld.long 0x08 2. "   FORCE_UPDATE                  ,Active state update enable" "Disabled,Enabled"
bitfld.long 0x08 1. "      WRITE_MUX                        ,Controls state of the writes to the configuration registers" "Assembly,Active"
bitfld.long 0x08 0. "       READ_MUX                     ,Controls state of the reads to the configuration registers" "Active,Assembly"
line.long 0x0C "CFG_0,Configuration Register"
bitfld.long 0x0C 31. " DRAM_CLKSTOP_PD               ,DRAM clock stop (power down)" "Disabled,Enabled"
bitfld.long 0x0C 30. "      DRAM_CLKSTOP_SR                  ,DRAM clock stop (self-refresh)" "Disabled,Enabled"
bitfld.long 0x0C 29. "       DRAM_ACPD                    ,Opportunistic active power down for DRAM controller" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 28. "   DYN_SELF_REF                  ,DYN_SELF_REF" "Disabled,Enabled"
bitfld.long 0x0C 26. "      REQACT_ASYNC                     ,Transfers of activates and transactions from the MC to EMC" "Disabled,Enabled"
bitfld.long 0x0C 25. "       AUTO_PRE_WR                  ,MC auto-precharge indication for writes" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 24. "   AUTO_PRE_RD                   ,MC auto-precharge indication for reads" "Disabled,Enabled"
bitfld.long 0x0C 23. "      MAN_PRE_WR                       ,[PMC3] Explicit-precharge in the EMC for writes" "Disabled,Enabled"
bitfld.long 0x0C 22. "       MAN_PRE_RD                   ,[PMC3] Explicit-precharge in the EMC for reads" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 21. "   PERIODIC_QRST                 ,[PMC] Specifies periodic reset FBIO read-data FIFO during normal operation" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. "      WAIT_FOR_NVDISPLAY_READY_B4_CC   ,Wait for display ready event to be asserted before acknowledge clock change" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 18. "   DSR_VTTGEN_DRV_EN             ,Enable VTTGEN controls during DSR" "Disabled,Enabled"
bitfld.long 0x0C 16.--17. "      EMC2MC_CLK_RATIO                 ,EMC to MC clock ratio" "2x,1x,4x,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 9. "             WAIT_FOR_ISP2B_READY_B4_CC   ,Wait for isp2b ready event" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x0C 8. "   WAIT_FOR_VI2_READY_B4_CC      ,Wait for vi2 ready event" "Disabled,Enabled"
bitfld.long 0x0C 7. "      WAIT_FOR_ISP2_B4_CC              ,Wait for isp2 ready event" "Disabled,Enabled"
textline "                            "
bitfld.long 0x0C 6. "   INVERT_DQM                    ,Invert DQM polarity" "Not inverted,Inverted"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 5. "  WAIT_FOR_DISPLAYB_READY_B4_CC    ,Wait for display ready event" "Disabled,Enabled"
bitfld.long 0x0C 4. "       WAIT_FOR_DISPLAY_READY_B4_CC ,Wait for display ready event" "Disabled,Enabled"
endif
line.long 0x10 "ADR_CFG_0,External Memory Address Configuration [System]"
bitfld.long 0x10 0. " EMEM_NUMDEV                   ,Number of populated DRAM devises" "N1,N2"
group.long 0x20++0x07
line.long 0x00 "REFCTRL_0,Refresh Control Register"
bitfld.long 0x00 31. " REF_VALID                     ,Enable refresh controller" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "      DEVICE_REFRESH_DISABLE           ,Refresh disable to individual attached device" "0,1,2,3"
line.long 0x04 "PIN_0,Controls State Of Selected DRAM Pins"
bitfld.long 0x04 17. " PIN_GPIO_EN[1]                ,General purpose DRAM I/O[1] enable" "Disabled,Enabled"
bitfld.long 0x04 16. "      PIN_GPIO_EN[0]                   ,General purpose DRAM I/O[0] enable" "Disabled,Enabled"
bitfld.long 0x04 13. "       PIN_GPIO[1]                  ,General purpose DRAM I/O[1] activate" "Inactive,Active"
textline "                            "
bitfld.long 0x04 12. "   PIN_GPIO[0]                   ,General purpose DRAM I/O[0] activate" "Inactive,Active"
bitfld.long 0x04 8. "      PIN_RESET                        ,DDR3 RESET# pin level" "Active,Inactive"
bitfld.long 0x04 4. "       PIN_DQM                      ,Used to always mask DRAM writes" "Normal,Inactive"
textline "                            "
bitfld.long 0x04 2. "   PIN_CKE_PER_DEV               ,Per device CKE enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      PIN_CKEB                         ,Level of the CKEB pin" "Power down,Normal"
bitfld.long 0x04 0. "     PIN_CKE                      ,Level of the CKE pin" "Power down,Normal"
textline "                            "
group.long 0x28++0x93
line.long 0x00 "TIMING_CONTROL_0,Triggers An Update Of The Timing-related Registers"
bitfld.long 0x00 0. " TIMING_UPDATE             ,Timing update event" "Disabled,Enabled"
line.long 0x04 "RC_0,DRAM RC Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RC                        ,Row cycle time"
line.long 0x08 "RFC_0,DRAM RFC Timing Parameter"
hexmask.long.word 0x08 0.--9. 1. " RFC                       ,Auto refresh cycle time"
line.long 0x0C "RAS_0,DRAM RAS Timing Parameter"
bitfld.long 0x0C 0.--5. " RAS                       ,Row active time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "RP_0,DRAM RP Timing Parameter"
bitfld.long 0x10 0.--5. " RP                        ,Row precharge time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "R2W_0,DRAM R2W Timing Parameter"
bitfld.long 0x14 0.--5. " R2W                       ,Read to write commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "W2R_0,DRAM W2R Timing Parameter"
bitfld.long 0x18 0.--5. " W2R                       ,Write to read commands number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "R2P_0,DRAM R2P Timing Parameter"
bitfld.long 0x1C 0.--5. " R2P                       ,Read to precharge commands for the same bank number of cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x20 "W2P_0,DRAM W2P Timing Parameter"
hexmask.long.byte 0x20 0.--6. 1. " W2P                       ,Write to precharge commands for the same bank number of cycles"
line.long 0x24 "RD_RCD_0,DRAM RD_RCD Timing Parameter"
bitfld.long 0x24 0.--5. " RD_RCD                    ,RAS to CAS delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x28 "WR_RCD_0,DRAM WR_RCD Timing Parameter"
bitfld.long 0x28 0.--5. " WR_RCD                    ,Minimum number of cycles between activate and write commands to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x2C "RRD_0,DRAM RRD Timing Parameter"
bitfld.long 0x2C 0.--4. " RRD                       ,Bank X Act to Bank Y Act command delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x30 "REXT_0,DRAM REXT Timing Parameter"
bitfld.long 0x30 0.--4. " REXT                      ,Read to read delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x34 "WDV_0,DRAM WDV Timing Parameter"
bitfld.long 0x34 0.--5. " WDV                       ,Write data assertion to the rams delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,Max,?..."
line.long 0x38 "QUSE_0,DRAM QUSE Timing Parameter"
bitfld.long 0x38 0.--5. " QUSE                      ,Tells the chip when to look for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "QRST_0,DRAM QRST Timing Parameter"
bitfld.long 0x3C 16.--20. " QRST_DURATION             ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x3C 0.--6. 1. "      QRST                   ,Time from expiration of QSAFE until reset is issued"
line.long 0x40 "QSAFE_0,DRAM QSAFE Timing Parameter"
hexmask.long.byte 0x40 0.--6. 1. " QSAFE                     ,Time from a read command to when it is safe to issue a QRST"
line.long 0x44 "RDV_0,DRAM RDV Timing Parameter"
hexmask.long.byte 0x44 0.--6. 1. " RDV                       ,Time from read command to latching the read data from the pad macros"
line.long 0x48 "REFRESH_0,DRAM REFRESH Timing Parameter"
hexmask.long.word 0x48 6.--15. 1. " REFRESH                   ,Interval between refresh requests"
bitfld.long 0x48 0.--5. "           REFRESH_LO             ,REFRESH_LO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x4C "BURST_REFRESH_NUM,Refresh Burst Count"
bitfld.long 0x4C 0.--3. " BURST_REFRESH_NUM         ,Refresh burst count" "BR1,BR2,BR4,BR8,BR16,BR32,BR64,BR128,BR256,BR512,?..."
line.long 0x50 "PDEX2WR_0,DRAM PDEX2WR Timing Parameter"
bitfld.long 0x50 0.--5. " PDEX2WR                   ,Timing delay from exit of power down mode to a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x54 "PDEX2RD_0,DRAM PREX2RD Timing Parameter"
bitfld.long 0x54 0.--5. " PDEX2RD                   ,Timing delay from exit of power down mode to a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x58 "PCHG2PDEN_0,DRAM PCHG2PDEN Timing Parameter"
bitfld.long 0x58 0.--5. " PCHG2PDEN                 ,Timing delay from a precharge command to power down" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "ACT2PDEN_0,DRAM ACT2PDEN Timing Parameter"
bitfld.long 0x5C 0.--5. " ACT2PDEN                  ,Timing delay from an activate MRS or EMRS command to power down entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x60 "AR2PDEN_0,DRAM AR2PDEN Timing Parameter"
hexmask.long.word 0x60 0.--8. 1. " AR2PDEN                   ,Timing delay from an autorefresh command to power down entry"
line.long 0x64 "RW2PDEN_0,DRAM RW2PDEN Timing Parameter"
hexmask.long.byte 0x64 0.--6. 1. " RW2PDEN                   ,Timing delay from a read/write command to power down entry"
line.long 0x68 "TXSR_0,DRAM TXSR Timing Parameter"
hexmask.long.word 0x68 0.--9. 1. " TXSR                      ,Cycles between self-refresh exit & first DRAM command that doesn't require a locked DLL"
line.long 0x6C "TCKE_0,DRAM TCKE Timing Parameter"
bitfld.long 0x6C 0.--5. " TCKE                      ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x70 "TFAW_0,DRAM TFAW Timing Parameter"
hexmask.long.byte 0x70 0.--6. 1. " TFAW                      ,Width of the FAW for 8-bank devices"
line.long 0x74 "TRPAB_0,DRAM TRPAB Timing Parameter"
bitfld.long 0x74 0.--5. " TRPAB                     ,Precharge-all tRP allowance for 8-bank devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x78 "TCLKSTABLE_0,DRAM TCLKSTABLE Timing Parameter"
hexmask.long.byte 0x78 0.--6. 1. " TCLKSTABLE                ,Minimum number of cycles of a stable clock period"
line.long 0x7C "TCLKSTOP_0,DRAM TCLKSTOP Timing Parameter"
bitfld.long 0x7C 0.--4. " TCLKSTOP                  ,Delay from last command to stopping the external clock to DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x80 "TREFBW_0,DRAM TREFBW Timing Parameter"
hexmask.long.word 0x80 0.--13. 1. " TREFBW                    ,Width of the burst-refresh window"
line.long 0x84 "TPPD_0,DRAM TPPD Timing Parameter"
bitfld.long 0x84 0.--3. " TPPD                      ,Precharge-precharge delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x88 "ODT_WRITE_0,ODT Write Control"
bitfld.long 0x88 31. " ENABLE_ODT_DURING_WRITE   ,ODT enable during write" "Disabled,Enabled"
bitfld.long 0x88 8.--11. "       ODT_WR_DURATION        ,Indicate how long to assert ODT by" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x88 5. "        SHARE_ONE_ODT                        ,Share one ODT" "Disabled,Enabled"
textline "                            "
bitfld.long 0x88 4. "   DRIVE_BOTH_ODT            ,ODTs' assertion for the requested or both devices" "Requested,Both"
bitfld.long 0x88 0.--3. "      ODT_WR_DELAY           ,ODT write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x8C "PDEX2MRR_0,DRAM PDEX2MRR Timing Parameter"
hexmask.long.byte 0x8C 0.--6. 1. " PDEX2MRR                  ,Precharge-precharge delay"
line.long 0x90 "WEXT_0,DRAM WEXT Timing Parameter"
bitfld.long 0x90 0.--4. " WEXT                      ,Write to write delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0xBC++0x03
line.long 0x00 "TRTM_0,TRTM Timing Parameter"
hexmask.long.byte 0x00 0.--6. 1. " TRTM                      ,Read to MRW delay"
group.long 0xF8++0x07
line.long 0x00 "TWTM_0,TWTM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWTM                      ,Read to MRW/MRR delay"
line.long 0x04 "TRATM_0,TRATM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TRATM                     ,Read with AP to MRW/MRR delay"
group.long 0x108++0x07
line.long 0x00 "TWATM_0,TWATM DRAM timing parameter"
hexmask.long.byte 0x00 0.--6. 1. " TWATM                     ,Read with AP to MRW/MRR delay"
line.long 0x04 "TR2REF_0,TR2REF DRAM timing parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR2REF                    ,Read to refresh delay"
endif
group.long 0xC0++0x03
line.long 0x00 "RFC_SLR_0,DRAM RFC_SLR Timing Parameter"
hexmask.long.word 0x00 0.--8. 1. " RFS_SLR                   ,Stagger refresh cycle time between ranks"
group.long 0xC4++0x1B
line.long 0x00 "MRS_WAIT_CNT2_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x00 16.--25. 1. " MRS_EXT2_WAIT_CNT         ,Number of EMC clocks to wait before issuing any commands after sending MRS ext2 command"
hexmask.long.word 0x00 0.--9. 1. "           MRS_EXT1_WAIT_CNT      ,Number of EMC clocks to wait before issuing any commands after sending MRS ext1 command"
line.long 0x04 "MRS_WAIT_CNT_0,Delay Between A MRS And The Following DRAM Commands"
hexmask.long.word 0x04 16.--26. 1. " MRS_LONG_WAIT_CNT         ,Number of EMC clocks to wait [MRS long command]"
hexmask.long.word 0x04 0.--9. 1. "           MRS_SHORT_WAIT_CNT     ,Number of EMC clocks to wait [MRS short command]"
line.long 0x08 "MRS_0,Command Trigger For MRS"
bitfld.long 0x08 30.--31. " MRS_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "   USE_MRS_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   MRS_BA                    ,Registers to be addressed in DRAM" "MRS,?..."
hexmask.long.word 0x08 0.--13. 1. "            MRS_ADR                ,Mode-register data to be written"
line.long 0x0C "EMRS_0,Command Trigger For EMRS"
bitfld.long 0x0C 30.--31. " EMRS_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "   USE_EMRS_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS_BA                   ,Registers to be addressed in DRAM" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS_ADR               ,Mode-register data to be written"
line.long 0x10 "REF_0,Command Trigger For Refresh"
bitfld.long 0x10 30.--31. " REF_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
hexmask.long.word 0x10 8.--18. 1. "   REF_NUM                ,Number of refresh cycles (REF_NUM+1)"
textline "                            "
bitfld.long 0x10 1. "   REF_NORMAL                ,Refresh execution mechanism" "Immediate,Normal"
bitfld.long 0x10 0. "      REF_CMD                ,Refresh to all DRAM banks" "Disabled,Enabled"
line.long 0x14 "PRE_0,Command Trigger For PRECHARGE-ALL"
bitfld.long 0x14 30.--31. " PRE_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x14 0. "   PRE_CMD                ,PRECHARGE to all DRAM banks" "Disabled,Enabled"
line.long 0x18 "NOP_0,Command Trigger For NOP"
bitfld.long 0x18 30.--31. " NOP_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x18 0. "   NOP_CMD                ,NOP to all DRAM banks" "Disabled,Enabled"
if ((per.l(ad:0x02CA0000+0xE0)&0x1)==0x1)
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 8. "   ACTIVE_SELF_REF        ,State of CKE pin while SELF_REF_CMD == ENABLE" "Low,High"
bitfld.long 0x00 0. "      SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
else
group.long 0xE0++0x03
line.long 0x00 "SELF_REF_0,Command Trigger For Self Refresh"
bitfld.long 0x00 30.--31. " SREF_DEV_SELECTN          ,Active low chip-select" "Both devices,Dev1,Dev0,None"
bitfld.long 0x00 0. "                                    SREF_REF_CMD                         ,Issue a SELF_REFRESH command" "Disabled,Enabled"
endif
group.long 0xE4++0x13
line.long 0x00 "DPD_0,Command Trigger For DPD"
bitfld.long 0x00 30.--31. " DPD_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x00 0. "   DPD_CMD                ,Issue a deep power down command" "Disabled,Enabled"
line.long 0x04 "MRW_0,Command Trigger For MRW"
bitfld.long 0x04 30.--31. " MRW_DEV_SELECTN           ,Active low chip-select" "Both devices,Dev1,Dev0,?..."
bitfld.long 0x04 26.--27. "   USE_MRW_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x04 16.--23. 0x01 "   MRW_MA                    ,Register address"
hexmask.long.byte 0x04 0.--7. 1. "             MRW_OP                 ,Data to be written"
line.long 0x08 "MRR_0,Command Trigger For MRR"
bitfld.long 0x08 30.--31. " MRR_DEV_SELECTN           ,Active-low chip-select" "Illegal,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "        USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x08 16.--23. 0x01 "   MRR_MA                    ,Register address"
hexmask.long.word 0x08 0.--15. 1. "             MRR_OP                 ,Data returned"
line.long 0x0C "CMDQ_0,Command QUEUE Depth Register"
bitfld.long 0x0C 24.--28. " RW_WD_DEPTH               ,RW WD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 12.--14. "             PRE_DEPTH              ,Pre depth" "0,1,2,3,4,5,6,7"
textline "                            "
bitfld.long 0x0C 8.--10. "   ACT_DEPTH                 ,Act depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--4. "              RW_DEPTH               ,RW depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "MC2EMCQ_0,Command Queue Depth Register"
bitfld.long 0x10 24.--27. " MCWD_DEPTH                ,MCWD depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--10. "             MCACT_DEPTH            ,MCACT depth" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "         MCREQ_DEPTH                          ,MCREQ depth" "0,1,2,3,4,5,6,7"
group.long 0x100++0x07
line.long 0x00 "FBIO_SPARE_0,FBIO Spare Register"
hexmask.long.byte 0x00 24.--31. 1. " CFG_FBIO_SPARE_3          ,Config FBIO spare 3"
hexmask.long.byte 0x00 16.--23. 1. "             CFG_FBIO_SPARE_2       ,Config FBIO spare 2"
hexmask.long.byte 0x00 8.--15. 1. "        CFG_FBIO_SPARE_1                     ,Config FBIO spare 1"
textline "                            "
hexmask.long.byte 0x00 2.--7. 1. "   CFG_FBIO_SPARE_0          ,Config FBIO spare 0"
bitfld.long 0x00 1. "             CFG_ADR_EN             ,Write once after powering up EMC" "Disabled,Enabled"
bitfld.long 0x00 0. "  CFG_SWAP_DLL                         ,Config swap DLL" "0,1"
line.long 0x04 "FBIO_CFG5_0,FBIO Configuration Register"
bitfld.long 0x04 31. " DATA_BUS_RETURN_TO_ZERO   ,Drive data bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 30. "       DATA_BUS_RETURN_TO_ONE ,Drive data bus back to one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 28. "  MASK_PUTERM_N_DQS_PULLD_DURING_ZQCAL ,Deassert DQ/DQS" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. "   CMD_BUS_RETURN_TO_ZERO    ,Drive command bus back to zero as resting stage" "Disabled,Enabled"
bitfld.long 0x04 26. "       CMD_BUS_RETURN_TO_ONE  ,Drives the command bus back to a one as resting stage" "Disabled,Enabled"
bitfld.long 0x04 25. "  LPDDR3_DRAM                          ,Enables differentiation between LPDDR3 DRAM protocol" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 24. "   LPDDR3_WR_PREAMBLE_TOGGLE ,Enable LPDDR3 write preamble toggle" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "       ERR_RD_BUBBLE          ,Number of bubbles to be inserted in CMDQ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x04 13.--15. "   EMC2PMACRO_CFG_QUSE_MODE  ,QUSE mode select" "Normal,Always on,Internal LPBK,Pulse INT,,Direct QUSE,?..."
bitfld.long 0x04 12. "  CMD_2T_TIMING          ,2T command timing" "Disabled,Enabled"
bitfld.long 0x04 10. "  DISABLE_CONCURRENT_AUTOPRE           ,Disable reads/writes to a device until precharge command" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 8. "   CMD_TX_EN                 ,Controls TX_EN on the command bricks" "No,Yes"
bitfld.long 0x04 4. "            DRAM_                  ,DRAM width" "X32,X64"
bitfld.long 0x04 2.--3. "       DRAM_BURST                           ,Burst length to use for the attached device" "BURST4,BURST8,,BURST16"
textline "                            "
bitfld.long 0x04 0.--1. "   DRAM_TYPE                 ,DRAM protocol select for the attached device" "DDR3,LPDDR4,LPDDR2,DDR2"
sif (cpuis("TEGRAX2"))
group.long 0x110++0x07
line.long 0x00 "ACT_0,Command Trigger: Act"
bitfld.long 0x00 30.--31. " SW_ACT_DEV_SELECTN        ,Active low chip-select" "0,1,2,3"
bitfld.long 0x00 23.--25. "              SW_ACT_BANK            ,Bank to which the act command needs to be issue" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 0.--15. 1. "         SW_ACT_ROW                           ,Row number to be activated"
line.long 0x04 "MEM_INIT_DONE_0,DRAM initiation done"
bitfld.long 0x04 0. " MEM_INIT_DONE             ,This bit is set by boot sequence when DRAM initiation is done" "0,1"
endif
group.long 0x114++0x0B
line.long 0x00 "FBIO_CFG6_0,FBIO Configuration Register"
bitfld.long 0x00 0.--2. " CFG_QUSE_LATE             ,FBIO configuration register" "0,1,2,3,4,5,6,7"
line.long 0x04 "PDEX2CKE_0,DRAM PDEX2CKE Timing Parameter"
bitfld.long 0x04 0.--5. " PDEX2CKE                  ,Timing delay from exit of powerdown mode to turning on CKE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "CKE2PDEN_0,DRAM CKE2PDEN Timing Parameter"
bitfld.long 0x08 0.--5. " CKE2PDEN                  ,Timing delay from turning off CKE to powerdown entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hgroup.long 0x120++0x03
hide.long 0x00 "CFG_RSV_0,EMC Configuration Reserved"
group.long 0x124++0x1F
line.long 0x00 "ACPD_CONTROL_0,Threshold For ACPD"
hexmask.long.word 0x00 0.--15. 1. " ACPD_THRESHOLD            ,Number of idle cycles to wait before allowing power-down entry"
line.long 0x04 "MPC_0,MPC CMD (LP4 Only)"
bitfld.long 0x04 30.--31. " MPC_DEV                   ,SELECTN" "0,1,2,3"
bitfld.long 0x04 26.--27. "              MPC_SUBP_SELECTN       ,Active-low subchannel select" "Both,Subp1,Subp0,?..."
bitfld.long 0x04 9. "     MPC_WR                               ,Send CAS2 (required for FIFO WR)" "Not send,Send"
textline "                            "
bitfld.long 0x04 8. "   MPC_RD                    ,Send CAS2 (required for FIFO RD and DQ_CAL RD" "Not send,Send"
bitfld.long 0x04 7. "       MPC_CAS2               ,Send CAS2 (required for FIFO RD|WR and DQ_CAL RD)" "Not send,Send"
hexmask.long.byte 0x04 0.--6. 1. "  MPC_OP                               ,MPC OP code"
line.long 0x08 "EMRS2_0,EMRS2 Command Trigger"
bitfld.long 0x08 30.--31. " EMRS2_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x08 26.--27. "           USE_EMRS2_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x08 20.--21. "   EMRS2_BA                  ,EMRS2 BA" ",EMRS,EMRS2,EMRS3"
hexmask.long.word 0x08 0.--13. 1. "          EMRS2_ADR              ,Mode register data to be written"
line.long 0x0C "EMRS3_0,EMRS3 Command Trigger"
bitfld.long 0x0C 30.--31. " EMRS3_DEV_SELECTN         ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x0C 26.--27. "           USE_EMRS3_CNT          ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
bitfld.long 0x0C 20.--21. "   EMRS3_BA                  ,EMRS3 BA" ",Emrs1,Emrs2,Emrs3"
hexmask.long.word 0x0C 0.--13. 1. "          EMRS3_ADR              ,Mode register data to be written"
line.long 0x10 "MRW2_0,MRW2 Command Trigger"
bitfld.long 0x10 30.--31. " MRW2_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x10 26.--27. "           USE_MRW2_CNT           ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x10 16.--23. 0x01 "   MRW2_MA                   ,Register address"
hexmask.long.byte 0x10 0.--7. 1. "             MRW2_OP                ,Data to be written"
line.long 0x14 "MRW3_0,MRW3 Command Trigger"
bitfld.long 0x14 30.--31. " MRW3_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev2,?..."
bitfld.long 0x14 26.--27. "           USE_MRR_CNT            ,Which MRS wait count will be used" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x14 16.--23. 0x01 "   MRW3_MA                   ,Register address"
hexmask.long.byte 0x14 0.--7. 1. "             MRW3_OP                ,Data to be written"
line.long 0x18 "MRW4_0,MRW4 Command Trigger"
bitfld.long 0x18 30.--31. " MRW4_DEV_SELECTN          ,Active low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x18 26.--27. "           USE_MRR_CNT            ,MRS wait count" "Short,Long,Ext1,Ext2"
textline "                            "
hexmask.long.byte 0x18 16.--23. 0x01 "   MRW4_MA                   ,Register address"
hexmask.long.byte 0x18 0.--7. 1. "             MRW4_OP                ,Data to be written"
line.long 0x1C "CLKEN_OVERRIDE_0,Second Level Clock Enable Override Register"
bitfld.long 0x1C 31. " OBS_BUS_CLKEN             ,OBS bus clock enable" "Disabled,Enabled"
bitfld.long 0x1C 8. "       PAD_CONFIG_OVR         ,Pad config override" "Disabled,Enabled"
bitfld.long 0x1C 7. "  TR_CLKEN_OVR                         ,TR clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 6. "   STATS_CLKEN_OVR           ,Stats clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 3. "       RR_CLKEN_OVR           ,RR clock enable override" "Disabled,Enabled"
bitfld.long 0x1C 2. "  DRAMC_CLKEN_OVR                      ,DRAMC clock enable override" "Disabled,Enabled"
textline "                            "
bitfld.long 0x1C 1. "   CMDQ_CLKEN_OVR            ,CMDQ clock enable override" "Disabled,Enabled"
group.long 0x144++0x1B
line.long 0x00 "R2R_0,R2R_0 Timing Parameter"
bitfld.long 0x00 0.--3. " R2R                       ,R2R" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "W2W_0 ,W2W_0 Timing Parameter"
bitfld.long 0x04 0.--3. " W2W                       ,W2W" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "EINPUT_0,EINPUT_0 Timing Parameter"
bitfld.long 0x08 0.--5. " EINPUT                    ,Specifies when to assert EINPUT for a read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "EINPUT_DURATION_0,EINPUT_DURATION_0 Timing Parameter"
bitfld.long 0x0C 0.--5. " EINPUT_DURATION           ,Specifies how long the EINPUT should be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "PUTERM_EXTRA_0,PUTERM EXTRA 0 Timing Parameter"
bitfld.long 0x10 0.--5. " RXTERM                    ,Specifies when to assert dynamic PUTERM for read return data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "TCKESR_0,TCKESR_0 Timing Parameter"
bitfld.long 0x14 0.--5. " TCKESR                    ,Specifies minimum low CKE pulse or self-refresh mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "TPD_0,TPD_0 Timing Parameter"
bitfld.long 0x18 0.--5. " TPD                       ,Specifies minimum low CKE pulse or power-down mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline " "
width 23.
group.long 0x2A4++0x07
line.long 0x00 "AUTO_CAL_CONFIG_0,Auto-calibration Settings For EMC Pads"
rbitfld.long 0x00 31. " AUTO_CAL_START                             ,Starts a complete autocal cycle with measure FSM" "Not started,Started"
bitfld.long 0x00 30. "            AUTO_CAL_COMP_PAD_FLIP                     ,Flips the COMP pad slices used for pull-up and pull-down calibration" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE                            ,Specifies whether to use EMC autocal-generated pull-up|pull-down calibration codes or EMC padmacro register settings for drive|termination strength" "Disabled,Enabled"
bitfld.long 0x00 25.--28. "               AUTO_CAL_NUM_SAMPLES                       ,Number of samples to take for the majority test" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 24. " AUTO_CAL_CHECK_LOCK                        ,Whenever COMP pad indicates a lock take multiple samples and latch calibration code" "Disabled,Enabled"
bitfld.long 0x00 19.--23. "               AUTO_CAL_WAIT_AFTER_EN                     ,Wait time between enabling COMP pad and changing TX_DRVUP|TX_DRVDN test calibration codes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                              ,Autocal measure step interval" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 11.--15. "                      AUTO_CAL_UPDATE_DELAY                      ,Number of EMC clocks to wait before autocal transfer TSM triggers an update FSM cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                "
bitfld.long 0x00 10. " AUTO_CAL_UPDATE_STALL                      ,Autocal update FSM exits any ongoing update cycle and goes to idle state" "Disabled,Enabled"
bitfld.long 0x00 9. "               AUTO_CAL_MEASURE_STALL                     ,Autocal measure FSM exits any ongoing VREF cycle and goes to idle state" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 8. " AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 7. "               AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 6. " AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 5. "               AUTO_CAL_PD_VREF2_EN                       ,Enables Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_PD_VREF1_EN                       ,Enables Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
bitfld.long 0x00 3. "               AUTO_CAL_PD_VREF0_EN                       ,Enables Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 2. " AUTO_CAL_UPDATE_START                      ,Triggers an autocal update FSM cycle" "Disabled,Enabled"
rbitfld.long 0x00 1. "               AUTO_CAL_TRANSFER_START                    ,Triggers an autocal transfer FSM cycle" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 0. " AUTO_CAL_COMPUTE_START                     ,Triggers an autocal compute FSM cycle" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_INTERVAL_0,EMC Pad Calibration Interval"
hexmask.long.tbyte 0x04 0.--20. 1. " AUTO_CAL_INTERVAL                          ,Calibration interval value"
rgroup.long 0x2AC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,Auto-calibration Master Status Register"
bitfld.long 0x00 24.--29. " AUTO_CAL_VREF0_DRVDN                       ,Pull-down code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                     AUTO_CAL_VREF0_DRVUP                       ,Pull-up code from VREF0 measure cycle" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 9. " AUTO_CAL_PD_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-down calibration" "0,1"
bitfld.long 0x00 8. "                      AUTO_CAL_PU_CAL_ZI                         ,RX_D pin of COMP pad slice used for pull-up calibration" "0,1"
textline "                                "
bitfld.long 0x00 4. " AUTO_CAL_ACTIVE                            ,Autocal activity status" "Inactive,Active"
bitfld.long 0x00 3. "               AUTO_CAL_UPDATE_ACTIVE                     ,Autocal update activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 2. " AUTO_CAL_TRANSFER_ACTIVE                   ,Autocal transfer activity status" "Inactive,Active"
bitfld.long 0x00 1. "               AUTO_CAL_COMPUTE_ACTIVE                    ,Autocal compute activity status" "Inactive,Active"
textline "                                "
bitfld.long 0x00 0. " AUTO_CAL_MEASURE_ACTIVE                    ,Autocal measure activity status" "Inactive,Active"
sif (cpuis("TEGRAX2"))
endif
group.long 0x2B0++0x03
line.long 0x00 "REQ_CTRL_0,Request Status/Control"
bitfld.long 0x00 1. " STALL_ALL_WRITES                           ,Stall incoming write transactions" "Allow,Stall"
bitfld.long 0x00 0. "                  STALL_ALL_READS                            ,Stall incoming read transactions" "Allow,Stall"
rgroup.long 0x2B4++0x03
line.long 0x00 "EMC_STATUS_0,EMC State-Machine Status"
bitfld.long 0x00 27. " ACPD_FSM_IDLE[1]                           ,Device[1] power-down FSM is idle" "No,Yes"
bitfld.long 0x00 26. "                    ACPD_FSM_IDLE[0]                           ,Device[0] power-down FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 25. " DSR_FSM_IDLE[1]                            ,Device[1] dynamic self refresh FSM is idle" "No,Yes"
bitfld.long 0x00 24. "                    DSR_FSM_IDLE[0]                            ,Device[0] dynamic self refresh FSM is idle" "No,Yes"
textline "                                "
bitfld.long 0x00 23. " TIMING_UPDATE_STALLED                      ,Indicates whether timing update triggered by TIMING_CONTROL.TIMING_UPDATE is completed" "Completed,Not completed"
bitfld.long 0x00 22. "          ZQ_FSM_IDLE                                ,Indicate auto ZQ state machine is idle" "Not idle,Idle"
textline "                                "
bitfld.long 0x00 21. " CFG_ZQ_ACTIVE                              ,Indicates ZQ configuration access is active" "Not active,Active"
bitfld.long 0x00 20. "             MRR_DIVLD                                  ,MRR data available for reading" "Not available,Available"
textline "                                "
bitfld.long 0x00 16.--19. " MRR_FIFO_SPACE                             ,MRR FIFO space available" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 13. "                     DRAM_IN_DPD_DEV[1]                         ,Device[1] in deep powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 12. " DRAM_IN_DPD_DEV[0]                         ,Device[0] in deep powerdown state" "No,Yes"
bitfld.long 0x00 11. "                    DRAM_IN_ACTIVE_SELF_REFRESH[1]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 10. " DRAM_IN_ACTIVE_SELF_REFRESH[0]             ,Device[n] has been put into ACTIVE self-refresh" "No,Yes"
bitfld.long 0x00 9. "                    DRAM_IN_SELF_REFRESH_DEV[1]                ,Device[1] in active self-refresh" "No,Yes"
textline "                                "
bitfld.long 0x00 8. " DRAM_IN_SELF_REFRESH_DEV[0]                ,Device[0] in active self-refresh" "No,Yes"
bitfld.long 0x00 5. "                    DRAM_IN_POWERDOWN_DEV[1]                   ,Device[1] in powerdown state" "No,Yes"
textline "                                "
bitfld.long 0x00 4. " DRAM_IN_POWERDOWN_DEV[0]                   ,Device[0] in powerdown state" "No,Yes"
bitfld.long 0x00 2. "                    NO_OUTSTANDING_TRANSACTIONS                ,All non-stalled requests complete status" "Not completed,Completed"
textline "                                "
bitfld.long 0x00 0. " EMC_REQ_FIFO_EMPTY                         ,Request FIFO is empty" "Not empty,Empty"
group.long 0x2B8++0x03
line.long 0x00 "CFG_2_0,EMC Configuration"
bitfld.long 0x00 31. " DRAMC_PRE_B4_ACT                           ,Gives priority to activates" "Disabled,Enabled"
bitfld.long 0x00 30. "               IGNORE_MC_A_BUS                            ,Ignore the MC *_A_* bus" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 29. " CLR_ACT_BANK_INUSE_WHEN_BANK_CLOSE         ,Close|unlock ACTFIFO bank in use bit when the bank is closed" "Disabled,Enabled"
bitfld.long 0x00 28. "               DONT_CLR_TIMING_COUNTER_WHEN_CLKCHANGE     ,Don't clear timing counters when clock change happen" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 26.--27. " DRAMC_WD_CHK_POLICY                        ,Specifies when there is no need for checking RWAQ_WD FIFO quantity" "WDV >= WDV_CHK_BASE,WDV >= WDV_CHK_BASE+1,WDV => WDV_CHK_BASE+2,Always check"
bitfld.long 0x00 25. "  ALLOW_REF_DURING_CC_PRE_EXE                ,Allow refresh to happen during clock change pre-execute phase" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 24. " DSR_STUTTER_ENABLE                         ,Enables DSR stutter mode|protocol between MC and EMC" "Disabled,Enabled"
bitfld.long 0x00 23. "               CHK_PDEX2RD_TO_START_WR                    ,Specifies what to check when starting write" "PDEX2RD,PDEX2WR"
textline "                                "
bitfld.long 0x00 22. " ISSUE_PCHGALL_AFTER_REF                    ,Always generate precharge all bank after refresh" "Disabled,Enabled"
bitfld.long 0x00 20. "               COMBINED_INTERRUPT_MODE                    ,Interrupt mode" "Combined,Independent"
textline "                                "
bitfld.long 0x00 16. " CLKCHANGE_ACTIVE_SR                        ,Execute frequency change when DRAM is in active SELF-REF state" "Disabled,Enabled"
bitfld.long 0x00 11. "               DIS_CNTR_WITH_CFG_TIMING_UPDATE            ,Disable|enable reset of timing parameter counters with TIMING_CONTROL.TIMING_UPDATE" "Enabled,Disabled"
textline "                                "
bitfld.long 0x00 7. " EARLY_TRFC_8_CLK                           ,Early TRFC" "16 clocks,8 clocks"
bitfld.long 0x00 3.--5. "              ZQ_EXTRA_DELAY                             ,Additional delay to push out ZQCMD" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x00 2. " REF_AFTER_SREF                             ,Enables trigger of refresh after exiting self-refresh" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLKCHANGE_PD_ENABLE                        ,Force DRAM into power-down during CLKCHANGE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0. " CLKCHANGE_REQ_ENABLE                       ,Allows EMC and CAR to handshake on PLL divider|source changes" "Disabled,Enabled"
group.long 0x2BC++0x03
line.long 0x00 "CFG_DIG_DLL_0,Configure Digital DLL"
rbitfld.long 0x00 31. " CFG_DLL_USE_OVERRIDE_UNTIL_LOCK            ,Override_val in use" "No,Yes"
rbitfld.long 0x00 30. "                    DLL_RESET                                  ,Reset pulse sent to DLL's on next shadow update" "No,Yes"
textline "                                "
bitfld.long 0x00 27. " CFG_DLL_ALARM_DISABLE                      ,Disable override of DLL logic" "Disabled,Enabled"
rbitfld.long 0x00 26. "               CFG_DLL_UPDATE_AT_NXT_REFRESH              ,Cause the DLCELL update to occur at the next refresh interval" "No,Yes"
textline "                                "
hexmask.long.word 0x00 16.--25. 1. " CFG_DLL_OVERRIDE_VAL                       ,Value to use in place of DLI output"
bitfld.long 0x00 15. "                   CFG_DLL_TESTEN                             ,Enable DLL test mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14. " CFG_DLL_QUSE_TESTOUT                       ,Enable DLL TESTOUT on QUSE pads" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               CFG_DLL_TESTSEL                            ,Select DLL test output" "0,1,2,3"
textline "                                "
bitfld.long 0x00 8.--10. " CFG_DLL_UDSET                              ,Amount of time after DLL will be treated as locked" "16us,64us,12us,512us,1,?..."
bitfld.long 0x00 6.--7. "                  CFG_DLL_MODE                               ,Controls how frequently DLL runs" "Continuously,Till lock,Periodically,Pre clock"
textline "                                "
bitfld.long 0x00 5. " CFG_DLL_LOWSPEED                           ,Enable DLL for use with low-speed EMCCLK operation" "Disabled,Enabled"
rbitfld.long 0x00 4. "               CFG_DLL_STALL_RW_UNTIL_LOCK                ,Stall all RW traffic until DLL locks by EMC" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " CFG_DLL_STALL_ALL_TRAFFIC                  ,Enable stalling of all DRAM traffic" "Disabled,Enabled"
bitfld.long 0x00 2. "               CFG_DLL_OVERRIDE_EN                        ,Override DLL's DLI output with OVERRIDE_VAL" "Disabled,Enabled"
textline "                                "
rbitfld.long 0x00 1. " CFG_DLL_STALL_ALL_UNTIL_LOCK               ,Stall all traffic until DLL locks" "Disabled,Enabled"
bitfld.long 0x00 0. "               CFG_DLL_EN                                 ,Enable digital DLL" "Disabled,Enabled"
if ((per.l(ad:0x02CA0000+0x2BC)&0xC0)==0x80)
group.long 0x2C0++0x03
line.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
hexmask.long.word 0x00 0.--15. 1. " CFG_DLL_RUN_PERIOD                         ,Interval between runs in uSec"
else
hgroup.long 0x2C0++0x03
hide.long 0x00 "CFG_DIG_DLL_PERIOD_0,Interval Between Runs"
endif
rgroup.long 0x2C4++0x03
line.long 0x00 "DIG_DLL_STATUS_0,Digital DLL Status"
bitfld.long 0x00 18. " DLL_ALARM_MIN                              ,DLL alarm MIN status" "No alarm,Alarm"
bitfld.long 0x00 17. "               DLL_PRIV_UPDATED                           ,DLL private update status" "Not updated,Updated"
textline "                                "
bitfld.long 0x00 16. " DLLCAL_IN_PROGRESS                         ,DLL calibration in-progress status" "Done,In progress"
bitfld.long 0x00 15. "            DLL_LOCK                                   ,DLL lock status" "Not locked,Locked"
textline "                                "
bitfld.long 0x00 14. " DLL_ALARM                                  ,DLL alarm status" "No alarm,Alarm"
bitfld.long 0x00 13. "               DLL_LOCK_TIMEOUT                           ,DLL lock timeout status" "No timeout,Timeout"
textline "                                "
hexmask.long.word 0x00 0.--10. 1. " DLL_OUT                                    ,DLL_OUT"
group.long 0x2C8++0x13
line.long 0x00 "CFG_DIG_DLL_1_0,Digital DLL Configuration"
bitfld.long 0x00 12.--15. " CFG_DLL_WAIT_BEFORE_UPDATE                 ,Number of clocks to stall before DLL update sent to pad macros" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--11. "                     DLL_NUM_STALL_CYCLES                       ,Number of clocks to stall after DLL update sent to pad macros" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
bitfld.long 0x00 1.--5. " CFG_DLL_UPDATE_TIMEOUT                     ,Timeout if waiting for idle|refresh" "No timeout,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "             CFG_DLL_UPDATE_IDLE                        ,Update dig DLL during idle" "Disabled,Enabled"
line.long 0x04 "RDV_MASK_0,RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " RDV_MASK                                   ,Programmed to RDV"
line.long 0x08 "WDV_MASK_0 ,WDV_MASK_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WDV_MASK                                   ,Programmed to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "RDV_EARLY_MASK_0,RDV_EARLY_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x0C 0.--6. 1. " RDV_EARLY_MASK                             ,Programmed to RDV_EARLY"
line.long 0x10 "RDV_EARLY_0,RDV_EARLY_0 DRAM Timing Parameter"
hexmask.long.byte 0x10 0.--6. 1. " RDV_EARLY                                  ,Time from read command to latching the read data from the pad macros"
sif cpuis("TEGRAX2")
elif (cpuis("TEGRAX1"))
group.long 0x2DC++0x03
line.long 0x00 "AUTO_CAL_CONFIG8_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_TERM_SLOPE                    ,Slope for DQS term" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_TERM_SLOPE                     ,Slope for DQ term value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                "
bitfld.long 0x00 8.--13. " AUTO_CAL_DQS_TERM_OFFSET                   ,2's complement offset for DQS term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_TERM_OFFSET                    ,2's complement offset for DQ term value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
endif
group.long 0x2E0++0x0F
line.long 0x00 "ZCAL_INTERVAL_0,ZCAL_INTERVAL_0 Configure ZQ Calibration"
hexmask.long.word 0x00 10.--23. 1. " ZCAL_INTERVAL_HI                           ,Number of microseconds to wait between issuance of ZCAL_MRW_CMD"
hexmask.long.word 0x00 0.--9. 1. "                   ZCAL_INTERVAL_LO                           ,ZCAL_INTERVAL_LO"
line.long 0x04 "ZCAL_WAIT_CNT_0,ZCAL_WAIT_CNT_0 Configure ZQ Calibration"
bitfld.long 0x04 31. " ZCAL_RESISTOR_SHARED                       ,ZQ resistor is shared across ranks" "Disabled,Enabled"
bitfld.long 0x04 16.--21. "               ZCAL_LATCH_CNT                             ,(LPDDR4 only) Number of EMC clocks to wait before issuing any commands after sending MPC ZWCAL_LATCH command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                "
hexmask.long.word 0x04 0.--10. 1. " ZCAL_WAIT_CNT                              ,Number of EMC clocks to wait before issuing any commands after sending ZCAL_MRW_CMD"
line.long 0x08 "ZCAL_MRW_CMD_0,ZCAL_MRW_CMD_0 Configure ZQ Calibration"
bitfld.long 0x08 30.--31. " ZQ_MRW_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,?..."
hexmask.long.byte 0x08 16.--23. 1. "                   ZQ_MRW_MA                                  ,MRW MA field to be sent after ZCAL_INTERVAL"
textline "                                "
hexmask.long.byte 0x08 0.--7. 1. " ZQ_MRW_OP                                  ,MRW OP field to be sent after ZCAL_INTERVAL"
line.long 0x0C "ZQ_CAL_0,Trigger A Single ZQ Calibration"
bitfld.long 0x0C 30.--31. " ZQ_CAL_DEV_SELECTN                         ,Active-low chip-select" "Both,Dev1,Dev0,Neither"
bitfld.long 0x0C 4. "                ZQ_CAL_LENGTH                              ,Indicate short or long ZQ calibration" "Short,Long"
textline "                                "
bitfld.long 0x0C 1. " ZQ_LATCH_CMD                               ,(LPDDR4 only) Issues a ZQ latch command" "0,1"
bitfld.long 0x0C 0. "                      ZQ_CAL_CMD                                 ,(DDR3 only) Issues a ZQ calibration command" "0,1"
group.long 0x2F4++0x03
line.long 0x00 "XM2COMPPADCTRL3_0,Autocal COMP Pad Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--23. " XM2COMP_VTTLP_VDDA_LVL                     ,[PMC] Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
endif
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PD_E_WKPD              ,Enable weak pull-down" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PD_E_WKPU              ,Enable weak pull-up" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 14.--15. " EMC2TMC_CFG_XM2COMP_PD_DRVDN_ZCTRL         ,Drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PD_DRVUP_ZCTRL         ,Drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                "
bitfld.long 0x00 10.--11. " EMC2TMC_CFG_XM2COMP_PD_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 8.--9. "                     EMC2TMC_CFG_XM2COMP_PD_VAUXP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
textline "                                "
bitfld.long 0x00 6.--7. " EMC2TMC_CFG_XM2COMP_PD_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,11"
bitfld.long 0x00 2.--5. "                     EMC2TMC_CFG_XM2COMP_PD_TEST_MODE           ,Test mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--1. " EMC2TMC_CFG_XM2COMP_PD_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x2f8++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_0_0,Autocal Master Measure Control Register"
bitfld.long 0x00 31. " AUTO_CAL_PD_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 24.--30. 1. "               AUTO_CAL_PD_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 23. " AUTO_CAL_PU_VREF1_CAL_MODE                 ,IVREF_CAL_MODE for Vref1 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--22. 1. "               AUTO_CAL_PU_VREF1_SEL                      ,IVREF_LVL for Vref1 pull-up calibration measure cycle"
textline "                                "
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF0_CAL_MODE                 ,IVREF_CAL_MODE for Vref0 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF0_SEL                      ,IVREF_LVL for Vref0 pull-up calibration measure cycle"
endif
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x300++0x03
line.long 0x00 "AUTO_CAL_VREF_SEL_1_0,Autocal Master Measure Control Register"
bitfld.long 0x00 15. " AUTO_CAL_PD_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-down calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--14. 1. "               AUTO_CAL_PD_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-down calibration measure cycle"
textline "                                "
bitfld.long 0x00 7. " AUTO_CAL_PU_VREF2_CAL_MODE                 ,IVREF_CAL_MODE for Vref2 pull-up calibration measure cycle" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PU_VREF2_SEL                      ,IVREF_LVL for Vref2 pull-up calibration measure cycle"
endif
textline "                                "
width 35.
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x30C++0x03
line.long 0x00 "XM2COMPPADCTRL_0,Autocal COMP Pad Control Register"
bitfld.long 0x00 11. " EMC2TMC_CFG_XM2COMP_E_TESTOUT              ,Select test output" "Disabled,Enabled"
bitfld.long 0x00 9. "               EMC2TMC_CFG_XM2COMP_E_PWRD                 ,Operation type" "Normal,IDDQ test"
textline "                                   "
bitfld.long 0x00 4.--6. "          EMC2TMC_CFG_XM2COMP_BG_SETUP               ,Temperature coefficient pin" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 3. "                      EMC2TMC_CFG_XM2COMP_BG_MODE                ,Regulator mode" "HIGHPERF,LOWPOWER"
textline "                                   "
bitfld.long 0x00 0.--1. "          EMC2TMC_CFG_XM2COMP_MEM_MODE               ,Misc. internal controls DDR memory type" "LPDDR23,SDDR3,LPDDR4,RFU"
endif
group.long 0x310++0x0F
line.long 0x00 "FDPD_CTRL_DQ_0,DPD Settle Times Configuration Register"
bitfld.long 0x00 30.--31. " DQ_PHASE_MIN                               ,DPD phase lower limiter" "0,1,2,3"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 29. "                      CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on command" "Disabled,Enabled"
endif
textline "                                   "
bitfld.long 0x00 24.--28. "          DQ_DPD_EXIT_DELAY                          ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "                     DQ_PHASE_RAMP_IN_TIME                      ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 12.--16. "          DQ_PHASE_RAMP_OUT_TIME                     ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--11. "                     DQ_PHASE_HOLD_MIN                          ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. "          DQ_DPD_ENTRY_DELAY                         ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x04 "FDPD_CTRL_CMD_0,DPD Settle Times Configuration Register"
bitfld.long 0x04 30.--31. " CMD_PHASE_MIN                              ,DPD phase lower limiter" "0,1,2,3"
textline "                                   "
bitfld.long 0x04 29. "          CMD_DPD_RAMP_ENABLE                        ,Enables the ramp feature on cmd" "Disabled,Enabled"
bitfld.long 0x04 24.--28. "               CMD_DPD_EXIT_DELAY                         ,Exit delay to command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 20.--23. "          CMD_PHASE_RAMP_IN_TIME                     ,Time of each phase when ramping into FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--16. "                     CMD_PHASE_RAMP_OUT_TIME                    ,Time of each phase when ramping out of FDPD state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 8.--11. "          CMD_PHASE_HOLD_MIN                         ,Minimal time a DPD phase is hold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                     CMD_DPD_ENTRY_DELAY                        ,Initial delay after idle before starting the FDPD ramp process"
line.long 0x08 "PMACRO_CMD_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On CMD Channels Control Register"
bitfld.long 0x08 16.--17. " CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT8         ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x08 14.--15. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT7         ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 12.--13. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT6         ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x08 10.--11. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT5         ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 8.--9. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT4         ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x08 6.--7. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT3         ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 4.--5. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT2         ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x08 2.--3. "                      CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT1         ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x08 0.--1. "          CMD_BRICK_CTRL_FDPD_RFU_PHASE_BIT0         ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
line.long 0x0C "PMACRO_DATA_BRICK_CTRL_FDPD_0,RFU Pin Of The IOBRICK On DATA Channels Control Register"
bitfld.long 0x0C 16.--17. " DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT8        ,Assigned to dqs_tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 14.--15. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT7        ,Assigned to DQ[8:5] tx_pwrd" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 12.--13. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT6        ,Assigned to DQ[4:0] tx_pwrd" "0,1,2,3"
bitfld.long 0x0C 10.--11. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT5        ,Assigned to RFU[13] as spare" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 8.--9. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT4        ,Assigned to RFU[12] DQS VAUXC domain flops" "0,1,2,3"
bitfld.long 0x0C 6.--7. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT3        ,Assigned to RFU[11] DO VAUXC domain flops" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 4.--5. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT2        ,Assigned to RFU[10:9] DQSP/n short trimmer" "0,1,2,3"
bitfld.long 0x0C 2.--3. "                      DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT1        ,Assigned to RFU[8:5] DQ[8:5] short trimmer" "0,1,2,3"
textline "                                   "
bitfld.long 0x0C 0.--1. "          DATA_BRICK_CTRL_FDPD_RFU_PHASE_BIT0        ,Assigned to RFU[4:0] DQ[4:0] short trimmer" "0,1,2,3"
group.long 0x324++0x03
line.long 0x00 "SCRATCH0_0,Scratch Register For General Use"
group.long 0x330++0x07
line.long 0x00 "PMACRO_BRICK_CTRL_RFU1_0,Lower 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x00 16.--31. 1. " DATA_BRICK_CTRL_RFU1                       ,Data brick control RFU1"
hexmask.long.word 0x00 0.--15. 1. "                   CMD_BRICK_CTRL_RFU1                        ,Command brick control RFU1"
line.long 0x04 "PMACRO_BRICK_CTRL_RFU2_0,Upper 16 RFU Pin Of The IOBRICK Control Register"
hexmask.long.word 0x04 16.--31. 1. " DATA_BRICK_CTRL_RFU2                       ,Data brick control RFU2"
hexmask.long.word 0x04 0.--15. 1. "                   CMD_BRICK_CTRL_RFU2                        ,Command brick control RFU2"
group.long 0x380++0x0B
line.long 0x00 "CMD_MAPPING_CMD0_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD0_DQ3_MAP                               ,Mapping of CMD brick 0 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD0_DQ2_MAP                               ,Mapping of CMD brick 0 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD0_DQ1_MAP                               ,Mapping of CMD brick 0 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD0_DQ0_MAP                               ,Mapping of CMD brick 0 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD0_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD0_DQ7_MAP                               ,Mapping of CMD brick 0 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD0_DQ6_MAP                               ,Mapping of CMD brick 0 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD0_DQ5_MAP                               ,Mapping of CMD brick 0 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD0_DQ4_MAP                               ,Mapping of CMD brick 0 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD0_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD0_DQ_CMD_MAP                            ,Mapping of CMD brick 0 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD0_DQSN_MAP                              ,Mapping of CMD brick 0 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD0_DQSP_MAP                              ,Mapping of CMD brick 0 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD0_DQ8_MAP                               ,Mapping of CMD brick 0 data pin 8"
group.long 0x38C++0x0B
line.long 0x00 "CMD_MAPPING_CMD1_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD1_DQ3_MAP                               ,Mapping of CMD brick 1 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD1_DQ2_MAP                               ,Mapping of CMD brick 1 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD1_DQ1_MAP                               ,Mapping of CMD brick 1 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD1_DQ0_MAP                               ,Mapping of CMD brick 1 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD1_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD1_DQ7_MAP                               ,Mapping of CMD brick 1 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD1_DQ6_MAP                               ,Mapping of CMD brick 1 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD1_DQ5_MAP                               ,Mapping of CMD brick 1 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD1_DQ4_MAP                               ,Mapping of CMD brick 1 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD1_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD1_DQ_CMD_MAP                            ,Mapping of CMD brick 1 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD1_DQSN_MAP                              ,Mapping of CMD brick 1 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD1_DQSP_MAP                              ,Mapping of CMD brick 1 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD1_DQ8_MAP                               ,Mapping of CMD brick 1 data pin 8"
group.long 0x398++0x0B
line.long 0x00 "CMD_MAPPING_CMD2_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD2_DQ3_MAP                               ,Mapping of CMD brick 2 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD2_DQ2_MAP                               ,Mapping of CMD brick 2 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD2_DQ1_MAP                               ,Mapping of CMD brick 2 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD2_DQ0_MAP                               ,Mapping of CMD brick 2 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD2_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD2_DQ7_MAP                               ,Mapping of CMD brick 2 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD2_DQ6_MAP                               ,Mapping of CMD brick 2 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD2_DQ5_MAP                               ,Mapping of CMD brick 2 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD2_DQ4_MAP                               ,Mapping of CMD brick 2 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD2_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD2_DQ_CMD_MAP                            ,Mapping of CMD brick 2 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD2_DQSN_MAP                              ,Mapping of CMD brick 2 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD2_DQSP_MAP                              ,Mapping of CMD brick 2 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD2_DQ8_MAP                               ,Mapping of CMD brick 2 data pin 8"
group.long 0x3A4++0x0B
line.long 0x00 "CMD_MAPPING_CMD3_0_0,Command Mapping Configuration Register"
hexmask.long.byte 0x00 24.--30. 1. " CMD3_DQ3_MAP                               ,Mapping of CMD brick 3 data pin 3"
hexmask.long.byte 0x00 16.--22. 1. "                     CMD3_DQ2_MAP                               ,Mapping of CMD brick 3 data pin 2"
textline "                                   "
hexmask.long.byte 0x00 8.--14. 1. "          CMD3_DQ1_MAP                               ,Mapping of CMD brick 3 data pin 1"
hexmask.long.byte 0x00 0.--6. 1. "                     CMD3_DQ0_MAP                               ,Mapping of CMD brick 3 data pin 0"
line.long 0x04 "CMD_MAPPING_CMD3_1_0,Command Mapping Configuration Register"
hexmask.long.byte 0x04 24.--30. 1. " CMD3_DQ7_MAP                               ,Mapping of CMD brick 3 data pin 7"
hexmask.long.byte 0x04 16.--22. 1. "                     CMD3_DQ6_MAP                               ,Mapping of CMD brick 3 data pin 6"
textline "                                   "
hexmask.long.byte 0x04 8.--14. 1. "          CMD3_DQ5_MAP                               ,Mapping of CMD brick 3 data pin 5"
hexmask.long.byte 0x04 0.--6. 1. "                     CMD3_DQ4_MAP                               ,Mapping of CMD brick 3 data pin 4"
line.long 0x08 "CMD_MAPPING_CMD3_2_0,Command Mapping Configuration Register"
bitfld.long 0x08 24.--27. " CMD3_DQ_CMD_MAP                            ,Mapping of CMD brick 3 CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
hexmask.long.byte 0x08 16.--22. 1. "             CMD3_DQSN_MAP                              ,Mapping of CMD brick 3 DQSN pin"
textline "                                   "
hexmask.long.byte 0x08 8.--14. 1. "          CMD3_DQSP_MAP                              ,Mapping of CMD brick 3 DQSP pin"
hexmask.long.byte 0x08 0.--6. 1. "                     CMD3_DQ8_MAP                               ,Mapping of CMD brick 3 data pin 8"
group.long 0x3B0++0x17
line.long 0x00 "CMD_MAPPING_BYTE_0,Command Mapping Configuration Register"
bitfld.long 0x00 28.--31. " BYTE7_DQ_CMD_MAP                           ,Mapping of BYTE7 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 24.--27. "             BYTE6_DQ_CMD_MAP                           ,Mapping of BYTE6 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 20.--23. "          BYTE5_DQ_CMD_MAP                           ,Mapping of BYTE5 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 16.--19. "             BYTE4_DQ_CMD_MAP                           ,Mapping of BYTE4 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 12.--15. "          BYTE3_DQ_CMD_MAP                           ,Mapping of BYTE3 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 8.--11. "             BYTE2_DQ_CMD_MAP                           ,Mapping of BYTE2 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
textline "                                   "
bitfld.long 0x00 4.--7. "          BYTE1_DQ_CMD_MAP                           ,Mapping of BYTE1 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
bitfld.long 0x00 0.--3. "             BYTE0_DQ_CMD_MAP                           ,Mapping of BYTE0 brick CMD pin" "None,Boot,Reset,CH0_CKE0,CH0_CKE1,CH0_CKE_B0,CH0_CKE_B1,CH1_CKE0,CH1_CKE1,CH1_CKE_B0,CH1_CKE_B1,ODT0,ODT1,ODT_B0,ODT_B1,?..."
line.long 0x04 "TR_TIMING_0_0,Training Timing Register"
bitfld.long 0x04 23.--26. " T_CATR_RD2VREF                             ,CATR read to CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--21. "                     T_DHTRAIN                                  ,Hold time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 12.--15. "          T_DSTRAIN                                  ,Setup time at DQS toggle for CAVREF capture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--9. 1. "                     T_VREF_LONG                                ,Delay between CAVREF and CATR reads"
line.long 0x08 "TR_CTRL_0_0,Training Control Register 0"
bitfld.long 0x08 8. " CATR_ENABLE                                ,CA Training enable" "Disabled,Enabled"
bitfld.long 0x08 5.--7. "               CAVREF_DQS_DURATION                        ,Number of DQS toggles to latch CAVREF" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x08 4. "          CAVREF_RIVE_DQS                            ,Drive DQS" "0,1"
bitfld.long 0x08 0.--3. "                      CAVREF_TX_BYTE_MASK                        ,Mask TX_D|EN of DQ|DQS during CAVREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TR_CTRL_1_0,Training Control Register 1"
bitfld.long 0x0C 4. " ENABLE_TR_QRST                             ,TR QRST select" "Disabled,Enabled"
bitfld.long 0x0C 3. "               ENABLE_TR_QSAFE                            ,TR QSAFE select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 2. "          ENABLE_TR_RDV_MASK                         ,TR RDV_MASK select" "Disabled,Enabled"
bitfld.long 0x0C 1. "               ENABLE_TR_QPOP                             ,TR QPOP select" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x0C 0. "          ENABLE_TR_RDV                              ,TR RDV select" "Disabled,Enabled"
line.long 0x10 "SWITCH_BACK_CTRL_0,Switch Back Control Register"
bitfld.long 0x10 0. " CLK_SWITCH_BACK                            ,Clock switch back request trigger" "Not triggered,Triggered"
line.long 0x14 "TR_RDV_0,Training RDV Register"
hexmask.long.byte 0x14 0.--6. 1. " TR_RDV                                     ,Training RDV value"
rgroup.long 0x3C8++0x0F
line.long 0x00 "STALL_THEN_EXE_BEFORE_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x00 0. " STALL_THEN_EXE_BEFORE_CLKCHANGE            ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x04 "STALL_THEN_EXE_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x04 0. " STALL_THEN_EXE_AFTER_CLKCHANGE             ,Stall subsequent register access" "Disabled,Enabled"
line.long 0x08 "UNSTALL_RW_AFTER_CLKCHANGE_0,Subsequent Register Access Stall Control"
bitfld.long 0x08 0. " UNSTALL_RW_AFTER_CLKCHANGE                 ,Unstall memory read|write after clock change" "Disabled,Enabled"
line.long 0x0C "AUTO_CAL_CLK_STATUS2_0,Autocal Master Status Register"
hexmask.long.byte 0x0C 24.--29. 1. " AUTO_CAL_VREF2_DRVDN                       ,Pull-down code from VREF2 measure cycle"
hexmask.long.byte 0x0C 16.--21. 1. "                     AUTO_CAL_VREF2_DRVUP                       ,Pull-up code from VREF2 measure cycle"
textline "                                   "
hexmask.long.byte 0x0C 8.--13. 1. "          AUTO_CAL_VREF1_DRVDN                       ,Pull-down code from VREF1 measure cycle"
hexmask.long.byte 0x0C 0.--5. 1. "                     AUTO_CAL_VREF1_DRVUP                       ,Pull-up code from VREF1 measure cycle"
group.long 0x3D8++0x0F
line.long 0x00 "SEL_DPD_CTRL_0,Configures Functional SEL_DPD Modes"
bitfld.long 0x00 16.--18. " SEL_DPD_DLY                                ,Number of cycles to wait before asserting SEL_DPD" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8. "                      DATA_SEL_DPD_EN                            ,Allow SEL_DPD assertion for data pads" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5. "          ODT_SEL_DPD_EN                             ,Tie SEL_DPD for ODT pads to ENABLE_ODT_DURING_WRITE" "Disabled,Enabled"
bitfld.long 0x00 4. "               RESET_SEL_DPD_EN                           ,Assert SEL_DPD for reset pad" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. "          CA_SEL_DPD_EN                              ,Allow SEL_DPD assertion for discrete command/address pads" "Disabled,Enabled"
bitfld.long 0x00 2. "               CLK_SEL_DPD_EN                             ,Allow SEL_DPD assertion for discrete clock pad" "Disabled,Enabled"
line.long 0x04 "PRE_REFRESH_REQ_CNT_0,Pre Refresh Request Count"
hexmask.long.word 0x04 0.--15. 1. " PRE_REF_REQ_CNT                            ,Pre-refresh request count"
line.long 0x08 "DYN_SELF_REF_CONTROL_0,Threshold For Dynamic Self-refresh Entry"
bitfld.long 0x08 31. " DSR_PER_DEVICE                             ,Controls whether self-refresh is done on a per-device basis" "Disabled,Enabled"
hexmask.long.word 0x08 0.--15. 1. "               DSR_THRESHOLD                              ,Number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x0C "TXSRDLL_0,DRAM Timing Parameter For TXSRDLL"
hexmask.long.word 0x0C 0.--11. 1. " TXSRDLL                                    ,Cycles between self-refresh exit & first DRAM command requiring a locked DLL"
group.long 0x3E8++0x07
line.long 0x00 "CCFIFO_ADDR_0,CCFIFO Address Offset"
bitfld.long 0x00 31. " CCFIFO_STALL_CNT_BY_1                      ,Count-by VALUE clock increments select" "256,1"
hexmask.long.word 0x00 16.--30. 1. "                    CCFIFO_STALL_CNT                           ,CCFIFO stall counter value"
textline "                                   "
hexmask.long.word 0x00 0.--15. 0x01 "          CCFIFO_ADDR                                ,Clock change FIFO address register"
line.long 0x04 "CCFIFO_ADDR_0,Clock Change FIFO Data Register"
rgroup.long 0x3F0++0x03
line.long 0x00 "CCFIFO_STATUS_0,CCFIFO Status"
hexmask.long.byte 0x00 0.--6. 1. " CCFIFO_COUNT                               ,CCFIFO count"
group.long 0x3F4++0x0F
line.long 0x00 "TR_QPOP_0,TR_QPOP DRAM Timing Parameter"
hexmask.long.byte 0x00 16.--22. 1. " TR_QPOP_PREAMBLE                           ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x00 0.--6. 1. "                     TR_QPOP                                    ,Time from training read command to pop data from the pad macro FIFO"
line.long 0x04 "TR_RDV_MASK_0,TR_RDV_MASK_0 DRAM Timing Parameter"
hexmask.long.byte 0x04 0.--6. 1. " TR_RDV_MASK                                ,Training RDV mask bits"
line.long 0x08 "TR_QSAFE_0,TR_QSAFE_0 DRAM Timing Parameter"
hexmask.long.byte 0x08 0.--6. 1. " TR_QSAFE                                   ,Training time from a read command to when it is safe to issue a QRST"
line.long 0x0C "TR_QRST_0,TR_QRST_0 DRAM Timing Parameter"
bitfld.long 0x0C 16.--20. " TR_QRST_DURATION                           ,Duration of QRST remaining asserted" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
hexmask.long.byte 0x0C 0.--6. 1. "              TR_QRST                                    ,Training time from a read command to when it is safe to issue a QRST"
group.long 0x404++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE0_0,Swizzle Rank0 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE0_BIT7_SEL                   ,SWZ rank0 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE0_BIT6_SEL                   ,SWZ rank0 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE0_BIT5_SEL                   ,SWZ rank0 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE0_BIT4_SEL                   ,SWZ rank0 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE0_BIT3_SEL                   ,SWZ rank0 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE0_BIT2_SEL                   ,SWZ rank0 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE0_BIT1_SEL                   ,SWZ rank0 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE0_BIT0_SEL                   ,SWZ rank0 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x408++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE1_0,Swizzle Rank0 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE1_BIT7_SEL                   ,SWZ rank0 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE1_BIT6_SEL                   ,SWZ rank0 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE1_BIT5_SEL                   ,SWZ rank0 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE1_BIT4_SEL                   ,SWZ rank0 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE1_BIT3_SEL                   ,SWZ rank0 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE1_BIT2_SEL                   ,SWZ rank0 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE1_BIT1_SEL                   ,SWZ rank0 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE1_BIT0_SEL                   ,SWZ rank0 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x40C++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE2_0,Swizzle Rank0 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE2_BIT7_SEL                   ,SWZ rank0 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE2_BIT6_SEL                   ,SWZ rank0 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE2_BIT5_SEL                   ,SWZ rank0 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE2_BIT4_SEL                   ,SWZ rank0 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE2_BIT3_SEL                   ,SWZ rank0 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE2_BIT2_SEL                   ,SWZ rank0 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE2_BIT1_SEL                   ,SWZ rank0 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE2_BIT0_SEL                   ,SWZ rank0 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x410++0x03
line.long 0x00 "SWIZZLE_RANK0_BYTE3_0,Swizzle Rank0 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK0_BYTE3_BIT7_SEL                   ,SWZ rank0 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK0_BYTE3_BIT6_SEL                   ,SWZ rank0 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK0_BYTE3_BIT5_SEL                   ,SWZ rank0 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK0_BYTE3_BIT4_SEL                   ,SWZ rank0 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK0_BYTE3_BIT3_SEL                   ,SWZ rank0 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK0_BYTE3_BIT2_SEL                   ,SWZ rank0 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK0_BYTE3_BIT1_SEL                   ,SWZ rank0 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK0_BYTE3_BIT0_SEL                   ,SWZ rank0 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x418++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE0_0,Swizzle Rank1 Byte0 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE0_BIT7_SEL                   ,SWZ rank1 byte0 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE0_BIT6_SEL                   ,SWZ rank1 byte0 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE0_BIT5_SEL                   ,SWZ rank1 byte0 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE0_BIT4_SEL                   ,SWZ rank1 byte0 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE0_BIT3_SEL                   ,SWZ rank1 byte0 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE0_BIT2_SEL                   ,SWZ rank1 byte0 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE0_BIT1_SEL                   ,SWZ rank1 byte0 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE0_BIT0_SEL                   ,SWZ rank1 byte0 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x41C++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE1_0,Swizzle Rank1 Byte1 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE1_BIT7_SEL                   ,SWZ rank1 byte1 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE1_BIT6_SEL                   ,SWZ rank1 byte1 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE1_BIT5_SEL                   ,SWZ rank1 byte1 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE1_BIT4_SEL                   ,SWZ rank1 byte1 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE1_BIT3_SEL                   ,SWZ rank1 byte1 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE1_BIT2_SEL                   ,SWZ rank1 byte1 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE1_BIT1_SEL                   ,SWZ rank1 byte1 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE1_BIT0_SEL                   ,SWZ rank1 byte1 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x420++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE2_0,Swizzle Rank1 Byte2 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE2_BIT7_SEL                   ,SWZ rank1 byte2 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE2_BIT6_SEL                   ,SWZ rank1 byte2 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE2_BIT5_SEL                   ,SWZ rank1 byte2 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE2_BIT4_SEL                   ,SWZ rank1 byte2 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE2_BIT3_SEL                   ,SWZ rank1 byte2 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE2_BIT2_SEL                   ,SWZ rank1 byte2 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE2_BIT1_SEL                   ,SWZ rank1 byte2 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE2_BIT0_SEL                   ,SWZ rank1 byte2 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x424++0x03
line.long 0x00 "SWIZZLE_RANK1_BYTE3_0,Swizzle Rank1 Byte3 0"
bitfld.long 0x00 28.--30. " SWZ_RANK1_BYTE3_BIT7_SEL                   ,SWZ rank1 byte3 bit 7 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "                      SWZ_RANK1_BYTE3_BIT6_SEL                   ,SWZ rank1 byte3 bit 6 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 20.--22. "          SWZ_RANK1_BYTE3_BIT5_SEL                   ,SWZ rank1 byte3 bit 5 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 16.--18. "                      SWZ_RANK1_BYTE3_BIT4_SEL                   ,SWZ rank1 byte3 bit 4 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 12.--14. "          SWZ_RANK1_BYTE3_BIT3_SEL                   ,SWZ rank1 byte3 bit 3 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 8.--10. "                      SWZ_RANK1_BYTE3_BIT2_SEL                   ,SWZ rank1 byte3 bit 2 select" "0,1,2,3,4,5,6,7"
textline "                                   "
bitfld.long 0x00 4.--6. "          SWZ_RANK1_BYTE3_BIT1_SEL                   ,SWZ rank1 byte3 bit 1 select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      SWZ_RANK1_BYTE3_BIT0_SEL                   ,SWZ rank1 byte3 bit 0 select" "0,1,2,3,4,5,6,7"
group.long 0x428++0x03
line.long 0x00 "ISSUE_QRST_0,ISSUE_QRST_0 DRAM Timing Parameter"
bitfld.long 0x00 0. " ISSUE_QRST                                 ,Sets QRST to pads|macros" "0,1"
group.long 0x440++0x0B
line.long 0x00 "PMC_SCRATCH1_0,PMC Scratch Register 1"
line.long 0x04 "PMC_SCRATCH2_0,PMC Scratch Register 2"
line.long 0x08 "PMC_SCRATCH3_0,PMC Scratch Register 3"
sif (cpuis("TEGRAX2"))
group.long 0x44C++0x0B
line.long 0x00 "MCH_GLOBAL_INTSTATUS_0,Global interrupt status register for all 4 EMC channels"
bitfld.long 0x00 3. " INT_CH3                                    ,Set when there is a interrupt from channel-3" "None,Interrupt"
bitfld.long 0x00 2. "              INT_CH2                                    ,Set when there is a interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x00 1. "          INT_CH1                                    ,Set when there is a interrupt from channel-1" "None,Interrupt"
bitfld.long 0x00 0. "              INT_CH0                                    ,Set when there is a interrupt from channel-0" "None,Interrupt"
line.long 0x04 "MCH_GLOBAL_CRITICAL_INTSTATUS_0,critical interrupt status register for all 4 EMC channels"
bitfld.long 0x04 3. " CRITICAL_INT_CH3                           ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              CRITICAL_INT_CH2                           ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          CRITICAL_INT_CH1                           ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              CRITICAL_INT_CH0                           ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
line.long 0x08 "RESET_PAD_CTRL_0,Controls the reset pad input bits"
bitfld.long 0x08 4.--7. " RESET_RFU                                  ,RFU bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2. "                     RESET_EN                                   ,Enables the TH path when set to 0" "None,INT"
textline "                                   "
bitfld.long 0x08 1. "          RESET_E_INPUT                              ,When set to 1 enables the RX path for reset pads" "None,Interrupt"
bitfld.long 0x08 0. "              RESET_E_WKPD                               ,When set to 1 enables the weak pad for reset pads" "None,Interrupt"
endif
group.long 0x458++0x17
line.long 0x00 "AUTO_CAL_CONFIG2_0,Auto-calibration Master Compute Control Register 2"
bitfld.long 0x00 26.--27. " AUTO_CAL_DQS_PD_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 24.--25. "                  AUTO_CAL_DQS_PU_TERM_CODE_SEL              ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 22.--23. "          AUTO_CAL_DQ_PD_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 20.--21. "                  AUTO_CAL_DQ_PU_TERM_CODE_SEL               ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 18.--19. "          AUTO_CAL_DQS_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 16.--17. "                  AUTO_CAL_DQS_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 14.--15. "          AUTO_CAL_DQ_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 12.--13. "                  AUTO_CAL_DQ_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 10.--11. "          AUTO_CAL_CMD_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 8.--9. "                  AUTO_CAL_CMD_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 6.--7. "          AUTO_CAL_CA_PD_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 4.--5. "                  AUTO_CAL_CA_PU_CODE_SEL                    ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
textline "                                   "
bitfld.long 0x00 2.--3. "          AUTO_CAL_CLK_PD_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
bitfld.long 0x00 0.--1. "                  AUTO_CAL_CLK_PU_CODE_SEL                   ,Autocal vref to use for compute cycle" "VREF0,VREF1,VREF2,?..."
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x45C++0x03
line.long 0x00 "AUTO_CAL_CONFIG3_0,Auto-calibration Master Compute Control Register 3"
bitfld.long 0x00 20.--22. " AUTO_CAL_CLK_PD_SLOPE                      ,Slope for CK pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CLK_PU_SLOPE                      ,Slope for CK pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                   "
bitfld.long 0x00 8.--13. "          AUTO_CAL_CLK_PD_OFFSET                     ,2's complement offset for CK pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CLK_PU_OFFSET                     ,2's complement offset for CK pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x460++0x0F
line.long 0x00 "TR_DVFS,Training DVFS Register"
bitfld.long 0x00 0. " TRAINING_DVFS                              ,DVFS training enable" "Disabled,Enabled"
line.long 0x04 "AUTO_CAL_CHANNEL_0,Autocal Slave Control Register"
bitfld.long 0x04 31. " AUTO_CAL_UPDATE_IDLE                       ,Allow autocal update outside of refresh if dramc is idle" "Disabled,Enabled"
bitfld.long 0x04 30. "               AUTO_CAL_STALL_ALL_TRAFFIC                 ,Stall all traffic for an autocal update" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x04 29. "          AUTO_CAL_COMPUTE_START_DVFS                ,Trigger autocal compute FSM after DVFS shadow update" "Disabled,Enabled"
hexmask.long.byte 0x04 21.--27. 1. "               CAL_WAIT_AFTER_DVFS                        ,Number of EMC clocks to wait after DVFS shadow update before resuming traffic to DRAM"
textline "                                   "
bitfld.long 0x04 16.--20. "          AUTO_CAL_UPDATE_TIMEOUT                    ,Timeout before forcing dramc idle to issue an autocal update" "Disabled,2 EMCCLKS,2^2 EMCCLKS,2^3 EMCCLKS,2^4 EMCCLKS,2^5 EMCCLKS,2^6 EMCCLKS,2^7 EMCCLKS,2^8 EMCCLKS,2^9 EMCCLKS,2^10 EMCCLKS,2^11 EMCCLKS,2^12 EMCCLKS,2^13 EMCCLKS,2^14 EMCCLKS,2^15 EMCCLKS,2^16 EMCCLKS,2^17 EMCCLKS,2^18 EMCCLKS,2^19 EMCCLKS,2^20 EMCCLKS,2^21 EMCCLKS,2^22 EMCCLKS,2^23 EMCCLKS,2^24 EMCCLKS,2^25 EMCCLKS,2^26 EMCCLKS,2^27 EMCCLKS,2^28 EMCCLKS,2^29 EMCCLKS,2^30 EMCCLKS,2^31 EMCCLKS"
bitfld.long 0x04 8.--11. "           AUTO_CAL_WAIT_BEFORE_UPDATE                ,Number of EMC clocks to wait before update" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--5. "          AUTO_CAL_NUM_STALL_CYCLES                  ,Number of EMC clocks to stall the DRAM bus for autocal codes update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IBDLY_0,IBDLY_0 DRAM Timing Parameter"
bitfld.long 0x08 28.--29. " IBDLY_MODE                                 ,IBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
hexmask.long.byte 0x08 0.--6. 1. "              IBDLY                                      ,Specifies when to change IBDLY for DQ|DQS"
line.long 0x0C "OBDLY_0,OBDLY_0 DRAM Timing Parameter"
bitfld.long 0x0C 28.--29. " OBDLY_MODE                                 ,OBDLY is enforced before write command is issued" "Disabled,After CMD,,B4 CMD"
bitfld.long 0x0C 0.--5. "              OBDLY                                      ,Specifies when to update OB trim values with respect to WDV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x470++0x07
line.long 0x00 "ASR_CONTROL_0,Aggressive self refresh control register"
bitfld.long 0x00 31. " DISPLAY_STUTTER_EN                         ,Display stutter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "               ASR_THRESHOLD                              ,PMC number of idle cycles to wait before allowing dynamic self-refresh entry"
line.long 0x04 "MCH_GLOBAL_NONCRITICAL_INTSTATUS_0,Global non critical interrupt status (primarily meant for SBE) register for all 4 EMC channels"
bitfld.long 0x04 3. " NONCRITICAL_INT_CH3                        ,Set when there is a critical interrupt from channel-3" "None,Interrupt"
bitfld.long 0x04 2. "              NONCRITICAL_INT_CH2                        ,Set when there is a critical interrupt from channel-2" "None,Interrupt"
textline "                                   "
bitfld.long 0x04 1. "          NONCRITICAL_INT_CH1                        ,Set when there is a critical interrupt from channel-1" "None,Interrupt"
bitfld.long 0x04 0. "              NONCRITICAL_INT_CH0                        ,Set when there is a critical interrupt from channel-0" "None,Interrupt"
endif
textline "                                   "
width 26.
group.long 0x480++0x03
line.long 0x00 "TXDSRVTTGEN_0,TXDSRVTTGEN_0 DRAM Timing Parameter"
hexmask.long.word 0x00 0.--11. 1. " TXDSRVTTGEN                                ,Cycles to wait from DSR exit"
group.long 0x48C++0x13
line.long 0x00 "WE_DURATION_0,WE_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--4. " WE_DURATION                                ,Number of cycles to assert write enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "WS_DURATION_0,WS_DURATION_0 DRAM Timing Parameter"
bitfld.long 0x04 0.--4. " WS_DURATION                                ,Number of cycles to assert write strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "WEV_0,WEV_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " WEV                                        ,Number of cycles to post (delay) write enable from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x0C "WSV_0,WSV_0 DRAM Timing Parameter"
bitfld.long 0x0C 0.--5. " WSV                                        ,Number of cycles to post (delay) write strobe from being asserted to the RAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,?..."
line.long 0x10 "CFG_3_0,EMC Configuration Register 3"
bitfld.long 0x10 4.--6. " MRR_BYTESEL_X16                            ,Indicates to which byte lane second DRAM byte 0 is connected" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      MRR_BYTESEL                                ,Indicates which AP byte lane is connected to DRAM byte 0" "0,1,2,3,4,5,6,7"
group.long 0x4A0++0x03
line.long 0x00 "MRW5_0,Command Trigger MRW5"
bitfld.long 0x00 30.--31. " MRW5_DEV_SELECTN                           ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW5_CNT                               ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
hexmask.long.byte 0x00 16.--23. 0x01 "  MRW5_MA                                    ,Register address"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW5_OP                                    ,Data to be written"
group.long 0x4A4++0x03
line.long 0x00 "MRW6 _0,Command Trigger MRW6 "
bitfld.long 0x00 30.--31. " MRW6 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW6 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW6 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW6 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW6 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW6 _SP0                                  ,Data to be written to subp0"
group.long 0x4A8++0x03
line.long 0x00 "MRW7 _0,Command Trigger MRW7 "
bitfld.long 0x00 30.--31. " MRW7 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW7 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW7 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW7 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW7 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW7 _SP0                                  ,Data to be written to subp0"
group.long 0x4AC++0x03
line.long 0x00 "MRW8 _0,Command Trigger MRW8 "
bitfld.long 0x00 30.--31. " MRW8 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW8 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW8 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW8 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW8 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW8 _SP0                                  ,Data to be written to subp0"
group.long 0x4B0++0x03
line.long 0x00 "MRW9 _0,Command Trigger MRW9 "
bitfld.long 0x00 30.--31. " MRW9 _DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW9 _CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW9 _SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW9 _MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW9 _SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW9 _SP0                                  ,Data to be written to subp0"
group.long 0x4B4++0x03
line.long 0x00 "MRW10_0,Command Trigger MRW10"
bitfld.long 0x00 30.--31. " MRW10_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW10_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW10_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW10_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW10_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW10_SP0                                  ,Data to be written to subp0"
group.long 0x4B8++0x03
line.long 0x00 "MRW11_0,Command Trigger MRW11"
bitfld.long 0x00 30.--31. " MRW11_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW11_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW11_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW11_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW11_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW11_SP0                                  ,Data to be written to subp0"
group.long 0x4BC++0x03
line.long 0x00 "MRW12_0,Command Trigger MRW12"
bitfld.long 0x00 30.--31. " MRW12_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW12_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW12_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW12_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW12_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW12_SP0                                  ,Data to be written to subp0"
group.long 0x4C0++0x03
line.long 0x00 "MRW13_0,Command Trigger MRW13"
bitfld.long 0x00 30.--31. " MRW13_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW13_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW13_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW13_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW13_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW13_SP0                                  ,Data to be written to subp0"
group.long 0x4C4++0x03
line.long 0x00 "MRW14_0,Command Trigger MRW14"
bitfld.long 0x00 30.--31. " MRW14_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW14_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW14_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW14_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW14_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW14_SP0                                  ,Data to be written to subp0"
group.long 0x4D0++0x03
line.long 0x00 "MRW15_0,Command Trigger MRW15"
bitfld.long 0x00 30.--31. " MRW15_DEV_SELECTN                          ,Active-low chip select" "Both,Dev1,Dev0,?..."
bitfld.long 0x00 26.--27. "                   USE_MRW15_CNT                              ,Which MRS wait count will be used" "Short,Long,EXT1,EXT2"
textline "                                  "
bitfld.long 0x00 24.--25. "  MRW15_SP_SELECTN                           ,Active-low SUBP chip-select (subp can be written at the same time)" "Both,Subp1,Subp0,?..."
hexmask.long.byte 0x00 16.--23. 0x01 "                  MRW15_MA                                   ,Register address"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  MRW15_SP1                                  ,Data to be written to subp1"
hexmask.long.byte 0x00 0.--7. 1. "                     MRW15_SP0                                  ,Data to be written to subp0"
group.long 0x4D4++0x07
line.long 0x00 "CFG_SYNC_0,Sync Configuration 0"
bitfld.long 0x00 0. " CHANNEL_SYNC                               ,Channel sync" "0,1"
line.long 0x04 "FDPD_CTRL_CMD_NO_RAMP_0,FDPD Control Command No Ramp 0"
bitfld.long 0x04 0. " CMD_DPD_NO_RAMP_ENABLE                     ,No ramp for DI/DT enable" "Disabled,Enabled"
group.long 0x4E0++0x03
line.long 0x00 "WDV_CHK_0,WDV_CHK_0 DRAM Timing Parameter"
bitfld.long 0x00 0.--5. " WDV_CHK_BASE                               ,Establish DRAMC write data ready handling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0x510++0x07
line.long 0x00 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x00 11. " TWEAK_UNDERFLOW_CRITICAL_INTMASK           ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x00 10. "               ECC_UNCORR_ERR_CRITICAL_INTMASK            ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 9. "  DLL_LOCK_TIMEOUT_CRITICAL_INTMASK          ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x00 8. "               CCFIFO_OVERFLOW_CRITICAL_INTMASK           ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 7. "  DLL_ALARM_CRITICAL_INTMASK                 ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x00 6. "               ACCESS_TO_SR_DPD_DEV_CRITICAL_INTMASK      ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 5. "  MRR_DIVLD_CRITICAL_INTMASK                 ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x00 4. "               CLKCHANGE_COMPLETE_CRITICAL_INTMASK        ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x00 3. "  REFRESH_OVERFLOW_CRITICAL_INTMASK          ,Mask for refresh request overflow time out" "Masked,Unmasked"
line.long 0x04 "CRITICAL_INTMASK_0,Critical Interrupt Mask Register"
bitfld.long 0x04 13. " TWEAK_UNDERFLOW_NONCRITICAL_INTMASK        ,Mask for tweak underflow interrupt" "Masked,Unmasked"
bitfld.long 0x04 12. "               ECC_ERR_BUF_OVF_NONCRITICAL_INTMASK        ,Mask for ECC Error Buffer overflow interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 11. "  ECC_CORR_ERR_NONCRITICAL_INTMASK           ,Mask for ECC correctable error interrupt" "Masked,Unmasked"
bitfld.long 0x04 10. "               ECC_UNCORR_ERR_NONCRITICAL_INTMASK         ,Mask for ECC uncorrectable error interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 9. "  DLL_LOCK_TIMEOUT_NONCRITICAL_INTMASK       ,Mask for DLL lock time out interrupt" "Masked,Unmasked"
bitfld.long 0x04 8. "               CCFIFO_OVERFLOW_NONCRITICAL_INTMASK        ,Mask for clock change FIFO overflow" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 7. "  DLL_ALARM_NONCRITICAL_INTMASK              ,Mask for DLL alarm and DLL alarm minimum" "Masked,Unmasked"
bitfld.long 0x04 6. "               ACCESS_TO_SR_DPD_DEV_NONCRITICAL_INTMASK   ,Mask for access a self-refresh/deep-powered-down device interrupt" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 5. "  MRR_DIVLD_NONCRITICAL_INTMASK              ,Mask for MRR data available" "Masked,Unmasked"
bitfld.long 0x04 4. "               CLKCHANGE_COMPLETE_NONCRITICAL_INTMASK     ,Mask for CAR/EMC clock-change handshake complete" "Masked,Unmasked"
textline "                                  "
bitfld.long 0x04 3. "  REFRESH_OVERFLOW_NONCRITICAL_INTMASK       ,Mask for refresh request overflow time out" "Masked,Unmasked"
endif
group.long 0x554++0x1F
line.long 0x00 "CFG_PIPE_2_0,Pipe Configuration Register 2_0"
bitfld.long 0x00 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK11 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 11" "No bypass,Bypass"
bitfld.long 0x00 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK10 ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK9  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 9" "No bypass,Bypass"
bitfld.long 0x00 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK8  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK7  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 7" "No bypass,Bypass"
bitfld.long 0x00 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK6  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK5  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 5" "No bypass,Bypass"
bitfld.long 0x00 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK4  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK3  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 3" "No bypass,Bypass"
bitfld.long 0x00 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK2  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK1  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 1" "No bypass,Bypass"
bitfld.long 0x00 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE3_BRICK0  ,Bypass pipeline stage 3 between EMC and pad-macro for cmd pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK11     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x00 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK10     ,Bypass pipeline stage 3 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK9      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x00 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK8      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK7      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x00 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK6      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK5      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x00 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK4      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK3      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x00 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK2      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x00 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK1      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x00 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE3_BRICK0      ,Bypass pipeline stage 3 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x04 "CFG_PIPE_CLK_0,Pipe Clock Configuration Register"
bitfld.long 0x04 0. " PIPE_CLK_ENABLE_OVERRIDE                   ,Pipe clock override enable" "Disabled,Enabled"
line.long 0x08 "CFG_PIPE_1_0,Pipe Configuration Register 1_0"
bitfld.long 0x08 27. " EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK11 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 26. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK10 ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 25. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK9  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 24. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK8  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 23. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK7  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 22. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK6  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 21. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK5  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 20. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK4  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 19. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK3  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 18. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK2  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 17. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK1  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 16. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE2_BRICK0  ,Bypass pipeline stage 2 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 11. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK11 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 11" "No bypass,Bypass"
bitfld.long 0x08 10. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK10 ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 9. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK9  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 9" "No bypass,Bypass"
bitfld.long 0x08 8. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK8  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 7. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK7  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 7" "No bypass,Bypass"
bitfld.long 0x08 6. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK6  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 5. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK5  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 5" "No bypass,Bypass"
bitfld.long 0x08 4. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK4  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 3. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK3  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 3" "No bypass,Bypass"
bitfld.long 0x08 2. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK2  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x08 1. "  EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK1  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 1" "No bypass,Bypass"
bitfld.long 0x08 0. "              EMC2PMACRO_CFG_BYPASS_CMD_OB_PIPE1_BRICK0  ,Bypass pipeline stage 1 between EMC and pad-macro for command pin of brick 0" "No bypass,Bypass"
line.long 0x0C "CFG_PIPE_0,Pipe Configuration Register 0"
bitfld.long 0x0C 27. " EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK11     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 26. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK10     ,Bypass pipeline stage 2 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 25. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK9      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 24. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK8      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 23. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK7      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 22. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK6      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 21. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK5      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 20. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK4      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 19. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK3      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 18. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK2      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 17. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK1      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 16. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE2_BRICK0      ,Bypass pipeline stage 2 between EMC and pad-macro for brick 0" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 11. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK11     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 11" "No bypass,Bypass"
bitfld.long 0x0C 10. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK10     ,Bypass pipeline stage 1 between EMC and pad-macro for brick 10" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 9. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK9      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 9" "No bypass,Bypass"
bitfld.long 0x0C 8. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK8      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 8" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 7. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK7      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 7" "No bypass,Bypass"
bitfld.long 0x0C 6. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK6      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 6" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 5. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK5      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 5" "No bypass,Bypass"
bitfld.long 0x0C 4. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK4      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 4" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 3. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK3      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 3" "No bypass,Bypass"
bitfld.long 0x0C 2. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK2      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 2" "No bypass,Bypass"
textline "                                  "
bitfld.long 0x0C 1. "  EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK1      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 1" "No bypass,Bypass"
bitfld.long 0x0C 0. "              EMC2PMACRO_CFG_BYPASS_OB_PIPE1_BRICK0      ,Bypass pipeline stage 1 between EMC and pad-macro for brick 0" "No bypass,Bypass"
line.long 0x10 "QPOP_0,DRAM Timing Parameter"
hexmask.long.byte 0x10 16.--22. 1. " QPOP_PREAMBLE                              ,Time from read command to pop preamble from the pad macro FIFO"
hexmask.long.byte 0x10 0.--6. 1. "                     QPOP                                       ,Time from read command to pop data from the pad macro FIFO"
line.long 0x14 "QUSE_WIDTH_0,QUSE_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x14 29. " QUSE_SHORTEN_2UI                           ,Shorten QUSE 2 UI (1 DRAM clock)" "No change,Shorten"
bitfld.long 0x14 28. "              QUSE_EXTEND_UI                             ,Extend QUSE 1 UI (1/2 clock)" "No change,Extend"
textline "                                  "
bitfld.long 0x14 0.--3. "  QUSE_DURATION                              ,QUSE duration" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "PUTERM_WIDTH_0,PUTERM_WIDTH_0 DRAM Timing Parameter"
bitfld.long 0x18 31. " CFG_STATIC_TERM                            ,IOBRICK internally disables termination based on DOE" "0,1"
bitfld.long 0x18 0.--3. "                      PUTERM_DURATION                            ,Additional PUTERM duration apart from default BL/2" "Disable termination,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "BGBIAS_CTL0_0,BGBIAS Pad Controls"
bitfld.long 0x1C 3. " BIAS0_DSC_E_PWRD_IBIAS_RX                  ,Bias current going out to brick receiver" "Disabled,Enabled"
bitfld.long 0x1C 2. "               BIAS0_DSC_E_PWRD_IBIAS_VTTGEN              ,Disables biasing current going out to VTTGEN cells" "No,Yes"
textline "                                  "
bitfld.long 0x1C 1. "  BIAS0_DSC_E_PWRD                           ,Disables all DC current paths within entire cell" "No,Yes"
bitfld.long 0x1C 0. "                    BIAS0_DSC_BG_SEL_N                         ,Select BandGap reference current" "Enabled,Disabled"
sif (cpuis("TEGRAX2"))
elif (cpuis("TEGRAX1"))
group.long 0x574++0x03
line.long 0x00 "AUTO_CAL_CONFIG7_0,Autocal Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQS_PD_SLOPE                      ,Slope for DQS pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQS_PU_SLOPE                      ,Slope for DQS pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQS_PD_OFFSET                     ,2's complement offset for DQS pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQS_PU_OFFSET                     ,2's complement offset for DQS pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x578++0x07
line.long 0x00 "XM2COMPPADCTRL2_0,AUTO CAL COMP Pad Control Register"
bitfld.long 0x00 17. " EMC2TMC_CFG_XM2COMP_PU_E_WKPD              ,Weak pull-down enable" "Disabled,Enabled"
bitfld.long 0x00 16. "               EMC2TMC_CFG_XM2COMP_PU_E_WKPU              ,Weak pull-up enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14.--15. "  EMC2TMC_CFG_XM2COMP_PU_DRVDN_ZCTRL         ,Drive pull-down impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x00 12.--13. "                 EMC2TMC_CFG_XM2COMP_PU_DRVUP_ZCTRL         ,Drive pull-up impedance calibration select" "40ohm,60ohm,80ohm,120ohm"
textline "                                  "
bitfld.long 0x00 10.--11. "  EMC2TMC_CFG_XM2COMP_PU_VDDA_MODE           ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 8.--9. "    EMC2TMC_CFG_XM2COMP_PU_VAXUP_MODE          ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
textline "                                  "
bitfld.long 0x00 6.--7. "  EMC2TMC_CFG_XM2COMP_PU_VCLAMP_MODE         ,Function regulator rail from adjacent IOBRICK" "00,01,10,Enable local switch"
bitfld.long 0x00 2.--5. "    EMC2TMC_CFG_XM2COMP_PU_TEST_MODE           ,Test mode select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--1. "  EMC2TMC_CFG_XM2COMP_PU_RX_MODE             ,Front-end RX type" "SCHMITT,RFU0,DIFFAMP,RFU1"
line.long 0x04 "COMP_PAD_SW_CTRL_0,AUTOCAL COMP Pad Register For Software Control Of Pad Inputs"
bitfld.long 0x04 30. " AUTO_CAL_SW_CTRL_PD_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 29. "               AUTO_CAL_SW_CTRL_PD_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 28. "  AUTO_CAL_SW_CTRL_PD_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 27. "               AUTO_CAL_SW_CTRL_PD_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 25. "  AUTO_CAL_SW_CTRL_PU_CAL_IVREF_CAL          ,IVREF_CAL_MODE pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 24. "               AUTO_CAL_SW_CTRL_PU_CAL_E_IVREF            ,E_IVREF pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 23. "  AUTO_CAL_SW_CTRL_PU_CAL_E_INPUT            ,E_INPUT pin of COMP pad slice software control" "Disabled,Enabled"
bitfld.long 0x04 22. "               AUTO_CAL_SW_CTRL_PU_CAL_EN                 ,EN pin of COMP pad slice software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 16.--21. "  AUTO_CAL_SW_CTRL_DRVDN                     ,TX_DRVDN pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--15. "                     AUTO_CAL_SW_CTRL_DRVUP                     ,TX_DRVUP pin of COMP pad slice software control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
hexmask.long.byte 0x04 2.--8. 1. "  AUTO_CAL_SW_CTRL_IVREF_LVL                 ,IVREF_LVL software control"
bitfld.long 0x04 1. "                     AUTO_CAL_SW_CTRL_BG_E_PWRD                 ,BG_E_PWRD software control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0. "  AUTO_CAL_SW_CTRL                           ,Software control of COMP pad inputs enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x02CA0000+0x20))&0x80000000)==0x80000000)
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 31. " REFPB_VALID                                ,REFpb operation enable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "               REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
else
group.long 0x580++0x03
line.long 0x00 "REFCTRL2_0,REF Control 2"
bitfld.long 0x00 24.--26. "                                                                   REFPB_PD_THRESHOLD                         ,REFpb threshold value" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 0. "  REFRESH_PER_DEVICE                         ,Refresh commands send mode" "Shared,Per device"
endif
group.long 0x584++0x03
line.long 0x00 "FBIO_CFG7_0,FBIO Configuration Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 18. " SEND_WR1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
bitfld.long 0x00 17. "               SEND_RD1_TO_BOTH_RANKS                     ,PMC LP4 - enables non-targeted rank to terminate" "Disabled,Enabled"
textline "                                   "
endif
bitfld.long 0x00 16. " FORCE_CMD_PHASE_EQ0                        ,Force DRAM command's to always be launched on phase 1" "Disabled,Enabled"
bitfld.long 0x00 15. "               DISABLE_CCDP1_WR_SPACING                   ,Write command spacing of tCCD+1 disable" "No,Yes"
textline "                                  "
bitfld.long 0x00 14. "  DISABLE_CCDP1_RD_SPACING                   ,Read command spacing of tCCD+1 disable" "No,Yes"
bitfld.long 0x00 13. "                    SUBP_ADDR_MODE                             ,DRAM SUBP address width" "x32,x16"
textline "                                  "
bitfld.long 0x00 12. "  ZQCAL_LATCH_ENABLE                         ,EMC send an LPDDR4 MPC ZQCal Latch command as part of ZQ calibration process enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               ZQCAL_MPC_ENABLE                           ,EMC send ZQCal command as LPDDR4 MPC enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. "  QPOP_RD_PREAMBLE_TOGGLE                    ,LPDDR4 read preamble toggle QPOP filter enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               CS_POLARITY                                ,DRAM chip select active polarity" "Low,High"
textline "                                  "
bitfld.long 0x00 8. "  MRR_DBI                                    ,EMC apply data bus inversion protocol to in-coming mode register read data enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               RD_DBI                                     ,EMC apply data bus inversion protocol to in-coming read data enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. "  WR_DBI                                     ,EMC write data bus inversion protocol enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               MASKED_WR                                  ,EMC issue LPDDR4 masked write command enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 4. "  LPDDR4_CMD_MAP                             ,EMC use LPDDR4 command mapping for DRAM command enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               QUSE_CCDP1_EXTEND                          ,QUSE extension through tCCD+1 spacing enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. "  CH1_ENABLE                                 ,CH1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               CH0_ENABLE                                 ,CH0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. "  DRAM_EMCCLK_2TO1                           ,Specifies how much faster is dramclk than emcclk" "1x,2x"
sif (cpuis("TEGRAX2"))
group.long 0x710++0x03
line.long 0x00 "FBIO_CFG9_0,FBIO Configuration Register"
bitfld.long 0x00 8. " USE_SELF_REF_STATE                         ,Enables RTL to use SELF_REF_CMD state" "Disabled,Enabled"
bitfld.long 0x00 4. "               ENCR_TWEAK_CHECK_ENABLE                    ,Determines the policy that EMC DRAM controller uses to determine when a read with encryption enabled can be launched to DRAM" "Off,On"
textline "                                  "
bitfld.long 0x00 3. "  ECC_ENCR_CFG_LOCK                          ,Setting this bit disables the ability for software to modify ECC_CHECK_DISABLE and ECC_ENCR_DISABLE bits" "Off,On"
bitfld.long 0x00 2. "                    ECC_DYNAMIC_BYPASS_DISABLE                 ,Setting this bit disables dynamic bypasses in EMC ECC/Encryption pipeline" "Off,On"
textline "                                  "
bitfld.long 0x00 1. "  ECC_ENCR_DISABLE                           ,Setting this bit completely bypasses EMC ECC/Encryption pipeline" "Off,On"
bitfld.long 0x00 0. "                    ECC_CHECK_DISABLE                          ,Setting this bit disables EMC ECC check/correct functions" "Off,On"
group.long 0xAC0++0x13
line.long 0x00 "ECC_CONTROL_0,ECC Control Register"
hexmask.long.byte 0x00 8.--15. 1. " ERR_BUFFER_LIMIT                           ,Error buffer limit"
bitfld.long 0x00 2. "                     ERR_BUFFER_LOAD                            ,Error Buffer Load" "No load,Load"
textline "                                  "
bitfld.long 0x00 1. "  ERR_BUFFER_RESET                           ,Error Buffer Reset" "No reset,Reset"
bitfld.long 0x00 0. "               ERR_BUFFER_MODE                            ,Error Buffer Mode" "Ring,Write stop"
rgroup.long 0xAC4++0x13
line.long 0x00 "ECC_STATUS_0,ECC Error Status"
hexmask.long.byte 0x00 24.--31. 1. " ERR_BUFFER_DEPTH                           ,The physical size (in number of entries) of ECC error buffer"
hexmask.long.byte 0x00 16.--23. 1. "                     ERR_BUFFER_CNT                             ,The number of errors physically residing in ECC error buffer"
textline "                                  "
hexmask.long.byte 0x00 8.--15. 1. "  ERR_BUFFER_WR_PTR                          ,The ECC error buffer write pointer"
hexmask.long.byte 0x00 0.--7. 1. "                     ERR_BUFFER_RD_PTR                          ,The ECC error buffer read pointer"
line.long 0x04 "ECC_STATUS_0,ECC Error Status"
hexmask.long.word 0x04 22.--31. 1. " ECC_EERR_SYNDROME_SP0                      ,Computed syndrome in ECC word"
bitfld.long 0x04 16.--17. "                   ECC_EERR_PAR_SP0                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x04 6.--15. 1. "  ECC_DERR_SYNDROME_SP0                      ,Computed syndrome in data word"
bitfld.long 0x04 3. "                   ECC_ERR_POISON_SP0                         ,Poisoned request" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 0.--1. "  ECC_DERR_PAR_SP0                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x08 "ECC_ERR_SP1_0,ECC Error Buffer - Sub-Partition 1 Errors"
hexmask.long.word 0x08 22.--31. 1. " ECC_EERR_SYNDROME_SP1                      ,Computed syndrome in ECC word"
bitfld.long 0x08 16.--17. "                   ECC_EERR_PAR_SP1                           ,Detected ECC error in ECC word" "None,Correctable,Uncorrectable,?..."
textline "                                  "
hexmask.long.word 0x08 6.--15. 1. "  ECC_DERR_SYNDROME_SP1                      ,Computed syndrome in data word"
bitfld.long 0x08 0.--1. "                   ECC_DERR_PAR_SP1                           ,Detected ECC error in data word" "None,Correctable,Uncorrectable,?..."
line.long 0x0C "ECC_ERR_ADDR_0,ECC Error Buffer - bank/row/gob"
bitfld.long 0x0C 28.--30. " ECC_ERR_BANK                               ,ECC_ERR_BANK" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x0C 8.--23. 1. "                      ECC_ERR_ROW                                ,ECC_ERR_ROW"
textline "                                  "
bitfld.long 0x0C 0.--5. "  ECC_ERR_GOB                                ,ECC_ERR_GOB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECC_ERR_REQ_0,ECC Error Buffer - Request Debug"
hexmask.long.byte 0x10 24.--31. 1. " ECC_ERR_CGID                               ,Request ID"
bitfld.long 0x10 20.--21. "                     ECC_ERR_SEQ                                ,Burst sequence" "0,1,2,3"
textline "                                  "
bitfld.long 0x10 19. "  ECC_ERR_SWAP                               ,Swap" "No swap,Swap"
bitfld.long 0x10 17.--18. "                ECC_ERR_SIZE                               ,Size" "R64B,R32B,R16B,?..."
textline "                                  "
bitfld.long 0x10 16. "  ECC_ERR_DEVICE                             ,DRAM device" "Disabled,Enabled"
bitfld.long 0x10 12.--14. "               ECC_ERR_COL_SP1                            ,GOB offset - sub-partition 1" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 8.--10. "  ECC_ERR_COL_SP0                            ,GOB offset - sub-partition 0" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--7. "                      ECC_ERR_EMC_ID                             ,EMC device/channel number" "0,1,2,3"
group.long 0xADC++0x03
line.long 0x00 "EMC_ENCR_KEY_STATUS_0,Encryption Key Distribution Status Register"
rbitfld.long 0x00 28.--31. " KEY_INIT_DONE                              ,Key distribution and expansion complete" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                     KEY_STATE_CLEAR                            ,Write one to a bit of this field will clear corresponding bit in following fields" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 8.--11. "  KEY_DISTRIB_ERR                            ,Error on serial bus detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     KEY_ACTIVE                                 ,Serial bus activity for the key was detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x588++0x27
line.long 0x00 "DATA_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x00 21.--23. " RANK0_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "                      RANK0_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 15.--17. "  RANK0_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "                      RANK0_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 9.--11. "  RANK0_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "                      RANK0_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  RANK0_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      RANK0_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x04 "DATA_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x04 21.--23. " RANK1_BYTE7_DATA_BRLSHFT                   ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 18.--20. "                      RANK1_BYTE6_DATA_BRLSHFT                   ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 15.--17. "  RANK1_BYTE5_DATA_BRLSHFT                   ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--14. "                      RANK1_BYTE4_DATA_BRLSHFT                   ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 9.--11. "  RANK1_BYTE3_DATA_BRLSHFT                   ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--8. "                      RANK1_BYTE2_DATA_BRLSHFT                   ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x04 3.--5. "  RANK1_BYTE1_DATA_BRLSHFT                   ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                      RANK1_BYTE0_DATA_BRLSHFT                   ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x08 "RFCPB_0,RFCPB_0 DRAM Timing Parameter"
hexmask.long.word 0x08 0.--8. 1. " RFCPB                                      ,Specifies the per-bank auto refresh cycle time"
line.long 0x0C "DQS_BRLSHFT_0_0,FBIO Configuration Register"
bitfld.long 0x0C 21.--23. " RANK0_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 18.--20. "                      RANK0_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 15.--17. "  RANK0_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "                      RANK0_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 9.--11. "  RANK0_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 6.--8. "                      RANK0_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x0C 3.--5. "  RANK0_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "                      RANK0_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x10 "DQS_BRLSHFT_1_0,FBIO Configuration Register"
bitfld.long 0x10 21.--23. " RANK1_BYTE7_DQS_BRLSHFT                    ,Byte 7 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 18.--20. "                      RANK1_BYTE6_DQS_BRLSHFT                    ,Byte 6 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 15.--17. "  RANK1_BYTE5_DQS_BRLSHFT                    ,Byte 5 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 12.--14. "                      RANK1_BYTE4_DQS_BRLSHFT                    ,Byte 4 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 9.--11. "  RANK1_BYTE3_DQS_BRLSHFT                    ,Byte 3 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 6.--8. "                      RANK1_BYTE2_DQS_BRLSHFT                    ,Byte 2 barrel shift setting" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x10 3.--5. "  RANK1_BYTE1_DQS_BRLSHFT                    ,Byte 1 barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 0.--2. "                      RANK1_BYTE0_DQS_BRLSHFT                    ,Byte 0 barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x14 "CMD_BRLSHFT_0_0,1T LP4 ADR Barrel Shift Setting On CH0"
bitfld.long 0x14 3.--5. " CH0_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 0.--2. "                      CH0_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x18 "CMD_BRLSHFT_1_0,1T LP4 ADR Barrel Shift Setting On CH1"
bitfld.long 0x18 3.--5. " CH1_SUBP1_1T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 0.--2. "                      CH1_SUBP0_1T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x1C "CMD_BRLSHFT_2_0,2T Signal Barrel Shift Setting On CH0"
bitfld.long 0x1C 3.--5. " CH0_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x1C 0.--2. "                      CH0_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x20 "CMD_BRLSHFT_3_0,2T Signal Barrel Shift Setting On CH1"
bitfld.long 0x20 3.--5. " CH1_SUBP1_2T_BRLSHFT                       ,Subp 1 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                      CH1_SUBP0_2T_BRLSHFT                       ,Subp 0 CMD|ADR barrel shift setting" "0,1,2,3,4,5,6,7"
line.long 0x24 "QUSE_BRLSHFT_0_0,Quse Barrel Shift 0"
bitfld.long 0x24 15.--19. " RANK0_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 10.--14. "                     RANK0_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x24 5.--9. "  RANK0_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 0.--4. "                     RANK0_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
else
group.long 0x5B0++0x03
line.long 0x00 "AUTO_CAL_CONFIG4_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CA_PD_SLOPE                       ,Slope for CA pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CA_PU_SLOPE                       ,Slope for CA pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CA_PD_OFFSET                      ,2's complement offset for CA pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CA_PU_OFFSET                      ,2's complement offset for CA pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
sif (cpuis("TEGRAX2"))
else
group.long 0x5B4++0x03
line.long 0x00 "AUTO_CAL_CONFIG5_0,AUTOCAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_CMD_PD_SLOPE                      ,Slope for CMD pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_CMD_PU_SLOPE                      ,Slope for CMD pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_CMD_PD_OFFSET                     ,2's complement offset for CMD pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_CMD_PU_OFFSET                     ,2's complement offset for CMD pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x5B8++0x13
line.long 0x00 "QUSE_BRLSHFT_1_0,Quse Barrel Shift 1"
bitfld.long 0x00 15.--19. " RANK0_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "                     RANK0_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x00 5.--9. "  RANK0_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                     RANK0_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "QUSE_BRLSHFT_2_0,Quse Barrel Shift 2"
bitfld.long 0x04 15.--19. " RANK1_BYTE3_QUSE_BRLSHFT                   ,Byte 3 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 10.--14. "                     RANK1_BYTE2_QUSE_BRLSHFT                   ,Byte 2 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x04 5.--9. "  RANK1_BYTE1_QUSE_BRLSHFT                   ,Byte 1 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     RANK1_BYTE0_QUSE_BRLSHFT                   ,Byte 0 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CCDMW_0,CCDMW_0 DRAM Timing Parameter"
bitfld.long 0x08 0.--5. " CCDMW                                      ,DRAM CAS to CAS delay timing when the current command is any type of write and the next command is a masked write to the same bank" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "QUSE_BRLSHFT_3_0,Quse Barrel Shift 3"
bitfld.long 0x0C 15.--19. " RANK1_BYTE7_QUSE_BRLSHFT                   ,Byte 7 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 10.--14. "                     RANK1_BYTE6_QUSE_BRLSHFT                   ,Byte 6 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                  "
bitfld.long 0x0C 5.--9. "  RANK1_BYTE5_QUSE_BRLSHFT                   ,Byte 5 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "                     RANK1_BYTE4_QUSE_BRLSHFT                   ,Byte 4 QUSE barrel shift setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x10 "FBIO_CFG8_0,FBIO Configuration Register"
bitfld.long 0x10 27. " EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK11      ,Clock to data control signals in pipe stages of brick 11 enable" "Disabled,Enabled"
bitfld.long 0x10 26. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK10      ,Clock to data control signals in pipe stages of brick 10 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 25. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK9       ,Clock to data control signals in pipe stages of brick 9 enable" "Disabled,Enabled"
bitfld.long 0x10 24. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK8       ,Clock to data control signals in pipe stages of brick 8 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 23. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK7       ,Clock to data control signals in pipe stages of brick 7 enable" "Disabled,Enabled"
bitfld.long 0x10 22. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK6       ,Clock to data control signals in pipe stages of brick 6 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 21. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK5       ,Clock to data control signals in pipe stages of brick 5 enable" "Disabled,Enabled"
bitfld.long 0x10 20. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK4       ,Clock to data control signals in pipe stages of brick 4 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 19. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK3       ,Clock to data control signals in pipe stages of brick 3 enable" "Disabled,Enabled"
bitfld.long 0x10 18. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK2       ,Clock to data control signals in pipe stages of brick 2 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 17. "  EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK1       ,Clock to data control signals in pipe stages of brick 1 enable" "Disabled,Enabled"
bitfld.long 0x10 16. "               EMC2PMACRO_CFG_PIPE_DATA_MODE_BRICK0       ,Clock to data control signals in pipe stages of brick 0 enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x10 15. "  RANK_SWIZZLE                               ,Asymmetric DRAM size while size of rank1>rank0 enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
else
group.long 0x5CC++0x03
line.long 0x00 "AUTO_CAL_CONIG6_0,AUTO CAL Master Compute Control Register"
bitfld.long 0x00 20.--22. " AUTO_CAL_DQ_PD_SLOPE                       ,Slope for DQ pull-down value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
bitfld.long 0x00 16.--18. "                  AUTO_CAL_DQ_PU_SLOPE                       ,Slope for DQ pull-up value" "0.125,0.250,0.375,0.500,0.625,0.750,0.875,1.000"
textline "                                  "
bitfld.long 0x00 8.--13. "  AUTO_CAL_DQ_PD_OFFSET                      ,2's complement offset for DQ pull-down value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     AUTO_CAL_DQ_PU_OFFSET                      ,2's complement offset for DQ pull-up value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
wgroup.long 0x5D0++0x07
line.long 0x00 "PROTOBIST_CONFIG_ADR_1_0,Protocol BIST Register"
bitfld.long 0x00 29. " PROTOBIST_APC                              ,Controls the auto-precharge function of transaction" "0,1"
bitfld.long 0x00 28. "                      PROTOBIST_A_RDY                            ,Indicates active interface is ready" "Not ready,Ready"
textline "                                  "
hexmask.long.word 0x00 12.--27. 1. "  PROTOBIST_A_ROW                            ,Row control during protobist mode"
bitfld.long 0x00 11. "                   PROTOBIST_A_REF                            ,Refresh control during active request in protobist" "0,1"
textline "                                  "
bitfld.long 0x00 9.--10. "  PROTOBIST_A_DEV                            ,Devsel control during active request in protobist" "0,1,2,3"
bitfld.long 0x00 6.--8. "                      PROTOBIST_BANK                             ,Bank control during transfer request in protobist" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 3.--5. "  PROTOBIST_A_BANK                           ,Bank control during active request in protobist" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "                      PROTOBIST_A_BANK1                          ,Bank 1 control during active request in protobist" "0,1,2,3,4,5,6,7"
line.long 0x04 "PROTOBIST_CONFIG_ADR_2_0,Protocol BIST Register"
bitfld.long 0x04 28. " PROTOBIST_SWAP                             ,Swap control during protobist mode" "0,1"
bitfld.long 0x04 26.--27. "                      PROTOBIST_SIZE                             ,Size control during protobist mode" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 25. "  PROTOBIST_MASKED_WRITE                     ,Mask write control during protobist mode" "0,1"
bitfld.long 0x04 24. "                      PROTOBIST_T_DEV                            ,Dev control during Xfre request of protobist mode" "0,1"
textline "                                  "
bitfld.long 0x04 21.--23. "  PROTOBIST_T_COL1                           ,Column 1 control during transfer request during protobist mode" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x04 9.--20. 1. "                      PROTOBIST_T_COL                            ,Column control during protobist"
textline "                                  "
bitfld.long 0x04 8. "  PROTOBIST_T_RDY                            ,Indicates transfer interface is ready" "Not ready,Ready"
hexmask.long.byte 0x04 0.--7. 1. "              PROTOBIST_CGID                             ,Request ID of transaction control"
group.long 0x5D8++0x0B
line.long 0x00 "PROTOBIST_MISC_0,Protocol BIST Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " PROTOBIST_RESET                            ,PROTOBIST reset" "No reset,Reset"
textline "                                   "
endif
bitfld.long 0x00 16.--18. " PROTOBIST_REQ                              ,Protobist request" "0,1,2,3,4,5,6,7"
rbitfld.long 0x00 15. "                      PROTOBIST_READ_ACK                         ,Protobist read ACK" "0,1"
textline "                                  "
bitfld.long 0x00 14. "  PROTOBIST_START                            ,Protobist start" "0,1"
bitfld.long 0x00 13. "                      PROTOBIST_W_BE                             ,Protobist mode control for byte enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. "  PROTOBIST_MODE                             ,Protobist mode control indicates bist mode" "0,1"
bitfld.long 0x00 8.--11. "                      PROTOBIST_RDI_SEL                          ,Protobist RDI select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. "  PROTOBIST_TAG                              ,Protobist mode tag control"
line.long 0x04 "PROTOBIST_WDATA_LOWER_0,Protocol BIST Lower Register"
line.long 0x08 "PROTOBIST_WDATA_UPPER_0,Protocol BIST Upper Register"
rgroup.long 0x5EC++0x03
line.long 0x00 "PROTOCOL_RDATA_0,Protocol BIST Register"
group.long 0x5E4++0x07
line.long 0x00 "DLL_CFG_0_0,DLL Calibration Configuration Register 0"
bitfld.long 0x00 29. " DDLLCAL_CTRL_IGNORE_START                  ,Ignore DLLCAL start trim priv value" "0,1"
bitfld.long 0x00 28. "                      DDLLCAL_CTRL_DUAL_PASS_LOCK                ,2 pass lock" "0,1"
textline "                                  "
bitfld.long 0x00 24.--27. "  DDLLCAL_CTRL_STEP_SIZE                     ,Calibration step size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                     DDLLCAL_CTRL_END_COUNT                     ,End count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 16.--19. "  DDLLCAL_CTRL_FILTER_BITS                   ,Filter bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                     DDLLCAL_CTRL_SAMPLE_COUNT                  ,Number of samples to take" "1,2,2^2,2^3,2^4,2^5,2^6,2^7,2^8,2^9,2^10,2^11,2^12,2^13,2^14,2^15"
textline "                                  "
hexmask.long.byte 0x00 4.--11. 1. "  DDLLCAL_CTRL_SAMPLE_DELAY                  ,Delay to allow DLL value to settle"
bitfld.long 0x00 0.--3. "                     DDLLCAL_UPDATE_CNT_LIMIT                   ,Wait cycles for priv update" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_1_0,DLL Calibration Configuration Register 1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 28.--29. " DDLL_VTTCDB_SPARE                          ,RFU" "0,1,2,3"
bitfld.long 0x04 24.--25. "                      DDLL_VTTDDLL_SPARE                         ,RFU" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 22. "  DDLL_VTTLP_VDDA_E_REGSW                    ,Active high. Enable to switch to low power regulator" "Low,High"
bitfld.long 0x04 21. "                   DDLL_VTTDDLL_VDDA_E_REG                    ,Enable DLL regulator" "0,1"
textline "                                  "
bitfld.long 0x04 20. "  DDLL_VTTDDLL_E_WB                          ,Active high to enable the weak bias for DDLL" "0,1"
textline "                                   "
endif
bitfld.long 0x04 16. " DDLL_BYPASS                                ,Bypass" "0,1"
bitfld.long 0x04 12.--15. "                      DDLL_RFU                                   ,RFU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 11. "  E_DDLL_PWRD                                ,Master DLL powerdown" "0,1"
hexmask.long.word 0x04 0.--10. 1. "                      DDLLCAL_CTRL_START_TRIM                    ,Calibration start value"
group.long 0x5F0++0x07
line.long 0x00 "CONFIG_SAMPLE_DELAY_0,Config Sample Delay"
hexmask.long.byte 0x00 0.--6. 1. " PMACRO_SAMPLE_DELAY                        ,Delay between sending pad macro configuration read and sampling of the read return data (in emcclk ticks)"
line.long 0x04 "CFG_UPDATE_0,Timing Updates Special Features Control"
bitfld.long 0x04 31. " STALL_READS_DURING_TIMING_UPDATE           ,Disallow configuration reads during a timing update" "Allow,Disallow"
bitfld.long 0x04 30. "               STALL_WRITES_DURING_TIMING_UPDATE          ,Disallow configuration writes during a timing update" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 29. "  LINKED_TIMING_UPDATE_TIMEOUT               ,Linked timing update after 16k emcclk ticks enable" "Disabled,Enabled"
bitfld.long 0x04 28. "               LINKED_TIMING_UPDATE                       ,Allow per-channel TIMING_UPDATE requests" "Allow,Disallow"
textline "                                  "
bitfld.long 0x04 9.--10. "  UPDATE_DLL_IN_UPDATE                       ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 8. "                UPDATE_DLL_IN_CLKCHANGE                    ,Allow a pad macro DLL update to be triggered during a clock change timing update" "Disallow,Allow"
textline "                                  "
bitfld.long 0x04 1.--2. "  UPDATE_AUTOCAL_IN_UPDATE                   ,When to allow a pad macro autocal update to be triggered from a manual timing update" "Never,Written,Always,?..."
bitfld.long 0x04 0. "                UPDATE_AUTO_CAL_IN_CLKCHANGE               ,Allow a pad macro autocal update to be triggered during a clock change timing update" "Disallow,Allow"
sif (cpuis("TEGRAX2"))
group.long 0x5F8++0x07
line.long 0x00 "DLL_CFG_2_0,DLL Config register 2"
bitfld.long 0x00 4.--7. " DDLL_VTTCDB_VDDA_LVL                       ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                     DDLL_VTTDDLL_VDDA_LVL                      ,Level select for VDDA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "DLL_CFG_3_0,DLL Config register 3"
bitfld.long 0x04 20.--21. " DDLL_VTTCDB_VDDA_WB_CTRL                   ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
bitfld.long 0x04 16.--17. "    DDLL_VTTDDLL_VDDA_WB_CTRL                  ,Weak Bias level control" "Higher level,Default level,Lower level,Further lower level"
textline "                                  "
bitfld.long 0x04 8.--12. "  DDLL_VTTCDB_VDDA_CTRL                      ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                     DDLL_VTTDDLL_VDDA_CTRL                     ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
width 15.
tree "PMACRO Registers"
tree "QUSE DDLL Register"
group.long 0x600++0x03
line.long 0x00 "RANK0_0_0,Rank 0 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank0 byte0"
group.long 0x604++0x03
line.long 0x00 "RANK0_1_0,Rank 0 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank0 byte2"
group.long 0x608++0x03
line.long 0x00 "RANK0_2_0,Rank 0 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank0 byte4"
group.long 0x60C++0x03
line.long 0x00 "RANK0_3_0,Rank 0 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank0 byte6"
group.long 0x610++0x03
line.long 0x00 "RANK0_4_0,Rank 0 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank0 command0"
group.long 0x614++0x03
line.long 0x00 "RANK0_5_0,Rank 0 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank0 command2"
textline "                                             "
group.long 0x620++0x03
line.long 0x00 "RANK1_0_0,Rank 1 QUSE DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to QUSE trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to QUSE trimmer value for rank1 byte0"
group.long 0x624++0x03
line.long 0x00 "RANK1_1_0,Rank 1 QUSE DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to QUSE trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to QUSE trimmer value for rank1 byte2"
group.long 0x628++0x03
line.long 0x00 "RANK1_2_0,Rank 1 QUSE DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to QUSE trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to QUSE trimmer value for rank1 byte4"
group.long 0x62C++0x03
line.long 0x00 "RANK1_3_0,Rank 1 QUSE DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to QUSE trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to QUSE trimmer value for rank1 byte6"
group.long 0x630++0x03
line.long 0x00 "RANK1_4_0,Rank 1 CMD DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to QUSE trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to QUSE trimmer value for rank1 command0"
group.long 0x634++0x03
line.long 0x00 "RANK1_5_0,Rank 1 CMD DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to QUSE trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to QUSE trimmer value for rank1 command2"
tree.end
tree "OB DDLL Long Registers"
group.long 0x640++0x03
line.long 0x00 "DQ_RANK0_0_0,Rank 0 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank0 byte0"
group.long 0x644++0x03
line.long 0x00 "DQ_RANK0_1_0,Rank 0 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank0 byte2"
group.long 0x648++0x03
line.long 0x00 "DQ_RANK0_2_0,Rank 0 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank0 byte4"
group.long 0x64C++0x03
line.long 0x00 "DQ_RANK0_3_0,Rank 0 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank0 byte6"
group.long 0x650++0x03
line.long 0x00 "DQ_RANK0_4_0,Rank 0 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank0 command0"
group.long 0x654++0x03
line.long 0x00 "DQ_RANK0_5_0,Rank 0 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank0 command2"
textline "                                             "
group.long 0x660++0x03
line.long 0x00 "DQ_RANK1_0_0,Rank 1 OB Long DQ DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB trimmer value for rank1 byte0"
group.long 0x664++0x03
line.long 0x00 "DQ_RANK1_1_0,Rank 1 OB Long DQ DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB trimmer value for rank1 byte2"
group.long 0x668++0x03
line.long 0x00 "DQ_RANK1_2_0,Rank 1 OB Long DQ DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB trimmer value for rank1 byte4"
group.long 0x66C++0x03
line.long 0x00 "DQ_RANK1_3_0,Rank 1 OB Long DQ DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB trimmer value for rank1 byte6"
group.long 0x670++0x03
line.long 0x00 "DQ_RANK1_4_0,Rank 1 OB Long DQ DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB trimmer value for rank1 command0"
group.long 0x674++0x03
line.long 0x00 "DQ_RANK1_5_0,Rank 1 OB Long DQ DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB trimmer value for rank1 command2"
textline "                                             "
group.long 0x680++0x03
line.long 0x00 "DQS_RANK0_0_0,Rank 0 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank0 byte0"
group.long 0x684++0x03
line.long 0x00 "DQS_RANK0_1_0,Rank 0 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank0 byte2"
group.long 0x688++0x03
line.long 0x00 "DQS_RANK0_2_0,Rank 0 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank0 byte4"
group.long 0x68C++0x03
line.long 0x00 "DQS_RANK0_3_0,Rank 0 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank0 byte6"
group.long 0x690++0x03
line.long 0x00 "DQS_RANK0_4_0,Rank 0 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank0 Command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank0 Command0"
group.long 0x694++0x03
line.long 0x00 "DQS_RANK0_5_0,Rank 0 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank0 Command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank0 Command2"
textline "                                             "
group.long 0x6A0++0x03
line.long 0x00 "DQS_RANK1_0_0,Rank 1 OB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to OB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to OB DQS trimmer value for rank1 byte0"
group.long 0x6A4++0x03
line.long 0x00 "DQS_RANK1_1_0,Rank 1 OB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to OB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to OB DQS trimmer value for rank1 byte2"
group.long 0x6A8++0x03
line.long 0x00 "DQS_RANK1_2_0,Rank 1 OB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to OB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to OB DQS trimmer value for rank1 byte4"
group.long 0x6AC++0x03
line.long 0x00 "DQS_RANK1_3_0,Rank 1 OB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to OB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to OB DQS trimmer value for rank1 byte6"
group.long 0x6B0++0x03
line.long 0x00 "DQS_RANK1_4_0,Rank 1 OB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to OB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to OB DQS trimmer value for rank1 command0"
group.long 0x6B4++0x03
line.long 0x00 "DQS_RANK1_5_0,Rank 1 OB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to OB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to OB DQS trimmer value for rank1 command2"
tree.end
tree "IB DDLL DQS Long Registers"
group.long 0x6C0++0x03
line.long 0x00 "RANK0_0_0,Rank 0 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank0 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank0 byte0"
group.long 0x6C4++0x03
line.long 0x00 "RANK0_1_0,Rank 0 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank0 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank0 byte2"
group.long 0x6C8++0x03
line.long 0x00 "RANK0_2_0,Rank 0 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank0 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank0 byte4"
group.long 0x6CC++0x03
line.long 0x00 "RANK0_3_0,Rank 0 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank0 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank0 byte6"
group.long 0x6D0++0x03
line.long 0x00 "RANK0_4_0,Rank 0 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank0 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank0 command0"
group.long 0x6D4++0x03
line.long 0x00 "RANK0_5_0,Rank 0 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank0 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank0 command2"
textline "                                             "
group.long 0x6E0++0x03
line.long 0x00 "RANK1_0_0,Rank 1 IB Long DQS DDLL Value For Byte0 And Byte1"
hexmask.long.word 0x00 16.--26. 1. " BYTE1    ,Programmed to IB DQS trimmer value for rank1 byte1"
hexmask.long.word 0x00 0.--10. 1. "     BYTE0    ,Programmed to IB DQS trimmer value for rank1 byte0"
group.long 0x6E4++0x03
line.long 0x00 "RANK1_1_0,Rank 1 IB Long DQS DDLL Value For Byte2 And Byte3"
hexmask.long.word 0x00 16.--26. 1. " BYTE3    ,Programmed to IB DQS trimmer value for rank1 byte3"
hexmask.long.word 0x00 0.--10. 1. "     BYTE2    ,Programmed to IB DQS trimmer value for rank1 byte2"
group.long 0x6E8++0x03
line.long 0x00 "RANK1_2_0,Rank 1 IB Long DQS DDLL Value For Byte4 And Byte5"
hexmask.long.word 0x00 16.--26. 1. " BYTE5    ,Programmed to IB DQS trimmer value for rank1 byte5"
hexmask.long.word 0x00 0.--10. 1. "     BYTE4    ,Programmed to IB DQS trimmer value for rank1 byte4"
group.long 0x6EC++0x03
line.long 0x00 "RANK1_3_0,Rank 1 IB Long DQS DDLL Value For Byte6 And Byte7"
hexmask.long.word 0x00 16.--26. 1. " BYTE7    ,Programmed to IB DQS trimmer value for rank1 byte7"
hexmask.long.word 0x00 0.--10. 1. "     BYTE6    ,Programmed to IB DQS trimmer value for rank1 byte6"
group.long 0x6F0++0x03
line.long 0x00 "RANK1_4_0,Rank 1 IB Long DQS DDLL Value For Command0 And Command1"
hexmask.long.word 0x00 16.--26. 1. " CMD1     ,Programmed to IB DQS trimmer value for rank1 command1"
hexmask.long.word 0x00 0.--10. 1. "     CMD0     ,Programmed to IB DQS trimmer value for rank1 command0"
group.long 0x6F4++0x03
line.long 0x00 "RANK1_5_0,Rank 1 IB Long DQS DDLL Value For Command2 And Command3"
hexmask.long.word 0x00 16.--26. 1. " CMD3     ,Programmed to IB DQS trimmer value for rank1 command3"
hexmask.long.word 0x00 0.--10. 1. "     CMD2     ,Programmed to IB DQS trimmer value for rank1 command2"
tree.end
textline "                                             "
width 22.
group.long 0x700++0x03
line.long 0x00 "AUTOCAL_CFG_0_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE3           ,DQS E_CAL_UPDATE byte BYTE3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE2           ,DQS E_CAL_UPDATE byte BYTE2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE1           ,DQS E_CAL_UPDATE byte BYTE1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE0           ,DQS E_CAL_UPDATE byte BYTE0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x704++0x03
line.long 0x00 "AUTOCAL_CFG_1_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_BYTE7           ,DQS E_CAL_UPDATE byte BYTE7" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_BYTE7           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_BYTE7         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_BYTE7       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_BYTE6           ,DQS E_CAL_UPDATE byte BYTE6" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_BYTE6           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_BYTE6         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_BYTE6       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_BYTE5           ,DQS E_CAL_UPDATE byte BYTE5" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_BYTE5           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_BYTE5         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_BYTE5       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_BYTE4           ,DQS E_CAL_UPDATE byte BYTE4" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_BYTE4           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_BYTE4         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_BYTE4       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x708++0x03
line.long 0x00 "AUTOCAL_CFG_2_0,IOBRICK Controls AUTO CAL PADMACRO Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 27. " DQS_E_CAL_UPDATE_CMD3           ,DQS E_CAL_UPDATE byte CMD3" "Disabled,Enabled"
textline "                      "
textfld "         "
endif
bitfld.long 0x00 26. " DQS_E_CAL_BYPASS_CMD3           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 25. "               DQS_DRV_SEL_CMD3         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 24. "                   CMD_DRV_SEL_CMD3       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. "          DQS_E_CAL_UPDATE_CMD2           ,DQS E_CAL_UPDATE byte CMD2" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 18. "          DQS_E_CAL_BYPASS_CMD2           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 17. "               DQS_DRV_SEL_CMD2         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 16. "                   CMD_DRV_SEL_CMD2       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 11. "          DQS_E_CAL_UPDATE_CMD1           ,DQS E_CAL_UPDATE byte CMD1" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 10. "          DQS_E_CAL_BYPASS_CMD1           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 9. "               DQS_DRV_SEL_CMD1         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 8. "                   CMD_DRV_SEL_CMD1       ,CMD pad calibration codes select" "CMD,CA"
textline "                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 3. "          DQS_E_CAL_UPDATE_CMD0           ,DQS E_CAL_UPDATE byte CMD0" "Disabled,Enabled"
textline "                      "
endif
bitfld.long 0x00 2. "          DQS_E_CAL_BYPASS_CMD0           ,Ignore E_CAL_UPDATE pulse and apply DRVUP|DRVDN calibration codes immediately" "Disabled,Enabled"
bitfld.long 0x00 1. "               DQS_DRV_SEL_CMD0         ,DQS pad calibration codes select" "DQS,CA"
bitfld.long 0x00 0. "                   CMD_DRV_SEL_CMD0       ,CMD pad calibration codes select" "CMD,CA"
group.long 0x720++0x03
line.long 0x00 "TX_PWRD_0_0,Clock Gate Register For Unused TX Bits In Byte1 And Byte0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE1              ,Byte1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE1       ,Byte1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE1        ,Programmed to TX PWRD value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE1      ,Programmed to TX PWRD value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE1                ,Programmed to TX PWRD value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE1         ,Programmed to TX PWRD value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE1       ,Programmed to TX PWRD value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE0              ,Byte0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE0       ,Byte0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE0        ,Programmed to TX PWRD value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE0      ,Programmed to TX PWRD value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE0                ,Programmed to TX PWRD value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE0         ,Programmed to TX PWRD value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE0       ,Programmed to TX PWRD value for DQ bit0 of Byte0" "0,1"
group.long 0x724++0x03
line.long 0x00 "TX_PWRD_1_0,Clock Gate Register For Unused TX Bits In Byte3 And Byte2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE3              ,Byte3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE3       ,Byte3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE3        ,Programmed to TX PWRD value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE3      ,Programmed to TX PWRD value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE3                ,Programmed to TX PWRD value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE3         ,Programmed to TX PWRD value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE3       ,Programmed to TX PWRD value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE2              ,Byte2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE2       ,Byte2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE2        ,Programmed to TX PWRD value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE2      ,Programmed to TX PWRD value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE2                ,Programmed to TX PWRD value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE2         ,Programmed to TX PWRD value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE2       ,Programmed to TX PWRD value for DQ bit0 of Byte2" "0,1"
group.long 0x728++0x03
line.long 0x00 "TX_PWRD_2_0,Clock Gate Register For Unused TX Bits In Byte5 And Byte4 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE5              ,Byte5 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE5       ,Byte5 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE5        ,Programmed to TX PWRD value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE5      ,Programmed to TX PWRD value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE5                ,Programmed to TX PWRD value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE5         ,Programmed to TX PWRD value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE5       ,Programmed to TX PWRD value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE4              ,Byte4 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE4       ,Byte4 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE4        ,Programmed to TX PWRD value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE4      ,Programmed to TX PWRD value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE4                ,Programmed to TX PWRD value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE4         ,Programmed to TX PWRD value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE4       ,Programmed to TX PWRD value for DQ bit0 of Byte4" "0,1"
group.long 0x72C++0x03
line.long 0x00 "TX_PWRD_3_0,Clock Gate Register For Unused TX Bits In Byte7 And Byte6 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_BYTE7              ,Byte7 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_BYTE7       ,Byte7 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_BYTE7        ,Programmed to TX PWRD value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_BYTE7      ,Programmed to TX PWRD value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_BYTE7                ,Programmed to TX PWRD value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_BYTE7         ,Programmed to TX PWRD value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_BYTE7       ,Programmed to TX PWRD value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_BYTE6              ,Byte6 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_BYTE6       ,Byte6 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_BYTE6        ,Programmed to TX PWRD value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_BYTE6      ,Programmed to TX PWRD value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_BYTE6                ,Programmed to TX PWRD value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_BYTE6         ,Programmed to TX PWRD value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_BYTE6       ,Programmed to TX PWRD value for DQ bit0 of Byte6" "0,1"
group.long 0x730++0x03
line.long 0x00 "TX_PWRD_4_0,Clock Gate Register For Unused TX Bits In Cmd1 And Cmd0 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD1              ,Cmd1 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD1       ,Cmd1 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD1                ,Programmed to TX PWRD value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD1        ,Programmed to TX PWRD value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD1      ,Programmed to TX PWRD value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD1                ,Programmed to TX PWRD value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD1         ,Programmed to TX PWRD value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD1       ,Programmed to TX PWRD value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD0              ,Cmd0 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD0       ,Cmd0 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD0                ,Programmed to TX PWRD value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD0        ,Programmed to TX PWRD value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD0      ,Programmed to TX PWRD value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD0                ,Programmed to TX PWRD value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD0         ,Programmed to TX PWRD value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD0       ,Programmed to TX PWRD value for DQ bit0 of Cmd0" "0,1"
group.long 0x734++0x03
line.long 0x00 "TX_PWRD_5_0,Clock Gate Register For Unused TX Bits In Cmd3 And Cmd2 Brick"
bitfld.long 0x00 29. " CMD_TX_E_WKPD_CMD3              ,Cmd3 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 28. "               CMD_TX_E_WKPU_CMD3       ,Cmd3 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          CMD_TX_PWRD_CMD3                ,Programmed to TX PWRD value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "                      DQSN_TX_PWRD_CMD3        ,Programmed to TX PWRD value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "                     DQSP_TX_PWRD_CMD3      ,Programmed to TX PWRD value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "                      DQ7_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "                     DQ6_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "                      DQ4_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "                     DQ3_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_PWRD_CMD3                ,Programmed to TX PWRD value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "                      DQ1_TX_PWRD_CMD3         ,Programmed to TX PWRD value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "                     DQ0_TX_PWRD_CMD3       ,Programmed to TX PWRD value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 13. "          CMD_TX_E_WKPD_CMD2              ,Cmd2 weak pull down enable" "Disabled,Enabled"
bitfld.long 0x00 12. "               CMD_TX_E_WKPU_CMD2       ,Cmd2 weak pull up enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_PWRD_CMD2                ,Programmed to TX PWRD value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "                      DQSN_TX_PWRD_CMD2        ,Programmed to TX PWRD value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "                     DQSP_TX_PWRD_CMD2      ,Programmed to TX PWRD value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "                      DQ7_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "                     DQ6_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "                      DQ4_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "                     DQ3_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_PWRD_CMD2                ,Programmed to TX PWRD value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "                      DQ1_TX_PWRD_CMD2         ,Programmed to TX PWRD value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "                     DQ0_TX_PWRD_CMD2       ,Programmed to TX PWRD value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x740++0x03
line.long 0x00 "TX_SEL_CLK_SRC_0_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for CMD pin of Byte1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSN of Byte1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQSP of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit8 of Byte1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit7 of Byte1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit6 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit5 of Byte1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit4 of Byte1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit3 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE1        ,Programmed to TX clock source select value for DQ bit2 of Byte1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit1 of Byte1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE1         ,Programmed to TX clock source select value for DQ bit0 of Byte1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for CMD pin of Byte0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSN of Byte0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQSP of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit8 of Byte0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit7 of Byte0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit6 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit5 of Byte0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit4 of Byte0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit3 of Byte0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE0        ,Programmed to TX clock source select value for DQ bit2 of Byte0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit1 of Byte0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE0         ,Programmed to TX clock source select value for DQ bit0 of Byte0" "0,1"
group.long 0x744++0x03
line.long 0x00 "TX_SEL_CLK_SRC_1_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for CMD pin of Byte3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSN of Byte3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQSP of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit8 of Byte3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit7 of Byte3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit6 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit5 of Byte3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit4 of Byte3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit3 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE3        ,Programmed to TX clock source select value for DQ bit2 of Byte3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit1 of Byte3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE3         ,Programmed to TX clock source select value for DQ bit0 of Byte3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for CMD pin of Byte2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSN of Byte2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQSP of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit8 of Byte2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit7 of Byte2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit6 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit5 of Byte2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit4 of Byte2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit3 of Byte2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE2        ,Programmed to TX clock source select value for DQ bit2 of Byte2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit1 of Byte2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE2         ,Programmed to TX clock source select value for DQ bit0 of Byte2" "0,1"
group.long 0x748++0x03
line.long 0x00 "TX_SEL_CLK_SRC_2_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for CMD pin of Byte5" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSN of Byte5" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQSP of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit8 of Byte5" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit7 of Byte5" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit6 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit5 of Byte5" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit4 of Byte5" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit3 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE5        ,Programmed to TX clock source select value for DQ bit2 of Byte5" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit1 of Byte5" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE5         ,Programmed to TX clock source select value for DQ bit0 of Byte5" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for CMD pin of Byte4" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSN of Byte4" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQSP of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit8 of Byte4" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit7 of Byte4" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit6 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit5 of Byte4" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit4 of Byte4" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit3 of Byte4" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE4        ,Programmed to TX clock source select value for DQ bit2 of Byte4" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit1 of Byte4" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE4         ,Programmed to TX clock source select value for DQ bit0 of Byte4" "0,1"
group.long 0x74C++0x03
line.long 0x00 "TX_SEL_CLK_SRC_3_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for CMD pin of Byte7" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSN of Byte7" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQSP of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit8 of Byte7" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit7 of Byte7" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit6 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit5 of Byte7" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit4 of Byte7" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit3 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_BYTE7        ,Programmed to TX clock source select value for DQ bit2 of Byte7" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit1 of Byte7" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_BYTE7         ,Programmed to TX clock source select value for DQ bit0 of Byte7" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for CMD pin of Byte6" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSN of Byte6" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQSP of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit8 of Byte6" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit7 of Byte6" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit6 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit5 of Byte6" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit4 of Byte6" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit3 of Byte6" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_BYTE6        ,Programmed to TX clock source select value for DQ bit2 of Byte6" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit1 of Byte6" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_BYTE6         ,Programmed to TX clock source select value for DQ bit0 of Byte6" "0,1"
group.long 0x750++0x03
line.long 0x00 "TX_SEL_CLK_SRC_4_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for CMD pin of Cmd1" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSN of Cmd1" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQSP of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit8 of Cmd1" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit7 of Cmd1" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit6 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit5 of Cmd1" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit4 of Cmd1" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit3 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD1        ,Programmed to TX clock source select value for DQ bit2 of Cmd1" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit1 of Cmd1" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD1         ,Programmed to TX clock source select value for DQ bit0 of Cmd1" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for CMD pin of Cmd0" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSN of Cmd0" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQSP of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit8 of Cmd0" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit7 of Cmd0" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit6 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit5 of Cmd0" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit4 of Cmd0" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit3 of Cmd0" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD0        ,Programmed to TX clock source select value for DQ bit2 of Cmd0" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit1 of Cmd0" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD0         ,Programmed to TX clock source select value for DQ bit0 of Cmd0" "0,1"
group.long 0x754++0x03
line.long 0x00 "TX_SEL_CLK_SRC_5_0,Clock Source Select Register For 0.5T And 1.0T When Brick Is Configured As ADDR|CMD Brick"
bitfld.long 0x00 27. " CMD_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for CMD pin of Cmd3" "0,1"
bitfld.long 0x00 26. "       DQSN_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSN of Cmd3" "0,1"
bitfld.long 0x00 25. "       DQSP_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQSP of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 24. "          DQ8_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit8 of Cmd3" "0,1"
bitfld.long 0x00 23. "       DQ7_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit7 of Cmd3" "0,1"
bitfld.long 0x00 22. "       DQ6_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit6 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 21. "          DQ5_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit5 of Cmd3" "0,1"
bitfld.long 0x00 20. "       DQ4_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit4 of Cmd3" "0,1"
bitfld.long 0x00 19. "       DQ3_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit3 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 18. "          DQ2_TX_SEL_CLK_SRC_CMD3        ,Programmed to TX clock source select value for DQ bit2 of Cmd3" "0,1"
bitfld.long 0x00 17. "       DQ1_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit1 of Cmd3" "0,1"
bitfld.long 0x00 16. "       DQ0_TX_SEL_CLK_SRC_CMD3         ,Programmed to TX clock source select value for DQ bit0 of Cmd3" "0,1"
textline "                      "
bitfld.long 0x00 11. "          CMD_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for CMD pin of Cmd2" "0,1"
bitfld.long 0x00 10. "       DQSN_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSN of Cmd2" "0,1"
bitfld.long 0x00 9. "       DQSP_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQSP of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DQ8_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit8 of Cmd2" "0,1"
bitfld.long 0x00 7. "       DQ7_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit7 of Cmd2" "0,1"
bitfld.long 0x00 6. "       DQ6_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit6 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 5. "          DQ5_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit5 of Cmd2" "0,1"
bitfld.long 0x00 4. "       DQ4_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit4 of Cmd2" "0,1"
bitfld.long 0x00 3. "       DQ3_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit3 of Cmd2" "0,1"
textline "                      "
bitfld.long 0x00 2. "          DQ2_TX_SEL_CLK_SRC_CMD2        ,Programmed to TX clock source select value for DQ bit2 of Cmd2" "0,1"
bitfld.long 0x00 1. "       DQ1_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit1 of Cmd2" "0,1"
bitfld.long 0x00 0. "       DQ0_TX_SEL_CLK_SRC_CMD2         ,Programmed to TX clock source select value for DQ bit0 of Cmd2" "0,1"
textline "                      "
group.long 0x760++0x03
line.long 0x00 "DDLL_BYPASS_0,DLL And DDLLCAL Bypass"
bitfld.long 0x00 31. " CMD_DDLLCAL_BIT_RXDQ_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 30. "            CMD_DDLLCAL_BIT_TXDQ_BYPASS         ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 29. "            CMD_DDLLCAL_BIT_TXDQS_BYPASS      ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 27. "          CMD_DDLLCAL_BYTE_QU_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 26. "            CMD_DDLLCAL_BYTE_RXDQS_BYPASS       ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 25. "            CMD_DDLLCAL_BYTE_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 24. "          CMD_DDLLCAL_BYTE_TXDQ_BYPASS    ,Bypass the DDLL calibration value" "0,1"
bitfld.long 0x00 23. "            CMD_DDLL_BIT_RXDQ_BYPASS            ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 22. "    CMD_DDLL_BIT_TXDQS_BYPASS         ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 21. "          CMD_DDLL_BIT_TXDQ_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 20. "    CMD_DDLL_BYTE_RXRT_BYPASS           ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 19. "    CMD_DDLL_BYTE_QU_BYPASS           ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          CMD_DDLL_BYTE_RXDQS_BYPASS      ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 17. "    CMD_DDLL_BYTE_TXDQS_BYPASS          ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_DDLL_BYTE_TXDQ_BYPASS         ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 15. "          DATA_DDLLCAL_BIT_RXDQ_BYPASS    ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 14. "            DATA_DDLLCAL_BIT_TXDQ_BYPASS        ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 13. "            DATA_DDLLCAL_BIT_TXDQS_BYPASS     ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 11. "          DATA_DDLLCAL_BYTE_QU_BYPASS     ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 10. "            DATA_DDLLCAL_BYTE_RXRQS_BYPASS      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 9. "            DATA_DDLLCAL_BYTE_TXDQS_BYPASS    ,DDLL calibration value bypass" "0,1"
textline "                      "
bitfld.long 0x00 8. "          DATA_DDLLCAL_BYTE_TXDQ_BYPASS   ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 7. "            DATA_DDLL_BIT_RXDQ_BYPASS           ,Programmed to DQ RX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 6. "    DATA_DDLL_BIT_TXDQS_BYPASS        ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 5. "          DATA_DDLL_BIT_TXDQ_BYPASS       ,Programmed to DQS TX fine trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 4. "    DATA_DDLL_BYTE_RXRT_BYPASS          ,Programmed to retiming flop RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 3. "    DATA_DDLL_BYTE_QU_BYPASS          ,Programmed to QUSE trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DATA_DDLL_BYTE_RXDQS_BYPASS     ,Programmed to DQS RX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 1. "    DATA_DDLL_BYTE_TXDQS_BYPASS         ,Programmed to DQS TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    DATA_DDLL_BYTE_TXDQ_BYPASS        ,Programmed to DQ TX trimmer bypass value" "Trim mode,Bypass"
textline "                      "
group.long 0x770++0x03
line.long 0x00 "DDLL_PWRD_0_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x774++0x03
line.long 0x00 "DDLL_PWRD_1_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_BYTE7        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_BYTE7            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_BYTE7         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_BYTE7         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_BYTE7          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_BYTE7        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_BYTE7       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_BYTE6            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_BYTE6          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_BYTE6       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_BYTE6             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_BYTE6        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_BYTE6      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_BYTE6           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_BYTE5          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_BYTE5        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_BYTE5           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_BYTE5           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_BYTE5      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_BYTE5          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_BYTE5         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_BYTE4        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_BYTE4            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_BYTE4         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_BYTE4         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_BYTE4          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_BYTE4        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_BYTE4       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
group.long 0x778++0x03
line.long 0x00 "DDLL_PWRD_2_0,DLL Power Down Mode Enables"
bitfld.long 0x00 31. " DDLL_BIT_RXDQ_PWRD_CMD3        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 30. "     DDLL_BIT_TXDQ_PWRD_CMD3            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 28. "     DDLL_BYTE_RXRT_PWRD_CMD3         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 27. "          DDLL_BYTE_QU_PWRD_CMD3         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 26. "     DDLL_BYTE_RXDQS_PWRD_CMD3          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYTE_TXDQS_PWRD_CMD3        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 24. "          DDLL_BYTE_TXDQ_PWRD_CMD3       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 23. "     DDLL_BIT_RXDQ_PWRD_CMD2            ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 22. "     DDLL_BIT_TXDQ_PWRD_CMD2          ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 20. "          DDLL_BYTE_RXRT_PWRD_CMD2       ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 19. "     DDLL_BYTE_QU_PWRD_CMD2             ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 18. "     DDLL_BYTE_RXDQS_PWRD_CMD2        ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 17. "          DDLL_BYTE_TXDQS_PWRD_CMD2      ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 16. "     DDLL_BYTE_TXDQ_PWRD_CMD2           ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 15. "     DDLL_BIT_RXDQ_PWRD_CMD1          ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 14. "          DDLL_BIT_TXDQ_PWRD_CMD1        ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 12. "     DDLL_BYTE_RXRT_PWRD_CMD1           ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 11. "     DDLL_BYTE_QU_PWRD_CMD1           ,Programmed to QUSE power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_RXDQS_PWRD_CMD1      ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYTE_TXDQS_PWRD_CMD1          ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 8. "     DDLL_BYTE_TXDQ_PWRD_CMD1         ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 7. "          DDLL_BIT_RXDQ_PWRD_CMD0        ,Programmed to DQS RX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 6. "     DDLL_BIT_TXDQ_PWRD_CMD0            ,Programmed to DQ TX fine trimmer power down enable value" "Disabled,Enabled"
bitfld.long 0x00 4. "     DDLL_BYTE_RXRT_PWRD_CMD0         ,Programmed to retiming flop RX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 3. "          DDLL_BYTE_QU_PWRD_CMD0         ,Programmed to QUSE power down enable value" "Disabled,Enabled"
bitfld.long 0x00 2. "     DDLL_BYTE_RXDQS_PWRD_CMD0          ,Programmed to DQS RX power down enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYTE_TXDQS_PWRD_CMD0        ,Programmed to DQS TX power down enable value" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. "          DDLL_BYTE_TXDQ_PWRD_CMD0       ,Programmed to DQ TX power down enable value" "Disabled,Enabled"
textline "                      "
group.long 0x780++0x03
line.long 0x00 "CMD_CTRL_0_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE3 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE3      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE3       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE3      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE3         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE3                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE0                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x784++0x03
line.long 0x00 "CMD_CTRL_1_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_CKE7 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE7      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_CKE7       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_CKE7      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_CKE7         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_CKE7                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE6 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE6      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_CKE6       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_CKE6      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_CKE6         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_CKE6                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE5 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE5      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_CKE5       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_CKE5      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_CKE5         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_CKE5                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_CKE4 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_CKE4      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_CKE4       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_CKE4      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_CKE4         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_CKE4                 ,IO_CMD input path enable" "Disabled,Enabled"
group.long 0x788++0x03
line.long 0x00 "CMD_CTRL_2_0,DLL Bypass And Power Down Mode Enables For CMD I/O"
bitfld.long 0x00 29. " DDLLCAL_BYTE_TXCMD_BYPASS_MISC2 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 28. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC2      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 27. "            DDLL_BIT_TXCMD_BYPASS_MISC2       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 26. "          DDLL_BYTE_TXCMD_PWRD_MISC2      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 25. "     DDLL_BYT_TXCMD_BYPASS_MISC2         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 24. "    CMD_E_INPUT_MISC2                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 21. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC1 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 20. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC1      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 19. "            DDLL_BIT_TXCMD_BYPASS_MISC1       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 18. "          DDLL_BYTE_TXCMD_PWRD_MISC1      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 17. "     DDLL_BYT_TXCMD_BYPASS_MISC1         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 16. "    CMD_E_INPUT_MISC1                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 13. "          DDLLCAL_BYTE_TXCMD_BYPASS_MISC0 ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 12. "            DDLLCAL_BIT_TXCMD_BYPASS_MISC0      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 11. "            DDLL_BIT_TXCMD_BYPASS_MISC0       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 10. "          DDLL_BYTE_TXCMD_PWRD_MISC0      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 9. "     DDLL_BYT_TXCMD_BYPASS_MISC0         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 8. "    CMD_E_INPUT_MISC0                 ,IO_CMD input path enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 5. "          DDLLCAL_BYTE_TXCMD_BYPASS_RESET ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 4. "            DDLLCAL_BIT_TXCMD_BYPASS_RESET      ,DDLL calibration value bypass" "0,1"
bitfld.long 0x00 3. "            DDLL_BIT_TXCMD_BYPASS_RESET       ,Programmed to CMD TX fine trimmer bypass value" "Trim mode,Bypass"
textline "                      "
bitfld.long 0x00 2. "          DDLL_BYTE_TXCMD_PWRD_RESET      ,Programmed to CMD TX power down mode enable value" "Disabled,Enabled"
bitfld.long 0x00 1. "     DDLL_BYT_TXCMD_BYPASS_RESET         ,Programmed to CMD TX trimmer bypass value" "Trim mode,Bypass"
bitfld.long 0x00 0. "    CMD_E_INPUT_RESET                 ,IO_CMD input path enable" "Disabled,Enabled"
width 17.
tree "OB DDLL Short DQ Registers"
group.long 0x800++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x810++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x820++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x830++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x840++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE4_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x850++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE5_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x860++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE6_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x870++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_BYTE7_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x880++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD0_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x890++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD1_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8A0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD2_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x8B0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 OB Short DQ DDLL Value For Pin4 To Pin7 Of command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 OB Short DQ DDLL Value For Pin8 Of Command$3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK0_CMD3_3_0,Rank 0 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x900++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE0   ,Programmed to byte0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE0    ,Programmed to byte0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x910++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE1   ,Programmed to byte1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE1    ,Programmed to byte1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x920++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE2   ,Programmed to byte2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE2    ,Programmed to byte2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x930++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE3   ,Programmed to byte3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE3    ,Programmed to byte3 pin9 TX fine trimmer value"
textline "                 "
group.long 0x940++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE4_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE4   ,Programmed to byte4 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE4    ,Programmed to byte4 pin9 TX fine trimmer value"
textline "                 "
group.long 0x950++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE5_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE5   ,Programmed to byte5 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE5    ,Programmed to byte5 pin9 TX fine trimmer value"
textline "                 "
group.long 0x960++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE6_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE6   ,Programmed to byte6 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE6    ,Programmed to byte6 pin9 TX fine trimmer value"
textline "                 "
group.long 0x970++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_BYTE7_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_BYTE7   ,Programmed to byte7 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_BYTE7    ,Programmed to byte7 pin9 TX fine trimmer value"
textline "                 "
group.long 0x980++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD0_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD0    ,Programmed to command0 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD0     ,Programmed to command0 pin9 TX fine trimmer value"
textline "                 "
group.long 0x990++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD1_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD1    ,Programmed to command1 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD1     ,Programmed to command1 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9A0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD2_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD2    ,Programmed to command2 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD2     ,Programmed to command2 pin9 TX fine trimmer value"
textline "                 "
group.long 0x9B0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 OB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 OB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 OB Short DQ DDLL Value For Pin8 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
line.long 0x0C "RANK1_CMD3_3_0,Rank 1 OB Short DQ DDLL Value For Pin9 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x0C 8.--14. 1. " PIN10_CMD3    ,Programmed to command3 pin10 TX fine trimmer value"
hexmask.long.byte 0x0C 0.--6. 1. "       PIN9_CMD3     ,Programmed to command3 pin9 TX fine trimmer value"
textline "                 "
tree.end
tree "IB DDLL Short DQ Register"
group.long 0xA00++0x0F
line.long 0x00 "RANK0_BYTE0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA10++0x0F
line.long 0x00 "RANK0_BYTE1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA20++0x0F
line.long 0x00 "RANK0_BYTE2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA30++0x0F
line.long 0x00 "RANK0_BYTE3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA40++0x0F
line.long 0x00 "RANK0_BYTE4_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE4_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE4_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA50++0x0F
line.long 0x00 "RANK0_BYTE5_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE5_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE5_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA60++0x0F
line.long 0x00 "RANK0_BYTE6_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE6_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE6_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA70++0x0F
line.long 0x00 "RANK0_BYTE7_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_BYTE7_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_BYTE7_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA80++0x0F
line.long 0x00 "RANK0_CMD0_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD0_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD0_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
textline "                 "
group.long 0xA90++0x0F
line.long 0x00 "RANK0_CMD1_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD1_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD1_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAA0++0x0F
line.long 0x00 "RANK0_CMD2_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD2_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD2_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
textline "                 "
group.long 0xAB0++0x0F
line.long 0x00 "RANK0_CMD3_0_0,Rank 0 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK0_CMD3_1_0,Rank 0 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK0_CMD3_2_0,Rank 0 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
textline "                 "
group.long 0xB00++0x0F
line.long 0x00 "RANK1_BYTE0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE0    ,Programmed to byte0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE0    ,Programmed to byte0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE0    ,Programmed to byte0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE0    ,Programmed to byte0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE0    ,Programmed to byte0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE0    ,Programmed to byte0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE0    ,Programmed to byte0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE0    ,Programmed to byte0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE0    ,Programmed to byte0 pin8 TX fine trimmer value"
group.long 0xB10++0x0F
line.long 0x00 "RANK1_BYTE1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE1    ,Programmed to byte1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE1    ,Programmed to byte1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE1    ,Programmed to byte1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE1    ,Programmed to byte1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE1    ,Programmed to byte1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE1    ,Programmed to byte1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE1    ,Programmed to byte1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE1    ,Programmed to byte1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE1    ,Programmed to byte1 pin8 TX fine trimmer value"
group.long 0xB20++0x0F
line.long 0x00 "RANK1_BYTE2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE2    ,Programmed to byte2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE2    ,Programmed to byte2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE2    ,Programmed to byte2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE2    ,Programmed to byte2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE2    ,Programmed to byte2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE2    ,Programmed to byte2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE2    ,Programmed to byte2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE2    ,Programmed to byte2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE2    ,Programmed to byte2 pin8 TX fine trimmer value"
group.long 0xB30++0x0F
line.long 0x00 "RANK1_BYTE3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE3    ,Programmed to byte3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE3    ,Programmed to byte3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE3    ,Programmed to byte3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE3    ,Programmed to byte3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE3    ,Programmed to byte3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE3    ,Programmed to byte3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE3    ,Programmed to byte3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE3    ,Programmed to byte3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE3    ,Programmed to byte3 pin8 TX fine trimmer value"
group.long 0xB40++0x0F
line.long 0x00 "RANK1_BYTE4_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte4 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE4    ,Programmed to byte4 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE4    ,Programmed to byte4 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE4    ,Programmed to byte4 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE4    ,Programmed to byte4 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE4_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte4 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE4    ,Programmed to byte4 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE4    ,Programmed to byte4 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE4    ,Programmed to byte4 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE4    ,Programmed to byte4 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE4_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte4 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE4    ,Programmed to byte4 pin8 TX fine trimmer value"
group.long 0xB50++0x0F
line.long 0x00 "RANK1_BYTE5_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte5 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE5    ,Programmed to byte5 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE5    ,Programmed to byte5 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE5    ,Programmed to byte5 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE5    ,Programmed to byte5 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE5_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte5 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE5    ,Programmed to byte5 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE5    ,Programmed to byte5 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE5    ,Programmed to byte5 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE5    ,Programmed to byte5 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE5_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte5 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE5    ,Programmed to byte5 pin8 TX fine trimmer value"
group.long 0xB60++0x0F
line.long 0x00 "RANK1_BYTE6_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte6 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE6    ,Programmed to byte6 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE6    ,Programmed to byte6 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE6    ,Programmed to byte6 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE6    ,Programmed to byte6 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE6_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte6 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE6    ,Programmed to byte6 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE6    ,Programmed to byte6 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE6    ,Programmed to byte6 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE6    ,Programmed to byte6 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE6_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte6 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE6    ,Programmed to byte6 pin8 TX fine trimmer value"
group.long 0xB70++0x0F
line.long 0x00 "RANK1_BYTE7_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Byte7 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_BYTE7    ,Programmed to byte7 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_BYTE7    ,Programmed to byte7 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_BYTE7    ,Programmed to byte7 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_BYTE7    ,Programmed to byte7 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_BYTE7_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Byte7 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_BYTE7    ,Programmed to byte7 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_BYTE7    ,Programmed to byte7 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_BYTE7    ,Programmed to byte7 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_BYTE7    ,Programmed to byte7 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_BYTE7_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Byte7 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_BYTE7    ,Programmed to byte7 pin8 TX fine trimmer value"
group.long 0xB80++0x0F
line.long 0x00 "RANK1_CMD0_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command0 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD0     ,Programmed to command0 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD0     ,Programmed to command0 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD0     ,Programmed to command0 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD0     ,Programmed to command0 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD0_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command0 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD0     ,Programmed to command0 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD0     ,Programmed to command0 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD0     ,Programmed to command0 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD0     ,Programmed to command0 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD0_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command0 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD0     ,Programmed to command0 pin8 TX fine trimmer value"
group.long 0xB90++0x0F
line.long 0x00 "RANK1_CMD1_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command1 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD1     ,Programmed to command1 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD1     ,Programmed to command1 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD1     ,Programmed to command1 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD1     ,Programmed to command1 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD1_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command1 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD1     ,Programmed to command1 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD1     ,Programmed to command1 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD1     ,Programmed to command1 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD1     ,Programmed to command1 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD1_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command1 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD1     ,Programmed to command1 pin8 TX fine trimmer value"
group.long 0xBA0++0x0F
line.long 0x00 "RANK1_CMD2_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command2 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD2     ,Programmed to command2 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD2     ,Programmed to command2 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD2     ,Programmed to command2 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD2     ,Programmed to command2 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD2_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command2 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD2     ,Programmed to command2 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD2     ,Programmed to command2 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD2     ,Programmed to command2 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD2     ,Programmed to command2 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD2_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command2 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD2     ,Programmed to command2 pin8 TX fine trimmer value"
group.long 0xBB0++0x0F
line.long 0x00 "RANK1_CMD3_0_0,Rank 1 IB Short DQ DDLL Value For Pin0 To Pin3 Of Command3 Brick"
hexmask.long.byte 0x00 24.--30. 1. " PIN3_CMD3     ,Programmed to command3 pin3 TX fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "       PIN2_CMD3     ,Programmed to command3 pin2 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x00 8.--14. 1. "          PIN1_CMD3     ,Programmed to command3 pin1 TX fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "       PIN0_CMD3     ,Programmed to command3 pin0 TX fine trimmer value"
line.long 0x04 "RANK1_CMD3_1_0,Rank 1 IB Short DQ DDLL Value For Pin4 To Pin7 Of Command3 Brick"
hexmask.long.byte 0x04 24.--30. 1. " PIN7_CMD3     ,Programmed to command3 pin7 TX fine trimmer value"
hexmask.long.byte 0x04 16.--22. 1. "       PIN6_CMD3     ,Programmed to command3 pin6 TX fine trimmer value"
textline "                 "
hexmask.long.byte 0x04 8.--14. 1. "          PIN5_CMD3     ,Programmed to command3 pin5 TX fine trimmer value"
hexmask.long.byte 0x04 0.--6. 1. "       PIN4_CMD3     ,Programmed to command3 pin4 TX fine trimmer value"
line.long 0x08 "RANK1_CMD3_2_0,Rank 1 IB Short DQ DDLL Value For Pin8 To Pin10 Of Command3 Brick"
hexmask.long.byte 0x08 0.--6. 1. " PIN8_CMD3     ,Programmed to command3 pin8 TX fine trimmer value"
tree.end
textline "                 "
width 32.
group.long 0xBE0++0x03
line.long 0x00 "IB_VREF_DQ_0_0,IB DQ Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE3                              ,Programmed to IB Vref value for DQ of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE2                              ,Programmed to IB Vref value for DQ of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE1                              ,Programmed to IB Vref value for DQ of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE0                              ,Programmed to IB Vref value for DQ of BYTE0"
group.long 0xBE4++0x03
line.long 0x00 "IB_VREF_DQ_1_0,IB DQ Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_BYTE7                              ,Programmed to IB Vref value for DQ of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_BYTE6                              ,Programmed to IB Vref value for DQ of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_BYTE5                              ,Programmed to IB Vref value for DQ of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_BYTE4                              ,Programmed to IB Vref value for DQ of BYTE4"
group.long 0xBE8++0x03
line.long 0x00 "IB_VREF_DQ_2_0,IB DQ Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQ_CMD3                              ,Programmed to IB Vref value for DQ of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQ_CMD2                              ,Programmed to IB Vref value for DQ of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQ_CMD1                              ,Programmed to IB Vref value for DQ of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQ_CMD0                              ,Programmed to IB Vref value for DQ of CMD0"
group.long 0xBF0++0x03
line.long 0x00 "IB_VREF_DQS_0_0,IB DQS Receiver Vref For Byte0 To Byte3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE3                             ,Programmed to IB Vref value for DQS of BYTE3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE2                             ,Programmed to IB Vref value for DQS of BYTE2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE1                             ,Programmed to IB Vref value for DQS of BYTE1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE0                             ,Programmed to IB Vref value for DQS of BYTE0"
group.long 0xBF4++0x03
line.long 0x00 "IB_VREF_DQS_1_0,IB DQS Receiver Vref For Byte4 To Byte7"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_BYTE7                             ,Programmed to IB Vref value for DQS of BYTE7"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_BYTE6                             ,Programmed to IB Vref value for DQS of BYTE6"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_BYTE5                             ,Programmed to IB Vref value for DQS of BYTE5"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_BYTE4                             ,Programmed to IB Vref value for DQS of BYTE4"
group.long 0xBF8++0x03
line.long 0x00 "IB_VREF_DQS_2_0,IB DQS Receiver Vref For Cmd0 To Cmd3"
hexmask.long.byte 0x00 24.--30. 1. " IB_VREF_DQS_CMD3                             ,Programmed to IB Vref value for DQS of CMD3"
hexmask.long.byte 0x00 16.--22. 1. "                     IB_VREF_DQS_CMD2                             ,Programmed to IB Vref value for DQS of CMD2"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          IB_VREF_DQS_CMD1                             ,Programmed to IB Vref value for DQS of CMD1"
hexmask.long.byte 0x00 0.--6. 1. "                     IB_VREF_DQS_CMD0                             ,Programmed to IB Vref value for DQS of CMD0"
textline "                                "
group.long 0xC00++0x03
line.long 0x00 "DDLL_LONG_CMD_0_0,DLL Long Trimmer Value For Cke0 And Cke1"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE1                           ,Programmed to CKE1 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE0                           ,Programmed to CKE0 trimmer value"
group.long 0xC04++0x03
line.long 0x00 "DDLL_LONG_CMD_1_0,DLL Long Trimmer Value For Cke2 And Cke3"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE3                           ,Programmed to CKE3 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE2                           ,Programmed to CKE2 trimmer value"
group.long 0xC08++0x03
line.long 0x00 "DDLL_LONG_CMD_2_0,DLL Long Trimmer Value For Cke4 And Cke5"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE5                           ,Programmed to CKE5 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE4                           ,Programmed to CKE4 trimmer value"
group.long 0xC0C++0x03
line.long 0x00 "DDLL_LONG_CMD_3_0,DLL Long Trimmer Value For Cke6 And Cke7"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_CKE7                           ,Programmed to CKE7 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_CKE6                           ,Programmed to CKE6 trimmer value"
group.long 0xC10++0x03
line.long 0x00 "DDLL_LONG_CMD_4_0,DLL Long Trimmer Value For Reset And Misc0"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC0                           ,Programmed to MISC0 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_RESET                           ,Programmed to RESET trimmer value"
group.long 0xC14++0x03
line.long 0x00 "DDLL_LONG_CMD_5_0,DLL Long Trimmer Value For Misc1 And Misc2"
hexmask.long.word 0x00 16.--26. 1. " DDLL_LONG_CMD_MISC2                           ,Programmed to MISC2 trimmer value"
hexmask.long.word 0x00 0.--10. 1. "                   DDLL_LONG_CMD_MISC1                           ,Programmed to MISC1 trimmer value"
textline "                                "
group.long 0xC20++0x03
line.long 0x00 "DDLL_SHORT_CMD_0_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE3                          ,Programmed to CKE3 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE2                          ,Programmed to CKE2 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE1                          ,Programmed to CKE1 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE0                          ,Programmed to CKE0 fine trimmer value"
group.long 0xC24++0x03
line.long 0x00 "DDLL_SHORT_CMD_1_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_CKE7                          ,Programmed to CKE7 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_CKE6                          ,Programmed to CKE6 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_CKE5                          ,Programmed to CKE5 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_CKE4                          ,Programmed to CKE4 fine trimmer value"
group.long 0xC28++0x03
line.long 0x00 "DDLL_SHORT_CMD_2_0,DLL Short Trimmer Value"
hexmask.long.byte 0x00 24.--30. 1. " DDLL_SHORT_CMD_MISC2                          ,Programmed to MISC2 fine trimmer value"
hexmask.long.byte 0x00 16.--22. 1. "                     DDLL_SHORT_CMD_MISC1                          ,Programmed to MISC1 fine trimmer value"
textline "                                "
hexmask.long.byte 0x00 8.--14. 1. "          DDLL_SHORT_CMD_MISC0                          ,Programmed to MISC0 fine trimmer value"
hexmask.long.byte 0x00 0.--6. 1. "                     DDLL_SHORT_CMD_RESET                          ,Programmed to RESET fine trimmer value"
textline "                                "
group.long 0xC30++0x07
line.long 0x00 "CFG_PM_GLOBAL_0_0,Global Register For Pad Macro Control"
bitfld.long 0x00 27. " DISABLE_CFG_CMD3           ,CMD3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 26. "               DISABLE_CFG_CMD2           ,CMD2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 25. " DISABLE_CFG_CMD1           ,CMD1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 24. "               DISABLE_CFG_CMD0           ,CMD0 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " DISABLE_CFG_BYTE7          ,BYTE7 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 22. "               DISABLE_CFG_BYTE6          ,BYTE6 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 21. " DISABLE_CFG_BYTE5          ,BYTE5 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 20. "               DISABLE_CFG_BYTE4          ,BYTE4 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " DISABLE_CFG_BYTE3          ,BYTE3 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 18. "               DISABLE_CFG_BYTE2          ,BYTE2 pad macro configuration read|write disable" "No,Yes"
textline "                                         "
bitfld.long 0x00 17. " DISABLE_CFG_BYTE1          ,BYTE1 pad macro configuration read|write disable" "No,Yes"
bitfld.long 0x00 16. "               DISABLE_CFG_BYTE0          ,BYTE0 pad macro configuration read|write disable" "No,Yes"
line.long 0x04 "VTTGEN_CTRL_0_0,VTTGEN Control Register 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 24. " VTTLP_VDDA_E_REGSW         ,Enable switch to low power regulator" "Disabled,Enabled"
textline "                                         "
endif
bitfld.long 0x04 16.--19. " VTT_VDDA_LVL               ,VDDA level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 8.--11. " VTT_VAUXP_LVL              ,VAUXP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                VTT_VCLAMP_LVL             ,VCLAMP level select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xC38++0x03
line.long 0x00 "VTTGEN_CTRL_1_0,VTTGEN control register"
bitfld.long 0x00 10.--14. " VTT_VDDA_CTRL              ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                VTT_VAUXP_CTRL             ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x00 0.--4. " VTT_VCLAMP_CTRL            ,Fast droop recovery or stability" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xC3C++0x2F
line.long 0x00 "BG_BIAS_CTRL_0_0,BG Bias Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20.--21. " DDLL_CDB_BG_ILVL_CTRL      ,BG current bias select" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 16.--17. "              DDLL_DDLL_BG_ILVL_CTRL     ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
bitfld.long 0x00 12.--13. " XM2COMP_BG_ILVL_CTRL       ,BANDGAP output current level control" "25ua,50ua,TBD,TBD"
bitfld.long 0x00 8.--9. "              BG_ILVL_CTRL               ,BG current bias select" "25ua,50ua,TBD,TBD"
textline "                                         "
endif
bitfld.long 0x00 4.--6. " BG_SETUP                   ,Temperature coefficient control" "0,1,2,3,4,5,6,7"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "                 BGLP_E_PWRD                ,BGLP E PWRD" "0,1"
endif
textline "                                         "
bitfld.long 0x00 1. " BG_MODE                    ,Regulator mode" "High performance,Low power"
bitfld.long 0x00 0. "  BG_E_PWRD                  ,Power down regulator" "0,1"
line.long 0x04 "PAD_CFG_CTRL_0,Config Control Register For Pads"
bitfld.long 0x04 28.--30. " PAD_MACRO_QUSE_MODE        ,Pad macro QUSE mode" "Direct,,Regular W/O div2,Regular,?..."
bitfld.long 0x04 25. "  TX_E_DDLL_TCLK             ,TX E DDLL TCLK" "0,1"
textline "                                         "
bitfld.long 0x04 24. " E_TX_NMOS_DRVUP            ,E TX NMOS DRVUP" "0,1"
bitfld.long 0x04 20.--21. "                 TX_DCC_MODE                ,TX DCC mode" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 16.--17. " MEM_MODE                   ,Type of DDR memory used for misc. internal controls" "LPDDR2|3,SDDR3|SDDR3L,LPDDR4,?..."
bitfld.long 0x04 13. "      TX_SEL_MV_CYCLE            ,Multi-voltage timing path timing closure" "1 cycle,2 cycles"
textline "                                         "
bitfld.long 0x04 10.--11. " CMD_TX_EBOOST_PU_MODE      ,DQ pull up pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 9. "     E_PWRD                     ,DC current paths within entire brick cell disable" "Enabled,Disabled"
textline "                                         "
bitfld.long 0x04 5.--6. " CMD_TX_EBOOST_PD_MODE      ,DQ pull down pre-emphasis mode" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x04 0.--1. "     QUSE_MODE                  ,Pad quse mode" "0,1,2,3"
line.long 0x08 "ZCTRL_0,Driver|Receiver ZCTRL Settings For All IOBRICKs"
bitfld.long 0x08 26.--27. " DATA_DQS_TX_DRVDN_ZCTRL    ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 24.--25. "            DATA_DQ_TX_DRVDN_ZCTRL     ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 22.--23. " DATA_DQS_TX_DRVUP_ZCTRL    ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 20.--21. "            DATA_DQ_TX_DRVUP_ZCTRL     ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 18.--19. " CMD_DQS_TX_DRVDN_ZCTRL     ,DQS drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 16.--17. "            CMD_DQ_TX_DRVDN_ZCTRL      ,DQ drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 14.--15. " CMD_DQS_TX_DRVUP_ZCTRL     ,DQS drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 12.--13. "            CMD_DQ_TX_DRVUP_ZCTRL      ,DQ drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 10.--11. " DQS_RX_DRVDN_TERM_ZCTRL    ,DQS pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 8.--9. "            DQ_RX_DRVDN_TERM_ZCTRL     ,DQ pull-down termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 6.--7. " DQS_RX_DRVUP_TERM_ZCTRL    ,DQS pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 4.--5. "            DQ_RX_DRVUP_TERM_ZCTRL     ,DQ pull-up termination impedance calibration" "40ohm,60ohm,80ohm,120ohm"
textline "                                         "
bitfld.long 0x08 2.--3. " CMD_TX_DRVDN_ZCTRL         ,CMD pad of DQ|CA drive pull-down impedance calibration" "40ohm,60ohm,80ohm,120ohm"
bitfld.long 0x08 0.--1. "            CMD_TX_DRVUP_ZCTRL         ,CMD pad of DQ|CA drive pull-up impedance calibration" "40ohm,60ohm,80ohm,120ohm"
line.long 0x0C "RX_TERM_0,Receive Termination Strength Control Register For DQ Brick"
bitfld.long 0x0C 24.--29. " DQS_RX_DRVDN_TERM          ,DQS pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "                DQS_RX_DRVUP_TERM          ,DQS pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 8.--13. " DQ_RX_DRVDN_TERM           ,DQ pull-down termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                DQ_RX_DRVUP_TERM           ,DQ pull-up termination strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "CMD_TX_DRV_0,Transmit Drive Strength Control Register For CMD Pad In DQ|CA Brick"
bitfld.long 0x10 8.--13. " CMD_TX_DRVDN               ,CMD TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                CMD_TX_DRVUP               ,CMD TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "CMD_PAD_RX_CTRL_0,Receiver Mode Control For Command Pad"
bitfld.long 0x14 24.--28. " CMD_DQ_RX_CTRL             ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 22. "                CMD_RX_E_DIRECT_ZI         ,Command RX E direct ZI" "0,1"
textline "                                         "
bitfld.long 0x14 21. " CMD_RX_E_IBIAS_PWRD        ,Command RX E IBIAS PWRD" "0,1"
bitfld.long 0x14 16.--20. "                 CMD_DQS_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x14 15. " CMD_EINPUT_FORCE_ON        ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x14 14. "          CMD_DQ_RX_E_RDIV           ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " CMD_DQ_RX_E_DAMP_DFE       ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x14 12. "          CMD_DQS_RX_E_DIFF_MODE     ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x14 8.--10. " CMD_DQ_RX_DAMP_DFE_CTRL    ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 4.--5. "                 CMD_DQS_RX_MODE            ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x14 0.--2. " CMD_DQ_RX_MODE             ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x18 "DATA_PAD_RX_CTRL_0,Receiver Mode Control For Data Pad"
bitfld.long 0x18 24.--28. " DATA_DQ_RX_CTRL            ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 22. "                DATA_RX_E_DIRECT_ZI        ,Data RX E Direct ZI" "0,1"
textline "                                         "
bitfld.long 0x18 21. " DATA_RX_E_IBIAS_PWRD       ,Data RX E IBIAS PWRD" "0,1"
bitfld.long 0x18 16.--20. "                 DATA_DQS_RX_CTRL           ,Active high for differential amplifier to adjust bias current" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x18 15. " DATA_EINPUT_FORCE_ON       ,Static einput enable" "Disabled,Enabled"
bitfld.long 0x18 14. "          DATA_DQ_RX_E_RDIV          ,Resistor divider differential amplifier enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " DATA_DQ_RX_E_DAMP_DFE      ,DFE circuit RX differential amplifier enable" "Disabled,Enabled"
bitfld.long 0x18 12. "          DATA_DQS_RX_E_DIFF_MODE    ,Differential mode strobe RX enable" "IOP-VREF,IOP-ION"
textline "                                         "
bitfld.long 0x18 8.--10. " DATA_DQ_RX_DAMP_DFE_CTRL   ,Different DFE modes selection" "0,1,2,3,4,5,6,7"
bitfld.long 0x18 4.--5. "                 DATA_DQS_RX_MODE           ,Front-end RX type" "DQS_SCHMITT,,DQS_DIFF_MODE_50,DQS_DIFF_MODE_15"
textline "                                         "
bitfld.long 0x18 0.--2. " DATA_DQ_RX_MODE            ,Front-end RX type" "DQ_SCHITT,,DQ_DIFF_MODE_50,DQ_DIFF_MODE_15,DQ_HSSA_MODE_50,DQ_HSSA_MODE_15,,DQ_LSSA_MODE"
line.long 0x1C "CMD_RX_TERM_MODE_0,Receiver Termination Mode Control For Command Pad"
bitfld.long 0x1C 13. " CMD_E_PWRD_RX              ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x1C 12. "          CMD_DDLL_QU_SEL_M2CLK      ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x1C 8.--9. " CMD_DQSN_RX_TERM_MODE      ,Command DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x1C 4.--5. "        CMD_DQSP_RX_TERM_MODE      ,Command DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x1C 0.--1. " CMD_DQ_RX_TERM_MODE        ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x20 "DATA_RX_TERM_MODE_0,Receiver Termination Mode Control For Data Pad"
bitfld.long 0x20 13. " DATA_E_PWRD_RX             ,RX DC current paths within entire brick cell disable" "Enabled,Disabled"
bitfld.long 0x20 12. "          DATA_DDLL_QU_SEL_M2CLK     ,QUSE DDLL clock select" "QUSE_IN for DQBRICK,M2CLKP|N for ADBRICK"
textline "                                         "
bitfld.long 0x20 8.--9. " DATA_DQSN_RX_TERM_MODE     ,Data DQSN RX termination mode" ",,Pull-up,Center tap"
bitfld.long 0x20 4.--5. "        DATA_DQSP_RX_TERM_MODE     ,Data DQSP RX termination mode" "HI-Z,Pull-down,?..."
textline "                                         "
bitfld.long 0x20 0.--1. " DATA_DQ_RX_TERM_MODE       ,Driver as receiver ODT or CTT termination enable" "0,1,2,3"
line.long 0x24 "CMD_PAD_TX_CTRL_0,OB Control For Command Pad"
bitfld.long 0x24 27. " CMD_DQS_TX_DRVFORCEON      ,Command DQS TX drive force on" "0,1"
bitfld.long 0x24 26. "                 CMD_DQ_TX_DRVFORCEON       ,Command DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x24 25. " CMD_CMD_TX_DRVFORCEON      ,Command command TX drive force on" "0,1"
bitfld.long 0x24 24. "                 CMD_CMD_TX_E_DCC           ,Command command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x24 21. " CMD_DQSN_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 20. "          CMD_DQSN_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 16. " CMD_DQSN_TX_E_DCC          ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x24 14.--15. "          CMD_DQS_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 13. " CMD_DQSP_TX_E_WKPU         ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 12. "          CMD_DQSP_TX_E_WKPD         ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 10.--11. " CMD_DQS_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 9. "     CMD_DQSP_TX_E_DCC          ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 8. " CMD_DQS_E_IVREF            ,Clock internal vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x24 6.--7. "          CMD_DQ_TX_EBOOST_PU_MODE   ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x24 5. " CMD_DQ_TX_E_WKPU           ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x24 4. "          CMD_DQ_TX_E_WKPD           ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 2.--3. " CMD_DQ_TX_EBOOST_PD_MODE   ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x24 1. "     CMD_DQ_TX_E_DCC            ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x24 0. " CMD_DQ_E_IVREF             ,Data internal vref resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x28 "DATA_PAD_TX_CTRL_0,OB Control For Data Pad"
bitfld.long 0x28 27. " DATA_DQS_TX_DRVFORCEON     ,Data DQS TX drive force on" "0,1"
bitfld.long 0x28 26. "                 DATA_DQ_TX_DRVFORCEON      ,Data DQ TX drive force on" "0,1"
textline "                                         "
bitfld.long 0x28 25. " DATA_CMD_TX_DRVFORCEON     ,Data command TX drive force on" "0,1"
bitfld.long 0x28 24. "                 DATA_CMD_TX_E_DCC          ,Data command TX E DCC" "0,1"
textline "                                         "
bitfld.long 0x28 21. " DATA_DQSN_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 20. "          DATA_DQSN_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 16. " DATA_DQSN_TX_E_DCC         ,DQSN TX duty cycle correction circuit enable" "Disabled,Enabled"
bitfld.long 0x28 14.--15. "          DATA_DQS_TX_EBOOST_PU_MODE ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 13. " DATA_DQSP_TX_E_WKPU        ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 12. "          DATA_DQSP_TX_E_WKPD        ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 10.--11. " DATA_DQS_TX_EBOOST_PD_MODE ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 9. "     DATA_DQSP_TX_E_DCC         ,DQSP TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 8. " DATA_DQS_E_IVREF           ,Clock internal Vref resistor ladder for strobe IO_CKP|N enable" "Disabled,Enabled"
bitfld.long 0x28 6.--7. "          DATA_DQ_TX_EBOOST_PU_MODE  ,DQ pull-up pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
textline "                                         "
bitfld.long 0x28 5. " DATA_DQ_TX_E_WKPU          ,Weak pull-up enable" "Disabled,Enabled"
bitfld.long 0x28 4. "          DATA_DQ_TX_E_WKPD          ,Weak pull-down enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 2.--3. " DATA_DQ_TX_EBOOST_PD_MODE  ,DQ pull-down pre-emphasis mode select" "Disabled,1x edge boost,2x edge boost,4x edge boost"
bitfld.long 0x28 1. "     DATA_DQ_TX_E_DCC           ,DQ TX duty cycle correction circuit enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x28 0. " DATA_DQ_E_IVREF            ,Data internal Vred resistor ladder for data I/O[8:0] enable" "Disabled,Enabled"
line.long 0x2C "COMMON_PAD_TX_CTRL_0,OB Control For Bricks"
bitfld.long 0x2C 3. " CMD_DQS_TX_BPSDYNEN        ,Command DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 2. "                 CMD_DQ_TX_BPSDYNEN         ,Command DQ TX BPSDYNEN" "0,1"
textline "                                         "
bitfld.long 0x2C 1. " DATA_DQS_TX_BPSDYNEN       ,Data DQS TX BPSDYNEN" "0,1"
bitfld.long 0x2C 0. "                 DATA_DQ_TX_BPSDYNEN        ,Data DQ TX BPSDYNEN" "0,1"
sif (cpuis("TEGRAX2"))
group.long 0xC6C++0x03
line.long 0x00 "DSR_VTTGEN_CTRL_0_0,VTTGEN control register"
hexmask.long.byte 0x00 8.--15. 1. " DSR_VTT_VDDA_LOAD          ,DSR VTT VDDA Load"
bitfld.long 0x00 0.--3. "                DSR_VTT_VDDA_LVL           ,Level select for VDDA during DSR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC70++0x0B
line.long 0x00 "DQ_TX_DRV_0,Transmit Drive Strength Control Register For DQ Brick"
bitfld.long 0x00 24.--29. " DATA_DQS_TX_DRVDN          ,DQS TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                DATA_DQS_TX_DRVUP          ,DQS TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 8.--13. " DATA_DQ_TX_DRVDN           ,DQ TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                DATA_DQ_TX_DRVUP           ,DQ TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "CA_TX_DRV_0,Transmit Drive Strength Control Register For CA Brick"
bitfld.long 0x04 24.--29. " CMD_DQS_TX_DRVDN           ,CK TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                CMD_DQS_TX_DRVUP           ,CK TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 8.--13. " CMD_DQ_TX_DRVDN            ,CA TX pull-down drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                CMD_DQ_TX_DRVUP            ,CA TX pull-up drive strength code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "AUTOCAL_CFG_COMMON_0,Autocal Padmacro Register For Controls Shared Across All IOBRICKs"
bitfld.long 0x08 16. " E_CAL_BYPASS_DVFS          ,Assert E_CAL_BYPASS for all pad macros" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "          E_CAL_UPDATE_HIGH          ,Number of EMC clocks for which E_CAL_UPDATE pulse is asserted for CK pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. " E_CAL_UPDATE_DELAY         ,Wait time in EMC clock cycles between CK pad cal ode change and E_CAL_UPDATE assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
group.long 0xCE0++0x0B
line.long 0x00 "DDLLCAL_CAL_0,Communicate Calibration Value To The DDLL Slaves"
hexmask.long.word 0x00 0.--10. 1. " DDLLCAL_CAL                             ,Calibration value"
line.long 0x04 "DDLL_OFFSET_0,Verify Margins Of The Trained DDLL Values"
bitfld.long 0x04 28. " CMD_DDLL_OFFSET_BYTE_QU_EN              ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 27. "            CMD_DDLL_OFFSET_BYTE_RXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 26. " CMD_DDLL_OFFSET_BYTE_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 25. "            CMD_DDLL_OFFSET_BYTE_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 24. " CMD_DDLL_OFFSET_BYTE_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 23. "            CMD_DDLL_OFFSET_BIT_RXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 22. " CMD_DDLL_OFFSET_BIT_TXCMD_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 21. "            CMD_DDLL_OFFSET_BIT_TXDQS_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 20. " CMD_DDLL_OFFSET_BIT_TXDQ_EN             ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 16. "            DATA_DDLL_OFFSET_BYTE_QU_EN             ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 15. " DATA_DDLL_OFFSET_BYTE_RXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 14. "            DATA_DDLL_OFFSET_BYTE_TXCMD_EN          ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " DATA_DDLL_OFFSET_BYTE_TXDQS_EN          ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 12. "            DATA_DDLL_OFFSET_BYTE_TXDQ_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 11. " DATA_DDLL_OFFSET_BIT_RXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 10. "            DATA_DDLL_OFFSET_BIT_TXCMD_EN           ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 9. " DATA_DDLL_OFFSET_BIT_TXDQS_EN           ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x04 8. "            DATA_DDLL_OFFSET_BIT_TXDQ_EN            ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 0.--5. " DDLL_OFFSET                             ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "DDLL_PERIODIC_OFFSET_0,Support Periodic Training"
bitfld.long 0x08 28. " CMD_DDLL_PERIODIC_OFFSET_BYTE_QU_EN     ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 27. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 26. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 25. "            CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 24. " CMD_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 23. "            CMD_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 22. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 21. "            CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 20. " CMD_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN    ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 16. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_QU_EN    ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 15. " DATA_DDLL_PERIODIC_OFFSET_BYTE_RXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 14. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXCMD_EN ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQS_EN ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 12. "            DATA_DDLL_PERIODIC_OFFSET_BYTE_TXDQ_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 11. " DATA_DDLL_PERIODIC_OFFSET_BIT_RXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 10. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXCMD_EN  ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 9. " DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQS_EN  ,DDLL offset enable" "Disabled,Enabled"
bitfld.long 0x08 8. "            DATA_DDLL_PERIODIC_OFFSET_BIT_TXDQ_EN   ,DDLL offset enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 0.--5. " DDLL_PERIODIC_OFFSET                    ,Signed offset to apply to each DDLL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (cpuis("TEGRAX2"))
group.long 0xCEC++0x03
line.long 0x00 "SEL_NEGEDGE_FLOP_0,EMC PMACRO SE _NEGEDGE FLOP 0"
bitfld.long 0x00 0. " SEL_NEG_IB                              ,Select negative edge flop as output" "Disabled,Enabled"
endif
group.long 0xCF0++0x0F
line.long 0x00 "VTTGEN_CTRL_2_0,VTTGEN Control Register"
hexmask.long.byte 0x00 16.--23. 1. " VTT_VDDA_LOAD                           ,VTT VDDA Load"
hexmask.long.byte 0x00 8.--15. 1. "                  VTT_VAUXP_LOAD                          ,VTT VAUXP Load"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " VTT_VCLAMP_LOAD                         ,VTT VCLAMP Load"
line.long 0x04 "IB_RXRT_0,IB DQ Receive Path Retiming For Byte0 To Byte3"
hexmask.long.word 0x04 0.--10. 1. " IB_RXRT                                 ,Programmed to IB DQ receive path retiming"
line.long 0x08 "TRAINING_CTRL_0_0,Configuration Of Pad Macros For Channel 0"
bitfld.long 0x08 4. " CH0_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
textline "                                         "
bitfld.long 0x08 3. " CH0_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
bitfld.long 0x08 2. "            CH0_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
textline "                                         "
bitfld.long 0x08 1. " CH0_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
bitfld.long 0x08 0. "                   CH0_TRAINING_ENABLED                    ,Channel 0 training enable" "Disabled,Enabled"
line.long 0x0C "TRAINING_CTRL_1_0,Configuration Of Pad Macros For Channel 1"
bitfld.long 0x0C 4. " CH1_TRAINING_DRV_DQS                    ,Force DQS_t and DQS_c drivers on" "Not force,Force"
bitfld.long 0x0C 3. "           CH1_TRAINING_E_WRPTR                    ,Direct return of the IFIFO write pointer as read data enable" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 2. " CH1_TRAINING_RX_E_DIRECT_ZI             ,RX_E_DIRECT_ZI pin of pad training override" "No override,Override"
bitfld.long 0x0C 1. "         CH1_TRAINING_TRAIN_QPOP                 ,Training QPOP" "0,1"
textline "                                         "
bitfld.long 0x0C 0. " CH1_TRAINING_ENABLED                    ,Channel 1 training enable" "Disabled,Enabled"
tree.end
width 27.
tree "TRAINING Registers"
group.long 0xE00++0x03
line.long 0x00 "CMD_0,Main Register For Launching Training"
bitfld.long 0x00 31. " GO                   ,Start training" "Not started,Started"
bitfld.long 0x00 30. "    PERIODIC             ,Start periodic training" "Not started,Started"
bitfld.long 0x00 8. "    QUSE_VREF      ,Initiates DQS_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 7. "   RD_VREF           ,Initiates IB_DQ_VREF training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 6. " WR_VREF              ,Initiates OB (WRIRE) DRAM_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 5. "  CA_VREF              ,Initiates CA_VREF training" "Not initiated,Initiated"
bitfld.long 0x00 4. "  QUSE           ,Initiates QUSE training" "Not initiated,Initiated"
bitfld.long 0x00 3. "   WR                ,Initiates WR training" "Not initiated,Initiated"
textline "                                    "
bitfld.long 0x00 2. " RD                   ,Initiates RD training" "Not initiated,Initiated"
bitfld.long 0x00 1. "  CA                   ,Initiates CA training" "Not initiated,Initiated"
bitfld.long 0x00 0. "  PRIME          ,Writes the custom pattern into MPC register" "Disabled,Enabled"
if ((per.l(ad:0x02CA0000+0xE04)&0x00010000)==0x00010000)
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Rank to train" "RANK0,RANK1"
bitfld.long 0x00 13. "           UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
else
group.long 0xE04++0x03
line.long 0x00 "CTRL_0,MISC Controls For Training Configuration"
bitfld.long 0x00 16. " FORCE_DR_TO_SR       ,Do only RANK0 sweep during dual rank config" "Disabled,Enabled"
bitfld.long 0x00 15. "       TR_IN_SELF_REFRESH   ,Do training in self refresh" "Disabled,Enabled"
bitfld.long 0x00 14. "       SWAP_RANK      ,Order in which ranks will be trained" "RANK0 -> RANK1,RANK1 -> RANK0"
bitfld.long 0x00 13. "  UPDATE_QUSE_RD_TR ,Update QUSE during read training" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 12. " QUSE_MODE            ,Quse mode select" "READ_DATA,IFIFO_WRPTR"
hexmask.long.byte 0x00 4.--11. 1. "    IFIFO_WRPTR          ,Expected WRPTR value for expected read_data in quse training when RPT mode is unavailable in DRAM"
bitfld.long 0x00 3. "             RPT_MODE       ,Read preamble training mode available in DRAM" "Disabled,Enabled"
bitfld.long 0x00 2. "        REFRESH_CA        ,Allow refreshes in CA training" "Disallow,Allow"
textline "                                    "
bitfld.long 0x00 1. " REFRESH              ,Allow refreshes in all trainings except CA training" "Disallow,Allow"
bitfld.long 0x00 0. "       ASYNC_UPDATES        ,Set to disabled" "Disabled,Enabled"
endif
rgroup.long 0xE08++0x03
line.long 0x00 "STATUS_0,Read Back For Training Status"
bitfld.long 0x00 0.--1. " STATUS               ,Training status" "Done,Running,Error,?..."
group.long 0xE0C++0x3F
line.long 0x00 "QUSE_CORS_CTRL_0,Controls For QUSE Training Cors Sweep"
bitfld.long 0x00 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x00 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x00 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x00 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x00 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x00 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x00 10.--18. 1. "           MAXIMUM              ,Maximum"
hexmask.long.word 0x00 0.--8. 1. "           MINIMUM        ,Minimum"
line.long 0x04 "QUSE_FINE_CTRL,Controls For QUSE Training Fine Sweep"
bitfld.long 0x04 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
bitfld.long 0x04 27. "           STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x04 26. "           STEP_LN[2]     ,Step LN[2]" "Zero,One"
bitfld.long 0x04 25. "            STEP_LN[1]        ,Step LN[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 24. " STEP_LN[0]           ,Step LN[0]" "Zero,One"
bitfld.long 0x04 23. "           STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x04 22. "           STEP[2]        ,Step[2]" "Zero,One"
bitfld.long 0x04 21. "            STEP[1]           ,Step[1]" "Zero,One"
textline "                                    "
bitfld.long 0x04 20. " STEP[0]              ,Step[0]" "Zero,One"
hexmask.long.word 0x04 10.--19. 1. "           MAXIMUM              ,2's complement"
hexmask.long.word 0x04 0.--9. 1. "           MINIMUM        ,2' complement"
line.long 0x08 "QUSE_CTRL_MISC_0,MISC Controls For QUSE Training"
hexmask.long.byte 0x08 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x08 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x08 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x08 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x08 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x08 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x08 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x08 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x08 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x0C "WRITE_FINE_CTRL_0,Controls For Write Training Sweep"
bitfld.long 0x0C 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x0C 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x0C 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x0C 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x0C 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x0C 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x0C 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x0C 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x0C 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x0C 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x0C 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x10 "WRITE_CTRL_MISC_0,MISC Controls For Write Trainings Sweep"
hexmask.long.byte 0x10 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x10 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x10 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x10 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x10 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x10 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x10 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" "One,Two,Three,Four"
bitfld.long 0x10 8.--9. "           BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" "One,Two,Three,Four"
textline "                                    "
hexmask.long.byte 0x10 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x14 "WRITE_VREF_CTRL_0,Controls For Write-Vref Training Sweep"
bitfld.long 0x14 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x14 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x14 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x14 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x14 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x14 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x18 "READ_FINE_CTRL_0,Controls For Read Training Sweep"
bitfld.long 0x18 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x18 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x18 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x18 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x18 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x18 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x18 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x18 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x18 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x18 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x18 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x1C "READ_CTRL_MISC_0,MISC Controls For Read Trainings Sweep"
hexmask.long.byte 0x1C 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x1C 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x1C 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x1C 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x1C 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x1C 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x1C 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x1C 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x1C 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x20 "READ_VREF_CTRL_0,Controls For Read-Vref Trainings Sweep"
bitfld.long 0x20 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x20 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x20 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x20 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x20 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x20 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x24 "CA_FINE_CTRL_0,Controls For CA Training Sweep"
bitfld.long 0x24 28. " STEP_LN_SIZE         ,Step LN size" "Zero,One"
textline "                                    "
bitfld.long 0x24 27. " STEP_LN[3]           ,Step LN[3]" "Zero,One"
bitfld.long 0x24 26. "           STEP_LN[2]           ,Step LN[2]" "Zero,One"
bitfld.long 0x24 25. "           STEP_LN[1]     ,Step LN[1]" "Zero,One"
bitfld.long 0x24 24. "            STEP_LN[0]        ,Step LN[0]" "Zero,One"
textline "                                    "
bitfld.long 0x24 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x24 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x24 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x24 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.word 0x24 10.--19. 1. " MAXIMUM              ,Maximum"
hexmask.long.word 0x24 0.--9. 1. "           MINIMUM              ,Minimum"
line.long 0x28 "CA_CTRL_MISC_0,MISC Controls For CA Trainings Sweep"
hexmask.long.byte 0x28 24.--31. 1. " PATRAM_MAX           ,Patram end index"
hexmask.long.byte 0x28 16.--23. 1. "             PATRAM_MIN           ,Patram start index"
bitfld.long 0x28 15. "             LEVEL[1]       ,Level training style select[1]" "Byte,Bit"
bitfld.long 0x28 14. "            LEVEL[0]          ,Level training style select[0]" "Byte,Bit"
textline "                                    "
bitfld.long 0x28 13. " PATTERN[1]           ,Pattern select[1]" "FIFO,MPC"
bitfld.long 0x28 12. "           PATTERN[0]           ,Pattern select[0]" "FIFO,MPC"
bitfld.long 0x28 10.--11. "           BURST_COUNT[1] ,Number of reads in each STEP_LN[1]" ",,,Four"
bitfld.long 0x28 8.--9. "            BURST_COUNT[0]    ,Number of reads in each STEP_LN[0]" ",,,Four"
textline "                                    "
hexmask.long.byte 0x28 0.--7. 1. " ERR_LIMIT            ,Number of errors allowed before considered a failure"
line.long 0x2C "CA_CTRL_MISC1_0,Misc Controls For CA Training Sweep"
hexmask.long.byte 0x2C 0.--7. 1. " SKIP_CNT             ,Number of NOPs between 2 CA training reads"
line.long 0x30 "CA_VREF_CTRL_0,Controls For CA-Vref Training"
bitfld.long 0x30 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x30 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x30 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x30 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x30 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x30 0.--7. 1. "             MINIMUM              ,Minimum"
line.long 0x34 "CA_TADR_CTRL_0,Controls For TADR Sweep"
bitfld.long 0x34 31. " TADR_ENABLE          ,Set to disabled" "Disabled,?..."
hexmask.long.byte 0x34 12.--19. 1. "       TADR_MAX             ,Maximum tADR allowed in tCK"
hexmask.long.word 0x34 0.--11. 1. "             TADR_SETTING   ,CA BRLSHFT + CA trimmer during tADR training"
line.long 0x38 "SETTLE_0,Controls Settle Time For Delay Controls In MCCLK"
hexmask.long.byte 0x38 24.--31. 1. " APPLY_DELAY          ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 16.--23. 1. "             PRIV_DELAY           ,Wait time after issuing a training priv request"
hexmask.long.byte 0x38 8.--15. 1. "             SHORT_TRIMMER  ,Settle time for short trimmer"
hexmask.long.byte 0x38 0.--7. 1. "              LONG_TRIMMER      ,Settle time for long trimmer"
line.long 0x3C "DEBUG_CTRL_0,Controls To Select Which Debug Information Should Be Output In Debug DQ* Registers"
bitfld.long 0x3C 24.--27. " WINDOW_LIMIT         ,Threshold to determine how many windows to report in debug registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 0.--7. 1. "             SELECT               ,Specifies output on DQ registers"
group.long 0xE5C++0x13
line.long 0x00 "MPC_0,MPC-RD Registers Data"
hexmask.long.word 0x00 16.--31. 1. " INVERT_PATTERN       ,Invert pattern"
hexmask.long.word 0x00 0.--15. 1. "           DATA                 ,Data"
line.long 0x04 "PATRAM_CTRL_0,Register To Write Pattern RAM"
bitfld.long 0x04 31. " WRITE                ,Trigger a write into pattern RAM with data supplied by PATRAM_DATA_* registers" "Not triggered,Triggered"
bitfld.long 0x04 16.--19. "  FORMAT               ,Specifies format" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 0x01 "             SELECT_OFFSET  ,Location to write in pattern RAM"
line.long 0x08 "PATRAM_DQ_0,DQ Data To Write Into Pattern RAM"
line.long 0x0C "PATRAM_DMI_0,DMI Data To Write Into Pattern RAM"
line.long 0x10 "VREF_SETTLE_0,Controls For Settle Time For Vref In MCCLK"
hexmask.long.word 0x10 16.--31. 1. " OB                   ,Settle time for WRITE|CA Vrefs"
hexmask.long.word 0x10 0.--15. 1. "           IB                   ,Settle time for READ|QUSE Vrefs"
sif (cpuis("TEGRAX2"))
group.long 0xE98++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE0_0,EMC Training RW Offset IB Byte0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xE9C++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE1_0,EMC Training RW Offset IB Byte1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA0++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE2_0,EMC Training RW Offset IB Byte2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA4++0x03
line.long 0x00 "RW_OFFSET_IB_BYTE3_0,EMC Training RW Offset IB Byte3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEA8++0x03
line.long 0x00 "RW_OFFSET_IB_MISC_0,EMC training RW Offset IB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEAC++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE0_0,EMC training RW Offset OB BYTE0 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB0++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE1_0,EMC training RW Offset OB BYTE1 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB4++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE2_0,EMC training RW Offset OB BYTE2 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEB8++0x03
line.long 0x00 "RW_OFFSET_OB_BYTE3_0,EMC training RW Offset OB BYTE3 0"
bitfld.long 0x00 28.--31. " DQ7                  ,DQ7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "             DQ6                  ,DQ6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "             DQ5            ,DQ5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "              DQ4               ,DQ4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 12.--15. " DQ3                  ,DQ3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DQ2                  ,DQ2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DQ1            ,DQ1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DQ0               ,DQ0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xEBC++0x03
line.long 0x00 "RW_OFFSET_OB_MISC_0,EMC training RW Offset OB MISC 0"
bitfld.long 0x00 12.--15. " DBI3                 ,DBI3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "             DBI2                 ,DBI2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             DBI1           ,DBI1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "              DBI0              ,DBI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0xEC0++0x07
line.long 0x00 "OPT_CA_VREF_0,Read Back For CA VREF Optimal Vref Results"
hexmask.long.byte 0x00 24.--31. 1. " RANK1_SUB_PARTITION1 ,CA_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 16.--23. 1. "             RANK1_SUB_PARTITION0 ,CA_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " RANK0_SUB_PARTITION1 ,CA_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x00 0.--7. 1. "             RANK0_SUB_PARTITION0 ,CA_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
line.long 0x04 "OPT_DQ_OB_VREF_0,Read Back For OB-DQ VREF Optimal Vref Results"
hexmask.long.byte 0x04 24.--31. 1. " RANK1_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 16.--23. 1. "             RANK1_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK1 SUB_PARTITION0 for each channel"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " RANK0_SUB_PARTITION1 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION1 for each channel"
hexmask.long.byte 0x04 0.--7. 1. "             RANK0_SUB_PARTITION0 ,DQ_OB_VREF optimal for RANK0 SUB_PARTITION0 for each channel"
group.long 0xED0++0x03
line.long 0x00 "QUSE_VREF_CTRL_0,Controls For Read-DQS-Vref Trainings Sweep"
bitfld.long 0x00 23. " STEP[3]              ,Step[3]" "Zero,One"
bitfld.long 0x00 22. "           STEP[2]              ,Step[2]" "Zero,One"
bitfld.long 0x00 21. "           STEP[1]        ,Step[1]" "Zero,One"
bitfld.long 0x00 20. "            STEP[0]           ,Step[0]" "Zero,One"
textline "                                    "
hexmask.long.byte 0x00 8.--15. 1. " MAXIMUM              ,Maximum"
hexmask.long.byte 0x00 0.--7. 1. "             MINIMUM              ,Minimum"
tree.end
width 0x0B
tree.end
tree.end
tree "SMMU (System Memory Management Unit)"
base ad:0x02C00000
width 47.
tree "MC_SID_STREAMID"
if (((per.l(ad:0x02C00000+0x4e4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4e4))&0x10000)==0x00)
group.long 0x4E4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEW_0,StreamID Security Configuration Register For SCEW"
bitfld.long 0x00 16. " SCEW_STREAMID_WRITE_ACCESS        ,SCEW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SCEW_STREAMID_OVERRIDE        ,SCEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEW_NS        ,SCEW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4e4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4e4))&0x10000)==0x10000)
group.long 0x4E4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEW_0,StreamID Security Configuration Register For SCEW"
bitfld.long 0x00 16. " SCEW_STREAMID_WRITE_ACCESS        ,SCEW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEW_STREAMID_OVERRIDE        ,SCEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEW_NS        ,SCEW NS" "Secure,Not secure"
else
group.long 0x4E4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEW_0,StreamID Security Configuration Register For SCEW"
rbitfld.long 0x00 16. " SCEW_STREAMID_WRITE_ACCESS        ,SCEW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEW_STREAMID_OVERRIDE        ,SCEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEW_NS        ,SCEW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x74))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x74))&0x10000)==0x00)
group.long 0x74++0x03
line.long 0x00 "SECURITY_CONFIG_AFIR_0,StreamID Security Configuration Register For AFIR"
bitfld.long 0x00 16. " AFIR_STREAMID_WRITE_ACCESS        ,AFIR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AFIR_STREAMID_OVERRIDE        ,AFIR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIR_NS        ,AFIR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x74))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x74))&0x10000)==0x10000)
group.long 0x74++0x03
line.long 0x00 "SECURITY_CONFIG_AFIR_0,StreamID Security Configuration Register For AFIR"
bitfld.long 0x00 16. " AFIR_STREAMID_WRITE_ACCESS        ,AFIR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AFIR_STREAMID_OVERRIDE        ,AFIR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIR_NS        ,AFIR NS" "Secure,Not secure"
else
group.long 0x74++0x03
line.long 0x00 "SECURITY_CONFIG_AFIR_0,StreamID Security Configuration Register For AFIR"
rbitfld.long 0x00 16. " AFIR_STREAMID_WRITE_ACCESS        ,AFIR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AFIR_STREAMID_OVERRIDE        ,AFIR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIR_NS        ,AFIR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3D4))&0x01)==0x00)
group.long 0x3D0++0x03
line.long 0x00 "OVERRIDE_CONFIG_APER_0,StreamID Override Register For APER"
hexmask.long.byte 0x00 0.--7. 1. " APER_STREAMID                     ,APER StreamID"
else
rgroup.long 0x3D0++0x03
line.long 0x00 "OVERRIDE_CONFIG_APER_0,StreamID Override Register For APER"
hexmask.long.byte 0x00 0.--7. 1. " APER_STREAMID                     ,APER StreamID"
endif
if (((per.l(ad:0x02C00000+0x364))&0x01)==0x00)
group.long 0x360++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSRD_0,StreamID Override Register For VICSRD"
hexmask.long.byte 0x00 0.--7. 1. " VICSRD_STREAMID                   ,VICSRD StreamID"
else
rgroup.long 0x360++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSRD_0,StreamID Override Register For VICSRD"
hexmask.long.byte 0x00 0.--7. 1. " VICSRD_STREAMID                   ,VICSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0xE4))&0x01)==0x00)
group.long 0xE0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVENCSRD_0,StreamID Override Register For NVENCSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVENCSRD_STREAMID                 ,NVENCSRD StreamID"
else
rgroup.long 0xE0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVENCSRD_0,StreamID Override Register For NVENCSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVENCSRD_STREAMID                 ,NVENCSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0x50C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x50C))&0x10000)==0x00)
group.long 0x50C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR1_0,StreamID Security Configuration Register For NVDISPLAYR1"
bitfld.long 0x00 16. " NVDISPLAYR1_STREAMID_WRITE_ACCESS ,NVDISPLAYR1 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDISPLAYR1_STREAMID_OVERRIDE ,NVDISPLAYR1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR1_NS ,NVDISPLAYR1 NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x50C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x50C))&0x10000)==0x10000)
group.long 0x50C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR1_0,StreamID Security Configuration Register For NVDISPLAYR1"
bitfld.long 0x00 16. " NVDISPLAYR1_STREAMID_WRITE_ACCESS ,NVDISPLAYR1 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDISPLAYR1_STREAMID_OVERRIDE ,NVDISPLAYR1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR1_NS ,NVDISPLAYR1 NS" "Secure,Not secure"
else
group.long 0x50C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR1_0,StreamID Security Configuration Register For NVDISPLAYR1"
rbitfld.long 0x00 16. " NVDISPLAYR1_STREAMID_WRITE_ACCESS ,NVDISPLAYR1 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDISPLAYR1_STREAMID_OVERRIDE ,NVDISPLAYR1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR1_NS ,NVDISPLAYR1 NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3FC))&0x01)==0x00)
group.long 0x3F8++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVJPGSWR_0,StreamID Override Register For NVJPGSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVJPGSWR_STREAMID                 ,NVJPGSWR StreamID"
else
rgroup.long 0x3F8++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVJPGSWR_0,StreamID Override Register For NVJPGSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVJPGSWR_STREAMID                 ,NVJPGSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x264))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x264))&0x10000)==0x00)
group.long 0x264++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVR_0,StreamID Security Configuration Register For XUSB_dEVR"
bitfld.long 0x00 16. " XUSB_DEVR_STREAMID_WRITE_ACCESS   ,XUSB DEVR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  XUSB_DEVR_STREAMID_OVERRIDE   ,XUSB DEVR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVR_NS   ,XUSB DEVR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x264))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x264))&0x10000)==0x10000)
group.long 0x264++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVR_0,StreamID Security Configuration Register For XUSB_dEVR"
bitfld.long 0x00 16. " XUSB_DEVR_STREAMID_WRITE_ACCESS   ,XUSB DEVR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_DEVR_STREAMID_OVERRIDE   ,XUSB DEVR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVR_NS   ,XUSB DEVR NS" "Secure,Not secure"
else
group.long 0x264++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVR_0,StreamID Security Configuration Register For XUSB_dEVR"
rbitfld.long 0x00 16. " XUSB_DEVR_STREAMID_WRITE_ACCESS   ,XUSB DEVR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_DEVR_STREAMID_OVERRIDE   ,XUSB DEVR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVR_NS   ,XUSB DEVR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x514))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x514))&0x10000)==0x00)
group.long 0x514++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD1_0,StreamID Security Configuration Register For VICSRD1"
bitfld.long 0x00 16. " VICSRD1_STREAMID_WRITE_ACCESS     ,VICSRD1 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  VICSRD1_STREAMID_OVERRIDE     ,VICSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD1_NS     ,VICSRD1 NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x514))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x514))&0x10000)==0x10000)
group.long 0x514++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD1_0,StreamID Security Configuration Register For VICSRD1"
bitfld.long 0x00 16. " VICSRD1_STREAMID_WRITE_ACCESS     ,VICSRD1 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSRD1_STREAMID_OVERRIDE     ,VICSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD1_NS     ,VICSRD1 NS" "Secure,Not secure"
else
group.long 0x514++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD1_0,StreamID Security Configuration Register For VICSRD1"
rbitfld.long 0x00 16. " VICSRD1_STREAMID_WRITE_ACCESS     ,VICSRD1 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSRD1_STREAMID_OVERRIDE     ,VICSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD1_NS     ,VICSRD1 NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4C4))&0x01)==0x00)
group.long 0x4C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONW_0,StreamID Override Register For AONW"
hexmask.long.byte 0x00 0.--7. 1. " AONW_STREAMID                     ,AONW StreamID"
else
rgroup.long 0x4C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONW_0,StreamID Override Register For AONW"
hexmask.long.byte 0x00 0.--7. 1. " AONW_STREAMID                     ,AONW StreamID"
endif
if (((per.l(ad:0x02C00000+0x15C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x15C))&0x10000)==0x00)
group.long 0x15C++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSWR_0,StreamID Security Configuration Register For NVENCSWR"
bitfld.long 0x00 16. " NVENCSWR_STREAMID_WRITE_ACCESS    ,NVENCSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVENCSWR_STREAMID_OVERRIDE    ,NVENCSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSWR_NS    ,NVENCSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x15C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x15C))&0x10000)==0x10000)
group.long 0x15C++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSWR_0,StreamID Security Configuration Register For NVENCSWR"
bitfld.long 0x00 16. " NVENCSWR_STREAMID_WRITE_ACCESS    ,NVENCSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVENCSWR_STREAMID_OVERRIDE    ,NVENCSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSWR_NS    ,NVENCSWR NS" "Secure,Not secure"
else
group.long 0x15C++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSWR_0,StreamID Security Configuration Register For NVENCSWR"
rbitfld.long 0x00 16. " NVENCSWR_STREAMID_WRITE_ACCESS    ,NVENCSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVENCSWR_STREAMID_OVERRIDE    ,NVENCSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSWR_NS    ,NVENCSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x49C))&0x01)==0x00)
group.long 0x498++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPR_0,StreamID Override Register For BPMPR"
hexmask.long.byte 0x00 0.--7. 1. " BPMPR_STREAMID                    ,BPMPR StreamID"
else
rgroup.long 0x498++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPR_0,StreamID Override Register For BPMPR"
hexmask.long.byte 0x00 0.--7. 1. " BPMPR_STREAMID                    ,BPMPR StreamID"
endif
if (((per.l(ad:0x02C00000+0x434))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x434))&0x10000)==0x00)
group.long 0x434++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRDB_0,StreamID Security Configuration Register For TSECSRDB"
bitfld.long 0x00 16. " TSECSRDB_STREAMID_WRITE_ACCESS    ,TSECSRDB StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  TSECSRDB_STREAMID_OVERRIDE    ,TSECSRDB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRDB_NS    ,TSECSRDB NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x434))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x434))&0x10000)==0x10000)
group.long 0x434++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRDB_0,StreamID Security Configuration Register For TSECSRDB"
bitfld.long 0x00 16. " TSECSRDB_STREAMID_WRITE_ACCESS    ,TSECSRDB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSRDB_STREAMID_OVERRIDE    ,TSECSRDB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRDB_NS    ,TSECSRDB NS" "Secure,Not secure"
else
group.long 0x434++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRDB_0,StreamID Security Configuration Register For TSECSRDB"
rbitfld.long 0x00 16. " TSECSRDB_STREAMID_WRITE_ACCESS    ,TSECSRDB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSRDB_STREAMID_OVERRIDE    ,TSECSRDB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRDB_NS    ,TSECSRDB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4A4))&0x01)==0x00)
group.long 0x4A0++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPW_0,StreamID Override Register For BPMPW"
hexmask.long.byte 0x00 0.--7. 1. " BPMPW_STREAMID                    ,BPMPW StreamID"
else
rgroup.long 0x4A0++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPW_0,StreamID Override Register For BPMPW"
hexmask.long.byte 0x00 0.--7. 1. " BPMPW_STREAMID                    ,BPMPW StreamID"
endif
if (((per.l(ad:0x02C00000+0x1AC))&0x01)==0x00)
group.long 0x1A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_HDAW_0,StreamID Override Register For HDAW"
hexmask.long.byte 0x00 0.--7. 1. " HDAW_STREAMID                     ,HDAW StreamID"
else
rgroup.long 0x1A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_HDAW_0,StreamID Override Register For HDAW"
hexmask.long.byte 0x00 0.--7. 1. " HDAW_STREAMID                     ,HDAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x50C))&0x01)==0x00)
group.long 0x508++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDISPLAYR1_0,StreamID Override Register For NVDISPLAYR1"
hexmask.long.byte 0x00 0.--7. 1. " NVDISPLAYR1_STREAMID              ,NVDISPLAYR1 StreamID"
else
rgroup.long 0x508++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDISPLAYR1_0,StreamID Override Register For NVDISPLAYR1"
hexmask.long.byte 0x00 0.--7. 1. " NVDISPLAYR1_STREAMID              ,NVDISPLAYR1 StreamID"
endif
if (((per.l(ad:0x02C00000+0x46C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x46C))&0x10000)==0x00)
group.long 0x46C++0x03
line.long 0x00 "SECURITY_CONFIG_AXISW_0,StreamID Security Configuration Register For AXISW"
bitfld.long 0x00 16. " AXISW_STREAMID_WRITE_ACCESS       ,AXISW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AXISW_STREAMID_OVERRIDE       ,AXISW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISW_NS       ,AXISW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x46C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x46C))&0x10000)==0x10000)
group.long 0x46C++0x03
line.long 0x00 "SECURITY_CONFIG_AXISW_0,StreamID Security Configuration Register For AXISW"
bitfld.long 0x00 16. " AXISW_STREAMID_WRITE_ACCESS       ,AXISW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AXISW_STREAMID_OVERRIDE       ,AXISW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISW_NS       ,AXISW NS" "Secure,Not secure"
else
group.long 0x46C++0x03
line.long 0x00 "SECURITY_CONFIG_AXISW_0,StreamID Security Configuration Register For AXISW"
rbitfld.long 0x00 16. " AXISW_STREAMID_WRITE_ACCESS       ,AXISW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AXISW_STREAMID_OVERRIDE       ,AXISW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISW_NS       ,AXISW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4FC))&0x01)==0x00)
group.long 0x4F8++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEDMAR_0,StreamID Override Register For APEDMAR"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAR_STREAMID                  ,APEDMAR StreamID"
else
rgroup.long 0x4F8++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEDMAR_0,StreamID Override Register For APEDMAR"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAR_STREAMID                  ,APEDMAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x33c))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x33c))&0x10000)==0x00)
group.long 0x33C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAB_0,StreamID Security Configuration Register For SDMMCWAB"
bitfld.long 0x00 16. " SDMMCWAB_STREAMID_WRITE_ACCESS    ,SDMMCWAB StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCWAB_STREAMID_OVERRIDE    ,SDMMCWAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAB_NS    ,SDMMCWAB NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x33c))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x33c))&0x10000)==0x10000)
group.long 0x33C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAB_0,StreamID Security Configuration Register For SDMMCWAB"
bitfld.long 0x00 16. " SDMMCWAB_STREAMID_WRITE_ACCESS    ,SDMMCWAB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWAB_STREAMID_OVERRIDE    ,SDMMCWAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAB_NS    ,SDMMCWAB NS" "Secure,Not secure"
else
group.long 0x33C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAB_0,StreamID Security Configuration Register For SDMMCWAB"
rbitfld.long 0x00 16. " SDMMCWAB_STREAMID_WRITE_ACCESS    ,SDMMCWAB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWAB_STREAMID_OVERRIDE    ,SDMMCWAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAB_NS    ,SDMMCWAB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x74))&0x01)==0x00)
group.long 0x70++0x03
line.long 0x00 "OVERRIDE_CONFIG_AFIR_0,StreamID Override Register For AFIR"
hexmask.long.byte 0x00 0.--7. 1. " AFIR_STREAMID                     ,AFIR StreamID"
else
rgroup.long 0x70++0x03
line.long 0x00 "OVERRIDE_CONFIG_AFIR_0,StreamID Override Register For AFIR"
hexmask.long.byte 0x00 0.--7. 1. " AFIR_STREAMID                     ,AFIR StreamID"
endif
if (((per.l(ad:0x02C00000+0x4D4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4D4))&0x10000)==0x00)
group.long 0x4D4++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAW_0,StreamID Security Configuration Register For AONDMAW"
bitfld.long 0x00 16. " AONDMAW_STREAMID_WRITE_ACCESS     ,AONDMAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AONDMAW_STREAMID_OVERRIDE     ,AONDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAW_NS     ,AONDMAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4D4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4D4))&0x10000)==0x10000)
group.long 0x4D4++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAW_0,StreamID Security Configuration Register For AONDMAW"
bitfld.long 0x00 16. " AONDMAW_STREAMID_WRITE_ACCESS     ,AONDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONDMAW_STREAMID_OVERRIDE     ,AONDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAW_NS     ,AONDMAW NS" "Secure,Not secure"
else
group.long 0x4D4++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAW_0,StreamID Security Configuration Register For AONDMAW"
rbitfld.long 0x00 16. " AONDMAW_STREAMID_WRITE_ACCESS     ,AONDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONDMAW_STREAMID_OVERRIDE     ,AONDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAW_NS     ,AONDMAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x464))&0x01)==0x00)
group.long 0x460++0x03
line.long 0x00 "OVERRIDE_CONFIG_AXISR_0,StreamID Override Register For AXISR"
hexmask.long.byte 0x00 0.--7. 1. " AXISR_STREAMID                    ,AXISR StreamID"
else
rgroup.long 0x460++0x03
line.long 0x00 "OVERRIDE_CONFIG_AXISR_0,StreamID Override Register For AXISR"
hexmask.long.byte 0x00 0.--7. 1. " AXISR_STREAMID                    ,AXISR StreamID"
endif
if (((per.l(ad:0x02C00000+0x44C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x44C))&0x10000)==0x00)
group.long 0x44C++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR2_0,StreamID Security Configuration Register For GPUSWR2"
bitfld.long 0x00 16. " GPUSWR2_STREAMID_WRITE_ACCESS     ,GPUSWR2 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  GPUSWR2_STREAMID_OVERRIDE     ,GPUSWR2 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR2_NS     ,GPUSWR2 NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x44C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x44C))&0x10000)==0x10000)
group.long 0x44C++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR2_0,StreamID Security Configuration Register For GPUSWR2"
bitfld.long 0x00 16. " GPUSWR2_STREAMID_WRITE_ACCESS     ,GPUSWR2 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSWR2_STREAMID_OVERRIDE     ,GPUSWR2 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR2_NS     ,GPUSWR2 NS" "Secure,Not secure"
else
group.long 0x44C++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR2_0,StreamID Security Configuration Register For GPUSWR2"
rbitfld.long 0x00 16. " GPUSWR2_STREAMID_WRITE_ACCESS     ,GPUSWR2 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSWR2_STREAMID_OVERRIDE     ,GPUSWR2 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR2_NS     ,GPUSWR2 NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x1EC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1EC))&0x10000)==0x00)
group.long 0x1EC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAW_0,StreamID Security Configuration Register For SATAW"
bitfld.long 0x00 16. " SATAW_STREAMID_WRITE_ACCESS       ,SATAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SATAW_STREAMID_OVERRIDE       ,SATAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAW_NS       ,SATAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x1EC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1EC))&0x10000)==0x10000)
group.long 0x1EC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAW_0,StreamID Security Configuration Register For SATAW"
bitfld.long 0x00 16. " SATAW_STREAMID_WRITE_ACCESS       ,SATAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SATAW_STREAMID_OVERRIDE       ,SATAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAW_NS       ,SATAW NS" "Secure,Not secure"
else
group.long 0x1EC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAW_0,StreamID Security Configuration Register For SATAW"
rbitfld.long 0x00 16. " SATAW_STREAMID_WRITE_ACCESS       ,SATAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SATAW_STREAMID_OVERRIDE       ,SATAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAW_NS       ,SATAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x48C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x48C))&0x10000)==0x00)
group.long 0x48C++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCW_0,StreamID Security Configuration Register For UFSHCW"
bitfld.long 0x00 16. " UFSHCW_STREAMID_WRITE_ACCESS      ,UFSHCW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  UFSHCW_STREAMID_OVERRIDE      ,UFSHCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  UFSHCW_NS      ,UFSHCW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x48C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x48C))&0x10000)==0x10000)
group.long 0x48C++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCW_0,StreamID Security Configuration Register For UFSHCW"
bitfld.long 0x00 16. " UFSHCW_STREAMID_WRITE_ACCESS      ,UFSHCW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  UFSHCW_STREAMID_OVERRIDE      ,UFSHCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  UFSHCW_NS      ,UFSHCW NS" "Secure,Not secure"
else
group.long 0x48C++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCW_0,StreamID Security Configuration Register For UFSHCW"
rbitfld.long 0x00 16. " SATAW_STREAMID_WRITE_ACCESS       ,UFSHCW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SATAW_STREAMID_OVERRIDE       ,UFSHCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAW_NS       ,UFSHCW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x18C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x18C))&0x10000)==0x00)
group.long 0x18C++0x03
line.long 0x00 "SECURITY_CONFIG_AFIW_0,StreamID Security Configuration Register For AFIW"
bitfld.long 0x00 16. " AFIW_STREAMID_WRITE_ACCESS        ,AFIW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AFIW_STREAMID_OVERRIDE        ,AFIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIW_NS        ,AFIW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x18C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x18C))&0x10000)==0x10000)
group.long 0x18C++0x03
line.long 0x00 "SECURITY_CONFIG_AFIW_0,StreamID Security Configuration Register For AFIW"
bitfld.long 0x00 16. " AFIW_STREAMID_WRITE_ACCESS        ,AFIW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AFIW_STREAMID_OVERRIDE        ,AFIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIW_NS        ,AFIW NS" "Secure,Not secure"
else
group.long 0x18C++0x03
line.long 0x00 "SECURITY_CONFIG_AFIW_0,StreamID Security Configuration Register For AFIW"
rbitfld.long 0x00 16. " AFIW_STREAMID_WRITE_ACCESS        ,AFIW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AFIW_STREAMID_OVERRIDE        ,AFIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AFIW_NS        ,AFIW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x314))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x314))&0x10000)==0x00)
group.long 0x314++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCR_0,StreamID Security Configuration Register For SDMMCR"
bitfld.long 0x00 16. " SDMMCR_STREAMID_WRITE_ACCESS      ,SDMMCR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCR_STREAMID_OVERRIDE      ,SDMMCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCR_NS      ,SDMMCR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x314))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x314))&0x10000)==0x10000)
group.long 0x314++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCR_0,StreamID Security Configuration Register For SDMMCR"
bitfld.long 0x00 16. " SDMMCR_STREAMID_WRITE_ACCESS      ,SDMMCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCR_STREAMID_OVERRIDE      ,SDMMCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCR_NS      ,SDMMCR NS" "Secure,Not secure"
else
group.long 0x314++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCR_0,StreamID Security Configuration Register For SDMMCR"
rbitfld.long 0x00 16. " SDMMCR_STREAMID_WRITE_ACCESS      ,SDMMCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCR_STREAMID_OVERRIDE      ,SDMMCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCR_NS      ,SDMMCR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x514))&0x01)==0x00)
group.long 0x510++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSRD1_0,StreamID Override Register For VICSRD1"
hexmask.long.byte 0x00 0.--7. 1. " VICSRD1_STREAMID                  ,VICSRD1 StreamID"
else
rgroup.long 0x510++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSRD1_0,StreamID Override Register For VICSRD1"
hexmask.long.byte 0x00 0.--7. 1. " VICSRD1_STREAMID                  ,VICSRD1 StreamID"
endif
if (((per.l(ad:0x02C00000+0x4F4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4F4))&0x10000)==0x00)
group.long 0x4F4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAW_0,StreamID Security Configuration Register For SCEDMAW"
bitfld.long 0x00 16. " SCEDMAW_STREAMID_WRITE_ACCESS     ,SCEDMAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SCEDMAW_STREAMID_OVERRIDE     ,SCEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAW_NS     ,SCEDMAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4F4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4F4))&0x10000)==0x10000)
group.long 0x4F4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAW_0,StreamID Security Configuration Register For SCEDMAW"
bitfld.long 0x00 16. " SCEDMAW_STREAMID_WRITE_ACCESS     ,SCEDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEDMAW_STREAMID_OVERRIDE     ,SCEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAW_NS     ,SCEDMAW NS" "Secure,Not secure"
else
group.long 0x4F4++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAW_0,StreamID Security Configuration Register For SCEDMAW"
rbitfld.long 0x00 16. " SCEDMAW_STREAMID_WRITE_ACCESS     ,SCEDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEDMAW_STREAMID_OVERRIDE     ,SCEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAW_NS     ,SCEDMAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x484))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x484))&0x10000)==0x00)
group.long 0x484++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCR_0,StreamID Security Configuration Register For UFSHCR"
bitfld.long 0x00 16. " UFSHCR_STREAMID_WRITE_ACCESS      ,UFSHCR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  UFSHCR_STREAMID_OVERRIDE      ,UFSHCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  UFSHCR_NS      ,UFSHCR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x484))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x484))&0x10000)==0x10000)
group.long 0x484++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCR_0,StreamID Security Configuration Register For UFSHCR"
bitfld.long 0x00 16. " UFSHCR_STREAMID_WRITE_ACCESS      ,UFSHCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  UFSHCR_STREAMID_OVERRIDE      ,UFSHCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  UFSHCR_NS      ,UFSHCR NS" "Secure,Not secure"
else
group.long 0x484++0x03
line.long 0x00 "SECURITY_CONFIG_UFSHCR_0,StreamID Security Configuration Register For UFSHCR"
rbitfld.long 0x00 16. " UFSHCR_STREAMID_WRITE_ACCESS      ,UFSHCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  UFSHCR_STREAMID_OVERRIDE      ,UFSHCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  UFSHCR_NS      ,UFSHCR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x32C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x32C))&0x10000)==0x00)
group.long 0x32C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAA_0,StreamID Security Configuration Register For SDMMCWAA"
bitfld.long 0x00 16. " SDMMCWAA_STREAMID_WRITE_ACCESS    ,SDMMCWAA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCWAA_STREAMID_OVERRIDE    ,SDMMCWAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAA_NS    ,SDMMCWAA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x32C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x32C))&0x10000)==0x10000)
group.long 0x32C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAA_0,StreamID Security Configuration Register For SDMMCWAA"
bitfld.long 0x00 16. " SDMMCWAA_STREAMID_WRITE_ACCESS    ,SDMMCWAA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWAA_STREAMID_OVERRIDE    ,SDMMCWAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAA_NS    ,SDMMCWAA NS" "Secure,Not secure"
else
group.long 0x32C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWAA_0,StreamID Security Configuration Register For SDMMCWAA"
rbitfld.long 0x00 16. " SDMMCWAA_STREAMID_WRITE_ACCESS    ,SDMMCWAA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWAA_STREAMID_OVERRIDE    ,SDMMCWAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWAA_NS    ,SDMMCWAA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x504))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x504))&0x10000)==0x00)
group.long 0x504++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAW_0,StreamID Security Configuration Register For APEDMAW"
bitfld.long 0x00 16. " APEDMAW_STREAMID_WRITE_ACCESS     ,APEDMAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  APEDMAW_STREAMID_OVERRIDE     ,APEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAW_NS     ,APEDMAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x504))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x504))&0x10000)==0x10000)
group.long 0x504++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAW_0,StreamID Security Configuration Register For APEDMAW"
bitfld.long 0x00 16. " APEDMAW_STREAMID_WRITE_ACCESS     ,APEDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEDMAW_STREAMID_OVERRIDE     ,APEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAW_NS     ,APEDMAW NS" "Secure,Not secure"
else
group.long 0x504++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAW_0,StreamID Security Configuration Register For APEDMAW"
rbitfld.long 0x00 16. " APEDMAW_STREAMID_WRITE_ACCESS     ,APEDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEDMAW_STREAMID_OVERRIDE     ,APEDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAW_NS     ,APEDMAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x2A4))&0x01)==0x00)
group.long 0x2A0++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSRD_0,StreamID Override Register For TSECSRD"
hexmask.long.byte 0x00 0.--7. 1. " TSECSRD_STREAMID                  ,TSECSRD StreamID"
else
rgroup.long 0x2A0++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSRD_0,StreamID Override Register For TSECSRD"
hexmask.long.byte 0x00 0.--7. 1. " TSECSRD_STREAMID                  ,TSECSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0x4B4))&0x01)==0x00)
group.long 0x4B0++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPDMAW_0,StreamID Override Register For BPMPDMAW"
hexmask.long.byte 0x00 0.--7. 1. " BPMPDMAW_STREAMID                 ,BPMPDMAW StreamID"
else
rgroup.long 0x4B0++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPDMAW_0,StreamID Override Register For BPMPDMAW"
hexmask.long.byte 0x00 0.--7. 1. " BPMPDMAW_STREAMID                 ,BPMPDMAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x40C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x40C))&0x10000)==0x00)
group.long 0x40C++0x03
line.long 0x00 "SECURITY_CONFIG_SESWR_0,StreamID Security Configuration Register For SESWR"
bitfld.long 0x00 16. " SESWR_STREAMID_WRITE_ACCESS       ,SESWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SESWR_STREAMID_OVERRIDE       ,SESWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESWR_NS       ,SESWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x40C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x40C))&0x10000)==0x10000)
group.long 0x40C++0x03
line.long 0x00 "SECURITY_CONFIG_SESWR_0,StreamID Security Configuration Register For SESWR"
bitfld.long 0x00 16. " SESWR_STREAMID_WRITE_ACCESS       ,SESWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SESWR_STREAMID_OVERRIDE       ,SESWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESWR_NS       ,SESWR NS" "Secure,Not secure"
else
group.long 0x40C++0x03
line.long 0x00 "SECURITY_CONFIG_SESWR_0,StreamID Security Configuration Register For SESWR"
rbitfld.long 0x00 16. " SESWR_STREAMID_WRITE_ACCESS       ,SESWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SESWR_STREAMID_OVERRIDE       ,SESWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESWR_NS       ,SESWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x13C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x13C))&0x10000)==0x00)
group.long 0x13C++0x03
line.long 0x00 "SECURITY_CONFIG_MPCORER_0,StreamID Security Configuration Register For MPCORER"
bitfld.long 0x00 16. " MPCORER_STREAMID_WRITE_ACCESS     ,MPCORER StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  MPCORER_STREAMID_OVERRIDE     ,MPCORER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCORER_NS     ,MPCORER NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x13C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x13C))&0x10000)==0x10000)
group.long 0x13C++0x03
line.long 0x00 "SECURITY_CONFIG_MPCORER_0,StreamID Security Configuration Register For MPCORER"
bitfld.long 0x00 16. " MPCORER_STREAMID_WRITE_ACCESS     ,MPCORER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  MPCORER_STREAMID_OVERRIDE     ,MPCORER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCORER_NS     ,MPCORER NS" "Secure,Not secure"
else
group.long 0x13C++0x03
line.long 0x00 "SECURITY_CONFIG_MPCORER_0,StreamID Security Configuration Register For MPCORER"
rbitfld.long 0x00 16. " MPCORER_STREAMID_WRITE_ACCESS     ,MPCORER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  MPCORER_STREAMID_OVERRIDE     ,MPCORER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCORER_NS     ,MPCORER NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4))&0x10000)==0x00)
group.long 0x4++0x03
line.long 0x00 "SECURITY_CONFIG_PTCR_0,StreamID Security Configuration Register For PTCR"
bitfld.long 0x00 16. " PTCR_STREAMID_WRITE_ACCESS        ,PTCR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  PTCR_STREAMID_OVERRIDE        ,PTCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  PTCR_NS        ,PTCR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4))&0x10000)==0x10000)
group.long 0x4++0x03
line.long 0x00 "SECURITY_CONFIG_PTCR_0,StreamID Security Configuration Register For PTCR"
bitfld.long 0x00 16. " PTCR_STREAMID_WRITE_ACCESS        ,PTCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  PTCR_STREAMID_OVERRIDE        ,PTCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  PTCR_NS        ,PTCR NS" "Secure,Not secure"
else
group.long 0x4++0x03
line.long 0x00 "SECURITY_CONFIG_PTCR_0,StreamID Security Configuration Register For PTCR"
rbitfld.long 0x00 16. " PTCR_STREAMID_WRITE_ACCESS        ,PTCR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  PTCR_STREAMID_OVERRIDE        ,PTCR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  PTCR_NS        ,PTCR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x1CC))&0x01)==0x00)
group.long 0x1C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_MPCOREW_0,StreamID Override Register For MPCOREW"
hexmask.long.byte 0x00 0.--7. 1. " MPCOREW_STREAMID                  ,MPCOREW StreamID"
else
rgroup.long 0x1C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_MPCOREW_0,StreamID Override Register For MPCOREW"
hexmask.long.byte 0x00 0.--7. 1. " MPCOREW_STREAMID                  ,MPCOREW StreamID"
endif
if (((per.l(ad:0x02C00000+0x4A4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4A4))&0x10000)==0x00)
group.long 0x4A4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPW_0,StreamID Security Configuration Register For BPMPW"
bitfld.long 0x00 16. " BPMPW_STREAMID_WRITE_ACCESS       ,BPMPW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  BPMPW_STREAMID_OVERRIDE       ,BPMPW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPW_NS       ,BPMPW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4A4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4A4))&0x10000)==0x10000)
group.long 0x4A4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPW_0,StreamID Security Configuration Register For BPMPW"
bitfld.long 0x00 16. " BPMPW_STREAMID_WRITE_ACCESS       ,BPMPW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPW_STREAMID_OVERRIDE       ,BPMPW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPW_NS       ,BPMPW NS" "Secure,Not secure"
else
group.long 0x4A4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPW_0,StreamID Security Configuration Register For BPMPW"
rbitfld.long 0x00 16. " BPMPW_STREAMID_WRITE_ACCESS       ,BPMPW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPW_STREAMID_OVERRIDE       ,BPMPW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPW_NS       ,BPMPW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x254))&0x01)==0x00)
group.long 0x250++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_HOSTR_0,StreamID Override Register For XUSB HOSTR"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_HOSTR_STREAMID               ,XUSB HOSTR StreamID"
else
rgroup.long 0x250++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_HOSTR_0,StreamID Override Register For XUSB HOSTR"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_HOSTR_STREAMID               ,XUSB HOSTR StreamID"
endif
if (((per.l(ad:0x02C00000+0x2CC))&0x01)==0x00)
group.long 0x2C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSWR_0,StreamID Override Register For GPUSWR"
hexmask.long.byte 0x00 0.--7. 1. " GPUSWR_STREAMID                   ,GPUSWR StreamID"
else
rgroup.long 0x2C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSWR_0,StreamID Override Register For GPUSWR"
hexmask.long.byte 0x00 0.--7. 1. " GPUSWR_STREAMID                   ,GPUSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x264))&0x01)==0x00)
group.long 0x260++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_DEVR_0,StreamID Override Register For XUSB_DEVR"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_DEVR_STREAMID                ,XUSB DEVR StreamID"
else
rgroup.long 0x260++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_DEVR_0,StreamID Override Register For XUSB_DEVR"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_DEVR_STREAMID                ,XUSB DEVR StreamID"
endif
if (((per.l(ad:0x02C00000+0x48C))&0x01)==0x00)
group.long 0x488++0x03
line.long 0x00 "OVERRIDE_CONFIG_UFSHCW_0,StreamID Override Register For UFSHCW"
hexmask.long.byte 0x00 0.--7. 1. " UFSHCW_STREAMID                   ,UFSHCW StreamID"
else
rgroup.long 0x488++0x03
line.long 0x00 "OVERRIDE_CONFIG_UFSHCW_0,StreamID Override Register For UFSHCW"
hexmask.long.byte 0x00 0.--7. 1. " UFSHCW_STREAMID                   ,UFSHCW StreamID"
endif
if (((per.l(ad:0x02C00000+0x42C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x42C))&0x10000)==0x00)
group.long 0x42C++0x03
line.long 0x00 "SECURITY_CONFIG_ETRW_0,StreamID Security Configuration Register For ETRW"
bitfld.long 0x00 16. " ETRW_STREAMID_WRITE_ACCESS        ,ETRW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  ETRW_STREAMID_OVERRIDE        ,ETRW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRW_NS        ,ETRW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x42C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x42C))&0x10000)==0x10000)
group.long 0x42C++0x03
line.long 0x00 "SECURITY_CONFIG_ETRW_0,StreamID Security Configuration Register For ETRW"
bitfld.long 0x00 16. " ETRW_STREAMID_WRITE_ACCESS        ,ETRW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ETRW_STREAMID_OVERRIDE        ,ETRW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRW_NS        ,ETRW NS" "Secure,Not secure"
else
group.long 0x42C++0x03
line.long 0x00 "SECURITY_CONFIG_ETRW_0,StreamID Security Configuration Register For ETRW"
rbitfld.long 0x00 16. " ETRW_STREAMID_WRITE_ACCESS        ,ETRW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ETRW_STREAMID_OVERRIDE        ,ETRW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRW_NS        ,ETRW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x2C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2C4))&0x10000)==0x00)
group.long 0x2C4++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD_0,StreamID Security Configuration Register For GPUSRD"
bitfld.long 0x00 16. " GPUSRD_STREAMID_WRITE_ACCESS      ,GPUSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  GPUSRD_STREAMID_OVERRIDE      ,GPUSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD_NS      ,GPUSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x2C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2C4))&0x10000)==0x10000)
group.long 0x2C4++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD_0,StreamID Security Configuration Register For GPUSRD"
bitfld.long 0x00 16. " GPUSRD_STREAMID_WRITE_ACCESS      ,GPUSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSRD_STREAMID_OVERRIDE      ,GPUSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD_NS      ,GPUSRD NS" "Secure,Not secure"
else
group.long 0x2C4++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD_0,StreamID Security Configuration Register For GPUSRD"
rbitfld.long 0x00 16. " GPUSRD_STREAMID_WRITE_ACCESS      ,GPUSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSRD_STREAMID_OVERRIDE      ,GPUSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD_NS      ,GPUSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x36C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x36C))&0x10000)==0x00)
group.long 0x36C++0x03
line.long 0x00 "SECURITY_CONFIG_VICSWR_0,StreamID Security Configuration Register For VICSWR"
bitfld.long 0x00 16. " VICSWR_STREAMID_WRITE_ACCESS      ,VICSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  VICSWR_STREAMID_OVERRIDE      ,VICSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSWR_NS      ,VICSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x36C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x36C))&0x10000)==0x10000)
group.long 0x36C++0x03
line.long 0x00 "SECURITY_CONFIG_VICSWR_0,StreamID Security Configuration Register For VICSWR"
bitfld.long 0x00 16. " VICSWR_STREAMID_WRITE_ACCESS      ,VICSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSWR_STREAMID_OVERRIDE      ,VICSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSWR_NS      ,VICSWR NS" "Secure,Not secure"
else
group.long 0x36C++0x03
line.long 0x00 "SECURITY_CONFIG_VICSWR_0,StreamID Security Configuration Register For VICSWR"
rbitfld.long 0x00 16. " VICSWR_STREAMID_WRITE_ACCESS      ,VICSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSWR_STREAMID_OVERRIDE      ,VICSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSWR_NS      ,VICSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x25C))&0x01)==0x00)
group.long 0x258++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_HOSTW_0,StreamID Override Register For XUSB HOSTW"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_HOSTW_STREAMID               ,XUSB HOSTW StreamID"
else
rgroup.long 0x258++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_HOSTW_0,StreamID Override Register For XUSB HOSTW"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_HOSTW_STREAMID               ,XUSB HOSTW StreamID"
endif
if (((per.l(ad:0x02C00000+0x4EC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4EC))&0x10000)==0x00)
group.long 0x4EC++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAR_0,StreamID Security Configuration Register For SCEDMAR"
bitfld.long 0x00 16. " SCEDMAR_STREAMID_WRITE_ACCESS     ,SCEDMAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SCEDMAR_STREAMID_OVERRIDE     ,SCEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAR_NS     ,SCEDMAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4EC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4EC))&0x10000)==0x10000)
group.long 0x4EC++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAR_0,StreamID Security Configuration Register For SCEDMAR"
bitfld.long 0x00 16. " SCEDMAR_STREAMID_WRITE_ACCESS     ,SCEDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEDMAR_STREAMID_OVERRIDE     ,SCEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAR_NS     ,SCEDMAR NS" "Secure,Not secure"
else
group.long 0x4EC++0x03
line.long 0x00 "SECURITY_CONFIG_SCEDMAR_0,StreamID Security Configuration Register For SCEDMAR"
rbitfld.long 0x00 16. " SCEDMAR_STREAMID_WRITE_ACCESS     ,SCEDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCEDMAR_STREAMID_OVERRIDE     ,SCEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCEDMAR_NS     ,SCEDMAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x33C))&0x01)==0x00)
group.long 0x338++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWAB_0,StreamID Override Register For SDMMCWAB"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCWAB_STREAMID                 ,SDMMCWAB StreamID"
else
rgroup.long 0x338++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWAB_0,StreamID Override Register For SDMMCWAB"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCWAB_STREAMID                 ,SDMMCWAB StreamID"
endif
if (((per.l(ad:0x02C00000+0x1AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1AC))&0x10000)==0x00)
group.long 0x1AC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAW_0,StreamID Security Configuration Register For HDAW"
bitfld.long 0x00 16. " HDAW_STREAMID_WRITE_ACCESS        ,HDAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  HDAW_STREAMID_OVERRIDE        ,HDAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAW_NS        ,HDAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x1AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1AC))&0x10000)==0x10000)
group.long 0x1AC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAW_0,StreamID Security Configuration Register For HDAW"
bitfld.long 0x00 16. " HDAW_STREAMID_WRITE_ACCESS        ,HDAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HDAW_STREAMID_OVERRIDE        ,HDAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAW_NS        ,HDAW NS" "Secure,Not secure"
else
rgroup.long 0x1AC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAW_0,StreamID Security Configuration Register For HDAW"
rbitfld.long 0x00 16. " HDAW_STREAMID_WRITE_ACCESS        ,HDAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HDAW_STREAMID_OVERRIDE        ,HDAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAW_NS        ,HDAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x1EC))&0x01)==0x00)
group.long 0x1E8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SATAW_0,StreamID Override Register For SATAW"
hexmask.long.byte 0x00 0.--7. 1. " SATAW_STREAMID                    ,SATAW StreamID"
else
rgroup.long 0x1E8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SATAW_0,StreamID Override Register For SATAW"
hexmask.long.byte 0x00 0.--7. 1. " SATAW_STREAMID                    ,SATAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x234))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x234))&0x10000)==0x00)
group.long 0x234++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWA_0,StreamID Security Configuration Register For ISPWA"
bitfld.long 0x00 16. " ISPWA_STREAMID_WRITE_ACCESS       ,ISPWA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  ISPWA_STREAMID_OVERRIDE       ,ISPWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWA_NS       ,ISPWA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x234))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x234))&0x10000)==0x10000)
group.long 0x234++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWA_0,StreamID Security Configuration Register For ISPWA"
bitfld.long 0x00 16. " ISPWA_STREAMID_WRITE_ACCESS       ,ISPWA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPWA_STREAMID_OVERRIDE       ,ISPWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWA_NS       ,ISPWA NS" "Secure,Not secure"
else
group.long 0x234++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWA_0,StreamID Security Configuration Register For ISPWA"
rbitfld.long 0x00 16. " ISPWA_STREAMID_WRITE_ACCESS       ,ISPWA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPWA_STREAMID_OVERRIDE       ,ISPWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWA_NS       ,ISPWA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x47C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x47C))&0x10000)==0x00)
group.long 0x47C++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSW_0,StreamID Security Configuration Register For EQOSW"
bitfld.long 0x00 16. " EQOSW_STREAMID_WRITE_ACCESS       ,EQOSW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  EQOSW_STREAMID_OVERRIDE       ,EQOSW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSW_NS       ,EQOSW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x47C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x47C))&0x10000)==0x10000)
group.long 0x47C++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSW_0,StreamID Security Configuration Register For EQOSW"
bitfld.long 0x00 16. " EQOSW_STREAMID_WRITE_ACCESS       ,EQOSW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  EQOSW_STREAMID_OVERRIDE       ,EQOSW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSW_NS       ,EQOSW NS" "Secure,Not secure"
else
group.long 0x47C++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSW_0,StreamID Security Configuration Register For EQOSW"
bitfld.long 0x00 16. " EQOSW_STREAMID_WRITE_ACCESS       ,EQOSW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  EQOSW_STREAMID_OVERRIDE       ,EQOSW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSW_NS       ,EQOSW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x25C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x25C))&0x10000)==0x00)
group.long 0x25C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTW_0,StreamID Security Configuration Register For XUSB HOSTW"
bitfld.long 0x00 16. " XUSB_HOSTW_STREAMID_WRITE_ACCESS  ,XUSB HOSTW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  XUSB_HOSTW_STREAMID_OVERRIDE  ,XUSB HOSTW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTW_NS  ,XUSB HOSTW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x25C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x25C))&0x10000)==0x10000)
group.long 0x25C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTW_0,StreamID Security Configuration Register For XUSB HOSTW"
bitfld.long 0x00 16. " XUSB_HOSTW_STREAMID_WRITE_ACCESS  ,XUSB HOSTW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_HOSTW_STREAMID_OVERRIDE  ,XUSB HOSTW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTW_NS  ,XUSB HOSTW NS" "Secure,Not secure"
else
group.long 0x25C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTW_0,StreamID Security Configuration Register For XUSB HOSTW"
rbitfld.long 0x00 16. " XUSB_HOSTW_STREAMID_WRITE_ACCESS  ,XUSB HOSTW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_HOSTW_STREAMID_OVERRIDE  ,XUSB HOSTW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTW_NS  ,XUSB HOSTW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4EC))&0x01)==0x00)
group.long 0x4E8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEDMAR_0,StreamID Override Register For SCEDMAR"
hexmask.long.byte 0x00 0.--7. 1. " SCEDMAR_STREAMID                  ,SCEDMAR StreamID"
else
rgroup.long 0x4E8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEDMAR_0,StreamID Override Register For SCEDMAR"
hexmask.long.byte 0x00 0.--7. 1. " SCEDMAR_STREAMID                  ,SCEDMAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x2AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2AC))&0x10000)==0x00)
group.long 0x2AC++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWR_0,StreamID Security Configuration Register For TSECSWR"
bitfld.long 0x00 16. " TSECSWR_STREAMID_WRITE_ACCESS     ,TSECSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  TSECSWR_STREAMID_OVERRIDE     ,TSECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWR_NS     ,TSECSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x2AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2AC))&0x10000)==0x10000)
group.long 0x2AC++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWR_0,StreamID Security Configuration Register For TSECSWR"
bitfld.long 0x00 16. " TSECSWR_STREAMID_WRITE_ACCESS     ,TSECSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSWR_STREAMID_OVERRIDE     ,TSECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWR_NS     ,TSECSWR NS" "Secure,Not secure"
else
group.long 0x2AC++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWR_0,StreamID Security Configuration Register For TSECSWR"
rbitfld.long 0x00 16. " TSECSWR_STREAMID_WRITE_ACCESS     ,TSECSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSWR_STREAMID_OVERRIDE     ,TSECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWR_NS     ,TSECSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0xB4))&0x01)==0x00)
group.long 0xB0++0x03
line.long 0x00 "OVERRIDE_CONFIG_HOST1XDMAR_0,StreamID Override Register For HOST1XDMAR"
hexmask.long.byte 0x00 0.--7. 1. " HOST1XDMAR_STREAMID               ,HOST1XDMAR StreamID"
else
rgroup.long 0xB0++0x03
line.long 0x00 "OVERRIDE_CONFIG_HOST1XDMAR_0,StreamID Override Register For HOST1XDMAR"
hexmask.long.byte 0x00 0.--7. 1. " HOST1XDMAR_STREAMID               ,HOST1XDMAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x30C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x30C))&0x10000)==0x00)
group.long 0x30C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAA_0,StreamID Security Configuration Register For SDMMCRAA"
bitfld.long 0x00 16. " SDMMCRAA_STREAMID_WRITE_ACCESS    ,SDMMCRAA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCRAA_STREAMID_OVERRIDE    ,SDMMCRAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAA_NS    ,SDMMCRAA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x30C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x30C))&0x10000)==0x10000)
group.long 0x30C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAA_0,StreamID Security Configuration Register For SDMMCRAA"
bitfld.long 0x00 16. " SDMMCRAA_STREAMID_WRITE_ACCESS    ,SDMMCRAA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRAA_STREAMID_OVERRIDE    ,SDMMCRAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAA_NS    ,SDMMCRAA NS" "Secure,Not secure"
else
group.long 0x30C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAA_0,StreamID Security Configuration Register For SDMMCRAA"
rbitfld.long 0x00 16. " SDMMCRAA_STREAMID_WRITE_ACCESS    ,SDMMCRAA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRAA_STREAMID_OVERRIDE    ,SDMMCRAA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAA_NS    ,SDMMCRAA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x324))&0x01)==0x00)
group.long 0x320++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWA_0,StreamID Override Register For SDMMCWA"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAW_STREAMID                  ,APEDMAW StreamID"
else
rgroup.long 0x320++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWA_0,StreamID Override Register For SDMMCWA"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAW_STREAMID                  ,APEDMAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x3D4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3D4))&0x10000)==0x00)
group.long 0x3D4++0x03
line.long 0x00 "SECURITY_CONFIG_APER_0,StreamID Security Configuration Register For APER"
bitfld.long 0x00 16. " APER_STREAMID_WRITE_ACCESS        ,APER StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  APER_STREAMID_OVERRIDE        ,APER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APER_NS        ,APER NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3D4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3D4))&0x10000)==0x10000)
group.long 0x3D4++0x03
line.long 0x00 "SECURITY_CONFIG_APER_0,StreamID Security Configuration Register For APER"
bitfld.long 0x00 16. " APER_STREAMID_WRITE_ACCESS        ,APER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APER_STREAMID_OVERRIDE        ,APER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APER_NS        ,APER NS" "Secure,Not secure"
else
group.long 0x3D4++0x03
line.long 0x00 "SECURITY_CONFIG_APER_0,StreamID Security Configuration Register For APER"
rbitfld.long 0x00 16. " APER_STREAMID_WRITE_ACCESS        ,APER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APER_STREAMID_OVERRIDE        ,APER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APER_NS        ,APER NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x394))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x394))&0x10000)==0x00)
group.long 0x394++0x03
line.long 0x00 "SECURITY_CONFIG_VIW_0,StreamID Security Configuration Register For VIW"
bitfld.long 0x00 16. " VIW_STREAMID_WRITE_ACCESS         ,VIW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  VIW_STREAMID_OVERRIDE         ,VIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VIW_NS         ,VIW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x394))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x394))&0x10000)==0x10000)
group.long 0x394++0x03
line.long 0x00 "SECURITY_CONFIG_VIW_0,StreamID Security Configuration Register For VIW"
bitfld.long 0x00 16. " VIW_STREAMID_WRITE_ACCESS         ,VIW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VIW_STREAMID_OVERRIDE         ,VIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VIW_NS         ,VIW NS" "Secure,Not secure"
else
group.long 0x394++0x03
line.long 0x00 "SECURITY_CONFIG_VIW_0,StreamID Security Configuration Register For VIW"
rbitfld.long 0x00 16. " VIW_STREAMID_WRITE_ACCESS         ,VIW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VIW_STREAMID_OVERRIDE         ,VIW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VIW_NS         ,VIW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x504))&0x01)==0x00)
group.long 0x500++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEDMAW_0,StreamID Override Register For APEDMAW"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAW_STREAMID                  ,APEDMAW StreamID"
else
rgroup.long 0x500++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEDMAW_0,StreamID Override Register For APEDMAW"
hexmask.long.byte 0x00 0.--7. 1. " APEDMAW_STREAMID                  ,APEDMAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x40C))&0x01)==0x00)
group.long 0x408++0x03
line.long 0x00 "OVERRIDE_CONFIG_SESWR_0,StreamID Override Register For SESWR"
hexmask.long.byte 0x00 0.--7. 1. " SESWR_STREAMID                    ,SESWR StreamID"
else
rgroup.long 0x408++0x03
line.long 0x00 "OVERRIDE_CONFIG_SESWR_0,StreamID Override Register For SESWR"
hexmask.long.byte 0x00 0.--7. 1. " SESWR_STREAMID                    ,SESWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x3DC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3DC))&0x10000)==0x00)
group.long 0x3DC++0x03
line.long 0x00 "SECURITY_CONFIG_APEW_0,StreamID Security Configuration Register For APEW"
bitfld.long 0x00 16. " APEW_STREAMID_WRITE_ACCESS        ,APEW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  APEW_STREAMID_OVERRIDE        ,APEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEW_NS        ,APEW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3DC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3DC))&0x10000)==0x10000)
group.long 0x3DC++0x03
line.long 0x00 "SECURITY_CONFIG_APEW_0,StreamID Security Configuration Register For APEW"
bitfld.long 0x00 16. " APEW_STREAMID_WRITE_ACCESS        ,APEW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEW_STREAMID_OVERRIDE        ,APEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEW_NS        ,APEW NS" "Secure,Not secure"
else
group.long 0x3DC++0x03
line.long 0x00 "SECURITY_CONFIG_APEW_0,StreamID Security Configuration Register For APEW"
rbitfld.long 0x00 16. " APEW_STREAMID_WRITE_ACCESS        ,APEW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEW_STREAMID_OVERRIDE        ,APEW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEW_NS        ,APEW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x46C))&0x01)==0x00)
group.long 0x468++0x03
line.long 0x00 "OVERRIDE_CONFIG_AXISW_0,StreamID Override Register For AXISW"
hexmask.long.byte 0x00 0.--7. 1. " AXISW_STREAMID                    ,AXISW StreamID"
else
rgroup.long 0x468++0x03
line.long 0x00 "OVERRIDE_CONFIG_AXISW_0,StreamID Override Register For AXISW"
hexmask.long.byte 0x00 0.--7. 1. " AXISW_STREAMID                    ,AXISW StreamID"
endif
if (((per.l(ad:0x02C00000+0x464))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x464))&0x10000)==0x00)
group.long 0x464++0x03
line.long 0x00 "SECURITY_CONFIG_AXISR_0,StreamID Security Configuration Register For AXISR"
bitfld.long 0x00 16. " AXISR_STREAMID_WRITE_ACCESS       ,AXISR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AXISR_STREAMID_OVERRIDE       ,AXISR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISR_NS       ,AXISR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x464))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x464))&0x10000)==0x10000)
group.long 0x464++0x03
line.long 0x00 "SECURITY_CONFIG_AXISR_0,StreamID Security Configuration Register For AXISR"
bitfld.long 0x00 16. " AXISR_STREAMID_WRITE_ACCESS       ,AXISR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AXISR_STREAMID_OVERRIDE       ,AXISR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISR_NS       ,AXISR NS" "Secure,Not secure"
else
group.long 0x464++0x03
line.long 0x00 "SECURITY_CONFIG_AXISR_0,StreamID Security Configuration Register For AXISR"
rbitfld.long 0x00 16. " AXISR_STREAMID_WRITE_ACCESS       ,AXISR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AXISR_STREAMID_OVERRIDE       ,AXISR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AXISR_NS       ,AXISR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x334))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x334))&0x10000)==0x00)
group.long 0x334++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCW_0,StreamID Security Configuration Register For SDMMCW"
bitfld.long 0x00 16. " SDMMCW_STREAMID_WRITE_ACCESS      ,SDMMCW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCW_STREAMID_OVERRIDE      ,SDMMCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCW_NS      ,SDMMCW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x334))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x334))&0x10000)==0x10000)
group.long 0x334++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCW_0,StreamID Security Configuration Register For SDMMCW"
bitfld.long 0x00 16. " SDMMCW_STREAMID_WRITE_ACCESS      ,SDMMCW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCW_STREAMID_OVERRIDE      ,SDMMCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCW_NS      ,SDMMCW NS" "Secure,Not secure"
else
group.long 0x334++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCW_0,StreamID Security Configuration Register For SDMMCW"
rbitfld.long 0x00 16. " SDMMCW_STREAMID_WRITE_ACCESS      ,SDMMCW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCW_STREAMID_OVERRIDE      ,SDMMCW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCW_NS      ,SDMMCW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4D4))&0x01)==0x00)
group.long 0x4D0++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONDMAW_0,StreamID Override Register For AONDMAW"
hexmask.long.byte 0x00 0.--7. 1. " AONDMAW_STREAMID                  ,AONDMAW StreamID"
else
rgroup.long 0x4D0++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONDMAW_0,StreamID Override Register For AONDMAW"
hexmask.long.byte 0x00 0.--7. 1. " AONDMAW_STREAMID                  ,AONDMAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x43C))&0x01)==0x00)
group.long 0x438++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSWRB_0,StreamID Override Register For TSECSWRB"
hexmask.long.byte 0x00 0.--7. 1. " TSECSWRB_STREAMID                 ,TSECSWRB StreamID"
else
rgroup.long 0x438++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSWRB_0,StreamID Override Register For TSECSWRB"
hexmask.long.byte 0x00 0.--7. 1. " TSECSWRB_STREAMID                 ,TSECSWRB StreamID"
endif
if (((per.l(ad:0x02C00000+0x13C))&0x01)==0x00)
group.long 0x138++0x03
line.long 0x00 "OVERRIDE_CONFIG_MPCORER_0,StreamID Override Register For MPCORER"
hexmask.long.byte 0x00 0.--7. 1. " MPCORER_STREAMID                  ,MPCORER StreamID"
else
rgroup.long 0x138++0x03
line.long 0x00 "OVERRIDE_CONFIG_MPCORER_0,StreamID Override Register For MPCORER"
hexmask.long.byte 0x00 0.--7. 1. " MPCORER_STREAMID                  ,MPCORER StreamID"
endif
if (((per.l(ad:0x02C00000+0x23C))&0x01)==0x00)
group.long 0x238++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPWB_0,StreamID Override Register For ISPWB"
hexmask.long.byte 0x00 0.--7. 1. " ISPWB_STREAMID                    ,ISPWB StreamID"
else
rgroup.long 0x238++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPWB_0,StreamID Override Register For ISPWB"
hexmask.long.byte 0x00 0.--7. 1. " ISPWB_STREAMID                    ,ISPWB StreamID"
endif
if (((per.l(ad:0x02C00000+0x4B4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4B4))&0x10000)==0x00)
group.long 0x4B4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAW_0,StreamID Security Configuration Register For BPMPDMAW"
bitfld.long 0x00 16. " BPMPDMAW_STREAMID_WRITE_ACCESS    ,BPMPDMAW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  BPMPDMAW_STREAMID_OVERRIDE    ,BPMPDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAW_NS    ,BPMPDMAW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4B4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4B4))&0x10000)==0x10000)
group.long 0x4B4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAW_0,StreamID Security Configuration Register For BPMPDMAW"
bitfld.long 0x00 16. " BPMPDMAW_STREAMID_WRITE_ACCESS    ,BPMPDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPDMAW_STREAMID_OVERRIDE    ,BPMPDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAW_NS    ,BPMPDMAW NS" "Secure,Not secure"
else
group.long 0x4B4++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAW_0,StreamID Security Configuration Register For BPMPDMAW"
rbitfld.long 0x00 16. " BPMPDMAW_STREAMID_WRITE_ACCESS    ,BPMPDMAW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPDMAW_STREAMID_OVERRIDE    ,BPMPDMAW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAW_NS    ,BPMPDMAW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4BC))&0x01)==0x00)
group.long 0x4B8++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONR_0,StreamID Override Register For AONR"
hexmask.long.byte 0x00 0.--7. 1. " AONR_STREAMID                     ,AONR StreamID"
else
rgroup.long 0x4B8++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONR_0,StreamID Override Register For AONR"
hexmask.long.byte 0x00 0.--7. 1. " AONR_STREAMID                     ,AONR StreamID"
endif
if (((per.l(ad:0x02C00000+0x224))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x224))&0x10000)==0x00)
group.long 0x224++0x03
line.long 0x00 "SECURITY_CONFIG_ISPRA_0,StreamID Security Configuration Register For ISPRA"
bitfld.long 0x00 16. " ISPRA_STREAMID_WRITE_ACCESS       ,ISPRA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  ISPRA_STREAMID_OVERRIDE       ,ISPRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPRA_NS       ,ISPRA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x224))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x224))&0x10000)==0x10000)
group.long 0x224++0x03
line.long 0x00 "SECURITY_CONFIG_ISPRA_0,StreamID Security Configuration Register For ISPRA"
bitfld.long 0x00 16. " ISPRA_STREAMID_WRITE_ACCESS       ,ISPRA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPRA_STREAMID_OVERRIDE       ,ISPRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPRA_NS       ,ISPRA NS" "Secure,Not secure"
else
group.long 0x224++0x03
line.long 0x00 "SECURITY_CONFIG_ISPRA_0,StreamID Security Configuration Register For ISPRA"
rbitfld.long 0x00 16. " ISPRA_STREAMID_WRITE_ACCESS       ,ISPRA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPRA_STREAMID_OVERRIDE       ,ISPRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPRA_NS       ,ISPRA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4AC))&0x01)==0x00)
group.long 0x4A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPDMAR_0,StreamID Override Register For BPMPDMAR"
hexmask.long.byte 0x00 0.--7. 1. " BPMPDMAR_STREAMID                 ,BPMPDMAR StreamID"
else
rgroup.long 0x4A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_BPMPDMAR_0,StreamID Override Register For BPMPDMAR"
hexmask.long.byte 0x00 0.--7. 1. " BPMPDMAR_STREAMID                 ,BPMPDMAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x3CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3CC))&0x10000)==0x00)
group.long 0x3CC++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSWR_0,StreamID Security Configuration Register For NVDECSWR"
bitfld.long 0x00 16. " NVDECSWR_STREAMID_WRITE_ACCESS    ,NVDECSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDECSWR_STREAMID_OVERRIDE    ,NVDECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSWR_NS    ,NVDECSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3CC))&0x10000)==0x10000)
group.long 0x3CC++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSWR_0,StreamID Security Configuration Register For NVDECSWR"
bitfld.long 0x00 16. " NVDECSWR_STREAMID_WRITE_ACCESS    ,NVDECSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDECSWR_STREAMID_OVERRIDE    ,NVDECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSWR_NS    ,NVDECSWR NS" "Secure,Not secure"
else
group.long 0x3CC++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSWR_0,StreamID Security Configuration Register For NVDECSWR"
rbitfld.long 0x00 16. " NVDECSWR_STREAMID_WRITE_ACCESS    ,NVDECSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDECSWR_STREAMID_OVERRIDE    ,NVDECSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSWR_NS    ,NVDECSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x26C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x26C))&0x10000)==0x00)
group.long 0x26C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVW_0,StreamID Security Configuration Register For XUSB DEVW"
bitfld.long 0x00 16. " XUSB_DEVW_STREAMID_WRITE_ACCESS   ,XUSB DEVW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  XUSB_DEVW_STREAMID_OVERRIDE   ,XUSB DEVW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVW_NS   ,XUSB DEVW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x26C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x26C))&0x10000)==0x10000)
group.long 0x26C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVW_0,StreamID Security Configuration Register For XUSB DEVW"
bitfld.long 0x00 16. " XUSB_DEVW_STREAMID_WRITE_ACCESS   ,XUSB DEVW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_DEVW_STREAMID_OVERRIDE   ,XUSB DEVW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVW_NS   ,XUSB DEVW NS" "Secure,Not secure"
else
group.long 0x26C++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_DEVW_0,StreamID Security Configuration Register For XUSB DEVW"
rbitfld.long 0x00 16. " XUSB_DEVW_STREAMID_WRITE_ACCESS   ,XUSB DEVW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_DEVW_STREAMID_OVERRIDE   ,XUSB DEVW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_DEVW_NS   ,XUSB DEVW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3C4))&0x10000)==0x00)
group.long 0x3C4++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD_0,StreamID Security Configuration Register For NVDECSRD"
bitfld.long 0x00 16. " NVDECSRD_STREAMID_WRITE_ACCESS    ,NVDECSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDECSRD_STREAMID_OVERRIDE    ,NVDECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD_NS    ,NVDECSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3C4))&0x10000)==0x10000)
group.long 0x3C4++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD_0,StreamID Security Configuration Register For NVDECSRD"
bitfld.long 0x00 16. " NVDECSRD_STREAMID_WRITE_ACCESS    ,NVDECSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDECSRD_STREAMID_OVERRIDE    ,NVDECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD_NS    ,NVDECSRD NS" "Secure,Not secure"
else
group.long 0x3C4++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD_0,StreamID Security Configuration Register For NVDECSRD"
rbitfld.long 0x00 16. " NVDECSRD_STREAMID_WRITE_ACCESS    ,NVDECSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDECSRD_STREAMID_OVERRIDE    ,NVDECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD_NS    ,NVDECSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0xAC))&0x01)==0x00)
group.long 0xA8++0x03
line.long 0x00 "OVERRIDE_CONFIG_HDAR_0,StreamID Override Register For HDAR"
hexmask.long.byte 0x00 0.--7. 1. " HDAR_STREAMID                     ,HDAR StreamID"
else
rgroup.long 0xA8++0x03
line.long 0x00 "OVERRIDE_CONFIG_HDAR_0,StreamID Override Register For HDAR"
hexmask.long.byte 0x00 0.--7. 1. " HDAR_STREAMID                     ,HDAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x304))&0x01)==0x00)
group.long 0x300++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRA_0,StreamID Override Register For SDMMCRA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRA_STREAMID                  ,SDMMCRA StreamID"
else
rgroup.long 0x300++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRA_0,StreamID Override Register For SDMMCRA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRA_STREAMID                  ,SDMMCRA StreamID"
endif
if (((per.l(ad:0x02C00000+0x42C))&0x01)==0x00)
group.long 0x428++0x03
line.long 0x00 "OVERRIDE_CONFIG_ETRW_0,StreamID Override Register For ETRW"
hexmask.long.byte 0x00 0.--7. 1. " ETRW_STREAMID                     ,ETRW StreamID"
else
rgroup.long 0x428++0x03
line.long 0x00 "OVERRIDE_CONFIG_ETRW_0,StreamID Override Register For ETRW"
hexmask.long.byte 0x00 0.--7. 1. " ETRW_STREAMID                     ,ETRW StreamID"
endif
if (((per.l(ad:0x02C00000+0x44C))&0x01)==0x00)
group.long 0x448++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSWR2_0,StreamID Override Register For GPUSWR2"
hexmask.long.byte 0x00 0.--7. 1. " GPUSWR2_STREAMID                  ,GPUSWR2 StreamID"
else
rgroup.long 0x448++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSWR2_0,StreamID Override Register For GPUSWR2"
hexmask.long.byte 0x00 0.--7. 1. " GPUSWR2_STREAMID                  ,GPUSWR2 StreamID"
endif
if (((per.l(ad:0x02C00000+0x1CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1CC))&0x10000)==0x00)
group.long 0x1CC++0x03
line.long 0x00 "SECURITY_CONFIG_MPCOREW_0,StreamID Security Configuration Register For MPCOREW"
bitfld.long 0x00 16. " MPCOREW_STREAMID_WRITE_ACCESS     ,MPCOREW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  MPCOREW_STREAMID_OVERRIDE     ,MPCOREW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCOREW_NS     ,MPCOREW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x1CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x1CC))&0x10000)==0x10000)
group.long 0x1CC++0x03
line.long 0x00 "SECURITY_CONFIG_MPCOREW_0,StreamID Security Configuration Register For MPCOREW"
bitfld.long 0x00 16. " MPCOREW_STREAMID_WRITE_ACCESS     ,MPCOREW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  MPCOREW_STREAMID_OVERRIDE     ,MPCOREW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCOREW_NS     ,MPCOREW NS" "Secure,Not secure"
else
group.long 0x1CC++0x03
line.long 0x00 "SECURITY_CONFIG_MPCOREW_0,StreamID Security Configuration Register For MPCOREW"
rbitfld.long 0x00 16. " MPCOREW_STREAMID_WRITE_ACCESS     ,MPCOREW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  MPCOREW_STREAMID_OVERRIDE     ,MPCOREW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  MPCOREW_NS     ,MPCOREW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x474))&0x01)==0x00)
group.long 0x470++0x03
line.long 0x00 "OVERRIDE_CONFIG_EQOSR_0,StreamID Override Register For EQOSR"
hexmask.long.byte 0x00 0.--7. 1. " EQOSR_STREAMID                    ,EQOSR StreamID"
else
rgroup.long 0x470++0x03
line.long 0x00 "OVERRIDE_CONFIG_EQOSR_0,StreamID Override Register For EQOSR"
hexmask.long.byte 0x00 0.--7. 1. " EQOSR_STREAMID                    ,EQOSR StreamID"
endif
if (((per.l(ad:0x02C00000+0x494))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x494))&0x10000)==0x00)
group.long 0x494++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR_0,StreamID Security Configuration Register For NVDISPLAYR"
bitfld.long 0x00 16. " NVDISPLAYR_STREAMID_WRITE_ACCESS  ,NVDISPLAYR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDISPLAYR_STREAMID_OVERRIDE  ,NVDISPLAYR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR_NS  ,NVDISPLAYR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x494))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x494))&0x10000)==0x10000)
group.long 0x494++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR_0,StreamID Security Configuration Register For NVDISPLAYR"
bitfld.long 0x00 16. " NVDISPLAYR_STREAMID_WRITE_ACCESS  ,NVDISPLAYR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDISPLAYR_STREAMID_OVERRIDE  ,NVDISPLAYR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR_NS  ,NVDISPLAYR NS" "Secure,Not secure"
else
group.long 0x494++0x03
line.long 0x00 "SECURITY_CONFIG_NVDISPLAYR_0,StreamID Security Configuration Register For NVDISPLAYR"
rbitfld.long 0x00 16. " NVDISPLAYR_STREAMID_WRITE_ACCESS  ,NVDISPLAYR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDISPLAYR_STREAMID_OVERRIDE  ,NVDISPLAYR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDISPLAYR_NS  ,NVDISPLAYR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4AC))&0x10000)==0x00)
group.long 0x4AC++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAR_0,StreamID Security Configuration Register For BPMPDMAR"
bitfld.long 0x00 16. " BPMPDMAR_STREAMID_WRITE_ACCESS    ,BPMPDMAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  BPMPDMAR_STREAMID_OVERRIDE    ,BPMPDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAR_NS    ,BPMPDMAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4AC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4AC))&0x10000)==0x10000)
group.long 0x4AC++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAR_0,StreamID Security Configuration Register For BPMPDMAR"
bitfld.long 0x00 16. " BPMPDMAR_STREAMID_WRITE_ACCESS    ,BPMPDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPDMAR_STREAMID_OVERRIDE    ,BPMPDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAR_NS    ,BPMPDMAR NS" "Secure,Not secure"
else
group.long 0x4AC++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPDMAR_0,StreamID Security Configuration Register For BPMPDMAR"
rbitfld.long 0x00 16. " BPMPDMAR_STREAMID_WRITE_ACCESS    ,BPMPDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPDMAR_STREAMID_OVERRIDE    ,BPMPDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPDMAR_NS    ,BPMPDMAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3FC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3FC))&0x10000)==0x00)
group.long 0x3FC++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSWR_0,StreamID Security Configuration Register For NVJPGSWR"
bitfld.long 0x00 16. " NVJPGSWR_STREAMID_WRITE_ACCESS    ,NVJPGSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVJPGSWR_STREAMID_OVERRIDE    ,NVJPGSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSWR_NS    ,NVJPGSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3FC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3FC))&0x10000)==0x10000)
group.long 0x3FC++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSWR_0,StreamID Security Configuration Register For NVJPGSWR"
bitfld.long 0x00 16. " NVJPGSWR_STREAMID_WRITE_ACCESS    ,NVJPGSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVJPGSWR_STREAMID_OVERRIDE    ,NVJPGSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSWR_NS    ,NVJPGSWR NS" "Secure,Not secure"
else
group.long 0x3FC++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSWR_0,StreamID Security Configuration Register For NVJPGSWR"
rbitfld.long 0x00 16. " NVJPGSWR_STREAMID_WRITE_ACCESS    ,NVJPGSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVJPGSWR_STREAMID_OVERRIDE    ,NVJPGSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSWR_NS    ,NVJPGSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x51C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x51C))&0x10000)==0x00)
group.long 0x51C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD1_0,StreamID Security Configuration Register For NVDECSRD1"
bitfld.long 0x00 16. " NVDECSRD1_STREAMID_WRITE_ACCESS   ,NVDECSRD1 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDECSRD1_STREAMID_OVERRIDE   ,NVDECSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD1_NS   ,NVDECSRD1 NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x51C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x51C))&0x10000)==0x10000)
group.long 0x51C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD1_0,StreamID Security Configuration Register For NVDECSRD1"
bitfld.long 0x00 16. " NVDECSRD1_STREAMID_WRITE_ACCESS   ,NVDECSRD1 StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVDECSRD1_STREAMID_OVERRIDE   ,NVDECSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD1_NS   ,NVDECSRD1 NS" "Secure,Not secure"
else
rgroup.long 0x51C++0x03
line.long 0x00 "SECURITY_CONFIG_NVDECSRD1_0,StreamID Security Configuration Register For NVDECSRD1"
bitfld.long 0x00 16. " NVDECSRD1_STREAMID_WRITE_ACCESS   ,NVDECSRD1 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVDECSRD1_STREAMID_OVERRIDE   ,NVDECSRD1 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVDECSRD1_NS   ,NVDECSRD1 NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x2AC))&0x01)==0x00)
group.long 0x2A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSWR_0,StreamID Override Register For TSECSWR"
hexmask.long.byte 0x00 0.--7. 1. " TSECSWR_STREAMID                  ,TSECSWR StreamID"
else
rgroup.long 0x2A8++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSWR_0,StreamID Override Register For TSECSWR"
hexmask.long.byte 0x00 0.--7. 1. " TSECSWR_STREAMID                  ,TSECSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x424))&0x01)==0x00)
group.long 0x420++0x03
line.long 0x00 "OVERRIDE_CONFIG_ETRR_0,StreamID Override Register For ETRR"
hexmask.long.byte 0x00 0.--7. 1. " ETRR_STREAMID                     ,ETRR StreamID"
else
rgroup.long 0x420++0x03
line.long 0x00 "OVERRIDE_CONFIG_ETRR_0,StreamID Override Register For ETRR"
hexmask.long.byte 0x00 0.--7. 1. " ETRR_STREAMID                     ,ETRR StreamID"
endif
if (((per.l(ad:0x02C00000+0x2A4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2A4))&0x10000)==0x00)
group.long 0x2A4++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRD_0,StreamID Security Configuration Register For TSECSRD"
bitfld.long 0x00 16. " TSECSRD_STREAMID_WRITE_ACCESS     ,TSECSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  TSECSRD_STREAMID_OVERRIDE     ,TSECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRD_NS     ,TSECSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x2A4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2A4))&0x10000)==0x10000)
group.long 0x2A4++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRD_0,StreamID Security Configuration Register For TSECSRD"
bitfld.long 0x00 16. " TSECSRD_STREAMID_WRITE_ACCESS     ,TSECSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSRD_STREAMID_OVERRIDE     ,TSECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRD_NS     ,TSECSRD NS" "Secure,Not secure"
else
group.long 0x2A4++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSRD_0,StreamID Security Configuration Register For TSECSRD"
rbitfld.long 0x00 16. " TSECSRD_STREAMID_WRITE_ACCESS     ,TSECSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSRD_STREAMID_OVERRIDE     ,TSECSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSRD_NS     ,TSECSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3C4))&0x01)==0x00)
group.long 0x3C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSRD_0,StreamID Override Register For NVDECSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSRD_STREAMID                 ,NVDECSRD StreamID"
else
rgroup.long 0x3C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSRD_0,StreamID Override Register For NVDECSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSRD_STREAMID                 ,NVDECSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0x3F4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3F4))&0x10000)==0x00)
group.long 0x3F4++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSRD_0,StreamID Security Configuration Register For NVJPGSRD"
bitfld.long 0x00 16. " NVJPGSRD_STREAMID_WRITE_ACCESS    ,NVJPGSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVJPGSRD_STREAMID_OVERRIDE    ,NVJPGSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSRD_NS    ,NVJPGSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x3F4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x3F4))&0x10000)==0x10000)
group.long 0x3F4++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSRD_0,StreamID Security Configuration Register For NVJPGSRD"
bitfld.long 0x00 16. " NVJPGSRD_STREAMID_WRITE_ACCESS    ,NVJPGSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVJPGSRD_STREAMID_OVERRIDE    ,NVJPGSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSRD_NS    ,NVJPGSRD NS" "Secure,Not secure"
else
group.long 0x3F4++0x03
line.long 0x00 "SECURITY_CONFIG_NVJPGSRD_0,StreamID Security Configuration Register For NVJPGSRD"
rbitfld.long 0x00 16. " NVJPGSRD_STREAMID_WRITE_ACCESS    ,NVJPGSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVJPGSRD_STREAMID_OVERRIDE    ,NVJPGSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVJPGSRD_NS    ,NVJPGSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x324))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x324))&0x10000)==0x00)
group.long 0x324++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWA_0,StreamID Security Configuration Register For SDMMCWA"
bitfld.long 0x00 16. " SDMMCWA_STREAMID_WRITE_ACCESS     ,SDMMCWA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCWA_STREAMID_OVERRIDE     ,SDMMCWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWA_NS     ,SDMMCWA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x324))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x324))&0x10000)==0x10000)
group.long 0x324++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWA_0,StreamID Security Configuration Register For SDMMCWA"
bitfld.long 0x00 16. " SDMMCWA_STREAMID_WRITE_ACCESS     ,SDMMCWA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWA_STREAMID_OVERRIDE     ,SDMMCWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWA_NS     ,SDMMCWA NS" "Secure,Not secure"
else
group.long 0x324++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCWA_0,StreamID Security Configuration Register For SDMMCWA"
rbitfld.long 0x00 16. " SDMMCWA_STREAMID_WRITE_ACCESS     ,SDMMCWA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCWA_STREAMID_OVERRIDE     ,SDMMCWA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCWA_NS     ,SDMMCWA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x434))&0x01)==0x00)
group.long 0x430++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSRDB_0,StreamID Override Register For TSECSRDB"
hexmask.long.byte 0x00 0.--7. 1. " TSECSRDB_STREAMID                 ,TSECSRDB StreamID"
else
rgroup.long 0x430++0x03
line.long 0x00 "OVERRIDE_CONFIG_TSECSRDB_0,StreamID Override Register For TSECSRDB"
hexmask.long.byte 0x00 0.--7. 1. " TSECSRDB_STREAMID                 ,TSECSRDB StreamID"
endif
if (((per.l(ad:0x02C00000+0x30C))&0x01)==0x00)
group.long 0x308++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRAA_0,StreamID Override Register For SDMMCRAA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRAA_STREAMID                 ,SDMMCRAA StreamID"
else
rgroup.long 0x308++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRAA_0,StreamID Override Register For SDMMCRAA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRAA_STREAMID                 ,SDMMCRAA StreamID"
endif
if (((per.l(ad:0x02C00000+0x51C))&0x01)==0x00)
group.long 0x518++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSRD1_0,StreamID Override Register For NVDECSRD1"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSRD1_STREAMID                ,NVDECSRD1 StreamID"
else
rgroup.long 0x518++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSRD1_0,StreamID Override Register For NVDECSRD1"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSRD1_STREAMID                ,NVDECSRD1 StreamID"
endif
if (((per.l(ad:0x02C00000+0x314))&0x01)==0x00)
group.long 0x310++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCR_0,StreamID Override Register For SDMMCR"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCR_STREAMID                   ,SDMMCR StreamID"
else
rgroup.long 0x310++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCR_0,StreamID Override Register For SDMMCR"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCR_STREAMID                   ,SDMMCR StreamID"
endif
if (((per.l(ad:0x02C00000+0x4DC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4DC))&0x10000)==0x00)
group.long 0x4DC++0x03
line.long 0x00 "SECURITY_CONFIG_SCER_0,StreamID Security Configuration Register For SCER"
bitfld.long 0x00 16. " SCER_STREAMID_WRITE_ACCESS        ,SCER StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SCER_STREAMID_OVERRIDE        ,SCER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCER_NS        ,SCER NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4DC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4DC))&0x10000)==0x10000)
group.long 0x4DC++0x03
line.long 0x00 "SECURITY_CONFIG_SCER_0,StreamID Security Configuration Register For SCER"
bitfld.long 0x00 16. " SCER_STREAMID_WRITE_ACCESS        ,SCER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCER_STREAMID_OVERRIDE        ,SCER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCER_NS        ,SCER NS" "Secure,Not secure"
else
group.long 0x4DC++0x03
line.long 0x00 "SECURITY_CONFIG_SCER_0,StreamID Security Configuration Register For SCER"
rbitfld.long 0x00 16. " SCER_STREAMID_WRITE_ACCESS        ,SCER StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SCER_STREAMID_OVERRIDE        ,SCER StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SCER_NS        ,SCER NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x254))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x254))&0x10000)==0x00)
group.long 0x254++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTR_0,StreamID Security Configuration Register For XUSB HOSTR"
bitfld.long 0x00 16. " XUSB_HOSTR_STREAMID_WRITE_ACCESS  ,XUSB HOSTR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  XUSB_HOSTR_STREAMID_OVERRIDE  ,XUSB HOSTR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTR_NS  ,XUSB HOSTR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x254))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x254))&0x10000)==0x10000)
group.long 0x254++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTR_0,StreamID Security Configuration Register For XUSB HOSTR"
bitfld.long 0x00 16. " XUSB_HOSTR_STREAMID_WRITE_ACCESS  ,XUSB HOSTR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_HOSTR_STREAMID_OVERRIDE  ,XUSB HOSTR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTR_NS  ,XUSB HOSTR NS" "Secure,Not secure"
else
group.long 0x254++0x03
line.long 0x00 "SECURITY_CONFIG_XUSB_HOSTR_0,StreamID Security Configuration Register For XUSB HOSTR"
rbitfld.long 0x00 16. " XUSB_HOSTR_STREAMID_WRITE_ACCESS  ,XUSB HOSTR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  XUSB_HOSTR_STREAMID_OVERRIDE  ,XUSB HOSTR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  XUSB_HOSTR_NS  ,XUSB HOSTR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3F4))&0x01)==0x00)
group.long 0x3F0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVJPGSRD_0,StreamID Override Register For NVJPGSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVJPGSRD_STREAMID                 ,NVJPGSRD StreamID"
else
rgroup.long 0x3F0++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVJPGSRD_0,StreamID Override Register For NVJPGSRD"
hexmask.long.byte 0x00 0.--7. 1. " NVJPGSRD_STREAMID                 ,NVJPGSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0x364))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x364))&0x10000)==0x00)
group.long 0x364++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD_0,StreamID Security Configuration Register For VICSRD"
bitfld.long 0x00 16. " VICSRD_STREAMID_WRITE_ACCESS      ,VICSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  VICSRD_STREAMID_OVERRIDE      ,VICSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD_NS      ,VICSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x364))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x364))&0x10000)==0x10000)
group.long 0x364++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD_0,StreamID Security Configuration Register For VICSRD"
bitfld.long 0x00 16. " VICSRD_STREAMID_WRITE_ACCESS      ,VICSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSRD_STREAMID_OVERRIDE      ,VICSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD_NS      ,VICSRD NS" "Secure,Not secure"
else
group.long 0x364++0x03
line.long 0x00 "SECURITY_CONFIG_VICSRD_0,StreamID Security Configuration Register For VICSRD"
rbitfld.long 0x00 16. " VICSRD_STREAMID_WRITE_ACCESS      ,VICSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  VICSRD_STREAMID_OVERRIDE      ,VICSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  VICSRD_NS      ,VICSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4F4))&0x01)==0x00)
group.long 0x4F0++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEDMAW_0,StreamID Override Register For SCEDMAW"
hexmask.long.byte 0x00 0.--7. 1. " SCEDMAW_STREAMID                  ,SCEDMAW StreamID"
else
rgroup.long 0x4F0++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEDMAW_0,StreamID Override Register For SCEDMAW"
hexmask.long.byte 0x00 0.--7. 1. " SCEDMAW_STREAMID                  ,SCEDMAW StreamID"
endif
if (((per.l(ad:0x02C00000+0x4CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4CC))&0x10000)==0x00)
group.long 0x4CC++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAR_0,StreamID Security Configuration Register For AONDMAR"
bitfld.long 0x00 16. " AONDMAR_STREAMID_WRITE_ACCESS     ,AONDMAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AONDMAR_STREAMID_OVERRIDE     ,AONDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAR_NS     ,AONDMAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4CC))&0x10000)==0x10000)
group.long 0x4CC++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAR_0,StreamID Security Configuration Register For AONDMAR"
bitfld.long 0x00 16. " AONDMAR_STREAMID_WRITE_ACCESS     ,AONDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONDMAR_STREAMID_OVERRIDE     ,AONDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAR_NS     ,AONDMAR NS" "Secure,Not secure"
else
group.long 0x4CC++0x03
line.long 0x00 "SECURITY_CONFIG_AONDMAR_0,StreamID Security Configuration Register For AONDMAR"
rbitfld.long 0x00 16. " AONDMAR_STREAMID_WRITE_ACCESS     ,AONDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONDMAR_STREAMID_OVERRIDE     ,AONDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONDMAR_NS     ,AONDMAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x32C))&0x01)==0x00)
group.long 0x328++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWAA_0,StreamID Override Register For SDMMCWAA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCWAA_STREAMID                 ,SDMMCWAA StreamID"
else
rgroup.long 0x328++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCWAA_0,StreamID Override Register For SDMMCWAA"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCWAA_STREAMID                 ,SDMMCWAA StreamID"
endif
if (((per.l(ad:0x02C00000+0x3DC))&0x01)==0x00)
group.long 0x3D8++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEW_0,StreamID Override Register For APEW"
hexmask.long.byte 0x00 0.--7. 1. " APEW_STREAMID                     ,APEW StreamID"
else
rgroup.long 0x3D8++0x03
line.long 0x00 "OVERRIDE_CONFIG_APEW_0,StreamID Override Register For APEW"
hexmask.long.byte 0x00 0.--7. 1. " APEW_STREAMID                     ,APEW StreamID"
endif
if (((per.l(ad:0x02C00000+0x4C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4C4))&0x10000)==0x00)
group.long 0x4C4++0x03
line.long 0x00 "SECURITY_CONFIG_AONW_0,StreamID Security Configuration Register For AONW"
bitfld.long 0x00 16. " AONW_STREAMID_WRITE_ACCESS        ,AONW StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AONW_STREAMID_OVERRIDE        ,AONW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONW_NS        ,AONW NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4C4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4C4))&0x10000)==0x10000)
group.long 0x4C4++0x03
line.long 0x00 "SECURITY_CONFIG_AONW_0,StreamID Security Configuration Register For AONW"
bitfld.long 0x00 16. " AONW_STREAMID_WRITE_ACCESS        ,AONW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONW_STREAMID_OVERRIDE        ,AONW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONW_NS        ,AONW NS" "Secure,Not secure"
else
group.long 0x4C4++0x03
line.long 0x00 "SECURITY_CONFIG_AONW_0,StreamID Security Configuration Register For AONW"
rbitfld.long 0x00 16. " AONW_STREAMID_WRITE_ACCESS        ,AONW StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONW_STREAMID_OVERRIDE        ,AONW StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONW_NS        ,AONW NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4CC))&0x01)==0x00)
group.long 0x4C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONDMAR_0,StreamID Override Register For AONDMAR"
hexmask.long.byte 0x00 0.--7. 1. " AONDMAR_STREAMID                  ,AONDMAR StreamID"
else
rgroup.long 0x4C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_AONDMAR_0,StreamID Override Register For AONDMAR"
hexmask.long.byte 0x00 0.--7. 1. " AONDMAR_STREAMID                  ,AONDMAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x04))&0x01)==0x00)
group.long 0x00++0x03
line.long 0x00 "OVERRIDE_CONFIG_PTCR_0,StreamID Override Register For PTCR"
hexmask.long.byte 0x00 0.--7. 1. " PTCR_STREAMID                     ,PTCR StreamID"
else
rgroup.long 0x00++0x03
line.long 0x00 "OVERRIDE_CONFIG_PTCR_0,StreamID Override Register For PTCR"
hexmask.long.byte 0x00 0.--7. 1. " PTCR_STREAMID                     ,PTCR StreamID"
endif
if (((per.l(ad:0x02C00000+0x4DC))&0x01)==0x00)
group.long 0x4D8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCER_0,StreamID Override Register For SCER"
hexmask.long.byte 0x00 0.--7. 1. " SCER_STREAMID                     ,SCER StreamID"
else
rgroup.long 0x4D8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCER_0,StreamID Override Register For SCER"
hexmask.long.byte 0x00 0.--7. 1. " SCER_STREAMID                     ,SCER StreamID"
endif
if (((per.l(ad:0x02C00000+0x304))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x304))&0x10000)==0x00)
group.long 0x304++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRA_0,StreamID Security Configuration Register For SDMMCRA"
bitfld.long 0x00 16. " SDMMCRA_STREAMID_WRITE_ACCESS     ,SDMMCRA StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCRA_STREAMID_OVERRIDE     ,SDMMCRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRA_NS     ,SDMMCRA NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x304))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x304))&0x10000)==0x10000)
group.long 0x304++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRA_0,StreamID Security Configuration Register For SDMMCRA"
bitfld.long 0x00 16. " SDMMCRA_STREAMID_WRITE_ACCESS     ,SDMMCRA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRA_STREAMID_OVERRIDE     ,SDMMCRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRA_NS     ,SDMMCRA NS" "Secure,Not secure"
else
group.long 0x304++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRA_0,StreamID Security Configuration Register For SDMMCRA"
rbitfld.long 0x00 16. " SDMMCRA_STREAMID_WRITE_ACCESS     ,SDMMCRA StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRA_STREAMID_OVERRIDE     ,SDMMCRA StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRA_NS     ,SDMMCRA NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0xB4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xB4))&0x10000)==0x00)
group.long 0xB4++0x03
line.long 0x00 "SECURITY_CONFIG_HOST1XDMAR_0,StreamID Security Configuration Register For HOST1XDMAR"
bitfld.long 0x00 16. " HOST1XDMAR_STREAMID_WRITE_ACCESS  ,HOST1XDMAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  HOST1XDMAR_STREAMID_OVERRIDE  ,HOST1XDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HOST1XDMAR_NS  ,HOST1XDMAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0xB4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xB4))&0x10000)==0x10000)
group.long 0xB4++0x03
line.long 0x00 "SECURITY_CONFIG_HOST1XDMAR_0,StreamID Security Configuration Register For HOST1XDMAR"
bitfld.long 0x00 16. " HOST1XDMAR_STREAMID_WRITE_ACCESS  ,HOST1XDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HOST1XDMAR_STREAMID_OVERRIDE  ,HOST1XDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HOST1XDMAR_NS  ,HOST1XDMAR NS" "Secure,Not secure"
else
group.long 0xB4++0x03
line.long 0x00 "SECURITY_CONFIG_HOST1XDMAR_0,StreamID Security Configuration Register For HOST1XDMAR"
rbitfld.long 0x00 16. " HOST1XDMAR_STREAMID_WRITE_ACCESS  ,HOST1XDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HOST1XDMAR_STREAMID_OVERRIDE  ,HOST1XDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HOST1XDMAR_NS  ,HOST1XDMAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x474))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x474))&0x10000)==0x00)
group.long 0x474++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSR_0,StreamID Security Configuration Register For EQOSR"
bitfld.long 0x00 16. " EQOSR_STREAMID_WRITE_ACCESS       ,EQOSR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  EQOSR_STREAMID_OVERRIDE       ,EQOSR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSR_NS       ,EQOSR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x474))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x474))&0x10000)==0x10000)
group.long 0x474++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSR_0,StreamID Security Configuration Register For EQOSR"
bitfld.long 0x00 16. " EQOSR_STREAMID_WRITE_ACCESS       ,EQOSR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  EQOSR_STREAMID_OVERRIDE       ,EQOSR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSR_NS       ,EQOSR NS" "Secure,Not secure"
else
group.long 0x474++0x03
line.long 0x00 "SECURITY_CONFIG_EQOSR_0,StreamID Security Configuration Register For EQOSR"
rbitfld.long 0x00 16. " EQOSR_STREAMID_WRITE_ACCESS       ,EQOSR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  EQOSR_STREAMID_OVERRIDE       ,EQOSR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  EQOSR_NS       ,EQOSR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0xFC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xFC))&0x10000)==0x00)
group.long 0xFC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAR_0,StreamID Security Configuration Register For SATAR"
bitfld.long 0x00 16. " SATAR_STREAMID_WRITE_ACCESS       ,SATAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SATAR_STREAMID_OVERRIDE       ,SATAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAR_NS       ,SATAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0xFC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xFC))&0x10000)==0x10000)
group.long 0xFC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAR_0,StreamID Security Configuration Register For SATAR"
bitfld.long 0x00 16. " SATAR_STREAMID_WRITE_ACCESS       ,SATAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SATAR_STREAMID_OVERRIDE       ,SATAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAR_NS       ,SATAR NS" "Secure,Not secure"
else
group.long 0xFC++0x03
line.long 0x00 "SECURITY_CONFIG_SATAR_0,StreamID Security Configuration Register For SATAR"
rbitfld.long 0x00 16. " SATAR_STREAMID_WRITE_ACCESS       ,SATAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SATAR_STREAMID_OVERRIDE       ,SATAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SATAR_NS       ,SATAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x224))&0x01)==0x00)
group.long 0x220++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPRA_0,StreamID Override Register For ISPRA"
hexmask.long.byte 0x00 0.--7. 1. " ISPRA_STREAMID                    ,ISPRA StreamID"
else
rgroup.long 0x220++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPRA_0,StreamID Override Register For ISPRA"
hexmask.long.byte 0x00 0.--7. 1. " ISPRA_STREAMID                    ,ISPRA StreamID"
endif
if (((per.l(ad:0x02C00000+0x234))&0x01)==0x00)
group.long 0x230++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPWA_0,StreamID Override Register For ISPWA"
hexmask.long.byte 0x00 0.--7. 1. " ISPWA_STREAMID                    ,ISPWA StreamID"
else
rgroup.long 0x230++0x03
line.long 0x00 "OVERRIDE_CONFIG_ISPWA_0,StreamID Override Register For ISPWA"
hexmask.long.byte 0x00 0.--7. 1. " ISPWA_STREAMID                    ,ISPWA StreamID"
endif
if (((per.l(ad:0x02C00000+0x36C))&0x01)==0x00)
group.long 0x368++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSWR_0,StreamID Override Register For VICSWR"
hexmask.long.byte 0x00 0.--7. 1. " VICSWR_STREAMID                   ,VICSWR StreamID"
else
rgroup.long 0x368++0x03
line.long 0x00 "OVERRIDE_CONFIG_VICSWR_0,StreamID Override Register For VICSWR"
hexmask.long.byte 0x00 0.--7. 1. " VICSWR_STREAMID                   ,VICSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x404))&0x01)==0x00)
group.long 0x400++0x03
line.long 0x00 "OVERRIDE_CONFIG_SESRD_0,StreamID Override Register For SESRD"
hexmask.long.byte 0x00 0.--7. 1. " SESRD_STREAMID                    ,SESRD StreamID"
else
rgroup.long 0x400++0x03
line.long 0x00 "OVERRIDE_CONFIG_SESRD_0,StreamID Override Register For SESRD"
hexmask.long.byte 0x00 0.--7. 1. " SESRD_STREAMID                    ,SESRD StreamID"
endif
if (((per.l(ad:0x02C00000+0x334))&0x01)==0x00)
group.long 0x330++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCW_0,StreamID Override Register For SDMMCW"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCW_STREAMID                   ,SDMMCW StreamID"
else
rgroup.long 0x330++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCW_0,StreamID Override Register For SDMMCW"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCW_STREAMID                   ,SDMMCW StreamID"
endif
if (((per.l(ad:0x02C00000+0x31C))&0x01)==0x00)
group.long 0x318++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRAB_0,StreamID Override Register For SDMMCRAB"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRAB_STREAMID                 ,SDMMCRAB StreamID"
else
rgroup.long 0x318++0x03
line.long 0x00 "OVERRIDE_CONFIG_SDMMCRAB_0,StreamID Override Register For SDMMCRAB"
hexmask.long.byte 0x00 0.--7. 1. " SDMMCRAB_STREAMID                 ,SDMMCRAB StreamID"
endif
if (((per.l(ad:0x02C00000+0x49C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x49C))&0x10000)==0x00)
group.long 0x49C++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPR_0,StreamID Security Configuration Register For BPMPR"
bitfld.long 0x00 16. " BPMPR_STREAMID_WRITE_ACCESS       ,BPMPR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  BPMPR_STREAMID_OVERRIDE       ,BPMPR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPR_NS       ,BPMPR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x49C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x49C))&0x10000)==0x10000)
group.long 0x49C++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPR_0,StreamID Security Configuration Register For BPMPR"
bitfld.long 0x00 16. " BPMPR_STREAMID_WRITE_ACCESS       ,BPMPR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPR_STREAMID_OVERRIDE       ,BPMPR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPR_NS       ,BPMPR NS" "Secure,Not secure"
else
group.long 0x49C++0x03
line.long 0x00 "SECURITY_CONFIG_BPMPR_0,StreamID Security Configuration Register For BPMPR"
rbitfld.long 0x00 16. " BPMPR_STREAMID_WRITE_ACCESS       ,BPMPR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  BPMPR_STREAMID_OVERRIDE       ,BPMPR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  BPMPR_NS       ,BPMPR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0xAC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xAC))&0x10000)==0x00)
group.long 0xAC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAR_0,StreamID Security Configuration Register For HDAR"
bitfld.long 0x00 16. " HDAR_STREAMID_WRITE_ACCESS        ,HDAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  HDAR_STREAMID_OVERRIDE        ,HDAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAR_NS        ,HDAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0xAC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xAC))&0x10000)==0x10000)
group.long 0xAC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAR_0,StreamID Security Configuration Register For HDAR"
bitfld.long 0x00 16. " HDAR_STREAMID_WRITE_ACCESS        ,HDAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HDAR_STREAMID_OVERRIDE        ,HDAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAR_NS        ,HDAR NS" "Secure,Not secure"
else
group.long 0xAC++0x03
line.long 0x00 "SECURITY_CONFIG_HDAR_0,StreamID Security Configuration Register For HDAR"
rbitfld.long 0x00 16. " HDAR_STREAMID_WRITE_ACCESS        ,HDAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  HDAR_STREAMID_OVERRIDE        ,HDAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  HDAR_NS        ,HDAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x47C))&0x01)==0x00)
group.long 0x478++0x03
line.long 0x00 "OVERRIDE_CONFIG_EQOSW_0,StreamID Override Register For EQOSW"
hexmask.long.byte 0x00 0.--7. 1. " EQOSW_STREAMID                    ,EQOSW StreamID"
else
rgroup.long 0x478++0x03
line.long 0x00 "OVERRIDE_CONFIG_EQOSW_0,StreamID Override Register For EQOSW"
hexmask.long.byte 0x00 0.--7. 1. " EQOSW_STREAMID                    ,EQOSW StreamID"
endif
if (((per.l(ad:0x02C00000+0x31C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x31C))&0x10000)==0x00)
group.long 0x31C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAB_0,StreamID Security Configuration Register For SDMMCRAB"
bitfld.long 0x00 16. " SDMMCRAB_STREAMID_WRITE_ACCESS    ,SDMMCRAB StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SDMMCRAB_STREAMID_OVERRIDE    ,SDMMCRAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAB_NS    ,SDMMCRAB NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x31C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x31C))&0x10000)==0x10000)
group.long 0x31C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAB_0,StreamID Security Configuration Register For SDMMCRAB"
bitfld.long 0x00 16. " SDMMCRAB_STREAMID_WRITE_ACCESS    ,SDMMCRAB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRAB_STREAMID_OVERRIDE    ,SDMMCRAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAB_NS    ,SDMMCRAB NS" "Secure,Not secure"
else
group.long 0x31C++0x03
line.long 0x00 "SECURITY_CONFIG_SDMMCRAB_0,StreamID Security Configuration Register For SDMMCRAB"
rbitfld.long 0x00 16. " SDMMCRAB_STREAMID_WRITE_ACCESS    ,SDMMCRAB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SDMMCRAB_STREAMID_OVERRIDE    ,SDMMCRAB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SDMMCRAB_NS    ,SDMMCRAB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x424))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x424))&0x10000)==0x00)
group.long 0x424++0x03
line.long 0x00 "SECURITY_CONFIG_ETRR_0,StreamID Security Configuration Register For ETRR"
bitfld.long 0x00 16. " ETRR_STREAMID_WRITE_ACCESS        ,ETRR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  ETRR_STREAMID_OVERRIDE        ,ETRR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRR_NS        ,ETRR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x424))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x424))&0x10000)==0x10000)
group.long 0x424++0x03
line.long 0x00 "SECURITY_CONFIG_ETRR_0,StreamID Security Configuration Register For ETRR"
bitfld.long 0x00 16. " ETRR_STREAMID_WRITE_ACCESS        ,ETRR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ETRR_STREAMID_OVERRIDE        ,ETRR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRR_NS        ,ETRR NS" "Secure,Not secure"
else
group.long 0x424++0x03
line.long 0x00 "SECURITY_CONFIG_ETRR_0,StreamID Security Configuration Register For ETRR"
rbitfld.long 0x00 16. " ETRR_STREAMID_WRITE_ACCESS        ,ETRR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ETRR_STREAMID_OVERRIDE        ,ETRR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ETRR_NS        ,ETRR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x444))&0x01)==0x00)
group.long 0x440++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSRD2_0,StreamID Override Register For GPUSRD2"
hexmask.long.byte 0x00 0.--7. 1. " GPUSRD2_STREAMID                  ,GPUSRD2 StreamID"
else
group.long 0x440++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSRD2_0,StreamID Override Register For GPUSRD2"
hexmask.long.byte 0x00 0.--7. 1. " GPUSRD2_STREAMID                  ,GPUSRD2 StreamID"
endif
if (((per.l(ad:0x02C00000+0x4BC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4BC))&0x10000)==0x00)
group.long 0x4BC++0x03
line.long 0x00 "SECURITY_CONFIG_AONR_0,StreamID Security Configuration Register For AONR"
bitfld.long 0x00 16. " AONR_STREAMID_WRITE_ACCESS        ,AONR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  AONR_STREAMID_OVERRIDE        ,AONR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONR_NS        ,AONR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4BC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4BC))&0x10000)==0x10000)
group.long 0x4BC++0x03
line.long 0x00 "SECURITY_CONFIG_AONR_0,StreamID Security Configuration Register For AONR"
bitfld.long 0x00 16. " AONR_STREAMID_WRITE_ACCESS        ,AONR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONR_STREAMID_OVERRIDE        ,AONR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONR_NS        ,AONR NS" "Secure,Not secure"
else
group.long 0x4BC++0x03
line.long 0x00 "SECURITY_CONFIG_AONR_0,StreamID Security Configuration Register For AONR"
rbitfld.long 0x00 16. " AONR_STREAMID_WRITE_ACCESS        ,AONR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  AONR_STREAMID_OVERRIDE        ,AONR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  AONR_NS        ,AONR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4FC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4FC))&0x10000)==0x00)
group.long 0x4FC++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAR_0,StreamID Security Configuration Register For APEDMAR"
bitfld.long 0x00 16. " APEDMAR_STREAMID_WRITE_ACCESS     ,APEDMAR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  APEDMAR_STREAMID_OVERRIDE     ,APEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAR_NS     ,APEDMAR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x4FC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x4FC))&0x10000)==0x10000)
group.long 0x4FC++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAR_0,StreamID Security Configuration Register For APEDMAR"
bitfld.long 0x00 16. " APEDMAR_STREAMID_WRITE_ACCESS     ,APEDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEDMAR_STREAMID_OVERRIDE     ,APEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAR_NS     ,APEDMAR NS" "Secure,Not secure"
else
group.long 0x4FC++0x03
line.long 0x00 "SECURITY_CONFIG_APEDMAR_0,StreamID Security Configuration Register For APEDMAR"
rbitfld.long 0x00 16. " APEDMAR_STREAMID_WRITE_ACCESS     ,APEDMAR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  APEDMAR_STREAMID_OVERRIDE     ,APEDMAR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  APEDMAR_NS     ,APEDMAR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x404))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x404))&0x10000)==0x00)
group.long 0x404++0x03
line.long 0x00 "SECURITY_CONFIG_SESRD_0,StreamID Security Configuration Register For SESRD"
bitfld.long 0x00 16. " SESRD_STREAMID_WRITE_ACCESS       ,SESRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  SESRD_STREAMID_OVERRIDE       ,SESRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESRD_NS       ,SESRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x404))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x404))&0x10000)==0x10000)
group.long 0x404++0x03
line.long 0x00 "SECURITY_CONFIG_SESRD_0,StreamID Security Configuration Register For SESRD"
bitfld.long 0x00 16. " SESRD_STREAMID_WRITE_ACCESS       ,SESRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SESRD_STREAMID_OVERRIDE       ,SESRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESRD_NS       ,SESRD NS" "Secure,Not secure"
else
group.long 0x404++0x03
line.long 0x00 "SECURITY_CONFIG_SESRD_0,StreamID Security Configuration Register For SESRD"
rbitfld.long 0x00 16. " SESRD_STREAMID_WRITE_ACCESS       ,SESRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  SESRD_STREAMID_OVERRIDE       ,SESRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  SESRD_NS       ,SESRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x4E4))&0x01)==0x00)
group.long 0x4E0++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEW_0,StreamID Override Register For SCEW"
hexmask.long.byte 0x00 0.--7. 1. " SCEW_STREAMID                     ,SCEW StreamID"
else
rgroup.long 0x4E0++0x03
line.long 0x00 "OVERRIDE_CONFIG_SCEW_0,StreamID Override Register For SCEW"
hexmask.long.byte 0x00 0.--7. 1. " SCEW_STREAMID                     ,SCEW StreamID"
endif
if (((per.l(ad:0x02C00000+0x2C4))&0x01)==0x00)
group.long 0x2C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSRD_0,StreamID Override Register For GPUSRD"
hexmask.long.byte 0x00 0.--7. 1. " GPUSRD_STREAMID                   ,GPUSRD StreamID"
else
rgroup.long 0x2C0++0x03
line.long 0x00 "OVERRIDE_CONFIG_GPUSRD_0,StreamID Override Register For GPUSRD"
hexmask.long.byte 0x00 0.--7. 1. " GPUSRD_STREAMID                   ,GPUSRD StreamID"
endif
if (((per.l(ad:0x02C00000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xE4))&0x10000)==0x00)
group.long 0xE4++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSRD_0,StreamID Security Configuration Register For NVENCSRD"
bitfld.long 0x00 16. " NVENCSRD_STREAMID_WRITE_ACCESS    ,NVENCSRD StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  NVENCSRD_STREAMID_OVERRIDE    ,NVENCSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSRD_NS    ,NVENCSRD NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0xE4))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0xE4))&0x10000)==0x10000)
group.long 0xE4++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSRD_0,StreamID Security Configuration Register For NVENCSRD"
bitfld.long 0x00 16. " NVENCSRD_STREAMID_WRITE_ACCESS    ,NVENCSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVENCSRD_STREAMID_OVERRIDE    ,NVENCSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSRD_NS    ,NVENCSRD NS" "Secure,Not secure"
else
group.long 0xE4++0x03
line.long 0x00 "SECURITY_CONFIG_NVENCSRD_0,StreamID Security Configuration Register For NVENCSRD"
rbitfld.long 0x00 16. " NVENCSRD_STREAMID_WRITE_ACCESS    ,NVENCSRD StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  NVENCSRD_STREAMID_OVERRIDE    ,NVENCSRD StreamID override" "No override,Override"
bitfld.long 0x00 0. "  NVENCSRD_NS    ,NVENCSRD NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x2CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2CC))&0x10000)==0x00)
group.long 0x2CC++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR_0,StreamID Security Configuration Register For GPUSWR"
bitfld.long 0x00 16. " GPUSWR_STREAMID_WRITE_ACCESS      ,GPUSWR StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  GPUSWR_STREAMID_OVERRIDE      ,GPUSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR_NS      ,GPUSWR NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x2CC))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x2CC))&0x10000)==0x10000)
group.long 0x2CC++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR_0,StreamID Security Configuration Register For GPUSWR"
bitfld.long 0x00 16. " GPUSWR_STREAMID_WRITE_ACCESS      ,GPUSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSWR_STREAMID_OVERRIDE      ,GPUSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR_NS      ,GPUSWR NS" "Secure,Not secure"
else
group.long 0x2CC++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSWR_0,StreamID Security Configuration Register For GPUSWR"
rbitfld.long 0x00 16. " GPUSWR_STREAMID_WRITE_ACCESS      ,GPUSWR StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSWR_STREAMID_OVERRIDE      ,GPUSWR StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSWR_NS      ,GPUSWR NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x43C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x43C))&0x10000)==0x00)
group.long 0x43C++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWRB_0,StreamID Security Configuration Register For TSECSWRB"
bitfld.long 0x00 16. " TSECSWRB_STREAMID_WRITE_ACCESS    ,TSECSWRB StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  TSECSWRB_STREAMID_OVERRIDE    ,TSECSWRB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWRB_NS    ,TSECSWRB NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x43C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x43C))&0x10000)==0x10000)
group.long 0x43C++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWRB_0,StreamID Security Configuration Register For TSECSWRB"
bitfld.long 0x00 16. " TSECSWRB_STREAMID_WRITE_ACCESS    ,TSECSWRB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSWRB_STREAMID_OVERRIDE    ,TSECSWRB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWRB_NS    ,TSECSWRB NS" "Secure,Not secure"
else
group.long 0x43C++0x03
line.long 0x00 "SECURITY_CONFIG_TSECSWRB_0,StreamID Security Configuration Register For TSECSWRB"
rbitfld.long 0x00 16. " TSECSWRB_STREAMID_WRITE_ACCESS    ,TSECSWRB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  TSECSWRB_STREAMID_OVERRIDE    ,TSECSWRB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  TSECSWRB_NS    ,TSECSWRB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x3CC))&0x01)==0x00)
group.long 0x3C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSWR_0,StreamID Override Register For NVDECSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSWR_STREAMID                 ,NVDECSWR StreamID"
else
rgroup.long 0x3C8++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDECSWR_0,StreamID Override Register For NVDECSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVDECSWR_STREAMID                 ,NVDECSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x26C))&0x01)==0x00)
group.long 0x268++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_DEVW_0,StreamID Override Register For XUSB_DEVW"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_DEVW_STREAMID                ,XUSB DEVW StreamID"
else
rgroup.long 0x268++0x03
line.long 0x00 "OVERRIDE_CONFIG_XUSB_DEVW_0,StreamID Override Register For XUSB_DEVW"
hexmask.long.byte 0x00 0.--7. 1. " XUSB_DEVW_STREAMID                ,XUSB DEVW StreamID"
endif
if (((per.l(ad:0x02C00000+0xFC))&0x01)==0x00)
group.long 0xF8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SATAR_0,StreamID Override Register For SATAR"
hexmask.long.byte 0x00 0.--7. 1. " SATAR_STREAMID                    ,SATAR StreamID"
else
rgroup.long 0xF8++0x03
line.long 0x00 "OVERRIDE_CONFIG_SATAR_0,StreamID Override Register For SATAR"
hexmask.long.byte 0x00 0.--7. 1. " SATAR_STREAMID                    ,SATAR StreamID"
endif
if (((per.l(ad:0x02C00000+0x494))&0x01)==0x00)
group.long 0x490++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDISPLAYR_0,StreamID Override Register For NVDISPLAYR"
hexmask.long.byte 0x00 0.--7. 1. " NVDISPLAYR_STREAMID               ,NVDISPLAYR StreamID"
else
rgroup.long 0x490++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVDISPLAYR_0,StreamID Override Register For NVDISPLAYR"
hexmask.long.byte 0x00 0.--7. 1. " NVDISPLAYR_STREAMID               ,NVDISPLAYR StreamID"
endif
if (((per.l(ad:0x02C00000+0x23C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x23C))&0x10000)==0x00)
group.long 0x23C++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWB_0,StreamID Security Configuration Register For ISPWB"
bitfld.long 0x00 16. " ISPWB_STREAMID_WRITE_ACCESS       ,ISPWB StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  ISPWB_STREAMID_OVERRIDE       ,ISPWB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWB_NS       ,ISPWB NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x23C))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x23C))&0x10000)==0x10000)
group.long 0x23C++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWB_0,StreamID Security Configuration Register For ISPWB"
bitfld.long 0x00 16. " ISPWB_STREAMID_WRITE_ACCESS       ,ISPWB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPWB_STREAMID_OVERRIDE       ,ISPWB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWB_NS       ,ISPWB NS" "Secure,Not secure"
else
group.long 0x23C++0x03
line.long 0x00 "SECURITY_CONFIG_ISPWB_0,StreamID Security Configuration Register For ISPWB"
rbitfld.long 0x00 16. " ISPWB_STREAMID_WRITE_ACCESS       ,ISPWB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  ISPWB_STREAMID_OVERRIDE       ,ISPWB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  ISPWB_NS       ,ISPWB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x394))&0x01)==0x00)
group.long 0x390++0x03
line.long 0x00 "OVERRIDE_CONFIG_VIW_0,StreamID Override Register For VIW"
hexmask.long.byte 0x00 0.--7. 1. " VIW_STREAMID                      ,VIW StreamID"
else
rgroup.long 0x390++0x03
line.long 0x00 "OVERRIDE_CONFIG_VIW_0,StreamID Override Register For VIW"
hexmask.long.byte 0x00 0.--7. 1. " VIW_STREAMID                      ,VIW StreamID"
endif
if (((per.l(ad:0x02C00000+0x484))&0x01)==0x00)
group.long 0x480++0x03
line.long 0x00 "OVERRIDE_CONFIG_UFSHCR_0,StreamID Override Register For UFSHCR"
hexmask.long.byte 0x00 0.--7. 1. " UFSHCR_STREAMID                   ,UFSHCR StreamID"
else
rgroup.long 0x480++0x03
line.long 0x00 "OVERRIDE_CONFIG_UFSHCR_0,StreamID Override Register For UFSHCR"
hexmask.long.byte 0x00 0.--7. 1. " UFSHCR_STREAMID                   ,UFSHCR StreamID"
endif
if (((per.l(ad:0x02C00000+0x15C))&0x01)==0x00)
group.long 0x158++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVENCSWR_0,StreamID Override Register For NVENCSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVENCSWR_STREAMID                 ,NVENCSWR StreamID"
else
rgroup.long 0x158++0x03
line.long 0x00 "OVERRIDE_CONFIG_NVENCSWR_0,StreamID Override Register For NVENCSWR"
hexmask.long.byte 0x00 0.--7. 1. " NVENCSWR_STREAMID                 ,NVENCSWR StreamID"
endif
if (((per.l(ad:0x02C00000+0x444))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x444))&0x10000)==0x00)
group.long 0x444++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD2_0,StreamID Security Configuration Register For GPUSRD2"
bitfld.long 0x00 16. " GPUSRD2_STREAMID_WRITE_ACCESS     ,GPUSRD2 StreamID write access disable" "No,Yes"
bitfld.long 0x00 8. "  GPUSRD2_STREAMID_OVERRIDE     ,GPUSRD2 StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD2_NS     ,GPUSRD2 NS" "Secure,Not secure"
elif (((per.l(ad:0x02C00000+0x444))&0x01)==0x00)&&(((per.l(ad:0x02C00000+0x444))&0x10000)==0x10000)
group.long 0x444++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD2_0,StreamID Security Configuration Register For GPUSRD2"
bitfld.long 0x00 16. " GPUSRD2_STREAMID_WRITE_ACCESS     ,ISPWB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSRD2_STREAMID_OVERRIDE     ,ISPWB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD2_NS     ,ISPWB NS" "Secure,Not secure"
else
group.long 0x444++0x03
line.long 0x00 "SECURITY_CONFIG_GPUSRD2_0,StreamID Security Configuration Register For GPUSRD2"
rbitfld.long 0x00 16. " GPUSRD2_STREAMID_WRITE_ACCESS     ,ISPWB StreamID write access disable" "No,Yes"
rbitfld.long 0x00 8. "  GPUSRD2_STREAMID_OVERRIDE     ,ISPWB StreamID override" "No override,Override"
bitfld.long 0x00 0. "  GPUSRD2_NS     ,ISPWB NS" "Secure,Not secure"
endif
if (((per.l(ad:0x02C00000+0x18C))&0x01)==0x00)
group.long 0x188++0x03
line.long 0x00 "OVERRIDE_CONFIG_AFIW_0,StreamID Override Register For AFIW"
hexmask.long.byte 0x00 0.--7. 1. " AFIW_STREAMID                     ,AFIW StreamID"
else
rgroup.long 0x188++0x03
line.long 0x00 "OVERRIDE_CONFIG_AFIW_0,StreamID Override Register For AFIW"
hexmask.long.byte 0x00 0.--7. 1. " AFIW_STREAMID                     ,AFIW StreamID"
endif
tree.end
width 0x0B
tree.end
tree.open "General Purpose DMA"
tree "AON_DMA"
base ad:0x0C060000
width 34.
tree "Common"
rgroup.long 0x00++0x0B
line.long 0x00 "DMA_CHAN_STA_0,DMA Channel Status Register"
bitfld.long 0x00 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x00 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x00 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x00 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x00 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x00 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x00 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x00 0. "             CH0             ,Channel 0" "0,1"
line.long 0x04 "REQUESTORS_TX_0,Requesters TX"
bitfld.long 0x04 5. " UART2           ,Universal asynchronous receiver-transmitter 2" "0,1"
bitfld.long 0x04 4. "             UART1           ,Universal asynchronous receiver-transmitter 1" "0,1"
textline "                                           "
bitfld.long 0x04 3. " SPI             ,Serial peripheral interface" "0,1"
bitfld.long 0x04 2. "             I2C3            ,I2C3" "0,1"
textline "                                           "
bitfld.long 0x04 1. " I2C2            ,I2C2" "0,1"
bitfld.long 0x04 0. "             I2C1            ,I2C1" "0,1"
line.long 0x08 "REQUESTORS_RX_0,Requesters RX"
bitfld.long 0x08 7. " GTE             ,GTE" "0,1"
bitfld.long 0x08 6. "             DMIC            ,Digital microphone interface" "0,1"
textline "                                           "
bitfld.long 0x08 5. " UART2           ,Universal asynchronous receiver-transmitter2" "0,1"
bitfld.long 0x08 4. "             UART1           ,Universal asynchronous receiver-transmitter1" "0,1"
textline "                                           "
bitfld.long 0x08 3. " SPI             ,Serial peripheral interface" "0,1"
bitfld.long 0x08 2. "             I2C3            ,I2C3" "0,1"
textline "                                           "
bitfld.long 0x08 1. " I2C2            ,I2C2" "0,1"
bitfld.long 0x08 0. "             I2C1            ,I2C1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "COMMON_ERROR_STA_0,Common Error Status"
rgroup.long 0x10++0x13
line.long 0x00 "CHANNEL_ERROR_STA_0,Channel Error Status"
line.long 0x04 "TRIG_REG_0,Trigger Register"
bitfld.long 0x04 3. " SMP_26          ,SMP 26" "0,1"
textline "                                           "
bitfld.long 0x04 2. " SMP_25          ,SMP 25" "0,1"
bitfld.long 0x04 1. "             SMP_24          ,SMP 24" "0,1"
line.long 0x08 "CHANNEL_TRIG_REG_0,Channel Trigger Register"
bitfld.long 0x08 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x08 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x08 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x08 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x08 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x08 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x08 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x08 0. "             CH0             ,Channel 0" "0,1"
line.long 0x0C "MASKED_INTR_REG_0,Masked Interrupt Register"
bitfld.long 0x0C 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x0C 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x0C 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x0C 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x0C 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x0C 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x0C 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x0C 0. "             CH0             ,Channel 0" "0,1"
line.long 0x10 "CHANNEL_INTR_STA_0,Channel Interrupt Status"
bitfld.long 0x10 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x10 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x10 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x10 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x10 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x10 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x10 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x10 0. "             CH0             ,Channel 0" "0,1"
group.long 0x24++0x03
line.long 0x00 "COMMON_INTR_0,Common Interrupt"
rbitfld.long 0x00 4. " RAW_INTR_STATUS ,RAW Interrupt Status" "No interrupt,Interrupt"
rbitfld.long 0x00 3. "  IRQ_INTR_STATUS ,IRQ interrupt status" "No interrupt,Interrupt"
textline "                                           "
bitfld.long 0x00 2. " IS_EOC          ,IS EOC" "0,1"
bitfld.long 0x00 1. "             INTR_MASK       ,Interrupt mask" "Unmasked,Masked"
textline "                                           "
bitfld.long 0x00 0. " IE_EOC          ,IE EOC" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "CH0_PERI_ID_MASK_0,Channel 0 Peripheral ID Mask"
group.long 0x84++0x03
line.long 0x00 "CH1_PERI_ID_MASK_0,Channel 1 Peripheral ID Mask"
group.long 0x88++0x03
line.long 0x00 "CH2_PERI_ID_MASK_0,Channel 2 Peripheral ID Mask"
group.long 0x8C++0x03
line.long 0x00 "CH3_PERI_ID_MASK_0,Channel 3 Peripheral ID Mask"
group.long 0x90++0x03
line.long 0x00 "CH4_PERI_ID_MASK_0,Channel 4 Peripheral ID Mask"
group.long 0x94++0x03
line.long 0x00 "CH5_PERI_ID_MASK_0,Channel 5 Peripheral ID Mask"
group.long 0x98++0x03
line.long 0x00 "CH6_PERI_ID_MASK_0,Channel 6 Peripheral ID Mask"
group.long 0x9C++0x03
line.long 0x00 "CH7_PERI_ID_MASK_0,Channel 7 Peripheral ID Mask"
group.long 0x100++0x03
line.long 0x00 "PER0_PERI_ADDR_0,PER0 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER0_PERI_START_ADDR ,PER0 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER0_PERI_OFFSET ,PER0 peripheral offset"
group.long 0x104++0x03
line.long 0x00 "PER1_PERI_ADDR_0,PER1 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER1_PERI_START_ADDR ,PER1 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER1_PERI_OFFSET ,PER1 peripheral offset"
group.long 0x108++0x03
line.long 0x00 "PER2_PERI_ADDR_0,PER2 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER2_PERI_START_ADDR ,PER2 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER2_PERI_OFFSET ,PER2 peripheral offset"
group.long 0x10C++0x03
line.long 0x00 "PER3_PERI_ADDR_0,PER3 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER3_PERI_START_ADDR ,PER3 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER3_PERI_OFFSET ,PER3 peripheral offset"
group.long 0x110++0x03
line.long 0x00 "PER4_PERI_ADDR_0,PER4 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER4_PERI_START_ADDR ,PER4 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER4_PERI_OFFSET ,PER4 peripheral offset"
group.long 0x114++0x03
line.long 0x00 "PER5_PERI_ADDR_0,PER5 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER5_PERI_START_ADDR ,PER5 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER5_PERI_OFFSET ,PER5 peripheral offset"
group.long 0x118++0x03
line.long 0x00 "PER6_PERI_ADDR_0,PER6 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER6_PERI_START_ADDR ,PER6 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER6_PERI_OFFSET ,PER6 peripheral offset"
group.long 0x11C++0x03
line.long 0x00 "PER7_PERI_ADDR_0,PER7 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER7_PERI_START_ADDR ,PER7 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER7_PERI_OFFSET ,PER7 peripheral offset"
group.long 0x180++0x03
line.long 0x00 "CH0_STREAM_ID0_MASK_0,Channel 0 Stream ID0 Mask"
group.long 0x184++0x03
line.long 0x00 "CH1_STREAM_ID0_MASK_0,Channel 1 Stream ID0 Mask"
group.long 0x188++0x03
line.long 0x00 "CH2_STREAM_ID0_MASK_0,Channel 2 Stream ID0 Mask"
group.long 0x18C++0x03
line.long 0x00 "CH3_STREAM_ID0_MASK_0,Channel 3 Stream ID0 Mask"
group.long 0x190++0x03
line.long 0x00 "CH4_STREAM_ID0_MASK_0,Channel 4 Stream ID0 Mask"
group.long 0x194++0x03
line.long 0x00 "CH5_STREAM_ID0_MASK_0,Channel 5 Stream ID0 Mask"
group.long 0x198++0x03
line.long 0x00 "CH6_STREAM_ID0_MASK_0,Channel 6 Stream ID0 Mask"
group.long 0x19C++0x03
line.long 0x00 "CH7_STREAM_ID0_MASK_0,Channel 7 Stream ID0 Mask"
group.long 0x200++0x03
line.long 0x00 "CH0_STREAM_ID1_MASK_0,Channel 0 Stream ID1 Mask"
group.long 0x204++0x03
line.long 0x00 "CH1_STREAM_ID1_MASK_0,Channel 1 Stream ID1 Mask"
group.long 0x208++0x03
line.long 0x00 "CH2_STREAM_ID1_MASK_0,Channel 2 Stream ID1 Mask"
group.long 0x20C++0x03
line.long 0x00 "CH3_STREAM_ID1_MASK_0,Channel 3 Stream ID1 Mask"
group.long 0x210++0x03
line.long 0x00 "CH4_STREAM_ID1_MASK_0,Channel 4 Stream ID1 Mask"
group.long 0x214++0x03
line.long 0x00 "CH5_STREAM_ID1_MASK_0,Channel 5 Stream ID1 Mask"
group.long 0x218++0x03
line.long 0x00 "CH6_STREAM_ID1_MASK_0,Channel 6 Stream ID1 Mask"
group.long 0x21C++0x03
line.long 0x00 "CH7_STREAM_ID1_MASK_0,Channel 7 Stream ID1 Mask"
group.long 0x280++0x03
line.long 0x00 "CH0_STREAM_ID2_MASK_0,Channel 0 Stream ID2 Mask"
group.long 0x284++0x03
line.long 0x00 "CH1_STREAM_ID2_MASK_0,Channel 1 Stream ID2 Mask"
group.long 0x288++0x03
line.long 0x00 "CH2_STREAM_ID2_MASK_0,Channel 2 Stream ID2 Mask"
group.long 0x28C++0x03
line.long 0x00 "CH3_STREAM_ID2_MASK_0,Channel 3 Stream ID2 Mask"
group.long 0x290++0x03
line.long 0x00 "CH4_STREAM_ID2_MASK_0,Channel 4 Stream ID2 Mask"
group.long 0x294++0x03
line.long 0x00 "CH5_STREAM_ID2_MASK_0,Channel 5 Stream ID2 Mask"
group.long 0x298++0x03
line.long 0x00 "CH6_STREAM_ID2_MASK_0,Channel 6 Stream ID2 Mask"
group.long 0x29C++0x03
line.long 0x00 "CH7_STREAM_ID2_MASK_0,Channel 7 Stream ID2 Mask"
group.long 0x300++0x03
line.long 0x00 "CH0_STREAM_ID3_MASK_0,Channel 0 Stream ID3 Mask"
group.long 0x304++0x03
line.long 0x00 "CH1_STREAM_ID3_MASK_0,Channel 1 Stream ID3 Mask"
group.long 0x308++0x03
line.long 0x00 "CH2_STREAM_ID3_MASK_0,Channel 2 Stream ID3 Mask"
group.long 0x30C++0x03
line.long 0x00 "CH3_STREAM_ID3_MASK_0,Channel 3 Stream ID3 Mask"
group.long 0x310++0x03
line.long 0x00 "CH4_STREAM_ID3_MASK_0,Channel 4 Stream ID3 Mask"
group.long 0x314++0x03
line.long 0x00 "CH5_STREAM_ID3_MASK_0,Channel 5 Stream ID3 Mask"
group.long 0x318++0x03
line.long 0x00 "CH6_STREAM_ID3_MASK_0,Channel 6 Stream ID3 Mask"
group.long 0x31C++0x03
line.long 0x00 "CH7_STREAM_ID3_MASK_0,Channel 7 Stream ID3 Mask"
group.long 0x380++0x07
line.long 0x00 "DMA_CHAN_VIRTUALIZATION_ENABLE_0,DMA Channel Virtualization Enable"
bitfld.long 0x00 7. " CH7                   ,Channel 7" "Disabled,Enabled"
bitfld.long 0x00 6. "    CH6               ,Channel 6" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " CH5                   ,Channel 5" "Disabled,Enabled"
bitfld.long 0x00 4. "    CH4               ,Channel 4" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " CH3                   ,Channel 3" "Disabled,Enabled"
bitfld.long 0x00 2. "    CH2               ,Channel 2" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " CH1                   ,Channel 1" "Disabled,Enabled"
bitfld.long 0x00 0. "    CH0               ,Channel 0" "Disabled,Enabled"
line.long 0x04 "DMA_ICG_EN_OVERRIDE_0,DMA ICG Enable Override"
bitfld.long 0x04 0. " DMA_ICG_EN_OVERRIDE   ,DMA ICG enable override" "Disabled,Enabled"
rgroup.long 0x388++0x03
line.long 0x00 "DMA_ACTIVE_0,Common DMA Active"
bitfld.long 0x00 3. " DMA_IO_ACTIVE         ,DMA IO active" "Not active,Active"
bitfld.long 0x00 2. "  DMA_MC_ACTIVE     ,DMA MC active" "Not active,Active"
textline "                                           "
bitfld.long 0x00 1. " DMA_IO_MC_ACTIVE      ,DMA IO MC active" "Not active,Active"
bitfld.long 0x00 0. "  DMA_ACTIVE        ,DMA active" "Not active,Active"
textline "                                           "
tree.end
width 14.
tree "SCR"
group.long 0xF00++0x03
line.long 0x00 "SCR_CH_0,GPCDMA BPMP SCR SCR CH0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF04++0x03
line.long 0x00 "SCR_CH_1,GPCDMA BPMP SCR SCR CH1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF08++0x03
line.long 0x00 "SCR_CH_2,GPCDMA BPMP SCR SCR CH2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF0C++0x03
line.long 0x00 "SCR_CH_3,GPCDMA BPMP SCR SCR CH3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF10++0x03
line.long 0x00 "SCR_CH_4,GPCDMA BPMP SCR SCR CH4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF14++0x03
line.long 0x00 "SCR_CH_5,GPCDMA BPMP SCR SCR CH5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF18++0x03
line.long 0x00 "SCR_CH_6,GPCDMA BPMP SCR SCR CH6"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF1C++0x03
line.long 0x00 "SCR_CH_7,GPCDMA BPMP SCR SCR CH7"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF80++0x03
line.long 0x00 "SCR_TZ_0,GPCDMA AO SCR SCR TrustZone"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF84++0x03
line.long 0x00 "SCR_DMA_RO_0,GPCDMA AO SCR SCR DMA RO"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF88++0x03
line.long 0x00 "SCR_HYPER_0,GPCDMA AO SCR SCR Hyper"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
width 0x0B
tree "Channel 0"
base ad:0x0C070000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 1"
base ad:0x0C080000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 2"
base ad:0x0C090000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 3"
base ad:0x0C0A0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 4"
base ad:0x0C0B0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 5"
base ad:0x0C0C0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 6"
base ad:0x0C0D0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 7"
base ad:0x0C0E0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,SMP 26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree.end
tree "SCE_DMA"
base ad:0x0B060000
width 34.
tree "Common"
rgroup.long 0x00++0x0B
line.long 0x00 "DMA_CHAN_STA_0,DMA Channel Status Register"
bitfld.long 0x00 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x00 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x00 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x00 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x00 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x00 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x00 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x00 0. "             CH0             ,Channel 0" "0,1"
line.long 0x04 "REQUESTORS_TX_0,Requesters TX"
bitfld.long 0x04 3. " I2C8            ,I2C8" "0,1"
textline "                                           "
bitfld.long 0x04 2. " I2C3            ,I2C3" "0,1"
bitfld.long 0x04 1. "             I2C1            ,I2C1" "0,1"
line.long 0x08 "REQUESTORS_RX_0,Requesters RX"
bitfld.long 0x08 3. " I2C8            ,I2C8" "0,1"
bitfld.long 0x08 2. "             I2C3            ,I2C3" "0,1"
textline "                                           "
bitfld.long 0x08 1. " I2C1            ,I2C1" "0,1"
bitfld.long 0x08 0. "             VI_PRIORITY     ,VI priority" "0,1"
group.long 0x0C++0x03
line.long 0x00 "COMMON_ERROR_STA_0,Common Error Status"
rgroup.long 0x10++0x13
line.long 0x00 "CHANNEL_ERROR_STA_0,Channel Error Status"
line.long 0x04 "TRIG_REG_0,Trigger Register"
bitfld.long 0x04 2. " SMP_25          ,SMP 25" "0,1"
bitfld.long 0x04 1. "             SMP_24          ,SMP 24" "0,1"
line.long 0x08 "CHANNEL_TRIG_REG_0,Channel Trigger Register"
bitfld.long 0x08 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x08 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x08 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x08 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x08 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x08 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x08 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x08 0. "             CH0             ,Channel 0" "0,1"
line.long 0x0C "MASKED_INTR_REG_0,Masked Interrupt Register"
bitfld.long 0x0C 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x0C 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x0C 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x0C 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x0C 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x0C 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x0C 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x0C 0. "             CH0             ,Channel 0" "0,1"
line.long 0x10 "CHANNEL_INTR_STA_0,Channel Interrupt Status"
bitfld.long 0x10 7. " CH7             ,Channel 7" "0,1"
bitfld.long 0x10 6. "             CH6             ,Channel 6" "0,1"
textline "                                           "
bitfld.long 0x10 5. " CH5             ,Channel 5" "0,1"
bitfld.long 0x10 4. "             CH4             ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x10 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x10 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x10 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x10 0. "             CH0             ,Channel 0" "0,1"
group.long 0x24++0x03
line.long 0x00 "COMMON_INTR_0,Common Interrupt"
rbitfld.long 0x00 4. " RAW_INTR_STATUS ,RAW Interrupt Status" "No interrupt,Interrupt"
rbitfld.long 0x00 3. "  IRQ_INTR_STATUS ,IRQ interrupt status" "No interrupt,Interrupt"
textline "                                           "
bitfld.long 0x00 2. " IS_EOC          ,IS EOC" "0,1"
bitfld.long 0x00 1. "             INTR_MASK       ,Interrupt mask" "Unmasked,Masked"
textline "                                           "
bitfld.long 0x00 0. " IE_EOC          ,IE EOC" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "CH0_PERI_ID_MASK_0,Channel 0 Peripheral ID Mask"
group.long 0x84++0x03
line.long 0x00 "CH1_PERI_ID_MASK_0,Channel 1 Peripheral ID Mask"
group.long 0x88++0x03
line.long 0x00 "CH2_PERI_ID_MASK_0,Channel 2 Peripheral ID Mask"
group.long 0x8C++0x03
line.long 0x00 "CH3_PERI_ID_MASK_0,Channel 3 Peripheral ID Mask"
group.long 0x90++0x03
line.long 0x00 "CH4_PERI_ID_MASK_0,Channel 4 Peripheral ID Mask"
group.long 0x94++0x03
line.long 0x00 "CH5_PERI_ID_MASK_0,Channel 5 Peripheral ID Mask"
group.long 0x98++0x03
line.long 0x00 "CH6_PERI_ID_MASK_0,Channel 6 Peripheral ID Mask"
group.long 0x9C++0x03
line.long 0x00 "CH7_PERI_ID_MASK_0,Channel 7 Peripheral ID Mask"
group.long 0x100++0x03
line.long 0x00 "PER0_PERI_ADDR_0,PER0 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER0_PERI_START_ADDR ,PER0 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER0_PERI_OFFSET ,PER0 peripheral offset"
group.long 0x104++0x03
line.long 0x00 "PER1_PERI_ADDR_0,PER1 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER1_PERI_START_ADDR ,PER1 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER1_PERI_OFFSET ,PER1 peripheral offset"
group.long 0x108++0x03
line.long 0x00 "PER2_PERI_ADDR_0,PER2 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER2_PERI_START_ADDR ,PER2 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER2_PERI_OFFSET ,PER2 peripheral offset"
group.long 0x10C++0x03
line.long 0x00 "PER3_PERI_ADDR_0,PER3 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER3_PERI_START_ADDR ,PER3 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER3_PERI_OFFSET ,PER3 peripheral offset"
group.long 0x110++0x03
line.long 0x00 "PER4_PERI_ADDR_0,PER4 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER4_PERI_START_ADDR ,PER4 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER4_PERI_OFFSET ,PER4 peripheral offset"
group.long 0x114++0x03
line.long 0x00 "PER5_PERI_ADDR_0,PER5 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER5_PERI_START_ADDR ,PER5 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER5_PERI_OFFSET ,PER5 peripheral offset"
group.long 0x118++0x03
line.long 0x00 "PER6_PERI_ADDR_0,PER6 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER6_PERI_START_ADDR ,PER6 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER6_PERI_OFFSET ,PER6 peripheral offset"
group.long 0x11C++0x03
line.long 0x00 "PER7_PERI_ADDR_0,PER7 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER7_PERI_START_ADDR ,PER7 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER7_PERI_OFFSET ,PER7 peripheral offset"
group.long 0x180++0x03
line.long 0x00 "CH0_STREAM_ID0_MASK_0,Channel 0 Stream ID0 Mask"
group.long 0x184++0x03
line.long 0x00 "CH1_STREAM_ID0_MASK_0,Channel 1 Stream ID0 Mask"
group.long 0x188++0x03
line.long 0x00 "CH2_STREAM_ID0_MASK_0,Channel 2 Stream ID0 Mask"
group.long 0x18C++0x03
line.long 0x00 "CH3_STREAM_ID0_MASK_0,Channel 3 Stream ID0 Mask"
group.long 0x190++0x03
line.long 0x00 "CH4_STREAM_ID0_MASK_0,Channel 4 Stream ID0 Mask"
group.long 0x194++0x03
line.long 0x00 "CH5_STREAM_ID0_MASK_0,Channel 5 Stream ID0 Mask"
group.long 0x198++0x03
line.long 0x00 "CH6_STREAM_ID0_MASK_0,Channel 6 Stream ID0 Mask"
group.long 0x19C++0x03
line.long 0x00 "CH7_STREAM_ID0_MASK_0,Channel 7 Stream ID0 Mask"
group.long 0x200++0x03
line.long 0x00 "CH0_STREAM_ID1_MASK_0,Channel 0 Stream ID1 Mask"
group.long 0x204++0x03
line.long 0x00 "CH1_STREAM_ID1_MASK_0,Channel 1 Stream ID1 Mask"
group.long 0x208++0x03
line.long 0x00 "CH2_STREAM_ID1_MASK_0,Channel 2 Stream ID1 Mask"
group.long 0x20C++0x03
line.long 0x00 "CH3_STREAM_ID1_MASK_0,Channel 3 Stream ID1 Mask"
group.long 0x210++0x03
line.long 0x00 "CH4_STREAM_ID1_MASK_0,Channel 4 Stream ID1 Mask"
group.long 0x214++0x03
line.long 0x00 "CH5_STREAM_ID1_MASK_0,Channel 5 Stream ID1 Mask"
group.long 0x218++0x03
line.long 0x00 "CH6_STREAM_ID1_MASK_0,Channel 6 Stream ID1 Mask"
group.long 0x21C++0x03
line.long 0x00 "CH7_STREAM_ID1_MASK_0,Channel 7 Stream ID1 Mask"
group.long 0x280++0x03
line.long 0x00 "CH0_STREAM_ID2_MASK_0,Channel 0 Stream ID2 Mask"
group.long 0x284++0x03
line.long 0x00 "CH1_STREAM_ID2_MASK_0,Channel 1 Stream ID2 Mask"
group.long 0x288++0x03
line.long 0x00 "CH2_STREAM_ID2_MASK_0,Channel 2 Stream ID2 Mask"
group.long 0x28C++0x03
line.long 0x00 "CH3_STREAM_ID2_MASK_0,Channel 3 Stream ID2 Mask"
group.long 0x290++0x03
line.long 0x00 "CH4_STREAM_ID2_MASK_0,Channel 4 Stream ID2 Mask"
group.long 0x294++0x03
line.long 0x00 "CH5_STREAM_ID2_MASK_0,Channel 5 Stream ID2 Mask"
group.long 0x298++0x03
line.long 0x00 "CH6_STREAM_ID2_MASK_0,Channel 6 Stream ID2 Mask"
group.long 0x29C++0x03
line.long 0x00 "CH7_STREAM_ID2_MASK_0,Channel 7 Stream ID2 Mask"
group.long 0x300++0x03
line.long 0x00 "CH0_STREAM_ID3_MASK_0,Channel 0 Stream ID3 Mask"
group.long 0x304++0x03
line.long 0x00 "CH1_STREAM_ID3_MASK_0,Channel 1 Stream ID3 Mask"
group.long 0x308++0x03
line.long 0x00 "CH2_STREAM_ID3_MASK_0,Channel 2 Stream ID3 Mask"
group.long 0x30C++0x03
line.long 0x00 "CH3_STREAM_ID3_MASK_0,Channel 3 Stream ID3 Mask"
group.long 0x310++0x03
line.long 0x00 "CH4_STREAM_ID3_MASK_0,Channel 4 Stream ID3 Mask"
group.long 0x314++0x03
line.long 0x00 "CH5_STREAM_ID3_MASK_0,Channel 5 Stream ID3 Mask"
group.long 0x318++0x03
line.long 0x00 "CH6_STREAM_ID3_MASK_0,Channel 6 Stream ID3 Mask"
group.long 0x31C++0x03
line.long 0x00 "CH7_STREAM_ID3_MASK_0,Channel 7 Stream ID3 Mask"
group.long 0x380++0x07
line.long 0x00 "DMA_CHAN_VIRTUALIZATION_ENABLE_0,DMA Channel Virtualization Enable"
bitfld.long 0x00 7. " CH7                   ,Channel 7" "Disabled,Enabled"
bitfld.long 0x00 6. "    CH6               ,Channel 6" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 5. " CH5                   ,Channel 5" "Disabled,Enabled"
bitfld.long 0x00 4. "    CH4               ,Channel 4" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 3. " CH3                   ,Channel 3" "Disabled,Enabled"
bitfld.long 0x00 2. "    CH2               ,Channel 2" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " CH1                   ,Channel 1" "Disabled,Enabled"
bitfld.long 0x00 0. "    CH0               ,Channel 0" "Disabled,Enabled"
line.long 0x04 "DMA_ICG_EN_OVERRIDE_0,DMA ICG Enable Override"
bitfld.long 0x04 0. " DMA_ICG_EN_OVERRIDE   ,DMA ICG enable override" "Disabled,Enabled"
rgroup.long 0x388++0x03
line.long 0x00 "DMA_ACTIVE_0,Common DMA Active"
bitfld.long 0x00 3. " DMA_IO_ACTIVE         ,DMA IO active" "Not active,Active"
bitfld.long 0x00 2. "  DMA_MC_ACTIVE     ,DMA MC active" "Not active,Active"
textline "                                           "
bitfld.long 0x00 1. " DMA_IO_MC_ACTIVE      ,DMA IO MC active" "Not active,Active"
bitfld.long 0x00 0. "  DMA_ACTIVE        ,DMA active" "Not active,Active"
textline "                                           "
tree.end
width 14.
tree "SCR"
group.long 0xF00++0x03
line.long 0x00 "SCR_CH_0,GPCDMA BPMP SCR SCR CH0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF04++0x03
line.long 0x00 "SCR_CH_1,GPCDMA BPMP SCR SCR CH1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF08++0x03
line.long 0x00 "SCR_CH_2,GPCDMA BPMP SCR SCR CH2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF0C++0x03
line.long 0x00 "SCR_CH_3,GPCDMA BPMP SCR SCR CH3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF10++0x03
line.long 0x00 "SCR_CH_4,GPCDMA BPMP SCR SCR CH4"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF14++0x03
line.long 0x00 "SCR_CH_5,GPCDMA BPMP SCR SCR CH5"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF18++0x03
line.long 0x00 "SCR_CH_6,GPCDMA BPMP SCR SCR CH6"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF1C++0x03
line.long 0x00 "SCR_CH_7,GPCDMA BPMP SCR SCR CH7"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF80++0x03
line.long 0x00 "SCR_TZ_0,GPCDMA AO SCR SCR TrustZone"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF84++0x03
line.long 0x00 "SCR_DMA_RO_0,GPCDMA AO SCR SCR DMA RO"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF88++0x03
line.long 0x00 "SCR_HYPER_0,GPCDMA AO SCR SCR Hyper"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
width 0x0B
tree "Channel 0"
base ad:0x0B070000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 1"
base ad:0x0B080000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 2"
base ad:0x0B090000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 3"
base ad:0x0B0A0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 4"
base ad:0x0B0B0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 5"
base ad:0x0B0C0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 6"
base ad:0x0B0D0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 7"
base ad:0x0B0E0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "VI priority,I2C1,I2C3,I2C8,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree.end
tree "BPMP_DMA"
base ad:0x0D060000
width 34.
tree "Common"
rgroup.long 0x00++0x0B
line.long 0x00 "DMA_CHAN_STA_0,DMA Channel Status Register"
bitfld.long 0x00 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x00 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x00 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x00 0. "             CH0             ,Channel 0" "0,1"
line.long 0x04 "REQUESTORS_TX_0,Requesters TX"
bitfld.long 0x04 2. " I2C             ,I2C" "0,1"
textline "                                           "
bitfld.long 0x04 1. " QSPI            ,QSPI" "0,1"
bitfld.long 0x04 0. "             UART            ,UART" "0,1"
line.long 0x08 "REQUESTORS_RX_0,Requesters RX"
bitfld.long 0x08 2. " I2C             ,I2C" "0,1"
textline "                                           "
bitfld.long 0x08 1. " QSPI            ,QSPI" "0,1"
bitfld.long 0x08 0. "             UART            ,UART" "0,1"
group.long 0x0C++0x03
line.long 0x00 "COMMON_ERROR_STA_0,Common Error Status"
rgroup.long 0x10++0x13
line.long 0x00 "CHANNEL_ERROR_STA_0,Channel Error Status"
line.long 0x04 "TRIG_REG_0,Trigger Register"
bitfld.long 0x04 2. " SMP_25          ,SMP 25" "0,1"
bitfld.long 0x04 1. "             SMP_24          ,SMP 24" "0,1"
line.long 0x08 "CHANNEL_TRIG_REG_0,Channel Trigger Register"
bitfld.long 0x08 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x08 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x08 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x08 0. "             CH0             ,Channel 0" "0,1"
line.long 0x0C "MASKED_INTR_REG_0,Masked Interrupt Register"
bitfld.long 0x0C 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x0C 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x0C 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x0C 0. "             CH0             ,Channel 0" "0,1"
line.long 0x10 "CHANNEL_INTR_STA_0,Channel Interrupt Status"
bitfld.long 0x10 3. " CH3             ,Channel 3" "0,1"
bitfld.long 0x10 2. "             CH2             ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x10 1. " CH1             ,Channel 1" "0,1"
bitfld.long 0x10 0. "             CH0             ,Channel 0" "0,1"
group.long 0x24++0x03
line.long 0x00 "COMMON_INTR_0,Common Interrupt"
rbitfld.long 0x00 4. " RAW_INTR_STATUS ,RAW Interrupt Status" "No interrupt,Interrupt"
rbitfld.long 0x00 3. "  IRQ_INTR_STATUS ,IRQ interrupt status" "No interrupt,Interrupt"
textline "                                           "
bitfld.long 0x00 2. " IS_EOC          ,IS EOC" "0,1"
bitfld.long 0x00 1. "             INTR_MASK       ,Interrupt mask" "Unmasked,Masked"
textline "                                           "
bitfld.long 0x00 0. " IE_EOC          ,IE EOC" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "CH0_PERI_ID_MASK_0,Channel 0 Peripheral ID Mask"
group.long 0x84++0x03
line.long 0x00 "CH1_PERI_ID_MASK_0,Channel 1 Peripheral ID Mask"
group.long 0x88++0x03
line.long 0x00 "CH2_PERI_ID_MASK_0,Channel 2 Peripheral ID Mask"
group.long 0x8C++0x03
line.long 0x00 "CH3_PERI_ID_MASK_0,Channel 3 Peripheral ID Mask"
group.long 0x100++0x03
line.long 0x00 "PER0_PERI_ADDR_0,PER0 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER0_PERI_START_ADDR ,PER0 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER0_PERI_OFFSET ,PER0 peripheral offset"
group.long 0x104++0x03
line.long 0x00 "PER1_PERI_ADDR_0,PER1 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER1_PERI_START_ADDR ,PER1 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER1_PERI_OFFSET ,PER1 peripheral offset"
group.long 0x108++0x03
line.long 0x00 "PER2_PERI_ADDR_0,PER2 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER2_PERI_START_ADDR ,PER2 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER2_PERI_OFFSET ,PER2 peripheral offset"
group.long 0x10C++0x03
line.long 0x00 "PER3_PERI_ADDR_0,PER3 Peripheral Address"
hexmask.long.word 0x00 16.--31. 0x01 " PER3_PERI_START_ADDR ,PER3 peripheral start address"
hexmask.long.word 0x00 0.--15. 0x01 "        PER3_PERI_OFFSET ,PER3 peripheral offset"
group.long 0x180++0x03
line.long 0x00 "CH0_STREAM_ID0_MASK_0,Channel 0 Stream ID0 Mask"
group.long 0x184++0x03
line.long 0x00 "CH1_STREAM_ID0_MASK_0,Channel 1 Stream ID0 Mask"
group.long 0x188++0x03
line.long 0x00 "CH2_STREAM_ID0_MASK_0,Channel 2 Stream ID0 Mask"
group.long 0x18C++0x03
line.long 0x00 "CH3_STREAM_ID0_MASK_0,Channel 3 Stream ID0 Mask"
group.long 0x200++0x03
line.long 0x00 "CH0_STREAM_ID1_MASK_0,Channel 0 Stream ID1 Mask"
group.long 0x204++0x03
line.long 0x00 "CH1_STREAM_ID1_MASK_0,Channel 1 Stream ID1 Mask"
group.long 0x208++0x03
line.long 0x00 "CH2_STREAM_ID1_MASK_0,Channel 2 Stream ID1 Mask"
group.long 0x20C++0x03
line.long 0x00 "CH3_STREAM_ID1_MASK_0,Channel 3 Stream ID1 Mask"
group.long 0x280++0x03
line.long 0x00 "CH0_STREAM_ID2_MASK_0,Channel 0 Stream ID2 Mask"
group.long 0x284++0x03
line.long 0x00 "CH1_STREAM_ID2_MASK_0,Channel 1 Stream ID2 Mask"
group.long 0x288++0x03
line.long 0x00 "CH2_STREAM_ID2_MASK_0,Channel 2 Stream ID2 Mask"
group.long 0x28C++0x03
line.long 0x00 "CH3_STREAM_ID2_MASK_0,Channel 3 Stream ID2 Mask"
group.long 0x300++0x03
line.long 0x00 "CH0_STREAM_ID3_MASK_0,Channel 0 Stream ID3 Mask"
group.long 0x304++0x03
line.long 0x00 "CH1_STREAM_ID3_MASK_0,Channel 1 Stream ID3 Mask"
group.long 0x308++0x03
line.long 0x00 "CH2_STREAM_ID3_MASK_0,Channel 2 Stream ID3 Mask"
group.long 0x30C++0x03
line.long 0x00 "CH3_STREAM_ID3_MASK_0,Channel 3 Stream ID3 Mask"
group.long 0x380++0x07
line.long 0x00 "DMA_CHAN_VIRTUALIZATION_ENABLE_0,DMA Channel Virtualization Enable"
bitfld.long 0x00 3. " CH3                   ,Channel 3" "Disabled,Enabled"
bitfld.long 0x00 2. "    CH2               ,Channel 2" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " CH1                   ,Channel 1" "Disabled,Enabled"
bitfld.long 0x00 0. "    CH0               ,Channel 0" "Disabled,Enabled"
line.long 0x04 "DMA_ICG_EN_OVERRIDE_0,DMA ICG Enable Override"
bitfld.long 0x04 0. " DMA_ICG_EN_OVERRIDE   ,DMA ICG enable override" "Disabled,Enabled"
rgroup.long 0x388++0x03
line.long 0x00 "DMA_ACTIVE_0,Common DMA Active"
bitfld.long 0x00 3. " DMA_IO_ACTIVE         ,DMA IO active" "Not active,Active"
bitfld.long 0x00 2. "  DMA_MC_ACTIVE     ,DMA MC active" "Not active,Active"
textline "                                           "
bitfld.long 0x00 1. " DMA_IO_MC_ACTIVE      ,DMA IO MC active" "Not active,Active"
bitfld.long 0x00 0. "  DMA_ACTIVE        ,DMA active" "Not active,Active"
textline "                                           "
tree.end
width 14.
tree "SCR"
group.long 0xF00++0x03
line.long 0x00 "SCR_CH_0,GPCDMA BPMP SCR SCR CH0"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF04++0x03
line.long 0x00 "SCR_CH_1,GPCDMA BPMP SCR SCR CH1"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF08++0x03
line.long 0x00 "SCR_CH_2,GPCDMA BPMP SCR SCR CH2"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF0C++0x03
line.long 0x00 "SCR_CH_3,GPCDMA BPMP SCR SCR CH3"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF80++0x03
line.long 0x00 "SCR_TZ_0,GPCDMA AO SCR SCR TrustZone"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF84++0x03
line.long 0x00 "SCR_DMA_RO_0,GPCDMA AO SCR SCR DMA RO"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
group.long 0xF88++0x03
line.long 0x00 "SCR_HYPER_0,GPCDMA AO SCR SCR Hyper"
bitfld.long 0x00 29. " SEC_LCK ,Locks SCR settings" "Unlocked,Locked"
bitfld.long 0x00 28. "  SEC_WEN ,W group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,R group control in the SCR" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Represents agents the security control configuration" "TZG0,NvG1,NvG2,NvG3,NvG4,NvG5,NvG6,NvG7"
textline "                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode bit 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,Privileged mode bit 6" "Disabled,Enabled"
bitfld.long 0x00 21. "  PR5     ,Privileged mode bit 5" "Disabled,Enabled"
bitfld.long 0x00 20. "  PR4       ,Privileged mode bit 4" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode bit 3" "Disabled,Enabled"
bitfld.long 0x00 18. "  PR2     ,Privileged mode bit 2" "Disabled,Enabled"
bitfld.long 0x00 17. "  PR1     ,Privileged mode bit 1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0       ,Privileged mode bit 0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W     ,Security group 7 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 14. "  G6W     ,Security group 6 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Security group 5 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 12. "  G4W       ,Security group 4 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 11. " G3W     ,Security group 3 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Security group 2 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 9. "  G1W     ,Security group 1 can write the matched address" "Disabled,Enabled"
bitfld.long 0x00 8. "  G0W       ,Security group 0 can write the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 7. " G7R     ,Security group 7 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 6. "  G6R     ,Security group 6 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 5. "  G5R     ,Security group 5 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R       ,Security group 4 can read the matched address" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R     ,Security group 3 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 2. "  G2R     ,Security group 2 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Security group 1 can read the matched address" "Disabled,Enabled"
bitfld.long 0x00 0. "  G0R       ,Security group 0 can read the matched address" "Disabled,Enabled"
tree.end
width 0x0B
tree "Channel 0"
base ad:0x0D070000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "UART,QSPI,I2C,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 1"
base ad:0x0D080000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "UART,QSPI,I2C,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 2"
base ad:0x0D090000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "UART,QSPI,I2C,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree "Channel 3"
base ad:0x0D0A0000
width 16.
group.long 0x00++0x23
line.long 0x00 "CSR_0,CSR"
bitfld.long 0x00 31. " ENB            ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      IE_EOC                ,IE EOC" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 27. " ONCE           ,Once" "Cycling mode,Single block"
bitfld.long 0x00 24.--25. "  FC_MODE               ,FC mode" "No,One,Two,Four"
textline "                         "
bitfld.long 0x00 21.--23. " DMA_MODE       ,DMA mode" "IO2MEM NO FC,IO2MEM FC,MEM2IO NO FC,MEM2IO FC,MEM2MEM,,FIXED PAT,?..."
bitfld.long 0x00 16.--20. "  REQ_SEL               ,REQ select" "UART,QSPI,I2C,?..."
textline "                         "
bitfld.long 0x00 15. " IRQ_MASK       ,IRQ mask" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "      WEIGHT                ,Weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "STA_0,Status"
rbitfld.long 0x04 31. " BSY            ,BSY" "Wait,Active"
bitfld.long 0x04 30. "        ISE_EOC               ,ISE EOC" "No interrupt,Interrupt"
textline "                         "
rbitfld.long 0x04 28. " PING_PONG_STA  ,Ping pong interrupt status" "Ping,Pong"
rbitfld.long 0x04 27. "          DMA_ACTIVITY          ,DMA activity" "Idle,Busy"
textline "                         "
rbitfld.long 0x04 26. " CHANNEL_PAUSE  ,Channel pause" "Pause,Resume"
rbitfld.long 0x04 25. "        CHANNEL_RX            ,Channel RX" "Not active,Active"
textline "                         "
rbitfld.long 0x04 24. " CHANNEL_TX     ,Channel TX" "Not active,Active"
rbitfld.long 0x04 23. "    IRQ_INTR_STA          ,IRQ interrupt status" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x04 21. " TRIG_STA       ,Trigger status" "Not active,Active"
rbitfld.long 0x04 20. "    INTR_STA              ,Interrupt status" "Not active,Active"
line.long 0x08 "CSRE_0,CSRE"
bitfld.long 0x08 31. " DMA_ACTIVITY   ,DMA activity" "Resume,Pause"
bitfld.long 0x08 14.--19. "        TRIG_SEL              ,Trigger select" ",SMP 24,SMP 25,CH0,CH1,CH2,CH3,?..."
line.long 0x0C "SRC_PTR_0,SRC PTR"
line.long 0x10 "DST_PTR_0,DST PTR"
line.long 0x14 "HI_ADR_PTR_0,High Address PTR"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR     ,High DST PTR"
hexmask.long.byte 0x14 0.--7. 1. "            HI_SRC_PTR            ,High SRC PTR"
line.long 0x18 "MC_SEQ_0,MC Sequence"
bitfld.long 0x18 31. " MC_DATA_SWAP   ,MC data swap" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "      MC_REQ_CNT            ,MC REQ CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
bitfld.long 0x18 23.--24. " MC_BURST       ,MC burst" "2 words,,,16 words"
bitfld.long 0x18 20.--22. "      MC_ADDR_WRAP1         ,MC address wrap 1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
textline "                         "
bitfld.long 0x18 17.--19. " MC_ADDR_WRAP0  ,MC address wrap 0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "    MC_AXIID              ,MC AXIID" "0,1"
textline "                         "
bitfld.long 0x18 14.--15. " MC_PROT        ,MC PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "             STREAMID1             ,Stream ID 1"
textline "                         "
hexmask.long.byte 0x18 0.--6. 1. " STREAMID0      ,Stream ID 0"
line.long 0x1C "MMIO_SEQ_0,MMIO Sequence"
bitfld.long 0x1C 31. " DBL_BUF        ,DBL BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "      MMIO_BUS_WIDTH        ,MMIO bus width" "8,16,32,?..."
textline "                         "
bitfld.long 0x1C 27. " MMIO_DATA_SWAP ,MMIO data swap" "Disabled,Enabled"
bitfld.long 0x1C 23.--26. "      MMIO_BURST            ,MMIO burst" "1 words,2 words,,4 words,,,,8 words,,,,,,,,16 words"
textline "                         "
rbitfld.long 0x1C 19.--22. " MMIO_MASTER_ID ,MMIO master ID" ",CCPLEX,CCPLEX DPMU,BPMP,SPE,SCE,DMA PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "   MMIO_ADDR_WRAP        ,MMIO address wrap" "No,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                         "
bitfld.long 0x1C 7.--8. " MMIO_PROT      ,MMIO PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "             MMIO_CHANNEL_SECURITY ,MMIO channel security"
line.long 0x20 "BCOUNT_0,BCOUNT"
rgroup.long 0x24++0x07
line.long 0x00 "DMA_BYTE_TRA_0,DMA Byte TRA"
line.long 0x04 "DMA_BYTE_STA_0,DMA Byte Status"
group.long 0x30++0x0B
line.long 0x00 "ERR_STA_0,Error Status"
line.long 0x04 "FIXED_PAT_0,Fixed PAT"
line.long 0x08 "TZ_0,TrustZone"
bitfld.long 0x08 1. " MC_PROT_1      ,MC PROT 1" "0,1"
bitfld.long 0x08 0. "             MMIO_PROT_1           ,MMIO PROT 1" "0,1"
width 0x0B
tree.end
tree.end
tree "GPC_DMA"
base ad:0x02600F00
width 30.
group.long 0x0++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH0_0,GPCDMA SCE SCR SCR CH0 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x4++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH1_0,GPCDMA SCE SCR SCR CH1 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x8++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH2_0,GPCDMA SCE SCR SCR CH2 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0xC++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH3_0,GPCDMA SCE SCR SCR CH3 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x10++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH4_0,GPCDMA SCE SCR SCR CH4 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x14++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH5_0,GPCDMA SCE SCR SCR CH5 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x18++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH6_0,GPCDMA SCE SCR SCR CH6 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x1C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH7_0,GPCDMA SCE SCR SCR CH7 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x20++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH8_0,GPCDMA SCE SCR SCR CH8 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x24++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH9_0,GPCDMA SCE SCR SCR CH9 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x28++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH10_0,GPCDMA SCE SCR SCR CH10 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x2C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH11_0,GPCDMA SCE SCR SCR CH11 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x30++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH12_0,GPCDMA SCE SCR SCR CH12 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x34++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH13_0,GPCDMA SCE SCR SCR CH13 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x38++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH14_0,GPCDMA SCE SCR SCR CH14 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x3C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH15_0,GPCDMA SCE SCR SCR CH15 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x40++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH16_0,GPCDMA SCE SCR SCR CH16 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x44++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH17_0,GPCDMA SCE SCR SCR CH17 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x48++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH18_0,GPCDMA SCE SCR SCR CH18 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x4C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH19_0,GPCDMA SCE SCR SCR CH19 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x50++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH20_0,GPCDMA SCE SCR SCR CH20 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x54++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH21_0,GPCDMA SCE SCR SCR CH21 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x58++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH22_0,GPCDMA SCE SCR SCR CH22 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x5C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH23_0,GPCDMA SCE SCR SCR CH23 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x60++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH24_0,GPCDMA SCE SCR SCR CH24 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x64++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH25_0,GPCDMA SCE SCR SCR CH25 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x68++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH26_0,GPCDMA SCE SCR SCR CH26 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x6C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH27_0,GPCDMA SCE SCR SCR CH27 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x70++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH28_0,GPCDMA SCE SCR SCR CH28 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x74++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH29_0,GPCDMA SCE SCR SCR CH29 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x78++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH30_0,GPCDMA SCE SCR SCR CH30 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x7C++0x03
line.long 0x00 "GPCDMA_SCE_SCR_SCR_CH31_0,GPCDMA SCE SCR SCR CH31 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
group.long 0x80++0x0B
line.long 0x00 "GPCDMA_BPMP_SCR_SCR_TZ_0,GPCDMA BPMP SCR SCR TZ 0"
bitfld.long 0x00 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x00 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x00 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x00 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x00 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x00 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x00 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x00 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x00 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x00 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x00 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x00 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x00 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x00 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x00 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x00 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x00 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x00 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x00 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x00 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x00 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x00 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x00 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x00 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x00 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x00 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x00 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
line.long 0x04 "GPCDMA_BPMP_SCR_SCR_DMA_RO_0,GPCDMA BPMP SCR SCR DMA RO 0"
bitfld.long 0x04 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x04 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x04 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x04 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x04 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x04 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x04 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x04 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x04 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x04 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x04 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x04 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x04 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x04 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x04 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x04 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x04 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x04 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x04 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x04 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x04 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x04 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x04 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x04 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x04 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x04 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x04 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
line.long 0x08 "GPCDMA_BPMP_SCR_SCR_HYPER_0,GPCDMA BPMP SCR SCR Hyper 0"
bitfld.long 0x08 29. " SEC_LCK ,Security lock" "Not locked,Locked"
bitfld.long 0x08 28. "    SEC_WEN   ,Security write enforced" "Not enforced,Enforced"
textline "                                       "
bitfld.long 0x08 27. " SEC_REN ,Security read enforced" "Not enforced,Enforced"
bitfld.long 0x08 24.--26. "  SEC_OWNER ,Security owner" "0,1,2,3,8,5,6,7"
textline "                                       "
bitfld.long 0x08 23. " PR7     ,Privileged mode 7" "0,1"
bitfld.long 0x08 22. "             PR6       ,Privileged mode 6" "0,1"
textline "                                       "
bitfld.long 0x08 21. " PR5     ,Privileged mode 5" "0,1"
bitfld.long 0x08 20. "             PR4       ,Privileged mode 4" "0,1"
textline "                                       "
bitfld.long 0x08 19. " PR3     ,Privileged mode 3" "0,1"
bitfld.long 0x08 18. "             PR2       ,Privileged mode 2" "0,1"
textline "                                       "
bitfld.long 0x08 17. " PR1     ,Privileged mode 1" "0,1"
bitfld.long 0x08 16. "             PR0       ,Privileged mode 0" "0,1"
textline "                                       "
bitfld.long 0x08 15. " G7W     ,Group 7 write" "0,1"
bitfld.long 0x08 14. "             G6W       ,Group 6 write" "0,1"
textline "                                       "
bitfld.long 0x08 13. " G5W     ,Group 5 write" "0,1"
bitfld.long 0x08 12. "             G4W       ,Group 4 write" "0,1"
textline "                                       "
bitfld.long 0x08 11. " G3W     ,Group 3 write" "0,1"
bitfld.long 0x08 10. "             G2W       ,Group 2 write" "0,1"
textline "                                       "
bitfld.long 0x08 9. " G1W     ,Group 1 write" "0,1"
bitfld.long 0x08 8. "             G0W       ,Group 0 write" "0,1"
textline "                                       "
bitfld.long 0x08 7. " G7R     ,Group 7 read" "0,1"
bitfld.long 0x08 6. "             G6R       ,Group 6 read" "0,1"
textline "                                       "
bitfld.long 0x08 5. " G5R     ,Group 5 read" "0,1"
bitfld.long 0x08 4. "             G4R       ,Group 4 read" "0,1"
textline "                                       "
bitfld.long 0x08 3. " G3R     ,Group 3 read" "0,1"
bitfld.long 0x08 2. "             G2R       ,Group 2 read" "0,1"
textline "                                       "
bitfld.long 0x08 1. " G1R     ,Group 1 read" "0,1"
bitfld.long 0x00 0. "             G0R       ,Group 0 read" "0,1"
width 0x0B
tree.end
tree.end
tree "HSP (Hardware Synchronization Primitives)"
base ad:0x03C00000
width 22.
tree "Common Registers"
tree "Security Control Registers"
group.long 0x0++0x03
line.long 0x00 "SCR_SS_0_REG_0,SCR Shared Semaphore 0 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x4++0x03
line.long 0x00 "SCR_SS_1_REG_0,SCR Shared Semaphore 1 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x8++0x03
line.long 0x00 "SCR_SS_2_REG_0,SCR Shared Semaphore 2 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0xC++0x03
line.long 0x00 "SCR_SS_3_REG_0,SCR Shared Semaphore 3 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "SCR_SS_4_REG_0,SCR Shared Semaphore 4 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "SCR_SS_5_REG_0,SCR Shared Semaphore 5 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "SCR_SS_6_REG_0,SCR Shared Semaphore 6 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "SCR_SS_7_REG_0,SCR Shared Semaphore 7 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "SCR_AS_0_REG_0,SCR Arbitrated Semaphore 0 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "SCR_AS_1_REG_0,SCR Arbitrated Semaphore 1 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "SCR_AS_2_REG_0,SCR Arbitrated Semaphore 2 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "SCR_AS_3_REG_0,SCR Arbitrated Semaphore 3 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "SCR_SM_0_REG_0,SCR Shared Mailbox 0 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "SCR_SM_1_REG_0,SCR Shared Mailbox 1 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "SCR_SM_2_REG_0,SCR Shared Mailbox 2 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "SCR_SM_3_REG_0,SCR Shared Mailbox 3 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "SCR_SM_4_REG_0,SCR Shared Mailbox 4 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "SCR_SM_5_REG_0,SCR Shared Mailbox 5 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "SCR_SM_6_REG_0,SCR Shared Mailbox 6 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "SCR_SM_7_REG_0,SCR Shared Mailbox 7 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "SCR_DB_0_REG_0,SCR Doorbell 0 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "SCR_DB_1_REG_0,SCR Doorbell 1 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "SCR_DB_2_REG_0,SCR Doorbell 2 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "SCR_DB_3_REG_0,SCR Doorbell 3 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "SCR_DB_4_REG_0,SCR Doorbell 4 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "SCR_DB_5_REG_0,SCR Doorbell 5 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "SCR_DB_6_REG_0,SCR Doorbell 6 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "SCR_DB_7_REG_0,SCR Doorbell 7 Register"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "INT_SCR_SCR_C0_REG_0,INT_SCR_SCR_C0_REG_0"
bitfld.long 0x00 29. " SEC_LCK ,SecLock" "Unlocked,Locked"
bitfld.long 0x00 28. "      SEC_WEN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 27. "      SEC_REN ,SecWriteEnable" "Disabled,Enabled"
bitfld.long 0x00 24.--26. "      SEC_OWNER ,SecOwner" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 23. " PR7     ,PrivilegedEnable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "      PR6     ,PrivilegedEnable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "      PR5     ,PrivilegedEnable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "      PR4       ,PrivilegedEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " PR3     ,PrivilegedEnable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "      PR2     ,PrivilegedEnable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "      PR1     ,PrivilegedEnable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "      PR0       ,PrivilegedEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " G7W     ,GroupWriteEnable 7" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W     ,GroupWriteEnable 6" "Disabled,Enabled"
bitfld.long 0x00 13. "      G5W     ,GroupWriteEnable 5" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W       ,GroupWriteEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 11. " G3W     ,GroupWriteEnable 3" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W     ,GroupWriteEnable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "      G1W     ,GroupWriteEnable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W       ,GroupWriteEnable 0" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 7. " G7R     ,GroupReadEnable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R     ,GroupReadEnable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      G5R     ,GroupReadEnable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R       ,GroupReadEnable 4" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 3. " G3R     ,GroupReadEnable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R     ,GroupReadEnable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      G1R     ,GroupReadEnable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R       ,GroupReadEnable 0" "Disabled,Enabled"
tree.end
tree "HSP Interrupt Registers"
group.long 0x100++0x03
line.long 0x00 "INT0_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x104++0x03
line.long 0x00 "INT1_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x108++0x03
line.long 0x00 "INT2_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x10C++0x03
line.long 0x00 "INT3_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x110++0x03
line.long 0x00 "INT4_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x114++0x03
line.long 0x00 "INT5_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x118++0x03
line.long 0x00 "INT6_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x11C++0x03
line.long 0x00 "INT7_IE_0,External Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
rgroup.long 0x200++0x07
line.long 0x00 "INT_IV_0,IV Interrupt"
bitfld.long 0x00 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x00 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
line.long 0x04 "INT_IR_0,IR Interrupt"
bitfld.long 0x04 31. " SMP1_GNT[3]    ,SMP1_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 30. "  [2]  ,SMP1_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 29. "  [1]  ,SMP1_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 28. "  [0]  ,SMP1_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 27. " SMP0_GNT[3]    ,SMP0_GNT 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 26. "  [2]  ,SMP0_GNT 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 25. "  [1]  ,SMP0_GNT 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 24. "  [0]  ,SMP0_GNT 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 23. " DBELL[7]       ,DBELL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 22. "  [6]  ,DBELL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 21. "  [5]  ,DBELL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 20. "  [4]  ,DBELL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 19. " DBELL[3]       ,DBELL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 18. "  [2]  ,DBELL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 17. "  [1]  ,DBELL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 16. "  [0]  ,DBELL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 15. " MBOX_FULL[7]   ,MBOX_FULL 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 14. "  [6]  ,MBOX_FULL 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 13. "  [5]  ,MBOX_FULL 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 12. "  [4]  ,MBOX_FULL 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 11. " MBOX_FULL[3]   ,MBOX_FULL 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  [2]  ,MBOX_FULL 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 9. "  [1]  ,MBOX_FULL 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  [0]  ,MBOX_FULL 0 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 7. " MBOX_EMPTY[7]  ,MBOX_EMPTY 7 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  [6]  ,MBOX_EMPTY 6 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 5. "  [5]  ,MBOX_EMPTY 5 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  [4]  ,MBOX_EMPTY 4 Interrupt" "No interrupt,Interrupt"
textline "                               "
bitfld.long 0x04 3. " MBOX_EMPTY[3]  ,MBOX_EMPTY 3 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  [2]  ,MBOX_EMPTY 2 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 1. "  [1]  ,MBOX_EMPTY 1 Interrupt" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  [0]  ,MBOX_EMPTY 0 Interrupt" "No interrupt,Interrupt"
group.long 0x208++0x07
line.long 0x00 "INT_SPARE_0,INT_SPARE_0"
bitfld.long 0x00 0.--3. " SPARE          ,Spare" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "INT_HSP_CLK_OVR_0,INT_HSP_CLK_OVR_0"
bitfld.long 0x04 0. " HSP_CLK_OVR_ON ,HSP_CLK_OVR_ON" "0,1"
rgroup.long 0x280++0x07
line.long 0x00 "INT_DIMENSIONING_0,INT_DIMENSIONING_0"
bitfld.long 0x00 16.--19. " NSI            ,Number of shared interrupts in this instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "            NDB ,Number of doorbells in this instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            NAS ,Number of arbitrated semaphores in this instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "            NSS ,Number of shared semaphores in this instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x00 0.--3. " NSM            ,Number of shared mailboxes in this instance" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree.end
width 31.
tree "Shared Mailbox Registers"
base ad:0x03C00000+0x10000
group.long 0x0++0x03
line.long 0x00 "SHRD_MBOX_MBOX_0_SHRD_MBOX_0,Shared Mailbox 0 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x8000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_1_SHRD_MBOX_0,Shared Mailbox 1 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x10000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_2_SHRD_MBOX_0,Shared Mailbox 2 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x18000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_3_SHRD_MBOX_0,Shared Mailbox 3 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x20000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_4_SHRD_MBOX_0,Shared Mailbox 4 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x28000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_5_SHRD_MBOX_0,Shared Mailbox 5 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x30000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_6_SHRD_MBOX_0,Shared Mailbox 6 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
group.long 0x38000++0x03
line.long 0x00 "SHRD_MBOX_MBOX_7_SHRD_MBOX_0,Shared Mailbox 7 Register"
bitfld.long 0x00 31. " TAG ,Valid bit for the mailbox" "Empty,Full"
hexmask.long 0x00 0.--30. 1. "  DATA ,Value exchanged between producer and consumer"
tree.end
width 35.
tree "Shared Semaphore Registers"
base ad:0x03C00000+0x50000
group.long 0x0++0x03
line.long 0x00 "SHRD_SEM_0_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 0 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 0 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 0 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 0 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 0 current value" "0,1"
group.long 0x10000++0x03
line.long 0x00 "SHRD_SEM_1_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 1 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 1 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 1 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 1 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 1 current value" "0,1"
group.long 0x20000++0x03
line.long 0x00 "SHRD_SEM_2_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 2 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 2 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 2 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 2 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 2 current value" "0,1"
group.long 0x30000++0x03
line.long 0x00 "SHRD_SEM_3_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 3 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 3 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 3 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 3 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 3 current value" "0,1"
group.long 0x40000++0x03
line.long 0x00 "SHRD_SEM_4_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 4 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 4 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 4 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 4 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 4 current value" "0,1"
group.long 0x50000++0x03
line.long 0x00 "SHRD_SEM_5_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 5 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 5 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 5 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 5 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 5 current value" "0,1"
group.long 0x60000++0x03
line.long 0x00 "SHRD_SEM_6_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 6 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 6 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 6 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 6 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 6 current value" "0,1"
group.long 0x70000++0x03
line.long 0x00 "SHRD_SEM_7_SHRD_SMP_STA_0_SET/CLR,Shared Semaphore Status 7 Register"
setclrfld.long 0x00 31. 0x04 31. 0x08 31. " SMP[31] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 30. 0x04 30. 0x08 30. "     [30] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 29. 0x04 29. 0x08 29. "     [29] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 28. 0x04 28. 0x08 28. "     [28] ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 27. 0x04 27. 0x08 27. "    [27] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 26. 0x04 26. 0x08 26. "     [26] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 25. 0x04 25. 0x08 25. "     [25] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 24. 0x04 24. 0x08 24. "     [24] ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 23. 0x04 23. 0x08 23. "    [23] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 22. 0x04 22. 0x08 22. "     [22] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 21. 0x04 21. 0x08 21. "     [21] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 20. 0x04 20. 0x08 20. "     [20] ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 19. 0x04 19. 0x08 19. "    [19] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 18. 0x04 18. 0x08 18. "     [18] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. "     [17] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "     [16] ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "    [15] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 14. 0x04 14. 0x08 14. "     [14] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "     [13] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "     [12] ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 11. 0x04 11. 0x08 11. "    [11] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "     [10] ,SMP 7 current value" "0,1"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "     [9]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 8. 0x04 8. 0x08 8. "     [8]  ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "    [7]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "     [6]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. "     [5]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "     [4]  ,SMP 7 current value" "0,1"
textline "                                            "
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "    [3]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "     [2]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "     [1]  ,SMP 7 current value" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "     [0]  ,SMP 7 current value" "0,1"
tree.end
width 26.
tree "Arbitrated Semaphore Registers"
base ad:0x03C00000+0x70000
rgroup.long 0x0++0x03
line.long 0x00 "ARB_SEM0_0_SMP_GNT_ST_0,Arbitrated Semaphore 0 Grant Status Aperture 0 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x0+0x04)++0x07
line.long 0x00 "ARB_SEM0_0_SMP_GET_0,Arbitrated Semaphore 0 Get Aperture 0 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 0" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 0" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 0" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 0" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 0" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 0" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 0" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 0" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 0" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 0" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 0" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 0" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 0" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 0" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 0" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 0" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 0" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 0" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 0" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 0" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 0" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 0" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 0" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 0" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 0" "No request,Request"
line.long 0x04 "ARB_SEM0_0_SMP_PUT_0,Arbitrated Semaphore 0 Put Aperture 0 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 0" "Not relinquished,Relinquished"
rgroup.long (0x0+0x0C)++0x03
line.long 0x00 "ARB_SEM0_0_SMP_REQ_ST_0,Arbitrated Semaphore 0 Request Aperture 0 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 0" "Not pending,Pending"
group.long (0x0+0x10)++0x03
line.long 0x00 "ARB_SEM0_0_SMP_INT_EN_0,Arbitrated Semaphore 0 Interrupt Enable Aperture 0 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 0" "Disabled,Enabled"
rgroup.long (0x0+0x20)++0x03
line.long 0x00 "ARB_SEM1_0_SMP_GNT_ST_1,Arbitrated Semaphore 0 Grant Status Aperture 1 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x0+0x24)++0x07
line.long 0x00 "ARB_SEM0_0_SMP_GET_1,Arbitrated Semaphore 0 Get Aperture 1 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 1" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 1" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 1" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 1" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 1" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 1" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 1" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 1" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 1" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 1" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 1" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 1" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 1" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 1" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 1" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 1" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 1" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 1" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 1" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 1" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 1" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 1" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 1" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 1" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 1" "No request,Request"
line.long 0x04 "ARB_SEM1_0_SMP_PUT_0,Arbitrated Semaphore 0 Put Aperture 1 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 1" "Not relinquished,Relinquished"
rgroup.long (0x0+0x2C)++0x03
line.long 0x00 "ARB_SEM0_0_SMP_REQ_ST_1,Arbitrated Semaphore 0 Request Aperture 1 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 1" "Not pending,Pending"
group.long (0x0+0x10)++0x03
line.long 0x00 "ARB_SEM1_0_SMP_INT_EN_0,Arbitrated Semaphore 0 Interrupt Enable Aperture 1 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 1" "Disabled,Enabled"
rgroup.long 0x10000++0x03
line.long 0x00 "ARB_SEM0_1_SMP_GNT_ST_0,Arbitrated Semaphore 1 Grant Status Aperture 0 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x10000+0x04)++0x07
line.long 0x00 "ARB_SEM0_1_SMP_GET_0,Arbitrated Semaphore 1 Get Aperture 0 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 0" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 0" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 0" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 0" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 0" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 0" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 0" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 0" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 0" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 0" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 0" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 0" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 0" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 0" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 0" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 0" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 0" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 0" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 0" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 0" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 0" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 0" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 0" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 0" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 0" "No request,Request"
line.long 0x04 "ARB_SEM0_1_SMP_PUT_0,Arbitrated Semaphore 1 Put Aperture 0 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 0" "Not relinquished,Relinquished"
rgroup.long (0x10000+0x0C)++0x03
line.long 0x00 "ARB_SEM0_1_SMP_REQ_ST_0,Arbitrated Semaphore 1 Request Aperture 0 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 0" "Not pending,Pending"
group.long (0x10000+0x10)++0x03
line.long 0x00 "ARB_SEM0_1_SMP_INT_EN_0,Arbitrated Semaphore 1 Interrupt Enable Aperture 0 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 0" "Disabled,Enabled"
rgroup.long (0x10000+0x20)++0x03
line.long 0x00 "ARB_SEM1_1_SMP_GNT_ST_1,Arbitrated Semaphore 1 Grant Status Aperture 1 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x10000+0x24)++0x07
line.long 0x00 "ARB_SEM0_1_SMP_GET_1,Arbitrated Semaphore 1 Get Aperture 1 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 1" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 1" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 1" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 1" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 1" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 1" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 1" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 1" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 1" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 1" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 1" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 1" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 1" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 1" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 1" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 1" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 1" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 1" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 1" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 1" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 1" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 1" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 1" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 1" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 1" "No request,Request"
line.long 0x04 "ARB_SEM1_1_SMP_PUT_0,Arbitrated Semaphore 1 Put Aperture 1 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 1" "Not relinquished,Relinquished"
rgroup.long (0x10000+0x2C)++0x03
line.long 0x00 "ARB_SEM0_1_SMP_REQ_ST_1,Arbitrated Semaphore 1 Request Aperture 1 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 1" "Not pending,Pending"
group.long (0x10000+0x10)++0x03
line.long 0x00 "ARB_SEM1_1_SMP_INT_EN_0,Arbitrated Semaphore 1 Interrupt Enable Aperture 1 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 1" "Disabled,Enabled"
rgroup.long 0x20000++0x03
line.long 0x00 "ARB_SEM0_2_SMP_GNT_ST_0,Arbitrated Semaphore 2 Grant Status Aperture 0 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x20000+0x04)++0x07
line.long 0x00 "ARB_SEM0_2_SMP_GET_0,Arbitrated Semaphore 2 Get Aperture 0 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 0" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 0" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 0" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 0" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 0" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 0" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 0" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 0" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 0" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 0" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 0" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 0" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 0" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 0" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 0" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 0" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 0" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 0" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 0" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 0" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 0" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 0" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 0" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 0" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 0" "No request,Request"
line.long 0x04 "ARB_SEM0_2_SMP_PUT_0,Arbitrated Semaphore 2 Put Aperture 0 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 0" "Not relinquished,Relinquished"
rgroup.long (0x20000+0x0C)++0x03
line.long 0x00 "ARB_SEM0_2_SMP_REQ_ST_0,Arbitrated Semaphore 2 Request Aperture 0 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 0" "Not pending,Pending"
group.long (0x20000+0x10)++0x03
line.long 0x00 "ARB_SEM0_2_SMP_INT_EN_0,Arbitrated Semaphore 2 Interrupt Enable Aperture 0 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 0" "Disabled,Enabled"
rgroup.long (0x20000+0x20)++0x03
line.long 0x00 "ARB_SEM1_2_SMP_GNT_ST_1,Arbitrated Semaphore 2 Grant Status Aperture 1 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x20000+0x24)++0x07
line.long 0x00 "ARB_SEM0_2_SMP_GET_1,Arbitrated Semaphore 2 Get Aperture 1 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 1" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 1" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 1" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 1" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 1" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 1" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 1" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 1" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 1" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 1" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 1" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 1" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 1" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 1" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 1" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 1" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 1" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 1" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 1" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 1" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 1" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 1" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 1" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 1" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 1" "No request,Request"
line.long 0x04 "ARB_SEM1_2_SMP_PUT_0,Arbitrated Semaphore 2 Put Aperture 1 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 1" "Not relinquished,Relinquished"
rgroup.long (0x20000+0x2C)++0x03
line.long 0x00 "ARB_SEM0_2_SMP_REQ_ST_1,Arbitrated Semaphore 2 Request Aperture 1 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 1" "Not pending,Pending"
group.long (0x20000+0x10)++0x03
line.long 0x00 "ARB_SEM1_2_SMP_INT_EN_0,Arbitrated Semaphore 2 Interrupt Enable Aperture 1 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 1" "Disabled,Enabled"
rgroup.long 0x30000++0x03
line.long 0x00 "ARB_SEM0_3_SMP_GNT_ST_0,Arbitrated Semaphore 3 Grant Status Aperture 0 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x30000+0x04)++0x07
line.long 0x00 "ARB_SEM0_3_SMP_GET_0,Arbitrated Semaphore 3 Get Aperture 0 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 0" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 0" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 0" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 0" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 0" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 0" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 0" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 0" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 0" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 0" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 0" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 0" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 0" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 0" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 0" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 0" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 0" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 0" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 0" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 0" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 0" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 0" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 0" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 0" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 0" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 0" "No request,Request"
line.long 0x04 "ARB_SEM0_3_SMP_PUT_0,Arbitrated Semaphore 3 Put Aperture 0 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 0" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 0" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 0" "Not relinquished,Relinquished"
rgroup.long (0x30000+0x0C)++0x03
line.long 0x00 "ARB_SEM0_3_SMP_REQ_ST_0,Arbitrated Semaphore 3 Request Aperture 0 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 0" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 0" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 0" "Not pending,Pending"
group.long (0x30000+0x10)++0x03
line.long 0x00 "ARB_SEM0_3_SMP_INT_EN_0,Arbitrated Semaphore 3 Interrupt Enable Aperture 0 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 0" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 0" "Disabled,Enabled"
rgroup.long (0x30000+0x20)++0x03
line.long 0x00 "ARB_SEM1_3_SMP_GNT_ST_1,Arbitrated Semaphore 3 Grant Status Aperture 1 Register"
bitfld.long 0x00 31. " STATUS[31] ,Bit 31 is current owner of resource 31" "No,Yes"
bitfld.long 0x00 30. "               [30] ,Bit 30 is current owner of resource 30" "No,Yes"
bitfld.long 0x00 29. "               [29] ,Bit 29 is current owner of resource 29" "No,Yes"
bitfld.long 0x00 28. "               [28] ,Bit 28 is current owner of resource 28" "No,Yes"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Bit 27 is current owner of resource 27" "No,Yes"
bitfld.long 0x00 26. "               [26] ,Bit 26 is current owner of resource 26" "No,Yes"
bitfld.long 0x00 25. "               [25] ,Bit 25 is current owner of resource 25" "No,Yes"
bitfld.long 0x00 24. "               [24] ,Bit 24 is current owner of resource 24" "No,Yes"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Bit 23 is current owner of resource 23" "No,Yes"
bitfld.long 0x00 22. "               [22] ,Bit 22 is current owner of resource 22" "No,Yes"
bitfld.long 0x00 21. "               [21] ,Bit 21 is current owner of resource 21" "No,Yes"
bitfld.long 0x00 20. "               [20] ,Bit 20 is current owner of resource 20" "No,Yes"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Bit 19 is current owner of resource 19" "No,Yes"
bitfld.long 0x00 18. "               [18] ,Bit 18 is current owner of resource 18" "No,Yes"
bitfld.long 0x00 17. "               [17] ,Bit 17 is current owner of resource 17" "No,Yes"
bitfld.long 0x00 16. "               [16] ,Bit 16 is current owner of resource 16" "No,Yes"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Bit 15 is current owner of resource 15" "No,Yes"
bitfld.long 0x00 14. "               [14] ,Bit 14 is current owner of resource 14" "No,Yes"
bitfld.long 0x00 13. "               [13] ,Bit 13 is current owner of resource 13" "No,Yes"
bitfld.long 0x00 12. "               [12] ,Bit 12 is current owner of resource 12" "No,Yes"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Bit 11 is current owner of resource 11" "No,Yes"
bitfld.long 0x00 10. "               [10] ,Bit 10 is current owner of resource 10" "No,Yes"
bitfld.long 0x00 9. "               [9]  ,Bit 9 is current owner of resource 9" "No,Yes"
bitfld.long 0x00 8. "               [8]  ,Bit 8 is current owner of resource 8" "No,Yes"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Bit 7 is current owner of resource 7" "No,Yes"
bitfld.long 0x00 6. "               [6]  ,Bit 6 is current owner of resource 6" "No,Yes"
bitfld.long 0x00 5. "               [5]  ,Bit 5 is current owner of resource 5" "No,Yes"
bitfld.long 0x00 4. "               [4]  ,Bit 4 is current owner of resource 4" "No,Yes"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Bit 3 is current owner of resource 3" "No,Yes"
bitfld.long 0x00 2. "               [2]  ,Bit 2 is current owner of resource 2" "No,Yes"
bitfld.long 0x00 1. "               [1]  ,Bit 1 is current owner of resource 1" "No,Yes"
bitfld.long 0x00 0. "               [0]  ,Bit 0 is current owner of resource 0" "No,Yes"
wgroup.long (0x30000+0x24)++0x07
line.long 0x00 "ARB_SEM0_3_SMP_GET_1,Arbitrated Semaphore 3 Get Aperture 1 Register"
bitfld.long 0x00 31. " GET[31]    ,Request for ownership of resource 31 from aperture 1" "No request,Request"
bitfld.long 0x00 30. "        [30] ,Request for ownership of resource 30 from aperture 1" "No request,Request"
bitfld.long 0x00 29. "        [29] ,Request for ownership of resource 29 from aperture 1" "No request,Request"
bitfld.long 0x00 28. "        [28] ,Request for ownership of resource 28 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request for ownership of resource 27 from aperture 1" "No request,Request"
bitfld.long 0x00 26. "        [26] ,Request for ownership of resource 26 from aperture 1" "No request,Request"
bitfld.long 0x00 25. "        [25] ,Request for ownership of resource 25 from aperture 1" "No request,Request"
bitfld.long 0x00 24. "        [24] ,Request for ownership of resource 24 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request for ownership of resource 23 from aperture 1" "No request,Request"
bitfld.long 0x00 22. "        [22] ,Request for ownership of resource 22 from aperture 1" "No request,Request"
bitfld.long 0x00 21. "        [21] ,Request for ownership of resource 21 from aperture 1" "No request,Request"
bitfld.long 0x00 20. "        [20] ,Request for ownership of resource 20 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request for ownership of resource 19 from aperture 1" "No request,Request"
bitfld.long 0x00 18. "        [18] ,Request for ownership of resource 18 from aperture 1" "No request,Request"
bitfld.long 0x00 17. "        [17] ,Request for ownership of resource 17 from aperture 1" "No request,Request"
bitfld.long 0x00 16. "        [16] ,Request for ownership of resource 16 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request for ownership of resource 15 from aperture 1" "No request,Request"
bitfld.long 0x00 14. "        [14] ,Request for ownership of resource 14 from aperture 1" "No request,Request"
bitfld.long 0x00 13. "        [13] ,Request for ownership of resource 13 from aperture 1" "No request,Request"
bitfld.long 0x00 12. "        [12] ,Request for ownership of resource 12 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request for ownership of resource 11 from aperture 1" "No request,Request"
bitfld.long 0x00 10. "        [10] ,Request for ownership of resource 10 from aperture 1" "No request,Request"
bitfld.long 0x00 9. "        [9]  ,Request for ownership of resource 9 from aperture 1" "No request,Request"
bitfld.long 0x00 8. "        [8]  ,Request for ownership of resource 8 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request for ownership of resource 7 from aperture 1" "No request,Request"
bitfld.long 0x00 6. "        [6]  ,Request for ownership of resource 6 from aperture 1" "No request,Request"
bitfld.long 0x00 5. "        [5]  ,Request for ownership of resource 5 from aperture 1" "No request,Request"
bitfld.long 0x00 4. "        [4]  ,Request for ownership of resource 4 from aperture 1" "No request,Request"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request for ownership of resource 3 from aperture 1" "No request,Request"
bitfld.long 0x00 2. "        [2]  ,Request for ownership of resource 2 from aperture 1" "No request,Request"
bitfld.long 0x00 1. "        [1]  ,Request for ownership of resource 1 from aperture 1" "No request,Request"
bitfld.long 0x00 0. "        [0]  ,Request for ownership of resource 0 from aperture 1" "No request,Request"
line.long 0x04 "ARB_SEM1_3_SMP_PUT_0,Arbitrated Semaphore 3 Put Aperture 1 Register"
bitfld.long 0x04 31. " PUT[31]    ,Relinquishes ownership of resource 31 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 30. "  [30] ,Relinquishes ownership of resource 30 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 29. "  [29] ,Relinquishes ownership of resource 29 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 28. "  [28] ,Relinquishes ownership of resource 28 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 27. " [27]       ,Relinquishes ownership of resource 27 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 26. "  [26] ,Relinquishes ownership of resource 26 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 25. "  [25] ,Relinquishes ownership of resource 25 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 24. "  [24] ,Relinquishes ownership of resource 24 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 23. " [23]       ,Relinquishes ownership of resource 23 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 22. "  [22] ,Relinquishes ownership of resource 22 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 21. "  [21] ,Relinquishes ownership of resource 21 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 20. "  [20] ,Relinquishes ownership of resource 20 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 19. " [19]       ,Relinquishes ownership of resource 19 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 18. "  [18] ,Relinquishes ownership of resource 18 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 17. "  [17] ,Relinquishes ownership of resource 17 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 16. "  [16] ,Relinquishes ownership of resource 16 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 15. " [15]       ,Relinquishes ownership of resource 15 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 14. "  [14] ,Relinquishes ownership of resource 14 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 13. "  [13] ,Relinquishes ownership of resource 13 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 12. "  [12] ,Relinquishes ownership of resource 12 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 11. " [11]       ,Relinquishes ownership of resource 11 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 10. "  [10] ,Relinquishes ownership of resource 10 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 9. "  [9]  ,Relinquishes ownership of resource 9 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 8. "  [8]  ,Relinquishes ownership of resource 8 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 7. " [7]        ,Relinquishes ownership of resource 7 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 6. "  [6]  ,Relinquishes ownership of resource 6 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 5. "  [5]  ,Relinquishes ownership of resource 5 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 4. "  [4]  ,Relinquishes ownership of resource 4 from aperture 1" "Not relinquished,Relinquished"
textline "                                   "
bitfld.long 0x04 3. " [3]        ,Relinquishes ownership of resource 3 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 2. "  [2]  ,Relinquishes ownership of resource 2 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 1. "  [1]  ,Relinquishes ownership of resource 1 from aperture 1" "Not relinquished,Relinquished"
bitfld.long 0x04 0. "  [0]  ,Relinquishes ownership of resource 0 from aperture 1" "Not relinquished,Relinquished"
rgroup.long (0x30000+0x2C)++0x03
line.long 0x00 "ARB_SEM0_3_SMP_REQ_ST_1,Arbitrated Semaphore 3 Request Aperture 1 Register"
bitfld.long 0x00 31. " REQ[31]    ,Request 31 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 30. "       [30] ,Request 30 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 29. "       [29] ,Request 29 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 28. "       [28] ,Request 28 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Request 27 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 26. "       [26] ,Request 26 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 25. "       [25] ,Request 25 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 24. "       [24] ,Request 24 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Request 23 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 22. "       [22] ,Request 22 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 21. "       [21] ,Request 21 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 20. "       [20] ,Request 20 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Request 19 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 18. "       [18] ,Request 18 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 17. "       [17] ,Request 17 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 16. "       [16] ,Request 16 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Request 15 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 14. "       [14] ,Request 14 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 13. "       [13] ,Request 13 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 12. "       [12] ,Request 12 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Request 11 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 10. "       [10] ,Request 10 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 9. "       [9]  ,Request 9 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 8. "       [8]  ,Request 8 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Request 7 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 6. "       [6]  ,Request 6 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 5. "       [5]  ,Request 5 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 4. "       [4]  ,Request 4 pending from aperture 1" "Not pending,Pending"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Request 3 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 2. "       [2]  ,Request 2 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 1. "       [1]  ,Request 1 pending from aperture 1" "Not pending,Pending"
bitfld.long 0x00 0. "       [0]  ,Request 0 pending from aperture 1" "Not pending,Pending"
group.long (0x30000+0x10)++0x03
line.long 0x00 "ARB_SEM1_3_SMP_INT_EN_0,Arbitrated Semaphore 3 Interrupt Enable Aperture 1 Register"
bitfld.long 0x00 31. " EN[31]     ,Interrupt enable 31 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 30. "          [30] ,Interrupt enable 30 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 29. "          [29] ,Interrupt enable 29 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 28. "          [28] ,Interrupt enable 28 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 27. " [27]       ,Interrupt enable 27 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 26. "          [26] ,Interrupt enable 26 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 25. "          [25] ,Interrupt enable 25 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 24. "          [24] ,Interrupt enable 24 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 23. " [23]       ,Interrupt enable 23 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 22. "          [22] ,Interrupt enable 22 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 21. "          [21] ,Interrupt enable 21 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 20. "          [20] ,Interrupt enable 20 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " [19]       ,Interrupt enable 19 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 18. "          [18] ,Interrupt enable 18 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 17. "          [17] ,Interrupt enable 17 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 16. "          [16] ,Interrupt enable 16 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15. " [15]       ,Interrupt enable 15 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 14. "          [14] ,Interrupt enable 14 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 13. "          [13] ,Interrupt enable 13 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 12. "          [12] ,Interrupt enable 12 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " [11]       ,Interrupt enable 11 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 10. "          [10] ,Interrupt enable 10 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 9. "          [9]  ,Interrupt enable 9 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 8. "          [8]  ,Interrupt enable 8 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " [7]        ,Interrupt enable 7 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 6. "          [6]  ,Interrupt enable 6 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 5. "          [5]  ,Interrupt enable 5 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 4. "          [4]  ,Interrupt enable 4 for aperture 1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " [3]        ,Interrupt enable 3 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 2. "          [2]  ,Interrupt enable 2 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 1. "          [1]  ,Interrupt enable 1 for aperture 1" "Disabled,Enabled"
bitfld.long 0x00 0. "          [0]  ,Interrupt enable 0 for aperture 1" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "ARB_SEM_SPARE_SPARE_0,ARB_SEM_SPARE_SPARE_0"
tree.end
width 23.
tree "Doorbell Registers"
base ad:0x03C00000+0x90000
wgroup.long 0x0++0x03
line.long 0x00 "DBELL_0_TRIGGER_0,Doorbell Trigger 0 Register"
group.long (0x0+0x04)++0x0B
line.long 0x00 "DBELL_0_ENABLE_0,Doorbell Enable 0 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_0_RAW_0,Doorbell RAW 0 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_0_PENDING_0,Doorbell Pending 0 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x100++0x03
line.long 0x00 "DBELL_1_TRIGGER_0,Doorbell Trigger 1 Register"
group.long (0x100+0x04)++0x0B
line.long 0x00 "DBELL_1_ENABLE_0,Doorbell Enable 1 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_1_RAW_0,Doorbell RAW 1 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_1_PENDING_0,Doorbell Pending 1 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x200++0x03
line.long 0x00 "DBELL_2_TRIGGER_0,Doorbell Trigger 2 Register"
group.long (0x200+0x04)++0x0B
line.long 0x00 "DBELL_2_ENABLE_0,Doorbell Enable 2 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_2_RAW_0,Doorbell RAW 2 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_2_PENDING_0,Doorbell Pending 2 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x300++0x03
line.long 0x00 "DBELL_3_TRIGGER_0,Doorbell Trigger 3 Register"
group.long (0x300+0x04)++0x0B
line.long 0x00 "DBELL_3_ENABLE_0,Doorbell Enable 3 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_3_RAW_0,Doorbell RAW 3 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_3_PENDING_0,Doorbell Pending 3 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x400++0x03
line.long 0x00 "DBELL_4_TRIGGER_0,Doorbell Trigger 4 Register"
group.long (0x400+0x04)++0x0B
line.long 0x00 "DBELL_4_ENABLE_0,Doorbell Enable 4 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_4_RAW_0,Doorbell RAW 4 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_4_PENDING_0,Doorbell Pending 4 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x500++0x03
line.long 0x00 "DBELL_5_TRIGGER_0,Doorbell Trigger 5 Register"
group.long (0x500+0x04)++0x0B
line.long 0x00 "DBELL_5_ENABLE_0,Doorbell Enable 5 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_5_RAW_0,Doorbell RAW 5 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_5_PENDING_0,Doorbell Pending 5 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x600++0x03
line.long 0x00 "DBELL_6_TRIGGER_0,Doorbell Trigger 6 Register"
group.long (0x600+0x04)++0x0B
line.long 0x00 "DBELL_6_ENABLE_0,Doorbell Enable 6 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_6_RAW_0,Doorbell RAW 6 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_6_PENDING_0,Doorbell Pending 6 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
wgroup.long 0x700++0x03
line.long 0x00 "DBELL_7_TRIGGER_0,Doorbell Trigger 7 Register"
group.long (0x700+0x04)++0x0B
line.long 0x00 "DBELL_7_ENABLE_0,Doorbell Enable 7 Register"
bitfld.long 0x00 27. " MAP1_APE   ,MAP1 enable 11" "Disabled,Enabled"
bitfld.long 0x00 26. "   MAP1_CSITE ,MAP1 enable 10" "Disabled,Enabled"
bitfld.long 0x00 25. "   MAP1_JTAGM   ,MAP1 enable 9" "Disabled,Enabled"
bitfld.long 0x00 24. "   MAP1_TSECB ,MAP1 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 23. " MAP1_TSECA ,MAP1 enable 7" "Disabled,Enabled"
bitfld.long 0x00 22. "   MAP1_DMA   ,MAP1 enable 6" "Disabled,Enabled"
bitfld.long 0x00 21. "   MAP1_CPE/SCE ,MAP1 enable 5" "Disabled,Enabled"
bitfld.long 0x00 20. "   MAP1_SPE   ,MAP1 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 19. " MAP1_BPMP  ,MAP1 enable 3" "Disabled,Enabled"
bitfld.long 0x00 18. "   MAP1_DPMU  ,MAP1 enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "   MAP1_CCPLEX  ,MAP1 enable 1" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 11. " MAP0_APE   ,MAP0 enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "   MAP0_CSITE ,MAP0 enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "   MAP0_JTAGM   ,MAP0 enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "   MAP0_TSECB ,MAP0 enable 8" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 7. " MAP0_TSECA ,MAP0 enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "   MAP0_DMA   ,MAP0 enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "   MAP0_CPE/SCE ,MAP0 enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "   MAP0_SPE   ,MAP0 enable 4" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 3. " MAP0_BPMP  ,MAP0 enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "   MAP0_DPMU  ,MAP0 enable 2" "Disabled,Enabled"
bitfld.long 0x00 1. "   MAP0_CCPLEX  ,MAP0 enable 1" "Disabled,Enabled"
line.long 0x04 "DBELL_7_RAW_0,Doorbell RAW 7 Register"
eventfld.long 0x04 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x04 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x04 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x04 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x04 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x04 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x04 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x04 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x04 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x04 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x04 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x04 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x04 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x04 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x04 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x04 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x04 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x04 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
line.long 0x08 "DBELL_7_PENDING_0,Doorbell Pending 7 Register"
eventfld.long 0x08 27. " MAP1_APE   ,MAP1 flag 11 set" "No effect,Set"
eventfld.long 0x08 26. "  MAP1_CSITE ,MAP1 flag 10 set" "No effect,Set"
eventfld.long 0x08 25. "  MAP1_JTAGM   ,MAP1 flag 9 set" "No effect,Set"
eventfld.long 0x08 24. "  MAP1_TSECB ,MAP1 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 23. " MAP1_TSECA ,MAP1 flag 7 set" "No effect,Set"
eventfld.long 0x08 22. "  MAP1_DMA   ,MAP1 flag 6 set" "No effect,Set"
eventfld.long 0x08 21. "  MAP1_CPE/SCE ,MAP1 flag 5 set" "No effect,Set"
eventfld.long 0x08 20. "  MAP1_SPE   ,MAP1 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 19. " MAP1_BPMP  ,MAP1 flag 3 set" "No effect,Set"
eventfld.long 0x08 18. "  MAP1_DPMU  ,MAP1 flag 2 set" "No effect,Set"
eventfld.long 0x08 17. "  MAP1_CCPLEX  ,MAP1 flag 1 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 11. " MAP0_APE   ,MAP0 flag 11 set" "No effect,Set"
eventfld.long 0x08 10. "  MAP0_CSITE ,MAP0 flag 10 set" "No effect,Set"
eventfld.long 0x08 9. "  MAP0_JTAGM   ,MAP0 flag 9 set" "No effect,Set"
eventfld.long 0x08 8. "  MAP0_TSECB ,MAP0 flag 8 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 7. " MAP0_TSECA ,MAP0 flag 7 set" "No effect,Set"
eventfld.long 0x08 6. "  MAP0_DMA   ,MAP0 flag 6 set" "No effect,Set"
eventfld.long 0x08 5. "  MAP0_CPE/SCE ,MAP0 flag 5 set" "No effect,Set"
eventfld.long 0x08 4. "  MAP0_SPE   ,MAP0 flag 4 set" "No effect,Set"
textline "                                "
eventfld.long 0x08 3. " MAP0_BPMP  ,MAP0 flag 3 set" "No effect,Set"
eventfld.long 0x08 2. "  MAP0_DPMU  ,MAP0 flag 2 set" "No effect,Set"
eventfld.long 0x08 1. "  MAP0_CCPLEX  ,MAP0 flag 1 set" "No effect,Set"
tree.end
width 0x0B
tree.end
tree.open "Address Space Translation (AST)"
tree "AON_AST_0"
base ad:0x0C040000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "AON_AST_1"
base ad:0x0C050000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "SCE_AST_0"
base ad:0x0B040000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "SCE_AST_1"
base ad:0x0B050000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "BPMP_AST_0"
base ad:0x0D040000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "BPMP_AST_1"
base ad:0x0D050000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "APE_ACAST"
base ad:0x02994000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree "APE_ADAST"
base ad:0x02996000
width 25.
group.long 0x00++0x07
line.long 0x00 "APS_AST_CONTROL_0,APS Address Space Translation Control 0"
bitfld.long 0x00 31. " APBOVRON      ,APB override on" "0,1"
bitfld.long 0x00 30. "           NICOVRON      ,NIC override on" "0,1"
hexmask.long.byte 0x00 22.--29. 1. "             PHYSSTREAMID  ,Physical StreamID output"
textline "                                  "
bitfld.long 0x00 20. " CARVEOUTLOCK  ,Prevents writes to all Carve Out controls" "False,True"
bitfld.long 0x00 19. "       DEFPHYSICAL   ,Selected default StreamID" "DEFVMINDEX,PHYSSTREAMID"
bitfld.long 0x00 15.--18. "  DEFVMINDEX    ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 10.--11. " DEFCARVEOUTAL ,Carve out access level" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carve out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "            DEFNSPASSTHRU ,NS bit is forwarded from the AXI Slave interface" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 3. " DEFNS         ,NS state for default accesses" "Secure,Non Secure"
bitfld.long 0x00 1. "  MATCHERRCTL   ,Specifies how transactions that do not match a Region are handled" "No DECERR,DECERR"
bitfld.long 0x00 0. "     LOCK          ,Prevents writes to RWGL" "False,True"
line.long 0x04 "APS_AST_ERROR_STATUS_0,APS Address Space Translation Error STATUS 0"
rbitfld.long 0x04 2. " OVERFLOW      ,This bit is set when Valid=1 and a decode Error response is generated by the AST" "No error,Error"
rbitfld.long 0x04 1. "    VMINDXERR     ,This bit is set when Valid=0 and a decode Error response is generated by the AST" "No error,Error"
bitfld.long 0x04 0. "      VALID         ,This bit is set when a decode Error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "APS_AST_ERROR_ADDR_LO_0,APS Address Space Translation Error ADDR LO 0"
line.long 0x04 "APS_AST_ERROR_ADDR_HI_0,APS Address Space Translation Error ADDR HI 0"
group.long 0x20++0x03
line.long 0x00 "APS_AST_CONTROL_0_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "APS_AST_CONTROL_1_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "APS_AST_CONTROL_2_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "APS_AST_CONTROL_3_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "APS_AST_CONTROL_4_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "APS_AST_CONTROL_5_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "APS_AST_CONTROL_6_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "APS_AST_CONTROL_7_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "APS_AST_CONTROL_8_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "APS_AST_CONTROL_9_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "APS_AST_CONTROL_10_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "APS_AST_CONTROL_11_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "APS_AST_CONTROL_12_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "APS_AST_CONTROL_13_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "APS_AST_CONTROL_14_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "APS_AST_CONTROL_15_0,APS Address Space Translation Control 0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output"
bitfld.long 0x00 0. "          ENABLE        ,Enabled VMIndx" "Disabled,Enabled"
width 35.
group.long (0x100+0x0)++0x1B "Region 0"
line.long 0x00 "APS_AST_REGION_0_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_0_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_0_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_0_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_0_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_0_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_0_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x20)++0x1B "Region 1"
line.long 0x00 "APS_AST_REGION_1_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_1_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_1_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_1_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_1_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_1_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_1_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x40)++0x1B "Region 2"
line.long 0x00 "APS_AST_REGION_2_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_2_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_2_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_2_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_2_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_2_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_2_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x60)++0x1B "Region 3"
line.long 0x00 "APS_AST_REGION_3_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_3_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_3_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_3_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_3_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_3_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_3_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0x80)++0x1B "Region 4"
line.long 0x00 "APS_AST_REGION_4_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_4_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_4_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_4_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_4_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_4_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_4_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xA0)++0x1B "Region 5"
line.long 0x00 "APS_AST_REGION_5_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_5_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_5_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_5_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_5_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_5_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_5_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xC0)++0x1B "Region 6"
line.long 0x00 "APS_AST_REGION_6_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_6_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_6_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_6_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_6_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_6_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_6_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
group.long (0x100+0xE0)++0x1B "Region 7"
line.long 0x00 "APS_AST_REGION_7_SLAVE_BASE_LO_0,APS Address Space Translation Region 0 Slave Base LO 0"
hexmask.long.tbyte 0x00 12.--31. 1. " SLVBASE       ,Slave base"
bitfld.long 0x00 0. "      ENABLE        ,Enable" "False,True"
line.long 0x04 "APS_AST_REGION_7_SLAVE_BASE_HI_0,APS Address Space Translation Region 0 Slave Base HI 0"
line.long 0x08 "APS_AST_REGION_7_MASK_LO_0,APS Address Space Translation Region 0 Mask LO 0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "APS_AST_REGION_7_MASK_HI_0,APS Address Space Translation Region 0 Mask HI 0"
line.long 0x10 "APS_AST_REGION_7_MASTER_BASE_LO_0,APS Address Space Translation Region 0 Master Base LO 0"
hexmask.long.tbyte 0x010 12.--31. 1. " MASTBASE      ,Master base"
line.long 0x14 "APS_AST_REGION_7_MASTER_BASE_HI_0,APS Address Space Translation Region 0 Master Base HI 0"
line.long 0x18 "APS_AST_REGION_7_CONTROL_0,APS Address Space Translation Region 0 Control 0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "           VMINDEX       ,VMINDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 10.--11. "            CARVEOUTAL    ,CARVEOUTAL" "0,1,2,3"
textline "                                            "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,CARVEOUTID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "          NSPASSTHRU    ,NSPASSTHRU" "Disabled,Enabled"
bitfld.long 0x18 3. "      NS            ,Non Secure" "Secure,Non Secure"
textline "                                            "
bitfld.long 0x18 0. " LOCK          ,Lock" "False,True"
width 0x0B
tree.end
tree.end
tree "CPU Complex"
base ad:0x50060000
width 18.
group.long 0x00++0x03
line.long 0x00 "MSELECT_CONFIG_0,MSELECT_CONFIG Register"
bitfld.long 0x00 30. " WRAP_TO_INCR_SLAVE3          ,Wrap to INCR Slave 3" "Disabled,Enabled"
bitfld.long 0x00 29. "  WRAP_TO_INCR_SLAVE2(GPU)      ,Wrap to INCR Slave 2 (GPU)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 28. " WRAP_TO_INCR_SLAVE1(PCIe)    ,Wrap to INCR Slave 1 (PCIe)" "Disabled,Enabled"
bitfld.long 0x00 27. "  WRAP_TO_INCR_SLAVE0(APC)      ,Wrap to INCR Slave 0 (APC)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 26. " UNSUPP_SIZE_ERR_EN           ,Unsupported size error enabled" "Disabled,Enabled"
bitfld.long 0x00 25. "  ERR_RESP_EN_SLAVE2(GPU)       ,Error response enable Slave 2 (GPU)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 24. " ERR_RESP_EN_SLAVE1(PCIe)     ,Error response enable Slave 1 (PCIe)" "Disabled,Enabled"
bitfld.long 0x00 23. "  WRITE_TIMEOUT_EN_SLAVE3       ,Write timeout enable Slave 3" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 22. " READ_TIMEOUT_EN_SLAVE3       ,Read timeout enable Slave 3" "Disabled,Enabled"
bitfld.long 0x00 21. "  WRITE_TIMEOUT_EN_SLAVE2(GPU)  ,Write timeout enable Slave 2 (GPU)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 20. " READ_TIMEOUT_EN_SLAVE2(GPU)  ,Read timeout enable Slave 2 (GPU)" "Disabled,Enabled"
bitfld.long 0x00 19. "  WRITE_TIMEOUT_EN_SLAVE1(PCIe) ,Write timeout enable Slave 1 (PCIe)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 18. " READ_TIMEOUT_EN_SLAVE1(PCIe) ,Read timeout enable Slave 1 (PCIe)" "Disabled,Enabled"
bitfld.long 0x00 17. "  WRITE_TIMEOUT_EN_SLAVE0(APC)  ,Write timeout enable Slave 0 (APC)" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 16. " READ_TIMEOUT_EN_SLAVE0(APC)  ,Read timeout enable Slave 0 (APC)" "Disabled,Enabled"
bitfld.long 0x00 15. "  SAFE_MODE_MASTER1             ,Safe mode Master 1" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 14. " ENABLE_GPU_APERTURE          ,Enable GPU aperture" "Disabled,Enabled"
bitfld.long 0x00 13. "  ENABLE_APB_APERTURE           ,Enable APB aperture" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 5. " ENABLE_PCIE_APERTURE         ,Enable PCIE aperture" "Disabled,Enabled"
bitfld.long 0x00 0. "  SAFE_MODE_MASTER0             ,Safe mode Master 0" "Disabled,Enabled"
width 0x0B
tree.end
tree "AON (Always-On Cluster)"
base ad:0x0C1F0000
width 25.
tree "AOPM Registers"
group.long 0x00++0x1F
line.long 0x00 "SOFT_RESET_0,SOFT_RESET_0"
bitfld.long 0x00 0. " SOFT_RESET             ,SOFT_RESET" "No reset,Reset"
line.long 0x04 "SLCG_CTRL_0,SLCG_CTRL_0"
bitfld.long 0x04 1. " PM_SLCG_EN             ,Enable second level clock gating control for the PM clock domain logic in PM" "Disabled,Enabled"
bitfld.long 0x04 0. "          APB_SLCG_EN         ,Enable second level clock gating control for the APB clock domain logic in PM" "Disabled,Enabled"
line.long 0x08 "TGT_PWR_STATE_0,AOPM Target Power State Configuration Register"
bitfld.long 0x08 7. " BYPASS_TWOSTEP         ,Bypasses the request to CAR to switch clocks in going from Shallow-Dormant to Deep-Dormant and also bypasses the request to PMC to turn OSC off" "No bypass,Bypass"
bitfld.long 0x08 6. "         RAIL_RET            ,Whether Rail voltage is reduced to lowest operational during Standby/Dormant" "Not reduced,Reduced"
bitfld.long 0x08 5. "          RAM_RET            ,Whether RAM peripheral logic is power gated, and bitcell array placed in retention mode" "Not in retention mode,In retention mode"
textline "                                  "
bitfld.long 0x08 4. " RAM_PPG                ,Whether RAM peripheral logic is power gated during Standby/Dormant" "Not gated,Gated"
bitfld.long 0x08 0.--3. "         STATE               ,Target Cortex-R5 Sub-system State" "Active,Idle,Standby,Dormant,?..."
line.long 0x0C "TCM_RET_TIMER_0,AOPM TCM Retention Timer Register"
line.long 0x10 "DBG_TIMER_0,AOPM Debug Timer Register"
line.long 0x14 "LP_EXIT_0,AOPM LP Exit Register"
bitfld.long 0x14 0. " EXIT                   ,Exit" "Done,Pending"
line.long 0x18 "POWER_CFG_MASK_0,AOPM Target Power State And Power State Attribute Policy Register"
bitfld.long 0x18 22. " ALLOW_DEEP_D           ,Whether Deep State is allowed for Dormant FSM" "Not allowed,Allowed"
bitfld.long 0x18 21. "       ALLOW_DEEP_S        ,Whether Deep State is allowed for Standby FSM" "Not allowed,Allowed"
bitfld.long 0x18 20. "          ALLOW_DEEP_I       ,Whether Deep State is allowed for Idle FSM" "Not allowed,Allowed"
textline "                                  "
bitfld.long 0x18 19. " RAIL_RET               ,Whether Cortex-R5 can set non-default Rail retention mode" "Not allowed,Allowed"
bitfld.long 0x18 18. "       PWRGATE_DIS         ,Disable power gating" "No,Yes"
bitfld.long 0x18 17. "                  RAM_RET            ,Whether Cortex-R5 can set non-default RAM Ret power gating" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x18 16. " RAM_PPG                ,Whether Cortex-R5 can set non-default RAM PPG" "Disabled,Enabled"
bitfld.long 0x18 10. "          TGT_DORMANT         ,Whether Cortex-R5 can set Target DORMANT" "Disabled,Enabled"
bitfld.long 0x18 9. "             TGT_STANDBY        ,Whether Cortex-R5 can set Target STANDBY" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x18 8. " TGT_IDLE               ,Whether Cortex-R5 can set Target IDLE" "Disabled,Enabled"
bitfld.long 0x18 6. "          WFE_DORMANT         ,Whether WFE causes transition to Dormant" "Disabled,Enabled"
bitfld.long 0x18 5. "             WFE_STANDBY        ,Whether WFE causes transition to Standby" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x18 4. " WFE_IDLE               ,Whether WFE causes transition to Idle" "Disabled,Enabled"
bitfld.long 0x18 2. "          WFI_DORMANT         ,Whether WFI causes transition to Dormant" "Disabled,Enabled"
bitfld.long 0x18 1. "             WFI_STANDBY        ,Whether WFI causes transition to Standby" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x18 0. " WFI_IDLE               ,Whether WFI causes transition to Idle" "Disabled,Enabled"
line.long 0x1C "TGT_PWR_CFG_ORIDE_0,AOPM Target Power State And Power State Attribute Override Register"
bitfld.long 0x1C 31. " ORIDE_EN               ,Override settings from TGT_PWR_STATE" "Disabled,Enabled"
bitfld.long 0x1C 7. "          BYPASS_TWOSTEP      ,Bypass two step clock switch during Dormant mode" "Disabled,Enabled"
bitfld.long 0x1C 6. "             RAIL_RET           ,Whether Rail voltage is reduced to lowest operational during Standby/Dormant" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x1C 5. " RAM_RET                ,Whether RAM peripheral logic is power gated, and bitcell array retention" "Disabled,Enabled"
bitfld.long 0x1C 4. "          RAM_PPG             ,Whether RAM peripheral logic is power gated during Standby/Dormant" "Disabled,Enabled"
bitfld.long 0x1C 0.--3. "             STATE              ,Target Cortex-R5 State" "Active,Idle,Standby,Dormant,?..."
rgroup.long 0x20++0x07
line.long 0x00 "PWR_STATUS_0,PWR_STATUS_0"
bitfld.long 0x00 25. " LAST_LP_DID_RST        ,Whether last LP transition did reset or not" "Disabled,Enabled"
bitfld.long 0x00 24. "          LAST_LP_DID_PG      ,Whether last LP transition did PG or not" "Disabled,Enabled"
bitfld.long 0x00 23. "             SKIPPING_RAILRET   ,Whether Rail Retention will be skipped depending on any RAM already in DSLP" "Not skipped,Skipped"
textline "                                  "
bitfld.long 0x00 22. " NWFE                   ,Current status of nWFEPIPESTOPPED" "0,1"
bitfld.long 0x00 21. "                 NWFI                ,Current status of nWFIPIPESTOPPED" "0,1"
bitfld.long 0x00 20. "                    ACTIVE_TYPE        ,Whether conceptual state is active or active IRQFIQ" "Active,Active_IRQFIQ"
textline "                                  "
bitfld.long 0x00 19. " EXIT_STATUS            ,Whether an exit is currently in progress or not" "Done,Exiting"
bitfld.long 0x00 18. "           LAST_EXIT_FROM_DEEP ,Whether last exit was from a deep state" "False,True"
bitfld.long 0x00 16.--17. "                LAST_LP_STATE      ,What last low power state did PM exit from" "None,Idle,Standby,Dormant"
textline "                                  "
bitfld.long 0x00 12.--15. " EXIT_CAUSE             ,What caused last exit back to active priority of capturing wake events" "None,SWTRIG,DMA_ACTIVE,IRQ,FIQ,WAKE,RTC_ALARM,DBG_TIMEOUT,WFI,WFE,CLKSTOPPED,SC7,AXIP,?..."
bitfld.long 0x00 8.--11. "       STATE               ,Current Cortex-R5 cluster power state" "Active,IDLE_SHALLOW,IDLE_DEEP,STANDBY_SHALLOW,STANDBY_DEEP,DORMANT_SHALLOW,DORMANT_DEEP,?..."
bitfld.long 0x00 7. "      RAIL               ,Current Rail State" "Active,Ret"
textline "                                  "
bitfld.long 0x00 6. " TCM_RET                ,Whether hardware FSM for is beyond RAM Retention Step or Not" "Active,Retention"
bitfld.long 0x00 4.--5. "         B1TCM_STATE         ,B1TCM state" "Active,SLP,DSLP,?..."
bitfld.long 0x00 2.--3. "               B0TCM_STATE        ,B0TCM state" "Active,SLP,DSLP,?..."
textline "                                  "
bitfld.long 0x00 0.--1. " L1_STATE               ,L1 state" "Active,SLP,DSLP,?..."
line.long 0x04 "DBG_STATUS_0,DBG_STATUS_0"
bitfld.long 0x04 16.--19. " CSTATE_IRQFIQ_FSM      ,CSTATE_IRQFIQ_FSM" "PMA_ACTIVE,PMA_CARREQ_H,PMA_CARREQ_L,PMA_WAIT_LP,PMA_ACT_IRQFIQ,?..."
bitfld.long 0x04 12.--15. "    CSTATE_DORMANT_FSM  ,CSTATE_DORMANT_FSM" "PMD_ACTIVE,PMD_CARREQ_H,PMD_CARREQ_L,PMD_RAMRET_IN,PMD_RAILRET,PMD_RST_ASRT,PMD_PG,PMD_OSCOFF,PMD_OSCON,PMD_UPG,PMD_RST_DEASRT,PMD_RAMRET_OUT,PMD_DORMANT_S,PMD_DORMANT_D,?..."
bitfld.long 0x04 8.--11. "       CSTATE_STANDBY_FSM ,CSTATE_STANDBY_FSM" "PMS_ACTIVE,PMS_CARREQ_H,PMS_CARREQ_L,PMS_RET_WAIT,PMS_RAMRET_IN,PMS_RAMRET_OUT,PMS_RAILRET,PMS_STANDBY_SHALLOW,PMS_STANDBY_DEEP,?..."
textline "                                  "
bitfld.long 0x04 4.--7. " CSTATE_IDLE_FSM        ,CSTATE_IDLE_FSM" "PMI_ACTIVE,PMI_CARREQ_H,PMI_CARREQ_L,PMI_IDLE_SHALLOW,PMI_IDLE_DEEP,?..."
bitfld.long 0x04 0.--1. "  FSM_IN_PROGRESS     ,FSM_IN_PROGRESS" "NONE,IDLE,STANDBY,DORMANT"
group.long 0x28++0x27
line.long 0x00 "DBG_FEATURES_0,DBG_FEATURES_0"
bitfld.long 0x00 1. " FORCE_START            ,Triggers the low power state machines as set up in TGT_POWER_STATE register" "Not forced,Forced"
bitfld.long 0x00 0. "        SKIP_DDORMANT_RST   ,SKIP_DDORMANT_RST" "Not skipped,Skipped"
line.long 0x04 "EXIT_MASK_0,EXIT_MASK_0"
bitfld.long 0x04 9. " AXIP                   ,Whether AXIP causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 8. "          CLKSTOPPED          ,Whether AXIP causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 7. "             WFE                ,Whether WFE causes LP exit" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x04 6. " WFI                    ,Whether WFI causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 5. "          DBG_TIMEOUT         ,Whether Dbg TimeOut causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 4. "             RTC_ALARM          ,Whether RTC Alarm causes LP exit" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x04 3. " T0_WAKE                ,Whether T0_wake causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 2. "          FIQ                 ,Whether FIQ causes LP exit" "Unmasked,Masked"
bitfld.long 0x04 1. "             IRQ                ,Whether IRQ causes LP exit" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x04 0. " DMA_ACTIVE             ,Whether DMA_ACTIVE causes LP exit" "Unmasked,Masked"
line.long 0x08 "BURST_CLK_0,BURST_CLK_0"
bitfld.long 0x08 1. " BURST_LP_EN            ,BURST_LP_EN" "Disabled,Enabled"
bitfld.long 0x08 0. "          BURST_CLK_EN        ,BURST_CLK_EN" "Disabled,Enabled"
line.long 0x0C "ACTIRQFIQ_TO_ACT_0,ACTIRQFIQ_TO_ACT_0"
bitfld.long 0x0C 0. " EN                     ,Transition status" "Done,Pending"
line.long 0x10 "CSITE_CFG_0,AOPM CSITE DBG Register"
bitfld.long 0x10 0. " CSITE_CFG_DBGNOCLKSTOP ,To Drive to csite_cfg_dbgnoclkstop" "False,True"
line.long 0x14 "R5_CFG_0,Cortex-R5 Configuration Related Registers"
hexmask.long.tbyte 0x14 12.--31. 0x10 " PPXBASE                ,Matches the base of the System Address Map MMIO space though LOVEC space is never accessed by BPMP over the AXI Peripheral port as the ATCM base is mapped to 0x0"
bitfld.long 0x14 7.--11. "            PPXSIZE             ,Matches the top of the System Address Map MMIO space" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 3. "                   INITPPX            ,Initialize AXI Peripheral Port" "Not initialized,Initialized"
textline "                                  "
bitfld.long 0x14 1. " TEINIT                 ,TE-bit reset value, determines exception handling state at reset, ARM vs Thumb mode" "ARM,THUMB"
line.long 0x18 "R5_CTRL_0,R5_CTRL_0"
bitfld.long 0x18 1. " FWLOADDONE             ,Controls the state of nCPUHALT to Cortex-R5" "Halted,Done"
bitfld.long 0x18 0. "            LOCK                ,Cortex-R5 secure access lock" "Unlocked,Lock"
line.long 0x1C "TCM_SEL_0,TCM_SEL_0"
bitfld.long 0x1C 2.--5. " AXI_ADDR               ,Cortex-R5 Slave port Address 22:19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "TCM_SLCG_0,TCM_SLCG_0"
bitfld.long 0x20 1. " BTCM_SLCG_EN           ,SLCG control to override control of nCLKSTOPPED on BTCM CLKEN" "Disabled,Enabled"
bitfld.long 0x20 0. "          ATCM_SLCG_EN        ,SLCG control to override control of nCLKSTOPPED on ATCM CLKEN" "Disabled,Enabled"
line.long 0x24 "ACTMON_0,AOPM ACTMON Register"
bitfld.long 0x24 31. " ENB_CNTR               ,Enable activity indicator counter" "Disabled,Enabled"
hexmask.long.byte 0x24 16.--23. 1. "          COUNT_TGT           ,Number of active cycles counted at processor clock rate that toggles the active input to the ACTMON once"
bitfld.long 0x24 7. "                   MASK_EB20          ,Mask activity due to EVENTBUS[20]" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x24 6. " MASK_EB19              ,Mask activity due to EVENTBUS[19]" "Unmasked,Masked"
bitfld.long 0x24 5. "          MASK_EB16           ,Mask activity due to EVENTBUS[16]" "Unmasked,Masked"
bitfld.long 0x24 4. "             MASK_EB5           ,Mask activity due to EVENTBUS[5]" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x24 2. " MASK_NWFE              ,Mask activity due to nWFEPIPESTOPPED" "Unmasked,Masked"
bitfld.long 0x24 1. "          MASK_NWFI           ,Mask activity due to nWFIPIPESTOPPED" "Unmasked,Masked"
bitfld.long 0x24 0. "             MASK_NCLK          ,Mask activity due to nCLKSTOPPED" "Unmasked,Masked"
group.long 0x50++0x07
line.long 0x00 "R5_INTR_0_SET/CLR,AOPM Interrupt Control Register - For Interrupt To Local Cortex-R5 Processor"
setclrfld.long 0x00 5. 0x08 5. 0x0C 5. " DBG_TO                 ,Pre-mask status of DBG_TO interrupt" "Clear,Set"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. "             LP_EXIT             ,Pre-mask status of LP_EXIT interrupt" "Clear,Set"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. "                NO_OSC_ACK         ,Pre-mask status of NO_OSC_ACK interrupt" "Clear,Set"
textline "                                  "
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " NO_DVS_ACK             ,Pre-mask status of NO_DVS_ACK interrupt" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "             NO_CAR_ACK          ,Pre-mask status of NO_CAR_ACK interrupt" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "                RTC_ALARM          ,Pre-mask status of RTC_ALARM interrupt" "Clear,Set"
line.long 0x04 "R5_INTR_MASK_0,AOPM Interrupt Mask Register - For Interrupt To Local Cortex-R5 Processor"
bitfld.long 0x04 5. " DBG_TO                 ,Pre-mask status of DBG_TO interrupt" "Unmasked,Masked"
bitfld.long 0x04 4. "          LP_EXIT             ,Pre-mask status of LP_EXIT interrupt" "Unmasked,Masked"
bitfld.long 0x04 3. "             NO_OSC_ACK         ,Pre-mask status of NO_OSC_ACK interrupt" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x04 2. " NO_DVS_ACK             ,Pre-mask status of NO_DVS_ACK interrupt" "Unmasked,Masked"
bitfld.long 0x04 1. "          NO_CAR_ACK          ,Pre-mask status of NO_CAR_ACK interrupt" "Unmasked,Masked"
bitfld.long 0x04 0. "             RTC_ALARM          ,Pre-mask status of RTC_ALARM interrupt" "Unmasked,Masked"
group.long 0x60++0x07
line.long 0x00 "EXT_INTR_STATUS_0_SET/CLR,Interrupt Control Registers - For Interrupt To External Processor (Via LIC)"
setclrfld.long 0x00 5. 0x08 5. 0x0C 5. " DBG_TO                 ,Pre-mask status of DBG_TO interrupt" "Clear,Set"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. "             LP_EXIT             ,Pre-mask status of LP_EXIT interrupt" "Clear,Set"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. "                NO_OSC_ACK         ,Pre-mask status of NO_OSC_ACK interrupt" "Clear,Set"
textline "                                  "
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " NO_DVS_ACK             ,Pre-mask status of NO_DVS_ACK interrupt" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "             NO_CAR_ACK          ,Pre-mask status of NO_CAR_ACK interrupt" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "                RTC_ALARM          ,Pre-mask status of RTC_ALARM interrupt" "Clear,Set"
line.long 0x04 "R5_INTR_MASK_0,AOPM Interrupt Mask Register - For Interrupt To Local Cortex-R5 Processor"
bitfld.long 0x04 5. " DBG_TO                 ,Pre-mask status of DBG_TO interrupt" "Unmasked,Masked"
bitfld.long 0x04 4. "          LP_EXIT             ,Pre-mask status of LP_EXIT interrupt" "Unmasked,Masked"
bitfld.long 0x04 3. "             NO_OSC_ACK         ,Pre-mask status of NO_OSC_ACK interrupt" "Unmasked,Masked"
textline "                                  "
bitfld.long 0x04 2. " NO_DVS_ACK             ,Pre-mask status of NO_DVS_ACK interrupt" "Unmasked,Masked"
bitfld.long 0x04 1. "          NO_CAR_ACK          ,Pre-mask status of NO_CAR_ACK interrupt" "Unmasked,Masked"
bitfld.long 0x04 0. "             RTC_ALARM          ,Pre-mask status of RTC_ALARM interrupt" "Unmasked,Masked"
group.long 0x70++0x0B
line.long 0x00 "TCM0_TGT_0,RAM SLP/DSLP/SD Control Registers"
rbitfld.long 0x00 6. " SRAM_DSLP_STS          ,Current RAM DSLP status" "Off,On"
rbitfld.long 0x00 5. "               SRAM_SLP_STS        ,Current RAM SLP status" "Off,On"
bitfld.long 0x00 4. "                  START              ,Set by software to start the sequence, cleared by hardware once sequence is done" "Done,Pending"
textline "                                  "
bitfld.long 0x00 1. " SRAM_DSLP              ,RAM DSLP Request" "Not requested,Requested"
bitfld.long 0x00 0. "     SRAM_SLP            ,RAM SLP Request" "Not requested,Requested"
line.long 0x04 "TCM1_TGT_0,RAM SLP/DSLP/SD Control Registers"
rbitfld.long 0x04 6. " SRAM_DSLP_STS          ,Current RAM DSLP status" "Off,On"
rbitfld.long 0x04 5. "               SRAM_SLP_STS        ,Current RAM SLP status" "Off,On"
bitfld.long 0x04 4. "                  START              ,Set by software to start the sequence, cleared by hardware once sequence is done" "Done,Pending"
textline "                                  "
bitfld.long 0x04 1. " SRAM_DSLP              ,RAM DSLP Request" "Not requested,Requested"
bitfld.long 0x04 0. "     SRAM_SLP            ,RAM SLP Request" "Not requested,Requested"
line.long 0x08 "CACHE0_TGT_0,CACHE0_TGT_0"
rbitfld.long 0x08 6. " SRAM_DSLP_STS          ,Current RAM DSLP status" "Off,On"
rbitfld.long 0x08 5. "               SRAM_SLP_STS        ,Current RAM SLP status" "Off,On"
bitfld.long 0x08 4. "                  START              ,Set by software to start the sequence, cleared by hardware once sequence is done" "Done,Pending"
textline "                                  "
bitfld.long 0x08 1. " SRAM_DSLP              ,RAM DSLP Request" "Not requested,Requested"
bitfld.long 0x08 0. "     SRAM_SLP            ,RAM SLP Request" "Not requested,Requested"
group.long 0x80++0x03
line.long 0x00 "SRAM_GRP_DELAY_0,SRAM Sleep/Deep-sleep Zoning Delays"
hexmask.long.byte 0x00 8.--15. 1. " DSLP                   ,If RAM has sub-parts, time between assertion/deassertion of subpart DSLP pins"
hexmask.long.byte 0x00 0.--7. 1. "                SLP                 ,If RAM has sub-parts, time between assertion/deassertion of subpart SLP pins"
rgroup.long 0x84++0x03
line.long 0x00 "RETENTION_STATUS_0,RETENTION_STATUS_0"
bitfld.long 0x00 1. " HW_RET_PENDING         ,Indicates if any hardware driven SLP/DSLP operation is in progress" "Done,Pending"
bitfld.long 0x00 0. "           SW_RET_PENDING      ,Indicates if any software driven SLP/DSLP operation is in progress" "Done,Pending"
group.long 0x88++0x23
line.long 0x00 "RAM_OVR_CTRL_0_0,Per-Bank SLP/DSLP Override Controls Over TCM SRAMs For Debug"
bitfld.long 0x00 23. " TCM1_3_DSLP_OVR        ,Pm2tcm1_3_dslp Override State" "No override,Override"
bitfld.long 0x00 22. "       TCM1_3_SLP_OVR      ,pm2tcm1_3_slp Override State" "No override,Override"
bitfld.long 0x00 21. "          TCM1_3_OVR_EN      ,TCM1_3 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 20. " TCM1_2_DSLP_OVR        ,Pm2tcm1_2_dslp Override State" "No override,Override"
bitfld.long 0x00 19. "       TCM1_2_SLP_OVR      ,Pm2tcm1_2_slp Override State" "No override,Override"
bitfld.long 0x00 18. "          TCM1_2_OVR_EN      ,TCM1_2 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 17. " TCM1_1_DSLP_OVR        ,Pm2tcm1_1_dslp Override State" "No override,Override"
bitfld.long 0x00 16. "       TCM1_1_SLP_OVR      ,Pm2tcm1_1_slp Override State" "No override,Override"
bitfld.long 0x00 15. "          TCM1_1_OVR_EN      ,TCM1_1 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14. " TCM1_0_DSLP_OVR        ,Pm2tcm1_0_dslp Override State" "No override,Override"
bitfld.long 0x00 13. "       TCM1_0_SLP_OVR      ,Pm2tcm1_0_slp Override State" "No override,Override"
bitfld.long 0x00 12. "          TCM1_0_OVR_EN      ,TCM1_0 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " TCM0_3_DSLP_OVR        ,Pm2tcm0_3_dslp Override State" "No override,Override"
bitfld.long 0x00 10. "       TCM0_3_SLP_OVR      ,Pm2tcm0_3_slp Override State" "No override,Override"
bitfld.long 0x00 9. "          TCM0_3_OVR_EN      ,TCM0_3 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 8. " TCM0_2_DSLP_OVR        ,Pm2tcm0_2_dslp Override State" "No override,Override"
bitfld.long 0x00 7. "       TCM0_2_SLP_OVR      ,Pm2tcm0_2_slp Override State" "No override,Override"
bitfld.long 0x00 6. "          TCM0_2_OVR_EN      ,TCM0_2 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 5. " TCM0_1_DSLP_OVR        ,Pm2tcm0_1_dslp Override State" "No override,Override"
bitfld.long 0x00 4. "       TCM0_1_SLP_OVR      ,Pm2tcm0_1_slp Override State" "No override,Override"
bitfld.long 0x00 3. "          TCM0_1_OVR_EN      ,TCM0_1 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 2. " TCM0_0_DSLP_OVR        ,Pm2tcm0_0_dslp Override State" "No override,Override"
bitfld.long 0x00 1. "       TCM0_0_SLP_OVR      ,Pm2tcm0_0_slp Override State" "No override,Override"
bitfld.long 0x00 0. "          TCM0_0_OVR_EN      ,TCM0_0 Override Enable" "Disabled,Enabled"
line.long 0x04 "RAM_OVR_CTRL_1_0,RAM SLP/DSLP Override Controls For Debug"
bitfld.long 0x04 11. " ICACHE_DSLP_OVR        ,Pm2icache0_dslp Override State" "No override,Override"
bitfld.long 0x04 10. "       ICACHE_SLP_OVR      ,Pm2icache0_slp Override State" "No override,Override"
bitfld.long 0x04 9. "          ICACHE_OVR_EN      ,ICACHE Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 8. " DCACHE_DSLP_OVR        ,Pm2dcache0_dslp Override State" "No override,Override"
bitfld.long 0x04 7. "       DCACHE_SLP_OVR      ,Pm2dcache0_slp Override State" "No override,Override"
bitfld.long 0x04 6. "          DCACHE_OVR_EN      ,DCACHE Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 5. " CAN1_DSLP_OVR          ,Pm2can1_dslp Override State" "No override,Override"
bitfld.long 0x04 4. "       CAN1_SLP_OVR        ,Pm2can1_slp Override State" "No override,Override"
bitfld.long 0x04 3. "          CAN1_OVR_EN        ,CAN1 Override Enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x04 2. " CAN0_DSLP_OVR          ,Pm2can0_dslp Override State" "No override,Override"
bitfld.long 0x04 1. "       CAN0_SLP_OVR        ,Pm2can0_slp Override State" "No override,Override"
bitfld.long 0x04 0. "          CAN0_OVR_EN        ,CAN0 Override Enable" "Disabled,Enabled"
line.long 0x08 "CYA_0,CYA_0"
line.long 0x0C "CYA_1,CYA_1"
line.long 0x10 "RAIL_RET_TIMER_0,AOPM Rail Retention Timer Register"
hexmask.long.word 0x10 0.--15. 1. " VAL                    ,VAL"
line.long 0x14 "EXT_SLCG_0,AOPM External SLCG Control Register"
bitfld.long 0x14 0. " NIC_SLCG_OVR_ON        ,Set to 1 to force clken for NIC SLCGS" "Not forced,Forced"
line.long 0x18 "SPARE_0,SPARE_0"
line.long 0x1C "SPARE_1,SPARE_1"
line.long 0x20 "SPARE_2,SPARE_2"
group.long 0xAC++0x1B
line.long 0x00 "CAN0_TGT_0,CAN0_TGT_0"
rbitfld.long 0x00 6. " SRAM_DSLP_STS          ,Current RAM DSLP status" "Off,On"
rbitfld.long 0x00 5. "               SRAM_SLP_STS        ,Current RAM SLP status" "Off,On"
bitfld.long 0x00 4. "                  START              ,Set by software to start the sequence, cleared by hardware once sequence is done" "Done,Pending"
textline "                                  "
bitfld.long 0x00 1. " SRAM_DSLP              ,RAM DSLP Request" "Not requested,Requested"
bitfld.long 0x00 0. "     SRAM_SLP            ,RAM SLP Request" "Not requested,Requested"
line.long 0x04 "CAN1_TGT_0,CAN1_TGT_0"
rbitfld.long 0x04 6. " SRAM_DSLP_STS          ,Current RAM DSLP status" "Off,On"
rbitfld.long 0x04 5. "               SRAM_SLP_STS        ,Current RAM SLP status" "Off,On"
bitfld.long 0x04 4. "                  START              ,Set by software to start the sequence, cleared by hardware once sequence is done" "Done,Pending"
textline "                                  "
bitfld.long 0x04 1. " SRAM_DSLP              ,RAM DSLP Request" "Not requested,Requested"
bitfld.long 0x04 0. "     SRAM_SLP            ,RAM SLP Request" "Not requested,Requested"
line.long 0x08 "SEC_LATCH_0,SEC_LATCH_0"
bitfld.long 0x08 0. " UPD                    ,UPD" "Disabled,Enabled"
line.long 0x0C "AON_BLOCK_0,AON_BLOCK_0"
bitfld.long 0x0C 2. " AON2MC_REQ             ,AOPM blocks AXI requests to the MC" "Not requested,Requested"
bitfld.long 0x0C 1. "     WAKE_ON_TXN_REQ     ,Tells AXI block to issue a wake request" "Not requested,Requested"
bitfld.long 0x0C 0. "        AON2SNIC_REQ       ,This bit in AOPM blocks AXI requests to the SOC" "Not requested,Requested"
line.long 0x10 "DVS_VOLT_INDEX_0,AOPM Retention Index Register"
bitfld.long 0x10 8.--13. " IDX_OUT                ,Voltage Index for coming out of Retention" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                IDX_IN              ,Voltage Index for going into Retention" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "RTC_ALARM_TIMER_0,AOPM RTC Alarm Generation Timer Register"
line.long 0x18 "RTC_ALARM_MSEC_TIMER_0,RTC_ALARM_MSEC_TIMER_0"
hexmask.long.word 0x18 0.--9. 1. " VAL                    ,VAL"
rgroup.long 0xC8++0x07
line.long 0x00 "DEBUG_AXIBLOCK_STATUS_0,DEBUG_AXIBLOCK_STATUS_0"
line.long 0x04 "SEC_LATCH_STATUS_0,SEC_LATCH_STATUS_0"
hexmask.long.byte 0x04 10.--16. 1. " ARUSER_NS              ,ARUSER_NS"
hexmask.long.byte 0x04 3.--9. 1. "                AWUSER_NS           ,AWUSER_NS"
bitfld.long 0x04 2. "                   ARPROT1            ,ARPROT1" "Not protected,Protected"
textline "                                  "
bitfld.long 0x04 1. " AWPROT1                ,AWPROT1" "Not protected,Protected"
bitfld.long 0x04 0. "     LOCK                ,LOCK" "Not locked,Locked"
tree.end
width 24.
tree "AOVC Registers"
base ad:0x0C3A0000
group.long 0x00++0x1F
line.long 0x00 "CONFIG_0,CONFIG_0"
bitfld.long 0x00 31. " PWR_I2C_ENABLE               ,Master enable control for I2C control value updates" "Disabled,Enabled"
bitfld.long 0x00 30. "       PWR_I2C_ENB_BUS_REQ_GRANT    ,PWR_I2C control signal: bus grant options" "Disabled,Enabled"
bitfld.long 0x00 1. "      ENABLE_RAILCTRL              ,Enables the Rail Control Block0" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x00 0. " ENABLE_AOVC                  ,Disables AOVC functions and allows software direct access to the PWR-I2C controller" "Disabled,Enabled"
line.long 0x04 "CTRL_0,CTRL_0"
bitfld.long 0x04 0. " SW_RESET                     ,AOVC internal logic will be reset when this is triggered" "Disabled,Enabled"
line.long 0x08 "SLCG_0,SLCG_0"
bitfld.long 0x08 1. " TIMER_ENABLE                 ,SLCG control for timer" "Disabled,Enabled"
bitfld.long 0x08 0. "       ENABLE                       ,SLCG control" "Disabled,Enabled"
line.long 0x0C "RAILCTRL_REQ_CONFIG_0,RAILCTRL_REQ_CONFIG_0"
bitfld.long 0x0C 8. " REQ2_SPE_TO_CVC_ENABLE       ,Enables ROUTING SPE REQUEST to CVC" "Disabled,Enabled"
bitfld.long 0x0C 5. "       REQ2_SW_ENABLE               ,Enables software to trigger requests on requestor 2 path" "Disabled,Enabled"
bitfld.long 0x0C 4. "      REQ2_HW_ENABLE               ,Enables requestor 2 hardware trigger path" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x0C 3. " REQ1_SW_ENABLE               ,Enables software to trigger requests on requestor 1 path" "Disabled,Enabled"
bitfld.long 0x0C 2. "       REQ1_HW_ENABLE               ,Enables requestor 1 hardware trigger path" "Disabled,Enabled"
bitfld.long 0x0C 1. "      REQ0_SW_ENABLE               ,Enables software to trigger requests on requestor 0 path" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x0C 0. " REQ0_HW_ENABLE               ,Enables requestor 0 hardware trigger path" "Disabled,Enabled"
line.long 0x10 "RAILCTRL_REQ0_CMD_0,RAILCTRL_REQ0_CMD_0"
bitfld.long 0x10 8. " TRIGGER                      ,Generate a software request to send the command corresponding to INDEXSET by software and cleared by hardware when request is granted by the Rail Control arbiter" "Clear,Set"
bitfld.long 0x10 0.--5. "          INDEX                        ,6-bit index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "RAILCTRL_REQ1_CMD_0,RAILCTRL_REQ1_CMD_0"
bitfld.long 0x14 8. " TRIGGER                      ,Generate a software request to send the command corresponding to INDEXSET by software and cleared by hardware when request is granted by the Rail Control arbiter" "Clear,Set"
bitfld.long 0x14 0.--5. "          INDEX                        ,6-bit index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "RAILCTRL_REQ2_CMD_0,RAILCTRL_REQ2_CMD_0"
bitfld.long 0x18 8. " TRIGGER                      ,Generate a software request to send the command corresponding to INDEXSET by software and cleared by hardware when request is granted by the Rail Control arbiter" "Clear,Set"
bitfld.long 0x18 0.--5. "          INDEX                        ,6-bit index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "RAILCTRL_REQ_STATUS_0,RAILCTRL_REQ_STATUS_0"
bitfld.long 0x1C 2. " REQ2_COMPLETION_STATUS       ,Status for req2" "Done,Pending"
rbitfld.long 0x1C 1. "        REQ1_COMPLETION_STATUS       ,Status for req1" "Done,Pending"
rbitfld.long 0x1C 0. "       REQ0_COMPLETION_STATUS       ,Status for req0" "Done,Pending"
rgroup.long 0x20++0x0B
line.long 0x00 "RAILCTRL_REQ0_LOG_0,RAILCTRL_REQ0_LOG_0"
bitfld.long 0x00 7. " REQ0_IS_SW                   ,Last granted REQ0 is a software request" "Not requested,Requested"
bitfld.long 0x00 0.--5. "  REQ0_INDEX                   ,Last granted REQ0 INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "RAILCTRL_REQ1_LOG_0,RAILCTRL_REQ1_LOG_0"
bitfld.long 0x04 7. " REQ1_IS_SW                   ,Last granted REQ1 is a software request" "Not requested,Requested"
bitfld.long 0x04 0.--5. "  REQ1_INDEX                   ,Last granted REQ1 INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "RAILCTRL_REQ2_LOG_0,RAILCTRL_REQ2_LOG_0"
bitfld.long 0x08 7. " REQ2_IS_SW                   ,Last granted REQ2 is a software request" "Not requested,Requested"
bitfld.long 0x08 0.--5. "  REQ2_INDEX                   ,Last granted REQ2 INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x2C++0x03
line.long 0x00 "RAILCTRL_ARB_CONFIG_0,RAILCTRL_ARB_CONFIG_0"
bitfld.long 0x00 21. " REQ2_BYPASS_INTERRUPT        ,Allows requests on channel 2 to proceed even if there are pending interrupts from any channel" "Disabled,Enabled"
bitfld.long 0x00 20. "       STOP_RAILCTRL_REQ2           ,STOP_RAILCTRL_REQ2" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "      MAX_NUM_REQUESTS_REQ2        ,MAX_NUM_REQUESTS_REQ2" ",1,?..."
textline "                                 "
bitfld.long 0x00 13. " REQ1_BYPASS_INTERRUPT        ,Allows requests on channel 1 to proceed even if there are pending interrupts from any channel" "Disabled,Enabled"
bitfld.long 0x00 12. "       STOP_RAILCTRL_REQ1           ,STOP_RAILCTRL_REQ1" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "      MAX_NUM_REQUESTS_REQ1        ,MAX_NUM_REQUESTS_REQ1" ",1,?..."
textline "                                 "
bitfld.long 0x00 5. " REQ0_BYPASS_INTERRUPT        ,Allows requests on channel 0 to proceed even if there are pending interrupts from any channel" "Disabled,Enabled"
bitfld.long 0x00 4. "       STOP_RAILCTRL_REQ0           ,STOP_RAILCTRL_REQ0" "Disabled,Enabled"
bitfld.long 0x00 0.--3. "      MAX_NUM_REQUESTS_REQ0        ,MAX_NUM_REQUESTS_REQ0" ",1,?..."
rgroup.long 0x30++0x03
line.long 0x00 "RAILCTRL_ERROR_LOG_0,RAILCTRL_ERROR_LOG_0"
bitfld.long 0x00 16.--17. " MAX_NUM_REQUESTS_REQ0        ,MAX_NUM_REQUESTS_REQ0" "0,1,2,3"
bitfld.long 0x00 8.--13. "              REQ_INDEX                    ,REQ_INDEX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 7. "            WAIT_SINGLE_INTR_CLR_TIMEOUT ,Indicates that the time waiting for the specific interrupt to be cleared is running out" "No timeout,Timeout"
textline "                                 "
bitfld.long 0x00 6. " WAIT_GLB_INTR_CLR_TIMEOUT    ,Indicates that the time waiting for the pending interrupt to be cleared is running out" "No timeout,Timeout"
bitfld.long 0x00 5. "     SUCCESSIVE_REQ_TIMEOUT       ,Request number > 1 and the time between two successive requests are running out" "No timeout,Timeout"
bitfld.long 0x00 4. "    INVALID_INDEX                ,Index requested does not exist in the AOVC Lookup table" "No,Yes"
textline "                                 "
bitfld.long 0x00 3. " ILLEGAL_INDEX                ,Index requested is not allowed from the requesting agent" "No,Yes"
bitfld.long 0x00 2. "            NACK_FROM_I2C                ,PWR-I2C returned a NACK" "No,Yes"
bitfld.long 0x00 1. "           ACK_FROM_I2C                 ,PWR-I2C returned an ACK" "No,Yes"
group.long 0x34++0x03
line.long 0x00 "TXNGEN_CTRL_0,Configuration, Trigger and Status Register for APB Transaction Generator block"
bitfld.long 0x00 2. " HOLDOFF                      ,HOLDOFF" "Disabled,Enabled"
bitfld.long 0x00 1. "       ENABLE_HOLDOFF_ON_NACK       ,causes the APB TXNGEN state machine to wait for HOLDOFF to be cleared by software after an incomplete transaction has been detected from the PWR-I2C by the APB Txn Gen" "Disabled,Enabled"
bitfld.long 0x00 0. "      SW_TRIGGER                   ,Set by software and cleared by hardware after the transaction completes on I2C" "Not occurred,Occurred"
rgroup.long 0x38++0x0B
line.long 0x00 "TXNGEN_I2C_STATUS_0,TXNGEN_I2C_STATUS_0"
bitfld.long 0x00 8.--10. " LOCAL_I2C_STATUS_CMD2_STAT   ,LOCAL_I2C_STATUS_CMD2_STAT" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 4.--7. "              LOCAL_I2C_STATUS_CMD1_STAT   ,LOCAL_I2C_STATUS_CMD1_STAT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "TXNGEN_REQUEST_LOG_0_0,TXNGEN_REQUEST_LOG_0_0"
bitfld.long 0x04 30. " ACK_FROM_I2C                 ,PWR-I2C returned an ACK" "No,Yes"
bitfld.long 0x04 29. "            NACK_FROM_I2C                ,PWR-I2C returned an NACK" "No,Yes"
bitfld.long 0x04 28. "           NATIVE_APB_TIMEOUT           ,Native APB interface timed out on an APB request from the Transaction Generator" "No timeout,Timeout"
textline "                                 "
bitfld.long 0x04 27. " LOCK_TIMEOUT                 ,Timed out while waiting for lock to be acquired at the beginning of one request from rail control block" "No timeout,Timeout"
bitfld.long 0x04 24.--26. "     PKT_MODE_MASTER_CODE         ,Slave address packet mode high-speed master code" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 23. "             PKT_MODE_CONTINUE_XFER       ,Slave address packet mode attribute" "0,1"
textline "                                 "
bitfld.long 0x04 22. " PKT_MODE_IE                  ,Slave address packet mode Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x04 21. "       PKT_MODE_REPEAT_START_STOP   ,Slave address packet mode attribute" "0,1"
bitfld.long 0x04 20. "             PKT_MODE_HS                  ,slave address packet mode high speed mode" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x04 19. " ADDR_MODE                    ,Addressing mode for the slave device connected to PWR-I2C" "7bit,10bit"
bitfld.long 0x04 18. "          PACKET_MODE_EN               ,Packet mode enable" "Disabled,Enabled"
hexmask.long.word 0x04 8.--17. 0x01 "      REQUEST_SLAVE_ADDR           ,Slave address"
textline "                                 "
hexmask.long.byte 0x04 0.--7. 0x01 " REQUEST_SLAVE_OFFSET         ,Slave offset"
line.long 0x08 "TXNGEN_REQUEST_LOG_1_0,TXNGEN_REQUEST_LOG_1_0"
hexmask.long.byte 0x08 0.--7. 1. " DATA_PAYLOAD                 ,Data byte (LS) sent from rail control block"
group.long 0x44++0x0B
line.long 0x00 "TXNGEN_SW_TRIGGER_0_0,TXNGEN_SW_TRIGGER_0_0"
bitfld.long 0x00 24.--26. " PKT_MODE_MASTER_CODE         ,Slave address packet mode high-speed master code" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23. "              PKT_MODE_CONTINUE_XFER       ,Slave address packet mode attribute" "0,1"
bitfld.long 0x00 22. "             PKT_MODE_IE                  ,Slave address packet mode Interrupt Enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x00 21. " PKT_MODE_REPEAT_START_STOP   ,Slave address packet mode attribute" "0,1"
bitfld.long 0x00 20. "              PKT_MODE_HS                  ,slave address packet mode high speed mode" "Disabled,Enabled"
bitfld.long 0x00 19. "      ADDR_MODE                    ,Addressing mode for the slave device connected to PWR-I2C" "7bit,10bit"
textline "                                 "
bitfld.long 0x00 18. " PACKET_MODE_EN               ,Packet mode enable" "Disabled,Enabled"
hexmask.long.word 0x00 8.--17. 0x01 "       REQUEST_SLAVE_ADDR           ,Slave address"
hexmask.long.byte 0x00 0.--7. 0x01 "          REQUEST_SLAVE_OFFSET         ,Slave offset"
line.long 0x04 "TXNGEN_SW_TRIGGER_1_0,TXNGEN_SW_TRIGGER_1_0"
hexmask.long.byte 0x04 0.--7. 1. " DATA_PAYLOAD                 ,Data byte (LS) sent from rail control block"
line.long 0x08 "INTERRUPT_0_MASK_0,AOVC Mask Register For Interrupt Line 0 Routed To SPE AVIC"
bitfld.long 0x08 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ mask" "Unmasked,Masked"
bitfld.long 0x08 26. "       RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x08 25. "      NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT mask" "Unmasked,Masked"
bitfld.long 0x08 20. "       REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x08 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x08 17. "       REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x08 16. "      REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x08 11. "       REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX mask" "Unmasked,Masked"
bitfld.long 0x08 10. "      REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x08 8. "       REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
bitfld.long 0x08 4. "      REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX mask" "Unmasked,Masked"
bitfld.long 0x08 2. "       REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x08 1. "      REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x08 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
rgroup.long 0x50++0x03
line.long 0x00 "INTERRUPT_0_STATUS_0,AOVC Status Register For Interrupt Line 0 Routed To SPE AVIC"
bitfld.long 0x00 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "   RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "   REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x00 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "   REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
group.long 0x54++0x07
line.long 0x00 "INTERRUPT_0_CLEAR_0,AOVC Clear Register For Interrupt Line 0 Routed To SPE AVIC"
bitfld.long 0x00 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ clear" "No effect,Clear"
bitfld.long 0x00 26. "      RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 25. "     NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT clear" "No effect,Clear"
bitfld.long 0x00 20. "      REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x00 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 17. "      REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 16. "     REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX clear" "No effect,Clear"
bitfld.long 0x00 11. "      REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX clear" "No effect,Clear"
bitfld.long 0x00 10. "     REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 8. "      REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
bitfld.long 0x00 4. "     REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX clear" "No effect,Clear"
bitfld.long 0x00 2. "      REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 1. "     REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
line.long 0x04 "INTERRUPT_1_MASK_0,AOVC Mask Register For interrupt line 1 routed to LIC"
bitfld.long 0x04 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ mask" "Unmasked,Masked"
bitfld.long 0x04 26. "       RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x04 25. "      NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT mask" "Unmasked,Masked"
bitfld.long 0x04 20. "       REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x04 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x04 17. "       REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x04 16. "      REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x04 11. "       REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX mask" "Unmasked,Masked"
bitfld.long 0x04 10. "      REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x04 8. "       REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
bitfld.long 0x04 4. "      REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX mask" "Unmasked,Masked"
bitfld.long 0x04 2. "       REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C mask" "Unmasked,Masked"
bitfld.long 0x04 1. "      REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C mask" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT mask" "Unmasked,Masked"
rgroup.long 0x5C++0x03
line.long 0x00 "INTERRUPT_1_STATUS_0,AOVC Status Register For Interrupt Line 1 Routed To LIC"
bitfld.long 0x00 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 26. "   RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 25. "  NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 20. "   REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x00 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 17. "   REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C interrupt" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x00 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT interrupt" "No interrupt,Interrupt"
group.long 0x60++0x1F
line.long 0x00 "INTERRUPT_1_CLEAR_0,AOVC Clear Register For Interrupt Line 1 Routed To SPE AVIC"
bitfld.long 0x00 31. " AOVC2CVC_SPE_REQ             ,AOVC2CVC_SPE_REQ clear" "No effect,Clear"
bitfld.long 0x00 26. "      RAW_INTR_FROM_I2C            ,RAW_INTR_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 25. "     NATIVE_APB_TIMEOUT           ,NATIVE_APB_TIMEOUT clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 24. " LOCK_TIMEOUT                 ,LOCK_TIMEOUT clear" "No effect,Clear"
bitfld.long 0x00 20. "      REQ2_INVALID_INDEX           ,REQ2_INVALID_INDEX mask" "Unmasked,Masked"
bitfld.long 0x00 19. "      REQ2_ILLEGAL_INDEX           ,REQ2_ILLEGAL_INDEX clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 18. " REQ2_NACK_FROM_I2C           ,REQ2_NACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 17. "      REQ2_ACK_FROM_I2C            ,REQ2_ACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 16. "     REQ2_STOP_RAILCTRL_INDEX_HIT ,REQ2_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 12. " REQ1_INVALID_INDEX           ,REQ1_INVALID_INDEX clear" "No effect,Clear"
bitfld.long 0x00 11. "      REQ1_ILLEGAL_INDEX           ,REQ1_ILLEGAL_INDEX clear" "No effect,Clear"
bitfld.long 0x00 10. "     REQ1_NACK_FROM_I2C           ,REQ1_NACK_FROM_I2C clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 9. " REQ1_ACK_FROM_I2C            ,REQ1_ACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 8. "      REQ1_STOP_RAILCTRL_INDEX_HIT ,REQ1_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
bitfld.long 0x00 4. "     REQ0_INVALID_INDEX           ,REQ0_INVALID_INDEX clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 3. " REQ0_ILLEGAL_INDEX           ,REQ0_ILLEGAL_INDEX clear" "No effect,Clear"
bitfld.long 0x00 2. "      REQ0_NACK_FROM_I2C           ,REQ0_NACK_FROM_I2C clear" "No effect,Clear"
bitfld.long 0x00 1. "     REQ0_ACK_FROM_I2C            ,REQ0_ACK_FROM_I2C clear" "No effect,Clear"
textline "                                 "
bitfld.long 0x00 0. " REQ0_STOP_RAILCTRL_INDEX_HIT ,REQ0_STOP_RAILCTRL_INDEX_HIT clear" "No effect,Clear"
line.long 0x04 "INTERRUPT_2_CONFIG_0,INTERRUPT_2_CONFIG_0"
bitfld.long 0x04 17. " SPE_REQ_CLEAR                ,Clear register for interrupt line 2 routed to CVC in BPMP cluster to forward the SPE voltage request to CVC" "No effect,Clear"
bitfld.long 0x04 9. "      SPE_REQ_MASK                 ,Mask register for interrupt line 2 routed to CVC in BPMP cluster to forward the SPE voltage request to CVC" "Unmasked,Masked"
rbitfld.long 0x04 1. "      SPE_REQ_STATUS               ,Status register for interrupt line 2 routed to CVC in BPMP cluster" "Not requested,Requested"
textline "                                 "
rbitfld.long 0x04 0. " PWR_I2C_STATUS               ,status register for interrupt line 2 routed to CVC in BPMP cluster to forward the PWR_I2C interrupt for APB_I2C requests to CVC" "Not requested,Requested"
line.long 0x08 "TIMEOUT_0,TIMEOUT_0"
line.long 0x0C "TIMEOUT_1,TIMEOUT_1"
line.long 0x10 "TIMEOUT_2,TIMEOUT_2"
line.long 0x14 "TIMEOUT_3,TIMEOUT_3"
line.long 0x18 "TIMEOUT_4,TIMEOUT_4"
line.long 0x1C "I2C_ARB_CTRL_0,I2C_ARB_CTRL_0"
bitfld.long 0x1C 0. " I2C_BUS_ARB                  ,BUS ARB enable" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "LUT_DATA_0,LUT_DATA_0"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x104++0x03
line.long 0x00 "LUT_DATA_1,LUT_DATA_1"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x108++0x03
line.long 0x00 "LUT_DATA_2,LUT_DATA_2"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x10C++0x03
line.long 0x00 "LUT_DATA_3,LUT_DATA_3"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x110++0x03
line.long 0x00 "LUT_DATA_4,LUT_DATA_4"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x114++0x03
line.long 0x00 "LUT_DATA_5,LUT_DATA_5"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x118++0x03
line.long 0x00 "LUT_DATA_6,LUT_DATA_6"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x11C++0x03
line.long 0x00 "LUT_DATA_7,LUT_DATA_7"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x120++0x03
line.long 0x00 "LUT_DATA_8,LUT_DATA_8"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x124++0x03
line.long 0x00 "LUT_DATA_9,LUT_DATA_9"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x128++0x03
line.long 0x00 "LUT_DATA_10,LUT_DATA_10"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x12C++0x03
line.long 0x00 "LUT_DATA_11,LUT_DATA_11"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x130++0x03
line.long 0x00 "LUT_DATA_12,LUT_DATA_12"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x134++0x03
line.long 0x00 "LUT_DATA_13,LUT_DATA_13"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x138++0x03
line.long 0x00 "LUT_DATA_14,LUT_DATA_14"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x13C++0x03
line.long 0x00 "LUT_DATA_15,LUT_DATA_15"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x140++0x03
line.long 0x00 "LUT_DATA_16,LUT_DATA_16"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x144++0x03
line.long 0x00 "LUT_DATA_17,LUT_DATA_17"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x148++0x03
line.long 0x00 "LUT_DATA_18,LUT_DATA_18"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x14C++0x03
line.long 0x00 "LUT_DATA_19,LUT_DATA_19"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x150++0x03
line.long 0x00 "LUT_DATA_20,LUT_DATA_20"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x154++0x03
line.long 0x00 "LUT_DATA_21,LUT_DATA_21"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x158++0x03
line.long 0x00 "LUT_DATA_22,LUT_DATA_22"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x15C++0x03
line.long 0x00 "LUT_DATA_23,LUT_DATA_23"
bitfld.long 0x00 10. " DATA[10]                     ,Index enable for requestor 3" "Disabled,Enabled"
bitfld.long 0x00 9. "       DATA[9]                      ,Index enable for requestor 2" "Disabled,Enabled"
bitfld.long 0x00 8. "      DATA[8]                      ,Index enable for requestor 1" "Disabled,Enabled"
textline "                                 "
hexmask.long.byte 0x00 0.--7. 1. " DATA[7:0]                    ,VID DATA"
group.long 0x160++0x1B
line.long 0x00 "I2C_CNFG_0,I2C_CNFG_0"
bitfld.long 0x00 24.--26. " PKT_MODE_MASTER_CODE         ,Slave address packet mode high-speed master code" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23. "              PKT_MODE_CONTINUE_XFER       ,Slave address packet mode attribute" "0,1"
bitfld.long 0x00 22. "             PKT_MODE_IE                  ,Slave address packet mode Interrupt Enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x00 21. " PKT_MODE_REPEAT_START_STOP   ,Slave address packet mode attribute" "0,1"
bitfld.long 0x00 20. "              PKT_MODE_HS                  ,Slave address packet mode high speed mode" "Disabled,Enabled"
bitfld.long 0x00 19. "      ADDR_MODE                    ,Addressing mode for the slave device connected to PWR-I2C" "7bit,10bit"
textline "                                 "
bitfld.long 0x00 18. " PACKET_MODE_EN               ,Packet mode enable" "Disabled,Enabled"
hexmask.long.word 0x00 8.--17. 0x01 "       REQUEST_SLAVE_ADDR           ,Request slave address"
hexmask.long.byte 0x00 0.--7. 0x01 "          REQUEST_SLAVE_OFFSET         ,Slave offset"
line.long 0x04 "I2C_CNFG_1,I2C_CNFG_1"
bitfld.long 0x04 24.--26. " PKT_MODE_MASTER_CODE         ,Slave address packet mode high-speed master code" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 23. "              PKT_MODE_CONTINUE_XFER       ,Slave address packet mode attribute" "0,1"
bitfld.long 0x04 22. "             PKT_MODE_IE                  ,Slave address packet mode Interrupt Enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x04 21. " PKT_MODE_REPEAT_START_STOP   ,Slave address packet mode attribute" "0,1"
bitfld.long 0x04 20. "              PKT_MODE_HS                  ,Slave address packet mode high speed mode" "Disabled,Enabled"
bitfld.long 0x04 19. "      ADDR_MODE                    ,Addressing mode for the slave device connected to PWR-I2C" "7bit,10bit"
textline "                                 "
bitfld.long 0x04 18. " PACKET_MODE_EN               ,Packet mode enable" "Disabled,Enabled"
hexmask.long.word 0x04 8.--17. 0x01 "       REQUEST_SLAVE_ADDR           ,Request slave address"
hexmask.long.byte 0x04 0.--7. 0x01 "          REQUEST_SLAVE_OFFSET         ,Slave offset"
line.long 0x08 "I2C_CNFG_2,I2C_CNFG_2"
bitfld.long 0x08 24.--26. " PKT_MODE_MASTER_CODE         ,Slave address packet mode high-speed master code" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 23. "              PKT_MODE_CONTINUE_XFER       ,Slave address packet mode attribute" "0,1"
bitfld.long 0x08 22. "             PKT_MODE_IE                  ,Slave address packet mode Interrupt Enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x08 21. " PKT_MODE_REPEAT_START_STOP   ,Slave address packet mode attribute" "0,1"
bitfld.long 0x08 20. "              PKT_MODE_HS                  ,Slave address packet mode high speed mode" "Disabled,Enabled"
bitfld.long 0x08 19. "      ADDR_MODE                    ,Addressing mode for the slave device connected to PWR-I2C" "7bit,10bit"
textline "                                 "
bitfld.long 0x08 18. " PACKET_MODE_EN               ,Packet mode enable" "Disabled,Enabled"
hexmask.long.word 0x08 8.--17. 0x01 "       REQUEST_SLAVE_ADDR           ,Request slave address"
hexmask.long.byte 0x08 0.--7. 0x01 "          REQUEST_SLAVE_OFFSET         ,Slave offset"
line.long 0x0C "SW_CTRL_0,SW_CTRL_0"
bitfld.long 0x0C 0. " UPDATE_LUT_EN                ,Updating LUT enable" "Disabled,Enabled"
line.long 0x10 "DBG_0,DBG_0"
bitfld.long 0x10 24. " DBG_FORCE_ACK                ,Force AOVC to return ACK to AOPM when AOVC hangs" "Not forced,Forced"
rbitfld.long 0x10 16.--19. "     TXNGEN_I2CCTRL_STATE         ,I2C control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x10 11.--13. "            TXNGEN_C_STATE               ,TXNGEN state" "0,1,2,3,4,5,6,7"
textline "                                 "
rbitfld.long 0x10 8.--10. " LAB_C_STATE                  ,LAB state" "0,1,2,3,4,5,6,7"
rbitfld.long 0x10 6.--7. "              I2CARB_C_STATE               ,I2C arbiter state" "0,1,2,3"
rbitfld.long 0x10 2.--5. "             RC_FSM_C_STATE               ,Rail control FSM status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                 "
rbitfld.long 0x10 0.--1. " CTRL_C_STATE                 ,TOP control FSM status" "0,1,2,3"
line.long 0x14 "CYA_0,CYA_0"
line.long 0x18 "CYA_1,CYA_1"
tree.end
width 27.
tree "AONCLUSTER Registers"
base ad:0x0C000000
rgroup.long 0x00++0x1F
line.long 0x00 "EVP_RESET_VEC_0,EVP_RESET_VEC_0"
line.long 0x04 "EVP_UNDEF_VEC_0,EVP_UNDEF_VEC_0"
line.long 0x08 "EVP_SWI_VEC_0,EVP_SWI_VEC_0"
line.long 0x0C "EVP_PREFETCH_ABORT_VEC_0,EVP_PREFETCH_ABORT_VEC_0"
line.long 0x10 "EVP_DATA_ABORT_VEC_0,EVP_DATA_ABORT_VEC_0"
line.long 0x14 "EVP_RSVD_VEC_0,EVP_RSVD_VEC_0"
line.long 0x18 "EVP_IRQ_VEC_0,EVP_IRQ_VEC_0"
line.long 0x1C "EVP_FIQ_VEC_0,EVP_FIQ_VEC_0"
group.long 0x20++0x1F
line.long 0x00 "EVP_RESET_ADDR_0,EVP_RESET_ADDR_0"
line.long 0x04 "EVP_UNDEF_ADDR_0,EVP_UNDEF_ADDR_0"
line.long 0x08 "EVP_SWI_ADDR_0,EVP_SWI_ADDR_0"
line.long 0x0C "EVP_PREFETCH_ABORT_ADDR_0,EVP_PREFETCH_ABORT_ADDR_0"
line.long 0x10 "EVP_DATA_ABORT_ADDR_0,EVP_DATA_ABORT_ADDR_0"
line.long 0x14 "EVP_RSVD_ADDR_0,EVP_RSVD_ADDR_0"
line.long 0x18 "EVP_IRQ_ADDR_0,EVP_IRQ_ADDR_0"
line.long 0x1C "EVP_FIQ_ADDR_0,EVP_FIQ_ADDR_0"
tree.end
width 34.
tree "GPCDMA AO Common Registers"
base ad:0x0C060000
rgroup.long 0x00++0x0B
line.long 0x00 "DMA_CHAN_STA_0,DMA_CHAN_STA_0"
bitfld.long 0x00 7. " CH7                   ,Channel 7" "0,1"
bitfld.long 0x00 6. "             CH6               ,Channel 6" "0,1"
bitfld.long 0x00 5. "             CH5              ,Channel 5" "0,1"
textline "                                           "
bitfld.long 0x00 4. " CH4                   ,Channel 4" "0,1"
bitfld.long 0x00 3. "             CH3               ,Channel 3" "0,1"
bitfld.long 0x00 2. "             CH2              ,Channel 2" "0,1"
textline "                                           "
bitfld.long 0x00 1. " CH1                   ,Channel 1" "0,1"
bitfld.long 0x00 0. "             CH0               ,Channel 0" "0,1"
line.long 0x04 "REQUESTORS_TX_0,REQUESTORS_TX_0"
bitfld.long 0x04 5. " UART2                 ,UART2" "0,1"
bitfld.long 0x04 4. "             UART1             ,UART1" "0,1"
bitfld.long 0x04 3. "             SPI              ,SPI" "0,1"
textline "                                           "
bitfld.long 0x04 2. " I2C3                  ,I2C3" "0,1"
bitfld.long 0x04 1. "             I2C2              ,I2C2" "0,1"
bitfld.long 0x04 0. "             I2C1             ,I2C1" "0,1"
line.long 0x08 "REQUESTORS_RX_0,REQUESTORS_RX_0"
bitfld.long 0x08 7. " GTE                   ,GTE" "0,1"
bitfld.long 0x08 6. "             DMIC              ,DMIC" "0,1"
bitfld.long 0x08 5. "             UART2            ,UART2" "0,1"
textline "                                           "
bitfld.long 0x08 4. " UART1                 ,UART1" "0,1"
bitfld.long 0x08 3. "             SPI               ,SPI" "0,1"
bitfld.long 0x08 2. "             I2C3             ,I2C3" "0,1"
textline "                                           "
bitfld.long 0x08 1. " I2C2                  ,I2C2" "0,1"
bitfld.long 0x08 0. "             I2C1              ,I2C1" "0,1"
group.long 0x0C++0x03
line.long 0x00 "COMMON_ERROR_STA_0,COMMON_ERROR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31]      ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "      [30]              ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "      [29]             ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "  [28]             ,Error status 28" "No error,Error"
textline "                                           "
bitfld.long 0x00 27. "             [27]      ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "      [26]              ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "      [25]             ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "  [24]             ,Error status 24" "No error,Error"
textline "                                           "
bitfld.long 0x00 23. "             [23]      ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "      [22]              ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "      [21]             ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "  [20]             ,Error status 20" "No error,Error"
textline "                                           "
bitfld.long 0x00 19. "             [19]      ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "      [18]              ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "      [17]             ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "  [16]             ,Error status 16" "No error,Error"
textline "                                           "
bitfld.long 0x00 15. "             [15]      ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "      [14]              ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "      [13]             ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "  [12]             ,Error status 12" "No error,Error"
textline "                                           "
bitfld.long 0x00 11. "             [11]      ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "      [10]              ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "      [9]              ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "  [8]              ,Error status 8" "No error,Error"
textline "                                           "
bitfld.long 0x00 7. "             [7]       ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "      [6]               ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "      [5]              ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "  [4]              ,Error status 4" "No error,Error"
textline "                                           "
bitfld.long 0x00 3. "             [3]       ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "      [2]               ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "      [1]              ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "  [0]              ,Error status 0" "No error,Error"
rgroup.long 0x10++0x13
line.long 0x00 "CHANNEL_ERROR_STA_0,CHANNEL_ERROR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31]      ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "      [30]              ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "      [29]             ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "  [28]             ,Error status 28" "No error,Error"
textline "                                           "
bitfld.long 0x00 27. "             [27]      ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "      [26]              ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "      [25]             ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "  [24]             ,Error status 24" "No error,Error"
textline "                                           "
bitfld.long 0x00 23. "             [23]      ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "      [22]              ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "      [21]             ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "  [20]             ,Error status 20" "No error,Error"
textline "                                           "
bitfld.long 0x00 19. "             [19]      ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "      [18]              ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "      [17]             ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "  [16]             ,Error status 16" "No error,Error"
textline "                                           "
bitfld.long 0x00 15. "             [15]      ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "      [14]              ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "      [13]             ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "  [12]             ,Error status 12" "No error,Error"
textline "                                           "
bitfld.long 0x00 11. "             [11]      ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "      [10]              ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "      [9]              ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "  [8]              ,Error status 8" "No error,Error"
textline "                                           "
bitfld.long 0x00 7. "             [7]       ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "      [6]               ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "      [5]              ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "  [4]              ,Error status 4" "No error,Error"
textline "                                           "
bitfld.long 0x00 3. "             [3]       ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "      [2]               ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "      [1]              ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "  [0]              ,Error status 0" "No error,Error"
line.long 0x04 "COMMON_TRIG_REG_0,COMMON_TRIG_REG_0"
bitfld.long 0x04 3. " SMP_26                ,SMP_26" "No error,Error"
bitfld.long 0x04 2. "      SMP_25            ,SMP_25" "No error,Error"
bitfld.long 0x04 1. "      SMP_24           ,SMP_24" "No error,Error"
line.long 0x08 "CHANNEL_TRIG_REG_0,CHANNEL_TRIG_REG_0"
bitfld.long 0x08 7. " CH7                   ,Channel 7" "0,1"
bitfld.long 0x08 6. "             CH6               ,Channel 6" "0,1"
bitfld.long 0x08 5. "             CH5              ,Channel 5" "0,1"
bitfld.long 0x08 4. "         CH4              ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x08 3. " CH3                   ,Channel 3" "0,1"
bitfld.long 0x08 2. "             CH2               ,Channel 2" "0,1"
bitfld.long 0x08 1. "             CH1              ,Channel 1" "0,1"
bitfld.long 0x08 0. "         CH0              ,Channel 0" "0,1"
line.long 0x0C "MASKED_INTR_REG_0,MASKED_INTR_REG_0"
bitfld.long 0x0C 7. " CH7                   ,Channel 7" "0,1"
bitfld.long 0x0C 6. "             CH6               ,Channel 6" "0,1"
bitfld.long 0x0C 5. "             CH5              ,Channel 5" "0,1"
bitfld.long 0x0C 4. "         CH4              ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x0C 3. " CH3                   ,Channel 3" "0,1"
bitfld.long 0x0C 2. "             CH2               ,Channel 2" "0,1"
bitfld.long 0x0C 1. "             CH1              ,Channel 1" "0,1"
bitfld.long 0x0C 0. "         CH0              ,Channel 0" "0,1"
line.long 0x10 "CHANNEL_INTR_STA_0,CHANNEL_INTR_STA_0"
bitfld.long 0x10 7. " CH7                   ,Channel 7" "0,1"
bitfld.long 0x10 6. "             CH6               ,Channel 6" "0,1"
bitfld.long 0x10 5. "             CH5              ,Channel 5" "0,1"
bitfld.long 0x10 4. "         CH4              ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x10 3. " CH3                   ,Channel 3" "0,1"
bitfld.long 0x10 2. "             CH2               ,Channel 2" "0,1"
bitfld.long 0x10 1. "             CH1              ,Channel 1" "0,1"
bitfld.long 0x10 0. "         CH0              ,Channel 0" "0,1"
group.long 0x24++0x03
line.long 0x00 "COMMON_INTR_0,COMMON_INTR_0"
rbitfld.long 0x00 4. " RAW_INTR_STATUS       ,Raw interrupt status" "No interrupt,Interrupt"
rbitfld.long 0x00 3. "  IRQ_INTR_STATUS   ,IQR interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  IS_EOC           ,IS_EOC" "0,1"
bitfld.long 0x00 1. "         INTR_MASK        ,Interrupt mask" "Not masked,Masked"
textline "                                           "
bitfld.long 0x00 0. " IE_EOC                ,IE_EOC" "0,1"
group.long 0x80++0x03
line.long 0x00 "CH0_PERI_ID_MASK_0,CH0_PERI_ID_MASK_0"
group.long 0x84++0x03
line.long 0x00 "CH1_PERI_ID_MASK_0,CH1_PERI_ID_MASK_0"
group.long 0x88++0x03
line.long 0x00 "CH2_PERI_ID_MASK_0,CH2_PERI_ID_MASK_0"
group.long 0x8C++0x03
line.long 0x00 "CH3_PERI_ID_MASK_0,CH3_PERI_ID_MASK_0"
group.long 0x90++0x03
line.long 0x00 "CH4_PERI_ID_MASK_0,CH4_PERI_ID_MASK_0"
group.long 0x94++0x03
line.long 0x00 "CH5_PERI_ID_MASK_0,CH5_PERI_ID_MASK_0"
group.long 0x98++0x03
line.long 0x00 "CH6_PERI_ID_MASK_0,CH6_PERI_ID_MASK_0"
group.long 0x9C++0x03
line.long 0x00 "CH7_PERI_ID_MASK_0,CH7_PERI_ID_MASK_0"
group.long 0x100++0x03
line.long 0x00 "PER0_PERI_ADDR_0,PER0_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER0_PERI_START_ADDR ,PER0_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER0_PERI_OFFSET ,PER0_PERI_OFFSET"
group.long 0x104++0x03
line.long 0x00 "PER1_PERI_ADDR_0,PER1_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER1_PERI_START_ADDR ,PER1_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER1_PERI_OFFSET ,PER1_PERI_OFFSET"
group.long 0x108++0x03
line.long 0x00 "PER2_PERI_ADDR_0,PER2_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER2_PERI_START_ADDR ,PER2_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER2_PERI_OFFSET ,PER2_PERI_OFFSET"
group.long 0x10C++0x03
line.long 0x00 "PER3_PERI_ADDR_0,PER3_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER3_PERI_START_ADDR ,PER3_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER3_PERI_OFFSET ,PER3_PERI_OFFSET"
group.long 0x110++0x03
line.long 0x00 "PER4_PERI_ADDR_0,PER4_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER4_PERI_START_ADDR ,PER4_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER4_PERI_OFFSET ,PER4_PERI_OFFSET"
group.long 0x114++0x03
line.long 0x00 "PER5_PERI_ADDR_0,PER5_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER5_PERI_START_ADDR ,PER5_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER5_PERI_OFFSET ,PER5_PERI_OFFSET"
group.long 0x118++0x03
line.long 0x00 "PER6_PERI_ADDR_0,PER6_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER6_PERI_START_ADDR ,PER6_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER6_PERI_OFFSET ,PER6_PERI_OFFSET"
group.long 0x11C++0x03
line.long 0x00 "PER7_PERI_ADDR_0,PER7_PERI_ADDR_0"
hexmask.long.word 0x00 16.--31. 0x01 " PER7_PERI_START_ADDR ,PER7_PERI_START_ADDR"
hexmask.long.word 0x00 0.--15. 0x01 "          PER7_PERI_OFFSET ,PER7_PERI_OFFSET"
group.long 0x180++0x03
line.long 0x00 "CH0_STREAM_ID0_MASK_0,CH0_STREAM_ID0_MASK_0"
group.long 0x184++0x03
line.long 0x00 "CH1_STREAM_ID0_MASK_0,CH1_STREAM_ID0_MASK_0"
group.long 0x188++0x03
line.long 0x00 "CH2_STREAM_ID0_MASK_0,CH2_STREAM_ID0_MASK_0"
group.long 0x18C++0x03
line.long 0x00 "CH3_STREAM_ID0_MASK_0,CH3_STREAM_ID0_MASK_0"
group.long 0x190++0x03
line.long 0x00 "CH4_STREAM_ID0_MASK_0,CH4_STREAM_ID0_MASK_0"
group.long 0x194++0x03
line.long 0x00 "CH5_STREAM_ID0_MASK_0,CH5_STREAM_ID0_MASK_0"
group.long 0x198++0x03
line.long 0x00 "CH6_STREAM_ID0_MASK_0,CH6_STREAM_ID0_MASK_0"
group.long 0x19C++0x03
line.long 0x00 "CH7_STREAM_ID0_MASK_0,CH7_STREAM_ID0_MASK_0"
group.long 0x200++0x03
line.long 0x00 "CH0_STREAM_ID1_MASK_0,CH0_STREAM_ID1_MASK_0"
group.long 0x204++0x03
line.long 0x00 "CH1_STREAM_ID1_MASK_0,CH1_STREAM_ID1_MASK_0"
group.long 0x208++0x03
line.long 0x00 "CH2_STREAM_ID1_MASK_0,CH2_STREAM_ID1_MASK_0"
group.long 0x20C++0x03
line.long 0x00 "CH3_STREAM_ID1_MASK_0,CH3_STREAM_ID1_MASK_0"
group.long 0x210++0x03
line.long 0x00 "CH4_STREAM_ID1_MASK_0,CH4_STREAM_ID1_MASK_0"
group.long 0x214++0x03
line.long 0x00 "CH5_STREAM_ID1_MASK_0,CH5_STREAM_ID1_MASK_0"
group.long 0x218++0x03
line.long 0x00 "CH6_STREAM_ID1_MASK_0,CH6_STREAM_ID1_MASK_0"
group.long 0x21C++0x03
line.long 0x00 "CH7_STREAM_ID1_MASK_0,CH7_STREAM_ID1_MASK_0"
group.long 0x280++0x03
line.long 0x00 "CH0_STREAM_ID2_MASK_0,CH0_STREAM_ID2_MASK_0"
group.long 0x284++0x03
line.long 0x00 "CH1_STREAM_ID2_MASK_0,CH1_STREAM_ID2_MASK_0"
group.long 0x288++0x03
line.long 0x00 "CH2_STREAM_ID2_MASK_0,CH2_STREAM_ID2_MASK_0"
group.long 0x28C++0x03
line.long 0x00 "CH3_STREAM_ID2_MASK_0,CH3_STREAM_ID2_MASK_0"
group.long 0x290++0x03
line.long 0x00 "CH4_STREAM_ID2_MASK_0,CH4_STREAM_ID2_MASK_0"
group.long 0x294++0x03
line.long 0x00 "CH5_STREAM_ID2_MASK_0,CH5_STREAM_ID2_MASK_0"
group.long 0x298++0x03
line.long 0x00 "CH6_STREAM_ID2_MASK_0,CH6_STREAM_ID2_MASK_0"
group.long 0x29C++0x03
line.long 0x00 "CH7_STREAM_ID2_MASK_0,CH7_STREAM_ID2_MASK_0"
group.long 0x300++0x03
line.long 0x00 "CH0_STREAM_ID3_MASK_0,CH0_STREAM_ID3_MASK_0"
group.long 0x304++0x03
line.long 0x00 "CH1_STREAM_ID3_MASK_0,CH1_STREAM_ID3_MASK_0"
group.long 0x308++0x03
line.long 0x00 "CH2_STREAM_ID3_MASK_0,CH2_STREAM_ID3_MASK_0"
group.long 0x30C++0x03
line.long 0x00 "CH3_STREAM_ID3_MASK_0,CH3_STREAM_ID3_MASK_0"
group.long 0x310++0x03
line.long 0x00 "CH4_STREAM_ID3_MASK_0,CH4_STREAM_ID3_MASK_0"
group.long 0x314++0x03
line.long 0x00 "CH5_STREAM_ID3_MASK_0,CH5_STREAM_ID3_MASK_0"
group.long 0x318++0x03
line.long 0x00 "CH6_STREAM_ID3_MASK_0,CH6_STREAM_ID3_MASK_0"
group.long 0x31C++0x03
line.long 0x00 "CH7_STREAM_ID3_MASK_0,CH7_STREAM_ID3_MASK_0"
group.long 0x380++0x07
line.long 0x00 "DMA_CHAN_VIRTUALIZATION_ENABLE_0,DMA_CHAN_VIRTUALIZATION_ENABLE_0"
bitfld.long 0x00 7. " CH7                   ,Channel 7" "0,1"
bitfld.long 0x00 6. "             CH6               ,Channel 6" "0,1"
bitfld.long 0x00 5. "             CH5              ,Channel 5" "0,1"
bitfld.long 0x00 4. "         CH4              ,Channel 4" "0,1"
textline "                                           "
bitfld.long 0x00 3. " CH3                   ,Channel 3" "0,1"
bitfld.long 0x00 2. "             CH2               ,Channel 2" "0,1"
bitfld.long 0x00 1. "             CH1              ,Channel 1" "0,1"
bitfld.long 0x00 0. "         CH0              ,Channel 0" "0,1"
line.long 0x04 "DMA_ICG_EN_OVERRIDE_0,DMA_ICG_EN_OVERRIDE_0"
bitfld.long 0x04 0. " DMA_ICG_EN_OVERRIDE   ,DMA ICG enable override" "No override,Override"
rgroup.long 0x388++0x03
line.long 0x00 "DMA_ACTIVE_0,DMA_ACTIVE_0"
bitfld.long 0x00 3. " DMA_IO_ACTIVE         ,Channel 3" "0,1"
bitfld.long 0x00 2. "             DMA_MC_ACTIVE     ,Channel 2" "0,1"
bitfld.long 0x00 1. "             DMA_IO_MC_ACTIVE ,Channel 1" "0,1"
bitfld.long 0x00 0. "         DMA_ACTIVE       ,Channel 0" "0,1"
group.long 0x38C++0x03
line.long 0x00 "COMMON_SPARE_0,COMMON_SPARE_0"
hexmask.long.word 0x00 16.--31. 1. " SPARE_HI              ,SPARE_HI"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_LO          ,SPARE_LO"
tree.end
width 14.
tree "GPCDMA AO SCR Registers"
group.long 0xF00++0x03
line.long 0x00 "SCR_CH0_0,SCR_CH0_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF04++0x03
line.long 0x00 "SCR_CH1_0,SCR_CH1_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF08++0x03
line.long 0x00 "SCR_CH2_0,SCR_CH2_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF0C++0x03
line.long 0x00 "SCR_CH3_0,SCR_CH3_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF10++0x03
line.long 0x00 "SCR_CH4_0,SCR_CH4_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF14++0x03
line.long 0x00 "SCR_CH5_0,SCR_CH5_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF18++0x03
line.long 0x00 "SCR_CH6_0,SCR_CH6_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF1C++0x03
line.long 0x00 "SCR_CH7_0,SCR_CH7_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
group.long 0xF80++0x0B
line.long 0x00 "SCR_TZ_0,SCR_TZ_0"
bitfld.long 0x00 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x00 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x00 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x00 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x00 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x00 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x00 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x00 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x00 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x00 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x00 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x00 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x00 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x00 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x00 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x00 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x00 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x00 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x00 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " G0R       ,Group 0 read" "Disabled,Enabled"
line.long 0x04 "SCR_DMA_RO_0,SCR_DMA_RO_0"
bitfld.long 0x04 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x04 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x04 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x04 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x04 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x04 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x04 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x04 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x04 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x04 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x04 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x04 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x04 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x04 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x04 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x04 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x04 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x04 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x04 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x04 0. " G0R       ,Group 0 read" "Disabled,Enabled"
line.long 0x08 "SCR_HYPER_0,SCR_HYPER_0"
bitfld.long 0x08 29. " SEC_LCK   ,SEC_LCK" "Unlocked,Locked"
bitfld.long 0x08 28. "        SEC_WEN ,SEC write enable" "Disabled,Enabled"
bitfld.long 0x08 27. "  SEC_REN ,SEC read enable" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 24.--26. " SEC_OWNER ,SEC owner" "Group 0 agents,Group 1 agents,Group 2 agents,Group 3 agents,Group 4 agents,Group 5 agents,Group 6 agents,Group 7 agents"
bitfld.long 0x08 23. "  PR7     ,Privileged mode 7" "Disabled,Enabled"
bitfld.long 0x08 22. "  PR6     ,PR6" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 21. " PR5       ,PR5" "Disabled,Enabled"
bitfld.long 0x08 20. "        PR4     ,PR4" "Disabled,Enabled"
bitfld.long 0x08 19. "  PR3     ,PR3" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 18. " PR2       ,PR2" "Disabled,Enabled"
bitfld.long 0x08 17. "        PR1     ,PR1" "Disabled,Enabled"
bitfld.long 0x08 16. "  PR0     ,PR0" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 15. " G7W       ,Group 7 write" "Disabled,Enabled"
bitfld.long 0x08 14. "        G6W     ,Group 6 write" "Disabled,Enabled"
bitfld.long 0x08 13. "  G5W     ,Group 5 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 12. " G4W       ,Group 4 write" "Disabled,Enabled"
bitfld.long 0x08 11. "        G3W     ,Group 3 write" "Disabled,Enabled"
bitfld.long 0x08 10. "  G2W     ,Group 2 write" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 9. " G1W       ,Group 1 write" "Disabled,Enabled"
bitfld.long 0x08 8. "        G0W     ,Group 0 write" "Disabled,Enabled"
bitfld.long 0x08 7. "  G7R     ,Group 7 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 6. " G6R       ,Group 6 read" "Disabled,Enabled"
bitfld.long 0x08 5. "        G5R     ,Group 5 read" "Disabled,Enabled"
bitfld.long 0x08 4. "  G4R     ,Group 4 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 3. " G3R       ,Group 3 read" "Disabled,Enabled"
bitfld.long 0x08 2. "        G2R     ,Group 2 read" "Disabled,Enabled"
bitfld.long 0x08 1. "  G1R     ,Group 1 read" "Disabled,Enabled"
textline "                       "
bitfld.long 0x08 0. " G0R       ,Group 0 read" "Disabled,Enabled"
tree.end
width 21.
tree "GPCDMA AO Channel Registers"
group.long 0x10000++0x23
line.long 0x00 "CH0_CSR_0,CH0_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH0_STA_0,CH0_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH0_CSRE_0,CH0_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH0_SRC_PTR_0,CH0_SRC_PTR_0"
line.long 0x10 "CH0_DST_PTR_0,CH0_DST_PTR_0"
line.long 0x14 "CH0_HI_ADR_PTR_0,CH0_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH0_MC_SEQ_0,CH0_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH0_MMIO_SEQ_0,CH0_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH0_BCOUNT_0,CH0_BCOUNT_0"
rgroup.long (0x10000+0x24)++0x07
line.long 0x00 "CH0_DMA_BYTE_TRA_0,CH0_DMA_BYTE_TRA_0"
line.long 0x04 "CH0_DMA_BYTE_STA_0,CH0_DMA_BYTE_STA_0"
group.long (0x10000+0x30)++0x0F
line.long 0x00 "CH0_ERR_STA_0,CH0_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH0_FIXED_PAT_0,CH0_FIXED_PAT_0"
line.long 0x08 "CH0_TZ_0,CH0_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH0_SPARE_0,CH0_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x20000++0x23
line.long 0x00 "CH1_CSR_0,CH1_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH1_STA_0,CH1_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH1_CSRE_0,CH1_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH1_SRC_PTR_0,CH1_SRC_PTR_0"
line.long 0x10 "CH1_DST_PTR_0,CH1_DST_PTR_0"
line.long 0x14 "CH1_HI_ADR_PTR_0,CH1_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH1_MC_SEQ_0,CH1_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH1_MMIO_SEQ_0,CH1_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH1_BCOUNT_0,CH1_BCOUNT_0"
rgroup.long (0x20000+0x24)++0x07
line.long 0x00 "CH1_DMA_BYTE_TRA_0,CH1_DMA_BYTE_TRA_0"
line.long 0x04 "CH1_DMA_BYTE_STA_0,CH1_DMA_BYTE_STA_0"
group.long (0x20000+0x30)++0x0F
line.long 0x00 "CH1_ERR_STA_0,CH1_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH1_FIXED_PAT_0,CH1_FIXED_PAT_0"
line.long 0x08 "CH1_TZ_0,CH1_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH1_SPARE_0,CH1_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x30000++0x23
line.long 0x00 "CH2_CSR_0,CH2_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH2_STA_0,CH2_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH2_CSRE_0,CH2_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH2_SRC_PTR_0,CH2_SRC_PTR_0"
line.long 0x10 "CH2_DST_PTR_0,CH2_DST_PTR_0"
line.long 0x14 "CH2_HI_ADR_PTR_0,CH2_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH2_MC_SEQ_0,CH2_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH2_MMIO_SEQ_0,CH2_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH2_BCOUNT_0,CH2_BCOUNT_0"
rgroup.long (0x30000+0x24)++0x07
line.long 0x00 "CH2_DMA_BYTE_TRA_0,CH2_DMA_BYTE_TRA_0"
line.long 0x04 "CH2_DMA_BYTE_STA_0,CH2_DMA_BYTE_STA_0"
group.long (0x30000+0x30)++0x0F
line.long 0x00 "CH2_ERR_STA_0,CH2_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH2_FIXED_PAT_0,CH2_FIXED_PAT_0"
line.long 0x08 "CH2_TZ_0,CH2_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH2_SPARE_0,CH2_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x40000++0x23
line.long 0x00 "CH3_CSR_0,CH3_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH3_STA_0,CH3_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH3_CSRE_0,CH3_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH3_SRC_PTR_0,CH3_SRC_PTR_0"
line.long 0x10 "CH3_DST_PTR_0,CH3_DST_PTR_0"
line.long 0x14 "CH3_HI_ADR_PTR_0,CH3_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH3_MC_SEQ_0,CH3_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH3_MMIO_SEQ_0,CH3_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH3_BCOUNT_0,CH3_BCOUNT_0"
rgroup.long (0x40000+0x24)++0x07
line.long 0x00 "CH3_DMA_BYTE_TRA_0,CH3_DMA_BYTE_TRA_0"
line.long 0x04 "CH3_DMA_BYTE_STA_0,CH3_DMA_BYTE_STA_0"
group.long (0x40000+0x30)++0x0F
line.long 0x00 "CH3_ERR_STA_0,CH3_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH3_FIXED_PAT_0,CH3_FIXED_PAT_0"
line.long 0x08 "CH3_TZ_0,CH3_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH3_SPARE_0,CH3_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x50000++0x23
line.long 0x00 "CH4_CSR_0,CH4_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH4_STA_0,CH4_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH4_CSRE_0,CH4_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH4_SRC_PTR_0,CH4_SRC_PTR_0"
line.long 0x10 "CH4_DST_PTR_0,CH4_DST_PTR_0"
line.long 0x14 "CH4_HI_ADR_PTR_0,CH4_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH4_MC_SEQ_0,CH4_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH4_MMIO_SEQ_0,CH4_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH4_BCOUNT_0,CH4_BCOUNT_0"
rgroup.long (0x50000+0x24)++0x07
line.long 0x00 "CH4_DMA_BYTE_TRA_0,CH4_DMA_BYTE_TRA_0"
line.long 0x04 "CH4_DMA_BYTE_STA_0,CH4_DMA_BYTE_STA_0"
group.long (0x50000+0x30)++0x0F
line.long 0x00 "CH4_ERR_STA_0,CH4_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH4_FIXED_PAT_0,CH4_FIXED_PAT_0"
line.long 0x08 "CH4_TZ_0,CH4_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH4_SPARE_0,CH4_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x60000++0x23
line.long 0x00 "CH5_CSR_0,CH5_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH5_STA_0,CH5_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH5_CSRE_0,CH5_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH5_SRC_PTR_0,CH5_SRC_PTR_0"
line.long 0x10 "CH5_DST_PTR_0,CH5_DST_PTR_0"
line.long 0x14 "CH5_HI_ADR_PTR_0,CH5_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH5_MC_SEQ_0,CH5_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH5_MMIO_SEQ_0,CH5_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH5_BCOUNT_0,CH5_BCOUNT_0"
rgroup.long (0x60000+0x24)++0x07
line.long 0x00 "CH5_DMA_BYTE_TRA_0,CH5_DMA_BYTE_TRA_0"
line.long 0x04 "CH5_DMA_BYTE_STA_0,CH5_DMA_BYTE_STA_0"
group.long (0x60000+0x30)++0x0F
line.long 0x00 "CH5_ERR_STA_0,CH5_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH5_FIXED_PAT_0,CH5_FIXED_PAT_0"
line.long 0x08 "CH5_TZ_0,CH5_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH5_SPARE_0,CH5_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x70000++0x23
line.long 0x00 "CH6_CSR_0,CH6_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH6_STA_0,CH6_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH6_CSRE_0,CH6_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH6_SRC_PTR_0,CH6_SRC_PTR_0"
line.long 0x10 "CH6_DST_PTR_0,CH6_DST_PTR_0"
line.long 0x14 "CH6_HI_ADR_PTR_0,CH6_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH6_MC_SEQ_0,CH6_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH6_MMIO_SEQ_0,CH6_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH6_BCOUNT_0,CH6_BCOUNT_0"
rgroup.long (0x70000+0x24)++0x07
line.long 0x00 "CH6_DMA_BYTE_TRA_0,CH6_DMA_BYTE_TRA_0"
line.long 0x04 "CH6_DMA_BYTE_STA_0,CH6_DMA_BYTE_STA_0"
group.long (0x70000+0x30)++0x0F
line.long 0x00 "CH6_ERR_STA_0,CH6_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH6_FIXED_PAT_0,CH6_FIXED_PAT_0"
line.long 0x08 "CH6_TZ_0,CH6_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH6_SPARE_0,CH6_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
group.long 0x80000++0x23
line.long 0x00 "CH7_CSR_0,CH7_CSR_0"
bitfld.long 0x00 31. " ENB              ,ENB" "Disabled,Enabled"
bitfld.long 0x00 30. "       IE_EOC                ,IE_EOC" "Disabled,Enabled"
bitfld.long 0x00 27. "       ONCE             ,ONCE" "Cycling mode,Single block"
textline "                              "
bitfld.long 0x00 24.--25. " FC_MODE          ,FC_MODE" "No MMIO,One MMIO,Two MMIO,Four MMIO"
bitfld.long 0x00 21.--23. "      DMA_MODE              ,DMA_MODE" "IO2MEM_NO_FC,IO2MEM_FC,MEM2IO_NO_FC,MEM2IO_FC,MEM2MEM,,FIXED_PAT,?..."
bitfld.long 0x00 16.--20. "   REQ_SEL          ,REQ_SEL" "I2C1,I2C2,I2C3,SPI,UART1,UART2,DMIC,GTE,?..."
textline "                              "
bitfld.long 0x00 15. " IRQ_MASK         ,IRQ_MASK" "Disabled,Enabled"
bitfld.long 0x00 10.--13. "       WEIGHT                ,WEIGHT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CH7_STA_0,CH7_STA_0"
rbitfld.long 0x04 31. " BSY              ,BSY" "Wait,Active"
bitfld.long 0x04 30. "         ISE_EOC               ,ISE_EOC" "No interrupt,Interrupt"
rbitfld.long 0x04 28. "   PING_PONG_STA    ,PING_PONG_STA" "Ping,Pong"
textline "                              "
rbitfld.long 0x04 27. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Idle,Busy"
rbitfld.long 0x04 26. "           CHANNEL_PAUSE         ,CHANNEL_PAUSE" "Pause,Resume"
rbitfld.long 0x04 25. "         CHANNEL_RX       ,CHANNEL_RX" "Not active,Active"
textline "                              "
rbitfld.long 0x04 24. " CHANNEL_TX       ,CHANNEL_TX" "Not active,Active"
rbitfld.long 0x04 23. "     IRQ_INTR_STA          ,IRQ_INTR_STA" "Disabled,Enabled"
rbitfld.long 0x04 21. "       TRIG_STA         ,TRIG_STA" "Inactive,Active"
textline "                              "
rbitfld.long 0x04 20. " INTR_STA         ,INTR_STA" "Inactive,Active"
line.long 0x08 "CH7_CSRE_0,CH7_CSRE_0"
bitfld.long 0x08 31. " DMA_ACTIVITY     ,DMA_ACTIVITY" "Resume,Pause"
bitfld.long 0x08 14.--19. "         TRIG_SEL              ,TRIG_SEL" ",SMP_24,SMP_25,SMP_26,CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7,?..."
line.long 0x0C "CH7_SRC_PTR_0,CH7_SRC_PTR_0"
line.long 0x10 "CH7_DST_PTR_0,CH7_DST_PTR_0"
line.long 0x14 "CH7_HI_ADR_PTR_0,CH7_HI_ADR_PTR_0"
hexmask.long.byte 0x14 16.--23. 1. " HI_DST_PTR       ,HI_DST_PTR"
hexmask.long.byte 0x14 0.--7. 1. "             HI_SRC_PTR            ,HI_SRC_PTR"
line.long 0x18 "CH7_MC_SEQ_0,CH7_MC_SEQ_0"
bitfld.long 0x18 31. " MC_DATA_SWAP     ,MC_DATA_SWAP" "Disabled,Enabled"
bitfld.long 0x18 25.--30. "       MC_REQ_CNT            ,MC_REQ_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 23.--24. "             MC_BURST         ,MC_BURST" "2 words,,,16 words"
textline "                              "
bitfld.long 0x18 20.--22. " MC_ADDR_WRAP1    ,MC_ADDR_WRAP1" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 17.--19. "     MC_ADDR_WRAP0         ,MC_ADDR_WRAP0" "No wrap,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words"
bitfld.long 0x18 16. "     MC_AXIID         ,MC_AXIID" "0,1"
textline "                              "
bitfld.long 0x18 14.--15. " MC_PROT          ,MC_PROT" "0,1,2,3"
hexmask.long.byte 0x18 7.--13. 1. "              STREAMID1             ,STREAMID1"
hexmask.long.byte 0x18 0.--6. 1. "             STREAMID0        ,STREAMID0"
line.long 0x1C "CH7_MMIO_SEQ_0,CH7_MMIO_SEQ_0"
bitfld.long 0x1C 31. " DBL_BUF          ,DBL_BUF" "Disabled,Enabled"
bitfld.long 0x1C 28.--30. "       MMIO_BUS_WIDTH        ,MMIO_BUS_WIDTH" "8,16,32,?..."
bitfld.long 0x1C 27. "             MMIO_DATA_SWAP   ,MMIO_DATA_SWAP" "Disabled,Enabled"
textline "                              "
bitfld.long 0x1C 23.--26. " MMIO_BURST       ,MMIO_BURST" "1 word,2 words,,4 words,,,,8 words,,,,,,,,16 words"
rbitfld.long 0x1C 19.--22. "       MMIO_MASTER_ID        ,MMIO_MASTER_ID" ",CCPLEX,CCPLEX_DPMU,BPMP,SPE,SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
bitfld.long 0x1C 16.--18. "    MMIO_ADDR_WRAP   ,MMIO_ADDR_WRAP" "No wrap,1 words,2 words,4 words,8 words,16 words,32 words,64 words"
textline "                              "
bitfld.long 0x1C 7.--8. " MMIO_PROT        ,MMIO_PROT" "0,1,2,3"
hexmask.long.byte 0x1C 0.--6. 1. "              MMIO_CHANNEL_SECURITY ,MMIO_CHANNEL_SECURITY"
line.long 0x20 "CH7_BCOUNT_0,CH7_BCOUNT_0"
rgroup.long (0x80000+0x24)++0x07
line.long 0x00 "CH7_DMA_BYTE_TRA_0,CH7_DMA_BYTE_TRA_0"
line.long 0x04 "CH7_DMA_BYTE_STA_0,CH7_DMA_BYTE_STA_0"
group.long (0x80000+0x30)++0x0F
line.long 0x00 "CH7_ERR_STA_0,CH7_ERR_STA_0"
bitfld.long 0x00 31. " ERROR_STATUS[31] ,Error status 31" "No error,Error"
bitfld.long 0x00 30. "                   [30]      ,Error status 30" "No error,Error"
bitfld.long 0x00 29. "                   [29] ,Error status 29" "No error,Error"
bitfld.long 0x00 28. "                   [28] ,Error status 28" "No error,Error"
textline "                              "
bitfld.long 0x00 27. "             [27] ,Error status 27" "No error,Error"
bitfld.long 0x00 26. "                   [26]      ,Error status 26" "No error,Error"
bitfld.long 0x00 25. "                   [25] ,Error status 25" "No error,Error"
bitfld.long 0x00 24. "                   [24] ,Error status 24" "No error,Error"
textline "                              "
bitfld.long 0x00 23. "             [23] ,Error status 23" "No error,Error"
bitfld.long 0x00 22. "                   [22]      ,Error status 22" "No error,Error"
bitfld.long 0x00 21. "                   [21] ,Error status 21" "No error,Error"
bitfld.long 0x00 20. "                   [20] ,Error status 20" "No error,Error"
textline "                              "
bitfld.long 0x00 19. "             [19] ,Error status 19" "No error,Error"
bitfld.long 0x00 18. "                   [18]      ,Error status 18" "No error,Error"
bitfld.long 0x00 17. "                   [17] ,Error status 17" "No error,Error"
bitfld.long 0x00 16. "                   [16] ,Error status 16" "No error,Error"
textline "                              "
bitfld.long 0x00 15. "             [15] ,Error status 15" "No error,Error"
bitfld.long 0x00 14. "                   [14]      ,Error status 14" "No error,Error"
bitfld.long 0x00 13. "                   [13] ,Error status 13" "No error,Error"
bitfld.long 0x00 12. "                   [12] ,Error status 12" "No error,Error"
textline "                              "
bitfld.long 0x00 11. "             [11] ,Error status 11" "No error,Error"
bitfld.long 0x00 10. "                   [10]      ,Error status 10" "No error,Error"
bitfld.long 0x00 9. "                   [9]  ,Error status 9" "No error,Error"
bitfld.long 0x00 8. "                   [8]  ,Error status 8" "No error,Error"
textline "                              "
bitfld.long 0x00 7. "             [7]  ,Error status 7" "No error,Error"
bitfld.long 0x00 6. "                   [6]       ,Error status 6" "No error,Error"
bitfld.long 0x00 5. "                   [5]  ,Error status 5" "No error,Error"
bitfld.long 0x00 4. "                   [4]  ,Error status 4" "No error,Error"
textline "                              "
bitfld.long 0x00 3. "             [3]  ,Error status 3" "No error,Error"
bitfld.long 0x00 2. "                   [2]       ,Error status 2" "No error,Error"
bitfld.long 0x00 1. "                   [1]  ,Error status 1" "No error,Error"
bitfld.long 0x00 0. "                   [0]  ,Error status 0" "No error,Error"
line.long 0x04 "CH7_FIXED_PAT_0,CH7_FIXED_PAT_0"
line.long 0x08 "CH7_TZ_0,CH7_TZ_0"
bitfld.long 0x08 1. " MC_PROT_1        ,MC_PROT_1" "Not protected,Protected"
bitfld.long 0x08 0. "  MMIO_PROT_1           ,MMIO_PROT_1" "Not protected,Protected"
line.long 0x0C "CH7_SPARE_0,CH7_SPARE_0"
hexmask.long.word 0x0C 17.--31. 1. " SPARE_HI         ,SPARE_HI"
bitfld.long 0x0C 16. "           ENABLE_LEGACY_FC      ,ENABLE_LEGACY_FC" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--15. 1. "       SPARE_LO         ,SPARE_LO"
tree.end
width 28.
tree "DMAAPB AON Registers"
base ad:0x0C3F0000
group.long 0x00++0x03
line.long 0x00 "ORDER_CONFIG_0,ORDER_CONFIG_0"
bitfld.long 0x00 5. " CH1_EN       ,Channel 1 Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      VQMC          ,VQC_mux_control" "CH0|CH1|CH2,Lowest number CH"
bitfld.long 0x00 3. "  WRRDARB      ,WR_RD_ARB" "RD priority,WR priority"
bitfld.long 0x00 2. "   BER          ,Bypass ERR response" "Use REQ,Bypass error"
textline "                                     "
bitfld.long 0x00 1. " DRE          ,Dev_Rdy_Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      BEAD          ,Bridge early ack disable" "No,Yes"
group.long 0x2C4++0x2B
line.long 0x00 "ERROR_CONFIG_0,ERROR_CONFIG_0"
bitfld.long 0x00 4. " ERD          ,Error response disable" "No,Yes"
bitfld.long 0x00 3. "           AEC           ,Alignment error checking" "No,Yes"
bitfld.long 0x00 2. "               SLEC         ,Size/Length error checking" "Disabled,Enabled"
bitfld.long 0x00 1. "      FTC          ,FIXED type support" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_TIMER_0,TIMEOUT_TIMER_0"
line.long 0x08 "TIMEOUT_CONFIG_0,TIMEOUT_CONFIG_0"
bitfld.long 0x08 1.--3. " DBR          ,Divide by ratio" "1,2,4,8,16,32,64,128"
bitfld.long 0x08 0. "           TE            ,Timer enable" "Disabled,Enabled"
line.long 0x0C "CLK_OVR_ON_0,CLK_OVR_ON_0"
bitfld.long 0x0C 0. " DMAAPB_AON   ,SLCG Override Bit" "Disabled,Enabled"
line.long 0x10 "CHX_FIFO_FULL_THRESHOLD1_0,CHX_FIFO_FULL_THRESHOLD1_0"
bitfld.long 0x10 15.--19. " CH3REQFIFOF  ,Binary Encoded CH 3 REQ FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x10 10.--14. "   CH2REQFIFOF   ,Binary Encoded CH 2 REQ FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x10 5.--9. "       CH1REQFIFOF  ,Binary Encoded CH 1 REQ FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x10 0.--4. "   CH0REQFIFOF  ,Binary Encoded CH 0 REQ FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
line.long 0x14 "CHX_FIFO_FULL_THRESHOLD2_0,CHX_FIFO_FULL_THRESHOLD2_0"
bitfld.long 0x14 18.--23. " CH3DATAFIFOF ,Binary Encoded CH 3 DATA FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 12.--17. "   CH2DATAFIFOF  ,Binary Encoded CH 2 DATA FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 6.--11. "       CH1DATAFIFOF ,Binary Encoded CH 1 DATA FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
bitfld.long 0x14 0.--5. "   CH0DATAFIFOF ,Binary Encoded CH 0 DATA FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,17 entries,18 entries,19 entries,20 entries,21 entries,22 entries,23 entries,24 entries,25 entries,26 entries,27 entries,28 entries,29 entries,30 entries,31 entries,32 entries,?..."
line.long 0x18 "RESP_FIFO_FULL_THRESHOLD_0,RESP_FIFO_FULL_THRESHOLD_0"
bitfld.long 0x18 13.--17. " ERRORFIFOF   ,Binary Encoded Error Status FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 8.--12. "   EACKFIFOF     ,Binary Encoded Early ACK FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,9 entries,10 entries,11 entries,12 entries,13 entries,14 entries,15 entries,16 entries,?..."
bitfld.long 0x18 4.--7. "       RDRESPFIFOF  ,Binary Encoded RD RESP FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
bitfld.long 0x18 0.--3. "   WRRESPFIFOF  ,Binary Encoded WR RESP FIFO Full Threshold" "Max Entries,1 entry,2 entries,3 entries,4 entries,5 entries,6 entries,7 entries,8 entries,?..."
line.long 0x1C "INTERRUPT_MASK_0,INTERRUPT_MASK_0"
bitfld.long 0x1C 20. " CH2RFIFOF    ,Ch2 Request FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 19. "    CH1RFIFOF     ,Ch1 Request FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 18. "        CH0RFIFOF    ,Ch0 Request FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 17. "    ARFS         ,Address Range Firewall Security Error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x1C 16. " BFS          ,Block Firewall Security Error" "Not masked,Masked"
bitfld.long 0x1C 15. "    UBT           ,Unsupported burst type" "Not masked,Masked"
bitfld.long 0x1C 14. "        UBE          ,Unsupported Byte Enable" "Not masked,Masked"
bitfld.long 0x1C 13. "    UBS          ,Unsupported burst size" "Not masked,Masked"
textline "                                     "
bitfld.long 0x1C 12. " UAT          ,Unsupported alignment type" "Not masked,Masked"
bitfld.long 0x1C 11. "    CH2DFIFOF     ,Ch2 Data FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 10. "        CH1DFIFOF    ,Ch1 Data FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 9. "    CH0DFIFOF    ,Ch0 Data FIFO Full interrupt mask" "Not masked,Masked"
textline "                                     "
bitfld.long 0x1C 8. " WRFIFOF      ,Write Response FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 7. "    RDFIFOF       ,Read Response FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 5. "        ERBF         ,Early response buffer Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 3. "    SLV          ,SLVERR interrupt mask" "Not masked,Masked"
textline "                                     "
bitfld.long 0x1C 2. " TIM          ,Timer interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 1. "    SFIFOF        ,Status FIFO Full interrupt mask" "Not masked,Masked"
bitfld.long 0x1C 0. "        SFIFONE      ,Status FIFO not empty interrupt mask" "Not masked,Masked"
line.long 0x20 "INTERRUPT_STATUS_0,INTERRUPT_STATUS_0"
eventfld.long 0x20 20. " CH2RFIFOF    ,Ch2 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 19. "  CH1RFIFOF     ,Ch1 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 18. "      CH0RFIFOF    ,Ch0 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 17. "  ARFS         ,Address Range Firewall security error status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x20 16. " BFS          ,Block Firewall security error status" "No interrupt,Interrupt"
eventfld.long 0x20 15. "  UBT           ,Unsupported burst type error status" "No interrupt,Interrupt"
eventfld.long 0x20 14. "      UBE          ,Unsupported Byte Enable error status" "No interrupt,Interrupt"
eventfld.long 0x20 13. "  UBS          ,Unsupported burst size error status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x20 12. " UAT          ,Unsupported alignment type error status" "No interrupt,Interrupt"
eventfld.long 0x20 11. "  CH2DFIFOF     ,Ch2 Data FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 10. "      CH1DFIFOF    ,Ch1 Data FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 9. "  CH0DFIFOF    ,Ch0 Data FIFO Full interrupt status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x20 8. " WRFIFOF      ,Write Response FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 7. "  RDFIFOF       ,Read Response FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 5. "      ERBF         ,Early response buffer Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 3. "  SLV          ,SLVERR interrupt status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x20 2. " TIM          ,Timer interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 1. "  SFIFOF        ,Status FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x20 0. "      SFIFONE      ,Status FIFO Not Empty interrupt status" "No interrupt,Interrupt"
line.long 0x24 "RAW_INTERRUPT_STATUS_0,RAW_INTERRUPT_STATUS_0"
eventfld.long 0x24 20. " CH2RFIFOF    ,Ch2 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 19. "  CH1RFIFOF     ,Ch1 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 18. "      CH0RFIFOF    ,Ch0 Request FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 17. "  ARFS         ,Address Range Firewall security error status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x24 16. " BFS          ,Block Firewall security error status" "No interrupt,Interrupt"
eventfld.long 0x24 15. "  UBT           ,Unsupported burst type error status" "No interrupt,Interrupt"
eventfld.long 0x24 14. "      UBE          ,Unsupported Byte Enable error status" "No interrupt,Interrupt"
eventfld.long 0x24 13. "  UBS          ,Unsupported burst size error status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x24 12. " UAT          ,Unsupported alignment type error status" "No interrupt,Interrupt"
eventfld.long 0x24 11. "  CH2DFIFOF     ,Ch2 Data FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 10. "      CH1DFIFOF    ,Ch1 Data FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 9. "  CH0DFIFOF    ,Ch0 Data FIFO Full interrupt status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x24 8. " WRFIFOF      ,Write Response FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 7. "  RDFIFOF       ,Read Response FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 5. "      ERBF         ,Early response buffer Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 3. "  SLV          ,SLVERR interrupt status" "No interrupt,Interrupt"
textline "                                     "
eventfld.long 0x24 2. " TIM          ,Timer interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 1. "  SFIFOF        ,Status FIFO Full interrupt status" "No interrupt,Interrupt"
eventfld.long 0x24 0. "      SFIFONE      ,Status FIFO Not Empty interrupt status" "No interrupt,Interrupt"
line.long 0x28 "AON_ERROR_STATUS_0,AON_ERROR_STATUS_0"
bitfld.long 0x28 31. " ERSTS[31]    ,Error status FIFO 31" "No effect,Error"
bitfld.long 0x28 30. "     [30]          ,Error status FIFO 30" "No effect,Error"
bitfld.long 0x28 29. "         [29]         ,Error status FIFO 29" "No effect,Error"
bitfld.long 0x28 28. "     [28]         ,Error status FIFO 28" "No effect,Error"
textline "                                     "
bitfld.long 0x28 27. "      [27]    ,Error status FIFO 27" "No effect,Error"
bitfld.long 0x28 26. "     [26]          ,Error status FIFO 26" "No effect,Error"
bitfld.long 0x28 25. "         [25]         ,Error status FIFO 25" "No effect,Error"
bitfld.long 0x28 24. "     [24]         ,Error status FIFO 24" "No effect,Error"
textline "                                     "
bitfld.long 0x28 23. "      [23]    ,Error status FIFO 23" "No effect,Error"
bitfld.long 0x28 22. "     [22]          ,Error status FIFO 22" "No effect,Error"
bitfld.long 0x28 21. "         [21]         ,Error status FIFO 21" "No effect,Error"
bitfld.long 0x28 20. "     [20]         ,Error status FIFO 20" "No effect,Error"
textline "                                     "
bitfld.long 0x28 19. "      [19]    ,Error status FIFO 19" "No effect,Error"
bitfld.long 0x28 18. "     [18]          ,Error status FIFO 18" "No effect,Error"
bitfld.long 0x28 17. "         [17]         ,Error status FIFO 17" "No effect,Error"
bitfld.long 0x28 16. "     [16]         ,Error status FIFO 16" "No effect,Error"
textline "                                     "
bitfld.long 0x28 15. "      [15]    ,Error status FIFO 15" "No effect,Error"
bitfld.long 0x28 14. "     [14]          ,Error status FIFO 14" "No effect,Error"
bitfld.long 0x28 13. "         [13]         ,Error status FIFO 13" "No effect,Error"
bitfld.long 0x28 12. "     [12]         ,Error status FIFO 12" "No effect,Error"
textline "                                     "
bitfld.long 0x28 11. "      [11]    ,Error status FIFO 11" "No effect,Error"
bitfld.long 0x28 10. "     [10]          ,Error status FIFO 10" "No effect,Error"
bitfld.long 0x28 9. "         [9]          ,Error status FIFO 9" "No effect,Error"
bitfld.long 0x28 8. "     [8]          ,Error status FIFO 8" "No effect,Error"
textline "                                     "
bitfld.long 0x28 7. "      [7]     ,Error status FIFO 7" "No effect,Error"
bitfld.long 0x28 6. "     [6]           ,Error status FIFO 6" "No effect,Error"
bitfld.long 0x28 5. "         [5]          ,Error status FIFO 5" "No effect,Error"
bitfld.long 0x28 4. "     [4]          ,Error status FIFO 4" "No effect,Error"
textline "                                     "
bitfld.long 0x28 3. "      [3]     ,Error status FIFO 3" "No effect,Error"
bitfld.long 0x28 2. "     [2]           ,Error status FIFO 2" "No effect,Error"
bitfld.long 0x28 1. "         [1]          ,Error status FIFO 1" "No effect,Error"
bitfld.long 0x28 0. "     [0]          ,Error status FIFO 0" "No effect,Error"
rgroup.long 0x2F0++0x0B
line.long 0x00 "FIFO_STATUS1_0,FIFO_STATUS1_0"
bitfld.long 0x00 15.--19. " CH3_REQ_FS   ,CH3 REQ FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--14. "            CH2_REQ_FS    ,CH2 REQ FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5.--9. "                CH1_REQ_FS   ,CH1 REQ FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "            CH0_REQ_FS   ,CH0 REQ FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "FIFO_STATUS2_0,FIFO_STATUS2_0"
bitfld.long 0x04 18.--23. " CH3_WDATA_FS ,CH3 WDATA FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 12.--17. "            CH2_WDATA_FS  ,CH2 WDATA FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 6.--11. "                CH1_WDATA_FS ,CH1 WDATA FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "            CH0_WDATA_FS ,CH0 WDATA FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "FIFO_STATUS3_0,FIFO_STATUS3_0"
bitfld.long 0x08 13.--17. " ERROR_FS     ,Error FIFO Status x2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 8.--12. "            EACK_FS       ,Early Ack FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 4.--7. "                WR_RESP_FS   ,WR RESP FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            RD_RESP_FS   ,Rd RESP FIFO Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0x400++0x03
hide.long 0x00 "CYA_0,CYA_0"
in
group.long 0x404++0x03
line.long 0x00 "FC_DELAY_CONFIG_0,FC_DELAY_CONFIG_0"
bitfld.long 0x00 0.--3. " COUNT        ,Number of clock cycles to wait before sampling sideband tx/rx" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x0C3F0000+0x4))&0x4000000)==0x0000000)
group.long 0x4++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_0_0,DMAAPB AON Firewall Base Address Configuration 0 Register"
else
rgroup.long 0x4++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_0_0,DMAAPB AON Firewall Base Address Configuration 0 Register"
endif
if (((per.l(ad:0x0C3F0000+0x8))&0x4000000)==0x0000000)
group.long 0x8++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_1_0,DMAAPB AON Firewall Base Address Configuration 1 Register"
else
rgroup.long 0x8++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_1_0,DMAAPB AON Firewall Base Address Configuration 1 Register"
endif
if (((per.l(ad:0x0C3F0000+0xC))&0x4000000)==0x0000000)
group.long 0xC++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_2_0,DMAAPB AON Firewall Base Address Configuration 2 Register"
else
rgroup.long 0xC++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_2_0,DMAAPB AON Firewall Base Address Configuration 2 Register"
endif
if (((per.l(ad:0x0C3F0000+0x10))&0x4000000)==0x0000000)
group.long 0x10++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_3_0,DMAAPB AON Firewall Base Address Configuration 3 Register"
else
rgroup.long 0x10++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_3_0,DMAAPB AON Firewall Base Address Configuration 3 Register"
endif
if (((per.l(ad:0x0C3F0000+0x14))&0x4000000)==0x0000000)
group.long 0x14++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_4_0,DMAAPB AON Firewall Base Address Configuration 4 Register"
else
rgroup.long 0x14++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_4_0,DMAAPB AON Firewall Base Address Configuration 4 Register"
endif
if (((per.l(ad:0x0C3F0000+0x18))&0x4000000)==0x0000000)
group.long 0x18++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_5_0,DMAAPB AON Firewall Base Address Configuration 5 Register"
else
rgroup.long 0x18++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_5_0,DMAAPB AON Firewall Base Address Configuration 5 Register"
endif
if (((per.l(ad:0x0C3F0000+0x1C))&0x4000000)==0x0000000)
group.long 0x1C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_6_0,DMAAPB AON Firewall Base Address Configuration 6 Register"
else
rgroup.long 0x1C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_6_0,DMAAPB AON Firewall Base Address Configuration 6 Register"
endif
if (((per.l(ad:0x0C3F0000+0x20))&0x4000000)==0x0000000)
group.long 0x20++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_7_0,DMAAPB AON Firewall Base Address Configuration 7 Register"
else
rgroup.long 0x20++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_7_0,DMAAPB AON Firewall Base Address Configuration 7 Register"
endif
if (((per.l(ad:0x0C3F0000+0x24))&0x4000000)==0x0000000)
group.long 0x24++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_8_0,DMAAPB AON Firewall Base Address Configuration 8 Register"
else
rgroup.long 0x24++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_8_0,DMAAPB AON Firewall Base Address Configuration 8 Register"
endif
if (((per.l(ad:0x0C3F0000+0x28))&0x4000000)==0x0000000)
group.long 0x28++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_9_0,DMAAPB AON Firewall Base Address Configuration 9 Register"
else
rgroup.long 0x28++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_9_0,DMAAPB AON Firewall Base Address Configuration 9 Register"
endif
if (((per.l(ad:0x0C3F0000+0x2C))&0x4000000)==0x0000000)
group.long 0x2C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_10_0,DMAAPB AON Firewall Base Address Configuration 10 Register"
else
rgroup.long 0x2C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_10_0,DMAAPB AON Firewall Base Address Configuration 10 Register"
endif
if (((per.l(ad:0x0C3F0000+0x30))&0x4000000)==0x0000000)
group.long 0x30++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_11_0,DMAAPB AON Firewall Base Address Configuration 11 Register"
else
rgroup.long 0x30++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_11_0,DMAAPB AON Firewall Base Address Configuration 11 Register"
endif
if (((per.l(ad:0x0C3F0000+0x34))&0x4000000)==0x0000000)
group.long 0x34++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_12_0,DMAAPB AON Firewall Base Address Configuration 12 Register"
else
rgroup.long 0x34++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_12_0,DMAAPB AON Firewall Base Address Configuration 12 Register"
endif
if (((per.l(ad:0x0C3F0000+0x38))&0x4000000)==0x0000000)
group.long 0x38++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_13_0,DMAAPB AON Firewall Base Address Configuration 13 Register"
else
rgroup.long 0x38++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_13_0,DMAAPB AON Firewall Base Address Configuration 13 Register"
endif
if (((per.l(ad:0x0C3F0000+0x3C))&0x4000000)==0x0000000)
group.long 0x3C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_14_0,DMAAPB AON Firewall Base Address Configuration 14 Register"
else
rgroup.long 0x3C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_14_0,DMAAPB AON Firewall Base Address Configuration 14 Register"
endif
if (((per.l(ad:0x0C3F0000+0x40))&0x4000000)==0x0000000)
group.long 0x40++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_15_0,DMAAPB AON Firewall Base Address Configuration 15 Register"
else
rgroup.long 0x40++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG0_15_0,DMAAPB AON Firewall Base Address Configuration 15 Register"
endif
if (((per.l(ad:0x0C3F0000+0x44))&0x4000000)==0x0000000)
group.long 0x44++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_0_0,DMAAPB AON Firewall Address Offset Configuration 0 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 0"
else
rgroup.long 0x44++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_0_0,DMAAPB AON Firewall Address Offset Configuration 0 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 0"
endif
if (((per.l(ad:0x0C3F0000+0x48))&0x4000000)==0x0000000)
group.long 0x48++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_1_0,DMAAPB AON Firewall Address Offset Configuration 1 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 1"
else
rgroup.long 0x48++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_1_0,DMAAPB AON Firewall Address Offset Configuration 1 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 1"
endif
if (((per.l(ad:0x0C3F0000+0x4C))&0x4000000)==0x0000000)
group.long 0x4C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_2_0,DMAAPB AON Firewall Address Offset Configuration 2 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 2"
else
rgroup.long 0x4C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_2_0,DMAAPB AON Firewall Address Offset Configuration 2 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 2"
endif
if (((per.l(ad:0x0C3F0000+0x50))&0x4000000)==0x0000000)
group.long 0x50++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_3_0,DMAAPB AON Firewall Address Offset Configuration 3 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 3"
else
rgroup.long 0x50++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_3_0,DMAAPB AON Firewall Address Offset Configuration 3 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 3"
endif
if (((per.l(ad:0x0C3F0000+0x54))&0x4000000)==0x0000000)
group.long 0x54++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_4_0,DMAAPB AON Firewall Address Offset Configuration 4 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 4"
else
rgroup.long 0x54++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_4_0,DMAAPB AON Firewall Address Offset Configuration 4 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 4"
endif
if (((per.l(ad:0x0C3F0000+0x58))&0x4000000)==0x0000000)
group.long 0x58++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_5_0,DMAAPB AON Firewall Address Offset Configuration 5 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 5"
else
rgroup.long 0x58++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_5_0,DMAAPB AON Firewall Address Offset Configuration 5 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 5"
endif
if (((per.l(ad:0x0C3F0000+0x5C))&0x4000000)==0x0000000)
group.long 0x5C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_6_0,DMAAPB AON Firewall Address Offset Configuration 6 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 6"
else
rgroup.long 0x5C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_6_0,DMAAPB AON Firewall Address Offset Configuration 6 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 6"
endif
if (((per.l(ad:0x0C3F0000+0x60))&0x4000000)==0x0000000)
group.long 0x60++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_7_0,DMAAPB AON Firewall Address Offset Configuration 7 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 7"
else
rgroup.long 0x60++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_7_0,DMAAPB AON Firewall Address Offset Configuration 7 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 7"
endif
if (((per.l(ad:0x0C3F0000+0x64))&0x4000000)==0x0000000)
group.long 0x64++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_8_0,DMAAPB AON Firewall Address Offset Configuration 8 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 8"
else
rgroup.long 0x64++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_8_0,DMAAPB AON Firewall Address Offset Configuration 8 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 8"
endif
if (((per.l(ad:0x0C3F0000+0x68))&0x4000000)==0x0000000)
group.long 0x68++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_9_0,DMAAPB AON Firewall Address Offset Configuration 9 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 9"
else
rgroup.long 0x68++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_9_0,DMAAPB AON Firewall Address Offset Configuration 9 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 9"
endif
if (((per.l(ad:0x0C3F0000+0x6C))&0x4000000)==0x0000000)
group.long 0x6C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_10_0,DMAAPB AON Firewall Address Offset Configuration 10 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 10"
else
rgroup.long 0x6C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_10_0,DMAAPB AON Firewall Address Offset Configuration 10 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 10"
endif
if (((per.l(ad:0x0C3F0000+0x70))&0x4000000)==0x0000000)
group.long 0x70++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_11_0,DMAAPB AON Firewall Address Offset Configuration 11 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 11"
else
rgroup.long 0x70++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_11_0,DMAAPB AON Firewall Address Offset Configuration 11 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 11"
endif
if (((per.l(ad:0x0C3F0000+0x74))&0x4000000)==0x0000000)
group.long 0x74++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_12_0,DMAAPB AON Firewall Address Offset Configuration 12 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 12"
else
rgroup.long 0x74++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_12_0,DMAAPB AON Firewall Address Offset Configuration 12 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 12"
endif
if (((per.l(ad:0x0C3F0000+0x78))&0x4000000)==0x0000000)
group.long 0x78++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_13_0,DMAAPB AON Firewall Address Offset Configuration 13 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 13"
else
rgroup.long 0x78++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_13_0,DMAAPB AON Firewall Address Offset Configuration 13 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 13"
endif
if (((per.l(ad:0x0C3F0000+0x7C))&0x4000000)==0x0000000)
group.long 0x7C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_14_0,DMAAPB AON Firewall Address Offset Configuration 14 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 14"
else
rgroup.long 0x7C++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_14_0,DMAAPB AON Firewall Address Offset Configuration 14 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 14"
endif
if (((per.l(ad:0x0C3F0000+0x80))&0x4000000)==0x0000000)
group.long 0x80++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_15_0,DMAAPB AON Firewall Address Offset Configuration 15 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 15"
else
rgroup.long 0x80++0x03
line.long 0x00 "FIREWALL_ADDR_CONFIG1_15_0,DMAAPB AON Firewall Address Offset Configuration 15 Register"
bitfld.long 0x00 26. " ADDR_LCK     ,Number of clock cycles to wait before sampling sideband tx/rx" "Unlocked,Locked"
hexmask.long 0x00 0.--25. 0x01 "      OFST_ADDR     ,Offset Address for security filter 15"
endif
group.long 0x84++0x03
line.long 0x00 "SECURITY_BITMASK_0_0,DMAAPB AON Security Bitmask 0 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "SECURITY_BITMASK_1_0,DMAAPB AON Security Bitmask 1 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "SECURITY_BITMASK_2_0,DMAAPB AON Security Bitmask 2 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "SECURITY_BITMASK_3_0,DMAAPB AON Security Bitmask 3 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "SECURITY_BITMASK_4_0,DMAAPB AON Security Bitmask 4 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "SECURITY_BITMASK_5_0,DMAAPB AON Security Bitmask 5 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "SECURITY_BITMASK_6_0,DMAAPB AON Security Bitmask 6 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "SECURITY_BITMASK_7_0,DMAAPB AON Security Bitmask 7 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "SECURITY_BITMASK_8_0,DMAAPB AON Security Bitmask 8 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xA8++0x03
line.long 0x00 "SECURITY_BITMASK_9_0,DMAAPB AON Security Bitmask 9 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xAC++0x03
line.long 0x00 "SECURITY_BITMASK_10_0,DMAAPB AON Security Bitmask 10 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xB0++0x03
line.long 0x00 "SECURITY_BITMASK_11_0,DMAAPB AON Security Bitmask 11 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xB4++0x03
line.long 0x00 "SECURITY_BITMASK_12_0,DMAAPB AON Security Bitmask 12 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xB8++0x03
line.long 0x00 "SECURITY_BITMASK_13_0,DMAAPB AON Security Bitmask 13 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xBC++0x03
line.long 0x00 "SECURITY_BITMASK_14_0,DMAAPB AON Security Bitmask 14 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "SECURITY_BITMASK_15_0,DMAAPB AON Security Bitmask 15 Register"
bitfld.long 0x00 30. " SEC_LCK      ,Security lock" "Unlocked,Locked"
bitfld.long 0x00 29. "      SEC_WEN       ,Security Write Control Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          SEC_REN      ,Security Read Control Enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "      MSTR_ID      ,Agents that are allowed to change Security and Address Control configurations when they are not locked" "Disabled,CCPLEX,CCPLEX-DPMU,BPMP,SPE,CPE/SCE,DMA_PER,TSECA,TSECB,JTAGM,CSITE,APE,?..."
textline "                                     "
bitfld.long 0x00 23. " PR7          ,PR7" "0,1"
bitfld.long 0x00 22. "             PR6           ,PR6" "0,1"
bitfld.long 0x00 21. "                 PR5          ,PR5" "0,1"
bitfld.long 0x00 20. "             PR4          ,PR4" "0,1"
textline "                                     "
bitfld.long 0x00 19. " PR3          ,PR3" "0,1"
bitfld.long 0x00 18. "             PR2           ,PR2" "0,1"
bitfld.long 0x00 17. "                 PR1          ,PR1" "0,1"
bitfld.long 0x00 16. "             PR0          ,PR0" "0,1"
textline "                                     "
bitfld.long 0x00 15. " G7W          ,Privileged Group7 Write" "Disabled,Enabled"
bitfld.long 0x00 14. "      G6W           ,Privileged Group6 Write" "Disabled,Enabled"
bitfld.long 0x00 13. "          G5W          ,Privileged Group5 Write" "Disabled,Enabled"
bitfld.long 0x00 12. "      G4W          ,Privileged Group4 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " G3W          ,Privileged Group3 Write" "Disabled,Enabled"
bitfld.long 0x00 10. "      G2W           ,Privileged Group2 Write" "Disabled,Enabled"
bitfld.long 0x00 9. "          G1W          ,Privileged Group1 Write" "Disabled,Enabled"
bitfld.long 0x00 8. "      G0W          ,Privileged Group0 Write" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " G7R          ,Privileged Group7 Read" "Disabled,Enabled"
bitfld.long 0x00 6. "      G6R           ,Privileged Group6 Read" "Disabled,Enabled"
bitfld.long 0x00 5. "          G5R          ,Privileged Group5 Read" "Disabled,Enabled"
bitfld.long 0x00 4. "      G4R          ,Privileged Group4 Read" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " G3R          ,Privileged Group3 Read" "Disabled,Enabled"
bitfld.long 0x00 2. "      G2R           ,Privileged Group2 Read" "Disabled,Enabled"
bitfld.long 0x00 1. "          G1R          ,Privileged Group1 Read" "Disabled,Enabled"
bitfld.long 0x00 0. "      G0R          ,Privileged Group0 Read" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "NS_BLOCK0_TZ_0,Block 0 Level TrustZone Security Registers"
bitfld.long 0x00 18. " AOVC         ,TrustZone access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,TrustZone access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,TrustZone access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,TrustZone access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,TrustZone access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,TrustZone access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,TrustZone access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,TrustZone access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,TrustZone access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,TrustZone access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,TrustZone access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,TrustZone access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,TrustZone access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,TrustZone access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,TrustZone access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long 0xCC++0x23
line.long 0x00 "NS_BLOCK2_TZ_0,Block 2 Level TrustZone Security Registers"
bitfld.long 0x00 16. " DMIC5        ,TrustZone access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,TrustZone access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,TrustZone access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_TZ_0,Block 3 Level TrustZone Security Registers"
bitfld.long 0x04 23. " I2C10        ,TrustZone access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_TZ_0,Block 4 Level TrustZone Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_TZ_0,Block 5 Level TrustZone Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,TrustZone access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,TrustZone access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,TrustZone access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_TZ_0,Block 6 Level TrustZone Security Registers"
bitfld.long 0x10 23. " PMC          ,TrustZone access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level TrustZone Security Registers"
bitfld.long 0x14 11. " RTC          ,TrustZone access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,TrustZone access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_TZ_0,Block 8 Level TrustZone Security Registers"
bitfld.long 0x18 24. " SPI2         ,TrustZone access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_TZ_0,Block 9 Level TrustZone Security Registers"
bitfld.long 0x1C 30. " TSC          ,TrustZone access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_TZ_0,Block 10 Level TrustZone Security Registers"
bitfld.long 0x20 17. " UART_G       ,TrustZone access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,TrustZone access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x104++0x03
line.long 0x00 "NS_BLOCK0_G1_0,Block 0 Level G1 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G1 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G1 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G1 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G1 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G1 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G1 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G1 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G1 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G1 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G1 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G1 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G1 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G1 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G1 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G1 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x104+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G1_0,Block 2 Level G1 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G1 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G1 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G1 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G1_0,Block 3 Level G1 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G1 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G1_0,Block 4 Level G1 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G1_0,Block 5 Level G1 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G1 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G1 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G1 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G1_0,Block 6 Level G1 Security Registers"
bitfld.long 0x10 23. " PMC          ,G1 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G1 Security Registers"
bitfld.long 0x14 11. " RTC          ,G1 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G1 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G1_0,Block 8 Level G1 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G1 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G1_0,Block 9 Level G1 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G1 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G1_0,Block 10 Level G1 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G1 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G1 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "NS_BLOCK0_G2_0,Block 0 Level G2 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G2 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G2 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G2 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G2 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G2 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G2 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G2 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G2 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G2 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G2 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G2 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G2 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G2 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G2 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G2 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x144+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G2_0,Block 2 Level G2 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G2 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G2 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G2 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G2_0,Block 3 Level G2 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G2 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G2_0,Block 4 Level G2 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G2_0,Block 5 Level G2 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G2 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G2 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G2 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G2_0,Block 6 Level G2 Security Registers"
bitfld.long 0x10 23. " PMC          ,G2 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G2 Security Registers"
bitfld.long 0x14 11. " RTC          ,G2 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G2 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G2_0,Block 8 Level G2 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G2 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G2_0,Block 9 Level G2 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G2 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G2_0,Block 10 Level G2 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G2 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G2 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x184++0x03
line.long 0x00 "NS_BLOCK0_G3_0,Block 0 Level G3 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G3 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G3 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G3 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G3 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G3 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G3 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G3 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G3 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G3 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G3 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G3 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G3 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G3 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G3 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G3 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x184+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G3_0,Block 2 Level G3 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G3 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G3 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G3 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G3_0,Block 3 Level G3 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G3 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G3_0,Block 4 Level G3 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G3_0,Block 5 Level G3 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G3 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G3 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G3 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G3_0,Block 6 Level G3 Security Registers"
bitfld.long 0x10 23. " PMC          ,G3 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G3 Security Registers"
bitfld.long 0x14 11. " RTC          ,G3 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G3 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G3_0,Block 8 Level G3 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G3 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G3_0,Block 9 Level G3 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G3 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G3_0,Block 10 Level G3 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G3 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G3 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x1C4++0x03
line.long 0x00 "NS_BLOCK0_G4_0,Block 0 Level G4 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G4 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G4 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G4 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G4 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G4 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G4 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G4 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G4 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G4 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G4 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G4 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G4 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G4 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G4 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G4 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x1C4+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G4_0,Block 2 Level G4 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G4 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G4 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G4 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G4_0,Block 3 Level G4 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G4 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G4_0,Block 4 Level G4 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G4_0,Block 5 Level G4 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G4 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G4 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G4 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G4_0,Block 6 Level G4 Security Registers"
bitfld.long 0x10 23. " PMC          ,G4 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G4 Security Registers"
bitfld.long 0x14 11. " RTC          ,G4 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G4 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G4_0,Block 8 Level G4 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G4 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G4_0,Block 9 Level G4 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G4 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G4_0,Block 10 Level G4 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G4 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G4 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x204++0x03
line.long 0x00 "NS_BLOCK0_G5_0,Block 0 Level G5 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G5 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G5 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G5 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G5 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G5 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G5 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G5 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G5 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G5 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G5 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G5 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G5 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G5 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G5 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G5 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x204+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G5_0,Block 2 Level G5 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G5 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G5 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G5 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G5_0,Block 3 Level G5 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G5 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G5_0,Block 4 Level G5 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G5_0,Block 5 Level G5 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G5 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G5 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G5 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G5_0,Block 6 Level G5 Security Registers"
bitfld.long 0x10 23. " PMC          ,G5 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G5 Security Registers"
bitfld.long 0x14 11. " RTC          ,G5 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G5 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G5_0,Block 8 Level G5 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G5 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G5_0,Block 9 Level G5 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G5 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G5_0,Block 10 Level G5 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G5 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G5 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x244++0x03
line.long 0x00 "NS_BLOCK0_G6_0,Block 0 Level G6 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G6 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G6 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G6 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G6 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G6 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G6 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G6 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G6 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G6 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G6 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G6 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G6 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G6 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G6 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G6 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x244+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G6_0,Block 2 Level G6 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G6 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G6 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G6 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G6_0,Block 3 Level G6 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G6 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G6_0,Block 4 Level G6 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G6_0,Block 5 Level G6 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G6 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G6 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G6 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G6_0,Block 6 Level G6 Security Registers"
bitfld.long 0x10 23. " PMC          ,G6 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G6 Security Registers"
bitfld.long 0x14 11. " RTC          ,G6 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G6 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G6_0,Block 8 Level G6 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G6 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G6_0,Block 9 Level G6 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G6 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G6_0,Block 10 Level G6 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G6 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G6 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x284++0x03
line.long 0x00 "NS_BLOCK0_G7_0,Block 0 Level G7 Security Registers"
bitfld.long 0x00 18. " AOVC         ,G7 access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,G7 access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,G7 access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,G7 access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,G7 access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,G7 access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,G7 access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,G7 access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,G7 access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,G7 access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,G7 access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,G7 access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,G7 access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,G7 access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,G7 access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long (0x284+0x08)++0x23
line.long 0x00 "NS_BLOCK2_G7_0,Block 2 Level G7 Security Registers"
bitfld.long 0x00 16. " DMIC5        ,G7 access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,G7 access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,G7 access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "NS_BLOCK3_G7_0,Block 3 Level G7 Security Registers"
bitfld.long 0x04 23. " I2C10        ,G7 access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "NS_BLOCK4_G7_0,Block 4 Level G7 Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "NS_BLOCK5_G7_0,Block 5 Level G7 Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,G7 access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,G7 access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,G7 access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "NS_BLOCK6_G7_0,Block 6 Level G7 Security Registers"
bitfld.long 0x10 23. " PMC          ,G7 access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "NS_BLOCK7_TZ_0,Block 7 Level G7 Security Registers"
bitfld.long 0x14 11. " RTC          ,G7 access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,G7 access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "NS_BLOCK8_G7_0,Block 8 Level G7 Security Registers"
bitfld.long 0x18 24. " SPI2         ,G7 access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "NS_BLOCK9_G7_0,Block 9 Level G7 Security Registers"
bitfld.long 0x1C 30. " TSC          ,G7 access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "NS_BLOCK10_G7_0,Block 10 Level G7 Security Registers"
bitfld.long 0x20 17. " UART_G       ,G7 access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,G7 access to UART_C, CID 332" "Disabled,Enabled"
group.long 0x31C++0x03
line.long 0x00 "BLOCK0_BE_0,Block 0 Level BE Security Registers"
bitfld.long 0x00 18. " AOVC         ,BE access to AOVC, CID 18" "Disabled,Enabled"
bitfld.long 0x00 17. "      AON_VIC_1     ,BE access to AON_VIC_1, CID 17" "Disabled,Enabled"
bitfld.long 0x00 16. "          AON_VIC_0    ,BE access to AON_VIC_0, CID 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      AON_TKE      ,BE access to AON_TKE, CID 15" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 14. " AON_PM       ,BE access to AON_PM, CID 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      AON_MSS       ,BE access to AON_MSS, CID 13" "Disabled,Enabled"
bitfld.long 0x00 12. "          AON_HSP      ,BE access to AON_HSP, CID 12" "Disabled,Enabled"
bitfld.long 0x00 11. "      AON_GTE      ,BE access to AON_GTE, CID 11" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " AON_GPIO_0   ,BE access to AON_GPIO_0, CID 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      AON_FPGA_MISC ,BE access to AON_FPGA_MISC, CID 9" "Disabled,Enabled"
bitfld.long 0x00 8. "          AON_DMA      ,BE access to AON_DMA, CID 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      AON_CAR      ,BE access to AON_CAR, CID 7" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " AON_ATCM_CFG ,BE access to AON_ATCM_CFG, CID 6" "Disabled,Enabled"
bitfld.long 0x00 5. "      AON_AST_1     ,BE access to AON_AST_1, CID 5" "Disabled,Enabled"
bitfld.long 0x00 4. "          AON_AST_0    ,BE access to AON_AST_0, CID 4" "Disabled,Enabled"
group.long 0x324++0x23
line.long 0x00 "BLOCK2_BE_0,Block 2 Level BE Security Registers"
bitfld.long 0x00 16. " DMIC5        ,BE access to DMIC5, CID 80" "Disabled,Enabled"
bitfld.long 0x00 1. "      CAN2          ,BE access to CAN2, CID 65" "Disabled,Enabled"
bitfld.long 0x00 0. "          CAN1         ,BE access to CAN1, CID 64" "Disabled,Enabled"
line.long 0x04 "BLOCK3_BE_0,Block 3 Level BE Security Registers"
bitfld.long 0x04 23. " I2C10        ,BE access to I2C10, CID 119" "Disabled,Enabled"
line.long 0x08 "BLOCK4_BE_0,Block 4 Level BE Security Registers"
bitfld.long 0x08 12. " I2C8         ,TrustZone access to I2C8, CID 140" "Disabled,Enabled"
bitfld.long 0x08 1. "      I2C2          ,TrustZone access to I2C2, CID 129" "Disabled,Enabled"
line.long 0x0C "BLOCK5_BE_0,Block 5 Level BE Security Registers"
bitfld.long 0x0C 22. " PADCTL_A15   ,BE access to PADCTL_A15, CID 182" "Disabled,Enabled"
bitfld.long 0x0C 21. "      PADCTL_A14    ,BE access to PADCTL_A14, CID 181" "Disabled,Enabled"
bitfld.long 0x0C 19. "          PADCTL_A12   ,BE access to PADCTL_A12, CID 179" "Disabled,Enabled"
line.long 0x10 "BLOCK6_BE_0,Block 6 Level BE Security Registers"
bitfld.long 0x10 23. " PMC          ,BE access to PMC, CID 215" "Disabled,Enabled"
line.long 0x14 "BLOCK7_TZ_0,Block 7 Level BE Security Registers"
bitfld.long 0x14 11. " RTC          ,BE access to RTC, CID 235" "Disabled,Enabled"
bitfld.long 0x14 0. "      PWM4          ,BE access to PWM4, CID 224" "Disabled,Enabled"
line.long 0x18 "BLOCK8_BE_0,Block 8 Level BE Security Registers"
bitfld.long 0x18 24. " SPI2         ,BE access to SPI2, CID 280" "Disabled,Enabled"
line.long 0x1C "BLOCK9_BE_0,Block 9 Level BE Security Registers"
bitfld.long 0x1C 30. " TSC          ,BE access to TSC, CID 318" "Disabled,Enabled"
line.long 0x20 "BLOCK10_BE_0,Block 10 Level BE Security Registers"
bitfld.long 0x20 17. " UART_G       ,BE access to UART_G, CID 337" "Disabled,Enabled"
bitfld.long 0x20 12. "      UART_C        ,BE access to UART_C, CID 332" "Disabled,Enabled"
tree.end
width 23.
tree "TKE AON Registers"
base ad:0x0C0F0000
rgroup.long 0x00++0x0F
line.long 0x00 "SHARED_TKETSC0_0,Value Of Local TSC Counter"
line.long 0x04 "SHARED_TKETSC1_0,Value Of Master TSC Counter"
line.long 0x08 "SHARED_TKEUSEC_0,Value Of Local USEC Counter"
line.long 0x0C "SHARED_TKEOSC_0,Value Of Local OSC Counter"
group.long 0x10++0x07
line.long 0x00 "SHARED_TKECR_0,TKE Control Register"
bitfld.long 0x00 3. " HDBG                      ,Halt-on-debug" "Ignored,Asserted"
bitfld.long 0x00 2. "          OSC_DIS                 ,Disable the local OSC counter" "No,Yes"
bitfld.long 0x00 1. "           USEC_DIS             ,Disable the local USEC counter" "No,Yes"
bitfld.long 0x00 0. "           TSC_DIS ,Disable the local TSC" "No,Yes"
line.long 0x04 "SHARED_CLK_OVR_ON_0,SHARED_CLK_OVR_ON_0"
bitfld.long 0x04 0. " OSC                       ,SLCG override bit" "Disabled,Enabled"
group.long 0x10000++0x0B
line.long 0x00 "TIMER_TMR0_TMRCR_0,Timer 0 Configuration Register"
bitfld.long 0x00 31. " EN                        ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER                     ,Periodic" "No effect,Reloaded"
hexmask.long 0x00 0.--28. 1. "     PTV                  ,Timer Present Trigger Value"
line.long 0x04 "TIMER_TMR0_TMRSR_0,Timer 0 Status Register"
eventfld.long 0x04 30. " INTR_CLR                  ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV                     ,Current counter value"
line.long 0x08 "TIMER_TMR0_TMRCSSR_0,Timer 0 Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID                    ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
group.long 0x20000++0x0B
line.long 0x00 "TIMER_TMR1_TMRCR_0,Timer 1 Configuration Register"
bitfld.long 0x00 31. " EN                        ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER                     ,Periodic" "No effect,Reloaded"
hexmask.long 0x00 0.--28. 1. "     PTV                  ,Timer Present Trigger Value"
line.long 0x04 "TIMER_TMR1_TMRSR_0,Timer 1 Status Register"
eventfld.long 0x04 30. " INTR_CLR                  ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV                     ,Current counter value"
line.long 0x08 "TIMER_TMR1_TMRCSSR_0,Timer 1 Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID                    ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
group.long 0x30000++0x0B
line.long 0x00 "TIMER_TMR2_TMRCR_0,Timer 2 Configuration Register"
bitfld.long 0x00 31. " EN                        ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER                     ,Periodic" "No effect,Reloaded"
hexmask.long 0x00 0.--28. 1. "     PTV                  ,Timer Present Trigger Value"
line.long 0x04 "TIMER_TMR2_TMRSR_0,Timer 2 Status Register"
eventfld.long 0x04 30. " INTR_CLR                  ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV                     ,Current counter value"
line.long 0x08 "TIMER_TMR2_TMRCSSR_0,Timer 2 Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID                    ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
group.long 0x40000++0x0B
line.long 0x00 "TIMER_TMR3_TMRCR_0,Timer 3 Configuration Register"
bitfld.long 0x00 31. " EN                        ,Enable" "Disabled,Enabled"
bitfld.long 0x00 30. "          PER                     ,Periodic" "No effect,Reloaded"
hexmask.long 0x00 0.--28. 1. "     PTV                  ,Timer Present Trigger Value"
line.long 0x04 "TIMER_TMR3_TMRSR_0,Timer 3 Status Register"
eventfld.long 0x04 30. " INTR_CLR                  ,Clears the interrupt" "No effect,Clear"
hexmask.long 0x04 0.--28. 1. "         PCV                     ,Current counter value"
line.long 0x08 "TIMER_TMR3_TMRCSSR_0,Timer 3 Clock Source Selection Register"
bitfld.long 0x08 0.--1. " SRC_ID                    ,Select Count reference" "SRC_USECCNT,SRC_OSCCNT,SRC_TSCCNT_29_0,SRC_TSCCNT_41_12"
group.long 0x50000++0x03
line.long 0x00 "WDT0_WDTCR_0,Watchdog Timer Configuration Register"
bitfld.long 0x00 28.--31. " WINDOWEDRESTARTDISABLEMAP ,Windowed Restart Disable Map" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "                ERRORTHRESHOLD          ,Error Threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 19. "             TSCREFERENCEENABLE   ,Tsc Reference Enable" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 18. " CHALLENGERESPONSEENABLE   ,Challenge Response Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "          WINDOWEDOPERATIONENABLE ,Windowed Operation Enable" "Disabled,Enabled"
bitfld.long 0x00 16. "      SYSTEMPORESETENABLE  ,System PO Reset Enable" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 15. " SYSTEMDEBUGRESETENABLE    ,System Debug Reset Enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          REMOTEINTERRUPTENABLE   ,Remote Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 13. "      LOCALFIQENABLE       ,Local FIQ Enable" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 12. " LOCALINTERRUPTENABLE      ,Local Interrupt Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 4.--11. 1. "          PERIOD                  ,Period"
bitfld.long 0x00 0.--3. "            TIMERSOURCE          ,Timer Source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x50004++0x03
line.long 0x00 "WDT0_WDTSR_0,Watchdog Timer Status Register"
bitfld.long 0x00 16. " CURRENTERROR              ,Current error reported to HSM" "No error,Error"
bitfld.long 0x00 12.--14. "          CURRENTEXPIRATIONCOUNT  ,Current count of expiration since last start operation" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 4.--11. 1. "             CURRENTCOUNT         ,Current value of the downcounter"
textline "                                "
bitfld.long 0x00 3. " REMOTEINTERRUPTSTATUS     ,Current status of remote interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 2. "      LOCALFIQSTATUS          ,Current status of FIQ" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  LOCALINTERRUPTSTATUS ,Current status of local interrupt" "No interrupt,Interrupt"
textline "                                "
bitfld.long 0x00 0. " ENABLED                   ,Enabled" "Disabled,Enabled"
group.long 0x50008++0x0B
line.long 0x00 "WDT0_WDTCMDR_0,Watchdog Timer Command Register"
bitfld.long 0x00 1. " DISABLECOUNTER            ,Disable Counter" "No,Yes"
bitfld.long 0x00 0. "               STARTCOUNTER            ,Start Counter" "No,Yes"
line.long 0x04 "WDT0_WDTUR_0,Watchdog Timer Unlock Register"
line.long 0x08 "WDT0_WDTSCR_0,Watchdog Timer Skip Configuration Register"
bitfld.long 0x08 12.--14. " SKIP3                     ,Skip Value at Expiration count 3" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 8.--10. "                 SKIP2                   ,Skip Value at Expiration count 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 4.--6. "             SKIP1                ,Skip Value at Expiration count 1" "0,1,2,3,4,5,6,7"
textline "                                "
bitfld.long 0x08 0.--2. " SKIP0                     ,Skip Value at Expiration count 0" "0,1,2,3,4,5,6,7"
tree.end
width 28.
tree "APS AST Registers"
base ad:0x0C040000
if (((per.l(ad:0x0C040000))&0x1)==0x1)
group.long 0x00++0x03
line.long 0x00 "CONTROL_0,CONTROL_0"
bitfld.long 0x00 31. " APBOVRON      ,Force APB clock always on in AST" "Not forced,Forced"
bitfld.long 0x00 30. "     NICOVRON       ,Force NIC clock always on in AST" "Not forced,Forced"
hexmask.long.byte 0x00 22.--29. 1. "  PHYSSTREAMID  ,StreamID output when the physical stream is enabled for a region"
textline "                                     "
bitfld.long 0x00 21. " VPRLOCK       ,Prevents writes to all VPR controls" "Not locked,Locked"
bitfld.long 0x00 20. "     CARVEOUTLOCK   ,Prevents writes to all Carve Out controls" "Not locked,Locked"
bitfld.long 0x00 19. "  DEFPHYSICAL   ,Specifies the default how the StreamID is selected for default accesses" "DefVMIndx,PhysStreamID"
textline "                                     "
bitfld.long 0x00 15.--18. " DEFVMINDEX    ,VM Index used to select the Stream ID when DefPhysical=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14. "             DEFVPRPASSTHRU ,Enables forwarding of the VPR attribute when VPR support is implemented in the AST" "Disabled,Enabled"
bitfld.long 0x00 13. "    DEFVPRWR      ,State of the VPR WR bit when DefVprPassThru = 0" "0,1"
textline "                                     "
bitfld.long 0x00 12. " DEFVPRRD      ,State of the VPR RD bit when DefVprPassThru = 0" "0,1"
bitfld.long 0x00 10.--11. "              DEFCARVEOUTAL  ,Carveout access level if AL support ID implemented in the AST" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carveout ID for default accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                     "
bitfld.long 0x00 4. " DEFNSPASSTHRU ,NS bit is forwarded from the AXI slave interface" "Not forwarded,Forwarded"
bitfld.long 0x00 3. "  DEFNS          ,Specifies the NS state for default accesses when DefNSPassThru=0" "Secure,Non secure"
bitfld.long 0x00 2. "  DEFSNOOP      ,Specifies if default accesses snoop the Main CPU caches" "No snoop,Snoop"
textline "                                     "
bitfld.long 0x00 1. " MATCHERRCTL   ,Specifies how transactions that do not match a region are handled" "No snoop,Snoop"
bitfld.long 0x00 0. "       LOCK           ,Prevents writes to all RWGL bits" "Unlocked,Locked"
else
group.long 0x00++0x03
line.long 0x00 "CONTROL_0,CONTROL_0"
bitfld.long 0x00 31. " APBOVRON      ,Force APB clock always on in AST" "Not forced,Forced"
bitfld.long 0x00 30. "     NICOVRON       ,Force NIC clock always on in AST" "Not forced,Forced"
hexmask.long.byte 0x00 22.--29. 1. "  PHYSSTREAMID  ,StreamID output when the physical stream is enabled for a region"
textline "                                     "
bitfld.long 0x00 21. " VPRLOCK       ,Prevents writes to all VPR controls" "Not locked,Locked"
bitfld.long 0x00 20. "     CARVEOUTLOCK   ,Prevents writes to all Carve Out controls" "Not locked,Locked"
rbitfld.long 0x00 19. "  DEFPHYSICAL   ,Specifies the default how the StreamID is selected for default accesses" "DefVMIndx,PhysStreamID"
textline "                                     "
rbitfld.long 0x00 15.--18. " DEFVMINDEX    ,VM Index used to select the Stream ID when DefPhysical=0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14. "             DEFVPRPASSTHRU ,Enables forwarding of the VPR attribute when VPR support is implemented in the AST" "Disabled,Enabled"
bitfld.long 0x00 13. "    DEFVPRWR      ,State of the VPR WR bit when DefVprPassThru = 0" "0,1"
textline "                                     "
bitfld.long 0x00 12. " DEFVPRRD      ,State of the VPR RD bit when DefVprPassThru = 0" "0,1"
bitfld.long 0x00 10.--11. "              DEFCARVEOUTAL  ,Carveout access level if AL support ID implemented in the AST" "0,1,2,3"
bitfld.long 0x00 5.--9. "           DEFCARVEOUTID ,Carveout ID for default accesses" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                     "
rbitfld.long 0x00 4. " DEFNSPASSTHRU ,NS bit is forwarded from the AXI slave interface" "Not forwarded,Forwarded"
rbitfld.long 0x00 3. "  DEFNS          ,Specifies the NS state for default accesses when DefNSPassThru=0" "Secure,Non secure"
rbitfld.long 0x00 2. "  DEFSNOOP      ,Specifies if default accesses snoop the Main CPU caches" "No snoop,Snoop"
textline "                                     "
rbitfld.long 0x00 1. " MATCHERRCTL   ,Specifies how transactions that do not match a region are handled" "No snoop,Snoop"
bitfld.long 0x00 0. "       LOCK           ,Prevents writes to all RWGL bits" "Unlocked,Locked"
endif
group.long 0x04++0x03
line.long 0x00 "ERROR_STATUS_0,ERROR_STATUS_0"
rbitfld.long 0x00 2. " OVERFLOW      ,Overflow" "No overflow,Overflow"
rbitfld.long 0x00 1. "    VMINDXERR      ,VM Index Error" "No error,Error"
bitfld.long 0x00 0. "    VALID         ,Set when a decode error response is generated by the AST" "No error,Error"
rgroup.long 0x08++0x07
line.long 0x00 "ERROR_ADDR_LO_0,ERROR_ADDR_LO_0"
line.long 0x04 "ERROR_ADDR_HI_0,ERROR_ADDR_HI_0"
group.long 0x20++0x03
line.long 0x00 "STREAMID_CTL_0,STREAMID_CTL_0"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "STREAMID_CTL_1,STREAMID_CTL_1"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "STREAMID_CTL_2,STREAMID_CTL_2"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "STREAMID_CTL_3,STREAMID_CTL_3"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "STREAMID_CTL_4,STREAMID_CTL_4"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "STREAMID_CTL_5,STREAMID_CTL_5"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "STREAMID_CTL_6,STREAMID_CTL_6"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "STREAMID_CTL_7,STREAMID_CTL_7"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "STREAMID_CTL_8,STREAMID_CTL_8"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "STREAMID_CTL_9,STREAMID_CTL_9"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "STREAMID_CTL_10,STREAMID_CTL_10"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "STREAMID_CTL_11,STREAMID_CTL_11"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "STREAMID_CTL_12,STREAMID_CTL_12"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "STREAMID_CTL_13,STREAMID_CTL_13"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x58++0x03
line.long 0x00 "STREAMID_CTL_14,STREAMID_CTL_14"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
group.long 0x5C++0x03
line.long 0x00 "STREAMID_CTL_15,STREAMID_CTL_15"
hexmask.long.byte 0x00 8.--15. 1. " STREAMID      ,StreamID output when the VMIndx field is programmed to N in a region control register"
bitfld.long 0x00 0. "             ENABLE         ,VMIndx is enabled" "Disabled,Enabled"
rgroup.long 0x60++0x07
line.long 0x00 "WRITE_BLOCK_STATUS_0,WRITE_BLOCK_STATUS_0"
line.long 0x04 "READ_BLOCK_STATUS_0,READ_BLOCK_STATUS_0"
group.long 0x100++0x1B
line.long 0x00 "REGION_0_SLAVE_BASE_LO_0,REGION_0_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_0_SLAVE_BASE_HI_0,REGION_0_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_0_MASK_LO_0,REGION_0_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_0_MASK_HI_0,REGION_0_MASK_HI_0"
line.long 0x10 "REGION_0_MASTER_BASE_LO_0,REGION_0_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_0_MASTER_BASE_HI_0,REGION_0_MASTER_BASE_HI_0"
line.long 0x18 "REGION_0_CONTROL_0,REGION_0_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x120++0x1B
line.long 0x00 "REGION_1_SLAVE_BASE_LO_0,REGION_1_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_1_SLAVE_BASE_HI_0,REGION_1_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_1_MASK_LO_0,REGION_1_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_1_MASK_HI_0,REGION_1_MASK_HI_0"
line.long 0x10 "REGION_1_MASTER_BASE_LO_0,REGION_1_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_1_MASTER_BASE_HI_0,REGION_1_MASTER_BASE_HI_0"
line.long 0x18 "REGION_1_CONTROL_0,REGION_1_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x140++0x1B
line.long 0x00 "REGION_2_SLAVE_BASE_LO_0,REGION_2_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_2_SLAVE_BASE_HI_0,REGION_2_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_2_MASK_LO_0,REGION_2_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_2_MASK_HI_0,REGION_2_MASK_HI_0"
line.long 0x10 "REGION_2_MASTER_BASE_LO_0,REGION_2_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_2_MASTER_BASE_HI_0,REGION_2_MASTER_BASE_HI_0"
line.long 0x18 "REGION_2_CONTROL_0,REGION_2_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x160++0x1B
line.long 0x00 "REGION_3_SLAVE_BASE_LO_0,REGION_3_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_3_SLAVE_BASE_HI_0,REGION_3_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_3_MASK_LO_0,REGION_3_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_3_MASK_HI_0,REGION_3_MASK_HI_0"
line.long 0x10 "REGION_3_MASTER_BASE_LO_0,REGION_3_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_3_MASTER_BASE_HI_0,REGION_3_MASTER_BASE_HI_0"
line.long 0x18 "REGION_3_CONTROL_0,REGION_3_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x180++0x1B
line.long 0x00 "REGION_4_SLAVE_BASE_LO_0,REGION_4_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_4_SLAVE_BASE_HI_0,REGION_4_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_4_MASK_LO_0,REGION_4_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_4_MASK_HI_0,REGION_4_MASK_HI_0"
line.long 0x10 "REGION_4_MASTER_BASE_LO_0,REGION_4_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_4_MASTER_BASE_HI_0,REGION_4_MASTER_BASE_HI_0"
line.long 0x18 "REGION_4_CONTROL_0,REGION_4_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x1A0++0x1B
line.long 0x00 "REGION_5_SLAVE_BASE_LO_0,REGION_5_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_5_SLAVE_BASE_HI_0,REGION_5_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_5_MASK_LO_0,REGION_5_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_5_MASK_HI_0,REGION_5_MASK_HI_0"
line.long 0x10 "REGION_5_MASTER_BASE_LO_0,REGION_5_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_5_MASTER_BASE_HI_0,REGION_5_MASTER_BASE_HI_0"
line.long 0x18 "REGION_5_CONTROL_0,REGION_5_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x1C0++0x1B
line.long 0x00 "REGION_6_SLAVE_BASE_LO_0,REGION_6_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_6_SLAVE_BASE_HI_0,REGION_6_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_6_MASK_LO_0,REGION_6_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_6_MASK_HI_0,REGION_6_MASK_HI_0"
line.long 0x10 "REGION_6_MASTER_BASE_LO_0,REGION_6_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_6_MASTER_BASE_HI_0,REGION_6_MASTER_BASE_HI_0"
line.long 0x18 "REGION_6_CONTROL_0,REGION_6_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
group.long 0x1E0++0x1B
line.long 0x00 "REGION_7_SLAVE_BASE_LO_0,REGION_7_SLAVE_BASE_LO_0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " SLVBASE       ,SlvBase"
bitfld.long 0x00 0. "         ENABLE         ,Enable" "Disabled,Enabled"
line.long 0x04 "REGION_7_SLAVE_BASE_HI_0,REGION_7_SLAVE_BASE_HI_0"
line.long 0x08 "REGION_7_MASK_LO_0,REGION_7_MASK_LO_0"
hexmask.long.tbyte 0x08 12.--31. 1. " MASK          ,Mask"
line.long 0x0C "REGION_7_MASK_HI_0,REGION_7_MASK_HI_0"
line.long 0x10 "REGION_7_MASTER_BASE_LO_0,REGION_7_MASTER_BASE_LO_0"
hexmask.long.tbyte 0x10 12.--31. 0x10 " MASTBASE      ,Master Base"
line.long 0x14 "REGION_7_MASTER_BASE_HI_0,REGION_7_MASTER_BASE_HI_0"
line.long 0x18 "REGION_7_CONTROL_0,REGION_7_CONTROL_0"
bitfld.long 0x18 19. " PHYSICAL      ,Physical" "0,1"
bitfld.long 0x18 15.--18. "              VMINDEX        ,VM Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 14. "          VPRPASSTHRU   ,Vpr Pass Thru" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x18 13. " VPRWR         ,Vpr Wr" "0,1"
bitfld.long 0x18 12. "              VPRRD          ,Vpr Rd" "0,1"
bitfld.long 0x18 10.--11. "           CARVEOUTAL    ,Carve Out AL" "0,1,2,3"
textline "                                     "
bitfld.long 0x18 5.--9. " CARVEOUTID    ,Carve Out ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x18 4. "             NSPASSTHRU     ,NS Pass Thru" "Disabled,Enabled"
bitfld.long 0x18 3. "    NS            ,NS" "Secure,Non secure"
textline "                                     "
bitfld.long 0x18 2. " SNOOP         ,Snoop" "Disabled,Enabled"
bitfld.long 0x18 0. "       LOCK           ,Lock" "Unlocked,Locked"
tree.end
width 0x0B
tree.end
tree "Host Controller"
tree "HOST1X COMMON"
base ad:0x13e00000
width 43.
rgroup.long 0x00++0x03
line.long 0x00 "THOST_COMMON_INTRSTATUS,THost Common Interrupt Status Register"
bitfld.long 0x00 31. " SYNCPT_CPU0_INTR                          ,Functional Non-TrustZone SYNCPT Interrupt per CPU0 cluster" "Not panding,Panding"
bitfld.long 0x00 30. "  SYNCPT_CPU1_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per CPU1 cluster" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 29. " SYNCPT_CPU2_INTR                          ,Functional Non-TrustZone SYNCPT Interrupt per CPU2 cluster" "Not panding,Panding"
bitfld.long 0x00 28. "  SYNCPT_CPU3_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per CPU3 cluster" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 10. " THOST_TZINTR                              ,This bit is set for illegal access to TrustZone Channels" "Not panding,Panding"
bitfld.long 0x00 9. "  SYNCPT_VM8_INTR                            ,Functional Non-TrustZone SYNCPT Interrupt per VM8/Guest OS" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 8. " SYNCPT_VM7_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per VM7/Guest OS" "Not panding,Panding"
bitfld.long 0x00 7. "  SYNCPT_VM6_INTR                            ,Functional Non-TrustZone SYNCPT Interrupt per VM6/Guest OS" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 6. " SYNCPT_VM5_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per VM5/Guest OS" "Not panding,Panding"
bitfld.long 0x00 5. "  SYNCPT_VM4_INTR                            ,Functional Non-TrustZone SYNCPT Interrupt per VM4/Guest OS" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 4. " SYNCPT_VM3_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per VM3/Guest OS" "Not panding,Panding"
bitfld.long 0x00 3. "  SYNCPT_VM2_INTR                            ,Functional Non-TrustZone SYNCPT Interrupt per VM2/Guest OS" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 2. " SYNCPT_VM1_INTR                           ,Functional Non-TrustZone SYNCPT Interrupt per VM1/Guest OS" "Not panding,Panding"
bitfld.long 0x00 1. "  TZSYNCPT_CPU_INTR                          ,Functional TrustZone-SYNCPT Interrupt" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 0. " THOST_INTR                                ,CPU/AXI Interface Time-out Related Interrupt for Read/Write Requests" "Not panding,Panding"
group.long 0x04++0x0B
line.long 0x00 "THOST_COMMON_INTR_CPU0_MASK,THOST Common Interrupt CPU0 Mask Register"
bitfld.long 0x00 0. " THOST_INTRMASK_CPU0                       ,THOST interrupt mask for CPU0" "Disabled,Enabled"
line.long 0x04 "THOST_COMMON_INTR_CPU1_MASK,THOST Common Interrupt CPU1 Mask Register"
bitfld.long 0x04 0. " THOST_INTRMASK_CPU1                       ,THOST interrupt mask for CPU1" "Disabled,Enabled"
line.long 0x08 "THOST_COMMON_TZINTR_CPU_MASK,THOST Common TrustZone Interrupt CPU Mask Register"
bitfld.long 0x08 0. " THOST_TZINTRMASK_CPU                      ,THOST TrustZone interrupt mask for CPU" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "THOST_COMMON_THOST_INTRSTATUS,THOST Common THOST Interrupt Status Register"
bitfld.long 0x00 31. " ILLEGAL_SYNCPT_ACCESS_MMIO_INTR           ,Illegal SYNCPT access MMIO interrupt status" "Not panding,Panding"
bitfld.long 0x00 30. "  ILLEGAL_SYNCPT_ACCESS_CLIENT_INTR          ,Illegal SYNCPT access CLIENT interrupt status" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 29. " ILLEGAL_SYNCPT_ACCESS_GPU_INTR            ,Illegal SYNCPT access GPU interrupt status" "Not panding,Panding"
bitfld.long 0x00 28. "  ILLEGAL_SYNCPT_ACCESS_PB_INTR              ,Illegal SYNCPT access Push Buffer interrupt status" "Not panding,Panding"
textline "                                                    "
rbitfld.long 0x00 27. " CH_ILLEGAL_ACCESS_INTR                    ,Channel illegal access interrupt status" "Not panding,Panding"
rbitfld.long 0x00 26. "  MOD_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,MOD illegal MMIO Stream-ID interrupt status" "Not panding,Panding"
textline "                                                    "
rbitfld.long 0x00 5. " NVJPG_ACTMON_INTR                         ,ACTMON interrupt status for NVJPG" "Not panding,Panding"
rbitfld.long 0x00 4. "  NVDEC_ACTMON_INTR                          ,ACTMON interrupt status for NVDEC" "Not panding,Panding"
textline "                                                    "
rbitfld.long 0x00 3. " VIC_ACTMON_INTR                           ,ACTMON interrupt status for VIC" "Not panding,Panding"
rbitfld.long 0x00 2. "  NVENC_ACTMON_INTR                          ,ACTMON interrupt status for NVENC" "Not panding,Panding"
textline "                                                    "
rbitfld.long 0x00 1. " AXIWRITE_TIMEOUT_INTR                     ,AXIWRITE Time-out interrupt status" "Not panding,Panding"
rbitfld.long 0x00 0. "  AXIREAD_TIMEOUT_INTR                       ,AXIREAD Time-out interrupt status" "Not panding,Panding"
group.long 0x30++0x03
line.long 0x00 "THOST_COMMON_THOST_INTRMASK,THOST Common THOST Interrupt Mask Register"
bitfld.long 0x00 31. " ILLEGAL_SYNCPT_ACCESS_MMIO_INTRMASK       ,Illegal SYNCPT access MMIO interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 30. "     ILLEGAL_SYNCPT_ACCESS_CLIENT_INTR          ,Illegal SYNCPT access CLIENT interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 29. " ILLEGAL_SYNCPT_ACCESS_GPU_INTR            ,Illegal SYNCPT access GPU interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 28. "     ILLEGAL_SYNCPT_ACCESS_PB_INTR              ,Illegal SYNCPT access Push Buffer interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 26. " MOD_ILLEGAL_MMIOSTRMID_ACCESS_INTR        ,MOD illegal MMIOSTRMID interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 5. " NVJPG_ACTMON_INTR                         ,ACTMON interrupt mask for NVJPG" "Not panding,Panding"
bitfld.long 0x00 4. "  NVDEC_ACTMON_INTR                          ,ACTMON interrupt mask for NVDEC" "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 3. " VIC_ACTMON_INTR                           ,ACTMON interrupt mask for VIC" "Not panding,Panding"
bitfld.long 0x00 2. "  NVENC_ACTMON_INTR                          ,ACTMON interrupt mask for NVENC " "Not panding,Panding"
textline "                                                    "
bitfld.long 0x00 1. " AXIWRITE_TIMEOUT_INTR                     ,AXIWRITE Time-out interrupt mask" "Not panding,Panding"
bitfld.long 0x00 0. "  AXIREAD_TIMEOUT_INTR                       ,AXIREAD Time-out interrupt mask" "Not panding,Panding"
group.long 0x44++0x03
line.long 0x00 "THOST_COMMON_THOST_GLOBAL_INTRMASK,THOST Common Global Interrupt Mask Register"
bitfld.long 0x00 1. " CPU1_INTRMASK_ALL                         ,Global Interrupt Mask for CPU1" "Disabled,Enabled"
bitfld.long 0x00 0. "     CPU0_INTRMASK_ALL                          ,Global Interrupt Mask for CPU0" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "THOST_COMMON_THOST_GLOBAL_SYNCPT_INTRMASK,THOST Common Global Interrupt Mask Register"
bitfld.long 0x00 15. " VM1_SYNCPT_INTRMASK_ALL                   ,Virtual Machine 1 interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 14. "     VM2_SYNCPT_INTRMASK_ALL                    ,Virtual Machine 2 interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 13. " VM3_SYNCPT_INTRMASK_ALL                   ,Virtual Machine 3 interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 12. "     VM4_SYNCPT_INTRMASK_ALL                    ,Virtual Machine 4 interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 11. " VM5_SYNCPT_INTRMASK_ALL                   ,Virtual Machine 5 interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 10. "     VM6_SYNCPT_INTRMASK_ALL                    ,Virtual Machine 6 interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 9. " VM7_SYNCPT_INTRMASK_ALL                   ,Virtual Machine 7 interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 8. "     VM8_SYNCPT_INTRMASK_ALL                    ,Virtual Machine 8 interrupt mask" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 3. " CPU3_SYNCPT_INTRMASK_ALL                  ,SYNCPT interrupt mask for CPU3" "Disabled,Enabled"
bitfld.long 0x00 2. "     CPU2_SYNCPT_INTRMASK_ALL                   ,SYNCPT interrupt mask for CPU2" "Disabled,Enabled"
textline "                                                    "
bitfld.long 0x00 1. " CPU1_SYNCPT_INTRMASK_ALL                  ,SYNCPT interrupt mask for CPU1" "Disabled,Enabled"
bitfld.long 0x00 0. "     CPU0_SYNCPT_INTRMASK_ALL                   ,SYNCPT interrupt mask for CPU0" "Disabled,Enabled"
tree "Syncpt Threshold Interrupt CPU0"
width 21.
group.long 0x54++0x03
line.long 0x00 "INTRSTATUS_CPU0_0,Syncpt Threshold Interrupt Status CPU0 Register 0"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x58++0x03
line.long 0x00 "INTRSTATUS_CPU0_1,Syncpt Threshold Interrupt Status CPU0 Register 1"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x5C++0x03
line.long 0x00 "INTRSTATUS_CPU0_2,Syncpt Threshold Interrupt Status CPU0 Register 2"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x60++0x03
line.long 0x00 "INTRSTATUS_CPU0_3,Syncpt Threshold Interrupt Status CPU0 Register 3"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x64++0x03
line.long 0x00 "INTRSTATUS_CPU0_4,Syncpt Threshold Interrupt Status CPU0 Register 4"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x68++0x03
line.long 0x00 "INTRSTATUS_CPU0_5,Syncpt Threshold Interrupt Status CPU0 Register 5"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x6C++0x03
line.long 0x00 "INTRSTATUS_CPU0_6,Syncpt Threshold Interrupt Status CPU0 Register 6"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x70++0x03
line.long 0x00 "INTRSTATUS_CPU0_7,Syncpt Threshold Interrupt Status CPU0 Register 7"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x74++0x03
line.long 0x00 "INTRSTATUS_CPU0_8,Syncpt Threshold Interrupt Status CPU0 Register 8"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x78++0x03
line.long 0x00 "INTRSTATUS_CPU0_9,Syncpt Threshold Interrupt Status CPU0 Register 9"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x7C++0x03
line.long 0x00 "INTRSTATUS_CPU0_10,Syncpt Threshold Interrupt Status CPU0 Register 10"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x80++0x03
line.long 0x00 "INTRSTATUS_CPU0_11,Syncpt Threshold Interrupt Status CPU0 Register 11"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x84++0x03
line.long 0x00 "INTRSTATUS_CPU0_12,Syncpt Threshold Interrupt Status CPU0 Register 12"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x88++0x03
line.long 0x00 "INTRSTATUS_CPU0_13,Syncpt Threshold Interrupt Status CPU0 Register 13"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x8C++0x03
line.long 0x00 "INTRSTATUS_CPU0_14,Syncpt Threshold Interrupt Status CPU0 Register 14"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x90++0x03
line.long 0x00 "INTRSTATUS_CPU0_15,Syncpt Threshold Interrupt Status CPU0 Register 15"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x94++0x03
line.long 0x00 "INTRSTATUS_CPU0_16,Syncpt Threshold Interrupt Status CPU0 Register 16"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x98++0x03
line.long 0x00 "INTRSTATUS_CPU0_17,Syncpt Threshold Interrupt Status CPU0 Register 17"
eventfld.long 0x00 31. " INTRSTATUS_CPU0_7[3]   ,Syncpt threshold interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU0_6[3]   ,Syncpt threshold interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU0_5[3]   ,Syncpt threshold interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU0_4[3]   ,Syncpt threshold interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU0_3[3]   ,Syncpt threshold interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU0_2[3]   ,Syncpt threshold interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU0_1[3]   ,Syncpt threshold interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU0_0[3]   ,Syncpt threshold interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x11C++0x03
line.long 0x00 "INTRDISABLE_CPU0_0,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x120++0x03
line.long 0x00 "INTRDISABLE_CPU0_1,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x124++0x03
line.long 0x00 "INTRDISABLE_CPU0_2,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x128++0x03
line.long 0x00 "INTRDISABLE_CPU0_3,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x12C++0x03
line.long 0x00 "INTRDISABLE_CPU0_4,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x130++0x03
line.long 0x00 "INTRDISABLE_CPU0_5,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x134++0x03
line.long 0x00 "INTRDISABLE_CPU0_6,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x138++0x03
line.long 0x00 "INTRDISABLE_CPU0_7,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x13C++0x03
line.long 0x00 "INTRDISABLE_CPU0_8,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x140++0x03
line.long 0x00 "INTRDISABLE_CPU0_9,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x144++0x03
line.long 0x00 "INTRDISABLE_CPU0_10,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x148++0x03
line.long 0x00 "INTRDISABLE_CPU0_11,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x14C++0x03
line.long 0x00 "INTRDISABLE_CPU0_12,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x150++0x03
line.long 0x00 "INTRDISABLE_CPU0_13,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x154++0x03
line.long 0x00 "INTRDISABLE_CPU0_14,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x158++0x03
line.long 0x00 "INTRDISABLE_CPU0_15,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x15C++0x03
line.long 0x00 "INTRDISABLE_CPU0_16,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x160++0x03
line.long 0x00 "INTRDISABLE_CPU0_17,THost Common Syncpt Threshold Interrupt Disable"
bitfld.long 0x00 31. " INTRDISABLE_CPU0_7[3]  ,Syncpt threshold interrupt disable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt disable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt disable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU0_6[3]  ,Syncpt threshold interrupt disable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt disable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt disable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU0_5[3]  ,Syncpt threshold interrupt disable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt disable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt disable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU0_4[3]  ,Syncpt threshold interrupt disable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt disable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt disable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU0_3[3]  ,Syncpt threshold interrupt disable for CPU0_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt disable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt disable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU0_2[3]  ,Syncpt threshold interrupt disable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt disable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt disable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU0_1[3]  ,Syncpt threshold interrupt disable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt disable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt disable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU0_0[3]  ,Syncpt threshold interrupt disable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt disable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt disable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x180++0x03
line.long 0x00 "INTRENABLE_CPU0_0,Syncpt Threshold Interrupt Enable CPU0 Register 0x180"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x184++0x03
line.long 0x00 "INTRENABLE_CPU0_1,Syncpt Threshold Interrupt Enable CPU0 Register 0x184"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x188++0x03
line.long 0x00 "INTRENABLE_CPU0_2,Syncpt Threshold Interrupt Enable CPU0 Register 0x188"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x18C++0x03
line.long 0x00 "INTRENABLE_CPU0_3,Syncpt Threshold Interrupt Enable CPU0 Register 0x18C"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x190++0x03
line.long 0x00 "INTRENABLE_CPU0_4,Syncpt Threshold Interrupt Enable CPU0 Register 0x190"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x194++0x03
line.long 0x00 "INTRENABLE_CPU0_5,Syncpt Threshold Interrupt Enable CPU0 Register 0x194"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x198++0x03
line.long 0x00 "INTRENABLE_CPU0_6,Syncpt Threshold Interrupt Enable CPU0 Register 0x198"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x19C++0x03
line.long 0x00 "INTRENABLE_CPU0_7,Syncpt Threshold Interrupt Enable CPU0 Register 0x19C"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1A0++0x03
line.long 0x00 "INTRENABLE_CPU0_8,Syncpt Threshold Interrupt Enable CPU0 Register 0x1A0"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1A4++0x03
line.long 0x00 "INTRENABLE_CPU0_9,Syncpt Threshold Interrupt Enable CPU0 Register 0x1A4"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1A8++0x03
line.long 0x00 "INTRENABLE_CPU0_10,Syncpt Threshold Interrupt Enable CPU0 Register 0x1A8"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1AC++0x03
line.long 0x00 "INTRENABLE_CPU0_11,Syncpt Threshold Interrupt Enable CPU0 Register 0x1AC"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1B0++0x03
line.long 0x00 "INTRENABLE_CPU0_12,Syncpt Threshold Interrupt Enable CPU0 Register 0x1B0"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1B4++0x03
line.long 0x00 "INTRENABLE_CPU0_13,Syncpt Threshold Interrupt Enable CPU0 Register 0x1B4"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1B8++0x03
line.long 0x00 "INTRENABLE_CPU0_14,Syncpt Threshold Interrupt Enable CPU0 Register 0x1B8"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1BC++0x03
line.long 0x00 "INTRENABLE_CPU0_15,Syncpt Threshold Interrupt Enable CPU0 Register 0x1BC"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1C0++0x03
line.long 0x00 "INTRENABLE_CPU0_16,Syncpt Threshold Interrupt Enable CPU0 Register 0x1C0"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
group.long 0x1C4++0x03
line.long 0x00 "INTRENABLE_CPU0_17,Syncpt Threshold Interrupt Enable CPU0 Register 0x1C4"
bitfld.long 0x00 31. " INTRENABLE_CPU0_7[3]   ,Syncpt threshold interrupt enable for CPU0_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]   ,Syncpt threshold interrupt enable for CPU0_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]   ,Syncpt threshold interrupt enable for CPU0_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU0_6[3]   ,Syncpt threshold interrupt enable for CPU0_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]   ,Syncpt threshold interrupt enable for CPU0_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]   ,Syncpt threshold interrupt enable for CPU0_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU0_5[3]   ,Syncpt threshold interrupt enable for CPU0_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]   ,Syncpt threshold interrupt enable for CPU0_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]   ,Syncpt threshold interrupt enable for CPU0_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU0_4[3]   ,Syncpt threshold interrupt enable for CPU0_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]   ,Syncpt threshold interrupt enable for CPU0_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]   ,Syncpt threshold interrupt enable for CPU0_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU0_3[3]   ,Syncpt threshold interrupt enable for CPU0_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]   ,Syncpt threshold interrupt enable for CPU0_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]   ,Syncpt threshold interrupt enable for CPU0_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU0_2[3]   ,Syncpt threshold interrupt enable for CPU0_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]   ,Syncpt threshold interrupt enable for CPU0_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]   ,Syncpt threshold interrupt enable for CPU0_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU0_1[3]   ,Syncpt threshold interrupt enable for CPU0_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]   ,Syncpt threshold interrupt enable for CPU0_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]   ,Syncpt threshold interrupt enable for CPU0_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU0_0[3]   ,Syncpt threshold interrupt enable for CPU0_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]   ,Syncpt threshold interrupt enable for CPU0_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU0_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]   ,Syncpt threshold interrupt enable for CPU0_0_[0]" "Not panding,Panding"
tree.end
tree "Syncpt Threshold Interrupt CPU1"
width 21.
group.long 0x1E4++0x03
line.long 0x00 "INTRSTATUS_CPU1_0,THost Common Syncpt Threshold Interrupt Status CPU1 Register 0"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1E8++0x03
line.long 0x00 "INTRSTATUS_CPU1_1,THost Common Syncpt Threshold Interrupt Status CPU1 Register 1"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1EC++0x03
line.long 0x00 "INTRSTATUS_CPU1_2,THost Common Syncpt Threshold Interrupt Status CPU1 Register 2"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1F0++0x03
line.long 0x00 "INTRSTATUS_CPU1_3,THost Common Syncpt Threshold Interrupt Status CPU1 Register 3"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1F4++0x03
line.long 0x00 "INTRSTATUS_CPU1_4,THost Common Syncpt Threshold Interrupt Status CPU1 Register 4"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1F8++0x03
line.long 0x00 "INTRSTATUS_CPU1_5,THost Common Syncpt Threshold Interrupt Status CPU1 Register 5"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x1FC++0x03
line.long 0x00 "INTRSTATUS_CPU1_6,THost Common Syncpt Threshold Interrupt Status CPU1 Register 6"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x200++0x03
line.long 0x00 "INTRSTATUS_CPU1_7,THost Common Syncpt Threshold Interrupt Status CPU1 Register 7"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x204++0x03
line.long 0x00 "INTRSTATUS_CPU1_8,THost Common Syncpt Threshold Interrupt Status CPU1 Register 8"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x208++0x03
line.long 0x00 "INTRSTATUS_CPU1_9,THost Common Syncpt Threshold Interrupt Status CPU1 Register 9"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x20C++0x03
line.long 0x00 "INTRSTATUS_CPU1_10,THost Common Syncpt Threshold Interrupt Status CPU1 Register 10"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x210++0x03
line.long 0x00 "INTRSTATUS_CPU1_11,THost Common Syncpt Threshold Interrupt Status CPU1 Register 11"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x214++0x03
line.long 0x00 "INTRSTATUS_CPU1_12,THost Common Syncpt Threshold Interrupt Status CPU1 Register 12"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x218++0x03
line.long 0x00 "INTRSTATUS_CPU1_13,THost Common Syncpt Threshold Interrupt Status CPU1 Register 13"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x21C++0x03
line.long 0x00 "INTRSTATUS_CPU1_14,THost Common Syncpt Threshold Interrupt Status CPU1 Register 14"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x220++0x03
line.long 0x00 "INTRSTATUS_CPU1_15,THost Common Syncpt Threshold Interrupt Status CPU1 Register 15"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x224++0x03
line.long 0x00 "INTRSTATUS_CPU1_16,THost Common Syncpt Threshold Interrupt Status CPU1 Register 16"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x228++0x03
line.long 0x00 "INTRSTATUS_CPU1_17,THost Common Syncpt Threshold Interrupt Status CPU1 Register 17"
eventfld.long 0x00 31. " INTRSTATUS_CPU1_7[3]   ,Syncpt threshold interrupt status for CPU1_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU1_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 27. " INTRSTATUS_CPU1_6[3]   ,Syncpt threshold interrupt status for CPU1_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU1_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 23. " INTRSTATUS_CPU1_5[3]   ,Syncpt threshold interrupt status for CPU1_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU1_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 19. " INTRSTATUS_CPU1_4[3]   ,Syncpt threshold interrupt status for CPU1_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU1_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 15. " INTRSTATUS_CPU1_3[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 11. " INTRSTATUS_CPU1_2[3]   ,Syncpt threshold interrupt status for CPU1_3_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU1_3_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 7. " INTRSTATUS_CPU1_1[3]   ,Syncpt threshold interrupt status for CPU1_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU1_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 3. " INTRSTATUS_CPU1_0[3]   ,Syncpt threshold interrupt status for CPU1_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU1_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2AC++0x03
line.long 0x00 "INTRDISABLE_CPU1_0,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 0"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2B0++0x03
line.long 0x00 "INTRDISABLE_CPU1_1,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 1"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2B4++0x03
line.long 0x00 "INTRDISABLE_CPU1_2,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 2"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2B8++0x03
line.long 0x00 "INTRDISABLE_CPU1_3,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 3"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2BC++0x03
line.long 0x00 "INTRDISABLE_CPU1_4,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 4"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2C0++0x03
line.long 0x00 "INTRDISABLE_CPU1_5,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 5"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2C4++0x03
line.long 0x00 "INTRDISABLE_CPU1_6,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 6"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2C8++0x03
line.long 0x00 "INTRDISABLE_CPU1_7,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 7"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2CC++0x03
line.long 0x00 "INTRDISABLE_CPU1_8,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 8"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2D0++0x03
line.long 0x00 "INTRDISABLE_CPU1_9,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 9"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2D4++0x03
line.long 0x00 "INTRDISABLE_CPU1_10,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 10"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2D8++0x03
line.long 0x00 "INTRDISABLE_CPU1_11,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 11"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2DC++0x03
line.long 0x00 "INTRDISABLE_CPU1_12,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 12"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2E0++0x03
line.long 0x00 "INTRDISABLE_CPU1_13,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 13"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2E4++0x03
line.long 0x00 "INTRDISABLE_CPU1_14,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 14"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2E8++0x03
line.long 0x00 "INTRDISABLE_CPU1_15,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 15"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2EC++0x03
line.long 0x00 "INTRDISABLE_CPU1_16,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 16"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x2F0++0x03
line.long 0x00 "INTRDISABLE_CPU1_17,THost Common Syncpt Threshold Interrupt Disable CPU1 Register 17"
bitfld.long 0x00 31. " INTRDISABLE_CPU1_7[3]  ,Syncpt threshold interrupt disable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRDISABLE_CPU1_6[3]  ,Syncpt threshold interrupt disable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRDISABLE_CPU1_5[3]  ,Syncpt threshold interrupt disable for CPU1_5" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRDISABLE_CPU1_4[3]  ,Syncpt threshold interrupt disable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRDISABLE_CPU1_3[3]  ,Syncpt threshold interrupt disable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRDISABLE_CPU1_2[3]  ,Syncpt threshold interrupt disable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRDISABLE_CPU1_1[3]  ,Syncpt threshold interrupt disable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRDISABLE_CPU1_0[3]  ,Syncpt threshold interrupt disable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x310++0x03
line.long 0x00 "INTRENABLE_CPU1_0,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x310"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x314++0x03
line.long 0x00 "INTRENABLE_CPU1_1,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x314"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x318++0x03
line.long 0x00 "INTRENABLE_CPU1_2,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x318"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x31C++0x03
line.long 0x00 "INTRENABLE_CPU1_3,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x31C"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x320++0x03
line.long 0x00 "INTRENABLE_CPU1_4,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x320"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x324++0x03
line.long 0x00 "INTRENABLE_CPU1_5,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x324"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x328++0x03
line.long 0x00 "INTRENABLE_CPU1_6,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x328"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x32C++0x03
line.long 0x00 "INTRENABLE_CPU1_7,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x32C"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x330++0x03
line.long 0x00 "INTRENABLE_CPU1_8,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x330"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x334++0x03
line.long 0x00 "INTRENABLE_CPU1_9,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x334"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x338++0x03
line.long 0x00 "INTRENABLE_CPU1_10,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x338"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x33C++0x03
line.long 0x00 "INTRENABLE_CPU1_11,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x33C"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x340++0x03
line.long 0x00 "INTRENABLE_CPU1_12,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x340"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x344++0x03
line.long 0x00 "INTRENABLE_CPU1_13,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x344"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x348++0x03
line.long 0x00 "INTRENABLE_CPU1_14,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x348"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x34C++0x03
line.long 0x00 "INTRENABLE_CPU1_15,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x34C"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x350++0x03
line.long 0x00 "INTRENABLE_CPU1_16,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x350"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
group.long 0x354++0x03
line.long 0x00 "INTRENABLE_CPU1_17,THost Common Syncpt Threshold Interrupt Enable CPU1 Register 0x354"
bitfld.long 0x00 31. " INTRENABLE_CPU1_7[3]   ,Syncpt threshold interrupt enable for CPU1_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU1_7_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU1_7_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 27. " INTRENABLE_CPU1_6[3]   ,Syncpt threshold interrupt enable for CPU1_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU1_6_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU1_6_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 23. " INTRENABLE_CPU1_5[3]   ,Syncpt threshold interrupt enable for CPU1_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU1_5_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU1_5_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 19. " INTRENABLE_CPU1_4[3]   ,Syncpt threshold interrupt enable for CPU1_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU1_4_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU1_4_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 15. " INTRENABLE_CPU1_3[3]   ,Syncpt threshold interrupt enable for CPU1_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU1_3_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU1_3_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 11. " INTRENABLE_CPU1_2[3]   ,Syncpt threshold interrupt enable for CPU1_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU1_2_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU1_2_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 7. " INTRENABLE_CPU1_1[3]   ,Syncpt threshold interrupt enable for CPU1_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU1_1_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU1_1_[0]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 3. " INTRENABLE_CPU1_0[3]   ,Syncpt threshold interrupt enable for CPU1_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU1_0_[2]" "Not panding,Panding"
textline "                              "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU1_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU1_0_[0]" "Not panding,Panding"
tree.end
tree "Sync Point Watch Registers for GPU Interface"
width 30.
group.long 0x3D8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_0,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3DC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_1,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3E0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_2,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3E4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_3,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3E8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_4,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3EC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_5,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3F0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_6,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3F4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_7,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3F8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_8,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x3FC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_9,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x400++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_10,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x404++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_11,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x408++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_12,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x40C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_13,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x410++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_14,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x414++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_15,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x418++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_16,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
group.long 0x41C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_WATCH_17,THost Common Sync Point Watch GPU Interface Register"
bitfld.long 0x00 31. " SYNCPT_WATCH_7[3]   ,Point watch 7_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,Point watch 7_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 29. "               [1]   ,Point watch 7_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,Point watch 7_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " SYNCPT_WATCH_6[3]   ,Point watch 6_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,Point watch 6_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. "               [1]   ,Point watch 6_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,Point watch 6_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 23. " SYNCPT_WATCH_5[3]   ,Point watch 5 for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,Point watch 5_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. "               [1]   ,Point watch 5_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,Point watch 5_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " SYNCPT_WATCH_4[3]   ,Point watch 4_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,Point watch 4_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 17. "               [1]   ,Point watch 4_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,Point watch 4_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 15. " SYNCPT_WATCH_3[3]   ,Point watch 3_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,Point watch 3_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. "               [1]   ,Point watch 3_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,Point watch 3_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " SYNCPT_WATCH_2[3]   ,Point watch 2_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,Point watch 2_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. "               [1]   ,Point watch 2_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,Point watch 2_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " SYNCPT_WATCH_1[3]   ,Point watch 1_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,Point watch 1_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. "               [1]   ,Point watch 1_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,Point watch 1_[0] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 3. " SYNCPT_WATCH_0[3]   ,Point watch 0_[3] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,Point watch 0_[2] for GPU interface" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. "               [1]   ,Point watch 0_[1] for GPU interface" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,Point watch 0_[0] for GPU interface" "Disabled,Enabled"
tree.end
tree "TrustZone Nonsecure Sync Point Registers"
width 37.
group.long 0x43C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE0_0,THost Common TrustZone Nonsecure Sync Point Register 0"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x440++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE1_0,THost Common TrustZone Nonsecure Sync Point Register 1"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x444++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE2_0,THost Common TrustZone Nonsecure Sync Point Register 2"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x448++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE3_0,THost Common TrustZone Nonsecure Sync Point Register 3"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x44C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE4_0,THost Common TrustZone Nonsecure Sync Point Register 4"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x450++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE5_0,THost Common TrustZone Nonsecure Sync Point Register 5"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x454++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE6_0,THost Common TrustZone Nonsecure Sync Point Register 6"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x458++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE7_0,THost Common TrustZone Nonsecure Sync Point Register 7"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x45C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE8_0,THost Common TrustZone Nonsecure Sync Point Register 8"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x460++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE9_0,THost Common TrustZone Nonsecure Sync Point Register 9"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x464++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE10_0,THost Common TrustZone Nonsecure Sync Point Register 10"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x468++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE11_0,THost Common TrustZone Nonsecure Sync Point Register 11"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x46C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE12_0,THost Common TrustZone Nonsecure Sync Point Register 12"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x470++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE13_0,THost Common TrustZone Nonsecure Sync Point Register 13"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x474++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE14_0,THost Common TrustZone Nonsecure Sync Point Register 14"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x478++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE15_0,THost Common TrustZone Nonsecure Sync Point Register 15"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x47C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE16_0,THost Common TrustZone Nonsecure Sync Point Register 16"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
group.long 0x480++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_TZNONSECURE17_0,THost Common TrustZone Nonsecure Sync Point Register 17"
bitfld.long 0x00 31. " SYNCPT_TZNONSECURE_7[3]   ,TrustZone Nonsecure Point 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]  ,TrustZone Nonsecure Point 7_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 29. "                     [1]   ,TrustZone Nonsecure Point 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]  ,TrustZone Nonsecure Point 7_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 27. " SYNCPT_TZNONSECURE_6[3]   ,TrustZone Nonsecure Point 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]  ,TrustZone Nonsecure Point 6_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 25. "                     [1]   ,TrustZone Nonsecure Point 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]  ,TrustZone Nonsecure Point 6_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 23. " SYNCPT_TZNONSECURE_5[3]   ,TrustZone Nonsecure Point 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]  ,TrustZone Nonsecure Point 5_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 21. "                     [1]   ,TrustZone Nonsecure Point 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]  ,TrustZone Nonsecure Point 5_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 19. " SYNCPT_TZNONSECURE_4[3]   ,TrustZone Nonsecure Point 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]  ,TrustZone Nonsecure Point 4_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 17. "                     [1]   ,TrustZone Nonsecure Point 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]  ,TrustZone Nonsecure Point 4_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 15. " SYNCPT_TZNONSECURE_3[3]   ,TrustZone Nonsecure Point 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]  ,TrustZone Nonsecure Point 3_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 13. "                     [1]   ,TrustZone Nonsecure Point 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]  ,TrustZone Nonsecure Point 3_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 11. " SYNCPT_TZNONSECURE_2[3]   ,TrustZone Nonsecure Point 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]  ,TrustZone Nonsecure Point 2_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 9. "                     [1]   ,TrustZone Nonsecure Point 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]  ,TrustZone Nonsecure Point 2_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 7. " SYNCPT_TZNONSECURE_1[3]   ,TrustZone Nonsecure Point 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]  ,TrustZone Nonsecure Point 1_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 5. "                     [1]   ,TrustZone Nonsecure Point 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]  ,TrustZone Nonsecure Point 1_[0]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 3. " SYNCPT_TZNONSECURE_0[3]   ,TrustZone Nonsecure Point 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]  ,TrustZone Nonsecure Point 0_[2]" "Disabled,Enabled"
textline "                                              "
bitfld.long 0x00 1. "                     [1]   ,TrustZone Nonsecure Point 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]  ,TrustZone Nonsecure Point 0_[0]" "Disabled,Enabled"
tree.end
textline "                                                          "
width 38.
group.long 0x4A0++0x03
line.long 0x00 "THOST_COMMON_THOST_GLOBAL_TZINTRMASK,THost Common Host Global Interrupt Mask TZCPU Register"
bitfld.long 0x00 1. " CPU_TZINTRMASK_ALL  ,CPU TrustZone interrupt mask" "Disabled,Enabled"
bitfld.long 0x00 0. "     CPU_TZSYNCPT_INTRMASK_ALL  ,CPU TrustZone Sync Point interrupt mask" "Disabled,Enabled"
tree "TrustZone Syncpt Threshold Interrupt CPU0"
width 49.
group.long 0x4A4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_0,THost Common TrustZone Syncpt Threshold Interrupt Status Register 0"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4A8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_1,THost Common TrustZone Syncpt Threshold Interrupt Status Register 1"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4AC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_2,THost Common TrustZone Syncpt Threshold Interrupt Status Register 2"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4B0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_3,THost Common TrustZone Syncpt Threshold Interrupt Status Register 3"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4B4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_4,THost Common TrustZone Syncpt Threshold Interrupt Status Register 4"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4B8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_5,THost Common TrustZone Syncpt Threshold Interrupt Status Register 5"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4BC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_6,THost Common TrustZone Syncpt Threshold Interrupt Status Register 6"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4C0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_7,THost Common TrustZone Syncpt Threshold Interrupt Status Register 7"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4C4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_8,THost Common TrustZone Syncpt Threshold Interrupt Status Register 8"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4C8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_9,THost Common TrustZone Syncpt Threshold Interrupt Status Register 9"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4CC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_10,THost Common TrustZone Syncpt Threshold Interrupt Status Register 10"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4D0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_11,THost Common TrustZone Syncpt Threshold Interrupt Status Register 11"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4D4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_12,THost Common TrustZone Syncpt Threshold Interrupt Status Register 12"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4D8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_13,THost Common TrustZone Syncpt Threshold Interrupt Status Register 13"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4DC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_14,THost Common TrustZone Syncpt Threshold Interrupt Status Register 14"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4E0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_15,THost Common TrustZone Syncpt Threshold Interrupt Status Register 15"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4E4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_16,THost Common TrustZone Syncpt Threshold Interrupt Status Register 16"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x4E8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRSTATUS_CPU_17,THost Common TrustZone Syncpt Threshold Interrupt Status Register 17"
eventfld.long 0x00 31. " INTRSTATUS_CPU_7[3]   ,TrustZone interrupt status for CPU0_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU0_7_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 29. "                 [1]   ,TrustZone interrupt status for CPU0_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU0_7_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 27. " INTRSTATUS_CPU_6[3]   ,TrustZone interrupt status for CPU0_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU0_6_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 25. "                 [1]   ,TrustZone interrupt status for CPU0_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU0_6_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 23. " INTRSTATUS_CPU_5[3]   ,TrustZone interrupt status for CPU0_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU0_5_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 21. "                 [1]   ,TrustZone interrupt status for CPU0_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU0_5_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 19. " INTRSTATUS_CPU_4[3]   ,TrustZone interrupt status for CPU0_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU0_4_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 17. "                 [1]   ,TrustZone interrupt status for CPU0_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU0_4_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 15. " INTRSTATUS_CPU_3[3]   ,TrustZone interrupt status for CPU0_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU0_3_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 13. "                 [1]   ,TrustZone interrupt status for CPU0_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU0_3_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 11. " INTRSTATUS_CPU_2[3]   ,TrustZone interrupt status for CPU0_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU0_2_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 9. "                 [1]   ,TrustZone interrupt status for CPU0_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU0_2_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 7. " INTRSTATUS_CPU_1[3]   ,TrustZone interrupt status for CPU0_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU0_1_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 5. "                 [1]   ,TrustZone interrupt status for CPU0_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU0_1_[0]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 3. " INTRSTATUS_CPU_0[3]   ,TrustZone interrupt status for CPU0_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU0_0_[2]" "Not panding,Panding"
textline "                                                          "
eventfld.long 0x00 1. "                 [1]   ,TrustZone interrupt status for CPU0_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU0_0_[0]" "Not panding,Panding"
group.long 0x56C++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_0,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 0"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x570++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_1,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 1"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x574++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_2,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 2"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x578++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_3,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 3"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x57C++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_4,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 4"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x580++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_5,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 5"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x584++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_6,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 6"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x588++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_7,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 7"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x58C++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_8,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 8"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x590++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_9,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 9"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x594++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_10,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 10"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x598++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_11,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 11"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x59C++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_12,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 12"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5A0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_13,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 13"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5A4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_14,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 14"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5A8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_15,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 15"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5AC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_16,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 16"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5B0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRDISABLE_17,THost Common TrustZone Syncpt Threshold Interrupt Disable Register 17"
bitfld.long 0x00 31. " INTRDISABLE__7[3]     ,Interrupt disable for CPU_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Interrupt disable for CPU_7_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 29. "               [1]     ,Interrupt disable for CPU_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Interrupt disable for CPU_7_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 27. " INTRDISABLE__6[3]     ,Interrupt disable for CPU_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Interrupt disable for CPU_6_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 25. "               [1]     ,Interrupt disable for CPU_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Interrupt disable for CPU_6_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 23. " INTRDISABLE__5[3]     ,Interrupt disable for CPU_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Interrupt disable for CPU_5_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 21. "               [1]     ,Interrupt disable for CPU_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Interrupt disable for CPU_5_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 19. " INTRDISABLE__4[3]     ,Interrupt disable for CPU_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Interrupt disable for CPU_4_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 17. "               [1]     ,Interrupt disable for CPU_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Interrupt disable for CPU_4_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 15. " INTRDISABLE__3[3]     ,Interrupt disable for CPU_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Interrupt disable for CPU_3_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 13. "               [1]     ,Interrupt disable for CPU_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Interrupt disable for CPU_3_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 11. " INTRDISABLE__2[3]     ,Interrupt disable for CPU_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Interrupt disable for CPU_2_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 9. "               [1]     ,Interrupt disable for CPU_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Interrupt disable for CPU_2_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 7. " INTRDISABLE__1[3]     ,Interrupt disable for CPU_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Interrupt disable for CPU_1_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 5. "               [1]     ,Interrupt disable for CPU_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Interrupt disable for CPU_1_[0]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 3. " INTRDISABLE__0[3]     ,Interrupt disable for CPU_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Interrupt disable for CPU_0_[2]" "Yes,No"
textline "                                                          "
bitfld.long 0x00 1. "               [1]     ,Interrupt disable for CPU_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Interrupt disable for CPU_0_[0]" "Yes,No"
group.long 0x5D0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_0,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 0"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5D4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_1,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 1"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5D8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_2,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 2"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5DC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_3,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 3"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5E0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_4,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 4"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5E4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_5,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 5"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5E8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_6,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 6"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5EC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_7,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 7"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5F0++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_8,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 8"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5F4++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_9,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 9"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5F8++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_10,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 10"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x5FC++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_11,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 11"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x600++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_12,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 12"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x604++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_13,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 13"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x608++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_14,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 14"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x60C++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_15,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 15"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x610++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_16,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 16"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
group.long 0x614++0x03
line.long 0x00 "THOST_COMMON_TZSYNCPT_THRESH_INTRENABLE_CPU_17,THost Common TrustZone Syncpt Threshold Interrupt Enable Register 17"
bitfld.long 0x00 31. " INTRENABLE__7[3]      ,Interrupt enable for CPU_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Interrupt enable for CPU_7_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. "              [1]      ,Interrupt enable for CPU_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Interrupt enable for CPU_7_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " INTRENABLE__6[3]      ,Interrupt enable for CPU_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Interrupt enable for CPU_6_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 25. "              [1]      ,Interrupt enable for CPU_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Interrupt enable for CPU_6_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 23. " INTRENABLE__5[3]      ,Interrupt enable for CPU_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Interrupt enable for CPU_5_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 21. "              [1]      ,Interrupt enable for CPU_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Interrupt enable for CPU_5_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 19. " INTRENABLE__4[3]      ,Interrupt enable for CPU_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Interrupt enable for CPU_4_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 17. "              [1]      ,Interrupt enable for CPU_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Interrupt enable for CPU_4_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 15. " INTRENABLE__3[3]      ,Interrupt enable for CPU_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Interrupt enable for CPU_3_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 13. "              [1]      ,Interrupt enable for CPU_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Interrupt enable for CPU_3_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 11. " INTRENABLE__2[3]      ,Interrupt enable for CPU_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Interrupt enable for CPU_2_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 9. "              [1]      ,Interrupt enable for CPU_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Interrupt enable for CPU_2_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 7. " INTRENABLE__1[3]      ,Interrupt enable for CPU_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Interrupt enable for CPU_1_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 5. "              [1]      ,Interrupt enable for CPU_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Interrupt enable for CPU_1_[0]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " INTRENABLE__0[3]      ,Interrupt enable for CPU_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Interrupt enable for CPU_0_[2]" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. "              [1]      ,Interrupt enable for CPU_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Interrupt enable for CPU_0_[0]" "Not panding,Panding"
tree.end
tree "TrustZone NONSECURE Channel Registers"
width 31.
group.long 0x634++0x03
line.long 0x00 "THOST_COMMON_CH_TZNONSECURE_0,THost Common TrustZone NONSECURE Channel Register 0"
bitfld.long 0x00 31. " CH_TZNONSECURE_7[3]   ,TrustZone non-secure channel 7_[3]" "Secure,Non-secure"
bitfld.long 0x00 30. "   [2]  ,TrustZone non-secure channel 7_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 29. "                 [1]   ,TrustZone non-secure channel 7_[1]" "Secure,Non-secure"
bitfld.long 0x00 28. "   [0]  ,TrustZone non-secure channel 7_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 27. " CH_TZNONSECURE_6[3]   ,TrustZone non-secure channel 6_[3]" "Secure,Non-secure"
bitfld.long 0x00 26. "   [2]  ,TrustZone non-secure channel 6_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 25. "                 [1]   ,TrustZone non-secure channel 6_[1]" "Secure,Non-secure"
bitfld.long 0x00 24. "   [0]  ,TrustZone non-secure channel 6_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 23. " CH_TZNONSECURE_5[3]   ,TrustZone non-secure channel 5_[3]" "Secure,Non-secure"
bitfld.long 0x00 22. "   [2]  ,TrustZone non-secure channel 5_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 21. "                 [1]   ,TrustZone non-secure channel 5_[1]" "Secure,Non-secure"
bitfld.long 0x00 20. "   [0]  ,TrustZone non-secure channel 5_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 19. " CH_TZNONSECURE_4[3]   ,TrustZone non-secure channel 4_[3]" "Secure,Non-secure"
bitfld.long 0x00 18. "   [2]  ,TrustZone non-secure channel 4_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 17. "                 [1]   ,TrustZone non-secure channel 4_[1]" "Secure,Non-secure"
bitfld.long 0x00 16. "   [0]  ,TrustZone non-secure channel 4_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 15. " CH_TZNONSECURE_3[3]   ,TrustZone non-secure channel 3_[3]" "Secure,Non-secure"
bitfld.long 0x00 14. "   [2]  ,TrustZone non-secure channel 3_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 13. "                 [1]   ,TrustZone non-secure channel 3_[1]" "Secure,Non-secure"
bitfld.long 0x00 12. "   [0]  ,TrustZone non-secure channel 3_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 11. " CH_TZNONSECURE_2[3]   ,TrustZone non-secure channel 2_[3]" "Secure,Non-secure"
bitfld.long 0x00 10. "   [2]  ,TrustZone non-secure channel 2_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 9. "                 [1]   ,TrustZone non-secure channel 2_[1]" "Secure,Non-secure"
bitfld.long 0x00 8. "   [0]  ,TrustZone non-secure channel 2_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 7. " CH_TZNONSECURE_1[3]   ,TrustZone non-secure channel 1_[3]" "Secure,Non-secure"
bitfld.long 0x00 6. "   [2]  ,TrustZone non-secure channel 1_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 5. "                 [1]   ,TrustZone non-secure channel 1_[1]" "Secure,Non-secure"
bitfld.long 0x00 4. "   [0]  ,TrustZone non-secure channel 1_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 3. " CH_TZNONSECURE_0[3]   ,TrustZone non-secure channel 0_[3]" "Secure,Non-secure"
bitfld.long 0x00 2. "   [2]  ,TrustZone non-secure channel 0_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 1. "                 [1]   ,TrustZone non-secure channel 0_[1]" "Secure,Non-secure"
bitfld.long 0x00 0. "   [0]  ,TrustZone non-secure channel 0_[0]" "Secure,Non-secure"
group.long 0x638++0x03
line.long 0x00 "THOST_COMMON_CH_TZNONSECURE_1,THost Common TrustZone NONSECURE Channel Register 1"
bitfld.long 0x00 31. " CH_TZNONSECURE_7[3]   ,TrustZone non-secure channel 7_[3]" "Secure,Non-secure"
bitfld.long 0x00 30. "   [2]  ,TrustZone non-secure channel 7_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 29. "                 [1]   ,TrustZone non-secure channel 7_[1]" "Secure,Non-secure"
bitfld.long 0x00 28. "   [0]  ,TrustZone non-secure channel 7_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 27. " CH_TZNONSECURE_6[3]   ,TrustZone non-secure channel 6_[3]" "Secure,Non-secure"
bitfld.long 0x00 26. "   [2]  ,TrustZone non-secure channel 6_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 25. "                 [1]   ,TrustZone non-secure channel 6_[1]" "Secure,Non-secure"
bitfld.long 0x00 24. "   [0]  ,TrustZone non-secure channel 6_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 23. " CH_TZNONSECURE_5[3]   ,TrustZone non-secure channel 5_[3]" "Secure,Non-secure"
bitfld.long 0x00 22. "   [2]  ,TrustZone non-secure channel 5_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 21. "                 [1]   ,TrustZone non-secure channel 5_[1]" "Secure,Non-secure"
bitfld.long 0x00 20. "   [0]  ,TrustZone non-secure channel 5_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 19. " CH_TZNONSECURE_4[3]   ,TrustZone non-secure channel 4_[3]" "Secure,Non-secure"
bitfld.long 0x00 18. "   [2]  ,TrustZone non-secure channel 4_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 17. "                 [1]   ,TrustZone non-secure channel 4_[1]" "Secure,Non-secure"
bitfld.long 0x00 16. "   [0]  ,TrustZone non-secure channel 4_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 15. " CH_TZNONSECURE_3[3]   ,TrustZone non-secure channel 3_[3]" "Secure,Non-secure"
bitfld.long 0x00 14. "   [2]  ,TrustZone non-secure channel 3_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 13. "                 [1]   ,TrustZone non-secure channel 3_[1]" "Secure,Non-secure"
bitfld.long 0x00 12. "   [0]  ,TrustZone non-secure channel 3_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 11. " CH_TZNONSECURE_2[3]   ,TrustZone non-secure channel 2_[3]" "Secure,Non-secure"
bitfld.long 0x00 10. "   [2]  ,TrustZone non-secure channel 2_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 9. "                 [1]   ,TrustZone non-secure channel 2_[1]" "Secure,Non-secure"
bitfld.long 0x00 8. "   [0]  ,TrustZone non-secure channel 2_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 7. " CH_TZNONSECURE_1[3]   ,TrustZone non-secure channel 1_[3]" "Secure,Non-secure"
bitfld.long 0x00 6. "   [2]  ,TrustZone non-secure channel 1_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 5. "                 [1]   ,TrustZone non-secure channel 1_[1]" "Secure,Non-secure"
bitfld.long 0x00 4. "   [0]  ,TrustZone non-secure channel 1_[0]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 3. " CH_TZNONSECURE_0[3]   ,TrustZone non-secure channel 0_[3]" "Secure,Non-secure"
bitfld.long 0x00 2. "   [2]  ,TrustZone non-secure channel 0_[2]" "Secure,Non-secure"
textline "                                        "
bitfld.long 0x00 1. "                 [1]   ,TrustZone non-secure channel 0_[1]" "Secure,Non-secure"
bitfld.long 0x00 0. "   [0]  ,TrustZone non-secure channel 0_[0]" "Secure,Non-secure"
tree.end
tree "HOST1X Virtualization Configuration Registers"
width 10.
group.long 0x644++0x03
line.long 0x00 "CH_VM_0,HOST1X Virtualization Configuration Register 0"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x648++0x03
line.long 0x00 "CH_VM_1,HOST1X Virtualization Configuration Register 1"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x64C++0x03
line.long 0x00 "CH_VM_2,HOST1X Virtualization Configuration Register 2"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x650++0x03
line.long 0x00 "CH_VM_3,HOST1X Virtualization Configuration Register 3"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x654++0x03
line.long 0x00 "CH_VM_4,HOST1X Virtualization Configuration Register 4"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x658++0x03
line.long 0x00 "CH_VM_5,HOST1X Virtualization Configuration Register 5"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x65C++0x03
line.long 0x00 "CH_VM_6,HOST1X Virtualization Configuration Register 6"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x660++0x03
line.long 0x00 "CH_VM_7,HOST1X Virtualization Configuration Register 7"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x664++0x03
line.long 0x00 "CH_VM_8,HOST1X Virtualization Configuration Register 8"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x668++0x03
line.long 0x00 "CH_VM_9,HOST1X Virtualization Configuration Register 9"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x66C++0x03
line.long 0x00 "CH_VM_10,HOST1X Virtualization Configuration Register 10"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x670++0x03
line.long 0x00 "CH_VM_11,HOST1X Virtualization Configuration Register 11"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x674++0x03
line.long 0x00 "CH_VM_12,HOST1X Virtualization Configuration Register 12"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x678++0x03
line.long 0x00 "CH_VM_13,HOST1X Virtualization Configuration Register 13"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x67C++0x03
line.long 0x00 "CH_VM_14,HOST1X Virtualization Configuration Register 14"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x680++0x03
line.long 0x00 "CH_VM_15,HOST1X Virtualization Configuration Register 15"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x684++0x03
line.long 0x00 "CH_VM_16,HOST1X Virtualization Configuration Register 16"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x688++0x03
line.long 0x00 "CH_VM_17,HOST1X Virtualization Configuration Register 17"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x68C++0x03
line.long 0x00 "CH_VM_18,HOST1X Virtualization Configuration Register 18"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x690++0x03
line.long 0x00 "CH_VM_19,HOST1X Virtualization Configuration Register 19"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x694++0x03
line.long 0x00 "CH_VM_20,HOST1X Virtualization Configuration Register 20"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x698++0x03
line.long 0x00 "CH_VM_21,HOST1X Virtualization Configuration Register 21"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x69C++0x03
line.long 0x00 "CH_VM_22,HOST1X Virtualization Configuration Register 22"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6A0++0x03
line.long 0x00 "CH_VM_23,HOST1X Virtualization Configuration Register 23"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6A4++0x03
line.long 0x00 "CH_VM_24,HOST1X Virtualization Configuration Register 24"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6A8++0x03
line.long 0x00 "CH_VM_25,HOST1X Virtualization Configuration Register 25"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6AC++0x03
line.long 0x00 "CH_VM_26,HOST1X Virtualization Configuration Register 26"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6B0++0x03
line.long 0x00 "CH_VM_27,HOST1X Virtualization Configuration Register 27"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6B4++0x03
line.long 0x00 "CH_VM_28,HOST1X Virtualization Configuration Register 28"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6B8++0x03
line.long 0x00 "CH_VM_29,HOST1X Virtualization Configuration Register 29"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6BC++0x03
line.long 0x00 "CH_VM_30,HOST1X Virtualization Configuration Register 30"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6C0++0x03
line.long 0x00 "CH_VM_31,HOST1X Virtualization Configuration Register 31"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6C4++0x03
line.long 0x00 "CH_VM_32,HOST1X Virtualization Configuration Register 32"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_32" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6C8++0x03
line.long 0x00 "CH_VM_33,HOST1X Virtualization Configuration Register 33"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_33" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6CC++0x03
line.long 0x00 "CH_VM_34,HOST1X Virtualization Configuration Register 34"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_34" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6D0++0x03
line.long 0x00 "CH_VM_35,HOST1X Virtualization Configuration Register 35"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_35" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6D4++0x03
line.long 0x00 "CH_VM_36,HOST1X Virtualization Configuration Register 36"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_36" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6D8++0x03
line.long 0x00 "CH_VM_37,HOST1X Virtualization Configuration Register 37"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_37" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6DC++0x03
line.long 0x00 "CH_VM_38,HOST1X Virtualization Configuration Register 38"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_38" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6E0++0x03
line.long 0x00 "CH_VM_39,HOST1X Virtualization Configuration Register 39"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_39" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6E4++0x03
line.long 0x00 "CH_VM_40,HOST1X Virtualization Configuration Register 40"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_40" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6E8++0x03
line.long 0x00 "CH_VM_41,HOST1X Virtualization Configuration Register 41"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_41" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6EC++0x03
line.long 0x00 "CH_VM_42,HOST1X Virtualization Configuration Register 42"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_42" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6F0++0x03
line.long 0x00 "CH_VM_43,HOST1X Virtualization Configuration Register 43"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_43" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6F4++0x03
line.long 0x00 "CH_VM_44,HOST1X Virtualization Configuration Register 44"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_44" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6F8++0x03
line.long 0x00 "CH_VM_45,HOST1X Virtualization Configuration Register 45"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_45" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x6FC++0x03
line.long 0x00 "CH_VM_46,HOST1X Virtualization Configuration Register 46"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_46" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x700++0x03
line.long 0x00 "CH_VM_47,HOST1X Virtualization Configuration Register 47"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_47" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x704++0x03
line.long 0x00 "CH_VM_48,HOST1X Virtualization Configuration Register 48"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_48" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x708++0x03
line.long 0x00 "CH_VM_49,HOST1X Virtualization Configuration Register 49"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_49" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70C++0x03
line.long 0x00 "CH_VM_50,HOST1X Virtualization Configuration Register 50"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_50" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x710++0x03
line.long 0x00 "CH_VM_51,HOST1X Virtualization Configuration Register 51"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_51" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x714++0x03
line.long 0x00 "CH_VM_52,HOST1X Virtualization Configuration Register 52"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_52" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x718++0x03
line.long 0x00 "CH_VM_53,HOST1X Virtualization Configuration Register 53"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_53" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x71C++0x03
line.long 0x00 "CH_VM_54,HOST1X Virtualization Configuration Register 54"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_54" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x720++0x03
line.long 0x00 "CH_VM_55,HOST1X Virtualization Configuration Register 55"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_55" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x724++0x03
line.long 0x00 "CH_VM_56,HOST1X Virtualization Configuration Register 56"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_56" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x728++0x03
line.long 0x00 "CH_VM_57,HOST1X Virtualization Configuration Register 57"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_57" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x72C++0x03
line.long 0x00 "CH_VM_58,HOST1X Virtualization Configuration Register 58"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_58" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x730++0x03
line.long 0x00 "CH_VM_59,HOST1X Virtualization Configuration Register 59"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_59" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x734++0x03
line.long 0x00 "CH_VM_60,HOST1X Virtualization Configuration Register 60"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_60" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x738++0x03
line.long 0x00 "CH_VM_61,HOST1X Virtualization Configuration Register 61"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_61" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x73C++0x03
line.long 0x00 "CH_VM_62,HOST1X Virtualization Configuration Register 62"
bitfld.long 0x00 0.--3. " CH_VM  ,Virtualization configuration for CHANNEL_62" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
textline "                                                          "
group.long 0x844++0x03
line.long 0x00 "SYNCPT_VM,HOST1X SYNCPT Virtualization Configuration Registers"
button "HOST1X SYNCPT Virtualization Configuration Registers" "d ad:0x13E00844--ad:0x13E01143 /LONG"
textline "                                                          "
group.long 0x14C4++0x03
line.long 0x00 "STRMID_VM,THOST Common STRMID Virtualization Configuration Registers"
button "THOST Common STRMID Virtualization Configuration Registers" "d ad:0x13E00844--ad:0x13E016C0 /LONG"
textline "                                                          "
tree "CLASSID Virtualization Configuration"
width 36.
group.long 0x18C4++0x5F
line.long 0x00 "THOST_COMMON_THOST_CLASSID_VM,THost Common THOST CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x00 0.--7. 1. " THOST_CLASSID_VM      ,THOST CLASSID Virtualization Configuration"
line.long 0x04 "THOST_COMMON_SE1_CLASSID_VM,THost Common SE1 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x04 0.--7. 1. " SE1_CLASSID_VM        ,SE1 CLASSID Virtualization Configuration"
line.long 0x08 "THOST_COMMON_SE2_CLASSID_VM,THost Common SE2 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x08 0.--7. 1. " SE2_CLASSID_VM        ,SE2 CLASSID Virtualization Configuration"
line.long 0x0C "THOST_COMMON_SE3_CLASSID_VM,THost Common SE3 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x0C 0.--7. 1. " SE3_CLASSID_VM        ,SE3 CLASSID Virtualization Configuration"
line.long 0x10 "THOST_COMMON_SE4_CLASSID_VM,THost Common SE4 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x10 0.--7. 1. " SE4_CLASSID_VM        ,SE4 CLASSID Virtualization Configuration"
line.long 0x14 "THOST_COMMON_DSI_PADCTL_CLASSID_VM,THost Common DSI_PADCTL CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x14 0.--7. 1. " DSI_PADCTL_CLASSID_VM ,DSI_PADCTL CLASSID Virtualization Configuration"
line.long 0x18 "THOST_COMMON_NVDISPLAY_CLASSID_VM,THost Common NVDISPLAY CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x18 0.--7. 1. " NVDISPLAY_CLASSID_VM  ,NVDISPLAY CLASSID Virtualization Configuration"
line.long 0x1C "THOST_COMMON_NVCSI_CLASSID_VM,THost Common NVCSI CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x1C 0.--7. 1. " NVCSI_CLASSID_VM      ,NVCSI CLASSID Virtualization Configuration"
line.long 0x20 "THOST_COMMON_ISP_CLASSID_VM,THost Common ISP CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x20 0.--7. 1. " ISP_CLASSID_VM        ,ISP CLASSID Virtualization Configuration"
line.long 0x24 "THOST_COMMON_DSIC_CLASSID_VM,THost Common DSIC CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " DSIC_CLASSID_VM       ,DSIC CLASSID Virtualization Configuration"
line.long 0x28 "THOST_COMMON_DSI_CLASSID_VM,THost Common DSI CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x28 0.--7. 1. " DSI_CLASSID_VM        ,DSI CLASSID Virtualization Configuration"
line.long 0x2C "THOST_COMMON_DSIB_CLASSID_VM,THost Common DSIB CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x2C 0.--7. 1. " DSIB_CLASSID_VM       ,DSIB CLASSID Virtualization Configuration"
line.long 0x30 "THOST_COMMON_SOR_CLASSID_VM,THost Common SOR CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x30 0.--7. 1. " SOR_CLASSID_VM        ,SOR CLASSID Virtualization Configuration"
line.long 0x34 "THOST_COMMON_SOR1_CLASSID_VM,THost Common SOR1 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x34 0.--7. 1. " SOR1_CLASSID_VM       ,SOR1 CLASSID Virtualization Configuration"
line.long 0x38 "THOST_COMMON_DPAUX_CLASSID_VM,THost Common DPAUX CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x38 0.--7. 1. " DPAUX_CLASSID_VM      ,DPAUX CLASSID Virtualization Configuration"
line.long 0x3C "THOST_COMMON_DPAUX1_CLASSID_VM,THost Common DPAUX1 CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x3C 0.--7. 1. " DPAUX1_CLASSID_VM     ,DPAUX1 CLASSID Virtualization Configuration"
line.long 0x40 "THOST_COMMON_VI_CLASSID_VM,THost Common VI CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x40 0.--7. 1. " VI_CLASSID_VM         ,VI CLASSID Virtualization Configuration"
line.long 0x44 "THOST_COMMON_VIC_CLASSID_VM,THost Common VIC CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x44 0.--7. 1. " VIC_CLASSID_VM        ,VIC CLASSID Virtualization Configuration"
line.long 0x48 "THOST_COMMON_NVENC_CLASSID_VM,THost Common NVENC CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x48 0.--7. 1. " NVENC_CLASSID_VM      ,NVENC CLASSID Virtualization Configuration"
line.long 0x4C "THOST_COMMON_NVDEC_CLASSID_VM,THost Common NVDEC CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x4C 0.--7. 1. " NVDEC_CLASSID_VM      ,NVDEC CLASSID Virtualization Configuration"
line.long 0x50 "THOST_COMMON_NVJPG_CLASSID_VM,THost Common NVJPG CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x50 0.--7. 1. " NVJPG_CLASSID_VM      ,NVJPG CLASSID Virtualization Configuration"
line.long 0x54 "THOST_COMMON_TSEC_CLASSID_VM,THost Common TSEC CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x54 0.--7. 1. " TSEC_CLASSID_VM       ,TSEC CLASSID Virtualization Configuration"
line.long 0x58 "THOST_COMMON_TSECB_CLASSID_VM,THost Common TSECB CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x58 0.--7. 1. " TSECB_CLASSID_VM      ,TSECB CLASSID Virtualization Configuration"
line.long 0x5C "THOST_COMMON_DSID_CLASSID_VM,THost Common DSID CLASSID Virtualization Configuration Register"
hexmask.long.byte 0x5C 0.--7. 1. " DSID_CLASSID_VM       ,DSID CLASSID Virtualization Configuration"
tree.end
tree "MMIO Virtualization Configuration"
width 33.
group.long 0x19C4++0x5F
line.long 0x00 "THOST_COMMON_THOST_MMIO_VM,THost Common THOST MMIO Virtualization Configuration Register"
bitfld.long 0x00 0.--3. " THOST_MMIO_VM      ,MMIO Virtualization configuration for THOST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "THOST_COMMON_SE1_MMIO_VM,THost Common SE1 MMIO Virtualization Configuration Register"
bitfld.long 0x04 0.--3. " SE1_MMIO_VM        ,MMIO Virtualization configuration for SE1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "THOST_COMMON_SE2_MMIO_VM,THost Common SE2 MMIO Virtualization Configuration Register"
bitfld.long 0x08 0.--3. " SE2_MMIO_VM        ,MMIO Virtualization configuration for SE2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "THOST_COMMON_SE3_MMIO_VM,THost Common SE3 MMIO Virtualization Configuration Register"
bitfld.long 0x0C 0.--3. " SE3_MMIO_VM        ,MMIO Virtualization configuration for SE3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "THOST_COMMON_SE4_MMIO_VM,THost Common SE4 MMIO Virtualization Configuration Register"
bitfld.long 0x10 0.--3. " SE4_MMIO_VM        ,MMIO Virtualization configuration for SE4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "THOST_COMMON_DSI_PADCTL_MMIO_VM,THost Common DSI_PADCTL MMIO Virtualization Configuration Register"
bitfld.long 0x14 0.--3. " DSI_PADCTL_MMIO_VM ,MMIO Virtualization configuration for DSI_PADCTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x18 "THOST_COMMON_NVDISPLAY_MMIO_VM,THost Common NVDISPLAY MMIO Virtualization Configuration Register"
bitfld.long 0x18 0.--3. " NVDISPLAY_MMIO_VM  ,MMIO Virtualization configuration for NVDISPLAY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "THOST_COMMON_NVCSI_MMIO_VM,THost Common NVCSI MMIO Virtualization Configuration Register"
bitfld.long 0x1C 0.--3. " NVCSI_MMIO_VM      ,MMIO Virtualization configuration for NVCSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "THOST_COMMON_ISP_MMIO_VM,THost Common ISP MMIO Virtualization Configuration Register"
bitfld.long 0x20 0.--3. " ISP_MMIO_VM        ,MMIO Virtualization configuration for ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x24 "THOST_COMMON_DSIC_MMIO_VM,THost Common DSIC MMIO Virtualization Configuration Register"
bitfld.long 0x24 0.--3. " DSIC_MMIO_VM       ,MMIO Virtualization configuration for DSIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x28 "THOST_COMMON_DSI_MMIO_VM,THost Common DSI MMIO Virtualization Configuration Register"
bitfld.long 0x28 0.--3. " DSI_MMIO_VM        ,MMIO Virtualization configuration for DSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x2C "THOST_COMMON_DSIB_MMIO_VM,THost Common DSIB MMIO Virtualization Configuration Register"
bitfld.long 0x2C 0.--3. " DSIB_MMIO_VM       ,MMIO Virtualization configuration for DSIB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x30 "THOST_COMMON_SOR_MMIO_VM,THost Common SOR MMIO Virtualization Configuration Register"
bitfld.long 0x30 0.--3. " SOR_MMIO_VM        ,MMIO Virtualization configuration for SOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x34 "THOST_COMMON_SOR1_MMIO_VM,THost Common SOR1 MMIO Virtualization Configuration Register"
bitfld.long 0x34 0.--3. " SOR1_MMIO_VM       ,MMIO Virtualization configuration for SOR1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x38 "THOST_COMMON_DPAUX_MMIO_VM,THost Common DPAUX MMIO Virtualization Configuration Register"
bitfld.long 0x38 0.--3. " DPAUX_MMIO_VM      ,MMIO Virtualization configuration for DPAUX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x3C "THOST_COMMON_DPAUX1_MMIO_VM,THost Common DPAUX1 MMIO Virtualization Configuration Register"
bitfld.long 0x3C 0.--3. " DPAUX1_MMIO_VM     ,MMIO Virtualization configuration for DPAUX1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x40 "THOST_COMMON_VI_MMIO_VM,THost Common VI MMIO Virtualization Configuration Register"
bitfld.long 0x40 0.--3. " VI_MMIO_VM         ,MMIO Virtualization configuration for VI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x44 "THOST_COMMON_VIC_MMIO_VM,THost Common VIC MMIO Virtualization Configuration Register"
bitfld.long 0x44 0.--3. " VIC_MMIO_VM        ,MMIO Virtualization configuration for VIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x48 "THOST_COMMON_NVENC_MMIO_VM,THost Common NVENC MMIO Virtualization Configuration Register"
bitfld.long 0x48 0.--3. " NVENC_MMIO_VM      ,MMIO Virtualization configuration for NVENC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x4C "THOST_COMMON_NVDEC_MMIO_VM,THost Common NVDEC MMIO Virtualization Configuration Register"
bitfld.long 0x4C 0.--3. " NVDEC_MMIO_VM      ,MMIO Virtualization configuration for NVDEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x50 "THOST_COMMON_NVJPG_MMIO_VM,THost Common NVJPG MMIO Virtualization Configuration Register"
bitfld.long 0x50 0.--3. " NVJPG_MMIO_VM      ,MMIO Virtualization configuration for NVJPG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x54 "THOST_COMMON_TSEC_MMIO_VM,THost Common TSEC MMIO Virtualization Configuration Register"
bitfld.long 0x54 0.--3. " TSEC_MMIO_VM       ,MMIO Virtualization configuration for TSEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x58 "THOST_COMMON_TSECB_MMIO_VM,THost Common TSECB MMIO Virtualization Configuration Register"
bitfld.long 0x58 0.--3. " TSECB_MMIO_VM      ,MMIO Virtualization configuration for TSECB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x5C "THOST_COMMON_DSID_MMIO_VM,THost Common DSID MMIO Virtualization Configuration Register"
bitfld.long 0x5C 0.--3. " DSID_MMIO_VM       ,MMIO Virtualization configuration for DSID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
textline "                                                          "
width 30.
group.long 0x1AC4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_PROT_EN,THost Common Virtualization Configuration Register for Syncpt Protection"
bitfld.long 0x00 2. " SYNCPT_PROT_APP_EN  ,Syncpt protection AppID enable" "Disabled,Enabled"
bitfld.long 0x00 1. "     SYNCPT_PROT_CH_EN  ,Syncpt protection Channel enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 0. " SYNCPT_PROT_VM_EN   ,Syncpt protection Virtual Machine enable" "Disabled,Enabled"
tree "HOST1X_THOST_COMMON_STRMID_OFFSET_BASE"
width 46.
group.long 0x1AC8++0x03
line.long 0x00 "THOST_COMMON_SE1_STRMID_0_OFFSET_BASE,THost Common SE1 STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE1_STRMID_0_OFFSET_BASE           ,STRMID offset base for SE1"
group.long 0x1AD0++0x03
line.long 0x00 "THOST_COMMON_SE2_STRMID_0_OFFSET_BASE,THost Common SE2 STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE2_STRMID_0_OFFSET_BASE           ,STRMID offset base for SE2"
group.long 0x1AD8++0x03
line.long 0x00 "THOST_COMMON_SE3_STRMID_0_OFFSET_BASE,THost Common SE3 STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE3_STRMID_0_OFFSET_BASE           ,STRMID offset base for SE3"
group.long 0x1AE0++0x03
line.long 0x00 "THOST_COMMON_SE4_STRMID_0_OFFSET_BASE,THost Common SE4 STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE4_STRMID_0_OFFSET_BASE           ,STRMID offset base for SE4"
group.long 0x1AE8++0x03
line.long 0x00 "THOST_COMMON_ISP_STRMID_0_OFFSET_BASE,THost Common ISP STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " ISP_STRMID_0_OFFSET_BASE           ,STRMID offset base for ISP"
group.long 0x1AF0++0x03
line.long 0x00 "THOST_COMMON_VIC_STRMID_0_OFFSET_BASE,THost Common VIC STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " VIC_STRMID_0_OFFSET_BASE           ,STRMID offset base for VIC"
group.long 0x1AF8++0x03
line.long 0x00 "THOST_COMMON_NVENC_STRMID_0_OFFSET_BASE,THost Common NVENC STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVENC_STRMID_0_OFFSET_BASE         ,STRMID offset base for NVENC"
group.long 0x1B00++0x03
line.long 0x00 "THOST_COMMON_NVDEC_STRMID_0_OFFSET_BASE,THost Common NVDEC STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDEC_STRMID_0_OFFSET_BASE         ,STRMID offset base for NVDEC"
group.long 0x1B08++0x03
line.long 0x00 "THOST_COMMON_NVJPG_STRMID_0_OFFSET_BASE,THost Common NVJPG STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVJPG_STRMID_0_OFFSET_BASE         ,STRMID offset base for NVJPG"
group.long 0x1B10++0x03
line.long 0x00 "THOST_COMMON_TSEC_STRMID_0_OFFSET_BASE,THost Common TSEC STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " TSEC_STRMID_0_OFFSET_BASE          ,STRMID offset base for TSEC"
group.long 0x1B18++0x03
line.long 0x00 "THOST_COMMON_TSECB_STRMID_0_OFFSET_BASE,THost Common TSECB STRMID OFFSET BASE Register"
hexmask.long.tbyte 0x00 2.--23. 1. " TSECB_STRMID_0_OFFSET_BASE         ,STRMID offset base for TSECB"
group.long 0x1B20++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_0_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 0"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_0_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_0"
group.long 0x1B28++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_1_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 1"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_1_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_1"
group.long 0x1B30++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_2_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 2"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_2_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_2"
group.long 0x1B38++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_3_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 3"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_3_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_3"
group.long 0x1b40++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_4_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 4"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_4_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_4"
group.long 0x1B48++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_5_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 5"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_5_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_5"
group.long 0x1B50++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_6_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 6"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_6_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_6"
group.long 0x1B58++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_7_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 7"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_7_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_7"
group.long 0x1B60++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_8_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 8"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_8_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_8"
group.long 0x1B68++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_9_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 9"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_9_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_9"
group.long 0x1B70++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_10_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 10"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_10_OFFSET_BASE    ,STRMID offset base for NVDISPLAY_10"
group.long 0x1B78++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_11_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 11"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_11_OFFSET_BASE    ,STRMID offset base for NVDISPLAY_11"
group.long 0x1B80++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_0_OFFSET_BASE,THost Common VI STRMID OFFSET Register 0"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_0_OFFSET_BASE            ,STRMID offset base for VI_0"
group.long 0x1B88++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_1_OFFSET_BASE,THost Common VI STRMID OFFSET Register 1"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_1_OFFSET_BASE            ,STRMID offset base for VI_1"
group.long 0x1B90++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_2_OFFSET_BASE,THost Common VI STRMID OFFSET Register 2"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_2_OFFSET_BASE            ,STRMID offset base for VI_2"
group.long 0x1B98++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_3_OFFSET_BASE,THost Common VI STRMID OFFSET Register 3"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_3_OFFSET_BASE            ,STRMID offset base for VI_3"
group.long 0x1BA0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_4_OFFSET_BASE,THost Common VI STRMID OFFSET Register 4"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_4_OFFSET_BASE            ,STRMID offset base for VI_4"
group.long 0x1BA8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_5_OFFSET_BASE,THost Common VI STRMID OFFSET Register 5"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_5_OFFSET_BASE            ,STRMID offset base for VI_5"
group.long 0x1BB0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_6_OFFSET_BASE,THost Common VI STRMID OFFSET Register 6"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_6_OFFSET_BASE            ,STRMID offset base for VI_6"
group.long 0x1BB8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_7_OFFSET_BASE,THost Common VI STRMID OFFSET Register 7"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_7_OFFSET_BASE            ,STRMID offset base for VI_7"
group.long 0x1BC0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_8_OFFSET_BASE,THost Common VI STRMID OFFSET Register 8"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_8_OFFSET_BASE            ,STRMID offset base for VI_8"
group.long 0x1BC8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_9_OFFSET_BASE,THost Common VI STRMID OFFSET Register 9"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_9_OFFSET_BASE            ,STRMID offset base for VI_9"
group.long 0x1BD0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_10_OFFSET_BASE,THost Common VI STRMID OFFSET Register 10"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_10_OFFSET_BASE           ,STRMID offset base for VI_10"
group.long 0x1BD8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_11_OFFSET_BASE,THost Common VI STRMID OFFSET Register 11"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_11_OFFSET_BASE           ,STRMID offset base for VI_11"
tree.end
tree "STRMID OFFSET Registers"
group.long 0x1ACC++0x03
line.long 0x00 "THOST_COMMON_SE1_STRMID_0_OFFSET_LIMIT,THost Common SE1 STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE1_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for SE1"
group.long 0x1AD4++0x03
line.long 0x00 "THOST_COMMON_SE2_STRMID_0_OFFSET_LIMIT,THost Common SE2 STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE2_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for SE2"
group.long 0x1ADC++0x03
line.long 0x00 "THOST_COMMON_SE3_STRMID_0_OFFSET_LIMIT,THost Common SE3 STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE3_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for SE3"
group.long 0x1AE4++0x03
line.long 0x00 "THOST_COMMON_SE4_STRMID_0_OFFSET_LIMIT,THost Common SE4 STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " SE4_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for SE4"
group.long 0x1AEC++0x03
line.long 0x00 "THOST_COMMON_ISP_STRMID_0_OFFSET_LIMIT,THost Common ISP STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " ISP_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for ISP"
group.long 0x1AF4++0x03
line.long 0x00 "THOST_COMMON_VIC_STRMID_0_OFFSET_LIMIT,THost Common VIC STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " VIC_STRMID_0_OFFSET_LIMIT          ,STRMID offset limit for VIC"
group.long 0x1AFC++0x03
line.long 0x00 "THOST_COMMON_NVENC_STRMID_0_OFFSET_LIMIT,THost Common NVENC STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVENC_STRMID_0_OFFSET_LIMIT        ,STRMID offset limit for NVENC"
group.long 0x1B04++0x03
line.long 0x00 "THOST_COMMON_NVDEC_STRMID_0_OFFSET_LIMIT,THost Common NVDEC STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDEC_STRMID_0_OFFSET_LIMIT        ,STRMID offset limit for NVDEC"
group.long 0x1B0C++0x03
line.long 0x00 "THOST_COMMON_NVJPG_STRMID_0_OFFSET_LIMIT,THost Common NVJPG STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " NVJPG_STRMID_0_OFFSET_LIMIT        ,STRMID offset limit for NVJPG"
group.long 0x1B14++0x03
line.long 0x00 "THOST_COMMON_TSEC_STRMID_0_OFFSET_LIMIT,THost Common TSEC STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " TSEC_STRMID_0_OFFSET_LIMIT         ,STRMID offset limit for TSEC"
group.long 0x1B1C++0x03
line.long 0x00 "THOST_COMMON_TSECB_STRMID_0_OFFSET_LIMIT,THost Common TSECB STRMID OFFSET LIMIT Register"
hexmask.long.tbyte 0x00 2.--23. 1. " TSECB_STRMID_0_OFFSET_LIMIT        ,STRMID offset limit for TSECB"
group.long 0x1B20++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_0_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 0"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_0_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_0"
group.long 0x1B28++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_1_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 1"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_1_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_1"
group.long 0x1B30++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_2_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 2"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_2_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_2"
group.long 0x1B38++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_3_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 3"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_3_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_3"
group.long 0x1B40++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_4_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 4"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_4_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_4"
group.long 0x1B48++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_5_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 5"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_5_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_5"
group.long 0x1B50++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_6_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 6"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_6_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_6"
group.long 0x1B58++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_7_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 7"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_7_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_7"
group.long 0x1B60++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_8_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 8"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_8_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_8"
group.long 0x1B68++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_9_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 9"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_9_OFFSET_BASE     ,STRMID offset base for NVDISPLAY_9"
group.long 0x1B70++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_10_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 10"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_10_OFFSET_BASE    ,STRMID offset base for NVDISPLAY_10"
group.long 0x1B78++0x03
line.long 0x00 "THOST_COMMON_NVDISPLAY_STRMID_11_OFFSET_BASE,THost Common NVDISPLAY STRMID OFFSET Register 11"
hexmask.long.tbyte 0x00 2.--23. 1. " NVDISPLAY_STRMID_11_OFFSET_BASE    ,STRMID offset base for NVDISPLAY_11"
group.long 0x1B80++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_0_OFFSET_BASE,THost Common VI STRMID OFFSET Register 0"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_0_OFFSET_BASE            ,STRMID offset base for VI_0"
group.long 0x1B88++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_1_OFFSET_BASE,THost Common VI STRMID OFFSET Register 1"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_1_OFFSET_BASE            ,STRMID offset base for VI_1"
group.long 0x1B90++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_2_OFFSET_BASE,THost Common VI STRMID OFFSET Register 2"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_2_OFFSET_BASE            ,STRMID offset base for VI_2"
group.long 0x1B98++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_3_OFFSET_BASE,THost Common VI STRMID OFFSET Register 3"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_3_OFFSET_BASE            ,STRMID offset base for VI_3"
group.long 0x1BA0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_4_OFFSET_BASE,THost Common VI STRMID OFFSET Register 4"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_4_OFFSET_BASE            ,STRMID offset base for VI_4"
group.long 0x1BA8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_5_OFFSET_BASE,THost Common VI STRMID OFFSET Register 5"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_5_OFFSET_BASE            ,STRMID offset base for VI_5"
group.long 0x1BB0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_6_OFFSET_BASE,THost Common VI STRMID OFFSET Register 6"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_6_OFFSET_BASE            ,STRMID offset base for VI_6"
group.long 0x1BB8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_7_OFFSET_BASE,THost Common VI STRMID OFFSET Register 7"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_7_OFFSET_BASE            ,STRMID offset base for VI_7"
group.long 0x1BC0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_8_OFFSET_BASE,THost Common VI STRMID OFFSET Register 8"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_8_OFFSET_BASE            ,STRMID offset base for VI_8"
group.long 0x1BC8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_9_OFFSET_BASE,THost Common VI STRMID OFFSET Register 9"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_9_OFFSET_BASE            ,STRMID offset base for VI_9"
group.long 0x1BD0++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_10_OFFSET_BASE,THost Common VI STRMID OFFSET Register 10"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_10_OFFSET_BASE           ,STRMID offset base for VI_10"
group.long 0x1BD8++0x03
line.long 0x00 "THOST_COMMON_VI_STRMID_11_OFFSET_BASE,THost Common VI STRMID OFFSET Register 11"
hexmask.long.tbyte 0x00 2.--23. 1. " VI_STRMID_11_OFFSET_BASE           ,STRMID offset base for VI_11"
tree.end
textline "                                                          "
width 28.
group.long 0x2000++0x07
line.long 0x00 "THOST_COMMON_CH_MLOCK_EN_0,MLOCK Enable Channel Register 0"
bitfld.long 0x00 31. " CH_MLOCK_EN_7[3]  ,Channel 7_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 30. "  [2] ,Channel 7_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 29. "              [1]  ,Channel 7_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 28. "  [0] ,Channel 7_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27. " CH_MLOCK_EN_6[3]  ,Channel 6_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 26. "  [2] ,Channel 6_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 25. "              [1]  ,Channel 6_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 24. "  [0] ,Channel 6_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 23. " CH_MLOCK_EN_5[3]  ,Channel 5_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 22. "  [2] ,Channel 5_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 21. "              [1]  ,Channel 5_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 20. "  [0] ,Channel 5_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 19. " CH_MLOCK_EN_4[3]  ,Channel 4_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 18. "  [2] ,Channel 4_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 17. "              [1]  ,Channel 4_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 16. "  [0] ,Channel 4_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 15. " CH_MLOCK_EN_3[3]  ,Channel 3_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 14. "  [2] ,Channel 3_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 13. "              [1]  ,Channel 3_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 12. "  [0] ,Channel 3_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " CH_MLOCK_EN_2[3]  ,Channel 2_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 10. "  [2] ,Channel 2_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 9. "              [1]  ,Channel 2_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 8. "  [0] ,Channel 2_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " CH_MLOCK_EN_1[3]  ,Channel 1_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 6. "  [2] ,Channel 1_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 5. "              [1]  ,Channel 1_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 4. "  [0] ,Channel 1_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " CH_MLOCK_EN_0[3]  ,Channel 0_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  [2] ,Channel 0_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 1. "              [1]  ,Channel 0_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  [0] ,Channel 0_[0] MLOCK enable" "Disabled,Enabled"
line.long 0x04 "THOST_COMMON_CH_MLOCK_EN_1,MLOCK Enable Channel Register 1"
bitfld.long 0x04 31. " CH_MLOCK_EN_7[3]  ,Channel 7_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 30. "  [2] ,Channel 7_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 29. "              [1]  ,Channel 7_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 28. "  [0] ,Channel 7_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 27. " CH_MLOCK_EN_6[3]  ,Channel 6_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 26. "  [2] ,Channel 6_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 25. "              [1]  ,Channel 6_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 24. "  [0] ,Channel 6_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 23. " CH_MLOCK_EN_5[3]  ,Channel 5_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 22. "  [2] ,Channel 5_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 21. "              [1]  ,Channel 5_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 20. "  [0] ,Channel 5_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 19. " CH_MLOCK_EN_4[3]  ,Channel 4_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 18. "  [2] ,Channel 4_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 17. "              [1]  ,Channel 4_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 16. "  [0] ,Channel 4_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 15. " CH_MLOCK_EN_3[3]  ,Channel 3_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 14. "  [2] ,Channel 3_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 13. "              [1]  ,Channel 3_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 12. "  [0] ,Channel 3_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 11. " CH_MLOCK_EN_2[3]  ,Channel 2_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 10. "  [2] ,Channel 2_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 9. "              [1]  ,Channel 2_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 8. "  [0] ,Channel 2_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 7. " CH_MLOCK_EN_1[3]  ,Channel 1_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 6. "  [2] ,Channel 1_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 5. "              [1]  ,Channel 1_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 4. "  [0] ,Channel 1_[0] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 3. " CH_MLOCK_EN_0[3]  ,Channel 0_[3] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 2. "  [2] ,Channel 0_[2] MLOCK enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. "              [1]  ,Channel 0_[1] MLOCK enable" "Disabled,Enabled"
bitfld.long 0x04 0. "  [0] ,Channel 0_[0] MLOCK enable" "Disabled,Enabled"
group.long 0x2010++0x07
line.long 0x00 "THOST_COMMON_CH_HIPRI_0,THost Common Channel HIPRI priority configuration Register 0"
bitfld.long 0x00 31. " CH_HIPRI_7[3]     ,HIPRI Channel 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "  [2] ,HIPRI Channel 7_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 29. "           [1]     ,HIPRI Channel 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "  [0] ,HIPRI Channel 7_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27. " CH_HIPRI_6[3]     ,HIPRI Channel 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "  [2] ,HIPRI Channel 6_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 25. "           [1]     ,HIPRI Channel 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "  [0] ,HIPRI Channel 6_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 23. " CH_HIPRI_5[3]     ,HIPRI Channel 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "  [2] ,HIPRI Channel 5_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 21. "           [1]     ,HIPRI Channel 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "  [0] ,HIPRI Channel 5_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 19. " CH_HIPRI_4[3]     ,HIPRI Channel 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "  [2] ,HIPRI Channel 4_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 17. "           [1]     ,HIPRI Channel 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "  [0] ,HIPRI Channel 4_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 15. " CH_HIPRI_3[3]     ,HIPRI Channel 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "  [2] ,HIPRI Channel 3_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 13. "           [1]     ,HIPRI Channel 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "  [0] ,HIPRI Channel 3_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 11. " CH_HIPRI_2[3]     ,HIPRI Channel 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "  [2] ,HIPRI Channel 2_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 9. "           [1]     ,HIPRI Channel 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "  [0] ,HIPRI Channel 2_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 7. " CH_HIPRI_1[3]     ,HIPRI Channel 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "  [2] ,HIPRI Channel 1_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 5. "           [1]     ,HIPRI Channel 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "  [0] ,HIPRI Channel 1_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 3. " CH_HIPRI_0[3]     ,HIPRI Channel 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "  [2] ,HIPRI Channel 0_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 1. "           [1]     ,HIPRI Channel 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "  [0] ,HIPRI Channel 0_[0]" "Disabled,Enabled"
line.long 0x04 "THOST_COMMON_CH_HIPRI_1,THost Common Channel HIPRI priority configuration Register 1"
bitfld.long 0x04 31. " CH_HIPRI_7[3]     ,HIPRI Channel 7_[3]" "Disabled,Enabled"
bitfld.long 0x04 30. "  [2] ,HIPRI Channel 7_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 29. "           [1]     ,HIPRI Channel 7_[1]" "Disabled,Enabled"
bitfld.long 0x04 28. "  [0] ,HIPRI Channel 7_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 27. " CH_HIPRI_6[3]     ,HIPRI Channel 6_[3]" "Disabled,Enabled"
bitfld.long 0x04 26. "  [2] ,HIPRI Channel 6_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 25. "           [1]     ,HIPRI Channel 6_[1]" "Disabled,Enabled"
bitfld.long 0x04 24. "  [0] ,HIPRI Channel 6_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 23. " CH_HIPRI_5[3]     ,HIPRI Channel 5_[3]" "Disabled,Enabled"
bitfld.long 0x04 22. "  [2] ,HIPRI Channel 5_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 21. "           [1]     ,HIPRI Channel 5_[1]" "Disabled,Enabled"
bitfld.long 0x04 20. "  [0] ,HIPRI Channel 5_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 19. " CH_HIPRI_4[3]     ,HIPRI Channel 4_[3]" "Disabled,Enabled"
bitfld.long 0x04 18. "  [2] ,HIPRI Channel 4_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 17. "           [1]     ,HIPRI Channel 4_[1]" "Disabled,Enabled"
bitfld.long 0x04 16. "  [0] ,HIPRI Channel 4_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 15. " CH_HIPRI_3[3]     ,HIPRI Channel 3_[3]" "Disabled,Enabled"
bitfld.long 0x04 14. "  [2] ,HIPRI Channel 3_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 13. "           [1]     ,HIPRI Channel 3_[1]" "Disabled,Enabled"
bitfld.long 0x04 12. "  [0] ,HIPRI Channel 3_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 11. " CH_HIPRI_2[3]     ,HIPRI Channel 2_[3]" "Disabled,Enabled"
bitfld.long 0x04 10. "  [2] ,HIPRI Channel 2_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 9. "           [1]     ,HIPRI Channel 2_[1]" "Disabled,Enabled"
bitfld.long 0x04 8. "  [0] ,HIPRI Channel 2_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 7. " CH_HIPRI_1[3]     ,HIPRI Channel 1_[3]" "Disabled,Enabled"
bitfld.long 0x04 6. "  [2] ,HIPRI Channel 1_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 5. "           [1]     ,HIPRI Channel 1_[1]" "Disabled,Enabled"
bitfld.long 0x04 4. "  [0] ,HIPRI Channel 1_[0]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 3. " CH_HIPRI_0[3]     ,HIPRI Channel 0_[3]" "Disabled,Enabled"
bitfld.long 0x04 2. "  [2] ,HIPRI Channel 0_[2]" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. "           [1]     ,HIPRI Channel 0_[1]" "Disabled,Enabled"
bitfld.long 0x04 0. "  [0] ,HIPRI Channel 0_[0]" "Disabled,Enabled"
textline "                                     "
width 41.
group.long 0x2020++0x07
line.long 0x00 "THOST_COMMON_CH_KERNEL_FILTER_GBUFFER_0,THost Common Channel Kernel Filter Register 0"
bitfld.long 0x00 31. " CH_KERNEL_FILTER_GBUFFER_7[3] ,Channel Kernel Filter GBUFFER 7_[3]" "Disabled,Enabled"
bitfld.long 0x00 30. "  [2] ,Channel Kernel Filter GBUFFER 7_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 29. "                           [1] ,Channel Kernel Filter GBUFFER 7_[1]" "Disabled,Enabled"
bitfld.long 0x00 28. "  [0] ,Channel Kernel Filter GBUFFER 7_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 27. " CH_KERNEL_FILTER_GBUFFER_6[3] ,Channel Kernel Filter GBUFFER 6_[3]" "Disabled,Enabled"
bitfld.long 0x00 26. "  [2] ,Channel Kernel Filter GBUFFER 6_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 25. "                           [1] ,Channel Kernel Filter GBUFFER 6_[1]" "Disabled,Enabled"
bitfld.long 0x00 24. "  [0] ,Channel Kernel Filter GBUFFER 6_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 23. " CH_KERNEL_FILTER_GBUFFER_5[3] ,Channel Kernel Filter GBUFFER 5_[3]" "Disabled,Enabled"
bitfld.long 0x00 22. "  [2] ,Channel Kernel Filter GBUFFER 5_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 21. "                           [1] ,Channel Kernel Filter GBUFFER 5_[1]" "Disabled,Enabled"
bitfld.long 0x00 20. "  [0] ,Channel Kernel Filter GBUFFER 5_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 19. " CH_KERNEL_FILTER_GBUFFER_4[3] ,Channel Kernel Filter GBUFFER 4_[3]" "Disabled,Enabled"
bitfld.long 0x00 18. "  [2] ,Channel Kernel Filter GBUFFER 4_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 17. "                           [1] ,Channel Kernel Filter GBUFFER 4_[1]" "Disabled,Enabled"
bitfld.long 0x00 16. "  [0] ,Channel Kernel Filter GBUFFER 4_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 15. " CH_KERNEL_FILTER_GBUFFER_3[3] ,Channel Kernel Filter GBUFFER 3_[3]" "Disabled,Enabled"
bitfld.long 0x00 14. "  [2] ,Channel Kernel Filter GBUFFER 3_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 13. "                           [1] ,Channel Kernel Filter GBUFFER 3_[1]" "Disabled,Enabled"
bitfld.long 0x00 12. "  [0] ,Channel Kernel Filter GBUFFER 3_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 11. " CH_KERNEL_FILTER_GBUFFER_2[3] ,Channel Kernel Filter GBUFFER 2_[3]" "Disabled,Enabled"
bitfld.long 0x00 10. "  [2] ,Channel Kernel Filter GBUFFER 2_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 9. "                           [1] ,Channel Kernel Filter GBUFFER 2_[1]" "Disabled,Enabled"
bitfld.long 0x00 8. "  [0] ,Channel Kernel Filter GBUFFER 2_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 7. " CH_KERNEL_FILTER_GBUFFER_1[3] ,Channel Kernel Filter GBUFFER 1_[3]" "Disabled,Enabled"
bitfld.long 0x00 6. "  [2] ,Channel Kernel Filter GBUFFER 1_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 5. "                           [1] ,Channel Kernel Filter GBUFFER 1_[1]" "Disabled,Enabled"
bitfld.long 0x00 4. "  [0] ,Channel Kernel Filter GBUFFER 1_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 3. " CH_KERNEL_FILTER_GBUFFER_0[3] ,Channel Kernel Filter GBUFFER 0_[3]" "Disabled,Enabled"
bitfld.long 0x00 2. "  [2] ,Channel Kernel Filter GBUFFER 0_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x00 1. "                           [1] ,Channel Kernel Filter GBUFFER 0_[1]" "Disabled,Enabled"
bitfld.long 0x00 0. "  [0] ,Channel Kernel Filter GBUFFER 0_[0]" "Disabled,Enabled"
line.long 0x04 "THOST_COMMON_CH_KERNEL_FILTER_GBUFFER_1,THost Common Channel Kernel Filter Register 1"
bitfld.long 0x04 31. " CH_KERNEL_FILTER_GBUFFER_7[3] ,Channel Kernel Filter GBUFFER 7_[3]" "Disabled,Enabled"
bitfld.long 0x04 30. "  [2] ,Channel Kernel Filter GBUFFER 7_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 29. "                           [1] ,Channel Kernel Filter GBUFFER 7_[1]" "Disabled,Enabled"
bitfld.long 0x04 28. "  [0] ,Channel Kernel Filter GBUFFER 7_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 27. " CH_KERNEL_FILTER_GBUFFER_6[3] ,Channel Kernel Filter GBUFFER 6_[3]" "Disabled,Enabled"
bitfld.long 0x04 26. "  [2] ,Channel Kernel Filter GBUFFER 6_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 25. "                           [1] ,Channel Kernel Filter GBUFFER 6_[1]" "Disabled,Enabled"
bitfld.long 0x04 24. "  [0] ,Channel Kernel Filter GBUFFER 6_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 23. " CH_KERNEL_FILTER_GBUFFER_5[3] ,Channel Kernel Filter GBUFFER 5_[3]" "Disabled,Enabled"
bitfld.long 0x04 22. "  [2] ,Channel Kernel Filter GBUFFER 5_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 21. "                           [1] ,Channel Kernel Filter GBUFFER 5_[1]" "Disabled,Enabled"
bitfld.long 0x04 20. "  [0] ,Channel Kernel Filter GBUFFER 5_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 19. " CH_KERNEL_FILTER_GBUFFER_4[3] ,Channel Kernel Filter GBUFFER 4_[3]" "Disabled,Enabled"
bitfld.long 0x04 18. "  [2] ,Channel Kernel Filter GBUFFER 4_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 17. "                           [1] ,Channel Kernel Filter GBUFFER 4_[1]" "Disabled,Enabled"
bitfld.long 0x04 16. "  [0] ,Channel Kernel Filter GBUFFER 4_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 15. " CH_KERNEL_FILTER_GBUFFER_3[3] ,Channel Kernel Filter GBUFFER 3_[3]" "Disabled,Enabled"
bitfld.long 0x04 14. "  [2] ,Channel Kernel Filter GBUFFER 3_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 13. "                           [1] ,Channel Kernel Filter GBUFFER 3_[1]" "Disabled,Enabled"
bitfld.long 0x04 12. "  [0] ,Channel Kernel Filter GBUFFER 3_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 11. " CH_KERNEL_FILTER_GBUFFER_2[3] ,Channel Kernel Filter GBUFFER 2_[3]" "Disabled,Enabled"
bitfld.long 0x04 10. "  [2] ,Channel Kernel Filter GBUFFER 2_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 9. "                           [1] ,Channel Kernel Filter GBUFFER 2_[1]" "Disabled,Enabled"
bitfld.long 0x04 8. "  [0] ,Channel Kernel Filter GBUFFER 2_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 7. " CH_KERNEL_FILTER_GBUFFER_1[3] ,Channel Kernel Filter GBUFFER 1_[3]" "Disabled,Enabled"
bitfld.long 0x04 6. "  [2] ,Channel Kernel Filter GBUFFER 1_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 5. "                           [1] ,Channel Kernel Filter GBUFFER 1_[1]" "Disabled,Enabled"
bitfld.long 0x04 4. "  [0] ,Channel Kernel Filter GBUFFER 1_[0]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 3. " CH_KERNEL_FILTER_GBUFFER_0[3] ,Channel Kernel Filter GBUFFER 0_[3]" "Disabled,Enabled"
bitfld.long 0x04 2. "  [2] ,Channel Kernel Filter GBUFFER 0_[2]" "Disabled,Enabled"
textline "                                                  "
bitfld.long 0x04 1. "                           [1] ,Channel Kernel Filter GBUFFER 0_[1]" "Disabled,Enabled"
bitfld.long 0x04 0. "  [0] ,Channel Kernel Filter GBUFFER 0_[0]" "Disabled,Enabled"
tree "MLOCK Status Registers per Host1x Client"
width 33.
group.long 0x2030++0x5F
line.long 0x00 "THOST_COMMON_THOST_MLOCK,MLOCK Status Register for THOST"
bitfld.long 0x00 16.--19. " THOST_MLOCK_VM            ,MLOCK virtual machine for THOST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 2.--7. "        THOST_MLOCK_CH          ,MLOCK channel for THOST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x00 1. " THOST_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for THOST" "Unlocked,Locked"
bitfld.long 0x00 0. "  THOST_MLOCK_LOCKED      ,MLOCK locked for THOST" "Unlocked,Locked"
line.long 0x04 "THOST_COMMON_SE1_MLOCK,MLOCK Status Register for SE1"
bitfld.long 0x04 16.--19. " SE1_MLOCK_VM              ,MLOCK virtual machine for SE1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 2.--7. "        SE1_MLOCK_CH            ,MLOCK channel for SE1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x04 1. " SE1_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for SE1" "Unlocked,Locked"
bitfld.long 0x04 0. "  SE1_MLOCK_LOCKED        ,MLOCK locked for SE1" "Unlocked,Locked"
line.long 0x08 "THOST_COMMON_SE2_MLOCK,MLOCK Status Register for SE2"
bitfld.long 0x08 16.--19. " SE2_MLOCK_VM              ,MLOCK virtual machine for SE2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 2.--7. "        SE2_MLOCK_CH            ,MLOCK channel for SE2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x08 1. " SE2_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for SE2" "Unlocked,Locked"
bitfld.long 0x08 0. "  SE2_MLOCK_LOCKED        ,MLOCK locked for SE2" "Unlocked,Locked"
line.long 0x0C "THOST_COMMON_SE3_MLOCK,MLOCK Status Register for SE3"
bitfld.long 0x0C 16.--19. " SE3_MLOCK_VM              ,MLOCK virtual machine for SE3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 2.--7. "        SE3_MLOCK_CH            ,MLOCK channel for SE3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x0C 1. " SE3_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for SE3" "Unlocked,Locked"
bitfld.long 0x0C 0. "  SE3_MLOCK_LOCKED        ,MLOCK locked for SE3" "Unlocked,Locked"
line.long 0x10 "THOST_COMMON_SE4_MLOCK,MLOCK Status Register for SE4"
bitfld.long 0x10 16.--19. " SE4_MLOCK_VM              ,MLOCK virtual machine for SE4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 2.--7. "        SE4_MLOCK_CH            ,MLOCK channel for SE4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x10 1. " SE4_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for SE4" "Unlocked,Locked"
bitfld.long 0x10 0. "  SE4_MLOCK_LOCKED        ,MLOCK locked for SE4" "Unlocked,Locked"
line.long 0x14 "THOST_COMMON_DSI_PADCTL_MLOCK,MLOCK Status Register for DSI_PADCTL"
bitfld.long 0x14 16.--19. " DSI_PADCTL_MLOCK_VM       ,MLOCK virtual machine for DSI_PADCTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 2.--7. "        DSI_PADCTL_MLOCK_CH     ,MLOCK channel for DSI_PADCTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x14 1. " DSI_PADCTL_MLOCK_TZLOCKED ,MLOCK TrustZone locked for DSI_PADCTL" "Unlocked,Locked"
bitfld.long 0x14 0. "  DSI_PADCTL_MLOCK_LOCKED ,MLOCK locked for DSI_PADCTL" "Unlocked,Locked"
line.long 0x18 "THOST_COMMON_NVDISPLAY_MLOCK,MLOCK Status Register for NVDISPLAY"
bitfld.long 0x18 16.--19. " NVDISPLAY_MLOCK_VM        ,MLOCK virtual machine for NVDISPLAY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 2.--7. "        NVDISPLAY_MLOCK_CH      ,MLOCK channel for NVDISPLAY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x18 1. " NVDISPLAY_MLOCK_TZLOCKED  ,MLOCK TrustZone locked for NVDISPLAY" "Unlocked,Locked"
bitfld.long 0x18 0. "  NVDISPLAY_MLOCK_LOCKED  ,MLOCK locked for NVDISPLAY" "Unlocked,Locked"
line.long 0x1C "THOST_COMMON_NVCSI_MLOCK,MLOCK Status Register for NVCSI"
bitfld.long 0x1C 16.--19. " NVCSI_MLOCK_VM            ,MLOCK virtual machine for NVCSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 2.--7. "        NVCSI_MLOCK_CH          ,MLOCK channel for NVCSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x1C 1. " NVCSI_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for NVCSI" "Unlocked,Locked"
bitfld.long 0x1C 0. "  NVCSI_MLOCK_LOCKED      ,MLOCK locked for NVCSI" "Unlocked,Locked"
line.long 0x20 "THOST_COMMON_ISP_MLOCK,MLOCK Status Register for ISP"
bitfld.long 0x20 16.--19. " ISP_MLOCK_VM              ,MLOCK virtual machine for ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x20 2.--7. "        ISP_MLOCK_CH            ,MLOCK channel for ISP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x20 1. " ISP_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for ISP" "Unlocked,Locked"
bitfld.long 0x20 0. "  ISP_MLOCK_LOCKED        ,MLOCK locked for ISP" "Unlocked,Locked"
line.long 0x24 "THOST_COMMON_DSIC_MLOCK,MLOCK Status Register for DSIC"
bitfld.long 0x24 16.--19. " DSIC_MLOCK_VM             ,MLOCK virtual machine for DSIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x24 2.--7. "        DSIC_MLOCK_CH           ,MLOCK channel for DSIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x24 1. " DSIC_MLOCK_TZLOCKED       ,MLOCK TrustZone locked for DSIC" "Unlocked,Locked"
bitfld.long 0x24 0. "  DSIC_MLOCK_LOCKED       ,MLOCK locked for DSIC" "Unlocked,Locked"
line.long 0x28 "THOST_COMMON_DSI_MLOCK,MLOCK Status Register for DSI"
bitfld.long 0x28 16.--19. " DSI_MLOCK_VM              ,MLOCK virtual machine for DSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 2.--7. "        DSI_MLOCK_CH            ,MLOCK channel for DSI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x28 1. " DSI_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for DSI" "Unlocked,Locked"
bitfld.long 0x28 0. "  DSI_MLOCK_LOCKED        ,MLOCK locked for DSI" "Unlocked,Locked"
line.long 0x2C "THOST_COMMON_DSIB_MLOCK,MLOCK Status Register for DSIB"
bitfld.long 0x2C 16.--19. " DSIB_MLOCK_VM             ,MLOCK virtual machine for DSIB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x2C 2.--7. "        DSIB_MLOCK_CH           ,MLOCK channel for DSIB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x2C 1. " DSIB_MLOCK_TZLOCKED       ,MLOCK TrustZone locked for DSIB" "Unlocked,Locked"
bitfld.long 0x2C 0. "  DSIB_MLOCK_LOCKED       ,MLOCK locked for DSIB" "Unlocked,Locked"
line.long 0x30 "THOST_COMMON_SOR_MLOCK,MLOCK Status Register for SOR"
bitfld.long 0x30 16.--19. " SOR_MLOCK_VM              ,MLOCK virtual machine for SOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x30 2.--7. "        SOR_MLOCK_CH            ,MLOCK channel for SOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x30 1. " SOR_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for SOR" "Unlocked,Locked"
bitfld.long 0x30 0. "  SOR_MLOCK_LOCKED        ,MLOCK locked for SOR" "Unlocked,Locked"
line.long 0x34 "THOST_COMMON_SOR1_MLOCK,MLOCK Status Register for SOR1"
bitfld.long 0x34 16.--19. " SOR1_MLOCK_VM             ,MLOCK virtual machine for SOR1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x34 2.--7. "        SOR1_MLOCK_CH           ,MLOCK channel for SOR1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x34 1. " SOR1_MLOCK_TZLOCKED       ,MLOCK TrustZone locked for SOR1" "Unlocked,Locked"
bitfld.long 0x34 0. "  SOR1_MLOCK_LOCKED       ,MLOCK locked for SOR1" "Unlocked,Locked"
line.long 0x38 "THOST_COMMON_DPAUX_MLOCK,MLOCK Status Register for DPAUX"
bitfld.long 0x38 16.--19. " DPAUX_MLOCK_VM            ,MLOCK virtual machine for DPAUX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 2.--7. "        DPAUX_MLOCK_CH          ,MLOCK channel for DPAUX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x38 1. " DPAUX_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for DPAUX" "Unlocked,Locked"
bitfld.long 0x38 0. "  DPAUX_MLOCK_LOCKED      ,MLOCK locked for DPAUX" "Unlocked,Locked"
line.long 0x3C "THOST_COMMON_DPAUX1_MLOCK,MLOCK Status Register for DPAUX1"
bitfld.long 0x3C 16.--19. " DPAUX1_MLOCK_VM           ,MLOCK virtual machine for DPAUX1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x3C 2.--7. "        DPAUX1_MLOCK_CH         ,MLOCK channel for DPAUX1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x3C 1. " DPAUX1_MLOCK_TZLOCKED     ,MLOCK TrustZone locked for DPAUX1" "Unlocked,Locked"
bitfld.long 0x3C 0. "  DPAUX1_MLOCK_LOCKED     ,MLOCK locked for DPAUX1" "Unlocked,Locked"
line.long 0x40 "THOST_COMMON_VI_MLOCK,MLOCK Status Register for VI"
bitfld.long 0x40 16.--19. " VI_MLOCK_VM               ,MLOCK virtual machine for VI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x40 2.--7. "        VI_MLOCK_CH             ,MLOCK channel for VI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x40 1. " VI_MLOCK_TZLOCKED         ,MLOCK TrustZone locked for VI" "Unlocked,Locked"
bitfld.long 0x40 0. "  VI_MLOCK_LOCKED         ,MLOCK locked for VI" "Unlocked,Locked"
line.long 0x44 "THOST_COMMON_VIC_MLOCK,MLOCK Status Register for VIC"
bitfld.long 0x44 16.--19. " VIC_MLOCK_VM              ,MLOCK virtual machine for VIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x44 2.--7. "        VIC_MLOCK_CH            ,MLOCK channel for VIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x44 1. " VIC_MLOCK_TZLOCKED        ,MLOCK TrustZone locked for VIC" "Unlocked,Locked"
bitfld.long 0x44 0. "  VIC_MLOCK_LOCKED        ,MLOCK locked for VIC" "Unlocked,Locked"
line.long 0x48 "THOST_COMMON_NVENC_MLOCK,MLOCK Status Register for NVENC"
bitfld.long 0x48 16.--19. " NVENC_MLOCK_VM            ,MLOCK virtual machine for NVENC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x48 2.--7. "        NVENC_MLOCK_CH          ,MLOCK channel for NVENC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x48 1. " NVENC_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for NVENC" "Unlocked,Locked"
bitfld.long 0x48 0. "  NVENC_MLOCK_LOCKED      ,MLOCK locked for NVENC" "Unlocked,Locked"
line.long 0x4C "THOST_COMMON_NVDEC_MLOCK,MLOCK Status Register for NVDEC"
bitfld.long 0x4C 16.--19. " NVDEC_MLOCK_VM            ,MLOCK virtual machine for NVDEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x4C 2.--7. "        NVDEC_MLOCK_CH          ,MLOCK channel for NVDEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x4C 1. " NVDEC_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for NVDEC" "Unlocked,Locked"
bitfld.long 0x4C 0. "  NVDEC_MLOCK_LOCKED      ,MLOCK locked for NVDEC" "Unlocked,Locked"
line.long 0x50 "THOST_COMMON_NVJPG_MLOCK,MLOCK Status Register for NVJPG"
bitfld.long 0x50 16.--19. " NVJPG_MLOCK_VM            ,MLOCK virtual machine for NVJPG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x50 2.--7. "        NVJPG_MLOCK_CH          ,MLOCK channel for NVJPG" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x50 1. " NVJPG_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for NVJPG" "Unlocked,Locked"
bitfld.long 0x50 0. "  NVJPG_MLOCK_LOCKED      ,MLOCK locked for NVJPG" "Unlocked,Locked"
line.long 0x54 "THOST_COMMON_TSEC_MLOCK,MLOCK Status Register for TSEC"
bitfld.long 0x54 16.--19. " TSEC_MLOCK_VM             ,MLOCK virtual machine for TSEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x54 2.--7. "        TSEC_MLOCK_CH           ,MLOCK channel for TSEC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x54 1. " TSEC_MLOCK_TZLOCKED       ,MLOCK TrustZone locked for TSEC" "Unlocked,Locked"
bitfld.long 0x54 0. "  TSEC_MLOCK_LOCKED       ,MLOCK locked for TSEC" "Unlocked,Locked"
line.long 0x58 "THOST_COMMON_TSECB_MLOCK,MLOCK Status Register for TSECB"
bitfld.long 0x58 16.--19. " TSECB_MLOCK_VM            ,MLOCK virtual machine for TSECB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x58 2.--7. "        TSECB_MLOCK_CH          ,MLOCK channel for TSECB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x58 1. " TSECB_MLOCK_TZLOCKED      ,MLOCK TrustZone locked for TSECB" "Unlocked,Locked"
bitfld.long 0x58 0. "  TSECB_MLOCK_LOCKED      ,MLOCK locked for TSECB" "Unlocked,Locked"
line.long 0x5C "THOST_COMMON_DSID_MLOCK,MLOCK Status Register for DSID"
bitfld.long 0x5C 16.--19. " DSID_MLOCK_VM             ,MLOCK virtual machine for DSID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x5C 2.--7. "        DSID_MLOCK_CH           ,MLOCK channel for DSID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.long 0x5C 1. " DSID_MLOCK_TZLOCKED       ,MLOCK TrustZone locked for DSID" "Unlocked,Locked"
bitfld.long 0x5C 0. "  DSID_MLOCK_LOCKED       ,MLOCK locked for DSID" "Unlocked,Locked"
tree.end
textline "                                                          "
width 27.
group.long 0x2130++0x03
line.long 0x00 "THOST_COMMON_MOD_TEARDOWN,THost Common Module Teardown Register"
bitfld.long 0x00 24. " DSID_TEARDOWN       ,Teardown module for DSID" "No action,Teardown"
bitfld.long 0x00 23. "  TSECB_TEARDOWN     ,Teardown module for TSECB" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 22. " TSEC_TEARDOWN       ,Teardown module for TSEC" "No action,Teardown"
bitfld.long 0x00 21. "  NVJPG_TEARDOWN     ,Teardown module for NVJPG" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 20. " NVDEC_TEARDOWN      ,Teardown module for NVDEC" "No action,Teardown"
bitfld.long 0x00 19. "  NVENC_TEARDOWN     ,Teardown module for NVENC" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 18. " VIC_TEARDOWN        ,Teardown module for VIC" "No action,Teardown"
bitfld.long 0x00 17. "  VI_TEARDOWN        ,Teardown module for VI" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 16. " DPAUX1_TEARDOWN     ,Teardown module for DPAUX1" "No action,Teardown"
bitfld.long 0x00 15. "  DPAUX_TEARDOWN     ,Teardown module for DPAUX" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 14. " SOR1_TEARDOWN       ,Teardown module for SOR1" "No action,Teardown"
bitfld.long 0x00 13. "  SOR_TEARDOWN       ,Teardown module for SOR" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 12. " DSIB_TEARDOWN       ,Teardown module for DSIB" "No action,Teardown"
bitfld.long 0x00 11. "  DSI_TEARDOWN       ,Teardown module for DSI" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 10. " DSIC_TEARDOWN       ,Teardown module for DSIC" "No action,Teardown"
bitfld.long 0x00 9. "  ISP_TEARDOWN       ,Teardown module for ISP" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 8. " NVCSI_TEARDOWN      ,Teardown module for NVCSI" "No action,Teardown"
bitfld.long 0x00 7. "  NVDISPLAY_TEARDOWN ,Teardown module for NVDISPLAY" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 6. " DSI_PADCTL_TEARDOWN ,Teardown module for DSI_PADCTL" "No action,Teardown"
bitfld.long 0x00 4. "  SE4_TEARDOWN       ,Teardown module for SE4" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 3. " SE3_TEARDOWN        ,Teardown module for SE3" "No action,Teardown"
bitfld.long 0x00 2. "  SE2_TEARDOWN       ,Teardown module for SE2" "No action,Teardown"
textline "                                    "
bitfld.long 0x00 1. " SE1_TEARDOWN        ,Teardown module for SE1" "No action,Teardown"
bitfld.long 0x00 0. "  THOST_TEARDOWN     ,Teardown module for THOST" "No action,Teardown"
tree "CLIENT STATUS Registers"
width 32.
rgroup.long 0x2144++0x5F
line.long 0x00 "THOST_COMMON_THOST_STATUS,THost Common THOST Status Register"
bitfld.long 0x00 16.--21. " THOST_CURRCH      ,Current THOST status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--9. 1. "  THOST_CURRCL      ,Current THOST ClassID"
line.long 0x04 "THOST_COMMON_SE1_STATUS,THost Common SE1 Status Register"
bitfld.long 0x04 16.--21. " SE1_CURRCH        ,Current SE1 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x04 0.--9. 1. "  SE1_CURRCL        ,Current SE1 ClassID"
line.long 0x08 "THOST_COMMON_SE2_STATUS,THost Common SE2 Status Register"
bitfld.long 0x08 16.--21. " SE2_CURRCH        ,Current SE2 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x08 0.--9. 1. "  SE2_CURRCL        ,Current SE2 ClassID"
line.long 0x0C "THOST_COMMON_SE3_STATUS,THost Common SE3 Status Register"
bitfld.long 0x0C 16.--21. " SE3_CURRCH        ,Current SE3 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x0C 0.--9. 1. "  SE3_CURRCL        ,Current SE3 ClassID"
line.long 0x10 "THOST_COMMON_SE4_STATUS,THost Common SE4 Status Register"
bitfld.long 0x10 16.--21. " SE4_CURRCH        ,Current SE4 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x10 0.--9. 1. "  SE4_CURRCL        ,Current SE4 ClassID"
line.long 0x14 "THOST_COMMON_DSI_PADCTL_STATUS,THost Common DSI_PADCTL Status Register"
bitfld.long 0x14 16.--21. " DSI_PADCTL_CURRCH ,Current DSI_PADCTL status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x14 0.--9. 1. "  DSI_PADCTL_CURRCL ,Current DSI_PADCTL ClassID"
line.long 0x18 "THOST_COMMON_NVDISPLAY_STATUS,THost Common NVDISPLAY Status Register"
bitfld.long 0x18 16.--21. " NVDISPLAY_CURRCH  ,Current NVDISPLAY status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x18 0.--9. 1. "  NVDISPLAY_CURRCL  ,Current NVDISPLAY ClassID"
line.long 0x1C "THOST_COMMON_NVCSI_STATUS,THost Common NVCSI Status Register"
bitfld.long 0x1C 16.--21. " NVCSI_CURRCH      ,Current NVCSI status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x1C 0.--9. 1. "  NVCSI_CURRCL      ,Current NVCSI ClassID"
line.long 0x20 "THOST_COMMON_ISP_STATUS,THost Common ISP Status Register"
bitfld.long 0x20 16.--21. " ISP_CURRCH        ,Current ISP status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x20 0.--9. 1. "  ISP_CURRCL        ,Current ISP ClassID"
line.long 0x24 "THOST_COMMON_DSIC_STATUS,THost Common DSIC Status Register"
bitfld.long 0x24 16.--21. " DSIC_CURRCH       ,Current DSIC status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x24 0.--9. 1. "  DSIC_CURRCL       ,Current DSIC ClassID"
line.long 0x28 "THOST_COMMON_DSI_STATUS,THost Common DSI Status Register"
bitfld.long 0x28 16.--21. " DSI_CURRCH        ,Current DSI status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x28 0.--9. 1. "  DSI_CURRCL        ,Current DSI ClassID"
line.long 0x2C "THOST_COMMON_DSIB_STATUS,THost Common DSIB Status Register"
bitfld.long 0x2C 16.--21. " DSIB_CURRCH       ,Current DSIB status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x2C 0.--9. 1. "  DSIB_CURRCL       ,Current DSIB ClassID"
line.long 0x30 "THOST_COMMON_SOR_STATUS,THost Common SOR Status Register"
bitfld.long 0x30 16.--21. " SOR_CURRCH        ,Current SOR status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x30 0.--9. 1. "  SOR_CURRCL        ,Current SOR ClassID"
line.long 0x34 "THOST_COMMON_SOR1_STATUS,THost Common SOR1 Status Register"
bitfld.long 0x34 16.--21. " SOR1_CURRCH       ,Current SOR1 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x34 0.--9. 1. "  SOR1_CURRCL       ,Current SOR1 ClassID"
line.long 0x38 "THOST_COMMON_DPAUX_STATUS,THost Common DPAUX Status Register"
bitfld.long 0x38 16.--21. " DPAUX_CURRCH      ,Current DPAUX status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x38 0.--9. 1. "  DPAUX_CURRCL      ,Current DPAUX ClassID"
line.long 0x3C "THOST_COMMON_DPAUX1_STATUS,THost Common DPAUX1 Status Register"
bitfld.long 0x3C 16.--21. " DPAUX1_CURRCH     ,Current DPAUX1 status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x3C 0.--9. 1. "  DPAUX1_CURRCL     ,Current DPAUX1 ClassID"
line.long 0x40 "THOST_COMMON_VI_STATUS,THost Common VI Status Register"
bitfld.long 0x40 16.--21. " VI_CURRCH         ,Current VI status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x40 0.--9. 1. "  VI_CURRCL         ,Current VI ClassID"
line.long 0x44 "THOST_COMMON_VIC_STATUS,THost Common VIC Status Register"
bitfld.long 0x44 16.--21. " VIC_CURRCH        ,Current VIC status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x44 0.--9. 1. "  VIC_CURRCL        ,Current VIC ClassID"
line.long 0x48 "THOST_COMMON_NVENC_STATUS,THost Common NVENC Status Register"
bitfld.long 0x48 16.--21. " NVENC_CURRCH      ,Current NVENC status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x48 0.--9. 1. "  NVENC_CURRCL      ,Current NVENC ClassID"
line.long 0x4C "THOST_COMMON_NVDEC_STATUS,THost Common NVDEC Status Register"
bitfld.long 0x4C 16.--21. " NVDEC_CURRCH      ,Current NVDEC status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x4C 0.--9. 1. "  NVDEC_CURRCL      ,Current NVDEC ClassID"
line.long 0x50 "THOST_COMMON_NVJPG_STATUS,THost Common NVJPG Status Register"
bitfld.long 0x50 16.--21. " NVJPG_CURRCH      ,Current NVJPG status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x50 0.--9. 1. "  NVJPG_CURRCL      ,Current NVJPG ClassID"
line.long 0x54 "THOST_COMMON_TSEC_STATUS,THost Common TSEC Status Register"
bitfld.long 0x54 16.--21. " TSEC_CURRCH       ,Current TSEC status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x54 0.--9. 1. "  TSEC_CURRCL       ,Current TSEC ClassID"
line.long 0x58 "THOST_COMMON_TSECB_STATUS,THost Common TSECB Status Register"
bitfld.long 0x58 16.--21. " TSECB_CURRCH      ,Current TSECB status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x58 0.--9. 1. "  TSECB_CURRCL      ,Current TSECB ClassID"
line.long 0x5C "THOST_COMMON_DSID_STATUS,THost Common DSID Status Register"
bitfld.long 0x5C 16.--21. " DSID_CURRCH       ,Current DSID status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x5C 0.--9. 1. "  DSID_CURRCL       ,Current DSID ClassID"
tree.end
textline "                                                          "
width 49.
group.long 0x2250++0x03
line.long 0x00 "THOST_COMMON_AXI_TIMEOUT_CFG,THost Common AXI Time-out Configuration Register"
rgroup.long 0x2254++0x1F
line.long 0x00 "THOST_COMMON_AXIREAD_TIMEOUT_ADDR_0,THost Common AXI Read Time-out adress Register"
hexmask.long.tbyte 0x00 0.--23. 0x1 " AXIREAD_TIMEOUT_ADDR         ,AXI Read Time-out adress"
line.long 0x04 "THOST_COMMON_AXIREAD_TIMEOUT_ID,THost Common AXI Read Time-out ID Register"
hexmask.long.tbyte 0x04 0.--16. 1. " AXIREAD_TIMEOUT_ID           ,AXI Read Time-out ID"
line.long 0x08 "THOST_COMMON_AXIWRITE_TIMEOUT_ADDR_0,THost Common AXI Write Time-out adress Register"
hexmask.long.tbyte 0x08 0.--23. 0x1 " AXIWRITE_TIMEOUT_ADDR        ,AXI Write time-out adress"
line.long 0x0C "THOST_COMMON_AXIWRITE_TIMEOUT_ID,THost Common AXI Write Time-out ID Register"
line.long 0x10 "THOST_COMMON_ILLEGAL_SYNCPT_ACCESS_FRM_MMIO,THOST Common Illegal Syncpt Access Debug Register"
hexmask.long.byte 0x10 16.--23. 1. " ILLEGAL_SYNCPT_INDX_MMIO     ,Illegal SYNCPT index MMIO"
bitfld.long 0x10 0. "      ILLEGAL_SYNCPT_ACCESS_MMIO ,Illegal syncpt access MMIO" "0,1"
line.long 0x14 "THOST_COMMON_ILLEGAL_SYNCPT_ACCESS_FRM_CLIENT,THost Common Illegal Syncpt Access FRM Client Register"
hexmask.long.byte 0x14 16.--23. 1. " ILLEGAL_SYNCPT_INDX_CLIENT   ,Illegal SYNCPT index CLIENT"
bitfld.long 0x14 10.--15. "      ILLEGAL_CHANNELID_CLIENT   ,Illegal Channel ID CLIENT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                          "
bitfld.long 0x14 0. " ILLEGAL_SYNCPT_ACCESS_CLIENT ,Illegal syncpt access client" "0,1"
line.long 0x18 "THOST_COMMON_ILLEGAL_SYNCPT_ACCESS_FRM_GPU,THost common illegal syncpt access FRM GPU"
hexmask.long.word 0x18 16.--25. 1. " ILLEGAL_SYNCPT_INDX_GPU      ,Illegal syncpt indx GPU"
textline "                                                          "
bitfld.long 0x18 0. " ILLEGAL_SYNCPT_ACCESS_GPU    ,Illegal syncpt access GPU" "0,1"
line.long 0x1C "THOST_COMMON_ILLEGAL_SYNCPT_ACCESS_FRM_PB,THost Common Illegal Syncpt Access FRM PB"
hexmask.long.word 0x1C 16.--25. 1. " ILLEGAL_SYNCPT_INDX_PB       ,Illegal syncpt indx PB"
bitfld.long 0x1C 10.--15. "    ILLEGAL_CHANNELID_PB       ,Illegal channelid PB" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                          "
bitfld.long 0x1C 0. " ILLEGAL_SYNCPT_ACCESS_PB     ,Illegal syncpt access PB" "0,1"
group.long 0x22E0++0x03
line.long 0x00 "THOST_COMMON_CTXSW_TIMEOUT_CFG,THost Common CTXSW Time-out CFG Register"
hexmask.long.word 0x00 0.--15. 1. " CTXSW_TIMEOUT_CFG            ,CTXSW Time-out CFG"
group.long 0x2334++0x07
line.long 0x00 "THOST_COMMON_CMDFIFO_SEC_CTRL,THost Common CMDFIFO Security Control Register"
bitfld.long 0x00 0. " CMDFIFO_SEC_CTRL             ,CMDFIFO Security Control" "0,1"
line.long 0x04 "THOST_COMMON_CMDFIFO_SETUPDONE,THost Common CMDFIFO SETUPDONE Register"
bitfld.long 0x04 0. " CMDFIFO_SETUPDONE            ,CMDFIFO Set up done" "0,1"
tree "THOST_COMMON_CHANNELS_CMDFIFO_PIOWR"
width 33.
group.long 0x2388++0x03
line.long 0x00 "THOST_COMMON_CH0_CMDFIFO_PIOWR,THost Common Channel 0 CMDFIFO PIO Write Register"
group.long 0x238C++0x03
line.long 0x00 "THOST_COMMON_CH1_CMDFIFO_PIOWR,THost Common Channel 1 CMDFIFO PIO Write Register"
group.long 0x2390++0x03
line.long 0x00 "THOST_COMMON_CH2_CMDFIFO_PIOWR,THost Common Channel 2 CMDFIFO PIO Write Register"
group.long 0x2394++0x03
line.long 0x00 "THOST_COMMON_CH3_CMDFIFO_PIOWR,THost Common Channel 3 CMDFIFO PIO Write Register"
group.long 0x2398++0x03
line.long 0x00 "THOST_COMMON_CH4_CMDFIFO_PIOWR,THost Common Channel 4 CMDFIFO PIO Write Register"
group.long 0x239C++0x03
line.long 0x00 "THOST_COMMON_CH5_CMDFIFO_PIOWR,THost Common Channel 5 CMDFIFO PIO Write Register"
group.long 0x23A0++0x03
line.long 0x00 "THOST_COMMON_CH6_CMDFIFO_PIOWR,THost Common Channel 6 CMDFIFO PIO Write Register"
group.long 0x23A4++0x03
line.long 0x00 "THOST_COMMON_CH7_CMDFIFO_PIOWR,THost Common Channel 7 CMDFIFO PIO Write Register"
group.long 0x23A8++0x03
line.long 0x00 "THOST_COMMON_CH8_CMDFIFO_PIOWR,THost Common Channel 8 CMDFIFO PIO Write Register"
group.long 0x23AC++0x03
line.long 0x00 "THOST_COMMON_CH9_CMDFIFO_PIOWR,THost Common Channel 9 CMDFIFO PIO Write Register"
group.long 0x23B0++0x03
line.long 0x00 "THOST_COMMON_CH10_CMDFIFO_PIOWR,THost Common Channel 10 CMDFIFO PIO Write Register"
group.long 0x23B4++0x03
line.long 0x00 "THOST_COMMON_CH11_CMDFIFO_PIOWR,THost Common Channel 11 CMDFIFO PIO Write Register"
group.long 0x23B8++0x03
line.long 0x00 "THOST_COMMON_CH12_CMDFIFO_PIOWR,THost Common Channel 12 CMDFIFO PIO Write Register"
group.long 0x23BC++0x03
line.long 0x00 "THOST_COMMON_CH13_CMDFIFO_PIOWR,THost Common Channel 13 CMDFIFO PIO Write Register"
group.long 0x23C0++0x03
line.long 0x00 "THOST_COMMON_CH14_CMDFIFO_PIOWR,THost Common Channel 14 CMDFIFO PIO Write Register"
group.long 0x23C4++0x03
line.long 0x00 "THOST_COMMON_CH15_CMDFIFO_PIOWR,THost Common Channel 15 CMDFIFO PIO Write Register"
group.long 0x23C8++0x03
line.long 0x00 "THOST_COMMON_CH16_CMDFIFO_PIOWR,THost Common Channel 16 CMDFIFO PIO Write Register"
group.long 0x23CC++0x03
line.long 0x00 "THOST_COMMON_CH17_CMDFIFO_PIOWR,THost Common Channel 17 CMDFIFO PIO Write Register"
group.long 0x23D0++0x03
line.long 0x00 "THOST_COMMON_CH18_CMDFIFO_PIOWR,THost Common Channel 18 CMDFIFO PIO Write Register"
group.long 0x23D4++0x03
line.long 0x00 "THOST_COMMON_CH19_CMDFIFO_PIOWR,THost Common Channel 19 CMDFIFO PIO Write Register"
group.long 0x23D8++0x03
line.long 0x00 "THOST_COMMON_CH20_CMDFIFO_PIOWR,THost Common Channel 20 CMDFIFO PIO Write Register"
group.long 0x23DC++0x03
line.long 0x00 "THOST_COMMON_CH21_CMDFIFO_PIOWR,THost Common Channel 21 CMDFIFO PIO Write Register"
group.long 0x23E0++0x03
line.long 0x00 "THOST_COMMON_CH22_CMDFIFO_PIOWR,THost Common Channel 22 CMDFIFO PIO Write Register"
group.long 0x23E4++0x03
line.long 0x00 "THOST_COMMON_CH23_CMDFIFO_PIOWR,THost Common Channel 23 CMDFIFO PIO Write Register"
group.long 0x23E8++0x03
line.long 0x00 "THOST_COMMON_CH24_CMDFIFO_PIOWR,THost Common Channel 24 CMDFIFO PIO Write Register"
group.long 0x23EC++0x03
line.long 0x00 "THOST_COMMON_CH25_CMDFIFO_PIOWR,THost Common Channel 25 CMDFIFO PIO Write Register"
group.long 0x23F0++0x03
line.long 0x00 "THOST_COMMON_CH26_CMDFIFO_PIOWR,THost Common Channel 26 CMDFIFO PIO Write Register"
group.long 0x23F4++0x03
line.long 0x00 "THOST_COMMON_CH27_CMDFIFO_PIOWR,THost Common Channel 27 CMDFIFO PIO Write Register"
group.long 0x23F8++0x03
line.long 0x00 "THOST_COMMON_CH28_CMDFIFO_PIOWR,THost Common Channel 28 CMDFIFO PIO Write Register"
group.long 0x23FC++0x03
line.long 0x00 "THOST_COMMON_CH29_CMDFIFO_PIOWR,THost Common Channel 29 CMDFIFO PIO Write Register"
group.long 0x2400++0x03
line.long 0x00 "THOST_COMMON_CH30_CMDFIFO_PIOWR,THost Common Channel 30 CMDFIFO PIO Write Register"
group.long 0x2404++0x03
line.long 0x00 "THOST_COMMON_CH31_CMDFIFO_PIOWR,THost Common Channel 31 CMDFIFO PIO Write Register"
group.long 0x2408++0x03
line.long 0x00 "THOST_COMMON_CH32_CMDFIFO_PIOWR,THost Common Channel 32 CMDFIFO PIO Write Register"
group.long 0x240C++0x03
line.long 0x00 "THOST_COMMON_CH33_CMDFIFO_PIOWR,THost Common Channel 33 CMDFIFO PIO Write Register"
group.long 0x2410++0x03
line.long 0x00 "THOST_COMMON_CH34_CMDFIFO_PIOWR,THost Common Channel 34 CMDFIFO PIO Write Register"
group.long 0x2414++0x03
line.long 0x00 "THOST_COMMON_CH35_CMDFIFO_PIOWR,THost Common Channel 35 CMDFIFO PIO Write Register"
group.long 0x2418++0x03
line.long 0x00 "THOST_COMMON_CH36_CMDFIFO_PIOWR,THost Common Channel 36 CMDFIFO PIO Write Register"
group.long 0x241C++0x03
line.long 0x00 "THOST_COMMON_CH37_CMDFIFO_PIOWR,THost Common Channel 37 CMDFIFO PIO Write Register"
group.long 0x2420++0x03
line.long 0x00 "THOST_COMMON_CH38_CMDFIFO_PIOWR,THost Common Channel 38 CMDFIFO PIO Write Register"
group.long 0x2424++0x03
line.long 0x00 "THOST_COMMON_CH39_CMDFIFO_PIOWR,THost Common Channel 39 CMDFIFO PIO Write Register"
group.long 0x2428++0x03
line.long 0x00 "THOST_COMMON_CH40_CMDFIFO_PIOWR,THost Common Channel 40 CMDFIFO PIO Write Register"
group.long 0x242C++0x03
line.long 0x00 "THOST_COMMON_CH41_CMDFIFO_PIOWR,THost Common Channel 41 CMDFIFO PIO Write Register"
group.long 0x2430++0x03
line.long 0x00 "THOST_COMMON_CH42_CMDFIFO_PIOWR,THost Common Channel 42 CMDFIFO PIO Write Register"
group.long 0x2434++0x03
line.long 0x00 "THOST_COMMON_CH43_CMDFIFO_PIOWR,THost Common Channel 43 CMDFIFO PIO Write Register"
group.long 0x2438++0x03
line.long 0x00 "THOST_COMMON_CH44_CMDFIFO_PIOWR,THost Common Channel 44 CMDFIFO PIO Write Register"
group.long 0x243C++0x03
line.long 0x00 "THOST_COMMON_CH45_CMDFIFO_PIOWR,THost Common Channel 45 CMDFIFO PIO Write Register"
group.long 0x2440++0x03
line.long 0x00 "THOST_COMMON_CH46_CMDFIFO_PIOWR,THost Common Channel 46 CMDFIFO PIO Write Register"
group.long 0x2444++0x03
line.long 0x00 "THOST_COMMON_CH47_CMDFIFO_PIOWR,THost Common Channel 47 CMDFIFO PIO Write Register"
group.long 0x2448++0x03
line.long 0x00 "THOST_COMMON_CH48_CMDFIFO_PIOWR,THost Common Channel 48 CMDFIFO PIO Write Register"
group.long 0x244C++0x03
line.long 0x00 "THOST_COMMON_CH49_CMDFIFO_PIOWR,THost Common Channel 49 CMDFIFO PIO Write Register"
group.long 0x2450++0x03
line.long 0x00 "THOST_COMMON_CH50_CMDFIFO_PIOWR,THost Common Channel 50 CMDFIFO PIO Write Register"
group.long 0x2454++0x03
line.long 0x00 "THOST_COMMON_CH51_CMDFIFO_PIOWR,THost Common Channel 51 CMDFIFO PIO Write Register"
group.long 0x2458++0x03
line.long 0x00 "THOST_COMMON_CH52_CMDFIFO_PIOWR,THost Common Channel 52 CMDFIFO PIO Write Register"
group.long 0x245C++0x03
line.long 0x00 "THOST_COMMON_CH53_CMDFIFO_PIOWR,THost Common Channel 53 CMDFIFO PIO Write Register"
group.long 0x2460++0x03
line.long 0x00 "THOST_COMMON_CH54_CMDFIFO_PIOWR,THost Common Channel 54 CMDFIFO PIO Write Register"
group.long 0x2464++0x03
line.long 0x00 "THOST_COMMON_CH55_CMDFIFO_PIOWR,THost Common Channel 55 CMDFIFO PIO Write Register"
group.long 0x2468++0x03
line.long 0x00 "THOST_COMMON_CH56_CMDFIFO_PIOWR,THost Common Channel 56 CMDFIFO PIO Write Register"
group.long 0x246C++0x03
line.long 0x00 "THOST_COMMON_CH57_CMDFIFO_PIOWR,THost Common Channel 57 CMDFIFO PIO Write Register"
group.long 0x2470++0x03
line.long 0x00 "THOST_COMMON_CH58_CMDFIFO_PIOWR,THost Common Channel 58 CMDFIFO PIO Write Register"
group.long 0x2474++0x03
line.long 0x00 "THOST_COMMON_CH59_CMDFIFO_PIOWR,THost Common Channel 59 CMDFIFO PIO Write Register"
group.long 0x2478++0x03
line.long 0x00 "THOST_COMMON_CH60_CMDFIFO_PIOWR,THost Common Channel 60 CMDFIFO PIO Write Register"
group.long 0x247C++0x03
line.long 0x00 "THOST_COMMON_CH61_CMDFIFO_PIOWR,THost Common Channel 61 CMDFIFO PIO Write Register"
group.long 0x2480++0x03
line.long 0x00 "THOST_COMMON_CH62_CMDFIFO_PIOWR,THost Common Channel 62 CMDFIFO PIO Write Register"
tree.end
tree "THOST_COMMON_CHANNELS_CMDFIFO_SETUP"
group.long 0x2588++0x03
line.long 0x00 "THOST_COMMON_CH0_CMDFIFO_SETUP,THost Common Channel_0 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH0_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH0_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x258C++0x03
line.long 0x00 "THOST_COMMON_CH1_CMDFIFO_SETUP,THost Common Channel_1 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH1_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH1_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x2590++0x03
line.long 0x00 "THOST_COMMON_CH2_CMDFIFO_SETUP,THost Common Channel_2 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH2_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH2_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x2594++0x03
line.long 0x00 "THOST_COMMON_CH3_CMDFIFO_SETUP,THost Common Channel_3 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH3_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH3_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x2598++0x03
line.long 0x00 "THOST_COMMON_CH4_CMDFIFO_SETUP,THost Common Channel_4 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH4_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH4_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x259C++0x03
line.long 0x00 "THOST_COMMON_CH5_CMDFIFO_SETUP,THost Common Channel_5 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH5_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH5_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x25A0++0x03
line.long 0x00 "THOST_COMMON_CH6_CMDFIFO_SETUP,THost Common Channel_6 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH6_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH6_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x25A4++0x03
line.long 0x00 "THOST_COMMON_CH7_CMDFIFO_SETUP,THost Common Channel_7 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH7_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH7_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x25A8++0x03
line.long 0x00 "THOST_COMMON_CH8_CMDFIFO_SETUP,THost Common Channel_8 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH8_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH8_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x25AC++0x03
line.long 0x00 "THOST_COMMON_CH9_CMDFIFO_SETUP,THost Common Channel_9 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH9_CMDFIFO_LIMIT   ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH9_CMDFIFO_BASE   ,Command FIFO base"
group.long 0x25B0++0x03
line.long 0x00 "THOST_COMMON_CH10_CMDFIFO_SETUP,THost Common Channel_10 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH10_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH10_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25B4++0x03
line.long 0x00 "THOST_COMMON_CH11_CMDFIFO_SETUP,THost Common Channel_11 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH11_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH11_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25B8++0x03
line.long 0x00 "THOST_COMMON_CH12_CMDFIFO_SETUP,THost Common Channel_12 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH12_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH12_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25BC++0x03
line.long 0x00 "THOST_COMMON_CH13_CMDFIFO_SETUP,THost Common Channel_13 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH13_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH13_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25C0++0x03
line.long 0x00 "THOST_COMMON_CH14_CMDFIFO_SETUP,THost Common Channel_14 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH14_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH14_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25C4++0x03
line.long 0x00 "THOST_COMMON_CH15_CMDFIFO_SETUP,THost Common Channel_15 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH15_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH15_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25C8++0x03
line.long 0x00 "THOST_COMMON_CH16_CMDFIFO_SETUP,THost Common Channel_16 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH16_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH16_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25CC++0x03
line.long 0x00 "THOST_COMMON_CH17_CMDFIFO_SETUP,THost Common Channel_17 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH17_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH17_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25D0++0x03
line.long 0x00 "THOST_COMMON_CH18_CMDFIFO_SETUP,THost Common Channel_18 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH18_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH18_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25D4++0x03
line.long 0x00 "THOST_COMMON_CH19_CMDFIFO_SETUP,THost Common Channel_19 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH19_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH19_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25D8++0x03
line.long 0x00 "THOST_COMMON_CH20_CMDFIFO_SETUP,THost Common Channel_20 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH20_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH20_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25DC++0x03
line.long 0x00 "THOST_COMMON_CH21_CMDFIFO_SETUP,THost Common Channel_21 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH21_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH21_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25E0++0x03
line.long 0x00 "THOST_COMMON_CH22_CMDFIFO_SETUP,THost Common Channel_22 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH22_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH22_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25E4++0x03
line.long 0x00 "THOST_COMMON_CH23_CMDFIFO_SETUP,THost Common Channel_23 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH23_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH23_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25E8++0x03
line.long 0x00 "THOST_COMMON_CH24_CMDFIFO_SETUP,THost Common Channel_24 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH24_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH24_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25EC++0x03
line.long 0x00 "THOST_COMMON_CH25_CMDFIFO_SETUP,THost Common Channel_25 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH25_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH25_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25F0++0x03
line.long 0x00 "THOST_COMMON_CH26_CMDFIFO_SETUP,THost Common Channel_26 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH26_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH26_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25F4++0x03
line.long 0x00 "THOST_COMMON_CH27_CMDFIFO_SETUP,THost Common Channel_27 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH27_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH27_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25F8++0x03
line.long 0x00 "THOST_COMMON_CH28_CMDFIFO_SETUP,THost Common Channel_28 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH28_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH28_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x25FC++0x03
line.long 0x00 "THOST_COMMON_CH29_CMDFIFO_SETUP,THost Common Channel_29 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH29_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH29_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2600++0x03
line.long 0x00 "THOST_COMMON_CH30_CMDFIFO_SETUP,THost Common Channel_30 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH30_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH30_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2604++0x03
line.long 0x00 "THOST_COMMON_CH31_CMDFIFO_SETUP,THost Common Channel_31 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH31_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH31_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2608++0x03
line.long 0x00 "THOST_COMMON_CH32_CMDFIFO_SETUP,THost Common Channel_32 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH32_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH32_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x260C++0x03
line.long 0x00 "THOST_COMMON_CH33_CMDFIFO_SETUP,THost Common Channel_33 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH33_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH33_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2610++0x03
line.long 0x00 "THOST_COMMON_CH34_CMDFIFO_SETUP,THost Common Channel_34 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH34_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH34_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2614++0x03
line.long 0x00 "THOST_COMMON_CH35_CMDFIFO_SETUP,THost Common Channel_35 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH35_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH35_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2618++0x03
line.long 0x00 "THOST_COMMON_CH36_CMDFIFO_SETUP,THost Common Channel_36 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH36_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH36_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x261C++0x03
line.long 0x00 "THOST_COMMON_CH37_CMDFIFO_SETUP,THost Common Channel_37 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH37_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH37_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2620++0x03
line.long 0x00 "THOST_COMMON_CH38_CMDFIFO_SETUP,THost Common Channel_38 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH38_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH38_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2624++0x03
line.long 0x00 "THOST_COMMON_CH39_CMDFIFO_SETUP,THost Common Channel_39 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH39_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH39_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2628++0x03
line.long 0x00 "THOST_COMMON_CH40_CMDFIFO_SETUP,THost Common Channel_40 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH40_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH40_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x262C++0x03
line.long 0x00 "THOST_COMMON_CH41_CMDFIFO_SETUP,THost Common Channel_41 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH41_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH41_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2630++0x03
line.long 0x00 "THOST_COMMON_CH42_CMDFIFO_SETUP,THost Common Channel_42 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH42_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH42_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2634++0x03
line.long 0x00 "THOST_COMMON_CH43_CMDFIFO_SETUP,THost Common Channel_43 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH43_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH43_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2638++0x03
line.long 0x00 "THOST_COMMON_CH44_CMDFIFO_SETUP,THost Common Channel_44 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH44_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH44_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x263C++0x03
line.long 0x00 "THOST_COMMON_CH45_CMDFIFO_SETUP,THost Common Channel_45 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH45_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH45_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2640++0x03
line.long 0x00 "THOST_COMMON_CH46_CMDFIFO_SETUP,THost Common Channel_46 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH46_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH46_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2644++0x03
line.long 0x00 "THOST_COMMON_CH47_CMDFIFO_SETUP,THost Common Channel_47 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH47_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH47_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2648++0x03
line.long 0x00 "THOST_COMMON_CH48_CMDFIFO_SETUP,THost Common Channel_48 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH48_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH48_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x264C++0x03
line.long 0x00 "THOST_COMMON_CH49_CMDFIFO_SETUP,THost Common Channel_49 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH49_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH49_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2650++0x03
line.long 0x00 "THOST_COMMON_CH50_CMDFIFO_SETUP,THost Common Channel_50 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH50_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH50_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2654++0x03
line.long 0x00 "THOST_COMMON_CH51_CMDFIFO_SETUP,THost Common Channel_51 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH51_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH51_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2658++0x03
line.long 0x00 "THOST_COMMON_CH52_CMDFIFO_SETUP,THost Common Channel_52 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH52_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH52_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x265C++0x03
line.long 0x00 "THOST_COMMON_CH53_CMDFIFO_SETUP,THost Common Channel_53 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH53_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH53_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2660++0x03
line.long 0x00 "THOST_COMMON_CH54_CMDFIFO_SETUP,THost Common Channel_54 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH54_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH54_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2664++0x03
line.long 0x00 "THOST_COMMON_CH55_CMDFIFO_SETUP,THost Common Channel_55 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH55_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH55_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2668++0x03
line.long 0x00 "THOST_COMMON_CH56_CMDFIFO_SETUP,THost Common Channel_56 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH56_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH56_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x266C++0x03
line.long 0x00 "THOST_COMMON_CH57_CMDFIFO_SETUP,THost Common Channel_57 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH57_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH57_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2670++0x03
line.long 0x00 "THOST_COMMON_CH58_CMDFIFO_SETUP,THost Common Channel_58 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH58_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH58_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2674++0x03
line.long 0x00 "THOST_COMMON_CH59_CMDFIFO_SETUP,THost Common Channel_59 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH59_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH59_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2678++0x03
line.long 0x00 "THOST_COMMON_CH60_CMDFIFO_SETUP,THost Common Channel_60 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH60_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH60_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x267C++0x03
line.long 0x00 "THOST_COMMON_CH61_CMDFIFO_SETUP,THost Common Channel_61 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH61_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH61_CMDFIFO_BASE  ,Command FIFO base"
group.long 0x2680++0x03
line.long 0x00 "THOST_COMMON_CH62_CMDFIFO_SETUP,THost Common Channel_62 Command FIFO Set Up/Size Control Register"
hexmask.long.word 0x00 16.--27. 1. " CH62_CMDFIFO_LIMIT  ,Command FIFO limit"
hexmask.long.word 0x00 0.--11. 1. "         CH62_CMDFIFO_BASE  ,Command FIFO base"
tree.end
tree "Syncpt Threshold Interrupt CPU2"
width 47.
group.long 0x2788++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_0,Syncpt Threshold Interrupt Status Register 0"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x278C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_1,Syncpt Threshold Interrupt Status Register 1"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x2790++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_2,Syncpt Threshold Interrupt Status Register 2"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x2794++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_3,Syncpt Threshold Interrupt Status Register 3"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x2798++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_4,Syncpt Threshold Interrupt Status Register 4"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x279C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_5,Syncpt Threshold Interrupt Status Register 5"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27A0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_6,Syncpt Threshold Interrupt Status Register 6"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27A4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_7,Syncpt Threshold Interrupt Status Register 7"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27A8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_8,Syncpt Threshold Interrupt Status Register 8"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27AC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_9,Syncpt Threshold Interrupt Status Register 9"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27B0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_10,Syncpt Threshold Interrupt Status Register 10"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27B4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_11,Syncpt Threshold Interrupt Status Register 11"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27B8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_12,Syncpt Threshold Interrupt Status Register 12"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27BC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_13,Syncpt Threshold Interrupt Status Register 13"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27C0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_14,Syncpt Threshold Interrupt Status Register 14"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27C4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_15,Syncpt Threshold Interrupt Status Register 15"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27C8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_16,Syncpt Threshold Interrupt Status Register 16"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x27CC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU2_17,Syncpt Threshold Interrupt Status Register 17"
eventfld.long 0x00 31. " INTRSTATUS_CPU2_7[3]   ,TrustZone interrupt status for CPU2_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,TrustZone interrupt status for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,TrustZone interrupt status for CPU2_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,TrustZone interrupt status for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU2_6[3]   ,TrustZone interrupt status for CPU2_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,TrustZone interrupt status for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,TrustZone interrupt status for CPU2_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,TrustZone interrupt status for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU2_5[3]   ,TrustZone interrupt status for CPU2_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,TrustZone interrupt status for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,TrustZone interrupt status for CPU2_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,TrustZone interrupt status for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU2_4[3]   ,TrustZone interrupt status for CPU2_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,TrustZone interrupt status for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,TrustZone interrupt status for CPU2_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,TrustZone interrupt status for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU2_3[3]   ,TrustZone interrupt status for CPU2_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,TrustZone interrupt status for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,TrustZone interrupt status for CPU2_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,TrustZone interrupt status for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU2_2[3]   ,TrustZone interrupt status for CPU2_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,TrustZone interrupt status for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,TrustZone interrupt status for CPU2_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,TrustZone interrupt status for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU2_1[3]   ,TrustZone interrupt status for CPU2_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,TrustZone interrupt status for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,TrustZone interrupt status for CPU2_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,TrustZone interrupt status for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU2_0[3]   ,TrustZone interrupt status for CPU2_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,TrustZone interrupt status for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,TrustZone interrupt status for CPU2_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,TrustZone interrupt status for CPU2_0_[0]" "Not panding,Panding"
group.long 0x2850++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_0,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2854++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_1,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2858++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_2,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x285C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_3,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2860++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_4,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2864++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_5,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2868++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_6,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x286C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_7,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2870++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_8,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2874++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_9,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2878++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_10,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x287C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_11,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2880++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_12,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2884++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_13,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2888++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_14,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x288C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_15,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2890++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_16,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x2894++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU2_17,THost Common Syncpt Threshold interrupt CPU2 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU2_7[3]  ,Syncpt threshold interrupt disable for CPU2_7_[3]" "Yes,No"
bitfld.long 0x00 30. "          [2]  ,Syncpt threshold interrupt disable for CPU2_7_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_7_[1]" "Yes,No"
bitfld.long 0x00 28. "          [0]  ,Syncpt threshold interrupt disable for CPU2_7_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU2_6[3]  ,Syncpt threshold interrupt disable for CPU2_6_[3]" "Yes,No"
bitfld.long 0x00 26. "          [2]  ,Syncpt threshold interrupt disable for CPU2_6_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_6_[1]" "Yes,No"
bitfld.long 0x00 24. "          [0]  ,Syncpt threshold interrupt disable for CPU2_6_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU2_5[3]  ,Syncpt threshold interrupt disable for CPU2_5_[3]" "Yes,No"
bitfld.long 0x00 22. "          [2]  ,Syncpt threshold interrupt disable for CPU2_5_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_5_[1]" "Yes,No"
bitfld.long 0x00 20. "          [0]  ,Syncpt threshold interrupt disable for CPU2_5_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU2_4[3]  ,Syncpt threshold interrupt disable for CPU2_4_[3]" "Yes,No"
bitfld.long 0x00 18. "          [2]  ,Syncpt threshold interrupt disable for CPU2_4_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_4_[1]" "Yes,No"
bitfld.long 0x00 16. "          [0]  ,Syncpt threshod interrupt disable for CPU2_4_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU2_3[3]  ,Syncpt threshold interrupt disable for CPU2_3_[3]" "Yes,No"
bitfld.long 0x00 14. "          [2]  ,Syncpt threshold interrupt disable for CPU2_3_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_3_[1]" "Yes,No"
bitfld.long 0x00 12. "          [0]  ,Syncpt threshold interrupt disable for CPU2_3_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU2_2[3]  ,Syncpt threshold interrupt disable for CPU2_2_[3]" "Yes,No"
bitfld.long 0x00 10. "          [2]  ,Syncpt threshold interrupt disable for CPU2_2_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_2_[1]" "Yes,No"
bitfld.long 0x00 8. "          [0]  ,Syncpt threshold interrupt disable for CPU2_2_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU2_1[3]  ,Syncpt threshold interrupt disable for CPU2_1_[3]" "Yes,No"
bitfld.long 0x00 6. "          [2]  ,Syncpt threshold interrupt disable for CPU2_1_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_1_[1]" "Yes,No"
bitfld.long 0x00 4. "          [0]  ,Syncpt threshold interrupt disable for CPU2_1_[0]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU2_0[3]  ,Syncpt threshold interrupt disable for CPU2_0_[3]" "Yes,No"
bitfld.long 0x00 2. "          [2]  ,Syncpt threshold interrupt disable for CPU2_0_[2]" "Yes,No"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU2_0_[1]" "Yes,No"
bitfld.long 0x00 0. "          [0]  ,Syncpt threshold interrupt disable for CPU2_0_[0]" "Yes,No"
group.long 0x28B4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_0,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28B8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_1,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28BC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_2,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28C0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_3,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28C4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_4,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28C8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_5,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28CC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_6,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28D0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_7,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28D4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_8,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28D8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_9,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28DC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_10,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28E0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_11,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28E4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_12,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28E8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_13,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28EC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_14,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28F0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_15,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28F4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_16,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
group.long 0x28F8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU2_17,THost Common Syncpt Threshold interrupt CPU2 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU2_7[3]   ,Syncpt threshold interrupt enable for CPU2_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU2_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU2_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU2_6[3]   ,Syncpt threshold interrupt enable for CPU2_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU2_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU2_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU2_5[3]   ,Syncpt threshold interrupt enable for CPU2_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU2_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU2_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU2_4[3]   ,Syncpt threshold interrupt enable for CPU2_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU2_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU2_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU2_3[3]   ,Syncpt threshold interrupt enable for CPU2_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU2_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU2_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU2_2[3]   ,Syncpt threshold interrupt enable for CPU2_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU2_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU2_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU2_1[3]   ,Syncpt threshold interrupt enable for CPU2_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU2_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU2_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU2_0[3]   ,Syncpt threshold interrupt enable for CPU2_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU2_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU2_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU2_0_[0]" "Not panding,Panding"
tree.end
tree "Syncpt Threshold Interrupt CPU3"
group.long 0x2918++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_0,Syncpt Threshold Interrupt Status CPU3 Register 0"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x291C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_1,Syncpt Threshold Interrupt Status CPU3 Register 1"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2920++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_2,Syncpt Threshold Interrupt Status CPU3 Register 2"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2924++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_3,Syncpt Threshold Interrupt Status CPU3 Register 3"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2928++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_4,Syncpt Threshold Interrupt Status CPU3 Register 4"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x292C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_5,Syncpt Threshold Interrupt Status CPU3 Register 5"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2930++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_6,Syncpt Threshold Interrupt Status CPU3 Register 6"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2934++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_7,Syncpt Threshold Interrupt Status CPU3 Register 7"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2938++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_8,Syncpt Threshold Interrupt Status CPU3 Register 8"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x293C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_9,Syncpt Threshold Interrupt Status CPU3 Register 9"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2940++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_10,Syncpt Threshold Interrupt Status CPU3 Register 10"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2944++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_11,Syncpt Threshold Interrupt Status CPU3 Register 11"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2948++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_12,Syncpt Threshold Interrupt Status CPU3 Register 12"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x294C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_13,Syncpt Threshold Interrupt Status CPU3 Register 13"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2950++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_14,Syncpt Threshold Interrupt Status CPU3 Register 14"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2954++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_15,Syncpt Threshold Interrupt Status CPU3 Register 15"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2958++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_16,Syncpt Threshold Interrupt Status CPU3 Register 16"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x295C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRSTATUS_CPU3_17,Syncpt Threshold Interrupt Status CPU3 Register 17"
eventfld.long 0x00 31. " INTRSTATUS_CPU3_7[3]   ,Syncpt threshold interrupt status for CPU3_7_[3]" "Not panding,Panding"
eventfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt status for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt status for CPU3_7_[1]" "Not panding,Panding"
eventfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt status for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 27. " INTRSTATUS_CPU3_6[3]   ,Syncpt threshold interrupt status for CPU3_6_[3]" "Not panding,Panding"
eventfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt status for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt status for CPU3_6_[1]" "Not panding,Panding"
eventfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt status for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 23. " INTRSTATUS_CPU3_5[3]   ,Syncpt threshold interrupt status for CPU3_5_[3]" "Not panding,Panding"
eventfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt status for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt status for CPU3_5_[1]" "Not panding,Panding"
eventfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt status for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 19. " INTRSTATUS_CPU3_4[3]   ,Syncpt threshold interrupt status for CPU3_4_[3]" "Not panding,Panding"
eventfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt status for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt status for CPU3_4_[1]" "Not panding,Panding"
eventfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt status for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 15. " INTRSTATUS_CPU3_3[3]   ,Syncpt threshold interrupt status for CPU3_3_[3]" "Not panding,Panding"
eventfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt status for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt status for CPU3_3_[1]" "Not panding,Panding"
eventfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt status for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 11. " INTRSTATUS_CPU3_2[3]   ,Syncpt threshold interrupt status for CPU3_2_[3]" "Not panding,Panding"
eventfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt status for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt status for CPU3_2_[1]" "Not panding,Panding"
eventfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt status for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 7. " INTRSTATUS_CPU3_1[3]   ,Syncpt threshold interrupt status for CPU3_1_[3]" "Not panding,Panding"
eventfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt status for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt status for CPU3_1_[1]" "Not panding,Panding"
eventfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt status for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 3. " INTRSTATUS_CPU3_0[3]   ,Syncpt threshold interrupt status for CPU3_0_[3]" "Not panding,Panding"
eventfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt status for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
eventfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt status for CPU3_0_[1]" "Not panding,Panding"
eventfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt status for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29E0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_0,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29E4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_1,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29E8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_2,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29EC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_3,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29F0++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_4,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29F4++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_5,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29F8++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_6,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x29FC++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_7,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A00++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_8,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A04++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_9,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A08++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_10,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A0C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_11,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A10++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_12,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A14++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_13,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A18++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_14,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A1C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_15,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A20++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_16,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A24++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRDISABLE_CPU3_17,THost Common Syncpt Threshold interrupt CPU3 disable Register"
bitfld.long 0x00 31. " INTRDISABLE_CPU3_7[3]  ,Syncpt threshold interrupt disable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt disable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt disable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRDISABLE_CPU3_6[3]  ,Syncpt threshold interrupt disable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt disable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt disable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRDISABLE_CPU3_5[3]  ,Syncpt threshold interrupt disable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt disable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt disable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRDISABLE_CPU3_4[3]  ,Syncpt threshold interrupt disable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt disable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt disable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRDISABLE_CPU3_3[3]  ,Syncpt threshold interrupt disable for CPU3_3_[3]" "Not panding,Panding"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt disable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt disable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRDISABLE_CPU3_2[3]  ,Syncpt threshold interrupt disable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt disable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt disable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRDISABLE_CPU3_1[3]  ,Syncpt threshold interrupt disable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt disable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt disable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRDISABLE_CPU3_0[3]  ,Syncpt threshold interrupt disable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt disable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                   [1]  ,Syncpt threshold interrupt disable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt disable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A44++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_0,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A48++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_1,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A4C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_2,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A50++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_3,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A54++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_4,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A58++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_5,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A5C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_6,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A60++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_7,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A64++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_8,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A68++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_9,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A6C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_10,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A70++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_11,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A74++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_12,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A78++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_13,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A7C++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_14,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A80++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_15,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A84++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_16,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
group.long 0x2A88++0x03
line.long 0x00 "THOST_COMMON_SYNCPT_THRESH_INTRENABLE_CPU3_17,THost Common Syncpt Threshold interrupt CPU3 enable Register"
bitfld.long 0x00 31. " INTRENABLE_CPU3_7[3]   ,Syncpt threshold interrupt enable for CPU3_7_[3]" "Not panding,Panding"
bitfld.long 0x00 30. "  [2]  ,Syncpt threshold interrupt enable for CPU3_7_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 29. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_7_[1]" "Not panding,Panding"
bitfld.long 0x00 28. "  [0]  ,Syncpt threshold interrupt enable for CPU3_7_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 27. " INTRENABLE_CPU3_6[3]   ,Syncpt threshold interrupt enable for CPU3_6_[3]" "Not panding,Panding"
bitfld.long 0x00 26. "  [2]  ,Syncpt threshold interrupt enable for CPU3_6_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 25. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_6_[1]" "Not panding,Panding"
bitfld.long 0x00 24. "  [0]  ,Syncpt threshold interrupt enable for CPU3_6_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 23. " INTRENABLE_CPU3_5[3]   ,Syncpt threshold interrupt enable for CPU3_5_[3]" "Not panding,Panding"
bitfld.long 0x00 22. "  [2]  ,Syncpt threshold interrupt enable for CPU3_5_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 21. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_5_[1]" "Not panding,Panding"
bitfld.long 0x00 20. "  [0]  ,Syncpt threshold interrupt enable for CPU3_5_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 19. " INTRENABLE_CPU3_4[3]   ,Syncpt threshold interrupt enable for CPU3_4_[3]" "Not panding,Panding"
bitfld.long 0x00 18. "  [2]  ,Syncpt threshold interrupt enable for CPU3_4_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 17. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_4_[1]" "Not panding,Panding"
bitfld.long 0x00 16. "  [0]  ,Syncpt threshold interrupt enable for CPU3_4_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 15. " INTRENABLE_CPU3_3[3]   ,Syncpt threshold interrupt enable for CPU3_3_[3]" "Not panding,Pandin;g"
bitfld.long 0x00 14. "  [2]  ,Syncpt threshold interrupt enable for CPU3_3_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 13. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_3_[1]" "Not panding,Panding"
bitfld.long 0x00 12. "  [0]  ,Syncpt threshold interrupt enable for CPU3_3_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 11. " INTRENABLE_CPU3_2[3]   ,Syncpt threshold interrupt enable for CPU3_2_[3]" "Not panding,Panding"
bitfld.long 0x00 10. "  [2]  ,Syncpt threshold interrupt enable for CPU3_2_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 9. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_2_[1]" "Not panding,Panding"
bitfld.long 0x00 8. "  [0]  ,Syncpt threshold interrupt enable for CPU3_2_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 7. " INTRENABLE_CPU3_1[3]   ,Syncpt threshold interrupt enable for CPU3_1_[3]" "Not panding,Panding"
bitfld.long 0x00 6. "  [2]  ,Syncpt threshold interrupt enable for CPU3_1_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 5. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_1_[1]" "Not panding,Panding"
bitfld.long 0x00 4. "  [0]  ,Syncpt threshold interrupt enable for CPU3_1_[0]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 3. " INTRENABLE_CPU3_0[3]   ,Syncpt threshold interrupt enable for CPU3_0_[3]" "Not panding,Panding"
bitfld.long 0x00 2. "  [2]  ,Syncpt threshold interrupt enable for CPU3_0_[2]" "Not panding,Panding"
textline "                                                        "
bitfld.long 0x00 1. "                  [1]   ,Syncpt threshold interrupt enable for CPU3_0_[1]" "Not panding,Panding"
bitfld.long 0x00 0. "  [0]  ,Syncpt threshold interrupt enable for CPU3_0_[0]" "Not panding,Panding"
tree.end
textline "                                                          "
width 34.
group.long 0x2AA8++0x03
line.long 0x00 "THOST_COMMON_ICG_EN_OVERRIDE,Host1x Internal SLCG/Clock-Gate Clock Override Register"
bitfld.long 0x00 0. " ICG_EN_OVERRIDE         ,ICG Enable override" "Disabled,Enabled"
group.long 0x2AB3++0x07
line.long 0x00 "THOST_COMMON_CH_ILLEGAL_ACCESS_0,THost Common Channel Access 0"
bitfld.long 0x00 31. " CH_ILLEGAL_ACCESS_7[3]  ,Channel illegal access 7_[3]" "No error,Error"
bitfld.long 0x00 30. "     [2]  ,Channel illegal access 7_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 29. "                    [1]  ,Channel illegal access 7_[1]" "No error,Error"
bitfld.long 0x00 28. "     [0]  ,Channel illegal access 7_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 27. " CH_ILLEGAL_ACCESS_6[3]  ,Channel illegal access 6_[3]" "No error,Error"
bitfld.long 0x00 26. "     [2]  ,Channel illegal access 6_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 25. "                    [1]  ,Channel illegal access 6_[1]" "No error,Error"
bitfld.long 0x00 24. "     [0]  ,Channel illegal access 6_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 23. " CH_ILLEGAL_ACCESS_5[3]  ,Channel illegal access 5_[3]" "No error,Error"
bitfld.long 0x00 22. "     [2]  ,Channel illegal access 5_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 21. "                    [1]  ,Channel illegal access 5_[1]" "No error,Error"
bitfld.long 0x00 20. "     [0]  ,Channel illegal access 5_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 19. " CH_ILLEGAL_ACCESS_4[3]  ,Channel illegal access 4_[3]" "No error,Error"
bitfld.long 0x00 18. "     [2]  ,Channel illegal access 4_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 17. "                    [1]  ,Channel illegal access 4_[1]" "No error,Error"
bitfld.long 0x00 16. "     [0]  ,Channel illegal access 4_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 15. " CH_ILLEGAL_ACCESS_3[3]  ,Channel illegal access 3_[3]" "No error,Error"
bitfld.long 0x00 14. "     [2]  ,Channel illegal access 3_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 13. "                    [1]  ,Channel illegal access 3_[1]" "No error,Error"
bitfld.long 0x00 12. "     [0]  ,Channel illegal access 3_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 11. " CH_ILLEGAL_ACCESS_2[3]  ,Channel illegal access 2_[3]" "No error,Error"
bitfld.long 0x00 10. "     [2]  ,Channel illegal access 2_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 9. "                    [1]  ,Channel illegal access 2_[1]" "No error,Error"
bitfld.long 0x00 8. "     [0]  ,Channel illegal access 2_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 7. " CH_ILLEGAL_ACCESS_1[3]  ,Channel illegal access 1_[3]" "No error,Error"
bitfld.long 0x00 6. "     [2]  ,Channel illegal access 1_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 5. "                    [1]  ,Channel illegal access 1_[1]" "No error,Error"
bitfld.long 0x00 4. "     [0]  ,Channel illegal access 1_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x00 3. " CH_ILLEGAL_ACCESS_0[3]  ,Channel illegal access 0_[3]" "No error,Error"
bitfld.long 0x00 2. "     [2]  ,Channel illegal access 0_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x00 1. "                    [1]  ,Channel illegal access 0_[1]" "No error,Error"
bitfld.long 0x00 0. "     [0]  ,Channel illegal access 0_[0]" "No error,Error"
line.long 0x04 "THOST_COMMON_CH_ILLEGAL_ACCESS_1,THost Common Channel Access 1"
bitfld.long 0x04 31. " CH_ILLEGAL_ACCESS_7[3]  ,Channel illegal access 7_[3]" "No error,Error"
bitfld.long 0x04 30. "     [2]  ,Channel illegal access 7_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 29. "                    [1]  ,Channel illegal access 7_[1]" "No error,Error"
bitfld.long 0x04 28. "     [0]  ,Channel illegal access 7_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 27. " CH_ILLEGAL_ACCESS_6[3]  ,Channel illegal access 6_[3]" "No error,Error"
bitfld.long 0x04 26. "     [2]  ,Channel illegal access 6_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 25. "                    [1]  ,Channel illegal access 6_[1]" "No error,Error"
bitfld.long 0x04 24. "     [0]  ,Channel illegal access 6_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 23. " CH_ILLEGAL_ACCESS_5[3]  ,Channel illegal access 5_[3]" "No error,Error"
bitfld.long 0x04 22. "     [2]  ,Channel illegal access 5_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 21. "                    [1]  ,Channel illegal access 5_[1]" "No error,Error"
bitfld.long 0x04 20. "     [0]  ,Channel illegal access 5_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 19. " CH_ILLEGAL_ACCESS_4[3]  ,Channel illegal access 4_[3]" "No error,Error"
bitfld.long 0x04 18. "     [2]  ,Channel illegal access 4_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 17. "                    [1]  ,Channel illegal access 4_[1]" "No error,Error"
bitfld.long 0x04 16. "     [0]  ,Channel illegal access 4_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 15. " CH_ILLEGAL_ACCESS_3[3]  ,Channel illegal access 3_[3]" "No error,Error"
bitfld.long 0x04 14. "     [2]  ,Channel illegal access 3_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 13. "                    [1]  ,Channel illegal access 3_[1]" "No error,Error"
bitfld.long 0x04 12. "     [0]  ,Channel illegal access 3_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 11. " CH_ILLEGAL_ACCESS_2[3]  ,Channel illegal access 2_[3]" "No error,Error"
bitfld.long 0x04 10. "     [2]  ,Channel illegal access 2_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 9. "                    [1]  ,Channel illegal access 2_[1]" "No error,Error"
bitfld.long 0x04 8. "     [0]  ,Channel illegal access 2_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 7. " CH_ILLEGAL_ACCESS_1[3]  ,Channel illegal access 1_[3]" "No error,Error"
bitfld.long 0x04 6. "     [2]  ,Channel illegal access 1_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 5. "                    [1]  ,Channel illegal access 1_[1]" "No error,Error"
bitfld.long 0x04 4. "     [0]  ,Channel illegal access 1_[0]" "No error,Error"
textline "                                           "
bitfld.long 0x04 3. " CH_ILLEGAL_ACCESS_0[3]  ,Channel illegal access 0_[3]" "No error,Error"
bitfld.long 0x04 2. "     [2]  ,Channel illegal access 0_[2]" "No error,Error"
textline "                                           "
bitfld.long 0x04 1. "                    [1]  ,Channel illegal access 0_[1]" "No error,Error"
bitfld.long 0x04 0. "     [0]  ,Channel illegal access 0_[0]" "No error,Error"
textline "                                           "
width 49.
group.long 0x2ABC++0x03
line.long 0x00 "THOST_COMMON_MOD_ILLEGAL_MMIOSTRMID_ACCESS_INTR,THost Common Mod Illegal MMIO Stream ID Access interrupt Register"
bitfld.long 0x00 24. " DSID_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for DSID" "No panding,Panding"
bitfld.long 0x00 23. "   TSECB_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for TSECB" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 22. " TSEC_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for ISEC" "No panding,Panding"
bitfld.long 0x00 21. "   NVJPG_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for NVJPG" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 20. " NVDEC_ILLEGAL_MMIOSTRMID_ACCESS_INTR      ,Illegal MMIO Stream-ID access interrupt for NVDEC" "No panding,Panding"
bitfld.long 0x00 19. "   NVENC_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for NVENC" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 18. " VIC_ILLEGAL_MMIOSTRMID_ACCESS_INTR        ,Illegal MMIO Stream-ID access interrupt for VIC" "No panding,Panding"
bitfld.long 0x00 17. "   VI_ILLEGAL_MMIOSTRMID_ACCESS_INTR          ,Illegal MMIO Stream-ID access interrupt for VI" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 16. " DPAUX1_ILLEGAL_MMIOSTRMID_ACCESS_INTR     ,Illegal MMIO Stream-ID access interrupt for DPAUX1" "No panding,Panding"
bitfld.long 0x00 15. "   DPAUX_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for DPAUX" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 14. " SOR1_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for SOR1" "No panding,Panding"
bitfld.long 0x00 13. "   SOR_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,Illegal MMIO Stream-ID access interrupt for SOR" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 12. " DSIB_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for DSIB" "No panding,Panding"
bitfld.long 0x00 11. "   DSI_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,Illegal MMIO Stream-ID access interrupt for DSI" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 10. " DSIC_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for DSIC" "No panding,Panding"
bitfld.long 0x00 9. "   ISP_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,Illegal MMIO Stream-ID access interrupt for ISP" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 8. " NVCSI_ILLEGAL_MMIOSTRMID_ACCESS_INTR      ,Illegal MMIO Stream-ID access interrupt for NVCSI" "No panding,Panding"
bitfld.long 0x00 7. "   NVDISPLAY_ILLEGAL_MMIOSTRMID_ACCESS_INTR   ,Illegal MMIO Stream-ID access interrupt for NVDISPLAY" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 6. " DSI_PADCTL_ILLEGAL_MMIOSTRMID_ACCESS_INTR ,Illegal MMIO Stream-ID access interrupt for DSI_PADCTL" "No panding,Panding"
bitfld.long 0x00 4. "   SE4_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,Illegal MMIO Stream-ID access interrupt for SE4" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 3. " SE3_ILLEGAL_MMIOSTRMID_ACCESS_INTR        ,Illegal MMIO Stream-ID access interrupt for SE3" "No panding,Panding"
bitfld.long 0x00 2. "   SE2_ILLEGAL_MMIOSTRMID_ACCESS_INTR         ,Illegal MMIO Stream-ID access interrupt for SE2" "No panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. " SE1_ILLEGAL_MMIOSTRMID_ACCESS_INTR        ,Illegal MMIO Stream-ID access interrupt for SE1" "No panding,Panding"
bitfld.long 0x00 0. "   THOST_ILLEGAL_MMIOSTRMID_ACCESS_INTR       ,Illegal MMIO Stream-ID access interrupt for THOST" "No panding,Panding"
group.long 0x2AD0++0x0b
line.long 0x00 "THOST_COMMON_THOST_HSM_INTRSTATUS,THost Common HSM Interrupt Status Register"
bitfld.long 0x00 31. " ILLEGAL_SYNCPT_ACCESS_MMIO_HSM_INTR       ,Illegal syncpt access MMIO HSM interrupt" "Not panding,Panding"
bitfld.long 0x00 30. "  ILLEGAL_SYNCPT_ACCESS_CLIENT_HSM_INTR      ,Illegal syncpt access CLIENT HSM interrupt" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 29. " ILLEGAL_SYNCPT_ACCESS_GPU_HSM_INTR        ,Illegal syncpt access GPU_HSM interrupt" "Not panding,Panding"
bitfld.long 0x00 28. "  ILLEGAL_SYNCPT_ACCESS_PB_HSM_INTR          ,Illegal syncpt access PB_HSM interrupt" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 27. " CH_ILLEGAL_ACCESS_HSM_INTR                ,Channel illegal acces HSM interrupt" "Not panding,Panding"
bitfld.long 0x00 26. "  MOD_ILLEGAL_MMIOSTRMID_ACCESS_HSM_INTR     ,MOD illegal MMIO Stream-ID access HSM interrupt" "Not panding,Panding"
textline "                                                          "
bitfld.long 0x00 1. " AXIWRITE_TIMEOUT_HSM_INTR                 ,AXI write time-out HSM interrupt" "Not panding,Panding"
bitfld.long 0x00 0. "  AXIREAD_TIMEOUT_HSM_INTR                   ,AXI read time-out HSM interrupt" "Not panding,Panding"
line.long 0x04 "THOST_COMMON_THOST_HSM_INTRMASK,THost Common HSM Interrupt Mask Register"
bitfld.long 0x04 31. " ILLEGAL_SYNCPT_ACCESS_MMIO_HSM_INTRMASK   ,Illegal syncpt acces MMIO_HSM interrupt mask" "Disabled,Enabled"
bitfld.long 0x04 30. "     ILLEGAL_SYNCPT_ACCESS_CLIENT_HSM_INTRMASK  ,Illegal syncpt acces CLIENT_HSM interrupt mask" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x04 29. " ILLEGAL_SYNCPT_ACCESS_GPU_HSM_INTRMASK    ,Illegal syncpt access GPU_HSM interrupt mask" "Disabled,Enabled"
bitfld.long 0x04 28. "     ILLEGAL_SYNCPT_ACCESS_PB_HSM_INTRMASK      ,Illegal syncpt access PB_HSM interrupt mask" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x04 27. " CH_ILLEGAL_ACCESS_HSM_INTRMASK            ,Channel illegal access HSM interrupt mask" "Disabled,Enabled"
bitfld.long 0x04 26. "     MOD_ILLEGAL_MMIOSTRMID_ACCESS_HSM_INTRMASK ,MOD illegal MMIO Stream-ID access HSM interrupt mask" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x04 1. " AXIWRITE_TIMEOUT_HSM_INTRMASK             ,AXI write time-out HSM interrupt mask" "Disabled,Enabled"
bitfld.long 0x04 0. "     AXIREAD_TIMEOUT_HSM_INTRMASK               ,AXI read time-out HSM interrupt mask" "Disabled,Enabled"
line.long 0x08 "THOST_COMMON_THOST_HSM_SETERROR,THOST Common THOST_HSM Set Error Register"
bitfld.long 0x08 31. " ILLEGAL_SYNCPT_ACCESS_MMIO_HSM_SETERROR   ,Illegal syncpt access MMIO_SM set error" "Disabled,Enabled"
bitfld.long 0x08 30. "     ILLEGAL_SYNCPT_ACCESS_CLIENT_HSM_SETERROR  ,Illegal syncpt access CLIENT_HSM set error" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x08 29. " ILLEGAL_SYNCPT_ACCESS_GPU_HSM_SETERROR    ,Illegal syncpt access GPU_HSM set error" "Disabled,Enabled"
bitfld.long 0x08 28. "     ILLEGAL_SYNCPT_ACCESS_PB_HSM_SETERROR      ,Illegal syncpt access PB_HSM set error" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x08 27. " CH_ILLEGAL_ACCESS_HSM_SETERROR            ,Channel illegal access HSM set error" "Disabled,Enabled"
bitfld.long 0x08 26. "     MOD_ILLEGAL_MMIOSTRMID_ACCESS_HSM_SETERROR ,MOD Illegal MMIO Stream-ID access HSM set error" "Disabled,Enabled"
textline "                                                          "
bitfld.long 0x08 1. " AXIWRITE_TIMEOUT_HSM_SETERROR             ,AXI write time-out HSM set error" "Disabled,Enabled"
bitfld.long 0x08 0. "     AXIREAD_TIMEOUT_HSM_SETERROR               ,AXI read time-out HSM set error" "Disabled,Enabled"
width 0x0B
tree.end
tree "HOST1X_0"
tree "THOST Channel"
base ad:0x13E10000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E10000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_1"
tree "THOST Channel"
base ad:0x13E20000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E20000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_2"
tree "THOST Channel"
base ad:0x13E30000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E30000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_3"
tree "THOST Channel"
base ad:0x13E40000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E40000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_4"
tree "THOST Channel"
base ad:0x13E50000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E50000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_5"
tree "THOST Channel"
base ad:0x13E60000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E60000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_6"
tree "THOST Channel"
base ad:0x13E70000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E70000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "HOST1X_7"
tree "THOST Channel"
base ad:0x13E80000
width 25.
group.long 0x0++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                    ,Channel 0 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                 ,Channel 0 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH0_DMAPUT                      ,Channel 0 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH0_DMAPUT_HI                   ,Channel 0 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH0_DMAGET                      ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH0_DMAGET_HI                   ,Channel 0 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH0_DMAEND                      ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH0_DMAEND_HI                   ,Channel 0 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH0_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH0_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH0_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER              ,Channel 0 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH0_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY            ,Channel 0 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x0+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH0_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH0_ILLEGAL_MMIO_VM_ACCESS      ,Channel 0 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH0_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 0 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH0_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH0_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH0_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH0_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH0_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x0+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES        ,Channel 0 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED       ,Channel 0 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x0+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT             ,Channel 0 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH0_RSB_NS                      ,Channel 0 RSB_NS" "Disabled,Enabled"
group.long 0x100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH1_DMASTART                    ,Channel 1 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH1_DMASTART_HI                 ,Channel 1 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH1_DMAPUT                      ,Channel 1 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH1_DMAPUT_HI                   ,Channel 1 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH1_DMAGET                      ,Channel 1 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH1_DMAGET_HI                   ,Channel 1 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH1_DMAEND                      ,Channel 1 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH1_DMAEND_HI                   ,Channel 1 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH1_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH1_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH1_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH1_CMDFIFO_GATHER              ,Channel 1 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH1_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH1_CMDFIFO_NUMEMPTY            ,Channel 1 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH1_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH1_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH1_ILLEGAL_MMIO_VM_ACCESS      ,Channel 1 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH1_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 1 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH1_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH1_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH1_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH1_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH1_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH1_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH1_DROP_ILLEGAL_OPCODES        ,Channel 1 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH1_GATHER_PARSE_DISABLED       ,Channel 1 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH1_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH1_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH1_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH1_ENABLE_STALLCNT             ,Channel 1 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH1_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH1_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH1_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH1_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH1_RSB_NS                      ,Channel 1 RSB_NS" "Disabled,Enabled"
group.long 0x200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH2_DMASTART                    ,Channel 2 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH2_DMASTART_HI                 ,Channel 2 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH2_DMAPUT                      ,Channel 2 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH2_DMAPUT_HI                   ,Channel 2 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH2_DMAGET                      ,Channel 2 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH2_DMAGET_HI                   ,Channel 2 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH2_DMAEND                      ,Channel 2 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH2_DMAEND_HI                   ,Channel 2 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH2_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH2_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH2_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH2_CMDFIFO_GATHER              ,Channel 2 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH2_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH2_CMDFIFO_NUMEMPTY            ,Channel 2 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH2_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH2_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH2_ILLEGAL_MMIO_VM_ACCESS      ,Channel 2 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH2_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 2 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH2_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH2_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH2_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH2_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH2_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH2_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH2_DROP_ILLEGAL_OPCODES        ,Channel 2 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH2_GATHER_PARSE_DISABLED       ,Channel 2 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH2_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH2_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH2_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH2_ENABLE_STALLCNT             ,Channel 2 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH2_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH2_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH2_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH2_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH2_RSB_NS                      ,Channel 2 RSB_NS" "Disabled,Enabled"
group.long 0x300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH3_DMASTART                    ,Channel 3 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH3_DMASTART_HI                 ,Channel 3 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH3_DMAPUT                      ,Channel 3 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH3_DMAPUT_HI                   ,Channel 3 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH3_DMAGET                      ,Channel 3 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH3_DMAGET_HI                   ,Channel 3 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH3_DMAEND                      ,Channel 3 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH3_DMAEND_HI                   ,Channel 3 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH3_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH3_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH3_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH3_CMDFIFO_GATHER              ,Channel 3 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH3_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH3_CMDFIFO_NUMEMPTY            ,Channel 3 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH3_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH3_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH3_ILLEGAL_MMIO_VM_ACCESS      ,Channel 3 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH3_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 3 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH3_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH3_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH3_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH3_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH3_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH3_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH3_DROP_ILLEGAL_OPCODES        ,Channel 3 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH3_GATHER_PARSE_DISABLED       ,Channel 3 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH3_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH3_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH3_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH3_ENABLE_STALLCNT             ,Channel 3 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH3_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH3_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH3_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH3_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH3_RSB_NS                      ,Channel 3 RSB_NS" "Disabled,Enabled"
group.long 0x400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH4_DMASTART                    ,Channel 4 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH4_DMASTART_HI                 ,Channel 4 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH4_DMAPUT                      ,Channel 4 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH4_DMAPUT_HI                   ,Channel 4 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH4_DMAGET                      ,Channel 4 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH4_DMAGET_HI                   ,Channel 4 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH4_DMAEND                      ,Channel 4 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH4_DMAEND_HI                   ,Channel 4 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH4_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH4_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH4_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH4_CMDFIFO_GATHER              ,Channel 4 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH4_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH4_CMDFIFO_NUMEMPTY            ,Channel 4 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH4_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH4_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH4_ILLEGAL_MMIO_VM_ACCESS      ,Channel 4 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH4_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 4 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH4_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH4_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH4_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH4_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH4_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH4_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH4_DROP_ILLEGAL_OPCODES        ,Channel 4 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH4_GATHER_PARSE_DISABLED       ,Channel 4 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH4_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH4_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH4_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH4_ENABLE_STALLCNT             ,Channel 4 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH4_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH4_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH4_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH4_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH4_RSB_NS                      ,Channel 4 RSB_NS" "Disabled,Enabled"
group.long 0x500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH5_DMASTART                    ,Channel 5 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH5_DMASTART_HI                 ,Channel 5 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH5_DMAPUT                      ,Channel 5 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH5_DMAPUT_HI                   ,Channel 5 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH5_DMAGET                      ,Channel 5 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH5_DMAGET_HI                   ,Channel 5 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH5_DMAEND                      ,Channel 5 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH5_DMAEND_HI                   ,Channel 5 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH5_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH5_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH5_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH5_CMDFIFO_GATHER              ,Channel 5 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH5_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH5_CMDFIFO_NUMEMPTY            ,Channel 5 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH5_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH5_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH5_ILLEGAL_MMIO_VM_ACCESS      ,Channel 5 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH5_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 5 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH5_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH5_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH5_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH5_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH5_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH5_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH5_DROP_ILLEGAL_OPCODES        ,Channel 5 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH5_GATHER_PARSE_DISABLED       ,Channel 5 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH5_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH5_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH5_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH5_ENABLE_STALLCNT             ,Channel 5 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH5_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH5_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH5_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH5_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH5_RSB_NS                      ,Channel 5 RSB_NS" "Disabled,Enabled"
group.long 0x600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH6_DMASTART                    ,Channel 6 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH6_DMASTART_HI                 ,Channel 6 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH6_DMAPUT                      ,Channel 6 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH6_DMAPUT_HI                   ,Channel 6 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH6_DMAGET                      ,Channel 6 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH6_DMAGET_HI                   ,Channel 6 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH6_DMAEND                      ,Channel 6 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH6_DMAEND_HI                   ,Channel 6 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH6_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH6_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH6_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH6_CMDFIFO_GATHER              ,Channel 6 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH6_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH6_CMDFIFO_NUMEMPTY            ,Channel 6 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH6_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH6_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH6_ILLEGAL_MMIO_VM_ACCESS      ,Channel 6 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH6_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 6 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH6_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH6_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH6_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH6_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH6_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH6_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH6_DROP_ILLEGAL_OPCODES        ,Channel 6 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH6_GATHER_PARSE_DISABLED       ,Channel 6 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH6_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH6_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH6_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH6_ENABLE_STALLCNT             ,Channel 6 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH6_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH6_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH6_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH6_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH6_RSB_NS                      ,Channel 6 RSB_NS" "Disabled,Enabled"
group.long 0x700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH7_DMASTART                    ,Channel 7 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH7_DMASTART_HI                 ,Channel 7 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH7_DMAPUT                      ,Channel 7 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH7_DMAPUT_HI                   ,Channel 7 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH7_DMAGET                      ,Channel 7 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH7_DMAGET_HI                   ,Channel 7 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH7_DMAEND                      ,Channel 7 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH7_DMAEND_HI                   ,Channel 7 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH7_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH7_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH7_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH7_CMDFIFO_GATHER              ,Channel 7 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH7_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH7_CMDFIFO_NUMEMPTY            ,Channel 7 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH7_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH7_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH7_ILLEGAL_MMIO_VM_ACCESS      ,Channel 7 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH7_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 7 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH7_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH7_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH7_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH7_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH7_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH7_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH7_DROP_ILLEGAL_OPCODES        ,Channel 7 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH7_GATHER_PARSE_DISABLED       ,Channel 7 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH7_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH7_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH7_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH7_ENABLE_STALLCNT             ,Channel 7 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH7_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH7_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH7_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH7_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH7_RSB_NS                      ,Channel 7 RSB_NS" "Disabled,Enabled"
group.long 0x800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH8_DMASTART                    ,Channel 8 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH8_DMASTART_HI                 ,Channel 8 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH8_DMAPUT                      ,Channel 8 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH8_DMAPUT_HI                   ,Channel 8 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH8_DMAGET                      ,Channel 8 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH8_DMAGET_HI                   ,Channel 8 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH8_DMAEND                      ,Channel 8 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH8_DMAEND_HI                   ,Channel 8 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH8_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH8_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH8_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH8_CMDFIFO_GATHER              ,Channel 8 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH8_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH8_CMDFIFO_NUMEMPTY            ,Channel 8 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH8_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH8_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH8_ILLEGAL_MMIO_VM_ACCESS      ,Channel 8 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH8_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 8 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH8_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH8_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH8_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH8_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH8_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH8_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH8_DROP_ILLEGAL_OPCODES        ,Channel 8 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH8_GATHER_PARSE_DISABLED       ,Channel 8 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH8_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH8_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH8_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH8_ENABLE_STALLCNT             ,Channel 8 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH8_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH8_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH8_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH8_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH8_RSB_NS                      ,Channel 8 RSB_NS" "Disabled,Enabled"
group.long 0x900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH9_DMASTART                    ,Channel 9 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH9_DMASTART_HI                 ,Channel 9 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH9_DMAPUT                      ,Channel 9 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH9_DMAPUT_HI                   ,Channel 9 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH9_DMAGET                      ,Channel 9 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH9_DMAGET_HI                   ,Channel 9 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH9_DMAEND                      ,Channel 9 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH9_DMAEND_HI                   ,Channel 9 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH9_DMAINITGET                  ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH9_DMAGETRST               ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH9_DMASTOP                     ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH9_CMDFIFO_GATHER              ,Channel 9 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH9_CMDFIFO_EMPTY           ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH9_CMDFIFO_NUMEMPTY            ,Channel 9 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH9_CMDP_OFFSET                 ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH9_CMDP_CLASS                  ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH9_ILLEGAL_MMIO_VM_ACCESS      ,Channel 9 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH9_ILLEGAL_MMIO_TZ_ACCESS  ,Channel 9 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH9_ILLEGAL_MLOCK_BUSY_TIMEOUT  ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH9_ILLEGAL_STREAMID        ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH9_ILLEGAL_MLOCK               ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH9_ILLEGAL_CLASS           ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH9_CTXSW_PENDING               ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH9_ILLEGAL_OPCODE          ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH9_DROP_ILLEGAL_OPCODES        ,Channel 9 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH9_GATHER_PARSE_DISABLED       ,Channel 9 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH9_CMDPROC_STOP                ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH9_TEARDOWN                    ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH9_ENABLE_TICKCNT              ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH9_ENABLE_STALLCNT             ,Channel 9 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH9_ENABLE_TXFERCNT             ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH9_ILLEGAL_ACCESS_INTR         ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH9_ILLEGAL_ACCESS_INTRMASK     ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH9_SMMU_STREAMID               ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH9_RSB_NS                      ,Channel 9 RSB_NS" "Disabled,Enabled"
group.long 0xA00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH10_DMASTART                   ,Channel 10 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH10_DMASTART_HI                ,Channel 10 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH10_DMAPUT                     ,Channel 10 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH10_DMAPUT_HI                  ,Channel 10 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH10_DMAGET                     ,Channel 10 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH10_DMAGET_HI                  ,Channel 10 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH10_DMAEND                     ,Channel 10 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH10_DMAEND_HI                  ,Channel 10 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH10_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH10_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH10_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH10_CMDFIFO_GATHER             ,Channel 10 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH10_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH10_CMDFIFO_NUMEMPTY           ,Channel 10 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xA00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH10_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH10_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH10_ILLEGAL_MMIO_VM_ACCESS     ,Channel 10 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH10_ILLEGAL_MMIO_TZ_ACCESS ,Channel 10 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH10_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH10_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH10_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH10_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH10_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH10_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xA00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH10_DROP_ILLEGAL_OPCODES       ,Channel 10 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH10_GATHER_PARSE_DISABLED      ,Channel 10 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH10_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH10_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xA00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH10_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH10_ENABLE_STALLCNT            ,Channel 10 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH10_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH10_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH10_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH10_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH10_RSB_NS                     ,Channel 10 RSB_NS" "Disabled,Enabled"
group.long 0xB00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH11_DMASTART                   ,Channel 11 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH11_DMASTART_HI                ,Channel 11 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH11_DMAPUT                     ,Channel 11 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH11_DMAPUT_HI                  ,Channel 11 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH11_DMAGET                     ,Channel 11 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH11_DMAGET_HI                  ,Channel 11 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH11_DMAEND                     ,Channel 11 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH11_DMAEND_HI                  ,Channel 11 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH11_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH11_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH11_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH11_CMDFIFO_GATHER             ,Channel 11 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH11_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH11_CMDFIFO_NUMEMPTY           ,Channel 11 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xB00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH11_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH11_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH11_ILLEGAL_MMIO_VM_ACCESS     ,Channel 11 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH11_ILLEGAL_MMIO_TZ_ACCESS ,Channel 11 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH11_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH11_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH11_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH11_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH11_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH11_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xB00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH11_DROP_ILLEGAL_OPCODES       ,Channel 11 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH11_GATHER_PARSE_DISABLED      ,Channel 11 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH11_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH11_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xB00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH11_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH11_ENABLE_STALLCNT            ,Channel 11 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH11_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH11_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH11_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH11_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH11_RSB_NS                     ,Channel 11 RSB_NS" "Disabled,Enabled"
group.long 0xC00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH12_DMASTART                   ,Channel 12 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH12_DMASTART_HI                ,Channel 12 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH12_DMAPUT                     ,Channel 12 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH12_DMAPUT_HI                  ,Channel 12 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH12_DMAGET                     ,Channel 12 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH12_DMAGET_HI                  ,Channel 12 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH12_DMAEND                     ,Channel 12 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH12_DMAEND_HI                  ,Channel 12 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH12_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH12_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH12_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH12_CMDFIFO_GATHER             ,Channel 12 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH12_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH12_CMDFIFO_NUMEMPTY           ,Channel 12 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xC00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH12_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH12_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH12_ILLEGAL_MMIO_VM_ACCESS     ,Channel 12 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH12_ILLEGAL_MMIO_TZ_ACCESS ,Channel 12 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH12_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH12_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH12_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH12_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH12_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH12_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xC00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH12_DROP_ILLEGAL_OPCODES       ,Channel 12 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH12_GATHER_PARSE_DISABLED      ,Channel 12 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH12_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH12_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xC00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH12_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH12_ENABLE_STALLCNT            ,Channel 12 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH12_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH12_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH12_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH12_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH12_RSB_NS                     ,Channel 12 RSB_NS" "Disabled,Enabled"
group.long 0xD00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH13_DMASTART                   ,Channel 13 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH13_DMASTART_HI                ,Channel 13 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH13_DMAPUT                     ,Channel 13 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH13_DMAPUT_HI                  ,Channel 13 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH13_DMAGET                     ,Channel 13 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH13_DMAGET_HI                  ,Channel 13 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH13_DMAEND                     ,Channel 13 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH13_DMAEND_HI                  ,Channel 13 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH13_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH13_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH13_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH13_CMDFIFO_GATHER             ,Channel 13 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH13_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH13_CMDFIFO_NUMEMPTY           ,Channel 13 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xD00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH13_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH13_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH13_ILLEGAL_MMIO_VM_ACCESS     ,Channel 13 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH13_ILLEGAL_MMIO_TZ_ACCESS ,Channel 13 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH13_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH13_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH13_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH13_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH13_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH13_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xD00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH13_DROP_ILLEGAL_OPCODES       ,Channel 13 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH13_GATHER_PARSE_DISABLED      ,Channel 13 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH13_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH13_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xD00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH13_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH13_ENABLE_STALLCNT            ,Channel 13 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH13_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH13_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH13_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH13_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH13_RSB_NS                     ,Channel 13 RSB_NS" "Disabled,Enabled"
group.long 0xE00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH14_DMASTART                   ,Channel 14 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH14_DMASTART_HI                ,Channel 14 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH14_DMAPUT                     ,Channel 14 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH14_DMAPUT_HI                  ,Channel 14 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH14_DMAGET                     ,Channel 14 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH14_DMAGET_HI                  ,Channel 14 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH14_DMAEND                     ,Channel 14 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH14_DMAEND_HI                  ,Channel 14 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH14_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH14_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH14_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH14_CMDFIFO_GATHER             ,Channel 14 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH14_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH14_CMDFIFO_NUMEMPTY           ,Channel 14 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xE00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH14_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH14_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH14_ILLEGAL_MMIO_VM_ACCESS     ,Channel 14 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH14_ILLEGAL_MMIO_TZ_ACCESS ,Channel 14 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH14_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH14_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH14_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH14_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH14_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH14_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xE00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH14_DROP_ILLEGAL_OPCODES       ,Channel 14 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH14_GATHER_PARSE_DISABLED      ,Channel 14 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH14_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH14_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xE00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH14_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH14_ENABLE_STALLCNT            ,Channel 14 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH14_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH14_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH14_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH14_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH14_RSB_NS                     ,Channel 14 RSB_NS" "Disabled,Enabled"
group.long 0xF00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH15_DMASTART                   ,Channel 15 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH15_DMASTART_HI                ,Channel 15 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH15_DMAPUT                     ,Channel 15 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH15_DMAPUT_HI                  ,Channel 15 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH15_DMAGET                     ,Channel 15 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH15_DMAGET_HI                  ,Channel 15 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH15_DMAEND                     ,Channel 15 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH15_DMAEND_HI                  ,Channel 15 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH15_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH15_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH15_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH15_CMDFIFO_GATHER             ,Channel 15 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH15_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH15_CMDFIFO_NUMEMPTY           ,Channel 15 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0xF00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH15_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH15_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH15_ILLEGAL_MMIO_VM_ACCESS     ,Channel 15 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH15_ILLEGAL_MMIO_TZ_ACCESS ,Channel 15 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH15_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH15_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH15_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH15_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH15_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH15_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0xF00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH15_DROP_ILLEGAL_OPCODES       ,Channel 15 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH15_GATHER_PARSE_DISABLED      ,Channel 15 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH15_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH15_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0xF00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH15_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH15_ENABLE_STALLCNT            ,Channel 15 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH15_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH15_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH15_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH15_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH15_RSB_NS                     ,Channel 15 RSB_NS" "Disabled,Enabled"
group.long 0x1000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH16_DMASTART                   ,Channel 16 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH16_DMASTART_HI                ,Channel 16 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH16_DMAPUT                     ,Channel 16 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH16_DMAPUT_HI                  ,Channel 16 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH16_DMAGET                     ,Channel 16 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH16_DMAGET_HI                  ,Channel 16 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH16_DMAEND                     ,Channel 16 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH16_DMAEND_HI                  ,Channel 16 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH16_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH16_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH16_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH16_CMDFIFO_GATHER             ,Channel 16 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH16_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH16_CMDFIFO_NUMEMPTY           ,Channel 16 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH16_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH16_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH16_ILLEGAL_MMIO_VM_ACCESS     ,Channel 16 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH16_ILLEGAL_MMIO_TZ_ACCESS ,Channel 16 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH16_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH16_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH16_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH16_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH16_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH16_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH16_DROP_ILLEGAL_OPCODES       ,Channel 16 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH16_GATHER_PARSE_DISABLED      ,Channel 16 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH16_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH16_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH16_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH16_ENABLE_STALLCNT            ,Channel 16 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH16_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH16_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH16_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH16_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH16_RSB_NS                     ,Channel 16 RSB_NS" "Disabled,Enabled"
group.long 0x1100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH17_DMASTART                   ,Channel 17 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH17_DMASTART_HI                ,Channel 17 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH17_DMAPUT                     ,Channel 17 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH17_DMAPUT_HI                  ,Channel 17 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH17_DMAGET                     ,Channel 17 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH17_DMAGET_HI                  ,Channel 17 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH17_DMAEND                     ,Channel 17 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH17_DMAEND_HI                  ,Channel 17 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH17_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH17_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH17_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH17_CMDFIFO_GATHER             ,Channel 17 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH17_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH17_CMDFIFO_NUMEMPTY           ,Channel 17 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH17_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH17_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH17_ILLEGAL_MMIO_VM_ACCESS     ,Channel 17 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH17_ILLEGAL_MMIO_TZ_ACCESS ,Channel 17 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH17_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH17_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH17_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH17_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH17_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH17_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH17_DROP_ILLEGAL_OPCODES       ,Channel 17 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH17_GATHER_PARSE_DISABLED      ,Channel 17 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH17_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH17_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH17_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH17_ENABLE_STALLCNT            ,Channel 17 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH17_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH17_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH17_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH17_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH17_RSB_NS                     ,Channel 17 RSB_NS" "Disabled,Enabled"
group.long 0x1200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH18_DMASTART                   ,Channel 18 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH18_DMASTART_HI                ,Channel 18 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH18_DMAPUT                     ,Channel 18 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH18_DMAPUT_HI                  ,Channel 18 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH18_DMAGET                     ,Channel 18 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH18_DMAGET_HI                  ,Channel 18 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH18_DMAEND                     ,Channel 18 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH18_DMAEND_HI                  ,Channel 18 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH18_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH18_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH18_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH18_CMDFIFO_GATHER             ,Channel 18 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH18_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH18_CMDFIFO_NUMEMPTY           ,Channel 18 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH18_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH18_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH18_ILLEGAL_MMIO_VM_ACCESS     ,Channel 18 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH18_ILLEGAL_MMIO_TZ_ACCESS ,Channel 18 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH18_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH18_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH18_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH18_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH18_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH18_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH18_DROP_ILLEGAL_OPCODES       ,Channel 18 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH18_GATHER_PARSE_DISABLED      ,Channel 18 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH18_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH18_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH18_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH18_ENABLE_STALLCNT            ,Channel 18 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH18_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH18_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH18_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH18_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH18_RSB_NS                     ,Channel 18 RSB_NS" "Disabled,Enabled"
group.long 0x1300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH19_DMASTART                   ,Channel 19 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH19_DMASTART_HI                ,Channel 19 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH19_DMAPUT                     ,Channel 19 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH19_DMAPUT_HI                  ,Channel 19 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH19_DMAGET                     ,Channel 19 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH19_DMAGET_HI                  ,Channel 19 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH19_DMAEND                     ,Channel 19 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH19_DMAEND_HI                  ,Channel 19 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH19_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH19_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH19_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH19_CMDFIFO_GATHER             ,Channel 19 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH19_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH19_CMDFIFO_NUMEMPTY           ,Channel 19 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH19_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH19_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH19_ILLEGAL_MMIO_VM_ACCESS     ,Channel 19 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH19_ILLEGAL_MMIO_TZ_ACCESS ,Channel 19 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH19_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH19_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH19_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH19_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH19_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH19_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH19_DROP_ILLEGAL_OPCODES       ,Channel 19 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH19_GATHER_PARSE_DISABLED      ,Channel 19 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH19_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH19_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH19_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH19_ENABLE_STALLCNT            ,Channel 19 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH19_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH19_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH19_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH19_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH19_RSB_NS                     ,Channel 19 RSB_NS" "Disabled,Enabled"
group.long 0x1400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH20_DMASTART                   ,Channel 20 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH20_DMASTART_HI                ,Channel 20 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH20_DMAPUT                     ,Channel 20 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH20_DMAPUT_HI                  ,Channel 20 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH20_DMAGET                     ,Channel 20 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH20_DMAGET_HI                  ,Channel 20 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH20_DMAEND                     ,Channel 20 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH20_DMAEND_HI                  ,Channel 20 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH20_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH20_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH20_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH20_CMDFIFO_GATHER             ,Channel 20 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH20_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH20_CMDFIFO_NUMEMPTY           ,Channel 20 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH20_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH20_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH20_ILLEGAL_MMIO_VM_ACCESS     ,Channel 20 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH20_ILLEGAL_MMIO_TZ_ACCESS ,Channel 20 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH20_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH20_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH20_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH20_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH20_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH20_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH20_DROP_ILLEGAL_OPCODES       ,Channel 20 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH20_GATHER_PARSE_DISABLED      ,Channel 20 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH20_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH20_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH20_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH20_ENABLE_STALLCNT            ,Channel 20 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH20_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH20_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH20_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH20_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH20_RSB_NS                     ,Channel 20 RSB_NS" "Disabled,Enabled"
group.long 0x1500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH21_DMASTART                   ,Channel 21 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH21_DMASTART_HI                ,Channel 21 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH21_DMAPUT                     ,Channel 21 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH21_DMAPUT_HI                  ,Channel 21 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH21_DMAGET                     ,Channel 21 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH21_DMAGET_HI                  ,Channel 21 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH21_DMAEND                     ,Channel 21 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH21_DMAEND_HI                  ,Channel 21 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH21_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH21_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH21_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH21_CMDFIFO_GATHER             ,Channel 21 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH21_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH21_CMDFIFO_NUMEMPTY           ,Channel 21 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH21_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH21_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH21_ILLEGAL_MMIO_VM_ACCESS     ,Channel 21 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH21_ILLEGAL_MMIO_TZ_ACCESS ,Channel 21 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH21_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH21_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH21_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH21_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH21_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH21_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH21_DROP_ILLEGAL_OPCODES       ,Channel 21 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH21_GATHER_PARSE_DISABLED      ,Channel 21 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH21_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH21_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH21_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH21_ENABLE_STALLCNT            ,Channel 21 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH21_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH21_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH21_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH21_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH21_RSB_NS                     ,Channel 21 RSB_NS" "Disabled,Enabled"
group.long 0x1600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH22_DMASTART                   ,Channel 22 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH22_DMASTART_HI                ,Channel 22 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH22_DMAPUT                     ,Channel 22 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH22_DMAPUT_HI                  ,Channel 22 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH22_DMAGET                     ,Channel 22 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH22_DMAGET_HI                  ,Channel 22 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH22_DMAEND                     ,Channel 22 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH22_DMAEND_HI                  ,Channel 22 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH22_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH22_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH22_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH22_CMDFIFO_GATHER             ,Channel 22 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH22_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH22_CMDFIFO_NUMEMPTY           ,Channel 22 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH22_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH22_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH22_ILLEGAL_MMIO_VM_ACCESS     ,Channel 22 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH22_ILLEGAL_MMIO_TZ_ACCESS ,Channel 22 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH22_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH22_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH22_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH22_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH22_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH22_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH22_DROP_ILLEGAL_OPCODES       ,Channel 22 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH22_GATHER_PARSE_DISABLED      ,Channel 22 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH22_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH22_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH22_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH22_ENABLE_STALLCNT            ,Channel 22 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH22_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH22_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH22_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH22_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH22_RSB_NS                     ,Channel 22 RSB_NS" "Disabled,Enabled"
group.long 0x1700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH23_DMASTART                   ,Channel 23 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH23_DMASTART_HI                ,Channel 23 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH23_DMAPUT                     ,Channel 23 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH23_DMAPUT_HI                  ,Channel 23 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH23_DMAGET                     ,Channel 23 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH23_DMAGET_HI                  ,Channel 23 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH23_DMAEND                     ,Channel 23 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH23_DMAEND_HI                  ,Channel 23 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH23_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH23_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH23_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH23_CMDFIFO_GATHER             ,Channel 23 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH23_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH23_CMDFIFO_NUMEMPTY           ,Channel 23 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH23_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH23_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH23_ILLEGAL_MMIO_VM_ACCESS     ,Channel 23 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH23_ILLEGAL_MMIO_TZ_ACCESS ,Channel 23 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH23_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH23_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH23_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH23_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH23_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH23_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH23_DROP_ILLEGAL_OPCODES       ,Channel 23 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH23_GATHER_PARSE_DISABLED      ,Channel 23 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH23_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH23_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH23_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH23_ENABLE_STALLCNT            ,Channel 23 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH23_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH23_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH23_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH23_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH23_RSB_NS                     ,Channel 23 RSB_NS" "Disabled,Enabled"
group.long 0x1800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH24_DMASTART                   ,Channel 24 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH24_DMASTART_HI                ,Channel 24 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH24_DMAPUT                     ,Channel 24 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH24_DMAPUT_HI                  ,Channel 24 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH24_DMAGET                     ,Channel 24 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH24_DMAGET_HI                  ,Channel 24 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH24_DMAEND                     ,Channel 24 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH24_DMAEND_HI                  ,Channel 24 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH24_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH24_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH24_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH24_CMDFIFO_GATHER             ,Channel 24 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH24_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH24_CMDFIFO_NUMEMPTY           ,Channel 24 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH24_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH24_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH24_ILLEGAL_MMIO_VM_ACCESS     ,Channel 24 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH24_ILLEGAL_MMIO_TZ_ACCESS ,Channel 24 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH24_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH24_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH24_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH24_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH24_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH24_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH24_DROP_ILLEGAL_OPCODES       ,Channel 24 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH24_GATHER_PARSE_DISABLED      ,Channel 24 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH24_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH24_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH24_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH24_ENABLE_STALLCNT            ,Channel 24 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH24_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH24_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH24_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH24_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH24_RSB_NS                     ,Channel 24 RSB_NS" "Disabled,Enabled"
group.long 0x1900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH25_DMASTART                   ,Channel 25 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH25_DMASTART_HI                ,Channel 25 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH25_DMAPUT                     ,Channel 25 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH25_DMAPUT_HI                  ,Channel 25 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH25_DMAGET                     ,Channel 25 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH25_DMAGET_HI                  ,Channel 25 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH25_DMAEND                     ,Channel 25 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH25_DMAEND_HI                  ,Channel 25 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH25_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH25_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH25_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH25_CMDFIFO_GATHER             ,Channel 25 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH25_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH25_CMDFIFO_NUMEMPTY           ,Channel 25 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH25_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH25_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH25_ILLEGAL_MMIO_VM_ACCESS     ,Channel 25 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH25_ILLEGAL_MMIO_TZ_ACCESS ,Channel 25 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH25_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH25_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH25_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH25_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH25_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH25_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH25_DROP_ILLEGAL_OPCODES       ,Channel 25 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH25_GATHER_PARSE_DISABLED      ,Channel 25 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH25_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH25_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH25_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH25_ENABLE_STALLCNT            ,Channel 25 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH25_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH25_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH25_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH25_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH25_RSB_NS                     ,Channel 25 RSB_NS" "Disabled,Enabled"
group.long 0x1A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH26_DMASTART                   ,Channel 26 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH26_DMASTART_HI                ,Channel 26 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH26_DMAPUT                     ,Channel 26 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH26_DMAPUT_HI                  ,Channel 26 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH26_DMAGET                     ,Channel 26 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH26_DMAGET_HI                  ,Channel 26 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH26_DMAEND                     ,Channel 26 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH26_DMAEND_HI                  ,Channel 26 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH26_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH26_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH26_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH26_CMDFIFO_GATHER             ,Channel 26 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH26_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH26_CMDFIFO_NUMEMPTY           ,Channel 26 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH26_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH26_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH26_ILLEGAL_MMIO_VM_ACCESS     ,Channel 26 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH26_ILLEGAL_MMIO_TZ_ACCESS ,Channel 26 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH26_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH26_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH26_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH26_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH26_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH26_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH26_DROP_ILLEGAL_OPCODES       ,Channel 26 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH26_GATHER_PARSE_DISABLED      ,Channel 26 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH26_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH26_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH26_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH26_ENABLE_STALLCNT            ,Channel 26 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH26_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH26_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH26_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH26_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH26_RSB_NS                     ,Channel 26 RSB_NS" "Disabled,Enabled"
group.long 0x1B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH27_DMASTART                   ,Channel 27 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH27_DMASTART_HI                ,Channel 27 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH27_DMAPUT                     ,Channel 27 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH27_DMAPUT_HI                  ,Channel 27 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH27_DMAGET                     ,Channel 27 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH27_DMAGET_HI                  ,Channel 27 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH27_DMAEND                     ,Channel 27 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH27_DMAEND_HI                  ,Channel 27 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH27_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH27_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH27_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH27_CMDFIFO_GATHER             ,Channel 27 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH27_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH27_CMDFIFO_NUMEMPTY           ,Channel 27 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH27_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH27_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH27_ILLEGAL_MMIO_VM_ACCESS     ,Channel 27 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH27_ILLEGAL_MMIO_TZ_ACCESS ,Channel 27 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH27_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH27_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH27_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH27_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH27_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH27_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH27_DROP_ILLEGAL_OPCODES       ,Channel 27 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH27_GATHER_PARSE_DISABLED      ,Channel 27 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH27_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH27_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH27_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH27_ENABLE_STALLCNT            ,Channel 27 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH27_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH27_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH27_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH27_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH27_RSB_NS                     ,Channel 27 RSB_NS" "Disabled,Enabled"
group.long 0x1C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH28_DMASTART                   ,Channel 28 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH28_DMASTART_HI                ,Channel 28 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH28_DMAPUT                     ,Channel 28 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH28_DMAPUT_HI                  ,Channel 28 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH28_DMAGET                     ,Channel 28 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH28_DMAGET_HI                  ,Channel 28 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH28_DMAEND                     ,Channel 28 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH28_DMAEND_HI                  ,Channel 28 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH28_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH28_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH28_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH28_CMDFIFO_GATHER             ,Channel 28 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH28_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH28_CMDFIFO_NUMEMPTY           ,Channel 28 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH28_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH28_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH28_ILLEGAL_MMIO_VM_ACCESS     ,Channel 28 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH28_ILLEGAL_MMIO_TZ_ACCESS ,Channel 28 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH28_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH28_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH28_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH28_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH28_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH28_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH28_DROP_ILLEGAL_OPCODES       ,Channel 28 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH28_GATHER_PARSE_DISABLED      ,Channel 28 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH28_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH28_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH28_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH28_ENABLE_STALLCNT            ,Channel 28 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH28_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH28_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH28_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH28_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH28_RSB_NS                     ,Channel 28 RSB_NS" "Disabled,Enabled"
group.long 0x1D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH29_DMASTART                   ,Channel 29 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH29_DMASTART_HI                ,Channel 29 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH29_DMAPUT                     ,Channel 29 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH29_DMAPUT_HI                  ,Channel 29 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH29_DMAGET                     ,Channel 29 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH29_DMAGET_HI                  ,Channel 29 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH29_DMAEND                     ,Channel 29 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH29_DMAEND_HI                  ,Channel 29 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH29_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH29_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH29_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH29_CMDFIFO_GATHER             ,Channel 29 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH29_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH29_CMDFIFO_NUMEMPTY           ,Channel 29 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH29_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH29_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH29_ILLEGAL_MMIO_VM_ACCESS     ,Channel 29 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH29_ILLEGAL_MMIO_TZ_ACCESS ,Channel 29 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH29_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH29_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH29_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH29_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH29_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH29_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH29_DROP_ILLEGAL_OPCODES       ,Channel 29 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH29_GATHER_PARSE_DISABLED      ,Channel 29 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH29_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH29_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH29_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH29_ENABLE_STALLCNT            ,Channel 29 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH29_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH29_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH29_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH29_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH29_RSB_NS                     ,Channel 29 RSB_NS" "Disabled,Enabled"
group.long 0x1E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH30_DMASTART                   ,Channel 30 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH30_DMASTART_HI                ,Channel 30 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH30_DMAPUT                     ,Channel 30 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH30_DMAPUT_HI                  ,Channel 30 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH30_DMAGET                     ,Channel 30 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH30_DMAGET_HI                  ,Channel 30 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH30_DMAEND                     ,Channel 30 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH30_DMAEND_HI                  ,Channel 30 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH30_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH30_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH30_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH30_CMDFIFO_GATHER             ,Channel 30 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH30_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH30_CMDFIFO_NUMEMPTY           ,Channel 30 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH30_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH30_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH30_ILLEGAL_MMIO_VM_ACCESS     ,Channel 30 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH30_ILLEGAL_MMIO_TZ_ACCESS ,Channel 30 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH30_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH30_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH30_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH30_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH30_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH30_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH30_DROP_ILLEGAL_OPCODES       ,Channel 30 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH30_GATHER_PARSE_DISABLED      ,Channel 30 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH30_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH30_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH30_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH30_ENABLE_STALLCNT            ,Channel 30 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH30_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH30_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH30_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH30_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH30_RSB_NS                     ,Channel 30 RSB_NS" "Disabled,Enabled"
group.long 0x1F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH31_DMASTART                   ,Channel 31 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH31_DMASTART_HI                ,Channel 31 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH31_DMAPUT                     ,Channel 31 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH31_DMAPUT_HI                  ,Channel 31 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH31_DMAGET                     ,Channel 31 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH31_DMAGET_HI                  ,Channel 31 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH31_DMAEND                     ,Channel 31 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH31_DMAEND_HI                  ,Channel 31 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH31_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH31_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH31_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH31_CMDFIFO_GATHER             ,Channel 31 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH31_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH31_CMDFIFO_NUMEMPTY           ,Channel 31 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x1F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH31_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH31_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH31_ILLEGAL_MMIO_VM_ACCESS     ,Channel 31 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH31_ILLEGAL_MMIO_TZ_ACCESS ,Channel 31 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH31_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH31_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH31_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH31_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH31_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH31_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x1F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH31_DROP_ILLEGAL_OPCODES       ,Channel 31 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH31_GATHER_PARSE_DISABLED      ,Channel 31 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH31_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH31_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x1F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH31_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH31_ENABLE_STALLCNT            ,Channel 31 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH31_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH31_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH31_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH31_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH31_RSB_NS                     ,Channel 31 RSB_NS" "Disabled,Enabled"
group.long 0x2000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH32_DMASTART                   ,Channel 32 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH32_DMASTART_HI                ,Channel 32 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH32_DMAPUT                     ,Channel 32 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH32_DMAPUT_HI                  ,Channel 32 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH32_DMAGET                     ,Channel 32 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH32_DMAGET_HI                  ,Channel 32 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH32_DMAEND                     ,Channel 32 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH32_DMAEND_HI                  ,Channel 32 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH32_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH32_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH32_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH32_CMDFIFO_GATHER             ,Channel 32 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH32_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH32_CMDFIFO_NUMEMPTY           ,Channel 32 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH32_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH32_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH32_ILLEGAL_MMIO_VM_ACCESS     ,Channel 32 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH32_ILLEGAL_MMIO_TZ_ACCESS ,Channel 32 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH32_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH32_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH32_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH32_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH32_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH32_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH32_DROP_ILLEGAL_OPCODES       ,Channel 32 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH32_GATHER_PARSE_DISABLED      ,Channel 32 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH32_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH32_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH32_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH32_ENABLE_STALLCNT            ,Channel 32 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH32_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH32_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH32_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH32_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH32_RSB_NS                     ,Channel 32 RSB_NS" "Disabled,Enabled"
group.long 0x2100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH33_DMASTART                   ,Channel 33 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH33_DMASTART_HI                ,Channel 33 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH33_DMAPUT                     ,Channel 33 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH33_DMAPUT_HI                  ,Channel 33 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH33_DMAGET                     ,Channel 33 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH33_DMAGET_HI                  ,Channel 33 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH33_DMAEND                     ,Channel 33 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH33_DMAEND_HI                  ,Channel 33 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH33_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH33_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH33_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH33_CMDFIFO_GATHER             ,Channel 33 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH33_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH33_CMDFIFO_NUMEMPTY           ,Channel 33 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH33_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH33_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH33_ILLEGAL_MMIO_VM_ACCESS     ,Channel 33 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH33_ILLEGAL_MMIO_TZ_ACCESS ,Channel 33 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH33_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH33_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH33_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH33_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH33_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH33_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH33_DROP_ILLEGAL_OPCODES       ,Channel 33 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH33_GATHER_PARSE_DISABLED      ,Channel 33 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH33_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH33_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH33_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH33_ENABLE_STALLCNT            ,Channel 33 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH33_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH33_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH33_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH33_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH33_RSB_NS                     ,Channel 33 RSB_NS" "Disabled,Enabled"
group.long 0x2200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH34_DMASTART                   ,Channel 34 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH34_DMASTART_HI                ,Channel 34 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH34_DMAPUT                     ,Channel 34 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH34_DMAPUT_HI                  ,Channel 34 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH34_DMAGET                     ,Channel 34 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH34_DMAGET_HI                  ,Channel 34 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH34_DMAEND                     ,Channel 34 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH34_DMAEND_HI                  ,Channel 34 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH34_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH34_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH34_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH34_CMDFIFO_GATHER             ,Channel 34 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH34_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH34_CMDFIFO_NUMEMPTY           ,Channel 34 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH34_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH34_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH34_ILLEGAL_MMIO_VM_ACCESS     ,Channel 34 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH34_ILLEGAL_MMIO_TZ_ACCESS ,Channel 34 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH34_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH34_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH34_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH34_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH34_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH34_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH34_DROP_ILLEGAL_OPCODES       ,Channel 34 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH34_GATHER_PARSE_DISABLED      ,Channel 34 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH34_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH34_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH34_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH34_ENABLE_STALLCNT            ,Channel 34 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH34_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH34_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH34_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH34_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH34_RSB_NS                     ,Channel 34 RSB_NS" "Disabled,Enabled"
group.long 0x2300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH35_DMASTART                   ,Channel 35 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH35_DMASTART_HI                ,Channel 35 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH35_DMAPUT                     ,Channel 35 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH35_DMAPUT_HI                  ,Channel 35 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH35_DMAGET                     ,Channel 35 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH35_DMAGET_HI                  ,Channel 35 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH35_DMAEND                     ,Channel 35 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH35_DMAEND_HI                  ,Channel 35 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH35_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH35_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH35_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH35_CMDFIFO_GATHER             ,Channel 35 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH35_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH35_CMDFIFO_NUMEMPTY           ,Channel 35 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH35_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH35_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH35_ILLEGAL_MMIO_VM_ACCESS     ,Channel 35 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH35_ILLEGAL_MMIO_TZ_ACCESS ,Channel 35 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH35_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH35_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH35_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH35_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH35_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH35_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH35_DROP_ILLEGAL_OPCODES       ,Channel 35 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH35_GATHER_PARSE_DISABLED      ,Channel 35 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH35_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH35_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH35_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH35_ENABLE_STALLCNT            ,Channel 35 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH35_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH35_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH35_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH35_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH35_RSB_NS                     ,Channel 35 RSB_NS" "Disabled,Enabled"
group.long 0x2400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH36_DMASTART                   ,Channel 36 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH36_DMASTART_HI                ,Channel 36 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH36_DMAPUT                     ,Channel 36 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH36_DMAPUT_HI                  ,Channel 36 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH36_DMAGET                     ,Channel 36 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH36_DMAGET_HI                  ,Channel 36 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH36_DMAEND                     ,Channel 36 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH36_DMAEND_HI                  ,Channel 36 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH36_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH36_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH36_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH36_CMDFIFO_GATHER             ,Channel 36 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH36_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH36_CMDFIFO_NUMEMPTY           ,Channel 36 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH36_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH36_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH36_ILLEGAL_MMIO_VM_ACCESS     ,Channel 36 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH36_ILLEGAL_MMIO_TZ_ACCESS ,Channel 36 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH36_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH36_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH36_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH36_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH36_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH36_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH36_DROP_ILLEGAL_OPCODES       ,Channel 36 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH36_GATHER_PARSE_DISABLED      ,Channel 36 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH36_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH36_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH36_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH36_ENABLE_STALLCNT            ,Channel 36 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH36_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH36_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH36_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH36_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH36_RSB_NS                     ,Channel 36 RSB_NS" "Disabled,Enabled"
group.long 0x2500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH37_DMASTART                   ,Channel 37 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH37_DMASTART_HI                ,Channel 37 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH37_DMAPUT                     ,Channel 37 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH37_DMAPUT_HI                  ,Channel 37 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH37_DMAGET                     ,Channel 37 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH37_DMAGET_HI                  ,Channel 37 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH37_DMAEND                     ,Channel 37 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH37_DMAEND_HI                  ,Channel 37 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH37_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH37_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH37_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH37_CMDFIFO_GATHER             ,Channel 37 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH37_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH37_CMDFIFO_NUMEMPTY           ,Channel 37 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH37_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH37_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH37_ILLEGAL_MMIO_VM_ACCESS     ,Channel 37 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH37_ILLEGAL_MMIO_TZ_ACCESS ,Channel 37 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH37_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH37_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH37_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH37_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH37_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH37_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH37_DROP_ILLEGAL_OPCODES       ,Channel 37 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH37_GATHER_PARSE_DISABLED      ,Channel 37 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH37_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH37_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH37_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH37_ENABLE_STALLCNT            ,Channel 37 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH37_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH37_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH37_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH37_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH37_RSB_NS                     ,Channel 37 RSB_NS" "Disabled,Enabled"
group.long 0x2600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH38_DMASTART                   ,Channel 38 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH38_DMASTART_HI                ,Channel 38 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH38_DMAPUT                     ,Channel 38 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH38_DMAPUT_HI                  ,Channel 38 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH38_DMAGET                     ,Channel 38 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH38_DMAGET_HI                  ,Channel 38 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH38_DMAEND                     ,Channel 38 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH38_DMAEND_HI                  ,Channel 38 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH38_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH38_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH38_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH38_CMDFIFO_GATHER             ,Channel 38 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH38_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH38_CMDFIFO_NUMEMPTY           ,Channel 38 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH38_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH38_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH38_ILLEGAL_MMIO_VM_ACCESS     ,Channel 38 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH38_ILLEGAL_MMIO_TZ_ACCESS ,Channel 38 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH38_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH38_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH38_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH38_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH38_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH38_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH38_DROP_ILLEGAL_OPCODES       ,Channel 38 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH38_GATHER_PARSE_DISABLED      ,Channel 38 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH38_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH38_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH38_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH38_ENABLE_STALLCNT            ,Channel 38 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH38_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH38_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH38_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH38_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH38_RSB_NS                     ,Channel 38 RSB_NS" "Disabled,Enabled"
group.long 0x2700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH39_DMASTART                   ,Channel 39 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH39_DMASTART_HI                ,Channel 39 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH39_DMAPUT                     ,Channel 39 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH39_DMAPUT_HI                  ,Channel 39 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH39_DMAGET                     ,Channel 39 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH39_DMAGET_HI                  ,Channel 39 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH39_DMAEND                     ,Channel 39 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH39_DMAEND_HI                  ,Channel 39 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH39_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH39_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH39_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH39_CMDFIFO_GATHER             ,Channel 39 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH39_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH39_CMDFIFO_NUMEMPTY           ,Channel 39 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH39_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH39_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH39_ILLEGAL_MMIO_VM_ACCESS     ,Channel 39 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH39_ILLEGAL_MMIO_TZ_ACCESS ,Channel 39 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH39_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH39_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH39_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH39_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH39_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH39_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH39_DROP_ILLEGAL_OPCODES       ,Channel 39 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH39_GATHER_PARSE_DISABLED      ,Channel 39 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH39_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH39_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH39_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH39_ENABLE_STALLCNT            ,Channel 39 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH39_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH39_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH39_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH39_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH39_RSB_NS                     ,Channel 39 RSB_NS" "Disabled,Enabled"
group.long 0x2800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH40_DMASTART                   ,Channel 40 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH40_DMASTART_HI                ,Channel 40 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH40_DMAPUT                     ,Channel 40 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH40_DMAPUT_HI                  ,Channel 40 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH40_DMAGET                     ,Channel 40 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH40_DMAGET_HI                  ,Channel 40 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH40_DMAEND                     ,Channel 40 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH40_DMAEND_HI                  ,Channel 40 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH40_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH40_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH40_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH40_CMDFIFO_GATHER             ,Channel 40 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH40_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH40_CMDFIFO_NUMEMPTY           ,Channel 40 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH40_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH40_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH40_ILLEGAL_MMIO_VM_ACCESS     ,Channel 40 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH40_ILLEGAL_MMIO_TZ_ACCESS ,Channel 40 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH40_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH40_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH40_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH40_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH40_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH40_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH40_DROP_ILLEGAL_OPCODES       ,Channel 40 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH40_GATHER_PARSE_DISABLED      ,Channel 40 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH40_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH40_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH40_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH40_ENABLE_STALLCNT            ,Channel 40 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH40_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH40_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH40_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH40_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH40_RSB_NS                     ,Channel 40 RSB_NS" "Disabled,Enabled"
group.long 0x2900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH41_DMASTART                   ,Channel 41 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH41_DMASTART_HI                ,Channel 41 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH41_DMAPUT                     ,Channel 41 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH41_DMAPUT_HI                  ,Channel 41 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH41_DMAGET                     ,Channel 41 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH41_DMAGET_HI                  ,Channel 41 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH41_DMAEND                     ,Channel 41 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH41_DMAEND_HI                  ,Channel 41 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH41_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH41_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH41_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH41_CMDFIFO_GATHER             ,Channel 41 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH41_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH41_CMDFIFO_NUMEMPTY           ,Channel 41 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH41_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH41_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH41_ILLEGAL_MMIO_VM_ACCESS     ,Channel 41 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH41_ILLEGAL_MMIO_TZ_ACCESS ,Channel 41 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH41_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH41_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH41_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH41_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH41_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH41_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH41_DROP_ILLEGAL_OPCODES       ,Channel 41 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH41_GATHER_PARSE_DISABLED      ,Channel 41 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH41_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH41_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH41_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH41_ENABLE_STALLCNT            ,Channel 41 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH41_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH41_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH41_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH41_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH41_RSB_NS                     ,Channel 41 RSB_NS" "Disabled,Enabled"
group.long 0x2A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH42_DMASTART                   ,Channel 42 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH42_DMASTART_HI                ,Channel 42 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH42_DMAPUT                     ,Channel 42 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH42_DMAPUT_HI                  ,Channel 42 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH42_DMAGET                     ,Channel 42 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH42_DMAGET_HI                  ,Channel 42 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH42_DMAEND                     ,Channel 42 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH42_DMAEND_HI                  ,Channel 42 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH42_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH42_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH42_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH42_CMDFIFO_GATHER             ,Channel 42 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH42_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH42_CMDFIFO_NUMEMPTY           ,Channel 42 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH42_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH42_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH42_ILLEGAL_MMIO_VM_ACCESS     ,Channel 42 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH42_ILLEGAL_MMIO_TZ_ACCESS ,Channel 42 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH42_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH42_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH42_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH42_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH42_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH42_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH42_DROP_ILLEGAL_OPCODES       ,Channel 42 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH42_GATHER_PARSE_DISABLED      ,Channel 42 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH42_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH42_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH42_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH42_ENABLE_STALLCNT            ,Channel 42 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH42_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH42_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH42_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH42_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH42_RSB_NS                     ,Channel 42 RSB_NS" "Disabled,Enabled"
group.long 0x2B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH43_DMASTART                   ,Channel 43 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH43_DMASTART_HI                ,Channel 43 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH43_DMAPUT                     ,Channel 43 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH43_DMAPUT_HI                  ,Channel 43 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH43_DMAGET                     ,Channel 43 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH43_DMAGET_HI                  ,Channel 43 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH43_DMAEND                     ,Channel 43 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH43_DMAEND_HI                  ,Channel 43 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH43_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH43_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH43_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH43_CMDFIFO_GATHER             ,Channel 43 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH43_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH43_CMDFIFO_NUMEMPTY           ,Channel 43 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH43_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH43_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH43_ILLEGAL_MMIO_VM_ACCESS     ,Channel 43 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH43_ILLEGAL_MMIO_TZ_ACCESS ,Channel 43 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH43_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH43_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH43_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH43_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH43_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH43_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH43_DROP_ILLEGAL_OPCODES       ,Channel 43 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH43_GATHER_PARSE_DISABLED      ,Channel 43 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH43_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH43_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH43_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH43_ENABLE_STALLCNT            ,Channel 43 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH43_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH43_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH43_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH43_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH43_RSB_NS                     ,Channel 43 RSB_NS" "Disabled,Enabled"
group.long 0x2C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH44_DMASTART                   ,Channel 44 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH44_DMASTART_HI                ,Channel 44 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH44_DMAPUT                     ,Channel 44 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH44_DMAPUT_HI                  ,Channel 44 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH44_DMAGET                     ,Channel 44 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH44_DMAGET_HI                  ,Channel 44 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH44_DMAEND                     ,Channel 44 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH44_DMAEND_HI                  ,Channel 44 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH44_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH44_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH44_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH44_CMDFIFO_GATHER             ,Channel 44 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH44_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH44_CMDFIFO_NUMEMPTY           ,Channel 44 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH44_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH44_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH44_ILLEGAL_MMIO_VM_ACCESS     ,Channel 44 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH44_ILLEGAL_MMIO_TZ_ACCESS ,Channel 44 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH44_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH44_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH44_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH44_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH44_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH44_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH44_DROP_ILLEGAL_OPCODES       ,Channel 44 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH44_GATHER_PARSE_DISABLED      ,Channel 44 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH44_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH44_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH44_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH44_ENABLE_STALLCNT            ,Channel 44 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH44_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH44_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH44_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH44_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH44_RSB_NS                     ,Channel 44 RSB_NS" "Disabled,Enabled"
group.long 0x2D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH45_DMASTART                   ,Channel 45 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH45_DMASTART_HI                ,Channel 45 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH45_DMAPUT                     ,Channel 45 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH45_DMAPUT_HI                  ,Channel 45 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH45_DMAGET                     ,Channel 45 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH45_DMAGET_HI                  ,Channel 45 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH45_DMAEND                     ,Channel 45 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH45_DMAEND_HI                  ,Channel 45 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH45_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH45_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH45_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH45_CMDFIFO_GATHER             ,Channel 45 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH45_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH45_CMDFIFO_NUMEMPTY           ,Channel 45 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH45_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH45_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH45_ILLEGAL_MMIO_VM_ACCESS     ,Channel 45 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH45_ILLEGAL_MMIO_TZ_ACCESS ,Channel 45 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH45_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH45_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH45_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH45_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH45_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH45_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH45_DROP_ILLEGAL_OPCODES       ,Channel 45 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH45_GATHER_PARSE_DISABLED      ,Channel 45 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH45_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH45_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH45_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH45_ENABLE_STALLCNT            ,Channel 45 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH45_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH45_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH45_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH45_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH45_RSB_NS                     ,Channel 45 RSB_NS" "Disabled,Enabled"
group.long 0x2E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH46_DMASTART                   ,Channel 46 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH46_DMASTART_HI                ,Channel 46 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH46_DMAPUT                     ,Channel 46 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH46_DMAPUT_HI                  ,Channel 46 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH46_DMAGET                     ,Channel 46 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH46_DMAGET_HI                  ,Channel 46 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH46_DMAEND                     ,Channel 46 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH46_DMAEND_HI                  ,Channel 46 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH46_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH46_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH46_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH46_CMDFIFO_GATHER             ,Channel 46 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH46_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH46_CMDFIFO_NUMEMPTY           ,Channel 46 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH46_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH46_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH46_ILLEGAL_MMIO_VM_ACCESS     ,Channel 46 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH46_ILLEGAL_MMIO_TZ_ACCESS ,Channel 46 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH46_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH46_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH46_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH46_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH46_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH46_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH46_DROP_ILLEGAL_OPCODES       ,Channel 46 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH46_GATHER_PARSE_DISABLED      ,Channel 46 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH46_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH46_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH46_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH46_ENABLE_STALLCNT            ,Channel 46 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH46_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH46_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH46_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH46_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH46_RSB_NS                     ,Channel 46 RSB_NS" "Disabled,Enabled"
group.long 0x2F00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH47_DMASTART                   ,Channel 47 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH47_DMASTART_HI                ,Channel 47 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH47_DMAPUT                     ,Channel 47 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH47_DMAPUT_HI                  ,Channel 47 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH47_DMAGET                     ,Channel 47 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH47_DMAGET_HI                  ,Channel 47 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH47_DMAEND                     ,Channel 47 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH47_DMAEND_HI                  ,Channel 47 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH47_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH47_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH47_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH47_CMDFIFO_GATHER             ,Channel 47 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH47_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH47_CMDFIFO_NUMEMPTY           ,Channel 47 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x2F00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH47_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH47_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH47_ILLEGAL_MMIO_VM_ACCESS     ,Channel 47 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH47_ILLEGAL_MMIO_TZ_ACCESS ,Channel 47 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH47_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH47_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH47_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH47_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH47_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH47_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x2F00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH47_DROP_ILLEGAL_OPCODES       ,Channel 47 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH47_GATHER_PARSE_DISABLED      ,Channel 47 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH47_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH47_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x2F00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH47_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH47_ENABLE_STALLCNT            ,Channel 47 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH47_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH47_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH47_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH47_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH47_RSB_NS                     ,Channel 47 RSB_NS" "Disabled,Enabled"
group.long 0x3000++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH48_DMASTART                   ,Channel 48 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH48_DMASTART_HI                ,Channel 48 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH48_DMAPUT                     ,Channel 48 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH48_DMAPUT_HI                  ,Channel 48 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH48_DMAGET                     ,Channel 48 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH48_DMAGET_HI                  ,Channel 48 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH48_DMAEND                     ,Channel 48 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH48_DMAEND_HI                  ,Channel 48 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH48_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH48_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH48_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH48_CMDFIFO_GATHER             ,Channel 48 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH48_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH48_CMDFIFO_NUMEMPTY           ,Channel 48 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3000+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH48_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH48_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH48_ILLEGAL_MMIO_VM_ACCESS     ,Channel 48 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH48_ILLEGAL_MMIO_TZ_ACCESS ,Channel 48 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH48_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH48_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH48_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH48_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH48_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH48_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3000+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH48_DROP_ILLEGAL_OPCODES       ,Channel 48 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH48_GATHER_PARSE_DISABLED      ,Channel 48 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH48_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH48_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3000+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH48_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH48_ENABLE_STALLCNT            ,Channel 48 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH48_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH48_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH48_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH48_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH48_RSB_NS                     ,Channel 48 RSB_NS" "Disabled,Enabled"
group.long 0x3100++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH49_DMASTART                   ,Channel 49 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH49_DMASTART_HI                ,Channel 49 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH49_DMAPUT                     ,Channel 49 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH49_DMAPUT_HI                  ,Channel 49 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH49_DMAGET                     ,Channel 49 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH49_DMAGET_HI                  ,Channel 49 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH49_DMAEND                     ,Channel 49 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH49_DMAEND_HI                  ,Channel 49 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH49_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH49_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH49_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH49_CMDFIFO_GATHER             ,Channel 49 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH49_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH49_CMDFIFO_NUMEMPTY           ,Channel 49 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3100+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH49_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH49_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH49_ILLEGAL_MMIO_VM_ACCESS     ,Channel 49 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH49_ILLEGAL_MMIO_TZ_ACCESS ,Channel 49 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH49_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH49_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH49_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH49_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH49_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH49_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3100+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH49_DROP_ILLEGAL_OPCODES       ,Channel 49 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH49_GATHER_PARSE_DISABLED      ,Channel 49 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH49_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH49_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3100+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH49_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH49_ENABLE_STALLCNT            ,Channel 49 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH49_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH49_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH49_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH49_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH49_RSB_NS                     ,Channel 49 RSB_NS" "Disabled,Enabled"
group.long 0x3200++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH50_DMASTART                   ,Channel 50 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH50_DMASTART_HI                ,Channel 50 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH50_DMAPUT                     ,Channel 50 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH50_DMAPUT_HI                  ,Channel 50 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH50_DMAGET                     ,Channel 50 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH50_DMAGET_HI                  ,Channel 50 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH50_DMAEND                     ,Channel 50 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH50_DMAEND_HI                  ,Channel 50 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH50_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH50_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH50_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH50_CMDFIFO_GATHER             ,Channel 50 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH50_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH50_CMDFIFO_NUMEMPTY           ,Channel 50 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3200+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH50_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH50_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH50_ILLEGAL_MMIO_VM_ACCESS     ,Channel 50 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH50_ILLEGAL_MMIO_TZ_ACCESS ,Channel 50 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH50_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH50_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH50_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH50_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH50_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH50_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3200+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH50_DROP_ILLEGAL_OPCODES       ,Channel 50 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH50_GATHER_PARSE_DISABLED      ,Channel 50 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH50_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH50_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3200+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH50_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH50_ENABLE_STALLCNT            ,Channel 50 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH50_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH50_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH50_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH50_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH50_RSB_NS                     ,Channel 50 RSB_NS" "Disabled,Enabled"
group.long 0x3300++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH51_DMASTART                   ,Channel 51 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH51_DMASTART_HI                ,Channel 51 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH51_DMAPUT                     ,Channel 51 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH51_DMAPUT_HI                  ,Channel 51 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH51_DMAGET                     ,Channel 51 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH51_DMAGET_HI                  ,Channel 51 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH51_DMAEND                     ,Channel 51 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH51_DMAEND_HI                  ,Channel 51 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH51_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH51_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH51_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH51_CMDFIFO_GATHER             ,Channel 51 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH51_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH51_CMDFIFO_NUMEMPTY           ,Channel 51 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3300+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH51_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH51_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH51_ILLEGAL_MMIO_VM_ACCESS     ,Channel 51 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH51_ILLEGAL_MMIO_TZ_ACCESS ,Channel 51 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH51_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH51_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH51_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH51_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH51_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH51_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3300+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH51_DROP_ILLEGAL_OPCODES       ,Channel 51 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH51_GATHER_PARSE_DISABLED      ,Channel 51 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH51_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH51_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3300+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH51_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH51_ENABLE_STALLCNT            ,Channel 51 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH51_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH51_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH51_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH51_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH51_RSB_NS                     ,Channel 51 RSB_NS" "Disabled,Enabled"
group.long 0x3400++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH52_DMASTART                   ,Channel 52 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH52_DMASTART_HI                ,Channel 52 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH52_DMAPUT                     ,Channel 52 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH52_DMAPUT_HI                  ,Channel 52 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH52_DMAGET                     ,Channel 52 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH52_DMAGET_HI                  ,Channel 52 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH52_DMAEND                     ,Channel 52 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH52_DMAEND_HI                  ,Channel 52 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH52_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH52_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH52_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH52_CMDFIFO_GATHER             ,Channel 52 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH52_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH52_CMDFIFO_NUMEMPTY           ,Channel 52 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3400+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH52_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH52_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH52_ILLEGAL_MMIO_VM_ACCESS     ,Channel 52 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH52_ILLEGAL_MMIO_TZ_ACCESS ,Channel 52 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH52_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH52_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH52_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH52_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH52_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH52_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3400+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH52_DROP_ILLEGAL_OPCODES       ,Channel 52 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH52_GATHER_PARSE_DISABLED      ,Channel 52 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH52_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH52_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3400+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH52_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH52_ENABLE_STALLCNT            ,Channel 52 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH52_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH52_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH52_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH52_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH52_RSB_NS                     ,Channel 52 RSB_NS" "Disabled,Enabled"
group.long 0x3500++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH53_DMASTART                   ,Channel 53 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH53_DMASTART_HI                ,Channel 53 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH53_DMAPUT                     ,Channel 53 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH53_DMAPUT_HI                  ,Channel 53 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH53_DMAGET                     ,Channel 53 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH53_DMAGET_HI                  ,Channel 53 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH53_DMAEND                     ,Channel 53 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH53_DMAEND_HI                  ,Channel 53 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH53_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH53_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH53_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH53_CMDFIFO_GATHER             ,Channel 53 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH53_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH53_CMDFIFO_NUMEMPTY           ,Channel 53 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3500+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH53_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH53_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH53_ILLEGAL_MMIO_VM_ACCESS     ,Channel 53 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH53_ILLEGAL_MMIO_TZ_ACCESS ,Channel 53 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH53_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH53_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH53_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH53_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH53_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH53_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3500+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH53_DROP_ILLEGAL_OPCODES       ,Channel 53 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH53_GATHER_PARSE_DISABLED      ,Channel 53 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH53_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH53_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3500+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH53_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH53_ENABLE_STALLCNT            ,Channel 53 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH53_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH53_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH53_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH53_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH53_RSB_NS                     ,Channel 53 RSB_NS" "Disabled,Enabled"
group.long 0x3600++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH54_DMASTART                   ,Channel 54 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH54_DMASTART_HI                ,Channel 54 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH54_DMAPUT                     ,Channel 54 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH54_DMAPUT_HI                  ,Channel 54 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH54_DMAGET                     ,Channel 54 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH54_DMAGET_HI                  ,Channel 54 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH54_DMAEND                     ,Channel 54 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH54_DMAEND_HI                  ,Channel 54 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH54_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH54_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH54_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH54_CMDFIFO_GATHER             ,Channel 54 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH54_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH54_CMDFIFO_NUMEMPTY           ,Channel 54 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3600+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH54_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH54_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH54_ILLEGAL_MMIO_VM_ACCESS     ,Channel 54 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH54_ILLEGAL_MMIO_TZ_ACCESS ,Channel 54 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH54_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH54_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH54_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH54_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH54_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH54_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3600+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH54_DROP_ILLEGAL_OPCODES       ,Channel 54 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH54_GATHER_PARSE_DISABLED      ,Channel 54 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH54_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH54_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3600+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH54_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH54_ENABLE_STALLCNT            ,Channel 54 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH54_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH54_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH54_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH54_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH54_RSB_NS                     ,Channel 54 RSB_NS" "Disabled,Enabled"
group.long 0x3700++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH55_DMASTART                   ,Channel 55 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH55_DMASTART_HI                ,Channel 55 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH55_DMAPUT                     ,Channel 55 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH55_DMAPUT_HI                  ,Channel 55 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH55_DMAGET                     ,Channel 55 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH55_DMAGET_HI                  ,Channel 55 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH55_DMAEND                     ,Channel 55 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH55_DMAEND_HI                  ,Channel 55 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH55_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH55_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH55_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH55_CMDFIFO_GATHER             ,Channel 55 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH55_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH55_CMDFIFO_NUMEMPTY           ,Channel 55 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3700+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH55_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH55_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH55_ILLEGAL_MMIO_VM_ACCESS     ,Channel 55 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH55_ILLEGAL_MMIO_TZ_ACCESS ,Channel 55 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH55_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH55_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH55_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH55_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH55_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH55_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3700+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH55_DROP_ILLEGAL_OPCODES       ,Channel 55 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH55_GATHER_PARSE_DISABLED      ,Channel 55 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH55_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH55_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3700+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH55_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH55_ENABLE_STALLCNT            ,Channel 55 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH55_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH55_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH55_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH55_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH55_RSB_NS                     ,Channel 55 RSB_NS" "Disabled,Enabled"
group.long 0x3800++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH56_DMASTART                   ,Channel 56 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH56_DMASTART_HI                ,Channel 56 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH56_DMAPUT                     ,Channel 56 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH56_DMAPUT_HI                  ,Channel 56 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH56_DMAGET                     ,Channel 56 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH56_DMAGET_HI                  ,Channel 56 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH56_DMAEND                     ,Channel 56 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH56_DMAEND_HI                  ,Channel 56 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH56_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH56_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH56_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH56_CMDFIFO_GATHER             ,Channel 56 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH56_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH56_CMDFIFO_NUMEMPTY           ,Channel 56 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3800+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH56_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH56_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH56_ILLEGAL_MMIO_VM_ACCESS     ,Channel 56 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH56_ILLEGAL_MMIO_TZ_ACCESS ,Channel 56 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH56_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH56_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH56_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH56_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH56_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH56_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3800+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH56_DROP_ILLEGAL_OPCODES       ,Channel 56 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH56_GATHER_PARSE_DISABLED      ,Channel 56 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH56_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH56_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3800+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH56_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH56_ENABLE_STALLCNT            ,Channel 56 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH56_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH56_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH56_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH56_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH56_RSB_NS                     ,Channel 56 RSB_NS" "Disabled,Enabled"
group.long 0x3900++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH57_DMASTART                   ,Channel 57 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH57_DMASTART_HI                ,Channel 57 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH57_DMAPUT                     ,Channel 57 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH57_DMAPUT_HI                  ,Channel 57 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH57_DMAGET                     ,Channel 57 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH57_DMAGET_HI                  ,Channel 57 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH57_DMAEND                     ,Channel 57 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH57_DMAEND_HI                  ,Channel 57 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH57_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH57_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH57_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH57_CMDFIFO_GATHER             ,Channel 57 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH57_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH57_CMDFIFO_NUMEMPTY           ,Channel 57 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3900+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH57_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH57_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH57_ILLEGAL_MMIO_VM_ACCESS     ,Channel 57 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH57_ILLEGAL_MMIO_TZ_ACCESS ,Channel 57 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH57_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH57_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH57_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH57_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH57_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH57_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3900+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH57_DROP_ILLEGAL_OPCODES       ,Channel 57 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH57_GATHER_PARSE_DISABLED      ,Channel 57 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH57_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH57_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3900+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH57_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH57_ENABLE_STALLCNT            ,Channel 57 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH57_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH57_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH57_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH57_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH57_RSB_NS                     ,Channel 57 RSB_NS" "Disabled,Enabled"
group.long 0x3A00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH58_DMASTART                   ,Channel 58 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH58_DMASTART_HI                ,Channel 58 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH58_DMAPUT                     ,Channel 58 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH58_DMAPUT_HI                  ,Channel 58 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH58_DMAGET                     ,Channel 58 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH58_DMAGET_HI                  ,Channel 58 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH58_DMAEND                     ,Channel 58 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH58_DMAEND_HI                  ,Channel 58 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH58_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH58_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH58_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH58_CMDFIFO_GATHER             ,Channel 58 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH58_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH58_CMDFIFO_NUMEMPTY           ,Channel 58 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3A00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH58_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH58_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH58_ILLEGAL_MMIO_VM_ACCESS     ,Channel 58 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH58_ILLEGAL_MMIO_TZ_ACCESS ,Channel 58 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH58_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH58_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH58_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH58_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH58_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH58_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3A00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH58_DROP_ILLEGAL_OPCODES       ,Channel 58 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH58_GATHER_PARSE_DISABLED      ,Channel 58 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH58_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH58_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3A00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH58_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH58_ENABLE_STALLCNT            ,Channel 58 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH58_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH58_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH58_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH58_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH58_RSB_NS                     ,Channel 58 RSB_NS" "Disabled,Enabled"
group.long 0x3B00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH59_DMASTART                   ,Channel 59 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH59_DMASTART_HI                ,Channel 59 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH59_DMAPUT                     ,Channel 59 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH59_DMAPUT_HI                  ,Channel 59 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH59_DMAGET                     ,Channel 59 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH59_DMAGET_HI                  ,Channel 59 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH59_DMAEND                     ,Channel 59 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH59_DMAEND_HI                  ,Channel 59 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH59_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH59_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH59_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH59_CMDFIFO_GATHER             ,Channel 59 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH59_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH59_CMDFIFO_NUMEMPTY           ,Channel 59 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3B00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH59_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH59_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH59_ILLEGAL_MMIO_VM_ACCESS     ,Channel 59 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH59_ILLEGAL_MMIO_TZ_ACCESS ,Channel 59 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH59_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH59_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH59_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH59_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH59_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH59_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3B00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH59_DROP_ILLEGAL_OPCODES       ,Channel 59 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH59_GATHER_PARSE_DISABLED      ,Channel 59 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH59_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH59_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3B00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH59_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH59_ENABLE_STALLCNT            ,Channel 59 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH59_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH59_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH59_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH59_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH59_RSB_NS                     ,Channel 59 RSB_NS" "Disabled,Enabled"
group.long 0x3C00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH60_DMASTART                   ,Channel 60 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH60_DMASTART_HI                ,Channel 60 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH60_DMAPUT                     ,Channel 60 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH60_DMAPUT_HI                  ,Channel 60 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH60_DMAGET                     ,Channel 60 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH60_DMAGET_HI                  ,Channel 60 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH60_DMAEND                     ,Channel 60 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH60_DMAEND_HI                  ,Channel 60 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH60_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH60_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH60_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH60_CMDFIFO_GATHER             ,Channel 60 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH60_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH60_CMDFIFO_NUMEMPTY           ,Channel 60 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3C00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH60_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH60_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH60_ILLEGAL_MMIO_VM_ACCESS     ,Channel 60 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH60_ILLEGAL_MMIO_TZ_ACCESS ,Channel 60 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH60_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH60_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH60_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH60_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH60_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH60_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3C00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH60_DROP_ILLEGAL_OPCODES       ,Channel 60 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH60_GATHER_PARSE_DISABLED      ,Channel 60 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH60_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH60_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3C00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH60_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH60_ENABLE_STALLCNT            ,Channel 60 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH60_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH60_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH60_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH60_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH60_RSB_NS                     ,Channel 60 RSB_NS" "Disabled,Enabled"
group.long 0x3D00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH61_DMASTART                   ,Channel 61 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH61_DMASTART_HI                ,Channel 61 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH61_DMAPUT                     ,Channel 61 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH61_DMAPUT_HI                  ,Channel 61 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH61_DMAGET                     ,Channel 61 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH61_DMAGET_HI                  ,Channel 61 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH61_DMAEND                     ,Channel 61 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH61_DMAEND_HI                  ,Channel 61 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH61_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH61_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH61_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH61_CMDFIFO_GATHER             ,Channel 61 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH61_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH61_CMDFIFO_NUMEMPTY           ,Channel 61 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3D00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH61_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH61_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH61_ILLEGAL_MMIO_VM_ACCESS     ,Channel 61 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH61_ILLEGAL_MMIO_TZ_ACCESS ,Channel 61 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH61_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH61_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH61_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH61_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH61_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH61_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3D00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH61_DROP_ILLEGAL_OPCODES       ,Channel 61 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH61_GATHER_PARSE_DISABLED      ,Channel 61 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH61_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH61_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3D00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH61_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH61_ENABLE_STALLCNT            ,Channel 61 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH61_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH61_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH61_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH61_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH61_RSB_NS                     ,Channel 61 RSB_NS" "Disabled,Enabled"
group.long 0x3E00++0x2B
line.long 0x00 "DMASTART,DMA Start register"
hexmask.long 0x00 2.--31. 1. " CH62_DMASTART                   ,Channel 62 DMA Start"
line.long 0x04 "DMASTART_HI,DMA Start HI register"
hexmask.long.byte 0x04 0.--7. 1. " CH62_DMASTART_HI                ,Channel 62 DMA Start HI"
line.long 0x08 "DMAPUT,DMA Put HI register"
hexmask.long 0x08 2.--31. 1. " CH62_DMAPUT                     ,Channel 62 DMAPUT"
line.long 0x0C "DMAPUT_HI,DMA Put HI register"
hexmask.long.byte 0x0C 0.--7. 1. " CH62_DMAPUT_HI                  ,Channel 62 DMA Put HI"
line.long 0x10 "DMAGET,DMA Get register"
hexmask.long 0x10 2.--31. 1. " CH62_DMAGET                     ,Channel 62 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI register"
hexmask.long.byte 0x14 0.--7. 1. " CH62_DMAGET_HI                  ,Channel 62 DMA Get HI"
line.long 0x18 "DMAEND,DMA End register"
hexmask.long 0x18 2.--31. 1. " CH62_DMAEND                     ,Channel 62 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND HI register"
hexmask.long.byte 0x1C 0.--7. 1. " CH62_DMAEND_HI                  ,Channel 62 DMA End HI"
line.long 0x20 "DMACTRL,DMACTRL register"
bitfld.long 0x20 2. " CH62_DMAINITGET                 ,Resets GET pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "      CH62_DMAGETRST              ,Resets GET pointer" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x20 0. " CH62_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO STAT register"
bitfld.long 0x24 14. " CH62_CMDFIFO_GATHER             ,Channel 62 CMD FIFO GATHER" "Idle,Busy"
bitfld.long 0x24 13. "          CH62_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty or not" "Not empty,Empty"
textline "                                  "
hexmask.long.word 0x24 0.--12. 1. " CH62_CMDFIFO_NUMEMPTY           ,Channel 62 CMD FIFO Number empty"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA register"
group.long (0x3E00+0x30)++0x0B
line.long 0x00 "CMDP_OFFSET,CMDP OFFSET register"
hexmask.long.tbyte 0x00 0.--23. 1. " CH62_CMDP_OFFSET                ,Current or blocked offset of the Channel/CMD Processor"
line.long 0x04 "CMDP_CLASS,CMDP Class register"
hexmask.long.word 0x04 0.--9. 1. " CH62_CMDP_CLASS                 ,Current or blocked class of the Channel/CMD Processor"
line.long 0x08 "CHANNELSTAT,STAT register"
bitfld.long 0x08 7. " CH62_ILLEGAL_MMIO_VM_ACCESS     ,Channel 62 Illegal MMIO VM Access" "Not accessed,Accessed"
bitfld.long 0x08 6. "  CH62_ILLEGAL_MMIO_TZ_ACCESS ,Channel 62 Illegal MMIO TrustZone Access" "Not accessed,Accessed"
textline "                                  "
bitfld.long 0x08 5. " CH62_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Indicates an illegal MLOCK Busy Time-out" "Idle,Busy"
rbitfld.long 0x08 4. "          CH62_ILLEGAL_STREAMID       ,Indicates illegal usage of the stream ID on the context of Virtualization" "Not used,Used"
textline "                                  "
rbitfld.long 0x08 3. " CH62_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for the MLOCK feature" "No error,Error"
rbitfld.long 0x08 2. "      CH62_ILLEGAL_CLASS          ,Illegal Class-ID Error occurs" "No error,Error"
textline "                                  "
rbitfld.long 0x08 1. " CH62_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Not pending,Pending"
rbitfld.long 0x08 0. "   CH62_ILLEGAL_OPCODE         ,Illegal opcode occurred" "Not occurred,Occurred"
group.long (0x3E00+0x40)++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,Drop Illegal OPcodes register"
bitfld.long 0x00 0. " CH62_DROP_ILLEGAL_OPCODES       ,Channel 62 drop illegal opcodes" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled register"
bitfld.long 0x04 0. " CH62_GATHER_PARSE_DISABLED      ,Channel 62 GATHER parse disabled" "Yes,No"
line.long 0x08 "CMDPROC_STOP,CMDPROC Stop register"
bitfld.long 0x08 0. " CH62_CMDPROC_STOP               ,This bit stops commands from issuing from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,TEARDOWN register"
bitfld.long 0x0C 0. " CH62_TEARDOWN                   ,Resets the command FIFO and releases any locks that are in the arbiter" "No action,Tear down"
group.long (0x3E00+0x54)++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TICKCNT register"
bitfld.long 0x00 0. " CH62_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT register"
bitfld.long 0x04 0. " CH62_ENABLE_STALLCNT            ,Channel 62 enable STALLCNT" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT register"
bitfld.long 0x08 0. " CH62_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick count LO register"
line.long 0x10 "TICKCOUNT_HI,Tick count HI register"
line.long 0x14 "STALLCOUNT_LO,Stall count LO register"
line.long 0x18 "STALLCOUNT_HI,Stall count HI register"
line.long 0x1C "CHANNEL_XFER_LO,XFER LO register"
line.long 0x20 "CHANNEL_XFER_HI,XFER HI register"
line.long 0x24 "SYNCPT_PAYLOAD,SYNCPT Payload register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt register"
bitfld.long 0x28 0. " CH62_ILLEGAL_ACCESS_INTR        ,Contains the interrupt status for the host CMD Pre-Processor interrupts" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask register"
bitfld.long 0x2C 0. " CH62_ILLEGAL_ACCESS_INTRMASK    ,Contains the interrupt mask bits for the host CMD Pre-Processor interrupts" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID register"
hexmask.long.byte 0x30 0.--7. 1. " CH62_SMMU_STREAMID              ,Contains the SMMU Context STREAM-ID value"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out register"
line.long 0x38 "RSB_NS,RSB NS register"
bitfld.long 0x38 0. " CH62_RSB_NS                     ,Channel 62 RSB_NS" "Disabled,Enabled"
width 0x0B
tree.end
tree "THOST Syncpt"
base ad:0x13E80000
width 50.
group.long 0x6400++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_0,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6404++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_1,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6408++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_2,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x640C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_3,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6410++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_4,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6414++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_5,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6418++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_6,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x641C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_7,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6420++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_8,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6424++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_9,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6428++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_10,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x642C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_11,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6430++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_12,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6434++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_13,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6438++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_14,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x643C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_15,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6440++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_16,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6444++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_CPU_INCR_17,THost Common VM1 Syncpt CPU_INCR register"
bitfld.long 0x00 31. " SYNCPT_CPU_INCR_7[3]              ,Syncpt[3] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                  [1]              ,Syncpt[1] CPU_INCR 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] CPU_INCR 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_CPU_INCR_6[3]              ,Syncpt[3] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                  [1]              ,Syncpt[1] CPU_INCR 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] CPU_INCR 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_CPU_INCR_5[3]              ,Syncpt[3] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                  [1]              ,Syncpt[1] CPU_INCR 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] CPU_INCR 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_CPU_INCR_4[3]              ,Syncpt[3] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                  [1]              ,Syncpt[1] CPU_INCR 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] CPU_INCR 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_CPU_INCR_3[3]              ,Syncpt[3] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                  [1]              ,Syncpt[1] CPU_INCR 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] CPU_INCR 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_CPU_INCR_2[3]              ,Syncpt[3] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                  [1]              ,Syncpt[1] CPU_INCR 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] CPU_INCR 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_CPU_INCR_1[3]              ,Syncpt[3] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                  [1]              ,Syncpt[1] CPU_INCR 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] CPU_INCR 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_CPU_INCR_0[3]              ,Syncpt[3] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] CPU_INCR 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                  [1]              ,Syncpt[1] CPU_INCR 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] CPU_INCR 0" "Disabled,Enabled"
group.long 0x6464++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_0,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6468++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_1,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x646C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_2,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6470++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_3,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6474++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_4,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6478++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_5,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x647C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_6,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6480++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_7,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6484++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_8,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6488++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_9,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x648C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_10,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6490++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_11,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6494++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_12,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x6498++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_13,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x649C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_14,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_15,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_16,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x64A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRSTATUS_VM_17,THost Common VM1 Thresh Interrupt Status register"
eventfld.long 0x00 31. " SYNCPT_THRESH_INTRSTATUS_VM_7[3]  ,Syncpt[3] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 30. "  [2]        ,Syncpt[2] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt status 7" "Not pending,Pending"
eventfld.long 0x00 28. "  [0]        ,Syncpt[0] interrupt status 7" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 27. " SYNCPT_THRESH_INTRSTATUS_VM_6[3]  ,Syncpt[3] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 26. "  [2]        ,Syncpt[2] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt status 6" "Not pending,Pending"
eventfld.long 0x00 24. "  [0]        ,Syncpt[0] interrupt status 6" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 23. " SYNCPT_THRESH_INTRSTATUS_VM_5[3]  ,Syncpt[3] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 22. "  [2]        ,Syncpt[2] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt status 5" "Not pending,Pending"
eventfld.long 0x00 20. "  [0]        ,Syncpt[0] interrupt status 5" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 19. " SYNCPT_THRESH_INTRSTATUS_VM_4[3]  ,Syncpt[3] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 18. "  [2]        ,Syncpt[2] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt status 4" "Not pending,Pending"
eventfld.long 0x00 16. "  [0]        ,Syncpt[0] interrupt status 4" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 15. " SYNCPT_THRESH_INTRSTATUS_VM_3[3]  ,Syncpt[3] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 14. "  [2]        ,Syncpt[2] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt status 3" "Not pending,Pending"
eventfld.long 0x00 12. "  [0]        ,Syncpt[0] interrupt status 3" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 11. " SYNCPT_THRESH_INTRSTATUS_VM_2[3]  ,Syncpt[3] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 10. "  [2]        ,Syncpt[2] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt status 2" "Not pending,Pending"
eventfld.long 0x00 8. "  [0]        ,Syncpt[0] interrupt status 2" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 7. " SYNCPT_THRESH_INTRSTATUS_VM_1[3]  ,Syncpt[3] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 6. "  [2]        ,Syncpt[2] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt status 1" "Not pending,Pending"
eventfld.long 0x00 4. "  [0]        ,Syncpt[0] interrupt status 1" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 3. " SYNCPT_THRESH_INTRSTATUS_VM_0[3]  ,Syncpt[3] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 2. "  [2]        ,Syncpt[2] interrupt status 0" "Not pending,Pending"
textline "                                                           "
eventfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt status 0" "Not pending,Pending"
eventfld.long 0x00 0. "  [0]        ,Syncpt[0] interrupt status 0" "Not pending,Pending"
group.long 0x652C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6530++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6534++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6538++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x653C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6540++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6544++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6548++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x654C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6550++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6554++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6558++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x655C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6560++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6564++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6568++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x656C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6570++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRENABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Enable VM register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRENABLE_VM_7[3]  ,Syncpt[3] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                              [1]  ,Syncpt[1] interrupt enable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt enable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRENABLE_VM_6[3]  ,Syncpt[3] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                              [1]  ,Syncpt[1] interrupt enable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt enable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRENABLE_VM_5[3]  ,Syncpt[3] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                              [1]  ,Syncpt[1] interrupt enable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt enable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRENABLE_VM_4[3]  ,Syncpt[3] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                              [1]  ,Syncpt[1] interrupt enable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt enable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRENABLE_VM_3[3]  ,Syncpt[3] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                              [1]  ,Syncpt[1] interrupt enable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt enable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRENABLE_VM_2[3]  ,Syncpt[3] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                              [1]  ,Syncpt[1] interrupt enable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt enable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRENABLE_VM_1[3]  ,Syncpt[3] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                              [1]  ,Syncpt[1] interrupt enable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt enable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRENABLE_VM_0[3]  ,Syncpt[3] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt enable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                              [1]  ,Syncpt[1] interrupt enable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt enable VM 0" "Disabled,Enabled"
group.long 0x6590++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_0,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6594++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_1,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x6598++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_2,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x659C++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_3,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_4,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_5,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65A8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_6,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65AC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_7,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_8,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_9,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65B8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_10,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65BC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_11,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_12,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_13,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65C8++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_14,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65CC++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_15,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D0++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_16,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x65D4++0x03
line.long 0x00 "THOST_COMMON_VM1_SYNCPT_THRESH_INTRDISABLE_VM_17,THost Common VM1 Syncpt Thresh Interrupt Disabled register"
bitfld.long 0x00 31. " SYNCPT_THRESH_INTRDISABLE_VM_7[3] ,Syncpt[3] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 30. "     [2]        ,Syncpt[2] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 29. "                               [1] ,Syncpt[1] interrupt disable VM 7" "Disabled,Enabled"
bitfld.long 0x00 28. "     [0]        ,Syncpt[0] interrupt disable VM 7" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 27. " SYNCPT_THRESH_INTRDISABLE_VM_6[3] ,Syncpt[3] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 26. "     [2]        ,Syncpt[2] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 25. "                               [1] ,Syncpt[1] interrupt disable VM 6" "Disabled,Enabled"
bitfld.long 0x00 24. "     [0]        ,Syncpt[0] interrupt disable VM 6" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 23. " SYNCPT_THRESH_INTRDISABLE_VM_5[3] ,Syncpt[3] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 22. "     [2]        ,Syncpt[2] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 21. "                               [1] ,Syncpt[1] interrupt disable VM 5" "Disabled,Enabled"
bitfld.long 0x00 20. "     [0]        ,Syncpt[0] interrupt disable VM 5" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 19. " SYNCPT_THRESH_INTRDISABLE_VM_4[3] ,Syncpt[3] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 18. "     [2]        ,Syncpt[2] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 17. "                               [1] ,Syncpt[1] interrupt disable VM 4" "Disabled,Enabled"
bitfld.long 0x00 16. "     [0]        ,Syncpt[0] interrupt disable VM 4" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 15. " SYNCPT_THRESH_INTRDISABLE_VM_3[3] ,Syncpt[3] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 14. "     [2]        ,Syncpt[2] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 13. "                               [1] ,Syncpt[1] interrupt disable VM 3" "Disabled,Enabled"
bitfld.long 0x00 12. "     [0]        ,Syncpt[0] interrupt disable VM 3" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 11. " SYNCPT_THRESH_INTRDISABLE_VM_2[3] ,Syncpt[3] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 10. "     [2]        ,Syncpt[2] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 9. "                               [1] ,Syncpt[1] interrupt disable VM 2" "Disabled,Enabled"
bitfld.long 0x00 8. "     [0]        ,Syncpt[0] interrupt disable VM 2" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 7. " SYNCPT_THRESH_INTRDISABLE_VM_1[3] ,Syncpt[3] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 6. "     [2]        ,Syncpt[2] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. "                               [1] ,Syncpt[1] interrupt disable VM 1" "Disabled,Enabled"
bitfld.long 0x00 4. "     [0]        ,Syncpt[0] interrupt disable VM 1" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 3. " SYNCPT_THRESH_INTRDISABLE_VM_0[3] ,Syncpt[3] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 2. "     [2]        ,Syncpt[2] interrupt disable VM 0" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 1. "                               [1] ,Syncpt[1] interrupt disable VM 0" "Disabled,Enabled"
bitfld.long 0x00 0. "     [0]        ,Syncpt[0] interrupt disable VM 0" "Disabled,Enabled"
group.long 0x8000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_0,THost Syncpt Base Register 0"
group.long 0x8004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_1,THost Syncpt Base Register 1"
group.long 0x8008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_2,THost Syncpt Base Register 2"
group.long 0x800C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_3,THost Syncpt Base Register 3"
group.long 0x8010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_4,THost Syncpt Base Register 4"
group.long 0x8014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_5,THost Syncpt Base Register 5"
group.long 0x8018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_6,THost Syncpt Base Register 6"
group.long 0x801C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_7,THost Syncpt Base Register 7"
group.long 0x8020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_8,THost Syncpt Base Register 8"
group.long 0x8024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_9,THost Syncpt Base Register 9"
group.long 0x8028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_10,THost Syncpt Base Register 10"
group.long 0x802C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_11,THost Syncpt Base Register 11"
group.long 0x8030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_12,THost Syncpt Base Register 12"
group.long 0x8034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_13,THost Syncpt Base Register 13"
group.long 0x8038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_14,THost Syncpt Base Register 14"
group.long 0x803C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_BASE_15,THost Syncpt Base Register 15"
tree "Syncpt Registers"
group.long 0x8080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_0,THost Syncpt Register 0"
group.long 0x8084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_1,THost Syncpt Register 1"
group.long 0x8088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_2,THost Syncpt Register 2"
group.long 0x808C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_3,THost Syncpt Register 3"
group.long 0x8090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_4,THost Syncpt Register 4"
group.long 0x8094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_5,THost Syncpt Register 5"
group.long 0x8098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_6,THost Syncpt Register 6"
group.long 0x809C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_7,THost Syncpt Register 7"
group.long 0x80A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_8,THost Syncpt Register 8"
group.long 0x80A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_9,THost Syncpt Register 9"
group.long 0x80A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_10,THost Syncpt Register 10"
group.long 0x80AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_11,THost Syncpt Register 11"
group.long 0x80B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_12,THost Syncpt Register 12"
group.long 0x80B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_13,THost Syncpt Register 13"
group.long 0x80B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_14,THost Syncpt Register 14"
group.long 0x80BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_15,THost Syncpt Register 15"
group.long 0x80C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_16,THost Syncpt Register 16"
group.long 0x80C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_17,THost Syncpt Register 17"
group.long 0x80C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_18,THost Syncpt Register 18"
group.long 0x80CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_19,THost Syncpt Register 19"
group.long 0x80D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_20,THost Syncpt Register 20"
group.long 0x80D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_21,THost Syncpt Register 21"
group.long 0x80D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_22,THost Syncpt Register 22"
group.long 0x80DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_23,THost Syncpt Register 23"
group.long 0x80E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_24,THost Syncpt Register 24"
group.long 0x80E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_25,THost Syncpt Register 25"
group.long 0x80E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_26,THost Syncpt Register 26"
group.long 0x80EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_27,THost Syncpt Register 27"
group.long 0x80F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_28,THost Syncpt Register 28"
group.long 0x80F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_29,THost Syncpt Register 29"
group.long 0x80F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_30,THost Syncpt Register 30"
group.long 0x80FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_31,THost Syncpt Register 31"
group.long 0x8100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_32,THost Syncpt Register 32"
group.long 0x8104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_33,THost Syncpt Register 33"
group.long 0x8108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_34,THost Syncpt Register 34"
group.long 0x810C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_35,THost Syncpt Register 35"
group.long 0x8110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_36,THost Syncpt Register 36"
group.long 0x8114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_37,THost Syncpt Register 37"
group.long 0x8118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_38,THost Syncpt Register 38"
group.long 0x811C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_39,THost Syncpt Register 39"
group.long 0x8120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_40,THost Syncpt Register 40"
group.long 0x8124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_41,THost Syncpt Register 41"
group.long 0x8128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_42,THost Syncpt Register 42"
group.long 0x812C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_43,THost Syncpt Register 43"
group.long 0x8130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_44,THost Syncpt Register 44"
group.long 0x8134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_45,THost Syncpt Register 45"
group.long 0x8138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_46,THost Syncpt Register 46"
group.long 0x813C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_47,THost Syncpt Register 47"
group.long 0x8140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_48,THost Syncpt Register 48"
group.long 0x8144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_49,THost Syncpt Register 49"
group.long 0x8148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_50,THost Syncpt Register 50"
group.long 0x814C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_51,THost Syncpt Register 51"
group.long 0x8150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_52,THost Syncpt Register 52"
group.long 0x8154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_53,THost Syncpt Register 53"
group.long 0x8158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_54,THost Syncpt Register 54"
group.long 0x815C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_55,THost Syncpt Register 55"
group.long 0x8160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_56,THost Syncpt Register 56"
group.long 0x8164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_57,THost Syncpt Register 57"
group.long 0x8168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_58,THost Syncpt Register 58"
group.long 0x816C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_59,THost Syncpt Register 59"
group.long 0x8170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_60,THost Syncpt Register 60"
group.long 0x8174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_61,THost Syncpt Register 61"
group.long 0x8178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_62,THost Syncpt Register 62"
group.long 0x817C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_63,THost Syncpt Register 63"
group.long 0x8180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_64,THost Syncpt Register 64"
group.long 0x8184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_65,THost Syncpt Register 65"
group.long 0x8188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_66,THost Syncpt Register 66"
group.long 0x818C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_67,THost Syncpt Register 67"
group.long 0x8190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_68,THost Syncpt Register 68"
group.long 0x8194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_69,THost Syncpt Register 69"
group.long 0x8198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_70,THost Syncpt Register 70"
group.long 0x819C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_71,THost Syncpt Register 71"
group.long 0x81A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_72,THost Syncpt Register 72"
group.long 0x81A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_73,THost Syncpt Register 73"
group.long 0x81A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_74,THost Syncpt Register 74"
group.long 0x81AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_75,THost Syncpt Register 75"
group.long 0x81B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_76,THost Syncpt Register 76"
group.long 0x81B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_77,THost Syncpt Register 77"
group.long 0x81B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_78,THost Syncpt Register 78"
group.long 0x81BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_79,THost Syncpt Register 79"
group.long 0x81C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_80,THost Syncpt Register 80"
group.long 0x81C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_81,THost Syncpt Register 81"
group.long 0x81C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_82,THost Syncpt Register 82"
group.long 0x81CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_83,THost Syncpt Register 83"
group.long 0x81D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_84,THost Syncpt Register 84"
group.long 0x81D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_85,THost Syncpt Register 85"
group.long 0x81D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_86,THost Syncpt Register 86"
group.long 0x81DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_87,THost Syncpt Register 87"
group.long 0x81E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_88,THost Syncpt Register 88"
group.long 0x81E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_89,THost Syncpt Register 89"
group.long 0x81E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_90,THost Syncpt Register 90"
group.long 0x81EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_91,THost Syncpt Register 91"
group.long 0x81F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_92,THost Syncpt Register 92"
group.long 0x81F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_93,THost Syncpt Register 93"
group.long 0x81F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_94,THost Syncpt Register 94"
group.long 0x81FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_95,THost Syncpt Register 95"
group.long 0x8200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_96,THost Syncpt Register 96"
group.long 0x8204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_97,THost Syncpt Register 97"
group.long 0x8208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_98,THost Syncpt Register 98"
group.long 0x820C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_99,THost Syncpt Register 99"
group.long 0x8210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_100,THost Syncpt Register 100"
group.long 0x8214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_101,THost Syncpt Register 101"
group.long 0x8218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_102,THost Syncpt Register 102"
group.long 0x821C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_103,THost Syncpt Register 103"
group.long 0x8220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_104,THost Syncpt Register 104"
group.long 0x8224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_105,THost Syncpt Register 105"
group.long 0x8228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_106,THost Syncpt Register 106"
group.long 0x822C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_107,THost Syncpt Register 107"
group.long 0x8230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_108,THost Syncpt Register 108"
group.long 0x8234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_109,THost Syncpt Register 109"
group.long 0x8238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_110,THost Syncpt Register 110"
group.long 0x823C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_111,THost Syncpt Register 111"
group.long 0x8240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_112,THost Syncpt Register 112"
group.long 0x8244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_113,THost Syncpt Register 113"
group.long 0x8248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_114,THost Syncpt Register 114"
group.long 0x824C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_115,THost Syncpt Register 115"
group.long 0x8250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_116,THost Syncpt Register 116"
group.long 0x8254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_117,THost Syncpt Register 117"
group.long 0x8258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_118,THost Syncpt Register 118"
group.long 0x825C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_119,THost Syncpt Register 119"
group.long 0x8260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_120,THost Syncpt Register 120"
group.long 0x8264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_121,THost Syncpt Register 121"
group.long 0x8268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_122,THost Syncpt Register 122"
group.long 0x826C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_123,THost Syncpt Register 123"
group.long 0x8270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_124,THost Syncpt Register 124"
group.long 0x8274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_125,THost Syncpt Register 125"
group.long 0x8278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_126,THost Syncpt Register 126"
group.long 0x827C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_127,THost Syncpt Register 127"
group.long 0x8280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_128,THost Syncpt Register 128"
group.long 0x8284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_129,THost Syncpt Register 129"
group.long 0x8288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_130,THost Syncpt Register 130"
group.long 0x828C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_131,THost Syncpt Register 131"
group.long 0x8290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_132,THost Syncpt Register 132"
group.long 0x8294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_133,THost Syncpt Register 133"
group.long 0x8298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_134,THost Syncpt Register 134"
group.long 0x829C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_135,THost Syncpt Register 135"
group.long 0x82A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_136,THost Syncpt Register 136"
group.long 0x82A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_137,THost Syncpt Register 137"
group.long 0x82A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_138,THost Syncpt Register 138"
group.long 0x82AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_139,THost Syncpt Register 139"
group.long 0x82B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_140,THost Syncpt Register 140"
group.long 0x82B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_141,THost Syncpt Register 141"
group.long 0x82B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_142,THost Syncpt Register 142"
group.long 0x82BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_143,THost Syncpt Register 143"
group.long 0x82C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_144,THost Syncpt Register 144"
group.long 0x82C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_145,THost Syncpt Register 145"
group.long 0x82C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_146,THost Syncpt Register 146"
group.long 0x82CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_147,THost Syncpt Register 147"
group.long 0x82D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_148,THost Syncpt Register 148"
group.long 0x82D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_149,THost Syncpt Register 149"
group.long 0x82D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_150,THost Syncpt Register 150"
group.long 0x82DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_151,THost Syncpt Register 151"
group.long 0x82E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_152,THost Syncpt Register 152"
group.long 0x82E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_153,THost Syncpt Register 153"
group.long 0x82E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_154,THost Syncpt Register 154"
group.long 0x82EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_155,THost Syncpt Register 155"
group.long 0x82F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_156,THost Syncpt Register 156"
group.long 0x82F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_157,THost Syncpt Register 157"
group.long 0x82F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_158,THost Syncpt Register 158"
group.long 0x82FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_159,THost Syncpt Register 159"
group.long 0x8300++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_160,THost Syncpt Register 160"
group.long 0x8304++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_161,THost Syncpt Register 161"
group.long 0x8308++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_162,THost Syncpt Register 162"
group.long 0x830C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_163,THost Syncpt Register 163"
group.long 0x8310++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_164,THost Syncpt Register 164"
group.long 0x8314++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_165,THost Syncpt Register 165"
group.long 0x8318++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_166,THost Syncpt Register 166"
group.long 0x831C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_167,THost Syncpt Register 167"
group.long 0x8320++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_168,THost Syncpt Register 168"
group.long 0x8324++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_169,THost Syncpt Register 169"
group.long 0x8328++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_170,THost Syncpt Register 170"
group.long 0x832C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_171,THost Syncpt Register 171"
group.long 0x8330++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_172,THost Syncpt Register 172"
group.long 0x8334++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_173,THost Syncpt Register 173"
group.long 0x8338++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_174,THost Syncpt Register 174"
group.long 0x833C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_175,THost Syncpt Register 175"
group.long 0x8340++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_176,THost Syncpt Register 176"
group.long 0x8344++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_177,THost Syncpt Register 177"
group.long 0x8348++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_178,THost Syncpt Register 178"
group.long 0x834C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_179,THost Syncpt Register 179"
group.long 0x8350++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_180,THost Syncpt Register 180"
group.long 0x8354++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_181,THost Syncpt Register 181"
group.long 0x8358++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_182,THost Syncpt Register 182"
group.long 0x835C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_183,THost Syncpt Register 183"
group.long 0x8360++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_184,THost Syncpt Register 184"
group.long 0x8364++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_185,THost Syncpt Register 185"
group.long 0x8368++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_186,THost Syncpt Register 186"
group.long 0x836C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_187,THost Syncpt Register 187"
group.long 0x8370++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_188,THost Syncpt Register 188"
group.long 0x8374++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_189,THost Syncpt Register 189"
group.long 0x8378++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_190,THost Syncpt Register 190"
group.long 0x837C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_191,THost Syncpt Register 191"
group.long 0x8380++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_192,THost Syncpt Register 192"
group.long 0x8384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_193,THost Syncpt Register 193"
group.long 0x8388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_194,THost Syncpt Register 194"
group.long 0x838C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_195,THost Syncpt Register 195"
group.long 0x8390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_196,THost Syncpt Register 196"
group.long 0x8394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_197,THost Syncpt Register 197"
group.long 0x8398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_198,THost Syncpt Register 198"
group.long 0x839C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_199,THost Syncpt Register 199"
group.long 0x83A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_200,THost Syncpt Register 200"
group.long 0x83A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_201,THost Syncpt Register 201"
group.long 0x83A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_202,THost Syncpt Register 202"
group.long 0x83AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_203,THost Syncpt Register 203"
group.long 0x83B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_204,THost Syncpt Register 204"
group.long 0x83B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_205,THost Syncpt Register 205"
group.long 0x83B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_206,THost Syncpt Register 206"
group.long 0x83BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_207,THost Syncpt Register 207"
group.long 0x83C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_208,THost Syncpt Register 208"
group.long 0x83C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_209,THost Syncpt Register 209"
group.long 0x83C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_210,THost Syncpt Register 210"
group.long 0x83CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_211,THost Syncpt Register 211"
group.long 0x83D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_212,THost Syncpt Register 212"
group.long 0x83D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_213,THost Syncpt Register 213"
group.long 0x83D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_214,THost Syncpt Register 214"
group.long 0x83DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_215,THost Syncpt Register 215"
group.long 0x83E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_216,THost Syncpt Register 216"
group.long 0x83E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_217,THost Syncpt Register 217"
group.long 0x83E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_218,THost Syncpt Register 218"
group.long 0x83EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_219,THost Syncpt Register 219"
group.long 0x83F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_220,THost Syncpt Register 220"
group.long 0x83F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_221,THost Syncpt Register 221"
group.long 0x83F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_222,THost Syncpt Register 222"
group.long 0x83FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_223,THost Syncpt Register 223"
group.long 0x8400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_224,THost Syncpt Register 224"
group.long 0x8404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_225,THost Syncpt Register 225"
group.long 0x8408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_226,THost Syncpt Register 226"
group.long 0x840C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_227,THost Syncpt Register 227"
group.long 0x8410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_228,THost Syncpt Register 228"
group.long 0x8414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_229,THost Syncpt Register 229"
group.long 0x8418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_230,THost Syncpt Register 230"
group.long 0x841C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_231,THost Syncpt Register 231"
group.long 0x8420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_232,THost Syncpt Register 232"
group.long 0x8424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_233,THost Syncpt Register 233"
group.long 0x8428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_234,THost Syncpt Register 234"
group.long 0x842C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_235,THost Syncpt Register 235"
group.long 0x8430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_236,THost Syncpt Register 236"
group.long 0x8434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_237,THost Syncpt Register 237"
group.long 0x8438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_238,THost Syncpt Register 238"
group.long 0x843C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_239,THost Syncpt Register 239"
group.long 0x8440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_240,THost Syncpt Register 240"
group.long 0x8444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_241,THost Syncpt Register 241"
group.long 0x8448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_242,THost Syncpt Register 242"
group.long 0x844C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_243,THost Syncpt Register 243"
group.long 0x8450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_244,THost Syncpt Register 244"
group.long 0x8454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_245,THost Syncpt Register 245"
group.long 0x8458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_246,THost Syncpt Register 246"
group.long 0x845C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_247,THost Syncpt Register 247"
group.long 0x8460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_248,THost Syncpt Register 248"
group.long 0x8464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_249,THost Syncpt Register 249"
group.long 0x8468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_250,THost Syncpt Register 250"
group.long 0x846C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_251,THost Syncpt Register 251"
group.long 0x8470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_252,THost Syncpt Register 252"
group.long 0x8474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_253,THost Syncpt Register 253"
group.long 0x8478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_254,THost Syncpt Register 254"
group.long 0x847C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_255,THost Syncpt Register 255"
group.long 0x8480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_256,THost Syncpt Register 256"
group.long 0x8484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_257,THost Syncpt Register 257"
group.long 0x8488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_258,THost Syncpt Register 258"
group.long 0x848C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_259,THost Syncpt Register 259"
group.long 0x8490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_260,THost Syncpt Register 260"
group.long 0x8494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_261,THost Syncpt Register 261"
group.long 0x8498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_262,THost Syncpt Register 262"
group.long 0x849C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_263,THost Syncpt Register 263"
group.long 0x84A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_264,THost Syncpt Register 264"
group.long 0x84A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_265,THost Syncpt Register 265"
group.long 0x84A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_266,THost Syncpt Register 266"
group.long 0x84AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_267,THost Syncpt Register 267"
group.long 0x84B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_268,THost Syncpt Register 268"
group.long 0x84B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_269,THost Syncpt Register 269"
group.long 0x84B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_270,THost Syncpt Register 270"
group.long 0x84BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_271,THost Syncpt Register 271"
group.long 0x84C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_272,THost Syncpt Register 272"
group.long 0x84C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_273,THost Syncpt Register 273"
group.long 0x84C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_274,THost Syncpt Register 274"
group.long 0x84CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_275,THost Syncpt Register 275"
group.long 0x84D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_276,THost Syncpt Register 276"
group.long 0x84D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_277,THost Syncpt Register 277"
group.long 0x84D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_278,THost Syncpt Register 278"
group.long 0x84DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_279,THost Syncpt Register 279"
group.long 0x84E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_280,THost Syncpt Register 280"
group.long 0x84E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_281,THost Syncpt Register 281"
group.long 0x84E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_282,THost Syncpt Register 282"
group.long 0x84EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_283,THost Syncpt Register 283"
group.long 0x84F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_284,THost Syncpt Register 284"
group.long 0x84F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_285,THost Syncpt Register 285"
group.long 0x84F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_286,THost Syncpt Register 286"
group.long 0x84FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_287,THost Syncpt Register 287"
group.long 0x8500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_288,THost Syncpt Register 288"
group.long 0x8504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_289,THost Syncpt Register 289"
group.long 0x8508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_290,THost Syncpt Register 290"
group.long 0x850C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_291,THost Syncpt Register 291"
group.long 0x8510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_292,THost Syncpt Register 292"
group.long 0x8514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_293,THost Syncpt Register 293"
group.long 0x8518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_294,THost Syncpt Register 294"
group.long 0x851C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_295,THost Syncpt Register 295"
group.long 0x8520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_296,THost Syncpt Register 296"
group.long 0x8524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_297,THost Syncpt Register 297"
group.long 0x8528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_298,THost Syncpt Register 298"
group.long 0x852C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_299,THost Syncpt Register 299"
group.long 0x8530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_300,THost Syncpt Register 300"
group.long 0x8534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_301,THost Syncpt Register 301"
group.long 0x8538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_302,THost Syncpt Register 302"
group.long 0x853C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_303,THost Syncpt Register 303"
group.long 0x8540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_304,THost Syncpt Register 304"
group.long 0x8544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_305,THost Syncpt Register 305"
group.long 0x8548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_306,THost Syncpt Register 306"
group.long 0x854C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_307,THost Syncpt Register 307"
group.long 0x8550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_308,THost Syncpt Register 308"
group.long 0x8554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_309,THost Syncpt Register 309"
group.long 0x8558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_310,THost Syncpt Register 310"
group.long 0x855C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_311,THost Syncpt Register 311"
group.long 0x8560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_312,THost Syncpt Register 312"
group.long 0x8564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_313,THost Syncpt Register 313"
group.long 0x8568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_314,THost Syncpt Register 314"
group.long 0x856C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_315,THost Syncpt Register 315"
group.long 0x8570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_316,THost Syncpt Register 316"
group.long 0x8574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_317,THost Syncpt Register 317"
group.long 0x8578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_318,THost Syncpt Register 318"
group.long 0x857C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_319,THost Syncpt Register 319"
group.long 0x8580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_320,THost Syncpt Register 320"
group.long 0x8584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_321,THost Syncpt Register 321"
group.long 0x8588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_322,THost Syncpt Register 322"
group.long 0x858C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_323,THost Syncpt Register 323"
group.long 0x8590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_324,THost Syncpt Register 324"
group.long 0x8594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_325,THost Syncpt Register 325"
group.long 0x8598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_326,THost Syncpt Register 326"
group.long 0x859C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_327,THost Syncpt Register 327"
group.long 0x85A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_328,THost Syncpt Register 328"
group.long 0x85A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_329,THost Syncpt Register 329"
group.long 0x85A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_330,THost Syncpt Register 330"
group.long 0x85AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_331,THost Syncpt Register 331"
group.long 0x85B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_332,THost Syncpt Register 332"
group.long 0x85B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_333,THost Syncpt Register 333"
group.long 0x85B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_334,THost Syncpt Register 334"
group.long 0x85BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_335,THost Syncpt Register 335"
group.long 0x85C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_336,THost Syncpt Register 336"
group.long 0x85C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_337,THost Syncpt Register 337"
group.long 0x85C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_338,THost Syncpt Register 338"
group.long 0x85CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_339,THost Syncpt Register 339"
group.long 0x85D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_340,THost Syncpt Register 340"
group.long 0x85D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_341,THost Syncpt Register 341"
group.long 0x85D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_342,THost Syncpt Register 342"
group.long 0x85DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_343,THost Syncpt Register 343"
group.long 0x85E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_344,THost Syncpt Register 344"
group.long 0x85E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_345,THost Syncpt Register 345"
group.long 0x85E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_346,THost Syncpt Register 346"
group.long 0x85EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_347,THost Syncpt Register 347"
group.long 0x85F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_348,THost Syncpt Register 348"
group.long 0x85F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_349,THost Syncpt Register 349"
group.long 0x85F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_350,THost Syncpt Register 350"
group.long 0x85FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_351,THost Syncpt Register 351"
group.long 0x8600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_352,THost Syncpt Register 352"
group.long 0x8604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_353,THost Syncpt Register 353"
group.long 0x8608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_354,THost Syncpt Register 354"
group.long 0x860C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_355,THost Syncpt Register 355"
group.long 0x8610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_356,THost Syncpt Register 356"
group.long 0x8614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_357,THost Syncpt Register 357"
group.long 0x8618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_358,THost Syncpt Register 358"
group.long 0x861C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_359,THost Syncpt Register 359"
group.long 0x8620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_360,THost Syncpt Register 360"
group.long 0x8624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_361,THost Syncpt Register 361"
group.long 0x8628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_362,THost Syncpt Register 362"
group.long 0x862C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_363,THost Syncpt Register 363"
group.long 0x8630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_364,THost Syncpt Register 364"
group.long 0x8634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_365,THost Syncpt Register 365"
group.long 0x8638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_366,THost Syncpt Register 366"
group.long 0x863C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_367,THost Syncpt Register 367"
group.long 0x8640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_368,THost Syncpt Register 368"
group.long 0x8644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_369,THost Syncpt Register 369"
group.long 0x8648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_370,THost Syncpt Register 370"
group.long 0x864C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_371,THost Syncpt Register 371"
group.long 0x8650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_372,THost Syncpt Register 372"
group.long 0x8654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_373,THost Syncpt Register 373"
group.long 0x8658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_374,THost Syncpt Register 374"
group.long 0x865C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_375,THost Syncpt Register 375"
group.long 0x8660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_376,THost Syncpt Register 376"
group.long 0x8664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_377,THost Syncpt Register 377"
group.long 0x8668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_378,THost Syncpt Register 378"
group.long 0x866C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_379,THost Syncpt Register 379"
group.long 0x8670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_380,THost Syncpt Register 380"
group.long 0x8674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_381,THost Syncpt Register 381"
group.long 0x8678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_382,THost Syncpt Register 382"
group.long 0x867C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_383,THost Syncpt Register 383"
group.long 0x8680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_384,THost Syncpt Register 384"
group.long 0x8684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_385,THost Syncpt Register 385"
group.long 0x8688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_386,THost Syncpt Register 386"
group.long 0x868C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_387,THost Syncpt Register 387"
group.long 0x8690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_388,THost Syncpt Register 388"
group.long 0x8694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_389,THost Syncpt Register 389"
group.long 0x8698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_390,THost Syncpt Register 390"
group.long 0x869C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_391,THost Syncpt Register 391"
group.long 0x86A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_392,THost Syncpt Register 392"
group.long 0x86A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_393,THost Syncpt Register 393"
group.long 0x86A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_394,THost Syncpt Register 394"
group.long 0x86AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_395,THost Syncpt Register 395"
group.long 0x86B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_396,THost Syncpt Register 396"
group.long 0x86B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_397,THost Syncpt Register 397"
group.long 0x86B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_398,THost Syncpt Register 398"
group.long 0x86BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_399,THost Syncpt Register 399"
group.long 0x86C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_400,THost Syncpt Register 400"
group.long 0x86C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_401,THost Syncpt Register 401"
group.long 0x86C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_402,THost Syncpt Register 402"
group.long 0x86CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_403,THost Syncpt Register 403"
group.long 0x86D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_404,THost Syncpt Register 404"
group.long 0x86D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_405,THost Syncpt Register 405"
group.long 0x86D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_406,THost Syncpt Register 406"
group.long 0x86DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_407,THost Syncpt Register 407"
group.long 0x86E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_408,THost Syncpt Register 408"
group.long 0x86E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_409,THost Syncpt Register 409"
group.long 0x86E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_410,THost Syncpt Register 410"
group.long 0x86EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_411,THost Syncpt Register 411"
group.long 0x86F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_412,THost Syncpt Register 412"
group.long 0x86F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_413,THost Syncpt Register 413"
group.long 0x86F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_414,THost Syncpt Register 414"
group.long 0x86FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_415,THost Syncpt Register 415"
group.long 0x8700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_416,THost Syncpt Register 416"
group.long 0x8704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_417,THost Syncpt Register 417"
group.long 0x8708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_418,THost Syncpt Register 418"
group.long 0x870C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_419,THost Syncpt Register 419"
group.long 0x8710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_420,THost Syncpt Register 420"
group.long 0x8714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_421,THost Syncpt Register 421"
group.long 0x8718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_422,THost Syncpt Register 422"
group.long 0x871C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_423,THost Syncpt Register 423"
group.long 0x8720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_424,THost Syncpt Register 424"
group.long 0x8724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_425,THost Syncpt Register 425"
group.long 0x8728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_426,THost Syncpt Register 426"
group.long 0x872C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_427,THost Syncpt Register 427"
group.long 0x8730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_428,THost Syncpt Register 428"
group.long 0x8734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_429,THost Syncpt Register 429"
group.long 0x8738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_430,THost Syncpt Register 430"
group.long 0x873C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_431,THost Syncpt Register 431"
group.long 0x8740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_432,THost Syncpt Register 432"
group.long 0x8744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_433,THost Syncpt Register 433"
group.long 0x8748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_434,THost Syncpt Register 434"
group.long 0x874C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_435,THost Syncpt Register 435"
group.long 0x8750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_436,THost Syncpt Register 436"
group.long 0x8754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_437,THost Syncpt Register 437"
group.long 0x8758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_438,THost Syncpt Register 438"
group.long 0x875C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_439,THost Syncpt Register 439"
group.long 0x8760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_440,THost Syncpt Register 440"
group.long 0x8764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_441,THost Syncpt Register 441"
group.long 0x8768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_442,THost Syncpt Register 442"
group.long 0x876C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_443,THost Syncpt Register 443"
group.long 0x8770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_444,THost Syncpt Register 444"
group.long 0x8774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_445,THost Syncpt Register 445"
group.long 0x8778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_446,THost Syncpt Register 446"
group.long 0x877C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_447,THost Syncpt Register 447"
group.long 0x8780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_448,THost Syncpt Register 448"
group.long 0x8784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_449,THost Syncpt Register 449"
group.long 0x8788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_450,THost Syncpt Register 450"
group.long 0x878C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_451,THost Syncpt Register 451"
group.long 0x8790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_452,THost Syncpt Register 452"
group.long 0x8794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_453,THost Syncpt Register 453"
group.long 0x8798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_454,THost Syncpt Register 454"
group.long 0x879C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_455,THost Syncpt Register 455"
group.long 0x87A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_456,THost Syncpt Register 456"
group.long 0x87A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_457,THost Syncpt Register 457"
group.long 0x87A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_458,THost Syncpt Register 458"
group.long 0x87AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_459,THost Syncpt Register 459"
group.long 0x87B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_460,THost Syncpt Register 460"
group.long 0x87B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_461,THost Syncpt Register 461"
group.long 0x87B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_462,THost Syncpt Register 462"
group.long 0x87BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_463,THost Syncpt Register 463"
group.long 0x87C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_464,THost Syncpt Register 464"
group.long 0x87C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_465,THost Syncpt Register 465"
group.long 0x87C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_466,THost Syncpt Register 466"
group.long 0x87CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_467,THost Syncpt Register 467"
group.long 0x87D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_468,THost Syncpt Register 468"
group.long 0x87D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_469,THost Syncpt Register 469"
group.long 0x87D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_470,THost Syncpt Register 470"
group.long 0x87DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_471,THost Syncpt Register 471"
group.long 0x87E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_472,THost Syncpt Register 472"
group.long 0x87E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_473,THost Syncpt Register 473"
group.long 0x87E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_474,THost Syncpt Register 474"
group.long 0x87EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_475,THost Syncpt Register 475"
group.long 0x87F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_476,THost Syncpt Register 476"
group.long 0x87F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_477,THost Syncpt Register 477"
group.long 0x87F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_478,THost Syncpt Register 478"
group.long 0x87FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_479,THost Syncpt Register 479"
group.long 0x8800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_480,THost Syncpt Register 480"
group.long 0x8804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_481,THost Syncpt Register 481"
group.long 0x8808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_482,THost Syncpt Register 482"
group.long 0x880C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_483,THost Syncpt Register 483"
group.long 0x8810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_484,THost Syncpt Register 484"
group.long 0x8814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_485,THost Syncpt Register 485"
group.long 0x8818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_486,THost Syncpt Register 486"
group.long 0x881C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_487,THost Syncpt Register 487"
group.long 0x8820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_488,THost Syncpt Register 488"
group.long 0x8824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_489,THost Syncpt Register 489"
group.long 0x8828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_490,THost Syncpt Register 490"
group.long 0x882C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_491,THost Syncpt Register 491"
group.long 0x8830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_492,THost Syncpt Register 492"
group.long 0x8834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_493,THost Syncpt Register 493"
group.long 0x8838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_494,THost Syncpt Register 494"
group.long 0x883C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_495,THost Syncpt Register 495"
group.long 0x8840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_496,THost Syncpt Register 496"
group.long 0x8844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_497,THost Syncpt Register 497"
group.long 0x8848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_498,THost Syncpt Register 498"
group.long 0x884C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_499,THost Syncpt Register 499"
group.long 0x8850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_500,THost Syncpt Register 500"
group.long 0x8854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_501,THost Syncpt Register 501"
group.long 0x8858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_502,THost Syncpt Register 502"
group.long 0x885C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_503,THost Syncpt Register 503"
group.long 0x8860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_504,THost Syncpt Register 504"
group.long 0x8864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_505,THost Syncpt Register 505"
group.long 0x8868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_506,THost Syncpt Register 506"
group.long 0x886C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_507,THost Syncpt Register 507"
group.long 0x8870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_508,THost Syncpt Register 508"
group.long 0x8874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_509,THost Syncpt Register 509"
group.long 0x8878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_510,THost Syncpt Register 510"
group.long 0x887C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_511,THost Syncpt Register 511"
group.long 0x8880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_512,THost Syncpt Register 512"
group.long 0x8884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_513,THost Syncpt Register 513"
group.long 0x8888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_514,THost Syncpt Register 514"
group.long 0x888C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_515,THost Syncpt Register 515"
group.long 0x8890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_516,THost Syncpt Register 516"
group.long 0x8894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_517,THost Syncpt Register 517"
group.long 0x8898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_518,THost Syncpt Register 518"
group.long 0x889C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_519,THost Syncpt Register 519"
group.long 0x88A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_520,THost Syncpt Register 520"
group.long 0x88A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_521,THost Syncpt Register 521"
group.long 0x88A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_522,THost Syncpt Register 522"
group.long 0x88AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_523,THost Syncpt Register 523"
group.long 0x88B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_524,THost Syncpt Register 524"
group.long 0x88B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_525,THost Syncpt Register 525"
group.long 0x88B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_526,THost Syncpt Register 526"
group.long 0x88BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_527,THost Syncpt Register 527"
group.long 0x88C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_528,THost Syncpt Register 528"
group.long 0x88C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_529,THost Syncpt Register 529"
group.long 0x88C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_530,THost Syncpt Register 530"
group.long 0x88CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_531,THost Syncpt Register 531"
group.long 0x88D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_532,THost Syncpt Register 532"
group.long 0x88D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_533,THost Syncpt Register 533"
group.long 0x88D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_534,THost Syncpt Register 534"
group.long 0x88DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_535,THost Syncpt Register 535"
group.long 0x88E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_536,THost Syncpt Register 536"
group.long 0x88E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_537,THost Syncpt Register 537"
group.long 0x88E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_538,THost Syncpt Register 538"
group.long 0x88EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_539,THost Syncpt Register 539"
group.long 0x88F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_540,THost Syncpt Register 540"
group.long 0x88F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_541,THost Syncpt Register 541"
group.long 0x88F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_542,THost Syncpt Register 542"
group.long 0x88FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_543,THost Syncpt Register 543"
group.long 0x8900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_544,THost Syncpt Register 544"
group.long 0x8904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_545,THost Syncpt Register 545"
group.long 0x8908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_546,THost Syncpt Register 546"
group.long 0x890C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_547,THost Syncpt Register 547"
group.long 0x8910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_548,THost Syncpt Register 548"
group.long 0x8914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_549,THost Syncpt Register 549"
group.long 0x8918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_550,THost Syncpt Register 550"
group.long 0x891C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_551,THost Syncpt Register 551"
group.long 0x8920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_552,THost Syncpt Register 552"
group.long 0x8924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_553,THost Syncpt Register 553"
group.long 0x8928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_554,THost Syncpt Register 554"
group.long 0x892C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_555,THost Syncpt Register 555"
group.long 0x8930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_556,THost Syncpt Register 556"
group.long 0x8934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_557,THost Syncpt Register 557"
group.long 0x8938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_558,THost Syncpt Register 558"
group.long 0x893C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_559,THost Syncpt Register 559"
group.long 0x8940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_560,THost Syncpt Register 560"
group.long 0x8944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_561,THost Syncpt Register 561"
group.long 0x8948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_562,THost Syncpt Register 562"
group.long 0x894C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_563,THost Syncpt Register 563"
group.long 0x8950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_564,THost Syncpt Register 564"
group.long 0x8954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_565,THost Syncpt Register 565"
group.long 0x8958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_566,THost Syncpt Register 566"
group.long 0x895C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_567,THost Syncpt Register 567"
group.long 0x8960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_568,THost Syncpt Register 568"
group.long 0x8964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_569,THost Syncpt Register 569"
group.long 0x8968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_570,THost Syncpt Register 570"
group.long 0x896C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_571,THost Syncpt Register 571"
group.long 0x8970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_572,THost Syncpt Register 572"
group.long 0x8974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_573,THost Syncpt Register 573"
group.long 0x8978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_574,THost Syncpt Register 574"
group.long 0x897C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_575,THost Syncpt Register 575"
tree.end
textline "                                                           "
tree "Syncpt Interrupt Thresholds Registers"
group.long 0x8A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_0,THost Syncpt Interrupt Thresh Register 0"
group.long 0x8A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_1,THost Syncpt Interrupt Thresh Register 1"
group.long 0x8A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_2,THost Syncpt Interrupt Thresh Register 2"
group.long 0x8A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_3,THost Syncpt Interrupt Thresh Register 3"
group.long 0x8A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_4,THost Syncpt Interrupt Thresh Register 4"
group.long 0x8A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_5,THost Syncpt Interrupt Thresh Register 5"
group.long 0x8A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_6,THost Syncpt Interrupt Thresh Register 6"
group.long 0x8A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_7,THost Syncpt Interrupt Thresh Register 7"
group.long 0x8A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_8,THost Syncpt Interrupt Thresh Register 8"
group.long 0x8A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_9,THost Syncpt Interrupt Thresh Register 9"
group.long 0x8A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_10,THost Syncpt Interrupt Thresh Register 10"
group.long 0x8A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_11,THost Syncpt Interrupt Thresh Register 11"
group.long 0x8A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_12,THost Syncpt Interrupt Thresh Register 12"
group.long 0x8A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_13,THost Syncpt Interrupt Thresh Register 13"
group.long 0x8A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_14,THost Syncpt Interrupt Thresh Register 14"
group.long 0x8A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_15,THost Syncpt Interrupt Thresh Register 15"
group.long 0x8A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_16,THost Syncpt Interrupt Thresh Register 16"
group.long 0x8A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_17,THost Syncpt Interrupt Thresh Register 17"
group.long 0x8A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_18,THost Syncpt Interrupt Thresh Register 18"
group.long 0x8A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_19,THost Syncpt Interrupt Thresh Register 19"
group.long 0x8A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_20,THost Syncpt Interrupt Thresh Register 20"
group.long 0x8A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_21,THost Syncpt Interrupt Thresh Register 21"
group.long 0x8A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_22,THost Syncpt Interrupt Thresh Register 22"
group.long 0x8A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_23,THost Syncpt Interrupt Thresh Register 23"
group.long 0x8A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_24,THost Syncpt Interrupt Thresh Register 24"
group.long 0x8A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_25,THost Syncpt Interrupt Thresh Register 25"
group.long 0x8A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_26,THost Syncpt Interrupt Thresh Register 26"
group.long 0x8A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_27,THost Syncpt Interrupt Thresh Register 27"
group.long 0x8A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_28,THost Syncpt Interrupt Thresh Register 28"
group.long 0x8A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_29,THost Syncpt Interrupt Thresh Register 29"
group.long 0x8A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_30,THost Syncpt Interrupt Thresh Register 30"
group.long 0x8A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_31,THost Syncpt Interrupt Thresh Register 31"
group.long 0x8A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_32,THost Syncpt Interrupt Thresh Register 32"
group.long 0x8A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_33,THost Syncpt Interrupt Thresh Register 33"
group.long 0x8A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_34,THost Syncpt Interrupt Thresh Register 34"
group.long 0x8A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_35,THost Syncpt Interrupt Thresh Register 35"
group.long 0x8A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_36,THost Syncpt Interrupt Thresh Register 36"
group.long 0x8A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_37,THost Syncpt Interrupt Thresh Register 37"
group.long 0x8A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_38,THost Syncpt Interrupt Thresh Register 38"
group.long 0x8A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_39,THost Syncpt Interrupt Thresh Register 39"
group.long 0x8AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_40,THost Syncpt Interrupt Thresh Register 40"
group.long 0x8AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_41,THost Syncpt Interrupt Thresh Register 41"
group.long 0x8AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_42,THost Syncpt Interrupt Thresh Register 42"
group.long 0x8AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_43,THost Syncpt Interrupt Thresh Register 43"
group.long 0x8AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_44,THost Syncpt Interrupt Thresh Register 44"
group.long 0x8AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_45,THost Syncpt Interrupt Thresh Register 45"
group.long 0x8AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_46,THost Syncpt Interrupt Thresh Register 46"
group.long 0x8ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_47,THost Syncpt Interrupt Thresh Register 47"
group.long 0x8AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_48,THost Syncpt Interrupt Thresh Register 48"
group.long 0x8AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_49,THost Syncpt Interrupt Thresh Register 49"
group.long 0x8AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_50,THost Syncpt Interrupt Thresh Register 50"
group.long 0x8ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_51,THost Syncpt Interrupt Thresh Register 51"
group.long 0x8AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_52,THost Syncpt Interrupt Thresh Register 52"
group.long 0x8AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_53,THost Syncpt Interrupt Thresh Register 53"
group.long 0x8AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_54,THost Syncpt Interrupt Thresh Register 54"
group.long 0x8ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_55,THost Syncpt Interrupt Thresh Register 55"
group.long 0x8AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_56,THost Syncpt Interrupt Thresh Register 56"
group.long 0x8AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_57,THost Syncpt Interrupt Thresh Register 57"
group.long 0x8AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_58,THost Syncpt Interrupt Thresh Register 58"
group.long 0x8AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_59,THost Syncpt Interrupt Thresh Register 59"
group.long 0x8AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_60,THost Syncpt Interrupt Thresh Register 60"
group.long 0x8AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_61,THost Syncpt Interrupt Thresh Register 61"
group.long 0x8AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_62,THost Syncpt Interrupt Thresh Register 62"
group.long 0x8AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_63,THost Syncpt Interrupt Thresh Register 63"
group.long 0x8B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_64,THost Syncpt Interrupt Thresh Register 64"
group.long 0x8B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_65,THost Syncpt Interrupt Thresh Register 65"
group.long 0x8B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_66,THost Syncpt Interrupt Thresh Register 66"
group.long 0x8B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_67,THost Syncpt Interrupt Thresh Register 67"
group.long 0x8B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_68,THost Syncpt Interrupt Thresh Register 68"
group.long 0x8B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_69,THost Syncpt Interrupt Thresh Register 69"
group.long 0x8B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_70,THost Syncpt Interrupt Thresh Register 70"
group.long 0x8B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_71,THost Syncpt Interrupt Thresh Register 71"
group.long 0x8B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_72,THost Syncpt Interrupt Thresh Register 72"
group.long 0x8B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_73,THost Syncpt Interrupt Thresh Register 73"
group.long 0x8B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_74,THost Syncpt Interrupt Thresh Register 74"
group.long 0x8B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_75,THost Syncpt Interrupt Thresh Register 75"
group.long 0x8B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_76,THost Syncpt Interrupt Thresh Register 76"
group.long 0x8B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_77,THost Syncpt Interrupt Thresh Register 77"
group.long 0x8B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_78,THost Syncpt Interrupt Thresh Register 78"
group.long 0x8B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_79,THost Syncpt Interrupt Thresh Register 79"
group.long 0x8B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_80,THost Syncpt Interrupt Thresh Register 80"
group.long 0x8B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_81,THost Syncpt Interrupt Thresh Register 81"
group.long 0x8B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_82,THost Syncpt Interrupt Thresh Register 82"
group.long 0x8B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_83,THost Syncpt Interrupt Thresh Register 83"
group.long 0x8B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_84,THost Syncpt Interrupt Thresh Register 84"
group.long 0x8B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_85,THost Syncpt Interrupt Thresh Register 85"
group.long 0x8B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_86,THost Syncpt Interrupt Thresh Register 86"
group.long 0x8B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_87,THost Syncpt Interrupt Thresh Register 87"
group.long 0x8B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_88,THost Syncpt Interrupt Thresh Register 88"
group.long 0x8B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_89,THost Syncpt Interrupt Thresh Register 89"
group.long 0x8B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_90,THost Syncpt Interrupt Thresh Register 90"
group.long 0x8B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_91,THost Syncpt Interrupt Thresh Register 91"
group.long 0x8B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_92,THost Syncpt Interrupt Thresh Register 92"
group.long 0x8B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_93,THost Syncpt Interrupt Thresh Register 93"
group.long 0x8B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_94,THost Syncpt Interrupt Thresh Register 94"
group.long 0x8B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_95,THost Syncpt Interrupt Thresh Register 95"
group.long 0x8B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_96,THost Syncpt Interrupt Thresh Register 96"
group.long 0x8B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_97,THost Syncpt Interrupt Thresh Register 97"
group.long 0x8B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_98,THost Syncpt Interrupt Thresh Register 98"
group.long 0x8B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_99,THost Syncpt Interrupt Thresh Register 99"
group.long 0x8B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_100,THost Syncpt Interrupt Thresh Register 100"
group.long 0x8B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_101,THost Syncpt Interrupt Thresh Register 101"
group.long 0x8B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_102,THost Syncpt Interrupt Thresh Register 102"
group.long 0x8B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_103,THost Syncpt Interrupt Thresh Register 103"
group.long 0x8BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_104,THost Syncpt Interrupt Thresh Register 104"
group.long 0x8BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_105,THost Syncpt Interrupt Thresh Register 105"
group.long 0x8BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_106,THost Syncpt Interrupt Thresh Register 106"
group.long 0x8BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_107,THost Syncpt Interrupt Thresh Register 107"
group.long 0x8BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_108,THost Syncpt Interrupt Thresh Register 108"
group.long 0x8BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_109,THost Syncpt Interrupt Thresh Register 109"
group.long 0x8BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_110,THost Syncpt Interrupt Thresh Register 110"
group.long 0x8BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_111,THost Syncpt Interrupt Thresh Register 111"
group.long 0x8BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_112,THost Syncpt Interrupt Thresh Register 112"
group.long 0x8BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_113,THost Syncpt Interrupt Thresh Register 113"
group.long 0x8BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_114,THost Syncpt Interrupt Thresh Register 114"
group.long 0x8BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_115,THost Syncpt Interrupt Thresh Register 115"
group.long 0x8BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_116,THost Syncpt Interrupt Thresh Register 116"
group.long 0x8BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_117,THost Syncpt Interrupt Thresh Register 117"
group.long 0x8BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_118,THost Syncpt Interrupt Thresh Register 118"
group.long 0x8BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_119,THost Syncpt Interrupt Thresh Register 119"
group.long 0x8BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_120,THost Syncpt Interrupt Thresh Register 120"
group.long 0x8BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_121,THost Syncpt Interrupt Thresh Register 121"
group.long 0x8BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_122,THost Syncpt Interrupt Thresh Register 122"
group.long 0x8BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_123,THost Syncpt Interrupt Thresh Register 123"
group.long 0x8BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_124,THost Syncpt Interrupt Thresh Register 124"
group.long 0x8BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_125,THost Syncpt Interrupt Thresh Register 125"
group.long 0x8BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_126,THost Syncpt Interrupt Thresh Register 126"
group.long 0x8BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_127,THost Syncpt Interrupt Thresh Register 127"
group.long 0x8C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_128,THost Syncpt Interrupt Thresh Register 128"
group.long 0x8C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_129,THost Syncpt Interrupt Thresh Register 129"
group.long 0x8C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_130,THost Syncpt Interrupt Thresh Register 130"
group.long 0x8C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_131,THost Syncpt Interrupt Thresh Register 131"
group.long 0x8C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_132,THost Syncpt Interrupt Thresh Register 132"
group.long 0x8C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_133,THost Syncpt Interrupt Thresh Register 133"
group.long 0x8C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_134,THost Syncpt Interrupt Thresh Register 134"
group.long 0x8C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_135,THost Syncpt Interrupt Thresh Register 135"
group.long 0x8C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_136,THost Syncpt Interrupt Thresh Register 136"
group.long 0x8C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_137,THost Syncpt Interrupt Thresh Register 137"
group.long 0x8C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_138,THost Syncpt Interrupt Thresh Register 138"
group.long 0x8C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_139,THost Syncpt Interrupt Thresh Register 139"
group.long 0x8C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_140,THost Syncpt Interrupt Thresh Register 140"
group.long 0x8C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_141,THost Syncpt Interrupt Thresh Register 141"
group.long 0x8C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_142,THost Syncpt Interrupt Thresh Register 142"
group.long 0x8C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_143,THost Syncpt Interrupt Thresh Register 143"
group.long 0x8C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_144,THost Syncpt Interrupt Thresh Register 144"
group.long 0x8C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_145,THost Syncpt Interrupt Thresh Register 145"
group.long 0x8C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_146,THost Syncpt Interrupt Thresh Register 146"
group.long 0x8C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_147,THost Syncpt Interrupt Thresh Register 147"
group.long 0x8C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_148,THost Syncpt Interrupt Thresh Register 148"
group.long 0x8C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_149,THost Syncpt Interrupt Thresh Register 149"
group.long 0x8C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_150,THost Syncpt Interrupt Thresh Register 150"
group.long 0x8C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_151,THost Syncpt Interrupt Thresh Register 151"
group.long 0x8C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_152,THost Syncpt Interrupt Thresh Register 152"
group.long 0x8C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_153,THost Syncpt Interrupt Thresh Register 153"
group.long 0x8C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_154,THost Syncpt Interrupt Thresh Register 154"
group.long 0x8C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_155,THost Syncpt Interrupt Thresh Register 155"
group.long 0x8C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_156,THost Syncpt Interrupt Thresh Register 156"
group.long 0x8C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_157,THost Syncpt Interrupt Thresh Register 157"
group.long 0x8C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_158,THost Syncpt Interrupt Thresh Register 158"
group.long 0x8C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_159,THost Syncpt Interrupt Thresh Register 159"
group.long 0x8C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_160,THost Syncpt Interrupt Thresh Register 160"
group.long 0x8C84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_161,THost Syncpt Interrupt Thresh Register 161"
group.long 0x8C88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_162,THost Syncpt Interrupt Thresh Register 162"
group.long 0x8C8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_163,THost Syncpt Interrupt Thresh Register 163"
group.long 0x8C90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_164,THost Syncpt Interrupt Thresh Register 164"
group.long 0x8C94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_165,THost Syncpt Interrupt Thresh Register 165"
group.long 0x8C98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_166,THost Syncpt Interrupt Thresh Register 166"
group.long 0x8C9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_167,THost Syncpt Interrupt Thresh Register 167"
group.long 0x8CA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_168,THost Syncpt Interrupt Thresh Register 168"
group.long 0x8CA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_169,THost Syncpt Interrupt Thresh Register 169"
group.long 0x8CA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_170,THost Syncpt Interrupt Thresh Register 170"
group.long 0x8CAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_171,THost Syncpt Interrupt Thresh Register 171"
group.long 0x8CB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_172,THost Syncpt Interrupt Thresh Register 172"
group.long 0x8CB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_173,THost Syncpt Interrupt Thresh Register 173"
group.long 0x8CB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_174,THost Syncpt Interrupt Thresh Register 174"
group.long 0x8CBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_175,THost Syncpt Interrupt Thresh Register 175"
group.long 0x8CC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_176,THost Syncpt Interrupt Thresh Register 176"
group.long 0x8CC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_177,THost Syncpt Interrupt Thresh Register 177"
group.long 0x8CC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_178,THost Syncpt Interrupt Thresh Register 178"
group.long 0x8CCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_179,THost Syncpt Interrupt Thresh Register 179"
group.long 0x8CD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_180,THost Syncpt Interrupt Thresh Register 180"
group.long 0x8CD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_181,THost Syncpt Interrupt Thresh Register 181"
group.long 0x8CD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_182,THost Syncpt Interrupt Thresh Register 182"
group.long 0x8CDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_183,THost Syncpt Interrupt Thresh Register 183"
group.long 0x8CE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_184,THost Syncpt Interrupt Thresh Register 184"
group.long 0x8CE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_185,THost Syncpt Interrupt Thresh Register 185"
group.long 0x8CE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_186,THost Syncpt Interrupt Thresh Register 186"
group.long 0x8CEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_187,THost Syncpt Interrupt Thresh Register 187"
group.long 0x8CF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_188,THost Syncpt Interrupt Thresh Register 188"
group.long 0x8CF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_189,THost Syncpt Interrupt Thresh Register 189"
group.long 0x8CF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_190,THost Syncpt Interrupt Thresh Register 190"
group.long 0x8CFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_191,THost Syncpt Interrupt Thresh Register 191"
group.long 0x8D00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_192,THost Syncpt Interrupt Thresh Register 192"
group.long 0x8D04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_193,THost Syncpt Interrupt Thresh Register 193"
group.long 0x8D08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_194,THost Syncpt Interrupt Thresh Register 194"
group.long 0x8D0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_195,THost Syncpt Interrupt Thresh Register 195"
group.long 0x8D10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_196,THost Syncpt Interrupt Thresh Register 196"
group.long 0x8D14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_197,THost Syncpt Interrupt Thresh Register 197"
group.long 0x8D18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_198,THost Syncpt Interrupt Thresh Register 198"
group.long 0x8D1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_199,THost Syncpt Interrupt Thresh Register 199"
group.long 0x8D20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_200,THost Syncpt Interrupt Thresh Register 200"
group.long 0x8D24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_201,THost Syncpt Interrupt Thresh Register 201"
group.long 0x8D28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_202,THost Syncpt Interrupt Thresh Register 202"
group.long 0x8D2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_203,THost Syncpt Interrupt Thresh Register 203"
group.long 0x8D30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_204,THost Syncpt Interrupt Thresh Register 204"
group.long 0x8D34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_205,THost Syncpt Interrupt Thresh Register 205"
group.long 0x8D38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_206,THost Syncpt Interrupt Thresh Register 206"
group.long 0x8D3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_207,THost Syncpt Interrupt Thresh Register 207"
group.long 0x8D40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_208,THost Syncpt Interrupt Thresh Register 208"
group.long 0x8D44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_209,THost Syncpt Interrupt Thresh Register 209"
group.long 0x8D48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_210,THost Syncpt Interrupt Thresh Register 210"
group.long 0x8D4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_211,THost Syncpt Interrupt Thresh Register 211"
group.long 0x8D50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_212,THost Syncpt Interrupt Thresh Register 212"
group.long 0x8D54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_213,THost Syncpt Interrupt Thresh Register 213"
group.long 0x8D58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_214,THost Syncpt Interrupt Thresh Register 214"
group.long 0x8D5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_215,THost Syncpt Interrupt Thresh Register 215"
group.long 0x8D60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_216,THost Syncpt Interrupt Thresh Register 216"
group.long 0x8D64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_217,THost Syncpt Interrupt Thresh Register 217"
group.long 0x8D68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_218,THost Syncpt Interrupt Thresh Register 218"
group.long 0x8D6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_219,THost Syncpt Interrupt Thresh Register 219"
group.long 0x8D70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_220,THost Syncpt Interrupt Thresh Register 220"
group.long 0x8D74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_221,THost Syncpt Interrupt Thresh Register 221"
group.long 0x8D78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_222,THost Syncpt Interrupt Thresh Register 222"
group.long 0x8D7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_223,THost Syncpt Interrupt Thresh Register 223"
group.long 0x8D80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_224,THost Syncpt Interrupt Thresh Register 224"
group.long 0x8D84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_225,THost Syncpt Interrupt Thresh Register 225"
group.long 0x8D88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_226,THost Syncpt Interrupt Thresh Register 226"
group.long 0x8D8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_227,THost Syncpt Interrupt Thresh Register 227"
group.long 0x8D90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_228,THost Syncpt Interrupt Thresh Register 228"
group.long 0x8D94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_229,THost Syncpt Interrupt Thresh Register 229"
group.long 0x8D98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_230,THost Syncpt Interrupt Thresh Register 230"
group.long 0x8D9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_231,THost Syncpt Interrupt Thresh Register 231"
group.long 0x8DA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_232,THost Syncpt Interrupt Thresh Register 232"
group.long 0x8DA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_233,THost Syncpt Interrupt Thresh Register 233"
group.long 0x8DA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_234,THost Syncpt Interrupt Thresh Register 234"
group.long 0x8DAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_235,THost Syncpt Interrupt Thresh Register 235"
group.long 0x8DB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_236,THost Syncpt Interrupt Thresh Register 236"
group.long 0x8DB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_237,THost Syncpt Interrupt Thresh Register 237"
group.long 0x8DB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_238,THost Syncpt Interrupt Thresh Register 238"
group.long 0x8DBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_239,THost Syncpt Interrupt Thresh Register 239"
group.long 0x8DC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_240,THost Syncpt Interrupt Thresh Register 240"
group.long 0x8DC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_241,THost Syncpt Interrupt Thresh Register 241"
group.long 0x8DC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_242,THost Syncpt Interrupt Thresh Register 242"
group.long 0x8DCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_243,THost Syncpt Interrupt Thresh Register 243"
group.long 0x8DD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_244,THost Syncpt Interrupt Thresh Register 244"
group.long 0x8DD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_245,THost Syncpt Interrupt Thresh Register 245"
group.long 0x8DD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_246,THost Syncpt Interrupt Thresh Register 246"
group.long 0x8DDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_247,THost Syncpt Interrupt Thresh Register 247"
group.long 0x8DE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_248,THost Syncpt Interrupt Thresh Register 248"
group.long 0x8DE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_249,THost Syncpt Interrupt Thresh Register 249"
group.long 0x8DE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_250,THost Syncpt Interrupt Thresh Register 250"
group.long 0x8DEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_251,THost Syncpt Interrupt Thresh Register 251"
group.long 0x8DF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_252,THost Syncpt Interrupt Thresh Register 252"
group.long 0x8DF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_253,THost Syncpt Interrupt Thresh Register 253"
group.long 0x8DF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_254,THost Syncpt Interrupt Thresh Register 254"
group.long 0x8DFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_255,THost Syncpt Interrupt Thresh Register 255"
group.long 0x8E00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_256,THost Syncpt Interrupt Thresh Register 256"
group.long 0x8E04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_257,THost Syncpt Interrupt Thresh Register 257"
group.long 0x8E08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_258,THost Syncpt Interrupt Thresh Register 258"
group.long 0x8E0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_259,THost Syncpt Interrupt Thresh Register 259"
group.long 0x8E10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_260,THost Syncpt Interrupt Thresh Register 260"
group.long 0x8E14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_261,THost Syncpt Interrupt Thresh Register 261"
group.long 0x8E18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_262,THost Syncpt Interrupt Thresh Register 262"
group.long 0x8E1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_263,THost Syncpt Interrupt Thresh Register 263"
group.long 0x8E20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_264,THost Syncpt Interrupt Thresh Register 264"
group.long 0x8E24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_265,THost Syncpt Interrupt Thresh Register 265"
group.long 0x8E28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_266,THost Syncpt Interrupt Thresh Register 266"
group.long 0x8E2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_267,THost Syncpt Interrupt Thresh Register 267"
group.long 0x8E30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_268,THost Syncpt Interrupt Thresh Register 268"
group.long 0x8E34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_269,THost Syncpt Interrupt Thresh Register 269"
group.long 0x8E38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_270,THost Syncpt Interrupt Thresh Register 270"
group.long 0x8E3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_271,THost Syncpt Interrupt Thresh Register 271"
group.long 0x8E40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_272,THost Syncpt Interrupt Thresh Register 272"
group.long 0x8E44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_273,THost Syncpt Interrupt Thresh Register 273"
group.long 0x8E48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_274,THost Syncpt Interrupt Thresh Register 274"
group.long 0x8E4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_275,THost Syncpt Interrupt Thresh Register 275"
group.long 0x8E50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_276,THost Syncpt Interrupt Thresh Register 276"
group.long 0x8E54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_277,THost Syncpt Interrupt Thresh Register 277"
group.long 0x8E58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_278,THost Syncpt Interrupt Thresh Register 278"
group.long 0x8E5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_279,THost Syncpt Interrupt Thresh Register 279"
group.long 0x8E60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_280,THost Syncpt Interrupt Thresh Register 280"
group.long 0x8E64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_281,THost Syncpt Interrupt Thresh Register 281"
group.long 0x8E68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_282,THost Syncpt Interrupt Thresh Register 282"
group.long 0x8E6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_283,THost Syncpt Interrupt Thresh Register 283"
group.long 0x8E70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_284,THost Syncpt Interrupt Thresh Register 284"
group.long 0x8E74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_285,THost Syncpt Interrupt Thresh Register 285"
group.long 0x8E78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_286,THost Syncpt Interrupt Thresh Register 286"
group.long 0x8E7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_287,THost Syncpt Interrupt Thresh Register 287"
group.long 0x8E80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_288,THost Syncpt Interrupt Thresh Register 288"
group.long 0x8E84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_289,THost Syncpt Interrupt Thresh Register 289"
group.long 0x8E88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_290,THost Syncpt Interrupt Thresh Register 290"
group.long 0x8E8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_291,THost Syncpt Interrupt Thresh Register 291"
group.long 0x8E90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_292,THost Syncpt Interrupt Thresh Register 292"
group.long 0x8E94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_293,THost Syncpt Interrupt Thresh Register 293"
group.long 0x8E98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_294,THost Syncpt Interrupt Thresh Register 294"
group.long 0x8E9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_295,THost Syncpt Interrupt Thresh Register 295"
group.long 0x8EA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_296,THost Syncpt Interrupt Thresh Register 296"
group.long 0x8EA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_297,THost Syncpt Interrupt Thresh Register 297"
group.long 0x8EA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_298,THost Syncpt Interrupt Thresh Register 298"
group.long 0x8EAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_299,THost Syncpt Interrupt Thresh Register 299"
group.long 0x8EB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_300,THost Syncpt Interrupt Thresh Register 300"
group.long 0x8EB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_301,THost Syncpt Interrupt Thresh Register 301"
group.long 0x8EB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_302,THost Syncpt Interrupt Thresh Register 302"
group.long 0x8EBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_303,THost Syncpt Interrupt Thresh Register 303"
group.long 0x8EC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_304,THost Syncpt Interrupt Thresh Register 304"
group.long 0x8EC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_305,THost Syncpt Interrupt Thresh Register 305"
group.long 0x8EC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_306,THost Syncpt Interrupt Thresh Register 306"
group.long 0x8ECC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_307,THost Syncpt Interrupt Thresh Register 307"
group.long 0x8ED0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_308,THost Syncpt Interrupt Thresh Register 308"
group.long 0x8ED4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_309,THost Syncpt Interrupt Thresh Register 309"
group.long 0x8ED8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_310,THost Syncpt Interrupt Thresh Register 310"
group.long 0x8EDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_311,THost Syncpt Interrupt Thresh Register 311"
group.long 0x8EE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_312,THost Syncpt Interrupt Thresh Register 312"
group.long 0x8EE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_313,THost Syncpt Interrupt Thresh Register 313"
group.long 0x8EE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_314,THost Syncpt Interrupt Thresh Register 314"
group.long 0x8EEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_315,THost Syncpt Interrupt Thresh Register 315"
group.long 0x8EF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_316,THost Syncpt Interrupt Thresh Register 316"
group.long 0x8EF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_317,THost Syncpt Interrupt Thresh Register 317"
group.long 0x8EF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_318,THost Syncpt Interrupt Thresh Register 318"
group.long 0x8EFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_319,THost Syncpt Interrupt Thresh Register 319"
group.long 0x8F00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_320,THost Syncpt Interrupt Thresh Register 320"
group.long 0x8F04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_321,THost Syncpt Interrupt Thresh Register 321"
group.long 0x8F08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_322,THost Syncpt Interrupt Thresh Register 322"
group.long 0x8F0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_323,THost Syncpt Interrupt Thresh Register 323"
group.long 0x8F10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_324,THost Syncpt Interrupt Thresh Register 324"
group.long 0x8F14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_325,THost Syncpt Interrupt Thresh Register 325"
group.long 0x8F18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_326,THost Syncpt Interrupt Thresh Register 326"
group.long 0x8F1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_327,THost Syncpt Interrupt Thresh Register 327"
group.long 0x8F20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_328,THost Syncpt Interrupt Thresh Register 328"
group.long 0x8F24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_329,THost Syncpt Interrupt Thresh Register 329"
group.long 0x8F28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_330,THost Syncpt Interrupt Thresh Register 330"
group.long 0x8F2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_331,THost Syncpt Interrupt Thresh Register 331"
group.long 0x8F30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_332,THost Syncpt Interrupt Thresh Register 332"
group.long 0x8F34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_333,THost Syncpt Interrupt Thresh Register 333"
group.long 0x8F38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_334,THost Syncpt Interrupt Thresh Register 334"
group.long 0x8F3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_335,THost Syncpt Interrupt Thresh Register 335"
group.long 0x8F40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_336,THost Syncpt Interrupt Thresh Register 336"
group.long 0x8F44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_337,THost Syncpt Interrupt Thresh Register 337"
group.long 0x8F48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_338,THost Syncpt Interrupt Thresh Register 338"
group.long 0x8F4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_339,THost Syncpt Interrupt Thresh Register 339"
group.long 0x8F50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_340,THost Syncpt Interrupt Thresh Register 340"
group.long 0x8F54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_341,THost Syncpt Interrupt Thresh Register 341"
group.long 0x8F58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_342,THost Syncpt Interrupt Thresh Register 342"
group.long 0x8F5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_343,THost Syncpt Interrupt Thresh Register 343"
group.long 0x8F60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_344,THost Syncpt Interrupt Thresh Register 344"
group.long 0x8F64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_345,THost Syncpt Interrupt Thresh Register 345"
group.long 0x8F68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_346,THost Syncpt Interrupt Thresh Register 346"
group.long 0x8F6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_347,THost Syncpt Interrupt Thresh Register 347"
group.long 0x8F70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_348,THost Syncpt Interrupt Thresh Register 348"
group.long 0x8F74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_349,THost Syncpt Interrupt Thresh Register 349"
group.long 0x8F78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_350,THost Syncpt Interrupt Thresh Register 350"
group.long 0x8F7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_351,THost Syncpt Interrupt Thresh Register 351"
group.long 0x8F80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_352,THost Syncpt Interrupt Thresh Register 352"
group.long 0x8F84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_353,THost Syncpt Interrupt Thresh Register 353"
group.long 0x8F88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_354,THost Syncpt Interrupt Thresh Register 354"
group.long 0x8F8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_355,THost Syncpt Interrupt Thresh Register 355"
group.long 0x8F90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_356,THost Syncpt Interrupt Thresh Register 356"
group.long 0x8F94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_357,THost Syncpt Interrupt Thresh Register 357"
group.long 0x8F98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_358,THost Syncpt Interrupt Thresh Register 358"
group.long 0x8F9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_359,THost Syncpt Interrupt Thresh Register 359"
group.long 0x8FA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_360,THost Syncpt Interrupt Thresh Register 360"
group.long 0x8FA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_361,THost Syncpt Interrupt Thresh Register 361"
group.long 0x8FA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_362,THost Syncpt Interrupt Thresh Register 362"
group.long 0x8FAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_363,THost Syncpt Interrupt Thresh Register 363"
group.long 0x8FB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_364,THost Syncpt Interrupt Thresh Register 364"
group.long 0x8FB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_365,THost Syncpt Interrupt Thresh Register 365"
group.long 0x8FB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_366,THost Syncpt Interrupt Thresh Register 366"
group.long 0x8FBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_367,THost Syncpt Interrupt Thresh Register 367"
group.long 0x8FC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_368,THost Syncpt Interrupt Thresh Register 368"
group.long 0x8FC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_369,THost Syncpt Interrupt Thresh Register 369"
group.long 0x8FC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_370,THost Syncpt Interrupt Thresh Register 370"
group.long 0x8FCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_371,THost Syncpt Interrupt Thresh Register 371"
group.long 0x8FD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_372,THost Syncpt Interrupt Thresh Register 372"
group.long 0x8FD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_373,THost Syncpt Interrupt Thresh Register 373"
group.long 0x8FD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_374,THost Syncpt Interrupt Thresh Register 374"
group.long 0x8FDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_375,THost Syncpt Interrupt Thresh Register 375"
group.long 0x8FE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_376,THost Syncpt Interrupt Thresh Register 376"
group.long 0x8FE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_377,THost Syncpt Interrupt Thresh Register 377"
group.long 0x8FE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_378,THost Syncpt Interrupt Thresh Register 378"
group.long 0x8FEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_379,THost Syncpt Interrupt Thresh Register 379"
group.long 0x8FF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_380,THost Syncpt Interrupt Thresh Register 380"
group.long 0x8FF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_381,THost Syncpt Interrupt Thresh Register 381"
group.long 0x8FF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_382,THost Syncpt Interrupt Thresh Register 382"
group.long 0x8FFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_383,THost Syncpt Interrupt Thresh Register 383"
group.long 0x9000++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_384,THost Syncpt Interrupt Thresh Register 384"
group.long 0x9004++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_385,THost Syncpt Interrupt Thresh Register 385"
group.long 0x9008++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_386,THost Syncpt Interrupt Thresh Register 386"
group.long 0x900C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_387,THost Syncpt Interrupt Thresh Register 387"
group.long 0x9010++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_388,THost Syncpt Interrupt Thresh Register 388"
group.long 0x9014++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_389,THost Syncpt Interrupt Thresh Register 389"
group.long 0x9018++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_390,THost Syncpt Interrupt Thresh Register 390"
group.long 0x901C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_391,THost Syncpt Interrupt Thresh Register 391"
group.long 0x9020++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_392,THost Syncpt Interrupt Thresh Register 392"
group.long 0x9024++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_393,THost Syncpt Interrupt Thresh Register 393"
group.long 0x9028++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_394,THost Syncpt Interrupt Thresh Register 394"
group.long 0x902C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_395,THost Syncpt Interrupt Thresh Register 395"
group.long 0x9030++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_396,THost Syncpt Interrupt Thresh Register 396"
group.long 0x9034++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_397,THost Syncpt Interrupt Thresh Register 397"
group.long 0x9038++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_398,THost Syncpt Interrupt Thresh Register 398"
group.long 0x903C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_399,THost Syncpt Interrupt Thresh Register 399"
group.long 0x9040++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_400,THost Syncpt Interrupt Thresh Register 400"
group.long 0x9044++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_401,THost Syncpt Interrupt Thresh Register 401"
group.long 0x9048++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_402,THost Syncpt Interrupt Thresh Register 402"
group.long 0x904C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_403,THost Syncpt Interrupt Thresh Register 403"
group.long 0x9050++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_404,THost Syncpt Interrupt Thresh Register 404"
group.long 0x9054++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_405,THost Syncpt Interrupt Thresh Register 405"
group.long 0x9058++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_406,THost Syncpt Interrupt Thresh Register 406"
group.long 0x905C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_407,THost Syncpt Interrupt Thresh Register 407"
group.long 0x9060++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_408,THost Syncpt Interrupt Thresh Register 408"
group.long 0x9064++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_409,THost Syncpt Interrupt Thresh Register 409"
group.long 0x9068++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_410,THost Syncpt Interrupt Thresh Register 410"
group.long 0x906C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_411,THost Syncpt Interrupt Thresh Register 411"
group.long 0x9070++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_412,THost Syncpt Interrupt Thresh Register 412"
group.long 0x9074++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_413,THost Syncpt Interrupt Thresh Register 413"
group.long 0x9078++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_414,THost Syncpt Interrupt Thresh Register 414"
group.long 0x907C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_415,THost Syncpt Interrupt Thresh Register 415"
group.long 0x9080++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_416,THost Syncpt Interrupt Thresh Register 416"
group.long 0x9084++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_417,THost Syncpt Interrupt Thresh Register 417"
group.long 0x9088++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_418,THost Syncpt Interrupt Thresh Register 418"
group.long 0x908C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_419,THost Syncpt Interrupt Thresh Register 419"
group.long 0x9090++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_420,THost Syncpt Interrupt Thresh Register 420"
group.long 0x9094++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_421,THost Syncpt Interrupt Thresh Register 421"
group.long 0x9098++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_422,THost Syncpt Interrupt Thresh Register 422"
group.long 0x909C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_423,THost Syncpt Interrupt Thresh Register 423"
group.long 0x90A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_424,THost Syncpt Interrupt Thresh Register 424"
group.long 0x90A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_425,THost Syncpt Interrupt Thresh Register 425"
group.long 0x90A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_426,THost Syncpt Interrupt Thresh Register 426"
group.long 0x90AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_427,THost Syncpt Interrupt Thresh Register 427"
group.long 0x90B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_428,THost Syncpt Interrupt Thresh Register 428"
group.long 0x90B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_429,THost Syncpt Interrupt Thresh Register 429"
group.long 0x90B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_430,THost Syncpt Interrupt Thresh Register 430"
group.long 0x90BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_431,THost Syncpt Interrupt Thresh Register 431"
group.long 0x90C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_432,THost Syncpt Interrupt Thresh Register 432"
group.long 0x90C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_433,THost Syncpt Interrupt Thresh Register 433"
group.long 0x90C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_434,THost Syncpt Interrupt Thresh Register 434"
group.long 0x90CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_435,THost Syncpt Interrupt Thresh Register 435"
group.long 0x90D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_436,THost Syncpt Interrupt Thresh Register 436"
group.long 0x90D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_437,THost Syncpt Interrupt Thresh Register 437"
group.long 0x90D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_438,THost Syncpt Interrupt Thresh Register 438"
group.long 0x90DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_439,THost Syncpt Interrupt Thresh Register 439"
group.long 0x90E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_440,THost Syncpt Interrupt Thresh Register 440"
group.long 0x90E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_441,THost Syncpt Interrupt Thresh Register 441"
group.long 0x90E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_442,THost Syncpt Interrupt Thresh Register 442"
group.long 0x90EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_443,THost Syncpt Interrupt Thresh Register 443"
group.long 0x90F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_444,THost Syncpt Interrupt Thresh Register 444"
group.long 0x90F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_445,THost Syncpt Interrupt Thresh Register 445"
group.long 0x90F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_446,THost Syncpt Interrupt Thresh Register 446"
group.long 0x90FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_447,THost Syncpt Interrupt Thresh Register 447"
group.long 0x9100++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_448,THost Syncpt Interrupt Thresh Register 448"
group.long 0x9104++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_449,THost Syncpt Interrupt Thresh Register 449"
group.long 0x9108++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_450,THost Syncpt Interrupt Thresh Register 450"
group.long 0x910C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_451,THost Syncpt Interrupt Thresh Register 451"
group.long 0x9110++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_452,THost Syncpt Interrupt Thresh Register 452"
group.long 0x9114++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_453,THost Syncpt Interrupt Thresh Register 453"
group.long 0x9118++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_454,THost Syncpt Interrupt Thresh Register 454"
group.long 0x911C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_455,THost Syncpt Interrupt Thresh Register 455"
group.long 0x9120++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_456,THost Syncpt Interrupt Thresh Register 456"
group.long 0x9124++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_457,THost Syncpt Interrupt Thresh Register 457"
group.long 0x9128++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_458,THost Syncpt Interrupt Thresh Register 458"
group.long 0x912C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_459,THost Syncpt Interrupt Thresh Register 459"
group.long 0x9130++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_460,THost Syncpt Interrupt Thresh Register 460"
group.long 0x9134++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_461,THost Syncpt Interrupt Thresh Register 461"
group.long 0x9138++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_462,THost Syncpt Interrupt Thresh Register 462"
group.long 0x913C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_463,THost Syncpt Interrupt Thresh Register 463"
group.long 0x9140++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_464,THost Syncpt Interrupt Thresh Register 464"
group.long 0x9144++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_465,THost Syncpt Interrupt Thresh Register 465"
group.long 0x9148++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_466,THost Syncpt Interrupt Thresh Register 466"
group.long 0x914C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_467,THost Syncpt Interrupt Thresh Register 467"
group.long 0x9150++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_468,THost Syncpt Interrupt Thresh Register 468"
group.long 0x9154++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_469,THost Syncpt Interrupt Thresh Register 469"
group.long 0x9158++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_470,THost Syncpt Interrupt Thresh Register 470"
group.long 0x915C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_471,THost Syncpt Interrupt Thresh Register 471"
group.long 0x9160++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_472,THost Syncpt Interrupt Thresh Register 472"
group.long 0x9164++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_473,THost Syncpt Interrupt Thresh Register 473"
group.long 0x9168++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_474,THost Syncpt Interrupt Thresh Register 474"
group.long 0x916C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_475,THost Syncpt Interrupt Thresh Register 475"
group.long 0x9170++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_476,THost Syncpt Interrupt Thresh Register 476"
group.long 0x9174++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_477,THost Syncpt Interrupt Thresh Register 477"
group.long 0x9178++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_478,THost Syncpt Interrupt Thresh Register 478"
group.long 0x917C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_479,THost Syncpt Interrupt Thresh Register 479"
group.long 0x9180++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_480,THost Syncpt Interrupt Thresh Register 480"
group.long 0x9184++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_481,THost Syncpt Interrupt Thresh Register 481"
group.long 0x9188++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_482,THost Syncpt Interrupt Thresh Register 482"
group.long 0x918C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_483,THost Syncpt Interrupt Thresh Register 483"
group.long 0x9190++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_484,THost Syncpt Interrupt Thresh Register 484"
group.long 0x9194++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_485,THost Syncpt Interrupt Thresh Register 485"
group.long 0x9198++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_486,THost Syncpt Interrupt Thresh Register 486"
group.long 0x919C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_487,THost Syncpt Interrupt Thresh Register 487"
group.long 0x91A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_488,THost Syncpt Interrupt Thresh Register 488"
group.long 0x91A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_489,THost Syncpt Interrupt Thresh Register 489"
group.long 0x91A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_490,THost Syncpt Interrupt Thresh Register 490"
group.long 0x91AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_491,THost Syncpt Interrupt Thresh Register 491"
group.long 0x91B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_492,THost Syncpt Interrupt Thresh Register 492"
group.long 0x91B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_493,THost Syncpt Interrupt Thresh Register 493"
group.long 0x91B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_494,THost Syncpt Interrupt Thresh Register 494"
group.long 0x91BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_495,THost Syncpt Interrupt Thresh Register 495"
group.long 0x91C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_496,THost Syncpt Interrupt Thresh Register 496"
group.long 0x91C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_497,THost Syncpt Interrupt Thresh Register 497"
group.long 0x91C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_498,THost Syncpt Interrupt Thresh Register 498"
group.long 0x91CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_499,THost Syncpt Interrupt Thresh Register 499"
group.long 0x91D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_500,THost Syncpt Interrupt Thresh Register 500"
group.long 0x91D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_501,THost Syncpt Interrupt Thresh Register 501"
group.long 0x91D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_502,THost Syncpt Interrupt Thresh Register 502"
group.long 0x91DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_503,THost Syncpt Interrupt Thresh Register 503"
group.long 0x91E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_504,THost Syncpt Interrupt Thresh Register 504"
group.long 0x91E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_505,THost Syncpt Interrupt Thresh Register 505"
group.long 0x91E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_506,THost Syncpt Interrupt Thresh Register 506"
group.long 0x91EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_507,THost Syncpt Interrupt Thresh Register 507"
group.long 0x91F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_508,THost Syncpt Interrupt Thresh Register 508"
group.long 0x91F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_509,THost Syncpt Interrupt Thresh Register 509"
group.long 0x91F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_510,THost Syncpt Interrupt Thresh Register 510"
group.long 0x91FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_511,THost Syncpt Interrupt Thresh Register 511"
group.long 0x9200++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_512,THost Syncpt Interrupt Thresh Register 512"
group.long 0x9204++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_513,THost Syncpt Interrupt Thresh Register 513"
group.long 0x9208++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_514,THost Syncpt Interrupt Thresh Register 514"
group.long 0x920C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_515,THost Syncpt Interrupt Thresh Register 515"
group.long 0x9210++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_516,THost Syncpt Interrupt Thresh Register 516"
group.long 0x9214++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_517,THost Syncpt Interrupt Thresh Register 517"
group.long 0x9218++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_518,THost Syncpt Interrupt Thresh Register 518"
group.long 0x921C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_519,THost Syncpt Interrupt Thresh Register 519"
group.long 0x9220++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_520,THost Syncpt Interrupt Thresh Register 520"
group.long 0x9224++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_521,THost Syncpt Interrupt Thresh Register 521"
group.long 0x9228++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_522,THost Syncpt Interrupt Thresh Register 522"
group.long 0x922C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_523,THost Syncpt Interrupt Thresh Register 523"
group.long 0x9230++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_524,THost Syncpt Interrupt Thresh Register 524"
group.long 0x9234++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_525,THost Syncpt Interrupt Thresh Register 525"
group.long 0x9238++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_526,THost Syncpt Interrupt Thresh Register 526"
group.long 0x923C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_527,THost Syncpt Interrupt Thresh Register 527"
group.long 0x9240++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_528,THost Syncpt Interrupt Thresh Register 528"
group.long 0x9244++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_529,THost Syncpt Interrupt Thresh Register 529"
group.long 0x9248++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_530,THost Syncpt Interrupt Thresh Register 530"
group.long 0x924C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_531,THost Syncpt Interrupt Thresh Register 531"
group.long 0x9250++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_532,THost Syncpt Interrupt Thresh Register 532"
group.long 0x9254++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_533,THost Syncpt Interrupt Thresh Register 533"
group.long 0x9258++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_534,THost Syncpt Interrupt Thresh Register 534"
group.long 0x925C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_535,THost Syncpt Interrupt Thresh Register 535"
group.long 0x9260++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_536,THost Syncpt Interrupt Thresh Register 536"
group.long 0x9264++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_537,THost Syncpt Interrupt Thresh Register 537"
group.long 0x9268++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_538,THost Syncpt Interrupt Thresh Register 538"
group.long 0x926C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_539,THost Syncpt Interrupt Thresh Register 539"
group.long 0x9270++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_540,THost Syncpt Interrupt Thresh Register 540"
group.long 0x9274++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_541,THost Syncpt Interrupt Thresh Register 541"
group.long 0x9278++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_542,THost Syncpt Interrupt Thresh Register 542"
group.long 0x927C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_543,THost Syncpt Interrupt Thresh Register 543"
group.long 0x9280++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_544,THost Syncpt Interrupt Thresh Register 544"
group.long 0x9284++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_545,THost Syncpt Interrupt Thresh Register 545"
group.long 0x9288++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_546,THost Syncpt Interrupt Thresh Register 546"
group.long 0x928C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_547,THost Syncpt Interrupt Thresh Register 547"
group.long 0x9290++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_548,THost Syncpt Interrupt Thresh Register 548"
group.long 0x9294++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_549,THost Syncpt Interrupt Thresh Register 549"
group.long 0x9298++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_550,THost Syncpt Interrupt Thresh Register 550"
group.long 0x929C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_551,THost Syncpt Interrupt Thresh Register 551"
group.long 0x92A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_552,THost Syncpt Interrupt Thresh Register 552"
group.long 0x92A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_553,THost Syncpt Interrupt Thresh Register 553"
group.long 0x92A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_554,THost Syncpt Interrupt Thresh Register 554"
group.long 0x92AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_555,THost Syncpt Interrupt Thresh Register 555"
group.long 0x92B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_556,THost Syncpt Interrupt Thresh Register 556"
group.long 0x92B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_557,THost Syncpt Interrupt Thresh Register 557"
group.long 0x92B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_558,THost Syncpt Interrupt Thresh Register 558"
group.long 0x92BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_559,THost Syncpt Interrupt Thresh Register 559"
group.long 0x92C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_560,THost Syncpt Interrupt Thresh Register 560"
group.long 0x92C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_561,THost Syncpt Interrupt Thresh Register 561"
group.long 0x92C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_562,THost Syncpt Interrupt Thresh Register 562"
group.long 0x92CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_563,THost Syncpt Interrupt Thresh Register 563"
group.long 0x92D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_564,THost Syncpt Interrupt Thresh Register 564"
group.long 0x92D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_565,THost Syncpt Interrupt Thresh Register 565"
group.long 0x92D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_566,THost Syncpt Interrupt Thresh Register 566"
group.long 0x92DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_567,THost Syncpt Interrupt Thresh Register 567"
group.long 0x92E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_568,THost Syncpt Interrupt Thresh Register 568"
group.long 0x92E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_569,THost Syncpt Interrupt Thresh Register 569"
group.long 0x92E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_570,THost Syncpt Interrupt Thresh Register 570"
group.long 0x92EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_571,THost Syncpt Interrupt Thresh Register 571"
group.long 0x92F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_572,THost Syncpt Interrupt Thresh Register 572"
group.long 0x92F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_573,THost Syncpt Interrupt Thresh Register 573"
group.long 0x92F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_574,THost Syncpt Interrupt Thresh Register 574"
group.long 0x92FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_INTR_THRESH_575,THost Syncpt Interrupt Thresh Register 575"
tree.end
textline "                                                           "
tree "Syncpt Spare Registers"
group.long 0x9384++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_0,THost Syncpt Channel/APP register 0"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9388++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_1,THost Syncpt Channel/APP register 1"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x938C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_2,THost Syncpt Channel/APP register 2"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9390++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_3,THost Syncpt Channel/APP register 3"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9394++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_4,THost Syncpt Channel/APP register 4"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9398++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_5,THost Syncpt Channel/APP register 5"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x939C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_6,THost Syncpt Channel/APP register 6"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_7,THost Syncpt Channel/APP register 7"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_8,THost Syncpt Channel/APP register 8"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_9,THost Syncpt Channel/APP register 9"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_10,THost Syncpt Channel/APP register 10"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_11,THost Syncpt Channel/APP register 11"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_12,THost Syncpt Channel/APP register 12"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_13,THost Syncpt Channel/APP register 13"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_14,THost Syncpt Channel/APP register 14"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_15,THost Syncpt Channel/APP register 15"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_16,THost Syncpt Channel/APP register 16"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_17,THost Syncpt Channel/APP register 17"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_18,THost Syncpt Channel/APP register 18"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_19,THost Syncpt Channel/APP register 19"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_20,THost Syncpt Channel/APP register 20"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_21,THost Syncpt Channel/APP register 21"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_22,THost Syncpt Channel/APP register 22"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_23,THost Syncpt Channel/APP register 23"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_24,THost Syncpt Channel/APP register 24"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_25,THost Syncpt Channel/APP register 25"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_26,THost Syncpt Channel/APP register 26"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_27,THost Syncpt Channel/APP register 27"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_28,THost Syncpt Channel/APP register 28"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_29,THost Syncpt Channel/APP register 29"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x93FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_30,THost Syncpt Channel/APP register 30"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9400++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_31,THost Syncpt Channel/APP register 31"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9404++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_32,THost Syncpt Channel/APP register 32"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9408++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_33,THost Syncpt Channel/APP register 33"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x940C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_34,THost Syncpt Channel/APP register 34"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9410++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_35,THost Syncpt Channel/APP register 35"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9414++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_36,THost Syncpt Channel/APP register 36"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9418++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_37,THost Syncpt Channel/APP register 37"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x941C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_38,THost Syncpt Channel/APP register 38"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9420++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_39,THost Syncpt Channel/APP register 39"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9424++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_40,THost Syncpt Channel/APP register 40"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9428++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_41,THost Syncpt Channel/APP register 41"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x942C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_42,THost Syncpt Channel/APP register 42"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9430++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_43,THost Syncpt Channel/APP register 43"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9434++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_44,THost Syncpt Channel/APP register 44"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9438++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_45,THost Syncpt Channel/APP register 45"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x943C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_46,THost Syncpt Channel/APP register 46"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9440++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_47,THost Syncpt Channel/APP register 47"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9444++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_48,THost Syncpt Channel/APP register 48"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9448++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_49,THost Syncpt Channel/APP register 49"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x944C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_50,THost Syncpt Channel/APP register 50"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9450++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_51,THost Syncpt Channel/APP register 51"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9454++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_52,THost Syncpt Channel/APP register 52"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9458++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_53,THost Syncpt Channel/APP register 53"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x945C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_54,THost Syncpt Channel/APP register 54"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9460++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_55,THost Syncpt Channel/APP register 55"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9464++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_56,THost Syncpt Channel/APP register 56"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9468++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_57,THost Syncpt Channel/APP register 57"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x946C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_58,THost Syncpt Channel/APP register 58"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9470++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_59,THost Syncpt Channel/APP register 59"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9474++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_60,THost Syncpt Channel/APP register 60"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9478++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_61,THost Syncpt Channel/APP register 61"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x947C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_62,THost Syncpt Channel/APP register 62"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9480++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_63,THost Syncpt Channel/APP register 63"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9484++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_64,THost Syncpt Channel/APP register 64"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9488++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_65,THost Syncpt Channel/APP register 65"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x948C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_66,THost Syncpt Channel/APP register 66"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9490++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_67,THost Syncpt Channel/APP register 67"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9494++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_68,THost Syncpt Channel/APP register 68"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9498++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_69,THost Syncpt Channel/APP register 69"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x949C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_70,THost Syncpt Channel/APP register 70"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_71,THost Syncpt Channel/APP register 71"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_72,THost Syncpt Channel/APP register 72"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_73,THost Syncpt Channel/APP register 73"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_74,THost Syncpt Channel/APP register 74"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_75,THost Syncpt Channel/APP register 75"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_76,THost Syncpt Channel/APP register 76"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_77,THost Syncpt Channel/APP register 77"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_78,THost Syncpt Channel/APP register 78"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_79,THost Syncpt Channel/APP register 79"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_80,THost Syncpt Channel/APP register 80"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_81,THost Syncpt Channel/APP register 81"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_82,THost Syncpt Channel/APP register 82"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_83,THost Syncpt Channel/APP register 83"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_84,THost Syncpt Channel/APP register 84"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_85,THost Syncpt Channel/APP register 85"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_86,THost Syncpt Channel/APP register 86"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_87,THost Syncpt Channel/APP register 87"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_88,THost Syncpt Channel/APP register 88"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_89,THost Syncpt Channel/APP register 89"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_90,THost Syncpt Channel/APP register 90"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_91,THost Syncpt Channel/APP register 91"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_92,THost Syncpt Channel/APP register 92"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_93,THost Syncpt Channel/APP register 93"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x94FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_94,THost Syncpt Channel/APP register 94"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9500++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_95,THost Syncpt Channel/APP register 95"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9504++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_96,THost Syncpt Channel/APP register 96"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9508++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_97,THost Syncpt Channel/APP register 97"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x950C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_98,THost Syncpt Channel/APP register 98"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9510++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_99,THost Syncpt Channel/APP register 99"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9514++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_100,THost Syncpt Channel/APP register 100"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9518++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_101,THost Syncpt Channel/APP register 101"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x951C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_102,THost Syncpt Channel/APP register 102"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9520++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_103,THost Syncpt Channel/APP register 103"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9524++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_104,THost Syncpt Channel/APP register 104"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9528++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_105,THost Syncpt Channel/APP register 105"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x952C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_106,THost Syncpt Channel/APP register 106"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9530++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_107,THost Syncpt Channel/APP register 107"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9534++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_108,THost Syncpt Channel/APP register 108"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9538++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_109,THost Syncpt Channel/APP register 109"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x953C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_110,THost Syncpt Channel/APP register 110"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9540++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_111,THost Syncpt Channel/APP register 111"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9544++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_112,THost Syncpt Channel/APP register 112"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9548++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_113,THost Syncpt Channel/APP register 113"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x954C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_114,THost Syncpt Channel/APP register 114"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9550++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_115,THost Syncpt Channel/APP register 115"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9554++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_116,THost Syncpt Channel/APP register 116"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9558++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_117,THost Syncpt Channel/APP register 117"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x955C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_118,THost Syncpt Channel/APP register 118"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9560++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_119,THost Syncpt Channel/APP register 119"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9564++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_120,THost Syncpt Channel/APP register 120"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9568++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_121,THost Syncpt Channel/APP register 121"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x956C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_122,THost Syncpt Channel/APP register 122"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9570++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_123,THost Syncpt Channel/APP register 123"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9574++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_124,THost Syncpt Channel/APP register 124"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9578++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_125,THost Syncpt Channel/APP register 125"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x957C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_126,THost Syncpt Channel/APP register 126"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9580++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_127,THost Syncpt Channel/APP register 127"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9584++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_128,THost Syncpt Channel/APP register 128"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9588++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_129,THost Syncpt Channel/APP register 129"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x958C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_130,THost Syncpt Channel/APP register 130"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9590++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_131,THost Syncpt Channel/APP register 131"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9594++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_132,THost Syncpt Channel/APP register 132"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9598++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_133,THost Syncpt Channel/APP register 133"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x959C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_134,THost Syncpt Channel/APP register 134"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_135,THost Syncpt Channel/APP register 135"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_136,THost Syncpt Channel/APP register 136"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_137,THost Syncpt Channel/APP register 137"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_138,THost Syncpt Channel/APP register 138"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_139,THost Syncpt Channel/APP register 139"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_140,THost Syncpt Channel/APP register 140"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_141,THost Syncpt Channel/APP register 141"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_142,THost Syncpt Channel/APP register 142"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_143,THost Syncpt Channel/APP register 143"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_144,THost Syncpt Channel/APP register 144"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_145,THost Syncpt Channel/APP register 145"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_146,THost Syncpt Channel/APP register 146"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_147,THost Syncpt Channel/APP register 147"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_148,THost Syncpt Channel/APP register 148"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_149,THost Syncpt Channel/APP register 149"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_150,THost Syncpt Channel/APP register 150"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_151,THost Syncpt Channel/APP register 151"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_152,THost Syncpt Channel/APP register 152"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_153,THost Syncpt Channel/APP register 153"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_154,THost Syncpt Channel/APP register 154"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_155,THost Syncpt Channel/APP register 155"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_156,THost Syncpt Channel/APP register 156"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_157,THost Syncpt Channel/APP register 157"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x95FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_158,THost Syncpt Channel/APP register 158"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9600++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_159,THost Syncpt Channel/APP register 159"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9604++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_160,THost Syncpt Channel/APP register 160"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9608++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_161,THost Syncpt Channel/APP register 161"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x960C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_162,THost Syncpt Channel/APP register 162"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9610++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_163,THost Syncpt Channel/APP register 163"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9614++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_164,THost Syncpt Channel/APP register 164"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9618++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_165,THost Syncpt Channel/APP register 165"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x961C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_166,THost Syncpt Channel/APP register 166"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9620++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_167,THost Syncpt Channel/APP register 167"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9624++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_168,THost Syncpt Channel/APP register 168"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9628++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_169,THost Syncpt Channel/APP register 169"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x962C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_170,THost Syncpt Channel/APP register 170"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9630++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_171,THost Syncpt Channel/APP register 171"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9634++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_172,THost Syncpt Channel/APP register 172"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9638++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_173,THost Syncpt Channel/APP register 173"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x963C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_174,THost Syncpt Channel/APP register 174"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9640++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_175,THost Syncpt Channel/APP register 175"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9644++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_176,THost Syncpt Channel/APP register 176"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9648++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_177,THost Syncpt Channel/APP register 177"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x964C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_178,THost Syncpt Channel/APP register 178"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9650++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_179,THost Syncpt Channel/APP register 179"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9654++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_180,THost Syncpt Channel/APP register 180"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9658++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_181,THost Syncpt Channel/APP register 181"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x965C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_182,THost Syncpt Channel/APP register 182"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9660++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_183,THost Syncpt Channel/APP register 183"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9664++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_184,THost Syncpt Channel/APP register 184"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9668++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_185,THost Syncpt Channel/APP register 185"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x966C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_186,THost Syncpt Channel/APP register 186"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9670++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_187,THost Syncpt Channel/APP register 187"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9674++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_188,THost Syncpt Channel/APP register 188"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9678++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_189,THost Syncpt Channel/APP register 189"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x967C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_190,THost Syncpt Channel/APP register 190"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9680++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_191,THost Syncpt Channel/APP register 191"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9684++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_192,THost Syncpt Channel/APP register 192"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9688++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_193,THost Syncpt Channel/APP register 193"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x968C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_194,THost Syncpt Channel/APP register 194"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9690++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_195,THost Syncpt Channel/APP register 195"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9694++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_196,THost Syncpt Channel/APP register 196"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9698++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_197,THost Syncpt Channel/APP register 197"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x969C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_198,THost Syncpt Channel/APP register 198"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_199,THost Syncpt Channel/APP register 199"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_200,THost Syncpt Channel/APP register 200"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_201,THost Syncpt Channel/APP register 201"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_202,THost Syncpt Channel/APP register 202"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_203,THost Syncpt Channel/APP register 203"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_204,THost Syncpt Channel/APP register 204"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_205,THost Syncpt Channel/APP register 205"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_206,THost Syncpt Channel/APP register 206"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_207,THost Syncpt Channel/APP register 207"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_208,THost Syncpt Channel/APP register 208"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_209,THost Syncpt Channel/APP register 209"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_210,THost Syncpt Channel/APP register 210"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_211,THost Syncpt Channel/APP register 211"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_212,THost Syncpt Channel/APP register 212"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_213,THost Syncpt Channel/APP register 213"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_214,THost Syncpt Channel/APP register 214"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_215,THost Syncpt Channel/APP register 215"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_216,THost Syncpt Channel/APP register 216"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_217,THost Syncpt Channel/APP register 217"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_218,THost Syncpt Channel/APP register 218"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_219,THost Syncpt Channel/APP register 219"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_220,THost Syncpt Channel/APP register 220"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_221,THost Syncpt Channel/APP register 221"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x96FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_222,THost Syncpt Channel/APP register 222"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9700++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_223,THost Syncpt Channel/APP register 223"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9704++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_224,THost Syncpt Channel/APP register 224"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9708++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_225,THost Syncpt Channel/APP register 225"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x970C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_226,THost Syncpt Channel/APP register 226"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9710++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_227,THost Syncpt Channel/APP register 227"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9714++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_228,THost Syncpt Channel/APP register 228"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9718++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_229,THost Syncpt Channel/APP register 229"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x971C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_230,THost Syncpt Channel/APP register 230"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9720++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_231,THost Syncpt Channel/APP register 231"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9724++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_232,THost Syncpt Channel/APP register 232"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9728++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_233,THost Syncpt Channel/APP register 233"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x972C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_234,THost Syncpt Channel/APP register 234"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9730++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_235,THost Syncpt Channel/APP register 235"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9734++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_236,THost Syncpt Channel/APP register 236"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9738++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_237,THost Syncpt Channel/APP register 237"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x973C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_238,THost Syncpt Channel/APP register 238"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9740++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_239,THost Syncpt Channel/APP register 239"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9744++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_240,THost Syncpt Channel/APP register 240"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9748++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_241,THost Syncpt Channel/APP register 241"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x974C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_242,THost Syncpt Channel/APP register 242"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9750++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_243,THost Syncpt Channel/APP register 243"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9754++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_244,THost Syncpt Channel/APP register 244"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9758++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_245,THost Syncpt Channel/APP register 245"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x975C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_246,THost Syncpt Channel/APP register 246"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9760++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_247,THost Syncpt Channel/APP register 247"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9764++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_248,THost Syncpt Channel/APP register 248"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9768++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_249,THost Syncpt Channel/APP register 249"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x976C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_250,THost Syncpt Channel/APP register 250"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9770++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_251,THost Syncpt Channel/APP register 251"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9774++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_252,THost Syncpt Channel/APP register 252"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9778++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_253,THost Syncpt Channel/APP register 253"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x977C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_254,THost Syncpt Channel/APP register 254"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9780++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_255,THost Syncpt Channel/APP register 255"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9784++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_256,THost Syncpt Channel/APP register 256"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9788++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_257,THost Syncpt Channel/APP register 257"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x978C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_258,THost Syncpt Channel/APP register 258"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9790++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_259,THost Syncpt Channel/APP register 259"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9794++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_260,THost Syncpt Channel/APP register 260"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9798++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_261,THost Syncpt Channel/APP register 261"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x979C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_262,THost Syncpt Channel/APP register 262"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_263,THost Syncpt Channel/APP register 263"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_264,THost Syncpt Channel/APP register 264"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_265,THost Syncpt Channel/APP register 265"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_266,THost Syncpt Channel/APP register 266"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_267,THost Syncpt Channel/APP register 267"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_268,THost Syncpt Channel/APP register 268"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_269,THost Syncpt Channel/APP register 269"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_270,THost Syncpt Channel/APP register 270"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_271,THost Syncpt Channel/APP register 271"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_272,THost Syncpt Channel/APP register 272"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_273,THost Syncpt Channel/APP register 273"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_274,THost Syncpt Channel/APP register 274"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_275,THost Syncpt Channel/APP register 275"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_276,THost Syncpt Channel/APP register 276"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_277,THost Syncpt Channel/APP register 277"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_278,THost Syncpt Channel/APP register 278"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_279,THost Syncpt Channel/APP register 279"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_280,THost Syncpt Channel/APP register 280"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_281,THost Syncpt Channel/APP register 281"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_282,THost Syncpt Channel/APP register 282"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_283,THost Syncpt Channel/APP register 283"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_284,THost Syncpt Channel/APP register 284"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_285,THost Syncpt Channel/APP register 285"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x97FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_286,THost Syncpt Channel/APP register 286"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9800++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_287,THost Syncpt Channel/APP register 287"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9804++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_288,THost Syncpt Channel/APP register 288"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9808++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_289,THost Syncpt Channel/APP register 289"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x980C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_290,THost Syncpt Channel/APP register 290"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9810++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_291,THost Syncpt Channel/APP register 291"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9814++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_292,THost Syncpt Channel/APP register 292"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9818++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_293,THost Syncpt Channel/APP register 293"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x981C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_294,THost Syncpt Channel/APP register 294"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9820++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_295,THost Syncpt Channel/APP register 295"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9824++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_296,THost Syncpt Channel/APP register 296"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9828++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_297,THost Syncpt Channel/APP register 297"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x982C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_298,THost Syncpt Channel/APP register 298"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9830++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_299,THost Syncpt Channel/APP register 299"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9834++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_300,THost Syncpt Channel/APP register 300"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9838++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_301,THost Syncpt Channel/APP register 301"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x983C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_302,THost Syncpt Channel/APP register 302"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9840++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_303,THost Syncpt Channel/APP register 303"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9844++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_304,THost Syncpt Channel/APP register 304"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9848++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_305,THost Syncpt Channel/APP register 305"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x984C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_306,THost Syncpt Channel/APP register 306"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9850++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_307,THost Syncpt Channel/APP register 307"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9854++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_308,THost Syncpt Channel/APP register 308"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9858++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_309,THost Syncpt Channel/APP register 309"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x985C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_310,THost Syncpt Channel/APP register 310"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9860++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_311,THost Syncpt Channel/APP register 311"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9864++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_312,THost Syncpt Channel/APP register 312"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9868++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_313,THost Syncpt Channel/APP register 313"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x986C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_314,THost Syncpt Channel/APP register 314"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9870++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_315,THost Syncpt Channel/APP register 315"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9874++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_316,THost Syncpt Channel/APP register 316"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9878++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_317,THost Syncpt Channel/APP register 317"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x987C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_318,THost Syncpt Channel/APP register 318"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9880++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_319,THost Syncpt Channel/APP register 319"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9884++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_320,THost Syncpt Channel/APP register 320"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9888++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_321,THost Syncpt Channel/APP register 321"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x988C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_322,THost Syncpt Channel/APP register 322"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9890++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_323,THost Syncpt Channel/APP register 323"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9894++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_324,THost Syncpt Channel/APP register 324"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9898++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_325,THost Syncpt Channel/APP register 325"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x989C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_326,THost Syncpt Channel/APP register 326"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_327,THost Syncpt Channel/APP register 327"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_328,THost Syncpt Channel/APP register 328"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_329,THost Syncpt Channel/APP register 329"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_330,THost Syncpt Channel/APP register 330"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_331,THost Syncpt Channel/APP register 331"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_332,THost Syncpt Channel/APP register 332"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_333,THost Syncpt Channel/APP register 333"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_334,THost Syncpt Channel/APP register 334"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_335,THost Syncpt Channel/APP register 335"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_336,THost Syncpt Channel/APP register 336"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_337,THost Syncpt Channel/APP register 337"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_338,THost Syncpt Channel/APP register 338"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_339,THost Syncpt Channel/APP register 339"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_340,THost Syncpt Channel/APP register 340"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_341,THost Syncpt Channel/APP register 341"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_342,THost Syncpt Channel/APP register 342"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_343,THost Syncpt Channel/APP register 343"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_344,THost Syncpt Channel/APP register 344"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_345,THost Syncpt Channel/APP register 345"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_346,THost Syncpt Channel/APP register 346"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_347,THost Syncpt Channel/APP register 347"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_348,THost Syncpt Channel/APP register 348"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_349,THost Syncpt Channel/APP register 349"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x98FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_350,THost Syncpt Channel/APP register 350"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9900++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_351,THost Syncpt Channel/APP register 351"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9904++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_352,THost Syncpt Channel/APP register 352"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9908++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_353,THost Syncpt Channel/APP register 353"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x990C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_354,THost Syncpt Channel/APP register 354"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9910++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_355,THost Syncpt Channel/APP register 355"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9914++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_356,THost Syncpt Channel/APP register 356"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9918++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_357,THost Syncpt Channel/APP register 357"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x991C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_358,THost Syncpt Channel/APP register 358"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9920++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_359,THost Syncpt Channel/APP register 359"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9924++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_360,THost Syncpt Channel/APP register 360"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9928++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_361,THost Syncpt Channel/APP register 361"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x992C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_362,THost Syncpt Channel/APP register 362"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9930++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_363,THost Syncpt Channel/APP register 363"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9934++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_364,THost Syncpt Channel/APP register 364"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9938++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_365,THost Syncpt Channel/APP register 365"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x993C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_366,THost Syncpt Channel/APP register 366"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9940++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_367,THost Syncpt Channel/APP register 367"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9944++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_368,THost Syncpt Channel/APP register 368"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9948++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_369,THost Syncpt Channel/APP register 369"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x994C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_370,THost Syncpt Channel/APP register 370"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9950++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_371,THost Syncpt Channel/APP register 371"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9954++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_372,THost Syncpt Channel/APP register 372"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9958++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_373,THost Syncpt Channel/APP register 373"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x995C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_374,THost Syncpt Channel/APP register 374"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9960++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_375,THost Syncpt Channel/APP register 375"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9964++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_376,THost Syncpt Channel/APP register 376"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9968++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_377,THost Syncpt Channel/APP register 377"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x996C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_378,THost Syncpt Channel/APP register 378"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9970++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_379,THost Syncpt Channel/APP register 379"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9974++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_380,THost Syncpt Channel/APP register 380"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9978++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_381,THost Syncpt Channel/APP register 381"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x997C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_382,THost Syncpt Channel/APP register 382"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9980++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_383,THost Syncpt Channel/APP register 383"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9984++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_384,THost Syncpt Channel/APP register 384"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9988++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_385,THost Syncpt Channel/APP register 385"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x998C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_386,THost Syncpt Channel/APP register 386"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9990++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_387,THost Syncpt Channel/APP register 387"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9994++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_388,THost Syncpt Channel/APP register 388"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9998++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_389,THost Syncpt Channel/APP register 389"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x999C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_390,THost Syncpt Channel/APP register 390"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_391,THost Syncpt Channel/APP register 391"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_392,THost Syncpt Channel/APP register 392"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99A8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_393,THost Syncpt Channel/APP register 393"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99AC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_394,THost Syncpt Channel/APP register 394"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_395,THost Syncpt Channel/APP register 395"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_396,THost Syncpt Channel/APP register 396"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99B8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_397,THost Syncpt Channel/APP register 397"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99BC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_398,THost Syncpt Channel/APP register 398"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_399,THost Syncpt Channel/APP register 399"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_400,THost Syncpt Channel/APP register 400"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99C8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_401,THost Syncpt Channel/APP register 401"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99CC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_402,THost Syncpt Channel/APP register 402"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_403,THost Syncpt Channel/APP register 403"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_404,THost Syncpt Channel/APP register 404"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99D8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_405,THost Syncpt Channel/APP register 405"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99DC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_406,THost Syncpt Channel/APP register 406"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_407,THost Syncpt Channel/APP register 407"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_408,THost Syncpt Channel/APP register 408"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99E8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_409,THost Syncpt Channel/APP register 409"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99EC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_410,THost Syncpt Channel/APP register 410"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_411,THost Syncpt Channel/APP register 411"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_412,THost Syncpt Channel/APP register 412"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99F8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_413,THost Syncpt Channel/APP register 413"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x99FC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_414,THost Syncpt Channel/APP register 414"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_415,THost Syncpt Channel/APP register 415"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_416,THost Syncpt Channel/APP register 416"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_417,THost Syncpt Channel/APP register 417"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_418,THost Syncpt Channel/APP register 418"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_419,THost Syncpt Channel/APP register 419"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_420,THost Syncpt Channel/APP register 420"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_421,THost Syncpt Channel/APP register 421"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_422,THost Syncpt Channel/APP register 422"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_423,THost Syncpt Channel/APP register 423"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_424,THost Syncpt Channel/APP register 424"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_425,THost Syncpt Channel/APP register 425"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_426,THost Syncpt Channel/APP register 426"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_427,THost Syncpt Channel/APP register 427"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_428,THost Syncpt Channel/APP register 428"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_429,THost Syncpt Channel/APP register 429"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_430,THost Syncpt Channel/APP register 430"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_431,THost Syncpt Channel/APP register 431"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_432,THost Syncpt Channel/APP register 432"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_433,THost Syncpt Channel/APP register 433"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_434,THost Syncpt Channel/APP register 434"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_435,THost Syncpt Channel/APP register 435"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_436,THost Syncpt Channel/APP register 436"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_437,THost Syncpt Channel/APP register 437"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_438,THost Syncpt Channel/APP register 438"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_439,THost Syncpt Channel/APP register 439"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_440,THost Syncpt Channel/APP register 440"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_441,THost Syncpt Channel/APP register 441"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_442,THost Syncpt Channel/APP register 442"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_443,THost Syncpt Channel/APP register 443"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_444,THost Syncpt Channel/APP register 444"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_445,THost Syncpt Channel/APP register 445"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_446,THost Syncpt Channel/APP register 446"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_447,THost Syncpt Channel/APP register 447"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_448,THost Syncpt Channel/APP register 448"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_449,THost Syncpt Channel/APP register 449"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_450,THost Syncpt Channel/APP register 450"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_451,THost Syncpt Channel/APP register 451"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_452,THost Syncpt Channel/APP register 452"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_453,THost Syncpt Channel/APP register 453"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9A9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_454,THost Syncpt Channel/APP register 454"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_455,THost Syncpt Channel/APP register 455"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_456,THost Syncpt Channel/APP register 456"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_457,THost Syncpt Channel/APP register 457"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_458,THost Syncpt Channel/APP register 458"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_459,THost Syncpt Channel/APP register 459"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_460,THost Syncpt Channel/APP register 460"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_461,THost Syncpt Channel/APP register 461"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ABC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_462,THost Syncpt Channel/APP register 462"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_463,THost Syncpt Channel/APP register 463"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_464,THost Syncpt Channel/APP register 464"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_465,THost Syncpt Channel/APP register 465"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ACC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_466,THost Syncpt Channel/APP register 466"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_467,THost Syncpt Channel/APP register 467"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_468,THost Syncpt Channel/APP register 468"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_469,THost Syncpt Channel/APP register 469"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9ADC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_470,THost Syncpt Channel/APP register 470"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_471,THost Syncpt Channel/APP register 471"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_472,THost Syncpt Channel/APP register 472"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_473,THost Syncpt Channel/APP register 473"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_474,THost Syncpt Channel/APP register 474"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_475,THost Syncpt Channel/APP register 475"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_476,THost Syncpt Channel/APP register 476"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_477,THost Syncpt Channel/APP register 477"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9AFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_478,THost Syncpt Channel/APP register 478"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_479,THost Syncpt Channel/APP register 479"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_480,THost Syncpt Channel/APP register 480"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_481,THost Syncpt Channel/APP register 481"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_482,THost Syncpt Channel/APP register 482"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_483,THost Syncpt Channel/APP register 483"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_484,THost Syncpt Channel/APP register 484"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_485,THost Syncpt Channel/APP register 485"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_486,THost Syncpt Channel/APP register 486"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_487,THost Syncpt Channel/APP register 487"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_488,THost Syncpt Channel/APP register 488"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_489,THost Syncpt Channel/APP register 489"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_490,THost Syncpt Channel/APP register 490"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_491,THost Syncpt Channel/APP register 491"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_492,THost Syncpt Channel/APP register 492"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_493,THost Syncpt Channel/APP register 493"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_494,THost Syncpt Channel/APP register 494"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_495,THost Syncpt Channel/APP register 495"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_496,THost Syncpt Channel/APP register 496"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_497,THost Syncpt Channel/APP register 497"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_498,THost Syncpt Channel/APP register 498"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_499,THost Syncpt Channel/APP register 499"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_500,THost Syncpt Channel/APP register 500"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_501,THost Syncpt Channel/APP register 501"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_502,THost Syncpt Channel/APP register 502"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_503,THost Syncpt Channel/APP register 503"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_504,THost Syncpt Channel/APP register 504"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_505,THost Syncpt Channel/APP register 505"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_506,THost Syncpt Channel/APP register 506"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_507,THost Syncpt Channel/APP register 507"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_508,THost Syncpt Channel/APP register 508"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_509,THost Syncpt Channel/APP register 509"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_510,THost Syncpt Channel/APP register 510"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_511,THost Syncpt Channel/APP register 511"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B84++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_512,THost Syncpt Channel/APP register 512"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B88++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_513,THost Syncpt Channel/APP register 513"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B8C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_514,THost Syncpt Channel/APP register 514"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B90++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_515,THost Syncpt Channel/APP register 515"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B94++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_516,THost Syncpt Channel/APP register 516"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B98++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_517,THost Syncpt Channel/APP register 517"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9B9C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_518,THost Syncpt Channel/APP register 518"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_519,THost Syncpt Channel/APP register 519"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_520,THost Syncpt Channel/APP register 520"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BA8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_521,THost Syncpt Channel/APP register 521"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BAC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_522,THost Syncpt Channel/APP register 522"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_523,THost Syncpt Channel/APP register 523"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_524,THost Syncpt Channel/APP register 524"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BB8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_525,THost Syncpt Channel/APP register 525"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BBC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_526,THost Syncpt Channel/APP register 526"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_527,THost Syncpt Channel/APP register 527"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_528,THost Syncpt Channel/APP register 528"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BC8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_529,THost Syncpt Channel/APP register 529"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BCC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_530,THost Syncpt Channel/APP register 530"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_531,THost Syncpt Channel/APP register 531"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_532,THost Syncpt Channel/APP register 532"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BD8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_533,THost Syncpt Channel/APP register 533"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BDC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_534,THost Syncpt Channel/APP register 534"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_535,THost Syncpt Channel/APP register 535"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_536,THost Syncpt Channel/APP register 536"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BE8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_537,THost Syncpt Channel/APP register 537"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BEC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_538,THost Syncpt Channel/APP register 538"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF0++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_539,THost Syncpt Channel/APP register 539"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF4++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_540,THost Syncpt Channel/APP register 540"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BF8++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_541,THost Syncpt Channel/APP register 541"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9BFC++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_542,THost Syncpt Channel/APP register 542"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C00++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_543,THost Syncpt Channel/APP register 543"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C04++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_544,THost Syncpt Channel/APP register 544"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C08++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_545,THost Syncpt Channel/APP register 545"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C0C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_546,THost Syncpt Channel/APP register 546"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C10++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_547,THost Syncpt Channel/APP register 547"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C14++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_548,THost Syncpt Channel/APP register 548"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C18++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_549,THost Syncpt Channel/APP register 549"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C1C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_550,THost Syncpt Channel/APP register 550"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C20++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_551,THost Syncpt Channel/APP register 551"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C24++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_552,THost Syncpt Channel/APP register 552"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C28++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_553,THost Syncpt Channel/APP register 553"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C2C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_554,THost Syncpt Channel/APP register 554"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C30++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_555,THost Syncpt Channel/APP register 555"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C34++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_556,THost Syncpt Channel/APP register 556"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C38++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_557,THost Syncpt Channel/APP register 557"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C3C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_558,THost Syncpt Channel/APP register 558"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C40++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_559,THost Syncpt Channel/APP register 559"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C44++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_560,THost Syncpt Channel/APP register 560"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C48++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_561,THost Syncpt Channel/APP register 561"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C4C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_562,THost Syncpt Channel/APP register 562"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C50++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_563,THost Syncpt Channel/APP register 563"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C54++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_564,THost Syncpt Channel/APP register 564"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C58++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_565,THost Syncpt Channel/APP register 565"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C5C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_566,THost Syncpt Channel/APP register 566"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C60++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_567,THost Syncpt Channel/APP register 567"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C64++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_568,THost Syncpt Channel/APP register 568"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C68++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_569,THost Syncpt Channel/APP register 569"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C6C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_570,THost Syncpt Channel/APP register 570"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C70++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_571,THost Syncpt Channel/APP register 571"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C74++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_572,THost Syncpt Channel/APP register 572"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C78++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_573,THost Syncpt Channel/APP register 573"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C7C++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_574,THost Syncpt Channel/APP register 574"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
group.long 0x9C80++0x03
line.long 0x00 "THOST_SYNCPT_SYNCPT_CH_APP_575,THost Syncpt Channel/APP register 575"
hexmask.long.byte 0x00 8.--13. 1. " SYNCPT_CH                         ,SYNCPT_CH"
hexmask.long.byte 0x00 0.--7. 1. "           SYNCPT_APP ,SYNCPT_APP"
tree.end
textline "                                                           "
width 0x0B
tree.end
tree.end
tree "THOST ACTMON 0"
base ad:0x13EC0000
width 40.
group.long 0x00++0x07
line.long 0x00 "THOST_ACTMON_NVENC_GLB_CTRL,THost ACTMON GLB Control NVENC Register"
bitfld.long 0x00 10. " SAMPLE_TICK                 ,Sample tick" "256,65536"
bitfld.long 0x00 8.--9. "         SOURCE                      ,Sample period units" "MSEC,USEC,TICK,?..."
textline "                                                 "
hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_PERIOD               ,Sample period value"
line.long 0x04 "THOST_ACTMON_NVENC_GLB_INT_EN,THost ACTMON GLB NVENC Interrupt Enable Register"
hexmask.long.byte 0x04 0.--7. 1. " EN                          ,Enable"
rgroup.long 0x08++0x03
line.long 0x00 "THOST_ACTMON_NVENC_GLB_INT_STATUS,THost ACTMON GLB NVENC Interrupt Status Register"
hexmask.long.byte 0x00 0.--7. 1. " INTR                        ,Interrupt"
group.long 0x80++0x1F
line.long 0x00 "THOST_ACTMON_NVENC0_CTRL,THost ACTMON NVENC0 Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable CUMULATIVE" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 21.--23. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
textline "                                                 "
bitfld.long 0x00 20. " CUMULATIVE_CARRY            ,CUMULATIVE Carry" "Not carried,Carried"
bitfld.long 0x00 19. "   CUMULATIVE_OVERFLOW         ,CUMULATIVE Overflow" "No overflow,Overflow"
textline "                                                 "
bitfld.long 0x00 13. " ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
bitfld.long 0x00 10.--12. "      K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVENC0_INTR_ENABLE,THost ACTMON NVENC0 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt avg above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt avg below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVENC0_INTR_STATUS,THost ACTMON NVENC0 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for avg above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for avg below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No effect,Interrupt"
eventfld.long 0x08 26. "     CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVENC0_UPPER_WMARK,THost ACTMON NVENC0 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVENC0_LOWER_WMARK,THost ACTMON NVENC0 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVENC0_AVG_UPPER_WMARK,THost ACTMON NVENC0 AVG Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVENC0_AVG_LOWER_WMARK,THost ACTMON NVENC0 AVG Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVENC0_INIT_AVG,THost ACTMON NVENC0 Initial AVG value Register"
rgroup.long 0xC00A0++0x07
line.long 0x00 "THOST_ACTMON_NVENC0_COUNT,THost ACTMON NVENC0 Count Register"
line.long 0x04 "THOST_ACTMON_NVENC0_AVG_COUNT,THost ACTMON NVENC0 AVG Count Register"
group.long 0xC00A8++0x03
line.long 0x00 "THOST_ACTMON_NVENC0_COUNT_WEIGHT,THost ACTMON NVENC0 Count Weight Register"
rgroup.long 0xC00AC++0x03
line.long 0x00 "THOST_ACTMON_NVENC0_CUMULATIVE_COUNT,THost ACTMON NVENC0 Cumulative Count Register"
group.long 0x100++0x1F
line.long 0x00 "THOST_ACTMON_NVENC1_CTRL,THost ACTMON NVENCO Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable cumulative" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "             CUMULATIVE_CARRY ,Cumulative Carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " CUMULATIVE_OVERFLOW         ,Cumulative Overflow" "No overflow,Overflow"
bitfld.long 0x00 13. "   ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 10.--12. " K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVENC1_INTR_ENABLE,THost ACTMON NVENC1 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt average above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt average below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVENC1_INTR_STATUS,THost ACTMON NVENC1 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for average above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for average below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No interrupt,Interrupt"
eventfld.long 0x08 26. "  CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVENC1_UPPER_WMARK,THost ACTMON NVENC1 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVENC1_LOWER_WMARK,THost ACTMON NVENC1 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVENC1_AVG_UPPER_WMARK,THost ACTMON NVENC1 Average Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVENC1_AVG_LOWER_WMARK,THost ACTMON NVENC1 Average Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVENC1_INIT_AVG,THost ACTMON NVENC1 Initial Average Value Register"
rgroup.long 0x120++0x07
line.long 0x00 "THOST_ACTMON_NVENC1_COUNT,THost ACTMON NVENC1 Count Register"
line.long 0x04 "THOST_ACTMON_NVENC1_AVG_COUNT,THost ACTMON NVENC1 Average Count Register"
group.long 0x128++0x03
line.long 0x00 "THOST_ACTMON_NVENC1_COUNT_WEIGHT,THost ACTMON NVENC1 Count Weight Register"
rgroup.long 0x12C++0x03
line.long 0x00 "THOST_ACTMON_NVENC1_CUMULATIVE_COUNT,THost ACTMON NVENC1 CUMULATIVE Count Register"
width 0x0B
tree.end
tree "THOST ACTMON 1"
base ad:0x13ED0000
width 40.
group.long 0x00++0x07
line.long 0x00 "THOST_ACTMON_VIC_GLB_CTRL,THost ACTMON GLB Control VIC Register"
bitfld.long 0x00 10. " SAMPLE_TICK                 ,Sample tick" "256,65536"
bitfld.long 0x00 8.--9. "         SOURCE                      ,Sample period units" "MSEC,USEC,TICK,?..."
textline "                                                 "
hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_PERIOD               ,Sample period value"
line.long 0x04 "THOST_ACTMON_VIC_GLB_INT_EN,THost ACTMON GLB VIC Interrupt Enable Register"
hexmask.long.byte 0x04 0.--7. 1. " EN                          ,Enable"
rgroup.long 0x08++0x03
line.long 0x00 "THOST_ACTMON_VIC_GLB_INT_STATUS,THost ACTMON GLB VIC Interrupt Status Register"
hexmask.long.byte 0x00 0.--7. 1. " INTR                        ,Interrupt"
group.long 0x80++0x1F
line.long 0x00 "THOST_ACTMON_VIC0_CTRL,THost ACTMON VIC0 Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable CUMULATIVE" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 21.--23. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
textline "                                                 "
bitfld.long 0x00 20. " CUMULATIVE_CARRY            ,CUMULATIVE Carry" "Not carried,Carried"
bitfld.long 0x00 19. "   CUMULATIVE_OVERFLOW         ,CUMULATIVE Overflow" "No overflow,Overflow"
textline "                                                 "
bitfld.long 0x00 13. " ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
bitfld.long 0x00 10.--12. "      K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_VIC0_INTR_ENABLE,THost ACTMON VIC0 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt avg above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt avg below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_VIC0_INTR_STATUS,THost ACTMON VIC0 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for avg above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for avg below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No effect,Interrupt"
eventfld.long 0x08 26. "     CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_VIC0_UPPER_WMARK,THost ACTMON VIC0 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_VIC0_LOWER_WMARK,THost ACTMON VIC0 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_VIC0_AVG_UPPER_WMARK,THost ACTMON VIC0 AVG Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_VIC0_AVG_LOWER_WMARK,THost ACTMON VIC0 AVG Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_VIC0_INIT_AVG,THost ACTMON VIC0 Initial AVG value Register"
rgroup.long 0xC00A0++0x07
line.long 0x00 "THOST_ACTMON_VIC0_COUNT,THost ACTMON VIC0 Count Register"
line.long 0x04 "THOST_ACTMON_VIC0_AVG_COUNT,THost ACTMON VIC0 AVG Count Register"
group.long 0xC00A8++0x03
line.long 0x00 "THOST_ACTMON_VIC0_COUNT_WEIGHT,THost ACTMON VIC0 Count Weight Register"
rgroup.long 0xC00AC++0x03
line.long 0x00 "THOST_ACTMON_VIC0_CUMULATIVE_COUNT,THost ACTMON VIC0 Cumulative Count Register"
group.long 0x100++0x1F
line.long 0x00 "THOST_ACTMON_VIC1_CTRL,THost ACTMON VICO Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable cumulative" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "             CUMULATIVE_CARRY ,Cumulative Carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " CUMULATIVE_OVERFLOW         ,Cumulative Overflow" "No overflow,Overflow"
bitfld.long 0x00 13. "   ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 10.--12. " K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_VIC1_INTR_ENABLE,THost ACTMON VIC1 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt average above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt average below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_VIC1_INTR_STATUS,THost ACTMON VIC1 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for average above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for average below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No interrupt,Interrupt"
eventfld.long 0x08 26. "  CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_VIC1_UPPER_WMARK,THost ACTMON VIC1 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_VIC1_LOWER_WMARK,THost ACTMON VIC1 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_VIC1_AVG_UPPER_WMARK,THost ACTMON VIC1 Average Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_VIC1_AVG_LOWER_WMARK,THost ACTMON VIC1 Average Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_VIC1_INIT_AVG,THost ACTMON VIC1 Initial Average Value Register"
rgroup.long 0x120++0x07
line.long 0x00 "THOST_ACTMON_VIC1_COUNT,THost ACTMON VIC1 Count Register"
line.long 0x04 "THOST_ACTMON_VIC1_AVG_COUNT,THost ACTMON VIC1 Average Count Register"
group.long 0x128++0x03
line.long 0x00 "THOST_ACTMON_VIC1_COUNT_WEIGHT,THost ACTMON VIC1 Count Weight Register"
rgroup.long 0x12C++0x03
line.long 0x00 "THOST_ACTMON_VIC1_CUMULATIVE_COUNT,THost ACTMON VIC1 CUMULATIVE Count Register"
width 0x0B
tree.end
tree "THOST ACTMON 2"
base ad:0x13EE0000
width 40.
group.long 0x00++0x07
line.long 0x00 "THOST_ACTMON_NVDEC_GLB_CTRL,THost ACTMON GLB Control NVDEC Register"
bitfld.long 0x00 10. " SAMPLE_TICK                 ,Sample tick" "256,65536"
bitfld.long 0x00 8.--9. "         SOURCE                      ,Sample period units" "MSEC,USEC,TICK,?..."
textline "                                                 "
hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_PERIOD               ,Sample period value"
line.long 0x04 "THOST_ACTMON_NVDEC_GLB_INT_EN,THost ACTMON GLB NVDEC Interrupt Enable Register"
hexmask.long.byte 0x04 0.--7. 1. " EN                          ,Enable"
rgroup.long 0x08++0x03
line.long 0x00 "THOST_ACTMON_NVDEC_GLB_INT_STATUS,THost ACTMON GLB NVDEC Interrupt Status Register"
hexmask.long.byte 0x00 0.--7. 1. " INTR                        ,Interrupt"
group.long 0x80++0x1F
line.long 0x00 "THOST_ACTMON_NVDEC0_CTRL,THost ACTMON NVDEC0 Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable CUMULATIVE" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 21.--23. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
textline "                                                 "
bitfld.long 0x00 20. " CUMULATIVE_CARRY            ,CUMULATIVE Carry" "Not carried,Carried"
bitfld.long 0x00 19. "   CUMULATIVE_OVERFLOW         ,CUMULATIVE Overflow" "No overflow,Overflow"
textline "                                                 "
bitfld.long 0x00 13. " ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
bitfld.long 0x00 10.--12. "      K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVDEC0_INTR_ENABLE,THost ACTMON NVDEC0 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt avg above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt avg below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVDEC0_INTR_STATUS,THost ACTMON NVDEC0 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for avg above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for avg below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No effect,Interrupt"
eventfld.long 0x08 26. "     CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVDEC0_UPPER_WMARK,THost ACTMON NVDEC0 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVDEC0_LOWER_WMARK,THost ACTMON NVDEC0 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVDEC0_AVG_UPPER_WMARK,THost ACTMON NVDEC0 AVG Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVDEC0_AVG_LOWER_WMARK,THost ACTMON NVDEC0 AVG Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVDEC0_INIT_AVG,THost ACTMON NVDEC0 Initial AVG value Register"
rgroup.long 0xC00A0++0x07
line.long 0x00 "THOST_ACTMON_NVDEC0_COUNT,THost ACTMON NVDEC0 Count Register"
line.long 0x04 "THOST_ACTMON_NVDEC0_AVG_COUNT,THost ACTMON NVDEC0 AVG Count Register"
group.long 0xC00A8++0x03
line.long 0x00 "THOST_ACTMON_NVDEC0_COUNT_WEIGHT,THost ACTMON NVDEC0 Count Weight Register"
rgroup.long 0xC00AC++0x03
line.long 0x00 "THOST_ACTMON_NVDEC0_CUMULATIVE_COUNT,THost ACTMON NVDEC0 Cumulative Count Register"
group.long 0x100++0x1F
line.long 0x00 "THOST_ACTMON_NVDEC1_CTRL,THost ACTMON NVDECO Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable cumulative" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "             CUMULATIVE_CARRY ,Cumulative Carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " CUMULATIVE_OVERFLOW         ,Cumulative Overflow" "No overflow,Overflow"
bitfld.long 0x00 13. "   ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 10.--12. " K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVDEC1_INTR_ENABLE,THost ACTMON NVDEC1 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt average above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt average below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVDEC1_INTR_STATUS,THost ACTMON NVDEC1 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for average above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for average below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No interrupt,Interrupt"
eventfld.long 0x08 26. "  CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVDEC1_UPPER_WMARK,THost ACTMON NVDEC1 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVDEC1_LOWER_WMARK,THost ACTMON NVDEC1 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVDEC1_AVG_UPPER_WMARK,THost ACTMON NVDEC1 Average Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVDEC1_AVG_LOWER_WMARK,THost ACTMON NVDEC1 Average Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVDEC1_INIT_AVG,THost ACTMON NVDEC1 Initial Average Value Register"
rgroup.long 0x120++0x07
line.long 0x00 "THOST_ACTMON_NVDEC1_COUNT,THost ACTMON NVDEC1 Count Register"
line.long 0x04 "THOST_ACTMON_NVDEC1_AVG_COUNT,THost ACTMON NVDEC1 Average Count Register"
group.long 0x128++0x03
line.long 0x00 "THOST_ACTMON_NVDEC1_COUNT_WEIGHT,THost ACTMON NVDEC1 Count Weight Register"
rgroup.long 0x12C++0x03
line.long 0x00 "THOST_ACTMON_NVDEC1_CUMULATIVE_COUNT,THost ACTMON NVDEC1 CUMULATIVE Count Register"
width 0x0B
tree.end
tree "THOST ACTMON 3"
base ad:0x13EF0000
width 40.
group.long 0x00++0x07
line.long 0x00 "THOST_ACTMON_NVJPG_GLB_CTRL,THost ACTMON GLB Control NVJPG Register"
bitfld.long 0x00 10. " SAMPLE_TICK                 ,Sample tick" "256,65536"
bitfld.long 0x00 8.--9. "         SOURCE                      ,Sample period units" "MSEC,USEC,TICK,?..."
textline "                                                 "
hexmask.long.byte 0x00 0.--7. 1. " SAMPLE_PERIOD               ,Sample period value"
line.long 0x04 "THOST_ACTMON_NVJPG_GLB_INT_EN,THost ACTMON GLB NVJPG Interrupt Enable Register"
hexmask.long.byte 0x04 0.--7. 1. " EN                          ,Enable"
rgroup.long 0x08++0x03
line.long 0x00 "THOST_ACTMON_NVJPG_GLB_INT_STATUS,THost ACTMON GLB NVJPG Interrupt Status Register"
hexmask.long.byte 0x00 0.--7. 1. " INTR                        ,Interrupt"
group.long 0x80++0x1F
line.long 0x00 "THOST_ACTMON_NVJPG0_CTRL,THost ACTMON NVJPG0 Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable CUMULATIVE" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 21.--23. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
textline "                                                 "
bitfld.long 0x00 20. " CUMULATIVE_CARRY            ,CUMULATIVE Carry" "Not carried,Carried"
bitfld.long 0x00 19. "   CUMULATIVE_OVERFLOW         ,CUMULATIVE Overflow" "No overflow,Overflow"
textline "                                                 "
bitfld.long 0x00 13. " ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
bitfld.long 0x00 10.--12. "      K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVJPG0_INTR_ENABLE,THost ACTMON NVJPG0 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt avg above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt avg below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVJPG0_INTR_STATUS,THost ACTMON NVJPG0 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for avg above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for avg below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No effect,Interrupt"
eventfld.long 0x08 26. "     CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVJPG0_UPPER_WMARK,THost ACTMON NVJPG0 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVJPG0_LOWER_WMARK,THost ACTMON NVJPG0 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVJPG0_AVG_UPPER_WMARK,THost ACTMON NVJPG0 AVG Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVJPG0_AVG_LOWER_WMARK,THost ACTMON NVJPG0 AVG Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVJPG0_INIT_AVG,THost ACTMON NVJPG0 Initial AVG value Register"
rgroup.long 0xC00A0++0x07
line.long 0x00 "THOST_ACTMON_NVJPG0_COUNT,THost ACTMON NVJPG0 Count Register"
line.long 0x04 "THOST_ACTMON_NVJPG0_AVG_COUNT,THost ACTMON NVJPG0 AVG Count Register"
group.long 0xC00A8++0x03
line.long 0x00 "THOST_ACTMON_NVJPG0_COUNT_WEIGHT,THost ACTMON NVJPG0 Count Weight Register"
rgroup.long 0xC00AC++0x03
line.long 0x00 "THOST_ACTMON_NVJPG0_CUMULATIVE_COUNT,THost ACTMON NVJPG0 Cumulative Count Register"
group.long 0x100++0x1F
line.long 0x00 "THOST_ACTMON_NVJPG1_CTRL,THost ACTMON NVJPGO Control Register"
bitfld.long 0x00 31. " ACTMON_ENB                  ,Enables Monitor" "Disabled,Enabled"
bitfld.long 0x00 30. "      ENB_CUMULATIVE              ,Enable cumulative" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 26.--28. " CONSECUTIVE_ABOVE_WMARK_NUM ,Number of consecutive upper watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "             CONSECUTIVE_BELOW_WMARK_NUM ,Number of consecutive lower watermark breaches" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "             CUMULATIVE_CARRY ,Cumulative Carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " CUMULATIVE_OVERFLOW         ,Cumulative Overflow" "No overflow,Overflow"
bitfld.long 0x00 13. "   ENB_PERIODIC                ,Enable periodic mode" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 10.--12. " K_VAL                       ,Variable for IIR filter" "0,2,4,8,16,32,36,128"
line.long 0x04 "THOST_ACTMON_NVJPG1_INTR_ENABLE,THost ACTMON NVJPG1 Interrupt Enable Register"
bitfld.long 0x04 31. " CONSECUTIVE_UPPER_WMARK_EN  ,Enables interrupt consecutive upper watermark" "Disabled,Enabled"
bitfld.long 0x04 30. "      CONSECUTIVE_LOWER_WMARK_EN  ,Enables interrupt consecutive lower watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 29. " AVG_ABOVE_WMARK_EN          ,Enables interrupt average above watermark" "Disabled,Enabled"
bitfld.long 0x04 28. "      AVG_BELOW_WMARK_EN          ,Enables interrupt average below watermark" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 27. " AT_END_EN                   ,Enables interrupt AT end" "Disabled,Enabled"
bitfld.long 0x04 26. "      CUMULATIVE_CARRY_EN         ,Enables interrupt cumulative carry" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 25. " CUMULATIVE_OVERFLOW_EN      ,Enables interrupt cumulative overflow" "Disabled,Enabled"
bitfld.long 0x04 24. "      COUNTER_OVERFLOW_EN         ,Enables interrupt counter overflow" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x04 23. " BT_ABOVE_WMARK_EN           ,Enables interrupt BT above watermark" "Disabled,Enabled"
bitfld.long 0x04 22. "      BT_BELOW_WMARK_EN           ,Enables interrupt BT below watermark" "Disabled,Enabled"
line.long 0x08 "THOST_ACTMON_NVJPG1_INTR_STATUS,THost ACTMON NVJPG1 Interrupt Status Register"
eventfld.long 0x08 31. " CONSECUTIVE_UPPER_WMARK     ,Interrupt detects for consecutive upper watermark" "No interrupt,Interrupt"
eventfld.long 0x08 30. "  CONSECUTIVE_LOWER_WMARK     ,Interrupt detects for consecutive lower watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 29. " AVG_ABOVE_WMARK             ,Interrupt detects for average above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 28. "  AVG_BELOW_WMARK             ,Interrupt detects for average below watermark" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 27. " AT_END                      ,Interrupt detects for AT end" "No interrupt,Interrupt"
eventfld.long 0x08 26. "  CUMULATIVE_CARRY            ,Interrupt detects for cumulative carry" "No interrupt,Interrupt"
textline "                                                 "
eventfld.long 0x08 25. " CUMULATIVE_OVERFLOW         ,Interrupt detects for cumulative overflow" "No overflow,Overflow"
eventfld.long 0x08 24. "   COUNTER_OVERFLOW            ,Interrupt detects for counter overflow" "No overflow,Overflow"
textline "                                                 "
eventfld.long 0x08 23. " BT_ABOVE_WMARK              ,Interrupt detects for BT above watermark" "No interrupt,Interrupt"
eventfld.long 0x08 22. "  BT_BELOW_WMARK              ,Interrupt detects for BT below watermark" "No interrupt,Interrupt"
line.long 0x0C "THOST_ACTMON_NVJPG1_UPPER_WMARK,THost ACTMON NVJPG1 Upper Watermark Register"
line.long 0x10 "THOST_ACTMON_NVJPG1_LOWER_WMARK,THost ACTMON NVJPG1 Lower Watermark Register"
line.long 0x14 "THOST_ACTMON_NVJPG1_AVG_UPPER_WMARK,THost ACTMON NVJPG1 Average Upper Watermark Register"
line.long 0x18 "THOST_ACTMON_NVJPG1_AVG_LOWER_WMARK,THost ACTMON NVJPG1 Average Lower Watermark Register"
line.long 0x1C "THOST_ACTMON_NVJPG1_INIT_AVG,THost ACTMON NVJPG1 Initial Average Value Register"
rgroup.long 0x120++0x07
line.long 0x00 "THOST_ACTMON_NVJPG1_COUNT,THost ACTMON NVJPG1 Count Register"
line.long 0x04 "THOST_ACTMON_NVJPG1_AVG_COUNT,THost ACTMON NVJPG1 Average Count Register"
group.long 0x128++0x03
line.long 0x00 "THOST_ACTMON_NVJPG1_COUNT_WEIGHT,THost ACTMON NVJPG1 Count Weight Register"
rgroup.long 0x12C++0x03
line.long 0x00 "THOST_ACTMON_NVJPG1_CUMULATIVE_COUNT,THost ACTMON NVJPG1 CUMULATIVE Count Register"
width 0x0B
tree.end
tree "THOST SCHNL"
base ad:0x13F00000
width 50.
group.long 0x00++0x2B
line.long 0x00 "DMASTART,DMA Start Register"
hexmask.long 0x00 2.--31. 1. " CH0_DMASTART                   ,Channel 0 DMA start"
line.long 0x04 "DMASTART_HI,DMA Start High Register"
hexmask.long.byte 0x04 0.--7. 1. " CH0_DMASTART_HI                ,Channel 0 DMA start high"
line.long 0x08 "DMAPUT,DMA Put Register"
hexmask.long 0x08 2.--31. 0x4 " CH0_DMAPUT                     ,Channel 0 DMA put"
line.long 0x0C "DMAPUT_HI,DMA Put High Register"
hexmask.long.byte 0x0C 0.--7. 0x1 " CH0_DMAPUT_HI                  ,Channel 0 DMA put high"
line.long 0x10 "DMAGET,DMAGET Register"
hexmask.long 0x10 2.--31. 0x4 " CH0_DMAGET                     ,Channel 0 DMAGET"
line.long 0x14 "DMAGET_HI,DMAGET HI Register"
hexmask.long.byte 0x14 0.--7. 0x1 " CH0_DMAGET_HI                  ,Channel 0 DMA get high"
line.long 0x18 "DMAEND,DMAEND Register"
hexmask.long 0x18 2.--31. 0x4 " CH0_DMAEND                     ,Channel 0 DMAEND"
line.long 0x1C "DMAEND_HI,DMAEND High Register"
hexmask.long.byte 0x1C 0.--7. 0x1 " CH0_DMAEND_HI                  ,Channel 0 DMA end high"
line.long 0x20 "DMACTRL,DMA Control Register"
bitfld.long 0x20 2. " CH0_DMAINITGET                 ,Resets the get pointer to the value of DMAPUT" "Disabled,Enabled"
bitfld.long 0x20 1. "     CH0_DMAGETRST              ,Resets the get pointer to zero" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x20 0. " CH0_DMASTOP                    ,Stops DMA from fetching on this channel" "Not stopped,Stopped"
line.long 0x24 "CMDFIFO_STAT,CMD FIFO Stat Register"
bitfld.long 0x24 14. " CH0_CMDFIFO_GATHER             ,Indicates whether GATHER is active" "Idle,Busy"
bitfld.long 0x24 13. "         CH0_CMDFIFO_EMPTY          ,Indicates whether the command FIFO is empty" "Not empty,Empty"
textline "                                                           "
hexmask.long.word 0x24 0.--12. 1. " CH0_CMDFIFO_NUMEMPTY           ,Number of free slots in the per-channel command FIFO"
line.long 0x28 "CMDFIFO_RDATA,CMD FIFO RDATA Register"
rgroup.long 0x30++0x07
line.long 0x00 "CMDP_OFFSET,CMDP Offset Register"
hexmask.long.tbyte 0x00 0.--23. 0x1 " CH0_CMDP_OFFSET                ,Current or blocked offset of channel/CMD processor"
line.long 0x04 "CMDP_CLASS,CMDP Class Register"
hexmask.long.word 0x04 0.--9. 1. " CH0_CMDP_CLASS                 ,Current or blocked class of channel/CMD processor"
group.long 0x38++0x03
line.long 0x00 "CHANNELSTAT,Channel Status Register"
bitfld.long 0x00 7. " CH0_ILLEGAL_MMIO_VM_ACCESS     ,Channel 0 illegal MMIO virtual machine access" "Disabled,Enabled"
bitfld.long 0x00 6. "     CH0_ILLEGAL_MMIO_TZ_ACCESS ,Channel 0 illegal MMIO TrustZone access" "Disabled,Enabled"
textline "                                                           "
bitfld.long 0x00 5. " CH0_ILLEGAL_MLOCK_BUSY_TIMEOUT ,Channel 0 illegal MLOCK busy time-out" "Disabled,Enabled"
rbitfld.long 0x00 4. "     CH0_ILLEGAL_STREAMID       ,Indicates illegal usage of stream-ID on context of virtualization" "Disabled,Enabled"
textline "                                                           "
rbitfld.long 0x00 3. " CH0_ILLEGAL_MLOCK              ,Indicates multiple error scenarios for MLOCK" "Disabled,Enabled"
rbitfld.long 0x00 2. "     CH0_ILLEGAL_CLASS          ,Illegal Class-ID Error for" "Set Class,Acquire MLOCK"
textline "                                                           "
rbitfld.long 0x00 1. " CH0_CTXSW_PENDING              ,Current or blocked channel context acknowledgment pending" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CH0_ILLEGAL_OPCODE         ,Illegal Opcode Error" "No error,Error"
group.long 0x40++0x0F
line.long 0x00 "DROP_ILLEGAL_OPCODES,DROP Illegal OPCodes Register"
bitfld.long 0x00 0. " CH0_DROP_ILLEGAL_OPCODES       ,DROP Illegal OPCODES" "Disabled,Enabled"
line.long 0x04 "GATHER_PARSE_DISABLED,GATHER Parse Disabled Register"
bitfld.long 0x04 0. " CH0_GATHER_PARSE_DISABLED      ,Gather parse disabled" "No,Yes"
line.long 0x08 "CMDPROC_STOP,THOST SCHNL CMD/Processor Stop Register"
bitfld.long 0x08 0. " CH0_CMDPROC_STOP               ,CMD/Processor stops commands from the command FIFO" "Not stopped,Stopped"
line.long 0x0C "TEARDOWN,Tear down Register"
bitfld.long 0x0C 0. " CH0_TEARDOWN                   ,Resets the command FIFO" "No reset,Reset"
group.long 0x54++0x3B
line.long 0x00 "ENABLE_TICKCNT,Enable TickCNT Register"
bitfld.long 0x00 0. " CH0_ENABLE_TICKCNT             ,Enables the tick counter" "Disabled,Enabled"
line.long 0x04 "ENABLE_STALLCNT,Enable STALLCNT Register"
bitfld.long 0x04 0. " CH0_ENABLE_STALLCNT            ,Enables the stall counter" "Disabled,Enabled"
line.long 0x08 "ENABLE_TXFERCNT,Enable TXFERCNT Register"
bitfld.long 0x08 0. " CH0_ENABLE_TXFERCNT            ,Enables the transfer counter" "Disabled,Enabled"
line.long 0x0C "TICKCOUNT_LO,Tick Count Low Register"
line.long 0x10 "TICKCOUNT_HI,Tick Count High Register"
line.long 0x14 "STALLCOUNT_LO,Stall Count Low Register"
line.long 0x18 "STALLCOUNT_HI,Stall Count High Register"
line.long 0x1C "CHANNEL_XFER_LO,Channel XFER Low Register"
line.long 0x20 "CHANNEL_XFER_HI,Channel XFER High Register"
line.long 0x24 "SYNCPT_PAYLOAD,Syncpt Payload Register"
line.long 0x28 "ILLEGAL_ACCESS_INTR,Illegal Access Interrupt Register"
bitfld.long 0x28 0. " CH0_ILLEGAL_ACCESS_INTR        ,Illegal access interrupt" "Not pending,Pending"
line.long 0x2C "ILLEGAL_ACCESS_INTRMASK,Illegal Access Interrupt Mask Register"
bitfld.long 0x2C 0. " CH0_ILLEGAL_ACCESS_INTRMASK    ,Illegal access interrupt mask" "Disabled,Enabled"
line.long 0x30 "SMMU_STREAMID,SMMU StreamMID Register"
hexmask.long.byte 0x30 0.--7. 1. " CH0_SMMU_STREAMID              ,Channel 0 SMMU Stream ID"
line.long 0x34 "MLOCK_BUSY_TIMEOUT,MLOCK Busy Time-out Register"
line.long 0x38 "RSB_NS,RSB NS Register"
bitfld.long 0x38 0. " CH0_RSB_NS                     ,Channel 0 RSB NS" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "Video Image Compositor"
base ad:0x15340000
width 19.
tree "Tegra Host Interface"
group.long 0x00++0x03
line.long 0x00 "INCR_SYNCPT,INCR SYNCPT"
hexmask.long.byte 0x00 10.--17. 1. " NV_PVIC_THI_INCR_SYNCPT_COND                ,Indicates sync point condition at which THI has to return the index value back to host1x"
hexmask.long.word 0x00 0.--9. 1. "           NV_PVIC_THI_INCR_SYNCPT_INDX             ,Indicates the sync point index value, THI will return this index value back to host1x when the particular sync point condition is done"
group.long 0x08++0x07
line.long 0x00 "INCR_SYNCPT_ERR,INCR SYNCPT ERR"
eventfld.long 0x00 1. " NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_OPDONE ,NV PVIC THI INCR SYNCPT ERR COND STS OPDONE" "Not cleared,Cleared"
eventfld.long 0x00 0. "  NV_PVIC_THI_INCR_SYNCPT_ERR_COND_STS_IMM ,NV PVIC THI INCR SYNCPT ERR COND STS IMM" "Not cleared,Cleared"
line.long 0x04 "CTXSW_INCR_SYNCPT,CTXSW INCR SYNCPT"
hexmask.long.word 0x04 0.--9. 1. " NV_PVIC_THI_CTXSW_INCR_SYNCPT_INDX          ,Indicates the sync point index value"
group.long 0x20++0x0B
line.long 0x00 "CTXSW,CTXSW"
hexmask.long.word 0x00 11.--20. 1. " NV_PVIC_THI_CTXSW_CURR_CHANNEL              ,Indicates current working channel of engine"
rbitfld.long 0x00 10. "         NV_PVIC_THI_CTXSW_AUTO_ACK               ,Tells the module to automatically acknowledge any incoming context switch requests without triggering an interrupt" "Disabled,Enabled"
textline "                            "
hexmask.long.word 0x00 0.--9. 1. " NV_PVIC_THI_CTXSW_CURR_CLASS                ,Indicates current working class of engine"
line.long 0x04 "CTXSW_NEXT,CTXSW NEXT"
hexmask.long.word 0x04 10.--19. 1. " NV_PVIC_THI_CTXSW_NEXT_CHANNEL              ,Indicates next requested channel of engine"
hexmask.long.word 0x04 0.--9. 1. "         NV_PVIC_THI_CTXSW_NEXT_CLASS             ,Indicates next requested class of engine"
line.long 0x08 "CONT_SYNCPT_EOF,CONT SYNCPT EOF"
bitfld.long 0x08 10. " NV_PVIC_THI_CONT_SYNCPT_EOF_COND            ,Sync point condition control" "Disabled,Enabled"
hexmask.long.word 0x08 0.--9. 1. "     NV_PVIC_THI_CONT_SYNCPT_EOF_INDEX        ,Sync point counter index"
group.long 0x30++0x0B
line.long 0x00 "STREAMID0,STREAMID0"
hexmask.long.byte 0x00 0.--6. 1. " NV_PVIC_THI_STREAMID0_ID                    ,NV PVIC THI stream ID0 ID"
line.long 0x04 "STREAMID1,STREAMID1"
hexmask.long.byte 0x04 0.--6. 1. " NV_PVIC_THI_STREAMID1_ID                    ,NV PVIC THI stream ID1 ID"
line.long 0x08 "THI_SEC,THI SEC"
bitfld.long 0x08 8. " NV_PVIC_THI_THI_SEC_CH_LOCK                 ,NV PVIC THI THI SEC CH lock" "False,True"
bitfld.long 0x08 4. "        NV_PVIC_THI_THI_SEC_TZ_AUTH              ,NV PVIC THI THI SEC TZ authenticator" "False,True"
textline "                            "
bitfld.long 0x08 0. " NV_PVIC_THI_THI_SEC_TZ_LOCK                 ,NV PVIC THI THI SEC TZ lock" "False,True"
group.long 0x40++0x07
line.long 0x00 "METHOD0,METHOD0"
hexmask.long.word 0x00 0.--11. 1. " NV_PVIC_THI_METHOD0_OFFSET                  ,Contains method ID which is to be sent to Falcon over method interface"
line.long 0x04 "METHOD1,METHOD1"
group.long 0x78++0x07
line.long 0x00 "INT_STATUS,INT Status"
eventfld.long 0x00 0. " NV_PVIC_THI_INT_STATUS_FALCON_INT           ,Implies if there is any pending Falcon interrupt corresponding to an error condition" "Not cleared,Cleared"
line.long 0x04 "INT_MASK,INT Mask"
bitfld.long 0x04 0. " NV_PVIC_THI_INT_MASK_FALCON_INT             ,Enables generation of interrupts corresponding to Falcon error conditions" "Enabled,Disabled"
tree.end
width 13.
tree "HOSTIF Miscellaneous"
group.long 0x1048++0x03
line.long 0x00 "ITFEN,Interface Enable"
bitfld.long 0x00 1. " NV_PVIC_FALCON_ITFEN_MTHDEN                 ,Method interface enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     NV_PVIC_FALCON_ITFEN_CTXEN               ,Context switch interface enable" "Disabled,Enabled"
group.long 0x1100++0x07 "Falcon UCTL Registers"
line.long 0x00 "CPUCTL,CPUCTL"
rbitfld.long 0x00 5. " NV_PVIC_FALCON_CPUCTL_STOPPED               ,CPU is currently in the stopped state" "Not stopped,Stopped"
rbitfld.long 0x00 4. "  NV_PVIC_FALCON_CPUCTL_HALTED             ,CPU is currently in the halted state" "Not stopped,Stopped"
textline "                      "
eventfld.long 0x00 3. " NV_PVIC_FALCON_CPUCTL_HRESET                ,Hard reset" "No reset,Reset"
eventfld.long 0x00 2. "     NV_PVIC_FALCON_CPUCTL_SRESET             ,Soft reset" "No reset,Reset"
textline "                      "
eventfld.long 0x00 1. " NV_PVIC_FALCON_CPUCTL_STARTCPU              ,Set STARTCPU to TRUE to start CPU execution while in a HALTED state" "False,True"
eventfld.long 0x00 0. "        NV_PVIC_FALCON_CPUCTL_IINVAL             ,Set to TRUE to mark all blocks in IMEM except block 0 as INVALID" "False,True"
line.long 0x04 "BOOTVEC,BOOTVEC"
group.long 0x110C++0x13 "Falcon DMA Registers"
line.long 0x00 "DMACTL,DMACTL"
rbitfld.long 0x00 3.--6. " NV_PVIC_FALCON_DMACTL_DMAQ_NUM              ,Valid request number at DMA request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "           NV_PVIC_FALCON_DMACTL_REQUIRE_CTX        ,Valid context loaded before any DMA request" "Not requested,Requested"
line.long 0x04 "DMATRFBASE,DMATRFBASE"
line.long 0x08 "DMATRFMOFFS,IMEM/DMEM Offset For The Transfer"
hexmask.long.word 0x08 0.--15. 1. " NV_PVIC_FALCON_DMATRFMOFFS_OFFS             ,IMEM/DMEM offset for the transfer"
line.long 0x0C "DMATRFCMD,DMATRFCMD"
bitfld.long 0x0C 12.--14. " NV_PVIC_FALCON_DMATRFCMD_CTXDMA             ,NV PVIC FALCON DMATRFCMD CTXDMA" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 8.--10. "            NV_PVIC_FALCON_DMATRFCMD_SIZE            ,NV PVIC FALCON DMATRFCMD size" "4B,8B,16B,32B,64B,128B,256B,?..."
textline "                      "
bitfld.long 0x0C 5. " NV_PVIC_FALCON_DMATRFCMD_WRITE              ,NV PVIC FALCON DMATRFCMD write" "False,True"
bitfld.long 0x0C 4. "        NV_PVIC_FALCON_DMATRFCMD_IMEM            ,NV PVIC FALCON DMATRFCMD IMEM" "False,True"
textline "                      "
rbitfld.long 0x0C 1. " NV_PVIC_FALCON_DMATRFCMD_IDLE               ,DMA engine is still busy with a transfer" "Idle,Busy"
rbitfld.long 0x0C 0. "         NV_PVIC_FALCON_DMATRFCMD_FULL            ,DMA request queue is full" "Not requested,Requested"
line.long 0x10 "DMATRFFBOFFS,Frame Buffer Offset For The Transfer"
tree.end
width 0x0B
tree.end
tree "Display Controller"
base ad:0x54200000
width 36.
tree "Display CMD Registers"
group.long 0x00++0x0B
line.long 0x00 "GENERAL_INCR_SYNCPT_0,General INCR SYNCPT"
hexmask.long.byte 0x00 10.--17. 1. " GENERAL_COND                           ,Condition mapped from raise/wait"
hexmask.long.word 0x00 0.--9. 1. "                   GENERAL_INDX                           ,Synchronization point index value"
line.long 0x04 "GENERAL_INCR_SYNCPT_CNTRL_0,General INCR SYNCPT CNTRL_0"
bitfld.long 0x04 8. " GENERAL_INCR_SYNCPT_NO_STALL           ,General INCR SYNCPT no stall" "Disabled,Enabled"
bitfld.long 0x04 0. "             GENERAL_INCR_SYNCPT_SOFT_RESET         ,General INCR SYNCPT soft reset" "Not reset,Reset"
textline "                                             "
line.long 0x08 "GENERAL_INCR_SYNCPT_ERROR_0,General INCR SYNCPT Error"
eventfld.long 0x08 31. " COND_STATUS[31]                        ,FIFO overflow for COND[31]" "No overflow,Overflow"
eventfld.long 0x08 30. "          [30]                                   ,FIFO overflow for COND[30]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 29. "            [29]                        ,FIFO overflow for COND[29]" "No overflow,Overflow"
eventfld.long 0x08 28. "          [28]                                   ,FIFO overflow for COND[28]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 27. "            [27]                        ,FIFO overflow for COND[27]" "No overflow,Overflow"
eventfld.long 0x08 26. "          [26]                                   ,FIFO overflow for COND[26]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 25. "            [25]                        ,FIFO overflow for COND[25]" "No overflow,Overflow"
eventfld.long 0x08 24. "          [24]                                   ,FIFO overflow for COND[24]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 23. "            [23]                        ,FIFO overflow for COND[23]" "No overflow,Overflow"
eventfld.long 0x08 22. "          [22]                                   ,FIFO overflow for COND[22]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 21. "            [21]                        ,FIFO overflow for COND[21]" "No overflow,Overflow"
eventfld.long 0x08 20. "          [20]                                   ,FIFO overflow for COND[20]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 19. "            [19]                        ,FIFO overflow for COND[19]" "No overflow,Overflow"
eventfld.long 0x08 18. "          [18]                                   ,FIFO overflow for COND[18]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 17. "            [17]                        ,FIFO overflow for COND[17]" "No overflow,Overflow"
eventfld.long 0x08 16. "          [16]                                   ,FIFO overflow for COND[16]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 15. "            [15]                        ,FIFO overflow for COND[15]" "No overflow,Overflow"
eventfld.long 0x08 14. "          [14]                                   ,FIFO overflow for COND[14]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 13. "            [13]                        ,FIFO overflow for COND[13]" "No overflow,Overflow"
eventfld.long 0x08 12. "          [12]                                   ,FIFO overflow for COND[12]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 11. "            [11]                        ,FIFO overflow for COND[11]" "No overflow,Overflow"
eventfld.long 0x08 10. "          [10]                                   ,FIFO overflow for COND[10]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 9. "             [9]                        ,FIFO overflow for COND[9]" "No overflow,Overflow"
eventfld.long 0x08 8. "           [8]                                   ,FIFO overflow for COND[8]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 7. "             [7]                        ,FIFO overflow for COND[7]" "No overflow,Overflow"
eventfld.long 0x08 6. "           [6]                                   ,FIFO overflow for COND[6]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 5. "             [5]                        ,FIFO overflow for COND[5]" "No overflow,Overflow"
eventfld.long 0x08 4. "           [4]                                   ,FIFO overflow for COND[4]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 3. "             [3]                        ,FIFO overflow for COND[3]" "No overflow,Overflow"
eventfld.long 0x08 2. "           [2]                                   ,FIFO overflow for COND[2]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 1. "             [1]                        ,FIFO overflow for COND[1]" "No overflow,Overflow"
eventfld.long 0x08 0. "           [0]                                   ,FIFO overflow for COND[0]" "No overflow,Overflow"
textline "                                             "
group.long 0x20++0x0B
line.long 0x00 "WIN_A_INCR_SYNCPT_0,WIN A INCR SYNCPT"
hexmask.long.byte 0x00 10.--17. 1. " WIN_A_COND                             ,Condition mapped from raise/wait"
hexmask.long.word 0x00 0.--9. 1. "                   WIN_A_INDX                             ,Synchronization point index value"
line.long 0x04 "WIN_A_INCR_SYNCPT_CNTRL_0,WIN A INCR SYNCPT CNTRL_0"
bitfld.long 0x04 8. " WIN_A_INCR_SYNCPT_NO_STALL             ,WIN A INCR SYNCPT no stall" "Disabled,Enabled"
bitfld.long 0x04 0. "             WIN_A_INCR_SYNCPT_SOFT_RESET           ,WIN A INCR SYNCPT soft reset" "Not reset,Reset"
textline "                                             "
line.long 0x08 "WIN_A_INCR_SYNCPT_ERROR_0,WIN A INCR SYNCPT Error"
eventfld.long 0x08 31. " COND_STATUS[31]                        ,FIFO overflow for COND[31]" "No overflow,Overflow"
eventfld.long 0x08 30. "          [30]                                   ,FIFO overflow for COND[30]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 29. "            [29]                        ,FIFO overflow for COND[29]" "No overflow,Overflow"
eventfld.long 0x08 28. "          [28]                                   ,FIFO overflow for COND[28]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 27. "            [27]                        ,FIFO overflow for COND[27]" "No overflow,Overflow"
eventfld.long 0x08 26. "          [26]                                   ,FIFO overflow for COND[26]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 25. "            [25]                        ,FIFO overflow for COND[25]" "No overflow,Overflow"
eventfld.long 0x08 24. "          [24]                                   ,FIFO overflow for COND[24]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 23. "            [23]                        ,FIFO overflow for COND[23]" "No overflow,Overflow"
eventfld.long 0x08 22. "          [22]                                   ,FIFO overflow for COND[22]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 21. "            [21]                        ,FIFO overflow for COND[21]" "No overflow,Overflow"
eventfld.long 0x08 20. "          [20]                                   ,FIFO overflow for COND[20]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 19. "            [19]                        ,FIFO overflow for COND[19]" "No overflow,Overflow"
eventfld.long 0x08 18. "          [18]                                   ,FIFO overflow for COND[18]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 17. "            [17]                        ,FIFO overflow for COND[17]" "No overflow,Overflow"
eventfld.long 0x08 16. "          [16]                                   ,FIFO overflow for COND[16]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 15. "            [15]                        ,FIFO overflow for COND[15]" "No overflow,Overflow"
eventfld.long 0x08 14. "          [14]                                   ,FIFO overflow for COND[14]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 13. "            [13]                        ,FIFO overflow for COND[13]" "No overflow,Overflow"
eventfld.long 0x08 12. "          [12]                                   ,FIFO overflow for COND[12]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 11. "            [11]                        ,FIFO overflow for COND[11]" "No overflow,Overflow"
eventfld.long 0x08 10. "          [10]                                   ,FIFO overflow for COND[10]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 9. "             [9]                        ,FIFO overflow for COND[9]" "No overflow,Overflow"
eventfld.long 0x08 8. "           [8]                                   ,FIFO overflow for COND[8]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 7. "             [7]                        ,FIFO overflow for COND[7]" "No overflow,Overflow"
eventfld.long 0x08 6. "           [6]                                   ,FIFO overflow for COND[6]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 5. "             [5]                        ,FIFO overflow for COND[5]" "No overflow,Overflow"
eventfld.long 0x08 4. "           [4]                                   ,FIFO overflow for COND[4]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 3. "             [3]                        ,FIFO overflow for COND[3]" "No overflow,Overflow"
eventfld.long 0x08 2. "           [2]                                   ,FIFO overflow for COND[2]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 1. "             [1]                        ,FIFO overflow for COND[1]" "No overflow,Overflow"
eventfld.long 0x08 0. "           [0]                                   ,FIFO overflow for COND[0]" "No overflow,Overflow"
textline "                                             "
group.long 0x40++0x0B
line.long 0x00 "WIN_B_INCR_SYNCPT_0,WIN B INCR SYNCPT"
hexmask.long.byte 0x00 10.--17. 1. " WIN_B_COND                             ,Condition mapped from raise/wait"
hexmask.long.word 0x00 0.--9. 1. "                   WIN_B_INDX                             ,Synchronization point index value"
line.long 0x04 "WIN_B_INCR_SYNCPT_CNTRL_0,WIN B INCR SYNCPT CNTRL_0"
bitfld.long 0x04 8. " WIN_B_INCR_SYNCPT_NO_STALL             ,WIN B INCR SYNCPT no stall" "Disabled,Enabled"
bitfld.long 0x04 0. "             WIN_B_INCR_SYNCPT_SOFT_RESET           ,WIN B INCR SYNCPT soft reset" "Not reset,Reset"
textline "                                             "
line.long 0x08 "WIN_B_INCR_SYNCPT_ERROR_0,WIN B INCR SYNCPT Error"
eventfld.long 0x08 31. " COND_STATUS[31]                        ,FIFO overflow for COND[31]" "No overflow,Overflow"
eventfld.long 0x08 30. "          [30]                                   ,FIFO overflow for COND[30]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 29. "            [29]                        ,FIFO overflow for COND[29]" "No overflow,Overflow"
eventfld.long 0x08 28. "          [28]                                   ,FIFO overflow for COND[28]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 27. "            [27]                        ,FIFO overflow for COND[27]" "No overflow,Overflow"
eventfld.long 0x08 26. "          [26]                                   ,FIFO overflow for COND[26]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 25. "            [25]                        ,FIFO overflow for COND[25]" "No overflow,Overflow"
eventfld.long 0x08 24. "          [24]                                   ,FIFO overflow for COND[24]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 23. "            [23]                        ,FIFO overflow for COND[23]" "No overflow,Overflow"
eventfld.long 0x08 22. "          [22]                                   ,FIFO overflow for COND[22]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 21. "            [21]                        ,FIFO overflow for COND[21]" "No overflow,Overflow"
eventfld.long 0x08 20. "          [20]                                   ,FIFO overflow for COND[20]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 19. "            [19]                        ,FIFO overflow for COND[19]" "No overflow,Overflow"
eventfld.long 0x08 18. "          [18]                                   ,FIFO overflow for COND[18]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 17. "            [17]                        ,FIFO overflow for COND[17]" "No overflow,Overflow"
eventfld.long 0x08 16. "          [16]                                   ,FIFO overflow for COND[16]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 15. "            [15]                        ,FIFO overflow for COND[15]" "No overflow,Overflow"
eventfld.long 0x08 14. "          [14]                                   ,FIFO overflow for COND[14]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 13. "            [13]                        ,FIFO overflow for COND[13]" "No overflow,Overflow"
eventfld.long 0x08 12. "          [12]                                   ,FIFO overflow for COND[12]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 11. "            [11]                        ,FIFO overflow for COND[11]" "No overflow,Overflow"
eventfld.long 0x08 10. "          [10]                                   ,FIFO overflow for COND[10]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 9. "             [9]                        ,FIFO overflow for COND[9]" "No overflow,Overflow"
eventfld.long 0x08 8. "           [8]                                   ,FIFO overflow for COND[8]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 7. "             [7]                        ,FIFO overflow for COND[7]" "No overflow,Overflow"
eventfld.long 0x08 6. "           [6]                                   ,FIFO overflow for COND[6]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 5. "             [5]                        ,FIFO overflow for COND[5]" "No overflow,Overflow"
eventfld.long 0x08 4. "           [4]                                   ,FIFO overflow for COND[4]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 3. "             [3]                        ,FIFO overflow for COND[3]" "No overflow,Overflow"
eventfld.long 0x08 2. "           [2]                                   ,FIFO overflow for COND[2]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 1. "             [1]                        ,FIFO overflow for COND[1]" "No overflow,Overflow"
eventfld.long 0x08 0. "           [0]                                   ,FIFO overflow for COND[0]" "No overflow,Overflow"
textline "                                             "
group.long 0x60++0x0B
line.long 0x00 "WIN_C_INCR_SYNCPT_0,WIN C INCR SYNCPT"
hexmask.long.byte 0x00 10.--17. 1. " WIN_C_COND                             ,Condition mapped from raise/wait"
hexmask.long.word 0x00 0.--9. 1. "                   WIN_C_INDX                             ,Synchronization point index value"
line.long 0x04 "WIN_C_INCR_SYNCPT_CNTRL_0,WIN C INCR SYNCPT CNTRL_0"
bitfld.long 0x04 8. " WIN_C_INCR_SYNCPT_NO_STALL             ,WIN C INCR SYNCPT no stall" "Disabled,Enabled"
bitfld.long 0x04 0. "             WIN_C_INCR_SYNCPT_SOFT_RESET           ,WIN C INCR SYNCPT soft reset" "Not reset,Reset"
textline "                                             "
line.long 0x08 "WIN_C_INCR_SYNCPT_ERROR_0,WIN C INCR SYNCPT Error"
eventfld.long 0x08 31. " COND_STATUS[31]                        ,FIFO overflow for COND[31]" "No overflow,Overflow"
eventfld.long 0x08 30. "          [30]                                   ,FIFO overflow for COND[30]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 29. "            [29]                        ,FIFO overflow for COND[29]" "No overflow,Overflow"
eventfld.long 0x08 28. "          [28]                                   ,FIFO overflow for COND[28]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 27. "            [27]                        ,FIFO overflow for COND[27]" "No overflow,Overflow"
eventfld.long 0x08 26. "          [26]                                   ,FIFO overflow for COND[26]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 25. "            [25]                        ,FIFO overflow for COND[25]" "No overflow,Overflow"
eventfld.long 0x08 24. "          [24]                                   ,FIFO overflow for COND[24]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 23. "            [23]                        ,FIFO overflow for COND[23]" "No overflow,Overflow"
eventfld.long 0x08 22. "          [22]                                   ,FIFO overflow for COND[22]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 21. "            [21]                        ,FIFO overflow for COND[21]" "No overflow,Overflow"
eventfld.long 0x08 20. "          [20]                                   ,FIFO overflow for COND[20]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 19. "            [19]                        ,FIFO overflow for COND[19]" "No overflow,Overflow"
eventfld.long 0x08 18. "          [18]                                   ,FIFO overflow for COND[18]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 17. "            [17]                        ,FIFO overflow for COND[17]" "No overflow,Overflow"
eventfld.long 0x08 16. "          [16]                                   ,FIFO overflow for COND[16]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 15. "            [15]                        ,FIFO overflow for COND[15]" "No overflow,Overflow"
eventfld.long 0x08 14. "          [14]                                   ,FIFO overflow for COND[14]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 13. "            [13]                        ,FIFO overflow for COND[13]" "No overflow,Overflow"
eventfld.long 0x08 12. "          [12]                                   ,FIFO overflow for COND[12]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 11. "            [11]                        ,FIFO overflow for COND[11]" "No overflow,Overflow"
eventfld.long 0x08 10. "          [10]                                   ,FIFO overflow for COND[10]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 9. "             [9]                        ,FIFO overflow for COND[9]" "No overflow,Overflow"
eventfld.long 0x08 8. "           [8]                                   ,FIFO overflow for COND[8]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 7. "             [7]                        ,FIFO overflow for COND[7]" "No overflow,Overflow"
eventfld.long 0x08 6. "           [6]                                   ,FIFO overflow for COND[6]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 5. "             [5]                        ,FIFO overflow for COND[5]" "No overflow,Overflow"
eventfld.long 0x08 4. "           [4]                                   ,FIFO overflow for COND[4]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 3. "             [3]                        ,FIFO overflow for COND[3]" "No overflow,Overflow"
eventfld.long 0x08 2. "           [2]                                   ,FIFO overflow for COND[2]" "No overflow,Overflow"
textline "                                             "
eventfld.long 0x08 1. "             [1]                        ,FIFO overflow for COND[1]" "No overflow,Overflow"
eventfld.long 0x08 0. "           [0]                                   ,FIFO overflow for COND[0]" "No overflow,Overflow"
textline "                                             "
group.long 0xA0++0x03
line.long 0x00 "CONT_SYNCPT_VSYNC_0,CONT SYNCPT VSYNC"
bitfld.long 0x00 31. " VSYNC_EN                               ,Vsync Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "             VSYNC_INDX                             ,Return INDX"
rgroup.long 0xBC++0x03
line.long 0x00 "CTXSW_NEXT_0,CTXSW Next"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL                           ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "                 NEXT_CLASS                             ,Next requested class"
group.long 0xC0++0x03
line.long 0x00 "CTXSW_0,Context Switch Registers For Class And Channel"
hexmask.long.word 0x00 11.--20. 1. " CURR_CHANNEL                           ,Current working channel"
bitfld.long 0x00 10. "                 AUTO_ACK                               ,Automatically acknowledge any incoming context switch requests" "Manual,AutoACK"
textline "                                             "
hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS                             ,Current working class"
group.long 0xC4++0x03
line.long 0x00 "DISPLAY_COMMAND_OPTION0_0,Display Controller Option 0"
bitfld.long 0x00 1. " MSF_ENABLE                             ,Main-display stop frame (MSF) input" "Disabled,Enabled"
bitfld.long 0x00 0. "             MSF_POLARITY                           ,Main-display stop frame (MSF) polarity" "Active high,Active low"
group.long 0xC8++0x03
line.long 0x00 "DISPLAY_COMMAND_0,Display Command"
bitfld.long 0x00 5.--6. " DISPLAY_CTRL_MODE                      ,Display controller mode" "Stop,Continuous,Non-Continuous,?..."
rgroup.long 0xCC++0x03
line.long 0x00 "REG_PFE_HEAD_DEBUG_0,Register Parker Front End Head Debug"
bitfld.long 0x00 31. " HEAD_STALLED                           ,Head stalled" "No,Yes"
bitfld.long 0x00 30. "                  HEAD_AWAKE                             ,Head awake" "No,Yes"
textline "                                             "
bitfld.long 0x00 29. " SLCG_RG_PCLK_EN                        ,Second level clock gating RG PCLK enable" "No,Yes"
bitfld.long 0x00 28. "                  SLCG_DISPCLK_RG_EN                     ,Second level clock gating DISPCLK RG enable" "No,Yes"
textline "                                             "
bitfld.long 0x00 27. " SLCG_DISPCLK_HEAD_EN                   ,Second level clock gating DISPCLK head enable" "No,Yes"
hexmask.long.word 0x00 18.--26. 1. "                  ACT_REQ_MASK                           ,Activation request mask"
textline "                                             "
bitfld.long 0x00 15.--17. " SEQSM2                                 ,Sequence system management 2" "Idle,Wait SEQSM1,Wait loadv ACK,Calc FD,Wait FD,Wait SF ACK,?..."
bitfld.long 0x00 12.--14. "       SEQSM1                                 ,Sequence system management 1" "Idle,Wait LVRET,Wait SUSP,Wait ACK,Unsusp ACK,?..."
textline "                                             "
bitfld.long 0x00 11. " RG_RESPFIFO_RD_REQ                     ,RG response FIFO read request" "No,Yes"
bitfld.long 0x00 10. "                  RG_REQFIFO_WR_BUSY                     ,RG request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 9. " RG_ALIVE_LAST                          ,RG alive last" "No,Yes"
bitfld.long 0x00 8. "                  RG_ALIVE                               ,RG alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 7. " CURSOR_PRECOMP_RESPFIFO_RD_REQ         ,Cursor PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 6. "                  CURSOR_PRECOMP_REQFIFO_WR_BUSY         ,Cursor PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 5. " CURSOR_PRECOMP_ALIVE_LAST              ,Cursor PRECOMP alive last" "No,Yes"
bitfld.long 0x00 4. "                  CURSOR_PRECOMP_ALIVE                   ,Cursor PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 3. " POSTCOMP_RESPFIFO_RD_REQ               ,POSTCOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 2. "                  POSTCOMP_REQFIFO_WR_BUSY               ,POSTCOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 1. " POSTCOMP_ALIVE_LAST                    ,POSTCOMP alive last" "No,Yes"
bitfld.long 0x00 0. "                  POSTCOMP_ALIVE                         ,POSTCOMP alive" "No,Yes"
group.long 0xDC++0x13
line.long 0x00 "INT_STATUS_0,Display Interrupt and Status"
eventfld.long 0x00 29. " DSC_TO_UF_INT                          ,DSC to underflow interrupt status" "Not pending,pending"
eventfld.long 0x00 28. "          DSC_BBUF_UF_INT                        ,DSC BBUF underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 27. " DSC_RBUF_UF_INT                        ,DSC RBUF underflow interrupt status" "Not pending,pending"
eventfld.long 0x00 26. "          DSC_OBUF_UF_INT                        ,DSC OBUF underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 24. " SD3_BUCKET_WALK_DONE_INT               ,Head smart dimmer interrupt status" "Not pending,pending"
eventfld.long 0x00 23. "          HC_UF_INT                              ,Cursor underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 12. " MSF_INT                                ,Main-display stop frame interrupt status" "Not pending,pending"
eventfld.long 0x00 7. "          REG_TMOUT_INT                          ,Register read/write (RBLK) timeout" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 6. " REGION_CRC_INT                         ,Regional CRC interrupt" "Not pending,pending"
eventfld.long 0x00 5. "          V_PULSE2_INT                           ,Vertical pulse 2 interrupt" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 4. " V_PULSE3_INT                           ,Vertical pulse 3 interrupt" "Not pending,pending"
eventfld.long 0x00 2. "          V_BLANK_INT                            ,Vertical blank interrupt" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 1. " FRAME_END_INT                          ,Frame end interrupt" "Not pending,pending"
line.long 0x04 "INT_MASK_0,Interrupt Mask"
bitfld.long 0x04 29. " DSC_TO_UF_INT_MASK                     ,DSC to underflow interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 28. "             DSC_BBUF_UF_INT_MASK                   ,DSC BBUF underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 27. " DSC_RBUF_UF_INT_MASK                   ,DSC RBUF underflow interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 26. "             DSC_OBUF_UF_INT_MASK                   ,DSC OBUF underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 24. " DSC_OBUF_UF_INT_MASK                   ,Interrupts for the DSC" "Masked,Unmasked"
bitfld.long 0x04 23. "             HEAD_UF_INT_MASK                       ,Head underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 12. " MSF_INT_MASK                           ,Main-display stop frame interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 7. "             REG_TMOUT_INT_MASK                     ,Register read/write (RBLK) timeout interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 6. " REGION_CRC_INT_MASK                    ,Regional CRC interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 5. "             V_PULSE2_INT_MASK                      ,Vertical pulse 2 interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 4. " V_PULSE3_INT_MASK                      ,Vertical pulse 3 interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 2. "             V_BLANK_INT_MASK                       ,Vertical blank interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 1. " FRAME_END_INT_MASK                     ,Frame end interrupt mask" "Masked,Unmasked"
line.long 0x08 "INT_ENABLE_0,Interrupt Enable"
bitfld.long 0x08 29. " DSC_TO_UF_INT_ENABLE                   ,DSC to underflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 28. "             DSC_BBUF_UF_INT_ENABLE                 ,DSC BBUF underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. " DSC_RBUF_UF_INT_ENABLE                 ,DSC RBUF underflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 26. "             DSC_OBUF_UF_INT_ENABLE                 ,DSC OBUF underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 24. " SD3_BUCKET_WALK_DONE_INT_ENABLE        ,Head smart dimmer interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 23. "             HC_UF_INT_ENABLE                       ,Head underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 12. " MSF_INT_ENABLE                         ,Main-display stop frame interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 7. "             REG_TMOUT_INT_ENABLE                   ,Register read/write (RBLK) timeout interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 6. " REGION_CRC_INT_ENABLE                  ,Regional CRC interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             V_PULSE2_INT_ENABLE                    ,Vertical pulse 2 interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 4. " V_PULSE3_INT_ENABLE                    ,Vertical pulse 3 interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             V_BLANK_INT_ENABLE                     ,Vertical blank interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. " FRAME_END_INT_ENABLE                   ,Frame end interrupt enable" "Disabled,Enabled"
line.long 0x0C "INT_TYPE_0,Interrupt Type"
bitfld.long 0x0C 29. " DSC_TO_UF_INT_TYPE                     ,DSC to underflow interrupt type" "Edge,Level"
bitfld.long 0x0C 28. "                DSC_BBUF_UF_INT_TYPE                   ,DSC BBUF underflow interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 27. " DSC_RBUF_UF_INT_TYPE                   ,DSC RBUF underflow interrupt type" "Edge,Level"
bitfld.long 0x0C 26. "                DSC_OBUF_UF_INT_TYPE                   ,Interrupts for the DSC" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 24. " SD3_BUCKET_WALK_DONE_INT_TYPE          ,Head smart dimmer interrupt type" "Edge,Level"
bitfld.long 0x0C 23. "                HEAD_UF_INT_TYPE                       ,Head underflow interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 12. " MSF_INT_TYPE                           ,Main-display stop frame interrupt type" "Edge,Level"
bitfld.long 0x0C 7. "                REG_TMOUT_INT_TYPE                     ,Register read/write (RBLK) timeout interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 6. " REGION_CRC_INT_TYPE                    ,Regional CRC interrupt type" "Edge,Level"
bitfld.long 0x0C 5. "                V_PULSE2_INT_TYPE                      ,Vertical pulse 2 interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 4. " V_PULSE3_INT_TYPE                      ,Vertical Pulse 3 Interrupt Type" "Edge,Level"
bitfld.long 0x0C 2. "                V_BLANK_INT_TYPE                       ,Vertical blank interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 1. " FRAME_END_INT_TYPE                     ,Frame End interrupt type" "Edge,Level"
line.long 0x10 "INT_POLARITY_0,Interrupt Polarity"
bitfld.long 0x10 29. " DSC_TO_UF_INT_POLARITY                 ,DSC to underflow interrupt polarity" "Low,High"
bitfld.long 0x10 28. "                 DSC_BBUF_UF_INT_POLARITY               ,DSC BBUF underflow interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 27. " DSC_RBUF_UF_INT_POLARITY               ,DSC RBUF underflow interrupt polarity" "Low,High"
bitfld.long 0x10 26. "                 DSC_OBUF_UF_INT_POLARITY               ,Interrupts for the DSC" "Low,High"
textline "                                             "
bitfld.long 0x10 24. " SD3_BUCKET_WALK_DONE_INT_POLARITY      ,Head smart dimmer interrupt polarity" "Low,High"
bitfld.long 0x10 23. "                 HEAD_UF_INT_POLARITY                   ,Head underflow interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 12. " MSF_INT_POLARITY                       ,Main-display stop frame interrupt polarity" "Low,High"
bitfld.long 0x10 7. "                 REG_TMOUT_INT_POLARITY                 ,Register read/write (RBLK) timeout interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 6. " REGION_CRC_INT_POLARITY                ,Regional CRC interrupt Polarity" "Low,High"
bitfld.long 0x10 5. "                 V_PULSE2_INT_POLARITY                  ,Vertical pulse 2 interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 4. " V_PULSE3_INT_POLARITY                  ,Vertical pulse 3 interrupt polarity" "Low,High"
bitfld.long 0x10 2. "                 V_BLANK_INT_POLARITY                   ,Vertical blank interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 1. " FRAME_END_INT_POLARITY                 ,Frame end interrupt polarity" "Low,High"
group.long 0x100++0x03
line.long 0x00 "STATE_ACCESS_0,Double/Triple Buffers Read And Write Access Control"
bitfld.long 0x00 2. " WRITE_MUX                              ,Write access control" "Assembly,Active"
bitfld.long 0x00 0. "             READ_MUX                               ,Read access control" "Assembly,Active"
group.long 0x104++0x03
line.long 0x00 "STATE_CONTROL_0,State Control for Activating/Arming New Register State"
bitfld.long 0x00 24. " NC_HOST_TRIG_ENABLE                    ,Host trigger enable" "Disabled,Enabled"
bitfld.long 0x00 17. "             COMMON_UPDATE                          ,Trigger for arming state in the common channel" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 16. " COMMON_ACT_REQ                         ,Common channel state in the common channel is shared between heads" "Disabled,Enabled"
bitfld.long 0x00 15. "             CURSOR_UPDATE                          ,Trigger for the arming state for a subset of the triple buffered registers" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 14. " WIN_F_UPDATE                           ,Trigger for arming state for the win F subset of the triple buffered registers" "Disabled,Enabled"
bitfld.long 0x00 13. "             WIN_E_UPDATE                           ,Trigger for the arming state for the win E subset of the triple buffered registers" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 12. " WIN_D_UPDATE                           ,Trigger for the arming state for the win D subset of the triple buffered registers" "Disabled,Enabled"
bitfld.long 0x00 11. "             WIN_C_UPDATE                           ,Trigger for arming state for the win C subset of the triple buffered registers" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 10. " WIN_B_UPDATE                           ,Trigger for arming state for the win B subset of the triple buffered registers" "Disabled,Enabled"
bitfld.long 0x00 9. "             WIN_A_UPDATE                           ,rigger for arming state for the win A subset of the triple buffered registers" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 8. " GENERAL_UPDATE                         ,Trigger for arming state for a subset of the triple buffered registers" "Disabled,Enabled"
bitfld.long 0x00 7. "             CURSOR_ACT_REQ                         ,Non-window specific" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 6. " WIN_F_ACT_REQ                          ,Window F activation request" "Disabled,Enabled"
bitfld.long 0x00 5. "             WIN_E_ACT_REQ                          ,Window E activation request" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 4. " WIN_D_ACT_REQ                          ,Window D activation request" "Disabled,Enabled"
bitfld.long 0x00 3. "             WIN_C_ACT_REQ                          ,Window C activation request" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 2. " WIN_B_ACT_REQ                          ,Window B activation request" "Disabled,Enabled"
bitfld.long 0x00 1. "             WIN_A_ACT_REQ                          ,Window A activation request" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 0. " GENERAL_ACT_REQ                        ,Non-window-specific" "Disabled,Enabled"
group.long 0x108++0x03
line.long 0x00 "DISPLAY_WINDOW_HEADER_0,Display Window Programming Header"
bitfld.long 0x00 9. " WINDOW_F_SELECT                        ,Enable window F programming" "Disabled,Enabled"
bitfld.long 0x00 8. "             WINDOW_E_SELECT                        ,Enable window E programming" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. " WINDOW_D_SELECT                        ,Enable window D programming" "Disabled,Enabled"
bitfld.long 0x00 6. "             WINDOW_C_SELECT                        ,Enable window C programming" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. " WINDOW_B_SELECT                        ,Enable window B programming" "Disabled,Enabled"
bitfld.long 0x00 4. "             WINDOW_A_SELECT                        ,Enable window A programming" "Disabled,Enabled"
group.long 0x110++0x07
line.long 0x00 "WIN_T_STATE_CONTROL_0,WIN_T State Control Register For Activating/Arming New Register State"
bitfld.long 0x00 8. " WIN_T_UPDATE                           ,Trigger for the arming state for the win T subset of the triple buffered registers" "No Trigger,Trigger"
bitfld.long 0x00 0. "           WIN_T_ACT_REQ                          ,Request pending" "Not requested,Requested"
line.long 0x04 "SECURE_CONTROL_0,Secure Control Register For Secure OS Overrides"
bitfld.long 0x04 16. " SECURE_SOR1_PROTECT                    ,Blanks the display output to SOR1" "Disabled,Enabled"
bitfld.long 0x04 15. "             SECURE_SOR_PROTECT                     ,Blanks the display output to SOR" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x04 14. " SECURE_DSID_PROTECT                    ,Blanks the display output to DSID" "Disabled,Enabled"
bitfld.long 0x04 13. "             SECURE_DSIC_PROTECT                    ,Blanks the display output to DSIC" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x04 12. " SECURE_DSIB_PROTECT                    ,Blanks the display output to DSIB" "Disabled,Enabled"
bitfld.long 0x04 11. "             SECURE_DSIA_PROTECT                    ,Blanks the display output to DSIA" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x04 9. " SECURE_READ_MUX                        ,Controls which of the double-buffered window registers are read in TZ secure mode" "ASSEMBLY,ACTIVE"
bitfld.long 0x04 8. "             SECURE_WRITE_MUX                       ,Controls which of the double-buffered window registers are written in TZ secure mode" "ASSEMBLY,ACTIVE"
textline "                                             "
bitfld.long 0x04 2. " SECURE_CRC_PROTECT                     ,Disable CRC computation" "No,Yes"
bitfld.long 0x04 1. "                  SECURE_CMU_PROTECT                     ,Output LUT is bypassed" "Disabled,Enabled"
group.long 0x118++0x03
line.long 0x00 "REG_ACCESS_CONTROL_0,Register Access Control"
bitfld.long 0x00 31. " WINDOW_ACCESS_VIOLATION                ,Window access violation" "None,Pending"
eventfld.long 0x00 15. "              TMOUT                                  ,Timeout" "None,Pending"
textline "                                             "
hexmask.long.word 0x00 0.--14. 1. " TMOUT_VAL                              ,Timeout value"
if (((per.l(ad:0x54200000+0x118))&0x80000000)==0x80000000)
rgroup.long 0x11C++0x03
line.long 0x00 "REG_WINDOW_ACCESS_VIOLATION_INFO_0,Register Window Access Violation Info"
bitfld.long 0x00 25. " RWN                                    ,RWN" "Write,Read"
bitfld.long 0x00 24. "                COR                                    ,COR" "Class,Register"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Offset"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "REG_WINDOW_ACCESS_VIOLATION_INFO_0,Register Window Access Violation Info"
endif
rgroup.long 0x124++0x03
line.long 0x00 "REG_PFE_DEBUG_CHN_MASK_0,Register Parker Front End Debug Channel Mask"
bitfld.long 0x00 30. " SLCG_DISPCLK_COMP_EN                   ,Second level clock gating display clock COMP enable" "Disabled,Enabled"
bitfld.long 0x00 29. "             SLCG_HUBCLK_EN                         ,Second level clock gating HUB clock enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 28. " SUSP_REQ                               ,SUSP request" "Not requested,Requested"
hexmask.long.word 0x00 14.--27. 1. "        CURR_VFLIP_REQ_MASK                    ,CURR VFLIP request mask"
textline "                                             "
hexmask.long.word 0x00 0.--13. 1. " CURR_VFLIP_CHN_MASK                    ,CURR VFLIP channel mask"
rgroup.long 0x140++0x07
line.long 0x00 "POSTCOMP_HEAD_CAPA_0,POSTCOMP Head Capabilities A"
bitfld.long 0x00 8. " TZ                                     ,POSTCOMP pipe has a TrustZone" "False,True"
bitfld.long 0x00 7. "                LUT_LOCATION                           ,POSTCOMP pipe the LUT is located" "Early,Late"
textline "                                             "
bitfld.long 0x00 5.--6. " LUT_TYPE                               ,Type LUT" "None,Size_257,Size_1025,?..."
bitfld.long 0x00 4. "            YUV422                                 ,Reports whether POSTCOMP has chroma decimator to support YUV422 output" "False,True"
textline "                                             "
bitfld.long 0x00 3. " OCSC                                   ,Reports whether POSTCOMP has RGB to YUV 444 conversion block" "False,True"
bitfld.long 0x00 2. "                HSAT                                   ,Reports whether POSTCOMP has hue/saturation adjustment block" "False,True"
textline "                                             "
bitfld.long 0x00 1. " SCALER_HAS_YUV422                      ,Reports whether POSTCOMP scaler can support YUV422 mode" "False,True"
bitfld.long 0x00 0. "                SCALER                                 ,Reports whether POSTCOMP pipe has scaler or not" "False,True"
line.long 0x04 "POSTCOMP_HEAD_CAPB_0,POSTCOMP Head Capabilities B"
hexmask.long.word 0x04 16.--31. 1. " MAX_PIXELS_5TAP422                     ,Maximum stored pixels for 5 vertical tap filtering at reduced 422 bandwidth"
hexmask.long.word 0x04 0.--15. 1. "                 MAX_PIXELS_5TAP444                     ,Maximum stored pixels for 5 vertical tap filtering at full 444 bandwidth"
rgroup.long 0x148++0x03
line.long 0x00 "POSTCOMP_HEAD_CAPC_0,POSTCOMP Head Capabilities C"
hexmask.long.word 0x00 16.--31. 1. " MAX_PIXELS_3TAP422                     ,Maximum stored pixels for 3 vertical tap filtering at reduced 422 bandwidth"
hexmask.long.word 0x00 0.--15. 1. "                 MAX_PIXELS_3TAP444                     ,Maximum stored pixels for 3 vertical tap filtering at full 444 bandwidth"
rgroup.long 0x14C++0x03
line.long 0x00 "POSTCOMP_HEAD_CAPD_0,POSTCOMP Head Capabilities D"
hexmask.long.word 0x00 16.--31. 1. " MAX_PIXELS_2TAP422                     ,Maximum stored pixels for 3 vertical tap filtering at reduced 422 bandwidth"
hexmask.long.word 0x00 0.--15. 1. "                 MAX_PIXELS_2TAP444                     ,Maximum stored pixels for 3 vertical tap filtering at full 444 bandwidth"
rgroup.long 0x150++0x03
line.long 0x00 "POSTCOMP_HEAD_CAPE_0,POSTCOMP Head Capabilities E"
hexmask.long.word 0x00 16.--31. 1. " MAX_PIXELS_1TAP422                     ,Maximum stored pixels for 3 vertical tap filtering at reduced 422 bandwidth"
hexmask.long.word 0x00 0.--15. 1. "                 MAX_PIXELS_1TAP444                     ,Maximum stored pixels for 3 vertical tap filtering at full 444 bandwidth"
rgroup.long 0x154++0x03
line.long 0x00 "POSTCOMP_HEAD_CAPF_0,POSTCOMP Head Capabilities F"
bitfld.long 0x00 28.--31. " TZ_WIDTH                               ,TrustZone width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 24.--27. "              OLPF_WIDTH                             ,OLPF width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                             "
bitfld.long 0x00 20.--23. " OCSC_WIDTH                             ,OCSC width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "              LUT_WIDTH                              ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " HSAT_WIDTH                             ,HSAT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "              SCLR_WIDTH                             ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " UNIT_WIDTH                             ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "              FULL_WIDTH                             ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
rgroup.long 0x180++0x0F
line.long 0x00 "IHUB_COMMON_CAPA_0,ISO HUB Common Capabilities A"
bitfld.long 0x00 30.--31. " REQUEST_SIZE_PER_LINE_NON_ROTATION     ,Request size per line non rotation" "Size 32B,Size 64B,Size 128B,Size 256B"
bitfld.long 0x00 28.--29. "            REQUEST_SIZE_PER_LINE_ROTATION         ,Request size per line rotation" "Size 16B,Size 32B,Size 64B,Size 128B"
textline "                                             "
bitfld.long 0x00 27. " SUPPORT_TRUSTZONE_WINDOW               ,Support TrustZone window" "False,True"
bitfld.long 0x00 26. "                SUPPORT_LATENCY_EVENT                  ,Support latency event" "False,True"
textline "                                             "
bitfld.long 0x00 24. " SUPPORT_ASR                            ,Support aggressive self refresh" "False,True"
bitfld.long 0x00 23. "                SUPPORT_MCLK_SWITCH                    ,Support MCLK switch" "False,True"
textline "                                             "
bitfld.long 0x00 22. " SUPPORT_MSPG                           ,Support memory system power gating" "False,True"
bitfld.long 0x00 21. "                SUPPORT_MEMPOOL_COMPRESSION            ,Support Mempool compression" "False,True"
textline "                                             "
bitfld.long 0x00 20. " SUPPORT_VGA                            ,Support VGA" "False,True"
bitfld.long 0x00 19. "                SUPPORT_PLANAR                         ,Support planar" "False,True"
textline "                                             "
bitfld.long 0x00 18. " SUPPORT_ROTATION                       ,Support rotation" "False,True"
bitfld.long 0x00 16.--17. "                MEMPOOL_ENTRY_WIDTH                    ,Conveys to the software the width of each mempool entry in bytes" "Size 32B,Size 64B,Size 128B,Size 256B"
textline "                                             "
hexmask.long.word 0x00 0.--15. 1. " MEMPOOL_ENTRIES                        ,Conveys to the software the total size of the latency memory pool in terms of MEMPOOL_ENTRY_WIDTH entries"
line.long 0x04 "IHUB_COMMON_CAPB_0,ISO HUB Common Capabilities B"
bitfld.long 0x04 24.--29. " MAX_PACKED_422_ROTATION_THREAD_GROUPS  ,Packed 422 YUV rotation window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 18.--23. "                   MAX_PACKED_1BPP_ROTATION_THREAD_GROUPS ,Packed 1BPP (1 bytes per pixel) rotation window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                             "
bitfld.long 0x04 12.--17. " MAX_PACKED_2BPP_ROTATION_THREAD_GROUPS ,Packed 2BPP (2 bytes per pixel) rotation window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 6.--11. "                   MAX_SEMI_PLANAR_ROTATION_THREAD_GROUPS ,Semi-planar rotation window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                             "
bitfld.long 0x04 0.--5. " MAX_PLANAR_ROTATION_THREAD_GROUPS      ,Planar rotation window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "IHUB_COMMON_CAPC_0,ISO HUB Common Capabilities C"
bitfld.long 0x08 8.--10. " CLEAR_RECTANGLES_PER_SURFACE           ,Indicates the number of clear rectangles supported per surface" "None,One,Two,Three,Four,?..."
bitfld.long 0x08 4.--6. "                MAX_LINES_BUFFERED                     ,Indicates the total number of lines that can be buffered on any stream" "None,Two,Four,Eight,Sixteen,?..."
textline "                                             "
bitfld.long 0x08 0.--1. " PITCH_REQUEST_SIZE                     ,It tells the default request size for PL surface" "Size 32B,Size 64B,Size 128B,Size 256B"
line.long 0x0C "IHUB_COMMON_CAPD_0,ISO HUB Common Capabilities D"
hexmask.long.word 0x0C 16.--31. 1. " RDOUT_BUFFER_SIZE                      ,Size of RDOUT buffer in terms of bytes"
hexmask.long.word 0x0C 0.--15. 1. "                 REORDER_BUFFER_DEPTH                   ,Depth of re-order buffer in MC/FB"
group.long 0x19C++0x03
line.long 0x00 "IHUB_COMMON_CONFIG_0,ISO HUB Common Config"
bitfld.long 0x00 0.--2. " REQUEST_BATCH_SIZE                     ,Request batch size" "Size 1,Size 2,Size 4,Size 8,Size 16,Size 32,?..."
group.long 0x1A0++0x03
line.long 0x00 "IHUB_COMMON_MISC_CTL_0,ISO HUB Common Miscellaneous Control"
bitfld.long 0x00 31. " FETCH_METER                            ,Fetch meter" "Disabled,Enabled"
bitfld.long 0x00 30. "             REQ_LIMIT                              ,Request limit" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. " CRITICAL                               ,Critical" "Disabled,Enabled"
bitfld.long 0x00 3. "             LATENCY_EVENT                          ,Latency event" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 2. " MSPG                                   ,Memory system power gating" "Disabled,Enabled"
bitfld.long 0x00 1. "             SWITCH                                 ,Switch" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 0. " ASR                                    ,Aggressive self refresh" "Disabled,Enabled"
if (((per.l(ad:0x54200000+0x1A4))&0x01)==0x01)
group.long 0x1A4++0x03
line.long 0x00 "IHUB_COMMON_MISC_EMERGENCY_0,ISO HUB Common Miscellaneous Emergency"
rbitfld.long 0x00 1. " STOPPED                                ,Indicates desired stop has been achieved" "No,Yes"
bitfld.long 0x00 0. "                  STOP                                   ,Stop making any new requests to memory" "Disabled,Enabled"
else
group.long 0x1A4++0x03
line.long 0x00 "IHUB_COMMON_MISC_EMERGENCY_0,ISO HUB Common Miscellaneous Emergency"
bitfld.long 0x00 0. " STOP                                   ,Stop making any new requests to memory" "Disabled,Enabled"
endif
group.long 0x1C0++0x03
line.long 0x00 "IHUB_COMMON_SPARE_0_0,IHUB Spare Register 0"
group.long 0x1C4++0x03
line.long 0x00 "IHUB_COMMON_SPARE_1_0,IHUB Spare Register 1"
group.long 0x1C8++0x03
line.long 0x00 "IHUB_COMMON_CGCTL_0,SLCG Override Register"
group.long 0x1CC++0x03
line.long 0x00 "IHUB_COMMON_DEBUG_SPARE_0_0,ISO HUB Common Debug Spare Register"
eventfld.long 0x00 31. " BIT_31                                 ,Bit 31" "No,Yes"
eventfld.long 0x00 30. "                  BIT_30                                 ,Bit 30" "No,Yes"
textline "                                             "
eventfld.long 0x00 29. " BIT_29                                 ,Bit 29" "No,Yes"
eventfld.long 0x00 28. "                  BIT_28                                 ,Bit 28" "No,Yes"
textline "                                             "
eventfld.long 0x00 27. " BIT_27                                 ,Bit 27" "No,Yes"
eventfld.long 0x00 26. "                  BIT_26                                 ,Bit 26" "No,Yes"
textline "                                             "
eventfld.long 0x00 25. " BIT_25                                 ,Bit 25" "No,Yes"
eventfld.long 0x00 24. "                  BIT_24                                 ,Bit 24" "No,Yes"
textline "                                             "
eventfld.long 0x00 23. " BIT_23                                 ,Bit 23" "No,Yes"
eventfld.long 0x00 22. "                  BIT_22                                 ,Bit 22" "No,Yes"
textline "                                             "
eventfld.long 0x00 21. " BIT_21                                 ,Bit 21" "No,Yes"
eventfld.long 0x00 20. "                  BIT_20                                 ,Bit 20" "No,Yes"
textline "                                             "
eventfld.long 0x00 19. " BIT_19                                 ,Bit 19" "No,Yes"
eventfld.long 0x00 18. "                  BIT_18                                 ,Bit 18" "No,Yes"
textline "                                             "
eventfld.long 0x00 17. " BIT_17                                 ,Bit 17" "No,Yes"
eventfld.long 0x00 16. "                  BIT_16                                 ,Bit 16" "No,Yes"
textline "                                             "
eventfld.long 0x00 15. " BIT_15                                 ,Bit 15" "No,Yes"
eventfld.long 0x00 14. "                  BIT_14                                 ,Bit 14" "No,Yes"
textline "                                             "
eventfld.long 0x00 13. " BIT_13                                 ,Bit 13" "No,Yes"
eventfld.long 0x00 12. "                  BIT_12                                 ,Bit 12" "No,Yes"
textline "                                             "
eventfld.long 0x00 11. " BIT_11                                 ,Bit 11" "No,Yes"
eventfld.long 0x00 10. "                  BIT_10                                 ,Bit 10" "No,Yes"
textline "                                             "
eventfld.long 0x00 9. " BIT_9                                  ,Bit 9" "No,Yes"
eventfld.long 0x00 8. "                  BIT_8                                  ,Bit 8" "No,Yes"
textline "                                             "
eventfld.long 0x00 7. " BIT_7                                  ,Bit 7" "No,Yes"
eventfld.long 0x00 6. "                  BIT_6                                  ,Bit 6" "No,Yes"
textline "                                             "
eventfld.long 0x00 5. " BIT_5                                  ,Bit 5" "No,Yes"
eventfld.long 0x00 4. "                  BIT_4                                  ,Bit 4" "No,Yes"
textline "                                             "
eventfld.long 0x00 3. " BIT_3                                  ,Bit 3" "No,Yes"
eventfld.long 0x00 2. "                  BIT_2                                  ,Bit 2" "No,Yes"
textline "                                             "
eventfld.long 0x00 1. " BIT_1                                  ,Bit 1" "No,Yes"
eventfld.long 0x00 0. "                  BIT_0                                  ,Bit 0" "No,Yes"
group.long 0x1D0++0x03
line.long 0x00 "IHUB_COMMON_DEBUG_SPARE_1_0,ISO HUB Common Debug Spare Register"
eventfld.long 0x00 31. " BIT_31                                 ,Bit 31" "No,Yes"
eventfld.long 0x00 30. "                  BIT_30                                 ,Bit 30" "No,Yes"
textline "                                             "
eventfld.long 0x00 29. " BIT_29                                 ,Bit 29" "No,Yes"
eventfld.long 0x00 28. "                  BIT_28                                 ,Bit 28" "No,Yes"
textline "                                             "
eventfld.long 0x00 27. " BIT_27                                 ,Bit 27" "No,Yes"
eventfld.long 0x00 26. "                  BIT_26                                 ,Bit 26" "No,Yes"
textline "                                             "
eventfld.long 0x00 25. " BIT_25                                 ,Bit 25" "No,Yes"
eventfld.long 0x00 24. "                  BIT_24                                 ,Bit 24" "No,Yes"
textline "                                             "
eventfld.long 0x00 23. " BIT_23                                 ,Bit 23" "No,Yes"
eventfld.long 0x00 22. "                  BIT_22                                 ,Bit 22" "No,Yes"
textline "                                             "
eventfld.long 0x00 21. " BIT_21                                 ,Bit 21" "No,Yes"
eventfld.long 0x00 20. "                  BIT_20                                 ,Bit 20" "No,Yes"
textline "                                             "
eventfld.long 0x00 19. " BIT_19                                 ,Bit 19" "No,Yes"
eventfld.long 0x00 18. "                  BIT_18                                 ,Bit 18" "No,Yes"
textline "                                             "
eventfld.long 0x00 17. " BIT_17                                 ,Bit 17" "No,Yes"
eventfld.long 0x00 16. "                  BIT_16                                 ,Bit 16" "No,Yes"
textline "                                             "
eventfld.long 0x00 15. " BIT_15                                 ,Bit 15" "No,Yes"
eventfld.long 0x00 14. "                  BIT_14                                 ,Bit 14" "No,Yes"
textline "                                             "
eventfld.long 0x00 13. " BIT_13                                 ,Bit 13" "No,Yes"
eventfld.long 0x00 12. "                  BIT_12                                 ,Bit 12" "No,Yes"
textline "                                             "
eventfld.long 0x00 11. " BIT_11                                 ,Bit 11" "No,Yes"
eventfld.long 0x00 10. "                  BIT_10                                 ,Bit 10" "No,Yes"
textline "                                             "
eventfld.long 0x00 9. " BIT_9                                  ,Bit 9" "No,Yes"
eventfld.long 0x00 8. "                  BIT_8                                  ,Bit 8" "No,Yes"
textline "                                             "
eventfld.long 0x00 7. " BIT_7                                  ,Bit 7" "No,Yes"
eventfld.long 0x00 6. "                  BIT_6                                  ,Bit 6" "No,Yes"
textline "                                             "
eventfld.long 0x00 5. " BIT_5                                  ,Bit 5" "No,Yes"
eventfld.long 0x00 4. "                  BIT_4                                  ,Bit 4" "No,Yes"
textline "                                             "
eventfld.long 0x00 3. " BIT_3                                  ,Bit 3" "No,Yes"
eventfld.long 0x00 2. "                  BIT_2                                  ,Bit 2" "No,Yes"
textline "                                             "
eventfld.long 0x00 1. " BIT_1                                  ,Bit 1" "No,Yes"
eventfld.long 0x00 0. "                  BIT_0                                  ,Bit 0" "No,Yes"
rgroup.long 0x1D4++0x07
line.long 0x00 "IHUB_COMMON_RO_SPARE_0_0,IHUB Common RO Spare 0"
line.long 0x04 "IHUB_COMMON_RO_SPARE_1_0,IHUB Common RO Spare 1"
group.long 0x220++0x0B
line.long 0x00 "SECURE_INT_STATUS_0,The Following Registers Control This Interrupt Line"
bitfld.long 0x00 1. " LOCKDOWN_VIOLATION_INT                 ,Lockup violation interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 0. "         TZ_ACCESS_VIOLATION_INT                ,TrustZone access violation interrupt" "No interrupt,Interrupt"
line.long 0x04 "SECURE_INT_MASK_0,TrustZone Access Violation Mask"
bitfld.long 0x04 1. " LOCKDOWN_VIOLATION_MASK                ,Lockup violation mask" "Masked,Not Masked"
bitfld.long 0x04 0. "           TZ_ACCESS_VIOLATION_MASK               ,TrustZone access violation mask" "Masked,Not Masked"
line.long 0x08 "SECURE_INT_ENABLE_0,TrustZone Access Violation Enable"
bitfld.long 0x08 1. " LOCKDOWN_VIOLATION_MASK                ,Lockup violation mask" "Disabled,Enabled"
bitfld.long 0x08 0. "             TZ_ACCESS_VIOLATION_MASK               ,TrustZone access violation mask" "Disabled,Enabled"
if (((per.l(ad:0x54200000+0x220))&0x01)==0x01)||(((per.l(ad:0x54200000+0x220))&0x02)==0x02)
rgroup.long 0x234++0x0B
line.long 0x00 "SECURE_ACCESS_VIOLATION_INFO1_0,Secure Access Violation Info 1"
bitfld.long 0x00 25. " RWN                                    ,Access register " "Write,Read"
bitfld.long 0x00 24. "                COR                                    ,Class or register" "Class,Register"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,The Host1x offset of the access"
line.long 0x04 "SECURE_ACCESS_VIOLATION_INFO2_0,Secure Access Violation Info 2"
hexmask.long.word 0x04 16.--26. 1. " SECGROUP                               ,Secure group"
hexmask.long.word 0x04 0.--9. 1. "                 CHANNEL                                ,Channel"
line.long 0x08 "SECURE_ACCESS_VIOLATION_INFO3_0,Secure Access Violation Info 3"
else
hgroup.long 0x234++0x03
hide.long 0x00 "SECURE_ACCESS_VIOLATION_INFO1_0,Secure Access Violation Info 1"
hgroup.long 0x238++0x03
hide.long 0x00 "SECURE_ACCESS_VIOLATION_INFO2_0,Secure Access Violation Info 2"
hgroup.long 0x23C++0x03
hide.long 0x00 "SECURE_ACCESS_VIOLATION_INFO3_0,Secure Access Violation Info 3"
endif
group.long 0x240++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x244++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x248++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x24C++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x250++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x254++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x258++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x25C++0x03
line.long 0x00 "SECURE_LOCKDOWN_0,SECURE_LOCKDOWN Registers"
bitfld.long 0x00 31. " ENABLE                                 ,Specifies whether the lock-down is in effect for the register(s) specified by the OFFSET and HEADS fields." "Disabled,Enabled"
bitfld.long 0x00 30. "             HEADS                                  ,Specifies whether to only lock down the register in head0 only, or in all heads" "Head0,All"
textline "                                             "
hexmask.long.tbyte 0x00 0.--19. 0x01 " OFFSET                                 ,Specifies the head0-based register offset of the register that needs to be locked down"
group.long 0x280++0x07
line.long 0x00 "STREAMID_HEAD_0,StreamID Head"
hexmask.long.word 0x00 0.--9. 1. " ID                                     ,ID"
line.long 0x04 "RSB_HEAD_0,RSB Head"
bitfld.long 0x04 0. " NONSECURE                              ,Non secure" "0,1"
group.long 0x300++0x13
line.long 0x00 "HSM_INT_STATUS_0,Interrupt Status"
eventfld.long 0x00 29. " DSC_TO_UF_INT                          ,DSC to underflow interrupt status" "Not pending,pending"
eventfld.long 0x00 28. "          DSC_BBUF_UF_INT                        ,DSC BBUF underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 27. " DSC_RBUF_UF_INT                        ,DSC RBUF underflow interrupt status" "Not pending,pending"
eventfld.long 0x00 26. "          DSC_OBUF_UF_INT                        ,DSC OBUF underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 24. " SD3_BUCKET_WALK_DONE_INT               ,Head smart dimmer interrupt status" "Not pending,pending"
eventfld.long 0x00 23. "          HC_UF_INT                              ,Cursor underflow interrupt status" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 12. " MSF_INT                                ,Main-display stop frame interrupt status" "Not pending,pending"
eventfld.long 0x00 7. "          REG_TMOUT_INT                          ,Register read/write (RBLK) timeout" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 6. " REGION_CRC_INT                         ,Regional CRC interrupt" "Not pending,pending"
eventfld.long 0x00 5. "          V_PULSE2_INT                           ,Vertical pulse 2 interrupt" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 4. " V_PULSE3_INT                           ,Vertical pulse 3 interrupt" "Not pending,pending"
eventfld.long 0x00 2. "          V_BLANK_INT                            ,Vertical blank interrupt" "Not pending,pending"
textline "                                             "
eventfld.long 0x00 1. " FRAME_END_INT                          ,Frame end interrupt" "Not pending,pending"
line.long 0x04 "HSM_INT_MASK_0,Interrupt Mask"
bitfld.long 0x04 29. " DSC_TO_UF_INT_MASK                     ,DSC to underflow interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 28. "             DSC_BBUF_UF_INT_MASK                   ,DSC BBUF underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 27. " DSC_RBUF_UF_INT_MASK                   ,DSC RBUF underflow interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 26. "             DSC_OBUF_UF_INT_MASK                   ,DSC OBUF underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 24. " SD3_BUCKET_WALK_DONE_INT_MASK          ,Interrupts for the DSC" "Masked,Unmasked"
bitfld.long 0x04 23. "             HEAD_UF_INT_MASK                       ,Head underflow interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 12. " MSF_INT_MASK                           ,Main-display stop frame interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 7. "             REG_TMOUT_INT_MASK                     ,Register read/write (RBLK) timeout interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 6. " REGION_CRC_INT_MASK                    ,Regional CRC interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 5. "             V_PULSE2_INT_MASK                      ,Vertical pulse 2 interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 4. " V_PULSE3_INT_MASK                      ,Vertical pulse 3 interrupt mask" "Masked,Unmasked"
bitfld.long 0x04 2. "             V_BLANK_INT_MASK                       ,Vertical blank interrupt mask" "Masked,Unmasked"
textline "                                             "
bitfld.long 0x04 1. " FRAME_END_INT_MASK                     ,Frame end interrupt mask" "Masked,Unmasked"
line.long 0x08 "HSM_INT_ENABLE_0,Interrupt Enable"
bitfld.long 0x08 29. " DSC_TO_UF_INT_ENABLE                   ,DSC to underflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 28. "             DSC_BBUF_UF_INT_ENABLE                 ,DSC BBUF underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. " DSC_RBUF_UF_INT_ENABLE                 ,DSC RBUF underflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 26. "             DSC_OBUF_UF_INT_ENABLE                 ,DSC OBUF underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 24. " SD3_BUCKET_WALK_DONE_INT_ENABLE        ,Head smart dimmer interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 23. "             HEAD_UF_INT_ENABLE                     ,Head underflow interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 12. " MSF_INT_ENABLE                         ,Main-display stop frame interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 7. "             REG_TMOUT_INT_ENABLE                   ,Register read/write (RBLK) timeout interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 6. " REGION_CRC_INT_ENABLE                  ,Regional CRC interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             V_PULSE2_INT_ENABLE                    ,Vertical pulse 2 interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 4. " V_PULSE3_INT_ENABLE                    ,Vertical pulse 3 interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             V_BLANK_INT_ENABLE                     ,Vertical blank interrupt enable" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. " FRAME_END_INT_ENABLE                   ,Frame end interrupt enable" "Disabled,Enabled"
line.long 0x0C "HSM_INT_TYPE_0,Interrupt Type"
bitfld.long 0x0C 29. " DSC_TO_UF_INT_TYPE                     ,DSC to underflow interrupt type" "Edge,Level"
bitfld.long 0x0C 28. "                DSC_BBUF_UF_INT_TYPE                   ,DSC BBUF underflow interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 27. " DSC_RBUF_UF_INT_TYPE                   ,DSC RBUF underflow interrupt type" "Edge,Level"
bitfld.long 0x0C 26. "                DSC_OBUF_UF_INT_TYPE                   ,Interrupts for the DSC" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 24. " SD3_BUCKET_WALK_DONE_INT_TYPE          ,Head smart dimmer interrupt type" "Edge,Level"
bitfld.long 0x0C 23. "                HEAD_UF_INT_TYPE                       ,Head underflow interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 12. " MSF_INT_TYPE                           ,Main-display stop frame interrupt type" "Edge,Level"
bitfld.long 0x0C 7. "                REG_TMOUT_INT_TYPE                     ,Register read/write (RBLK) timeout interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 6. " REGION_CRC_INT_TYPE                    ,Regional CRC interrupt type" "Edge,Level"
bitfld.long 0x0C 5. "                V_PULSE2_INT_TYPE                      ,Vertical pulse 2 interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 4. " V_PULSE3_INT_TYPE                      ,Vertical Pulse 3 Interrupt Type" "Edge,Level"
bitfld.long 0x0C 2. "                V_BLANK_INT_TYPE                       ,Vertical blank interrupt type" "Edge,Level"
textline "                                             "
bitfld.long 0x0C 1. " FRAME_END_INT_TYPE                     ,Frame End interrupt type" "Edge,Level"
line.long 0x10 "HSM_INT_POLARITY_0,Interrupt Polarity"
bitfld.long 0x10 29. " DSC_TO_UF_INT_POLARITY                 ,DSC to underflow interrupt polarity" "Low,High"
bitfld.long 0x10 28. "                 DSC_BBUF_UF_INT_POLARITY               ,DSC BBUF underflow interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 27. " DSC_RBUF_UF_INT_POLARITY               ,DSC RBUF underflow interrupt polarity" "Low,High"
bitfld.long 0x10 26. "                 DSC_OBUF_UF_INT_POLARITY               ,Interrupts for the DSC" "Low,High"
textline "                                             "
bitfld.long 0x10 24. " SD3_BUCKET_WALK_DONE_INT_POLARITY      ,Head smart dimmer interrupt polarity" "Low,High"
bitfld.long 0x10 23. "                 HEAD_UF_INT_POLARITY                   ,Head underflow interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 12. " MSF_INT_POLARITY                       ,Main-display stop frame interrupt polarity" "Low,High"
bitfld.long 0x10 7. "                 REG_TMOUT_INT_POLARITY                 ,Register read/write (RBLK) timeout interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 6. " REGION_CRC_INT_POLARITY                ,Regional CRC interrupt Polarity" "Low,High"
bitfld.long 0x10 5. "                 V_PULSE2_INT_POLARITY                  ,Vertical pulse 2 interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 4. " V_PULSE3_INT_POLARITY                  ,Vertical pulse 3 interrupt polarity" "Low,High"
bitfld.long 0x10 2. "                 V_BLANK_INT_POLARITY                   ,Vertical blank interrupt polarity" "Low,High"
textline "                                             "
bitfld.long 0x10 1. " FRAME_END_INT_POLARITY                 ,Frame end interrupt polarity" "Low,High"
tree.end
width 31.
tree "Display COM Registers"
group.long 0xC00++0x03
line.long 0x00 "CRC_CONTROL_0,CRC Control"
bitfld.long 0x00 2. " CRC_INPUT_DATA                 ,CRC input data" "Full frame,Active display"
bitfld.long 0x00 0. "       CRC_ENABLE                     ,CRC calculation Enable" "Disabled,Enabled"
group.long 0xC94++0x07
line.long 0x00 "SCRATCH_REGISTER_A_0,Scratch Register A"
line.long 0x04 "SCRATCH_REGISTER_B_0,Scratch Register B"
if (((per.l(ad:0x54200000+0xC00))&0x01)==0x00)
group.long 0xCA8++0x03
line.long 0x00 "COMP_CRCA_0,Compositor CRC Status"
eventfld.long 0x00 1. " ERROR                          ,Error" "False,True"
rbitfld.long 0x00 0. "                VALID                          ,Valid" "False,True"
else
hgroup.long 0xCA8++0x03
hide.long 0x00 "COMP_CRCA_0,Compositor CRC Status"
in
endif
rgroup.long 0xCAC++0x03
line.long 0x00 "COMP_CRCB_0,Compositor CRC Checksum"
if (((per.l(ad:0x54200000+0xC00))&0x01)==0x00)
group.long 0xCB0++0x03
line.long 0x00 "RG_CRCA_0,RG CRC Status"
rbitfld.long 0x00 16.--19. " DTRPHASE                       ,Dither phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
eventfld.long 0x00 1. "                   ERROR                          ,Error" "False,True"
textline "                                        "
rbitfld.long 0x00 0. " VALID                          ,Valid" "False,True"
else
hgroup.long 0xCB0++0x03
hide.long 0x00 "RG_CRCA_0,RG CRC Status"
in
endif
rgroup.long 0xCB4++0x03
line.long 0x00 "RG_CRCB_0,Raster Generator CRC Checksum"
group.long 0xCF8++0x2B
line.long 0x00 "DSC_TOP_CTL_0,DSC TOP Control"
hexmask.long.word 0x00 8.--23. 1. " DSC_TIMEOUT_COUNTER            ,DSC timeout counter"
bitfld.long 0x00 5. "                 DSC_FORCE_ICH_EOL_RESET        ,Force DSC to reset at the end of each line in ICH mode" "No reset,Reset"
textline "                                        "
bitfld.long 0x00 4. " DSC_DUAL_ENABLE                ,Dual DSC encoder enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             DSC_AUTO_RESET                 ,Force DSC to do self reset between frames" "No reset,Reset"
textline "                                        "
bitfld.long 0x00 2. " DSC_SLCG_OVERRIDE              ,DSC second level clock gating override" "No override,Override"
bitfld.long 0x00 1. "          DSC_ENABLE                     ,Enable DSC function" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 0. " DSC_SOFT_RESET                 ,Soft reset DSC" "No reset,Reset"
line.long 0x04 "DSC_DELAY_0,DSC Delay"
hexmask.long.word 0x04 16.--31. 1. " DSC_WRAP_OUTPUT_DELAY          ,DSC wrap output delay"
hexmask.long.word 0x04 0.--15. 1. "                 DSC_CORE_OUTPUT_DELAY          ,DSC core output delay"
line.long 0x08 "DSC_COMMON_CTL_0,DSC Common Control"
hexmask.long.word 0x08 16.--31. 1. " DSC_CHUNK_SIZE                 ,DSC chunk size"
bitfld.long 0x08 10. "                 DSC_BLOCK_PRED_ENABLE          ,DSC block predict enable" "Disabled,Enabled"
textline "                                        "
hexmask.long.word 0x08 0.--9. 1. " DSC_BITS_PER_PIXEL             ,DSC bits per pixel"
line.long 0x0C "DSC_SLICE_INFO_0,DSC Slice Info"
hexmask.long.word 0x0C 16.--31. 1. " DSC_SLICE_HEIGHT               ,Slice height in pixels"
hexmask.long.word 0x0C 0.--15. 1. "                 DSC_SLICE_WIDTH                ,Slice width in pixels"
line.long 0x10 "DSC_RC_DELAY_INFO_0,DSC RC Delay Info"
hexmask.long.word 0x10 16.--31. 1. " DSC_INITIAL_DEC_DELAY          ,Number of pixels to delay the VLD"
hexmask.long.word 0x10 0.--9. 1. "                 DSC_INITIAL_XMIT_DELAY         ,Number of pixels to delay the initial transmission"
line.long 0x14 "DSC_RC_SCALE_INFO_0,DSC RC Scale_Info"
hexmask.long.word 0x14 6.--21. 1. " DSC_SCALE_DECR_INTERVAL        ,Decrement scale factor every scale_decr_interval group"
bitfld.long 0x14 0.--5. "                 DSC_INITIAL_SCALE_VALUE        ,Initial value for scale factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "DSC_RC_SCALE_INFO_2_0,DSC RC Scale Info 2"
hexmask.long.word 0x18 0.--15. 1. " DSC_SCALE_INCR_INTERVAL        ,Increment scale factor every scale_incr_interval group"
line.long 0x1C "DSC_RC_BPGOFF_INFO_0,DSC RC BPGOFF Info"
hexmask.long.word 0x1C 16.--31. 0x01 " DSC_RC_BPGOFF_OFFEST           ,BPG offset used to enforce slice bit constraint"
hexmask.long.word 0x1C 0.--15. 0x01 "                 DSC_NFL_BPG_OFFSET             ,Non-first line BPG offset to use"
line.long 0x20 "DSC_RC_OFFSET_INFO_0,DSC RC Offset Info_0"
hexmask.long.word 0x20 16.--31. 0x01 " DSC_FINAL_OFFSET               ,Final RC linear transformation offset value"
hexmask.long.word 0x20 0.--15. 0x01 "                 DSC_INITIAL_OFFSET             ,Value to use for RC model offset at slice start"
line.long 0x24 "DSC_RC_FLATNESS_INFO_0,DSC RC Flatness Info"
bitfld.long 0x24 10.--14. " DSC_FIRST_LINE_BPG_OFFS        ,BPG offset to use for first line of the slice" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x24 5.--9. "                   DSC_FLATNESS_MAX_QP            ,Maximum QP where flatness information is sent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x24 0.--4. " DSC_FLATNESS_MIN_QP            ,Minimum QP where flatness information is sent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x28 "DSC_RC_PARAM_SET_0,DSC RC Parameter Set"
bitfld.long 0x28 18.--21. " DSC_RC_TGT_OFFSET_LO           ,Offset to BPG used by RC to determine QP adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 14.--17. "                   DSC_RC_TGT_OFFSET_HI           ,Offset to BPG used by RC to determine QP adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x28 9.--13. " DSC_RC_QUANT_INCR_LIMIT1       ,Slow down incrementing once the range reaches this value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x28 4.--8. "                   DSC_RC_QUANT_INCR_LIMIT0       ,Slow down incrementing once the range reaches this value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x28 0.--3. " DSC_RC_EDGE_FACTOR             ,Factor to determine if an edge is present based on the bits produced" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xD24++0x03
line.long 0x00 "DSC_RC_BUF_THRESH0_0,DSC RC BUFFER THRESH0"
hexmask.long.byte 0x00 24.--31. 0x01 " DSC_RC_BUF_THRESH1             ,Threshold1 defining the buffer ranges"
hexmask.long.byte 0x00 16.--23. 0x01 "                   DSC_RC_BUF_THRESH0             ,Threshold0 defining the buffer ranges"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " DSC_RC_MODEL_SIZE              ,Total size of RC model"
group.long 0xD28++0x03
line.long 0x00 "DSC_RC_BUF_THRESH1_0,DSC RC BUFFER THRESH1"
hexmask.long.byte 0x00 24.--31. 0x01 " DSC_RC_BUF_THRESH1             ,Threshold1 defining the buffer ranges"
hexmask.long.byte 0x00 16.--23. 0x01 "                   DSC_RC_BUF_THRESH0             ,Threshold0 defining the buffer ranges"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " DSC_RC_MODEL_SIZE              ,Total size of RC model"
group.long 0xD2C++0x03
line.long 0x00 "DSC_RC_BUF_THRESH2_0,DSC RC BUFFER THRESH2"
hexmask.long.byte 0x00 24.--31. 0x01 " DSC_RC_BUF_THRESH1             ,Threshold1 defining the buffer ranges"
hexmask.long.byte 0x00 16.--23. 0x01 "                   DSC_RC_BUF_THRESH0             ,Threshold0 defining the buffer ranges"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " DSC_RC_MODEL_SIZE              ,Total size of RC model"
group.long 0xD30++0x03
line.long 0x00 "DSC_RC_BUF_THRESH3_0,DSC RC BUFFER THRESH3"
hexmask.long.byte 0x00 24.--31. 0x01 " DSC_RC_BUF_THRESH1             ,Threshold1 defining the buffer ranges"
hexmask.long.byte 0x00 16.--23. 0x01 "                   DSC_RC_BUF_THRESH0             ,Threshold0 defining the buffer ranges"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " DSC_RC_MODEL_SIZE              ,Total size of RC model"
group.long 0xD34++0x03
line.long 0x00 "DSC_RC_RANGE_CFG0_0,DSC RC Range CFG0"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD38++0x03
line.long 0x00 "DSC_RC_RANGE_CFG1_0,DSC RC Range CFG1"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD3C++0x03
line.long 0x00 "DSC_RC_RANGE_CFG2_0,DSC RC Range CFG2"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD40++0x03
line.long 0x00 "DSC_RC_RANGE_CFG3_0,DSC RC Range CFG3"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD44++0x03
line.long 0x00 "DSC_RC_RANGE_CFG4_0,DSC RC Range CFG4"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD48++0x03
line.long 0x00 "DSC_RC_RANGE_CFG5_0,DSC RC Range CFG5"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD4C++0x03
line.long 0x00 "DSC_RC_RANGE_CFG6_0,DSC RC Range CFG6"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD50++0x03
line.long 0x00 "DSC_RC_RANGE_CFG7_0,DSC RC Range CFG7"
bitfld.long 0x00 26.--31. " DSC_RC_RANGE_PARAM1_BPG_OFFSET ,Parameters for RC range1,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21.--25. "                   DSC_RC_RANGE_PARAM1_MAX_QP     ,Parameters for RC range1,range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                        "
bitfld.long 0x00 16.--20. " DSC_RC_RANGE_PARAM1_MIN_QP     ,Parameters for RC range1,range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 10.--15. "                   DSC_RC_RANGE_PARAM0_BPG_OFFSET ,Parameters for RC range0,range_bpg_offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
bitfld.long 0x00 5.--9. " DSC_RC_RANGE_PARAM0_MAX_QP     ,Parameters for RC range0, range_max_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                   DSC_RC_RANGE_PARAM0_MIN_QP     ,Parameters for RC range0, range_min_qp" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xD54++0x03
line.long 0x00 "DSC_UNIT_SET_0,DSC Unit Set"
hexmask.long.word 0x00 8.--17. 1. " DSC_RC_OVERFLOW_THRESH         ,DSC RC overflow thresh"
bitfld.long 0x00 7. "                 DSC_FLATNESS_FIX_EN            ,DSC flatness fix enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 6. " DSC_CHECK_FLATNESS2            ,DSC check flatness 2" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "             DSC_RC_SOLUTION_MODE           ,DSC RC solution mode" "0,1,2,3"
textline "                                        "
bitfld.long 0x00 2. " DSC_LINEBUF_DEPTH              ,Line buffer depth" "9 bits,8 bits"
bitfld.long 0x00 0.--1. "               DSC_SLICE_NUM_MINUS1_IN_LINE   ,The slice number minus 1 in the line" "1,2,3,4"
rgroup.long 0xD60++0x07
line.long 0x00 "DSC_STATUS0_0,DSC0 Status Registers For Debug"
bitfld.long 0x00 31. " DSC_STATUS_BUSY                ,DSC_STATUS_BUSY" "No busy,Busy"
hexmask.long.word 0x00 16.--29. 1. "              DSC_STATUS_VINDEX              ,DSC status vindex"
textline "                                        "
bitfld.long 0x00 14.--15. " DSC_STATUS_SLICEID             ,DSC status slice id" "0,1,2,3"
hexmask.long.word 0x00 0.--13. 1. "                    DSC_STATUS_HINDEX              ,DSC status hindex"
line.long 0x04 "DSC_STATUS1_0,DSC1 Status Registers For Debug"
bitfld.long 0x04 31. " DSC_STATUS_BUSY                ,DSC_STATUS_BUSY" "No busy,Busy"
hexmask.long.word 0x04 16.--29. 1. "              DSC_STATUS_VINDEX              ,DSC status vindex"
textline "                                        "
bitfld.long 0x04 14.--15. " DSC_STATUS_SLICEID             ,DSC status slice id" "0,1,2,3"
hexmask.long.word 0x04 0.--13. 1. "                    DSC_STATUS_HINDEX              ,DSC status hindex"
group.long 0xD7C++0x03
line.long 0x00 "POSTCOMP_HEAD_LOADV_COUNTER_0,POSTCOMP Head LoadV Counter"
if (((per.l(ad:0x54200000+0x1050))&0x80)==0x80)
group.long 0xD88++0x03
line.long 0x00 "RG_STATUS_0,RG Status"
rbitfld.long 0x00 14.--15. " ACT_HEAD_OPMODE                ,Report the current head operating mode as seen by the RG" "Sleep,Snooze,Awake,?..."
bitfld.long 0x00 13. "               UNSTALL_CNT_RST                ,This field resets EXTERNAL_UNSTALL_EVENT_CNT and RG_UNSTALL_CNT" "Done,Pending"
textline "                                        "
rbitfld.long 0x00 9.--12. " RG_UNSTALL_CNT                 ,RG unstall counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 5.--8. "                   EXTERNAL_UNSTALL_EVENT_CNT     ,This field counts the number of un-stall events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 4. " FORCE_UNSTALL                  ,This field is used to force un-stall RG for one frame in stall lock mode" "Done,Pending"
rbitfld.long 0x00 3. "              STALLED                        ,Report the stall status of RG when Stall Lock mode is enabled" "No,Yes"
textline "                                        "
bitfld.long 0x00 2. " DP_VBLANK                      ,DP VBLANK" "SDI,Normal"
else
group.long 0xD88++0x03
line.long 0x00 "RG_STATUS_0,RG Status"
rbitfld.long 0x00 14.--15. " ACT_HEAD_OPMODE                ,Report the current head operating mode as seen by the RG" "Sleep,Snooze,Awake,?..."
bitfld.long 0x00 13. "               UNSTALL_CNT_RST                ,This field resets EXTERNAL_UNSTALL_EVENT_CNT and RG_UNSTALL_CNT" "Done,Pending"
textline "                                        "
rbitfld.long 0x00 5.--8. " EXTERNAL_UNSTALL_EVENT_CNT     ,This field counts the number of un-stall events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 4. " FORCE_UNSTALL                  ,This field is used to force un-stall RG for one frame in stall lock mode" "Done,Pending"
textline "                                        "
bitfld.long 0x00 2. " DP_VBLANK                      ,DP VBLANK" "SDI,Normal"
endif
group.long 0xD8C++0x03
line.long 0x00 "RG_IN_LOADV_COUNTER_0,RG In Loadv Counter"
rgroup.long 0xD90++0x03
line.long 0x00 "RG_DCLK_0,RG DCLK"
hexmask.long 0x00 0.--27. 1. " CNT_PER_FRM                    ,Counter per frame"
if (((per.l(ad:0x54200000+0xD94))&0x01)==0x01)
group.long 0xD94++0x03
line.long 0x00 "RG_UNDERFLOW_0,RG UNDERFLOW"
bitfld.long 0x00 24. " FRAMES_UFLOWED_RST             ,This field resets FRAMES_UFLOWED" "Reset done,Reset pending"
hexmask.long.byte 0x00 16.--23. 1. "        FRAMES_UFLOWED                 ,8 bits field counts the number of vsync RG has crossed for last underflow frame"
textline "                                        "
bitfld.long 0x00 8. " MODE                           ,Indicates what to do when an underflow occurs" "Repeat,Red"
eventfld.long 0x00 4. "               UNDERFLOWED                    ,Indicates whether an underflow has occurred" "Not occurred,Occurred"
textline "                                        "
bitfld.long 0x00 0. " ENABLE                         ,Turns on underflow reporting" "Disabled,Enabled"
else
group.long 0xD94++0x03
line.long 0x00 "RG_UNDERFLOW_0,RG Underflow"
bitfld.long 0x00 24. " FRAMES_UFLOWED_RST             ,This field resets FRAMES_UFLOWED" "Done,Pending"
bitfld.long 0x00 8. "              MODE                           ,Indicates what to do when an underflow occurs" "Repeat,Red"
textline "                                        "
bitfld.long 0x00 0. " ENABLE                         ,Turns on underflow reporting" "Disabled,Enabled"
endif
rgroup.long 0xD98++0x0F
line.long 0x00 "RG_DPCA_0,RG DPCA"
hexmask.long.word 0x00 16.--31. 1. " FRM_CNT                        ,This counter increments once per frame"
hexmask.long.word 0x00 0.--15. 1. "                 LINE_CNT                       ,This counter increments once per line at the leading edge of hsync"
line.long 0x04 "RG_DPCB_0,RG DPCB"
hexmask.long.word 0x04 0.--15. 1. " PIXEL_CNT                      ,This counter increments once per pixel"
line.long 0x08 "RG_VPCA_0,RG VPCA"
hexmask.long.word 0x08 16.--31. 1. " TOP_LINE                       ,TOP line"
hexmask.long.word 0x08 0.--15. 1. "                 LEFT_PIXEL                     ,Left pixel"
line.long 0x0C "RG_VPCB_0,RG VPCB"
hexmask.long.word 0x0C 16.--31. 1. " BOTTOM_LINE                    ,Bottom line"
hexmask.long.word 0x0C 0.--15. 1. "                 RIGHT_PIXEL                    ,Right pixel"
group.long 0xDA8++0x03
line.long 0x00 "RG_SNAPSHOT_RASTER_0,RG Snapshot Raster"
bitfld.long 0x00 31. " UPDATE                         ,Update" "Done,Pending"
hexmask.long.word 0x00 16.--30. 1. "              PIXEL                          ,This field gives the pixel at the time of the snapshot"
textline "                                        "
hexmask.long.word 0x00 0.--15. 1. " LINE                           ,This field gives the line at the time of the snapshot"
rgroup.long 0x0DAC++0x03
line.long 0x00 "RG_DEBUG_0,RG Debugging Info"
bitfld.long 0x00 4.--5. " PIXEL_BLU2                     ,Reports the two LSB bits of the latest blue component in the active region" "0,1,2,3"
bitfld.long 0x00 2.--3. "                    PIXEL_GRN2                     ,Reports the two LSB bits of the latest green component in the active region" "0,1,2,3"
textline "                                        "
bitfld.long 0x00 0.--1. " PIXEL_RED2                     ,Reports the two LSB bits of the latest red component in the active region" "0,1,2,3"
if (((per.l(ad:0x54200000+0xD94))&0x01)==0x01)
group.long 0xDB4++0x03
line.long 0x00 "RG_UNDERFLOW_PIXEL_0,RG Underflow Pixel"
else
hgroup.long 0xDB4++0x03
hide.long 0x00 "RG_UNDERFLOW_PIXEL_0,RG Underflow Pixel"
endif
group.long 0xDC0++0x03
line.long 0x00 "CURSOR_LOADV_COUNTER_0,CURSOR_LOADV_COUNTER holds the 32 least significant bits of the cursor loadv self-add counter number"
group.long 0xDC8++0x07
line.long 0x00 "CURSOR_PIX_RCVD_0,Count Of The Number Of Pixel Packets"
line.long 0x04 "CURSOR_DFLT_RGB_COLOR_0,Default Color Pixels In Cursors"
hexmask.long.byte 0x04 24.--31. 1. " A                              ,Alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   R                              ,Red"
textline "                                        "
hexmask.long.byte 0x04 8.--15. 1. " G                              ,Green"
hexmask.long.byte 0x04 0.--7. 1. "                   B                              ,Blue"
group.long 0xDD0++0x03
line.long 0x00 "COMP_CURSOR_CGCTL_0,COMP Cursor CGCTL"
rgroup.long 0xDD4++0x03
line.long 0x00 "CURSOR_DEBUG0_0,CURSOR_DEBUG0 Exposes Internal State Of The Cursor Pixel Pipe, For Debug Purposes"
bitfld.long 0x00 3. " DUMMY                          ,The DUMMY value indicates that at least one dummy pixel was inserted into the pipe for this cursor" "False,True"
bitfld.long 0x00 2. "                ABORTED                        ,The ABORTED value indicates that the cursor fetch was aborted by ISOHUB and that any missing pixels will have to be filled in as dummy pixels" "False,True"
textline "                                        "
bitfld.long 0x00 0.--1. " STATE                          ,State" "Not started,In progress,Completed,?..."
group.long 0xDD8++0x03
line.long 0x00 "CURSOR_DEBUG1_0,CURSOR_DEBUG1 Exposes Input Pixel Flow Related State Of The Cursor Pixel Pipe For Debug Purposes"
eventfld.long 0x00 29. " CLR                            ,The CLR field is clear the COUNT" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                INPUT_WAIT_COUNT               ,Input wait count"
rgroup.long 0xDDC++0x03
line.long 0x00 "COMP_CURSOR_DEBUG0_0,COMP Cursor Debug 0"
bitfld.long 0x00 3. " PACKET_ERROR                   ,Packet error" "False,True"
bitfld.long 0x00 0.--2. "                FSM_STATE                      ,FSM state" "Idle,Preif_loadv,LUT,BEG,PROC,End,?..."
group.long 0xDE0++0x03
line.long 0x00 "IHUB_CURS_ASR_CTLA_0,ISO Hub CURS Aggressive Self-Refresh Control A"
bitfld.long 0x00 2. " MODE                           ,Mode" "Ignore,Enabled"
bitfld.long 0x00 0.--1. "              SUBMODE                        ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0xDE4++0x03
line.long 0x00 "IHUB_CURS_ASR_CTLB_0,ISO Hub CURS Aggressive Self-Refresh Control B"
hexmask.long 0x00 0.--28. 1. " WATERMARK_LO                   ,Watermark LO"
else
rgroup.long 0xDE4++0x03
line.long 0x00 "IHUB_CURS_ASR_CTLB_0,ISO Hub CURS Aggressive Self-Refresh Control B"
hexmask.long 0x00 0.--28. 1. " WATERMARK_LO                   ,Watermark LO"
endif
group.long 0xDE8++0x03
line.long 0x00 "IHUB_CURS_ASR_CTLC_0,ISO Hub CURS Aggressive Self-Refresh Control C"
hexmask.long 0x00 0.--28. 1. " WATERMARK_HI                   ,Watermark HI"
rgroup.long 0xDF8++0x03
line.long 0x00 "IHUB_CURS_OCC_0,ISO Hub CURS OCC"
hexmask.long 0x00 0.--28. 1. " PIXELS                         ,Pixels"
group.long 0xE04++0x0B
line.long 0x00 "IHUB_CURS_MEMACC_0,ISO Hub CURS Memory Access"
bitfld.long 0x00 7. " SETTING_NEW                    ,Mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              CONTRACT_END                   ,Contract end" "Wait,Force"
textline "                                        "
bitfld.long 0x00 5. " REQUEST                        ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 0. "                STATUS                         ,Requests for all windows have stopped in response to the setting of MEMACCESS_REQUEST to STOP" "Stopping,Fetching"
line.long 0x04 "IHUB_CURS_LATENCY_CTLA_0,ISO Hub CURS Latency Control A"
bitfld.long 0x04 2. " MODE                           ,Mode" "Ignore,Enabled"
bitfld.long 0x04 0.--1. "              SUBMODE                        ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "IHUB_CURS_LATENCY_CTLB_0,ISO Hub CURS Latency Control B"
rbitfld.long 0x08 31. " STATUS                         ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  WATERMARK                      ,Watermark"
rgroup.long 0xE10++0x0B
line.long 0x00 "IHUB_CURS_REQ_SENT_0,ISO Hub CURS Request Sent"
line.long 0x04 "IHUB_CURS_RSP_RCVD_0,ISO Hub CURS Response Received"
line.long 0x08 "IHUB_CURS_REQ_0,ISO Hub CURS Request"
hexmask.long.word 0x08 0.--15. 1. " LINE                           ,Units are in terms of input surface line"
group.long 0xE88++0x07
line.long 0x00 "RG_REGION_CRC_0,Regional CRC Configuration Method"
bitfld.long 0x00 17. " PENDING_REGION8                ,Pending region 8" "No,Yes"
bitfld.long 0x00 16. "                  PENDING_REGION7                ,Pending region 7" "No,Yes"
textline "                                        "
bitfld.long 0x00 15. " PENDING_REGION6                ,Pending region 6" "No,Yes"
bitfld.long 0x00 14. "                  PENDING_REGION5                ,Pending region 5" "No,Yes"
textline "                                        "
bitfld.long 0x00 13. " PENDING_REGION4                ,Pending region 4" "No,Yes"
bitfld.long 0x00 12. "                  PENDING_REGION3                ,Pending region 3" "No,Yes"
textline "                                        "
bitfld.long 0x00 11. " PENDING_REGION2                ,Pending region 2" "No,Yes"
bitfld.long 0x00 10. "                  PENDING_REGION1                ,Pending region 1" "No,Yes"
textline "                                        "
eventfld.long 0x00 9. " PENDING_REGION0                ,Pending region 0" "No,Yes"
bitfld.long 0x00 8. "                  ERROR_REGION8                  ,Error region 8" "No,Yes"
textline "                                        "
bitfld.long 0x00 7. " ERROR_REGION7                  ,Error region 7" "No,Yes"
bitfld.long 0x00 6. "                  ERROR_REGION6                  ,Error region 6" "No,Yes"
textline "                                        "
bitfld.long 0x00 5. " ERROR_REGION5                  ,Error region 5" "No,Yes"
bitfld.long 0x00 4. "                  ERROR_REGION4                  ,Error region 4" "No,Yes"
textline "                                        "
bitfld.long 0x00 3. " ERROR_REGION3                  ,Error region 3" "No,Yes"
bitfld.long 0x00 2. "                  ERROR_REGION2                  ,Error region 2" "No,Yes"
textline "                                        "
bitfld.long 0x00 1. " ERROR_REGION1                  ,Error region 1" "No,Yes"
eventfld.long 0x00 0. "                  ERROR_REGION0                  ,Error region 0" "No,Yes"
line.long 0x04 "RG_REGION_CRC_CONTROL_0,Enable The Function Of CRC"
bitfld.long 0x04 9. " CRC_READBACK_LOCATION          ,CRC Readback Location" "CRC_READBACK_HW,CRC_READBACK_GOLDEN"
bitfld.long 0x04 8. "  REGION8                        ,Region 8" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 7. " REGION7                        ,Region 7" "Disabled,Enabled"
bitfld.long 0x04 6. "             REGION6                        ,Region 6" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 5. " REGION5                        ,Region 5" "Disabled,Enabled"
bitfld.long 0x04 4. "             REGION4                        ,Region 4" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 3. " REGION3                        ,Region 3" "Disabled,Enabled"
bitfld.long 0x04 2. "             REGION2                        ,Region 2" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 1. " REGION1                        ,Region 1" "Disabled,Enabled"
bitfld.long 0x04 0. "             REGION0                        ,Region 0" "Disabled,Enabled"
group.long 0xE90++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_0_0,RG Region CRC Point 0"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xE94++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_1_0,RG Region CRC Point 1"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xE98++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_2_0,RG Region CRC Point 2"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xE9C++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_3_0,RG Region CRC Point 3"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEA0++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_4_0,RG Region CRC Point 4"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEA4++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_5_0,RG Region CRC Point 5"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEA8++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_6_0,RG Region CRC Point 6"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEAC++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_7_0,RG Region CRC Point 7"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEB0++0x03
line.long 0x00 "RG_REGION_CRC_POINT_IN_8_0,RG Region CRC Point 8"
hexmask.long.word 0x00 16.--30. 1. " POINT_IN_Y                     ,The position value are relative to the post-scaled viewport"
hexmask.long.word 0x00 0.--14. 1. "                 POINT_IN_X                     ,The position value are relative to the post-scaled viewport"
group.long 0xEB4++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_0_0,RG Region CRC Size 0"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xEB8++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_1_0,RG Region CRC Size 1"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xEBC++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_2_0,RG Region CRC Size 2"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xEC0++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_3_0,RG Region CRC Size 3"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xEC4++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_4_0,RG Region CRC Size 4"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xEC8++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_5_0,RG Region CRC Size 5"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xECC++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_6_0,RG Region CRC Size 6"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xED0++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_7_0,RG Region CRC Size 7"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xED4++0x03
line.long 0x00 "RG_REGION_CRC_SIZE_8_0,RG Region CRC Size 8"
hexmask.long.word 0x00 16.--30. 1. " SIZE_HEIGHT                    ,Size height"
hexmask.long.word 0x00 0.--14. 1. "                 SIZE_WIDTH                     ,Size width"
group.long 0xED8++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_0_0,RG Region Golden CRC 0"
group.long 0xEDC++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_1_0,RG Region Golden CRC 1"
group.long 0xEE0++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_2_0,RG Region Golden CRC 2"
group.long 0xEE4++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_3_0,RG Region Golden CRC 3"
group.long 0xEE8++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_4_0,RG Region Golden CRC 4"
group.long 0xEEC++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_5_0,RG Region Golden CRC 5"
group.long 0xEF0++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_6_0,RG Region Golden CRC 6"
group.long 0xEF4++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_7_0,RG Region Golden CRC 7"
group.long 0xEF8++0x03
line.long 0x00 "RG_REGION_GOLDEN_CRC_8_0,RG Region Golden CRC 8"
tree.end
width 53.
tree "Display DISP Registers"
group.long 0x1000++0x03
line.long 0x00 "DISP_SIGNAL_OPTIONS0_0,Display Signal Options 0"
bitfld.long 0x00 20. " V_PULSE3_ENABLE                         ,V Pulse 3 Enable" "Disabled,Enabled"
bitfld.long 0x00 19. "         V_PULSE2_ENABLE                 ,V Pulse 2 Enable" "Disabled,Enabled"
group.long 0x1008++0x03
line.long 0x00 "DISP_WIN_OPTIONS_0,Display Window Options"
bitfld.long 0x00 29. " DSI_ENABLE                              ,MIPI Display Serial Interface Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "         SOR1_TIMING_CYA                 ,HDMI expects a delayed vsync and preamble compared to DP" "DP,HDMI"
textline "                                                              "
bitfld.long 0x00 26. " SOR1_ENABLE                             ,SOR1 interface - DP/HDMI" "Disabled,Enabled"
bitfld.long 0x00 25. "         SOR_ENABLE                      ,SOR Enable" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x00 16. " CURSOR_ENABLE                           ,Cursor Enable" "Disabled,Enabled"
group.long 0x100C++0x0B
line.long 0x00 "CORE_SOR_SET_CONTROL_0,Core SOR Set Control"
bitfld.long 0x00 8.--11. " PROTOCOL                                ,Protocol" ",Single TMDS A,,,,,DP A,?..."
line.long 0x04 "CORE_SOR1_SET_CONTROL_0,Core SOR1 Set Control"
bitfld.long 0x04 8.--11. " PROTOCOL                                ,Protocol" ",Single TMDS A,,,,,DP A,?..."
line.long 0x08 "CORE_DSI_SET_CONTROL_0,Core DSI Set Control"
bitfld.long 0x08 8.--11. " PROTOCOL                                ,Protocol" ",,,,,,,,DSI,?..."
group.long 0x101C++0x0F
line.long 0x00 "SYNC_WIDTH_0,H/V SYNC Pulse Width Class"
hexmask.long.word 0x00 16.--30. 1. " V_SYNC_WIDTH                            ,VSYNC pulse width (minimum 1 line clock)"
hexmask.long.word 0x00 0.--14. 1. "             H_SYNC_WIDTH                    ,HSYNC pulse width (minimum 1 pixel clock)"
line.long 0x04 "BACK_PORCH_0,H/V Back Porch"
hexmask.long.word 0x04 16.--30. 1. " V_BACK_PORCH                            ,V back porch minimum 1 line"
hexmask.long.word 0x04 0.--14. 1. "             H_BACK_PORCH                    ,H back porch minimum 1 clock"
line.long 0x08 "DISP_ACTIVE_0,H/V Display Active Width"
hexmask.long.word 0x08 16.--30. 1. " V_DISP_ACTIVE                           ,V display active width (minimum 4 lines)"
hexmask.long.word 0x08 0.--14. 1. "             H_DISP_ACTIVE                   ,H display active width (minimum 8 pixels)"
line.long 0x0C "FRONT_PORCH_0,H/V Front Porch"
hexmask.long.word 0x0C 16.--30. 1. " V_FRONT_PORCH                           ,VSYNC front porch (minimum 1)"
hexmask.long.word 0x0C 0.--14. 1. "             H_FRONT_PORCH                   ,HSYNC front porch (minimum 1)"
group.long 0x104C++0x0F
line.long 0x00 "RG_ELV_0,Early Loadv"
hexmask.long.word 0x00 0.--15. 1. " START                                   ,Start"
line.long 0x04 "CORE_HEAD_SET_STALL_LOCK_0,Core Head Set Stall Lock"
bitfld.long 0x04 7. " UNSTALL_MODE                            ,Unstall mode" "Crash lock,Line lock"
line.long 0x08 "CORE_HEAD_SET_DISPLAY_RATE_0,Core Head Set Display Rate"
bitfld.long 0x08 23. " MIN_REFRESH                             ,Minimum refresh" "Disabled,Enabled"
hexmask.long.tbyte 0x08 1.--22. 1. "         MIN_REFRESH_INTERVAL            ,Minimum refresh interval"
line.long 0x0C "RG_UNSTALL_SPOOLUP_0,RG Unstall Spool-Up"
hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE                                   ,Number of pclk periods between loadv appearing at RG input"
group.long 0x1060++0x03
line.long 0x00 "START_FETCH_DLY_0,Start Fetch Delay"
hexmask.long.word 0x00 0.--15. 1. " DELAY                                   ,Delay"
group.long 0x108C++0x03
line.long 0x00 "V_PULSE2_POSITION_A_0,V Pulse 2 Position A Class"
hexmask.long.word 0x00 0.--15. 1. " V_PULSE2_START_A                        ,V Pulse 2 Start A (minimum 0)"
group.long 0x1094++0x03
line.long 0x00 "V_PULSE3_POSITION_A_0,V Pulse 3 Position A Class"
hexmask.long.word 0x00 0.--15. 1. " V_PULSE3_START_A                        ,V Pulse 3 Start A (minimum 0)"
group.long 0x10C0++0x13
line.long 0x00 "DISP_COLOR_CONTROL_0,Display Color Control"
bitfld.long 0x00 20. " CMU_ENABLE                              ,Enables the output LUT" "Disabled,Enabled"
bitfld.long 0x00 19. "         DITHER_OFFSET                   ,Control a shift in the input pixel values in order to avoid loss of detail in the upper range" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x00 12.--13. " ORD_DITHER_ROTATION                     ,Ordered Dither Frame Rotation" "0,1,2,3"
bitfld.long 0x00 8.--9. "                DITHER_CONTROL                  ,Dither Control" "Disabled,Error accumulation,Ordered,Temporal"
textline "                                                              "
bitfld.long 0x00 6.--7. " TEMPORAL_DITHER_PHASE                   ,Temporal dither LFSR phase control" "Previous val,34'H3FFFFFFFF,34'H155555555,34'H2AAAAAAAA"
bitfld.long 0x00 0.--3. "    BASE_COLOR_SIZE                 ,Display Base Color Size" "BASE666,,,,,,,,BASE888,,BASE101010,,BASE121212,?..."
line.long 0x04 "CORE_HEAD_SET_CONTROL_OUTPUT_LUT_0,Core Head Set Control Output LUT"
bitfld.long 0x04 5.--6. " OUTPUT_MODE                             ,This specifies how output values are calculated" "Index,Interpolate,?..."
bitfld.long 0x04 3.--4. "      RANGE                           ,This specifies the input value range covered by the LUT" "Unity,XRBIAS,XVYCC,?..."
textline "                                                              "
bitfld.long 0x04 1.--2. " SIZE                                    ,Size" "Size 257,,Size 1025,?..."
line.long 0x08 "COREPVT_HEAD_SET_OUTPUT_LUT_BASE_0,Define Start Address Of The Output LUT"
line.long 0x0C "COREPVT_HEAD_SET_OUTPUT_LUT_BASE_HI_0,Define Start Address Of The Output LUT High"
hexmask.long.byte 0x0C 0.--7. 0x01 " ADDRESS                                 ,Address"
line.long 0x10 "CORE_HEAD_SET_PROCAMP_0,Colorspace Mapped To Output Color Select"
hexmask.long.word 0x10 15.--26. 1. " SAT_SINE                                ,Control the hue and saturation adjustment of the UV components"
hexmask.long.word 0x10 3.--14. 1. "             SAT_COS                         ,Saturation COS"
textline "                                                              "
bitfld.long 0x10 2. " CHROMA_LPF                              ,Chroma low pass filtering" "Disabled,Enabled"
group.long 0x10D8++0x0F
line.long 0x00 "COLOR_KEY0_LOWER0_0,Color Key 0 Lower Value"
hexmask.long.word 0x00 16.--31. 1. " COLOR_KEY0_L_G                          ,Color Key 0 Green (Y) Lower value"
hexmask.long.word 0x00 0.--15. 1. "             COLOR_KEY0_L_R                  ,Color Key 0 Red (V) Lower value"
line.long 0x04 "COLOR_KEY0_LOWER1_0,Color Key 0 Lower Value"
hexmask.long.word 0x04 16.--31. 1. " COLOR_KEY0_L_A                          ,Color Key 0 Alpha (0xFF) Lower value"
hexmask.long.word 0x04 0.--15. 1. "             COLOR_KEY0_L_B                  ,Color Key 0 Red (U) Lower value"
line.long 0x08 "COLOR_KEY0_UPPER0_0,Color Key 0 Upper Value"
hexmask.long.word 0x08 16.--31. 1. " COLOR_KEY0_U_G                          ,Color Key 0 Green (Y) Upper value"
hexmask.long.word 0x08 0.--15. 1. "             COLOR_KEY0_U_R                  ,Color Key 0 Red (V) Upper value"
line.long 0x0C "COLOR_KEY0_UPPER1_0,Color Key 0 Upper value"
hexmask.long.word 0x0C 16.--31. 1. " COLOR_KEY0_U_A                          ,Color Key 0 Alpha (0xFF) Upper value"
hexmask.long.word 0x0C 0.--15. 1. "             COLOR_KEY0_U_B                  ,Color Key 0 Blue (U) Upper value"
group.long 0x10EC++0x07
line.long 0x00 "CORE_HEAD_SET_CONTROL_CURSOR_0,Hardware Cursor"
bitfld.long 0x00 27.--28. " DE_GAMMA                                ,Enable sRGB de-gamma of the input data" "None,sRGB,YUV,?..."
hexmask.long.byte 0x00 1.--8. 1. "             FORMAT                          ,Format of the cursor pixels in memory"
line.long 0x04 "CORE_HEAD_SET_CONTROL_CURSOR_NS_0,Shadow Of Hardware Cursor"
bitfld.long 0x04 27.--28. " DE_GAMMA_NS                             ,Enable sRGB de-gamma of the input data" "None,sRGB,YUV,?..."
hexmask.long.byte 0x04 1.--8. 1. "             FORMAT_NS                       ,Format of the cursor pixels in memory"
group.long 0x10F8++0x03
line.long 0x00 "CURSOR_START_ADDR_0,Cursor Start Address"
bitfld.long 0x00 24.--25. " CURSOR_SIZE                             ,Cursor Size" "C32x32,C64x64,C128X128,C256X256"
hexmask.long.tbyte 0x00 0.--21. 0x01 "         CURSOR_START_ADDR               ,Cursor start address bits"
group.long 0x10FC++0x03
line.long 0x00 "CURSOR_START_ADDR_NS_0,Shadow Of Cursor Start Address"
bitfld.long 0x00 24.--25. " CURSOR_SIZE_NS                          ,Cursor size" "32x32,64x64,C128X128,C256X256"
hexmask.long.tbyte 0x00 0.--21. 0x01 "         CURSOR_START_ADDR_NS            ,Cursor start address bits"
group.long 0x1100++0x0F
line.long 0x00 "CURSOR_POSITION_0,Cursor Position"
hexmask.long.word 0x00 16.--31. 1. " V_CURSOR_POSITION                       ,Vertical cursor position (signed)"
hexmask.long.word 0x00 0.--15. 1. "             H_CURSOR_POSITION               ,Horizontal cursor position (signed)"
line.long 0x04 "CURSOR_POSITION_NS_0,Shadow Of Cursor Position"
hexmask.long.word 0x04 16.--31. 1. " V_CURSOR_POSITION_NS                    ,Vertical cursor position (signed)"
hexmask.long.word 0x04 0.--15. 1. "             H_CURSOR_POSITION_NS            ,Horizontal cursor position (signed)"
line.long 0x08 "PCALC_HEAD_SET_CROPPED_POINT_IN_CURSOR_0,Cursor Offset"
hexmask.long.word 0x08 16.--31. 1. " Y                                       ,Cursor vertical line offset"
hexmask.long.word 0x08 0.--15. 1. "             X                               ,Cursor horizontal pixel offset"
line.long 0x0C "PCALC_HEAD_SET_CROPPED_POINT_IN_CURSOR_NS_0,Shadow Of Cursor Offset"
hexmask.long.word 0x0C 16.--31. 1. " Y_NS                                    ,Cursor vertical line offset"
hexmask.long.word 0x0C 0.--15. 1. "             X_NS                            ,Cursor horizontal pixel offset"
group.long 0x1118++0x07
line.long 0x00 "PCALC_HEAD_SET_CROPPED_SIZE_IN_CURSOR_0,Cursor Fetch Size"
hexmask.long.word 0x00 16.--31. 1. " HEIGHT                                  ,Cursor vertical fetch size (lines)"
hexmask.long.word 0x00 0.--15. 1. "             WIDTH                           ,Cursor horizontal fetch size (pixels)"
line.long 0x04 "PCALC_HEAD_SET_CROPPED_SIZE_IN_CURSOR_NS_0,Shadow Of Cursor Fetch Size"
hexmask.long.word 0x04 16.--31. 1. " HEIGHT_NS                               ,Cursor vertical fetch size (lines)"
hexmask.long.word 0x04 0.--15. 1. "             WIDTH_NS                        ,Cursor horizontal fetch size (pixels)"
group.long 0x1140++0x0F
line.long 0x00 "CURSOR_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 30.--31. " STATUS                                  ,This field indicates how far the new VAL value has been promoted so far" "Active,Armed,Assembly,?..."
hexmask.long.word 0x00 0.--15. 1. "         VAL                             ,Meter value in U8.8 fixed point format"
line.long 0x04 "IHUB_COMMON_DISPLAY_FETCH_METER_0,ISO Hub Common Display Fetch Meter"
hexmask.long.byte 0x04 8.--15. 1. " CURS_SLOTS                              ,Cursor slots"
hexmask.long.byte 0x04 0.--7. 1. "               WGRP_SLOTS                      ,WGRP slots"
line.long 0x08 "IHUB_CURS_POOL_CONFIG_0,ISO Hub Cursor Pool Config"
rbitfld.long 0x08 31. " Status                                  ,Status" "Done,Pending"
hexmask.long.word 0x08 0.--15. 1. "          ENTRIES                         ,Entries"
line.long 0x0C "IHUB_CURS_FETCH_METER_0,ISO Hub Cursor Fetch Meter"
hexmask.long.byte 0x0C 0.--7. 1. " SLOTS                                   ,Slots"
group.long 0x1154++0x03
line.long 0x00 "IHUB_CURS_REQ_LIMIT_0,ISO Hub Request Limit"
hexmask.long.word 0x00 0.--11. 1. " LIMIT                                   ,Limit"
rgroup.long 0x1158++0x03
line.long 0x00 "IHUB_CURS_DEBUG_REQ_LIMIT_0,ISO Hub Cursor Debug Request Limit"
hexmask.long.word 0x00 0.--11. 1. " STATUS                                  ,Status"
group.long 0x115C++0x03
line.long 0x00 "IHUB_CURS_STATUS_0,ISO Hub Cursor Status"
rbitfld.long 0x00 31. " STATE                                   ,State" "Idle,Active"
eventfld.long 0x00 21. "           PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                                              "
eventfld.long 0x00 20. " PENDING_REQUESTS_AT_END_OF_FRAME        ,Pending request at end of frame" "No,Yes"
eventfld.long 0x00 19. "              FORMATTER_FIFO_OVERFLOW_ERR     ,Formatter FIFO overflow error" "No,Yes"
textline "                                                              "
eventfld.long 0x00 18. " FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START ,Formatter not in spool-up at frame start" "No,Yes"
eventfld.long 0x00 17. "              POOL_NOT_EMPTY_AT_FRAME_END     ,Pool not empty at frame end" "No,Yes"
textline "                                                              "
eventfld.long 0x00 16. " DP_FETCH_ORDER_ERR_DETECTED             ,DP fetch order error detected" "No,Yes"
hexmask.long.word 0x00 0.--15. 1. "              ENTRIES                         ,Entries"
group.long 0x1308++0x03
line.long 0x00 "RG_SMARTDIMMER3_HISTOGRAM_CTRL_0,RG SMARTDIMMER3 Histogram Control"
bitfld.long 0x00 31. " ENABLE                                  ,Enable/disable the histogram function" "False,True"
bitfld.long 0x00 30. "            ADDR_RESET                      ,Forces the auto decrement pointer reset to 255" "Done,Pending"
textline "                                                              "
rbitfld.long 0x00 29. " RAM_STATUS                              ,Safe the histogram RAM" "Idle,Busy"
bitfld.long 0x00 28. "             VID_LUMA                        ,Use video luminance control" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x00 27. " SD_WINDOW_ENABLE                        ,SD window enable" "Disabled,Enabled"
hexmask.long.tbyte 0x00 0.--23. 1. "         MAX_SATURATED_PIXELS            ,Maximum number of pixels to saturate on a histogram walk"
rgroup.long 0x130C++0x07
line.long 0x00 "RG_SMARTDIMMER3_HISTOGRAM_LUMINANCE_0,RG SMARTDIMMER3 Histogram Luminance"
bitfld.long 0x00 31. " VALID                                   ,Entry in the table is valid" "No,Yes"
hexmask.long 0x00 0.--25. 1. "              NUMBER_OF_PIXELS                ,Number of pixels for each bucket"
line.long 0x04 "RG_SMARTDIMMER3_HISTOGRAM_OVER_SATURATED_BUCKET_0,RG SMARTDIMMER3 Histogram Over Saturated Bucket"
hexmask.long.byte 0x04 0.--7. 1. " NUM                                     ,The bin number"
group.long 0x1314++0x13
line.long 0x00 "RG_SMARTDIMMER3_HISTOGRAM_BUCKET_INTERRUPT_BOUNDS_0,RG SMARTDIMMER3 Histogram Bucket Interrupt Bounds"
bitfld.long 0x00 31. " ENABLE                                  ,Enable" "No,Yes"
hexmask.long.byte 0x00 16.--23. 1. "              UPPER                           ,Upper bounds"
textline "                                                              "
hexmask.long.byte 0x00 0.--7. 1. " LOWER                                   ,Lower bounds"
line.long 0x04 "RG_SMARTDIMMER3_HISTOGRAM_VID_LUMA_0,Luminance Calculation Coefficients"
bitfld.long 0x04 8.--11. " B_COEFF                                 ,Blue coefficients" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "               G_COEFF                         ,Green coefficients" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                              "
bitfld.long 0x04 0.--3. " R_COEFF                                 ,Red coefficients" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "RG_SMARTDIMMER3_GAIN_CTRL_0,AIN Software Programming Guide"
bitfld.long 0x08 31. " ENABLE                                  ,Enable/disable the gain function" "False,True"
bitfld.long 0x08 30. "            UPDATE                          ,Update the gain value" "Done,Pending"
textline "                                                              "
bitfld.long 0x08 29. " TIMING                                  ,Hardware switches to the selected gain table" "Instantly,At vblank"
bitfld.long 0x08 28. "        ADDR_RESET                      ,Forces the auto increment pointer reset to 0" "Done,Pending"
line.long 0x0C "RG_SMARTDIMMER3_GAIN_R_G_0,RG SMARTDIMMER3 Gain Red Green"
bitfld.long 0x0C 30.--31. " GREEN_INT                               ,Green integer component" "0,1,2,3"
hexmask.long.word 0x0C 18.--29. 1. "                GREEN_FRC                       ,Green fractional component"
textline "                                                              "
bitfld.long 0x0C 16.--17. " RED_INT                                 ,Red integer component" "0,1,2,3"
hexmask.long.word 0x0C 2.--13. 1. "                Red_FRC                         ,Red fractional component"
line.long 0x10 "RG_SMARTDIMMER3_GAIN_B_INC_0,RG SMARTDIMMER3 Gain Blue Increment"
bitfld.long 0x10 14.--15. " BLUE_INT                                ,Blue integer component" "0,1,2,3"
hexmask.long.word 0x10 2.--13. 1. "                BLUE_FRC                        ,Blue fractional component"
group.long 0x132C++0x07
line.long 0x00 "RG_SMARTDIMMER3_HISTOGRAM_WINDOW_POSITION_0,Position Of Histogram Window"
hexmask.long.word 0x00 16.--31. 1. " V                                       ,V SD histogram window vertical position"
hexmask.long.word 0x00 0.--15. 1. "             V                               ,V SD histogram window  horizontal position"
line.long 0x04 "RG_SMARTDIMMER3_HISTOGRAM_WINDOW_SIZE_0,Rectangular Sub Region Of The Full Active Raster"
hexmask.long.word 0x04 16.--31. 1. " HEIGHT                                  ,SD histogram window vertical height (lines)"
hexmask.long.word 0x04 0.--15. 1. "             WIDTH                           ,SD histogram window horizontal width (pixels)"
group.long 0x1390++0x07
line.long 0x00 "BLEND_BACKGROUND_COLOR_0,Blend Background Color"
hexmask.long.byte 0x00 24.--31. 1. " BKGND_ALPHA                             ,Background alpha"
hexmask.long.byte 0x00 16.--23. 1. "               BKGND_BLUE                      ,Background blue"
textline "                                                              "
hexmask.long.byte 0x00 8.--15. 1. " BKGND_GREEN                             ,Background green"
hexmask.long.byte 0x00 0.--7. 1. "               BKGND_RED                       ,Background red"
line.long 0x04 "INTERLACE_CONTROL_0,Control interlacing"
rbitfld.long 0x04 2. " INTERLACE_STATUS                        ,Status" "Field1,Field2"
bitfld.long 0x04 1. "           INTERLACE_START                 ,Start" "Field1,Field2"
textline "                                                              "
bitfld.long 0x04 0. " INTERLACE_ENABLE                        ,Enable" "Disabled,Enabled"
group.long 0x139C++0x0F
line.long 0x00 "INTERLACE_FIELD2_SYNC_WIDTH_0,Control the H and V sync widths for FIELD2"
hexmask.long.word 0x00 16.--30. 1. " FIELD2_V_SYNC_WIDTH                     ,This field controls the V sync widths for FIELD2"
line.long 0x04 "INTERLACE_FIELD2_BACK_PORCH_0,Control the H and V back porch widths for FIELD2"
hexmask.long.word 0x04 16.--30. 1. " FIELD2_V_BACK_PORCH                     ,V back porch in units of lineclk"
line.long 0x08 "INTERLACE_FIELD2_FRONT_PORCH_0,Control the H and V front porch widths for FIELD2"
hexmask.long.word 0x08 16.--30. 1. " FIELD2_V_FRONT_PORCH                    ,V front porch in units of lineclk"
line.long 0x0C "INTERLACE_FIELD2_DISP_ACTIVE_0,Control the H and V active widths for FIELD2"
hexmask.long.word 0x0C 16.--30. 1. " FIELD2_V_DISP_ACTIVE                    ,V active width in units of lineclk"
group.long 0x13B0++0x07
line.long 0x00 "CURSOR_START_ADDR_HI_0,Cursor Start Address"
hexmask.long.byte 0x00 0.--7. 0x01 " CURSOR_START_ADDR_HI                    ,Cursor start address bits 39:32"
line.long 0x04 "CURSOR_START_ADDR_HI_NS_0,Shadow Of Cursor Start Address"
hexmask.long.byte 0x04 0.--7. 0x01 " CURSOR_START_ADDR_HI_NS                 ,Cursor start address bits 39:32 shadow"
group.long 0x13BC++0x03
line.long 0x00 "CSC2_CONTROL_0,The CSC2 Control Used For RGB To YCbCr Conversion"
bitfld.long 0x00 2. " LIMIT_RGB_COLOR                         ,Scale RGB [0,255] to [16,235]" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         OUTPUT_COLOR_SELECT             ,Output color select" "RGB,YCBCR709,YCBCR601,YCBCR2020"
group.long 0x13C4++0x13
line.long 0x00 "BLEND_CURSOR_CONTROL_0,Blend Cursor Control"
bitfld.long 0x00 25. " CURSOR_COMPOSITION_MODE                 ,Cursor composition mode" "Blend,XOR"
bitfld.long 0x00 16.--17. "            CURSOR_DST_BLEND_FACTOR_SELECT  ,Select cursor destination blend factor" "Zero,K1,NEG K1 times source,?..."
textline "                                                              "
bitfld.long 0x00 8.--9. " CURSOR_SRC_BLEND_FACTOR_SELECT          ,Select cursor source blend factor" "K1,K1 times source,?..."
hexmask.long.byte 0x00 0.--7. 1. "  CURSOR_ALPHA                    ,Cursor alpha"
line.long 0x04 "CURSOR_CGCTL_0,Cursor CGCTL"
bitfld.long 0x04 31. " CGCTL[31]                               ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x04 30. "         [30]                            ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 29. "      [29]                               ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x04 28. "         [28]                            ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 27. "      [27]                               ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x04 26. "         [26]                            ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 25. "      [25]                               ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x04 24. "         [24]                            ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 23. "      [23]                               ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x04 22. "         [22]                            ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 21. "      [21]                               ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x04 20. "         [20]                            ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 19. "      [19]                               ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x04 18. "         [18]                            ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 17. "      [17]                               ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x04 16. "         [16]                            ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 15. "      [15]                               ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x04 14. "         [14]                            ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 13. "      [13]                               ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x04 12. "         [12]                            ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 11. "      [11]                               ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x04 10. "         [10]                            ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 9. "       [9]                               ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x04 8. "          [8]                            ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 7. "       [7]                               ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x04 6. "          [6]                            ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 5. "       [5]                               ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x04 4. "          [4]                            ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 3. "       [3]                               ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x04 2. "          [2]                            ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x04 1. "       [1]                               ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x04 0. "          [0]                            ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x08 "POSTCOMP_HEAD_CGCTL_0,POSTCOMP Head CGCTL"
bitfld.long 0x08 31. " HEAD_CGCTL[31]                          ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x08 30. "         [30]                            ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 29. "           [29]                          ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x08 28. "         [28]                            ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 27. "           [27]                          ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x08 26. "         [26]                            ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 25. "           [25]                          ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x08 24. "         [24]                            ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 23. "           [23]                          ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x08 22. "         [22]                            ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 21. "           [21]                          ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x08 20. "         [20]                            ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 19. "           [19]                          ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x08 18. "         [18]                            ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 17. "           [17]                          ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x08 16. "         [16]                            ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 15. "           [15]                          ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x08 14. "         [14]                            ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 13. "           [13]                          ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x08 12. "         [12]                            ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 11. "           [11]                          ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x08 10. "         [10]                            ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 9. "            [9]                          ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x08 8. "          [8]                            ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 7. "            [7]                          ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x08 6. "          [6]                            ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 5. "            [5]                          ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x08 4. "          [4]                            ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 3. "            [3]                          ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x08 2. "          [2]                            ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x08 1. "            [1]                          ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x08 0. "          [0]                            ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x0C "DISPLAY_HEAD_CLK_GATE_OVERRIDE_0,Display Head Clock Gate Override"
bitfld.long 0x0C 2. " PCLK_GATE_OVERRIDE                      ,PCLK gate override" "Disabled,Enabled"
bitfld.long 0x0C 1. "         DISPCLK_RG_GATE_OVERRIDE        ,Display clock RG gate override" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x0C 0. " DISPCLK_HEAD_GATE_OVERRIDE              ,Display clock head gate override" "Disabled,Enabled"
line.long 0x10 "DISPLAY_CLK_GATE_OVERRIDE_0,Display Clock Gate Override"
bitfld.long 0x10 2. " CLK_OVR_ON                              ,IP master override bit for display SLCGs" "Disabled,Enabled"
bitfld.long 0x10 1. "         HUBCLK_GATE_OVERRIDE            ,ISO hub clock" "Disabled,Enabled"
textline "                                                              "
bitfld.long 0x10 0. " DISPCLK_COMP_GATE_OVERRIDE              ,Compositor branch of display clock" "Disabled,Enabled"
rgroup.long 0x13D8++0x03
line.long 0x00 "DISPLAY_DBG_TIMING_0,Display Debug Timing"
bitfld.long 0x00 31. " H_BLANK                                 ,Horizontal blank" "0,1"
hexmask.long.word 0x00 16.--28. 1. "                H_COUNT                         ,Horizontal count"
textline "                                                              "
bitfld.long 0x00 15. " V_BLANK                                 ,Vertical blank" "0,1"
hexmask.long.word 0x00 0.--12. 1. "                V_COUNT                         ,Vertical count"
group.long 0x13E0++0x07
line.long 0x00 "COM_CDE_CG_SW_OVR_0,COM Color Decompression Engine Clock Gating Software Override"
bitfld.long 0x00 0. " COM_OVERRIDE                            ,COM override" "Off,On"
line.long 0x04 "COM_CDE_PM_CONTROL_0,COM Color Decompression Engine PM Control"
hexmask.long.byte 0x04 8.--15. 1. " COM_SURFACE_SEL                         ,COM surface select"
bitfld.long 0x04 0.--3. "               COM_SIGNAL_SEL                  ,COM signal select" "CTB_LOOKUP_HIT,CTB_LOOKUP_MISS,UNCOMP_1TO1,ARITHMETIC_2TO1,REDUCTION_4TO1,REDUCTION_8TO1,ZBC,CSR_FETCH_64B,CSR_FETCH_32B_BP,CTB_FETCH_64B,PIXEL_FETCH_64B,PIXEL_FETCH_32B,CTB_READS_SAMPLED,CTB_READ_RSP_LATENCY,PIXEL_READS_SAMPLED,PIXEL_READ_RSP_LATENCY"
rgroup.long 0x13E8++0x03
line.long 0x00 "COM_CDE_PM_SIGNALS_0,COM Color Decompression Engine PM Signals"
group.long 0x13EC++0x03
line.long 0x00 "COM_CDE_DEBUG_CONTROL_0,COM Color Decompression Engine Debug Control"
bitfld.long 0x00 0.--3. " COM_SEL                                 ,COM select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x13F0++0x03
line.long 0x00 "COM_CDE_DEBUG_VAL_0,Color Decompression Engine Debug Value"
group.long 0x13f4++0x03
line.long 0x00 "COM_CDE_SPARE_0,COM Color Decompression Engine Spare"
tree "DC_WINC"
if (((per.l(ad:0x54200000+0x108))&0x10)==0x10)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "A_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " A_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              A_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " A_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              A_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " A_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              A_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "A_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " A_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  A_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " A_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  A_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " A_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " A_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "A_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " A_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 A_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "A_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " A_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 A_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "A_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " A_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 A_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "A_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " A_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 A_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "A_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "A_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " A_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "A_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " A_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "A_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "A_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " A_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "A_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "A_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "A_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "A_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "A_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "A_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " A_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   A_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " A_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   A_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "A_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " A_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                A_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " A_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                A_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "A_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " A_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                A_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "A_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " A_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             A_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "A_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " A_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "A_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " A_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "A_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " A_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              A_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "A_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " A_PIXELS                              ,Pixels"
line.long 0x04 "A_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " A_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " A_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " A_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "A_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "A_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "A_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " A_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   A_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " A_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "A_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "A_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " A_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              A_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " A_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                A_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " A_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             A_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " A_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             A_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "A_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " A_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             A_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "A_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " A_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  A_WATERMARK                                           ,Watermark"
line.long 0x0C "A_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 A_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " A_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  A_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " A_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  A_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " A_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  A_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " A_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  A_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " A_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  A_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " A_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "A_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " A_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "A_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " A_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "A_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " A_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "A_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " A_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              A_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "A_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " A_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              A_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "A_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "A_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " A_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "A_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " A_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "A_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " A_STATUS                              ,Status"
line.long 0x04 "A_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " A_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               A_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "A_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " A_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "A_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " A_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   A_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "A_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " A_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "A_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " A_ID                                  ,ID"
line.long 0x04 "A_RSB_0,RSB registers"
bitfld.long 0x04 0. " A_NONSECURE                           ,Non secure" "0,1"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x20)==0x20)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "B_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " B_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              B_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " B_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              B_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " B_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              B_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "B_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " B_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  B_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " B_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  B_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " B_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " B_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "B_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " B_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 B_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "B_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " B_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 B_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "B_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " B_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 B_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "B_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " B_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 B_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "B_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "B_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " B_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "B_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " B_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "B_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "B_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " B_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "B_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "B_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "B_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "B_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "B_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "B_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " B_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   B_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " B_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   B_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "B_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " B_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                B_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " B_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                B_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "B_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " B_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                B_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "B_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " B_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             B_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "B_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " B_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "B_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " B_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "B_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " B_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              B_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "B_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " B_PIXELS                              ,Pixels"
line.long 0x04 "B_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " B_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " B_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " B_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "B_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "B_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "B_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " B_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   B_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " B_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "B_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "B_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " B_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              B_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " B_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                B_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " B_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             B_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " B_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             B_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "B_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " B_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             B_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "B_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " B_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  B_WATERMARK                                           ,Watermark"
line.long 0x0C "B_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 B_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " B_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  B_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " B_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  B_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " B_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  B_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " B_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  B_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " B_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  B_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " B_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "B_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " B_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "B_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " B_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "B_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " B_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "B_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " B_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              B_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "B_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " B_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              B_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "B_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "B_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " B_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "B_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " B_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "B_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " B_STATUS                              ,Status"
line.long 0x04 "B_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " B_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               B_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "B_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " B_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "B_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " B_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   B_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "B_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " B_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "B_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " B_ID                                  ,ID"
line.long 0x04 "B_RSB_0,RSB registers"
bitfld.long 0x04 0. " B_NONSECURE                           ,Non secure" "0,1"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x40)==0x40)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "C_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " C_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              C_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " C_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              C_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " C_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              C_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "C_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " C_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  C_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " C_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  C_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " C_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " C_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "C_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " C_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 C_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "C_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " C_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 C_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "C_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " C_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 C_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "C_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " C_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 C_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "C_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "C_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " C_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "C_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " C_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "C_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "C_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " C_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "C_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "C_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "C_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "C_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "C_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "C_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " C_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   C_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " C_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   C_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "C_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " C_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                C_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " C_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                C_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "C_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " C_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                C_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "C_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " C_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             C_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "C_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " C_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "C_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " C_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "C_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " C_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              C_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "C_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " C_PIXELS                              ,Pixels"
line.long 0x04 "C_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " C_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " C_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " C_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "C_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "C_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "C_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " C_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   C_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " C_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "C_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "C_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " C_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              C_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " C_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                C_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " C_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             C_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " C_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             C_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "C_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " C_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             C_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "C_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " C_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  C_WATERMARK                                           ,Watermark"
line.long 0x0C "C_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 C_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " C_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  C_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " C_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  C_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " C_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  C_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " C_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  C_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " C_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  C_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " C_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "C_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " C_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "C_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " C_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "C_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " C_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "C_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " C_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              C_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "C_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " C_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              C_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "C_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "C_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " C_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "C_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " C_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "C_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " C_STATUS                              ,Status"
line.long 0x04 "C_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " C_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               C_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "C_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " C_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "C_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " C_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   C_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "C_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " C_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "C_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " C_ID                                  ,ID"
line.long 0x04 "C_RSB_0,RSB registers"
bitfld.long 0x04 0. " C_NONSECURE                           ,Non secure" "0,1"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x80)==0x80)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              D_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              D_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              D_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  D_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " D_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  D_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " D_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 D_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 D_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 D_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 D_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " D_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   D_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   D_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                D_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " D_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                D_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                D_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             D_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              D_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                              ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " D_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " D_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   D_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              D_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " D_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                D_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " D_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             D_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " D_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             D_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " D_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             D_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  D_WATERMARK                                           ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 D_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "D_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              D_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              D_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                              ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               D_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   D_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                  ,ID"
line.long 0x04 "D_RSB_0,RSB registers"
bitfld.long 0x04 0. " D_NONSECURE                           ,Non secure" "0,1"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x100)==0x100)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "E_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " E_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              E_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " E_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              E_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " E_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              E_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "E_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " E_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  E_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " E_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  E_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " E_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " E_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "E_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " E_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 E_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "E_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " E_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 E_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "E_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " E_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 E_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "E_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " E_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 E_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "E_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "E_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " E_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "E_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " E_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "E_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "E_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " E_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "E_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "E_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "E_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "E_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "E_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "E_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " E_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   E_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " E_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   E_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "E_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " E_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                E_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " E_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                E_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "E_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " E_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                E_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "E_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " E_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             E_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "E_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " E_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "E_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " E_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "E_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " E_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              E_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "E_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " E_PIXELS                              ,Pixels"
line.long 0x04 "E_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " E_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " E_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " E_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "E_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "E_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "E_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " E_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   E_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " E_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "E_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "E_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " E_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              E_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " E_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                E_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " E_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             E_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " E_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             E_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "E_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " E_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             E_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "E_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " E_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  E_WATERMARK                                           ,Watermark"
line.long 0x0C "E_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 E_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " E_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  E_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " E_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  E_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " E_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  E_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " E_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  E_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " E_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  E_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " E_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "E_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " E_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "E_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " E_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "E_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " E_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "E_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " E_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              E_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "E_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " E_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              E_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "E_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "E_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " E_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "E_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " E_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "E_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " E_STATUS                              ,Status"
line.long 0x04 "E_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " E_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               E_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "E_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " E_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "E_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " E_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   E_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "E_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " E_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "E_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " E_ID                                  ,ID"
line.long 0x04 "E_RSB_0,RSB registers"
bitfld.long 0x04 0. " E_NONSECURE                           ,Non secure" "0,1"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x200)==0x200)
width 36.
rgroup.long 0x1400++0x17
line.long 0x00 "F_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " F_CGMT_WIDTH                          ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 16.--19. "              F_LUT_WIDTH                                           ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 12.--15. " F_YUV_WIDTH                           ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 8.--11. "              F_SCLR_WIDTH                                          ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
textline "                                             "
bitfld.long 0x00 4.--7. " F_UNIT_WIDTH                          ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
bitfld.long 0x00 0.--3. "              F_FULL_WIDTH                                          ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bit,?..."
line.long 0x04 "F_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " F_DEGAMMA_SUPPORT                     ,Degamma support" "No,Yes"
bitfld.long 0x04 15. "                  F_FP16_SUPPORT                                        ,FP16 support" "No,Yes"
textline "                                             "
bitfld.long 0x04 14. " F_CGMT_PRESENT                        ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                  F_LUT_TYPE                                            ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                             "
bitfld.long 0x04 8.--9. " F_SCALER_TYPE                         ,Scaler type" "None,Normal,Wide,?..."
textline "                                             "
bitfld.long 0x04 0.--1. " F_MAX_WINDOWS                         ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "F_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " F_MAX_PIXELS_5TAP422                  ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                 F_MAX_PIXELS_5TAP444                                  ,Max pixels 5TAP444"
line.long 0x0C "F_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " F_MAX_PIXELS_3TAP422                  ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                 F_MAX_PIXELS_3TAP444                                  ,Max pixels 3TAP444"
line.long 0x10 "F_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " F_MAX_PIXELS_2TAP422                  ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                 F_MAX_PIXELS_2TAP444                                  ,Max pixels 2TAP444"
line.long 0x14 "F_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " F_MAX_PIXELS_1TAP422                  ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                 F_MAX_PIXELS_1TAP444                                  ,Max pixels 1TAP444"
rgroup.long 0x1434++0x03
line.long 0x00 "F_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ               ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                  PRECOMP_REQFIFO_WR_BUSY                               ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                             "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST                    ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                  PRECOMP_ALIVE                                         ,PRECOMP alive" "No,Yes"
textline "                                             "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN                 ,A second level clock gating display clock window enable" "No,Yes"
group.long 0x1438++0x0B
line.long 0x00 "F_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " F_ACT_CNTR_SEL                        ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "F_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " F_DISPCLK_WIN_GATE_OVERRIDE           ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "F_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                             ,Disable bits for second level clock gating in pixel pipe 31" "Disabled,Enabled"
bitfld.long 0x08 30. "             [30]                                                  ,Disable bits for second level clock gating in pixel pipe 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 29. "      [29]                             ,Disable bits for second level clock gating in pixel pipe 29" "Disabled,Enabled"
bitfld.long 0x08 28. "             [28]                                                  ,Disable bits for second level clock gating in pixel pipe 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 27. "      [27]                             ,Disable bits for second level clock gating in pixel pipe 27" "Disabled,Enabled"
bitfld.long 0x08 26. "             [26]                                                  ,Disable bits for second level clock gating in pixel pipe 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 25. "      [25]                             ,Disable bits for second level clock gating in pixel pipe 25" "Disabled,Enabled"
bitfld.long 0x08 24. "             [24]                                                  ,Disable bits for second level clock gating in pixel pipe 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 23. "      [23]                             ,Disable bits for second level clock gating in pixel pipe 23" "Disabled,Enabled"
bitfld.long 0x08 22. "             [22]                                                  ,Disable bits for second level clock gating in pixel pipe 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 21. "      [21]                             ,Disable bits for second level clock gating in pixel pipe 21" "Disabled,Enabled"
bitfld.long 0x08 20. "             [20]                                                  ,Disable bits for second level clock gating in pixel pipe 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 19. "      [19]                             ,Disable bits for second level clock gating in pixel pipe 19" "Disabled,Enabled"
bitfld.long 0x08 18. "             [18]                                                  ,Disable bits for second level clock gating in pixel pipe 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 17. "      [17]                             ,Disable bits for second level clock gating in pixel pipe 17" "Disabled,Enabled"
bitfld.long 0x08 16. "             [16]                                                  ,Disable bits for second level clock gating in pixel pipe 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 15. "      [15]                             ,Disable bits for second level clock gating in pixel pipe 15" "Disabled,Enabled"
bitfld.long 0x08 14. "             [14]                                                  ,Disable bits for second level clock gating in pixel pipe 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 13. "      [13]                             ,Disable bits for second level clock gating in pixel pipe 13" "Disabled,Enabled"
bitfld.long 0x08 12. "             [12]                                                  ,Disable bits for second level clock gating in pixel pipe 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 11. "      [11]                             ,Disable bits for second level clock gating in pixel pipe 11" "Disabled,Enabled"
bitfld.long 0x08 10. "             [10]                                                  ,Disable bits for second level clock gating in pixel pipe 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 9. "       [9]                             ,Disable bits for second level clock gating in pixel pipe 9" "Disabled,Enabled"
bitfld.long 0x08 8. "              [8]                                                  ,Disable bits for second level clock gating in pixel pipe 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 7. "       [7]                             ,Disable bits for second level clock gating in pixel pipe 7" "Disabled,Enabled"
bitfld.long 0x08 6. "              [6]                                                  ,Disable bits for second level clock gating in pixel pipe 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 5. "       [5]                             ,Disable bits for second level clock gating in pixel pipe 5" "Disabled,Enabled"
bitfld.long 0x08 4. "              [4]                                                  ,Disable bits for second level clock gating in pixel pipe 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 3. "       [3]                             ,Disable bits for second level clock gating in pixel pipe 3" "Disabled,Enabled"
bitfld.long 0x08 2. "              [2]                                                  ,Disable bits for second level clock gating in pixel pipe 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x08 1. "       [1]                             ,Disable bits for second level clock gating in pixel pipe 1" "Disabled,Enabled"
bitfld.long 0x08 0. "              [0]                                                  ,Disable bits for second level clock gating in pixel pipe 0" "Disabled,Enabled"
rgroup.long 0x1444++0x03
line.long 0x00 "F_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " F_FSM_STATE                           ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long 0x1480++0x03
line.long 0x00 "F_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register,"
rgroup.long 0x1484++0x07
line.long 0x00 "F_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
line.long 0x04 "F_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
group.long 0x148C++0x0B
line.long 0x00 "F_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                             ,Clock gating control for pipeline 31" "Disabled,Enabled"
bitfld.long 0x00 30. "             [30]                                                  ,Clock gating control for pipeline 30" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 29. "      [29]                             ,Clock gating control for pipeline 29" "Disabled,Enabled"
bitfld.long 0x00 28. "             [28]                                                  ,Clock gating control for pipeline 28" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 27. "      [27]                             ,Clock gating control for pipeline 27" "Disabled,Enabled"
bitfld.long 0x00 26. "             [26]                                                  ,Clock gating control for pipeline 26" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 25. "      [25]                             ,Clock gating control for pipeline 25" "Disabled,Enabled"
bitfld.long 0x00 24. "             [24]                                                  ,Clock gating control for pipeline 24" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 23. "      [23]                             ,Clock gating control for pipeline 23" "Disabled,Enabled"
bitfld.long 0x00 22. "             [22]                                                  ,Clock gating control for pipeline 22" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 21. "      [21]                             ,Clock gating control for pipeline 21" "Disabled,Enabled"
bitfld.long 0x00 20. "             [20]                                                  ,Clock gating control for pipeline 20" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 19. "      [19]                             ,Clock gating control for pipeline 19" "Disabled,Enabled"
bitfld.long 0x00 18. "             [18]                                                  ,Clock gating control for pipeline 18" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 17. "      [17]                             ,Clock gating control for pipeline 17" "Disabled,Enabled"
bitfld.long 0x00 16. "             [16]                                                  ,Clock gating control for pipeline 16" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 15. "      [15]                             ,Clock gating control for pipeline 15" "Disabled,Enabled"
bitfld.long 0x00 14. "             [14]                                                  ,Clock gating control for pipeline 14" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 13. "      [13]                             ,Clock gating control for pipeline 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]                                                  ,Clock gating control for pipeline 12" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 11. "      [11]                             ,Clock gating control for pipeline 11" "Disabled,Enabled"
bitfld.long 0x00 10. "             [10]                                                  ,Clock gating control for pipeline 10" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 9. "       [9]                             ,Clock gating control for pipeline 9" "Disabled,Enabled"
bitfld.long 0x00 8. "              [8]                                                  ,Clock gating control for pipeline 8" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 7. "       [7]                             ,Clock gating control for pipeline 7" "Disabled,Enabled"
bitfld.long 0x00 6. "              [6]                                                  ,Clock gating control for pipeline 6" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 5. "       [5]                             ,Clock gating control for pipeline 5" "Disabled,Enabled"
bitfld.long 0x00 4. "              [4]                                                  ,Clock gating control for pipeline 4" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 3. "       [3]                             ,Clock gating control for pipeline 3" "Disabled,Enabled"
bitfld.long 0x00 2. "              [2]                                                  ,Clock gating control for pipeline 2" "Disabled,Enabled"
textline "                                             "
bitfld.long 0x00 1. "       [1]                             ,Clock gating control for pipeline 1" "Disabled,Enabled"
bitfld.long 0x00 0. "              [0]                                                  ,Clock gating control for pipeline 0" "Disabled,Enabled"
line.long 0x04 "F_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                                   ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                   A_R                                                   ,A red"
textline "                                             "
hexmask.long.byte 0x04 8.--15. 1. " A_G                                   ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                   A_B                                                   ,A blue"
line.long 0x08 "F_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " F_A                                   ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                   F_CR                                                  ,CR"
textline "                                             "
hexmask.long.byte 0x08 8.--15. 1. " F_Y                                   ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                   F_CB                                                  ,CB"
group.long 0x1498++0x03
line.long 0x00 "F_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " F_WIN0_DISCARDED                      ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                F_WIN0_DUMMY                                          ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                             "
bitfld.long 0x00 2. " F_WIN0_ABORTED                        ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                F_WIN0_STATE                                          ,State pixel for window" "Not started,In progress,Completed,?..."
group.long 0x149C++0x03
line.long 0x00 "F_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " F_CLR                                 ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                F_INPUT_WAIT_COUNT                                    ,Number of window input wait events detected so far since the counter was last cleared"
group.long 0x14C0++0x0F
line.long 0x00 "F_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " F_MODE                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline " "
bitfld.long 0x00 0.--1. "                                             F_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "F_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " F_WATERMARK_LO                        ,Watermark low"
line.long 0x08 "F_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " F_WATERMARK_HI                        ,Watermark high"
line.long 0x0C "F_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " F_CLEAR                               ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "              F_MAX                                                 ,Max"
rgroup.long 0x14D0++0x07
line.long 0x00 "F_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " F_PIXELS                              ,Pixels"
line.long 0x04 "F_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " F_CMVGASM                             ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
textline "                                             "
bitfld.long 0x04 4.--6. " F_CMRDOUTSM                           ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                             "
bitfld.long 0x04 0.--2. " F_CMREQSM                             ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long 0x14E0++0x07
line.long 0x00 "F_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "F_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long 0x14F8++0x03
line.long 0x00 "F_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " F_STATUS                              ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "   F_MODE                                                ,Mode" "Ignore,Enabled"
textline "                                             "
hexmask.long 0x00 0.--28. 1. " F_WATERMARK                           ,Watermark"
rgroup.long 0x14FC++0x03
line.long 0x00 "F_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
group.long 0x1508++0x0F
line.long 0x00 "F_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " F_SETTING_NEW                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "              F_CONTRACT_END                                        ,Contract end" "Wait,Force"
textline "                                             "
bitfld.long 0x00 5. " F_REQUEST                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                F_WIN3_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 3. " F_WIN2_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "             F_WIN1_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                             "
rbitfld.long 0x00 1. " F_WIN0_STATUS                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "             F_STATUS                                              ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "F_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control A Register"
bitfld.long 0x04 2. " F_MODE                                ,Mode" "Ignore,Enabled"
textline " "
bitfld.long 0x04 0.--1. "                                             F_SUBMODE                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "F_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " F_STATUS                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "  F_WATERMARK                                           ,Watermark"
line.long 0x0C "F_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " A_MIN_POOL_CONFIG                     ,A min pool config"
eventfld.long 0x0C 11. "                 F_PENDING_CREDITS_AT_END_OF_FRAME                     ,Pending credits at end of frame" "No,Yes"
textline "                                             "
eventfld.long 0x0C 10. " F_PENDING_REQUESTS_AT_END_OF_FRAME    ,Pending request at end of frame" "No,Yes"
eventfld.long 0x0C 9. "                  F_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 8. " F_FETCH_PARAM_CHANGED_BEFORE_LINE_END ,Fetch param changed before line end" "No,Yes"
eventfld.long 0x0C 7. "                  F_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                             "
eventfld.long 0x0C 6. " F_ROTATION_NOT_ENABLED_IN_BLX4        ,Rotation not enabled in BLX4" "No,Yes"
eventfld.long 0x0C 5. "                  F_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                             "
eventfld.long 0x0C 4. " F_FORMATTER_CNTR_UNDERFLOW_ERR        ,Formatter counter underflow error" "No,Yes"
eventfld.long 0x0C 3. "                  F_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                             "
eventfld.long 0x0C 2. " F_THREAD_GROUP_NOT_ENABLED            ,Thread group not enabled" "No,Yes"
eventfld.long 0x0C 1. "                  F_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                             "
eventfld.long 0x0C 0. " F_DP_FETCH_ORDER_ERR_DETECTED         ,Fetch order error detected" "No,Yes"
rgroup.long 0x1524++0x03
line.long 0x00 "F_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " F_LINE                                ,Line"
rgroup.long 0x1534++0x03
line.long 0x00 "F_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " F_VALUE                               ,Value"
rgroup.long 0x1544++0x03
line.long 0x00 "F_IHUB_WIN_GET_0, ISO Hub Window Get Registers"
hexmask.long.word 0x00 0.--15. 1. " F_LINE                                ,Line"
group.long 0x1580++0x13
line.long 0x00 "F_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " F_STATUS                              ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "              F_VAL                                                 ,Meter value in U8.8 fixed point format"
line.long 0x04 "F_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " F_STATUS                              ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "              F_ENTRIES                                             ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "F_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                               ,A Slot"
line.long 0x0C "F_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " F_MODE                                ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "F_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " F_LIMIT                               ,Limit the number of outstanding requests allowed per WGRP"
rgroup.long 0x1594++0x07
line.long 0x00 "F_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " F_STATUS                              ,Status"
line.long 0x04 "F_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " F_STATE                               ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "               F_ENTRIES                                             ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long 0x159C++0x03
line.long 0x00 "F_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Configuration Registers"
bitfld.long 0x00 0.--1. " F_PITCH_REQUEST_SIZE                  ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+0x1A0))&0x01)==0x00)
group.long 0x15A0++0x03
line.long 0x00 "F_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " F_NUM                                 ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                   F_ENABLE                                              ,Enable" "No,Yes"
else
group.long 0x15A0++0x03
line.long 0x00 "F_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " F_ENABLE                              ,Enable" "No,Yes"
endif
group.long 0x1600++0x07
line.long 0x00 "F_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " F_ID                                  ,ID"
line.long 0x04 "F_RSB_0,RSB registers"
bitfld.long 0x04 0. " F_NONSECURE                           ,Non secure" "0,1"
width 0x0B
endif
tree.end
tree "DC_WIN"
if (((per.l(ad:0x54200000+0x108))&0x10)==0x10)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "A_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " A_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          A_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " A_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          A_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " A_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         A_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "A_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " A_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "A_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " A_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "A_POSITION_0,H Position And Size Of Window A After Scaling"
hexmask.long.word 0x08 16.--30. 1. " A_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              A_H_POSITION                            ,Window horizontal position"
line.long 0x0C "A_SIZE_0,Size Of Window A After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " A_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              A_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "A_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " A_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              A_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "A_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " A_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "A_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " A_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              A_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "A_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " A_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          A_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " A_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           A_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "A_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " A_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            A_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "A_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " A_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 A_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " A_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "A_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " A_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                A_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " A_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          A_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " A_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "A_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " A_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              A_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "A_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " A_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              A_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " A_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                A_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " A_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "A_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " A_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " A_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " A_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " A_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "A_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " A_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " A_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " A_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " A_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "A_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "A_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " A_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "A_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " A_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "A_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " A_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "A_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x08 "A_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x0C "A_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x10 "A_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x14 "A_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x18 "A_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x1C "A_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x20 "A_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x24 "A_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x28 "A_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x2C "A_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " A_COEFF                                 ,Coefficients"
line.long 0x30 "A_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " A_COEFF                                 ,Coefficients"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x20)==0x20)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "B_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " B_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          B_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " B_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          B_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " B_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         B_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "B_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " B_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "B_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " B_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "B_POSITION_0,H Position And Size Of Window B After Scaling"
hexmask.long.word 0x08 16.--30. 1. " B_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              B_H_POSITION                            ,Window horizontal position"
line.long 0x0C "B_SIZE_0,Size Of Window B After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " B_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              B_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "B_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " B_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              B_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "B_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " B_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "B_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " B_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              B_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "B_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " B_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          B_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " B_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           B_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "B_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " B_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            B_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "B_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " B_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 B_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " B_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "B_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " B_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                B_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " B_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          B_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " B_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "B_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " B_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              B_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "B_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " B_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              B_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " B_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                B_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " B_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "B_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " B_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " B_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " B_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " B_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "B_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " B_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " B_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " B_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " B_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "B_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "B_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " B_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "B_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " B_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "B_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " B_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "B_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x08 "B_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x0C "B_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x10 "B_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x14 "B_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x18 "B_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x1C "B_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x20 "B_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x24 "B_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x28 "B_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x2C "B_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " B_COEFF                                 ,Coefficients"
line.long 0x30 "B_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " B_COEFF                                 ,Coefficients"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x40)==0x40)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "C_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " C_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          C_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " C_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          C_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " C_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         C_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "C_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " C_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "C_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " C_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "C_POSITION_0,H Position And Size Of Window C After Scaling"
hexmask.long.word 0x08 16.--30. 1. " C_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              C_H_POSITION                            ,Window horizontal position"
line.long 0x0C "C_SIZE_0,Size Of Window C After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " C_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              C_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "C_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " C_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              C_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "C_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " C_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "C_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " C_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              C_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "C_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " C_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          C_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " C_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           C_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "C_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " C_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            C_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "C_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " C_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 C_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " C_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "C_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " C_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                C_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " C_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          C_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " C_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "C_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " C_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              C_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "C_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " C_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              C_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " C_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                C_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " C_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "C_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " C_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " C_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " C_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " C_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "C_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " C_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " C_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " C_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " C_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "C_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "C_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " C_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "C_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " C_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "C_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " C_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "C_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x08 "C_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x0C "C_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x10 "C_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x14 "C_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x18 "C_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x1C "C_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x20 "C_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x24 "C_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x28 "C_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x2C "C_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " C_COEFF                                 ,Coefficients"
line.long 0x30 "C_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " C_COEFF                                 ,Coefficients"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x80)==0x80)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,H Position And Size Of Window D After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION                            ,Window horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window D After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x100)==0x100)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "E_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " E_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          E_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " E_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          E_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " E_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         E_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "E_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " E_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "E_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " E_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "E_POSITION_0,H Position And Size Of Window E After Scaling"
hexmask.long.word 0x08 16.--30. 1. " E_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              E_H_POSITION                            ,Window horizontal position"
line.long 0x0C "E_SIZE_0,Size Of Window E After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " E_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              E_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "E_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " E_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              E_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "E_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " E_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "E_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " E_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              E_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "E_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " E_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          E_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " E_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           E_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "E_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " E_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            E_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "E_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " E_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 E_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " E_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "E_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " E_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                E_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " E_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          E_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " E_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "E_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " E_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              E_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "E_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " E_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              E_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " E_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                E_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " E_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "E_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " E_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " E_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " E_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " E_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "E_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " E_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " E_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " E_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " E_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "E_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "E_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " E_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "E_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " E_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "E_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " E_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "E_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x08 "E_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x0C "E_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x10 "E_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x14 "E_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x18 "E_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x1C "E_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x20 "E_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x24 "E_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x28 "E_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x2C "E_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " E_COEFF                                 ,Coefficients"
line.long 0x30 "E_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " E_COEFF                                 ,Coefficients"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x200)==0x200)
width 54.
group.long 0x1C00++0x03
line.long 0x00 "F_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " F_WIN_ENABLE                            ,Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          F_CP_ENABLE                             ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " F_COLOR_EXPAND                          ,Input format to internal format color expansion" "Disabled,Enabled"
bitfld.long 0x00 4. "          F_SCAN_COLUMN                           ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " F_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         F_H_DIRECTION                           ,Horizontal (X) drawing" "Increment,Decrement"
group.long 0x1C08++0x37
line.long 0x00 "F_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " F_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "F_COLOR_DEPTH_0,Window Color Surface Format"
hexmask.long.byte 0x04 0.--6. 1. " F_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "F_POSITION_0,H Position And Size Of Window F After Scaling"
hexmask.long.word 0x08 16.--30. 1. " F_V_POSITION                            ,Window vertical position"
hexmask.long.word 0x08 0.--14. 1. "              F_H_POSITION                            ,Window horizontal position"
line.long 0x0C "F_SIZE_0,Size Of Window F After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " F_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              F_H_SIZE                                ,Window horizontal size (pixels)"
line.long 0x10 "F_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " F_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              F_WIDTH                                 ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "F_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C  0.--12. 1. " F_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "F_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " F_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              F_PITCH_UV0                             ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "F_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " F_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          F_DE_GAMMA                              ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " F_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           F_COLOR_SPACE                           ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "F_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " F_HORIZONTAL_TAPS                       ,Controlled the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            F_VERTICAL_TAPS                         ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "F_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " F_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 F_INDEX                                 ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " F_DATA                                  ,Value to set a coefficient"
rgroup.long 0x1C40++0x03
line.long 0x00 "F_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " F_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                F_DATA                                  ,Value retrieved for the coefficient given by INDEX"
group.long 0x1C44++0x07
line.long 0x00 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " F_USE422                                ,Store pixels in 422 format in the VS line store enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          F_VBYPASS                               ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " F_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "F_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " F_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              F_X                                     ,Pixels"
group.long 0x1C58++0x0B
line.long 0x00 "F_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " F_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              F_BLEND_BYPASS                          ,Disabled blending for this layer" "Enabled,Bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " F_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                F_K1                                    ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " F_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "F_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " F_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " F_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " F_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " F_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "F_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " F_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " F_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " F_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " F_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long 0x1C80++0x07
line.long 0x00 "F_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "F_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " F_ADDRESS                               ,Address"
group.long 0x1C90++0x03
line.long 0x00 "F_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " F_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long 0x1CC0++0x33
line.long 0x00 "F_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " F_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "F_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x08 "F_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x0C "F_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x10 "F_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x14 "F_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x18 "F_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x1C "F_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x20 "F_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x24 "F_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x28 "F_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x2C "F_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " F_COEFF                                 ,Coefficients"
line.long 0x30 "F_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " F_COEFF                                 ,Coefficients"
width 0x0B
endif
tree.end
tree "DC_WINBUF"
if (((per.l(ad:0x54200000+0x108))&0x10)==0x10)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "A_START_ADDR_0,Window Start Address Register"
line.long 0x04 "A_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "A_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "A_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "A_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "A_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "A_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " A_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       A_X              ,Window horizontal pixel offset"
line.long 0x1C "A_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " A_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       A_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "A_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " A_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  A_SURFACE_KIND   ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "A_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " A_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "A_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " A_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "A_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " A_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "A_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " A_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "A_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " A_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "A_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " A_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "A_START_ADDR_FIELD2,Window start address"
line.long 0x1C "A_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "A_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "A_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "A_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "A_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "A_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " A_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "A_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " A_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "A_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " A_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "A_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " A_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "A_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " A_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "A_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " A_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "A_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " A_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       A_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "A_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " A_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       A_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "A_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "A_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "A_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " A_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     A_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  A_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "A_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "A_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "A_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " A_BASEADDRESSHI             ,Base address high"
line.long 0x18 "A_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " A_BASEADDRESSHI             ,Base address high"
line.long 0x1C "A_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "A_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "A_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " A_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "A_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " A_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "A_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "A_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "A_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " A_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    A_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x20)==0x20)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "B_START_ADDR_0,Window Start Address Register"
line.long 0x04 "B_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "B_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "B_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "B_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "B_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "B_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " B_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       B_X              ,Window horizontal pixel offset"
line.long 0x1C "B_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " B_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       B_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "B_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " B_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  B_SURFACE_KIND   ,Surface kind" "Pitch,,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "B_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " B_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "B_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " B_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "B_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " B_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "B_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " B_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "B_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " B_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "B_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " B_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "B_START_ADDR_FIELD2,Window start address"
line.long 0x1C "B_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "B_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "B_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "B_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "B_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "B_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " B_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "B_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " B_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "B_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " B_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "B_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " B_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "B_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " B_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "B_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " B_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "B_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " B_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       B_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "B_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " B_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       B_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "B_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "B_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "B_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " B_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     B_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  B_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "B_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "B_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "B_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " B_BASEADDRESSHI             ,Base address high"
line.long 0x18 "B_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " B_BASEADDRESSHI             ,Base address high"
line.long 0x1C "B_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "B_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "B_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " B_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "B_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " B_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "B_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "B_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "B_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " B_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    B_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x40)==0x40)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "C_START_ADDR_0,Window Start Address Register"
line.long 0x04 "C_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "C_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "C_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "C_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "C_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "C_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " C_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       C_X              ,Window horizontal pixel offset"
line.long 0x1C "C_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " C_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       C_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "C_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " C_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  C_SURFACE_KIND   ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "C_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " C_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "C_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " C_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "C_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " C_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "C_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " C_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "C_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " C_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "C_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " C_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "C_START_ADDR_FIELD2,Window start address"
line.long 0x1C "C_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "C_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "C_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "C_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "C_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "C_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " C_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "C_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " C_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "C_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " C_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "C_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " C_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "C_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " C_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "C_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " C_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "C_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " C_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       C_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "C_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " C_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       C_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "C_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "C_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "C_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " C_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     C_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  C_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "C_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "C_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "C_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " C_BASEADDRESSHI             ,Base address high"
line.long 0x18 "C_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " C_BASEADDRESSHI             ,Base address high"
line.long 0x1C "C_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "C_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "C_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " C_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "C_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " C_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "C_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "C_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "C_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " C_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    C_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x80)==0x80)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       D_X              ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       D_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  D_SURFACE_KIND   ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       D_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       D_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     D_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  D_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI             ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI             ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    D_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x100)==0x100)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "E_START_ADDR_0,Window Start Address Register"
line.long 0x04 "E_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "E_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "E_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "E_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "E_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "E_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " E_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       E_X              ,Window horizontal pixel offset"
line.long 0x1C "E_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " E_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       E_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "E_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " E_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  E_SURFACE_KIND   ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "E_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " E_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "E_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " E_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "E_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " E_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "E_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " E_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "E_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " E_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "E_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " E_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "E_START_ADDR_FIELD2,Window start address"
line.long 0x1C "E_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "E_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "E_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "E_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "E_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "E_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " E_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "E_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " E_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "E_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " E_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "E_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " E_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "E_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " E_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "E_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " E_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "E_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " E_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       E_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "E_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " E_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       E_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "E_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "E_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "E_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " E_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     E_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  E_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "E_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "E_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "E_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " E_BASEADDRESSHI             ,Base address high"
line.long 0x18 "E_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " E_BASEADDRESSHI             ,Base address high"
line.long 0x1C "E_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "E_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "E_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " E_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "E_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " E_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "E_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "E_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "E_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " E_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    E_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
elif (((per.l(ad:0x54200000+0x108))&0x200)==0x200)
width 54.
group.long 0x2000++0x1F
line.long 0x00 "F_START_ADDR_0,Window Start Address Register"
line.long 0x04 "F_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "F_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "F_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "F_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "F_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "F_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " F_Y                         ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "       F_X              ,Window horizontal pixel offset"
line.long 0x1C "F_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " F_Y_NS                      ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "       F_X_NS           ,Window shadowed horizontal pixel offset"
group.long 0x202C++0x03
line.long 0x00 "F_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " F_BLOCK_HEIGHT              ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "  F_SURFACE_KIND   ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long 0x2034++0x4F
line.long 0x00 "F_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " F_START_ADDR_HI             ,Window start address byte"
line.long 0x04 "F_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " F_START_ADDR_HI_NS          ,Window shadowed start address"
line.long 0x08 "F_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " F_START_ADDR_HI_U           ,Window start address for U plane"
line.long 0x0C "F_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " F_START_ADDR_HI_U_NS        ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "F_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " F_START_ADDR_HI_V           ,Window higher 32 bits of start address for V plane"
line.long 0x14 "F_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " F_START_ADDR_HI_V_NS        ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "F_START_ADDR_FIELD2,Window start address"
line.long 0x1C "F_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "F_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "F_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "F_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "F_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "F_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " F_START_ADDR_FIELD2_HI      ,Window start address"
line.long 0x34 "F_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " F_START_ADDR_FIELD2_HI_NS   ,Window shadowed start address"
line.long 0x38 "F_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " F_START_ADDR_FIELD2_HI_U    ,Window start address for U plane"
line.long 0x3C "F_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " F_START_ADDR_FIELD2_HI_U_NS ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "F_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " F_START_ADDR_FIELD2_HI_V    ,Window higher 32 bits of start address for V plane"
line.long 0x44 "F_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " F_START_ADDR_FIELD2_HI_V_NS ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "F_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " F_Y                         ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "       F_X              ,Window horizontal pixel offset for field 2"
line.long 0x4C "F_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " F_Y_NS                      ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "       F_X_NS           ,Window horizontal pixel offset for field 2"
group.long 0x20B4++0x2F
line.long 0x00 "F_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "F_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "F_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " F_TRAVERSALPATTERN          ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "     F_KIND           ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
bitfld.long 0x08 0. "  F_ENABLESURFACE ,Enable surface" "Disabled,Enabled"
line.long 0x0C "F_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "F_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "F_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " F_BASEADDRESSHI             ,Base address high"
line.long 0x18 "F_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " F_BASEADDRESSHI             ,Base address high"
line.long 0x1C "F_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "F_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "F_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " F_BASEADDRESSHI_FIELD2      ,Base address high field 2"
line.long 0x28 "F_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " F_BASEADDRESSHI_FIELD2_NS   ,Base address high field 2"
line.long 0x2C "F_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long 0x20F4++0x03
line.long 0x00 "F_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long 0x20F8++0x03
line.long 0x00 "F_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " F_ERRORREQ                  ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "    F_MCRSPERROR     ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
endif
tree.end
tree "DC_A"
width 37.
rgroup.long 0x2800++0x17 "WINC A"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x2800+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x2800+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x2800+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x2800+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x2800+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x2800+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x2800+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x2800+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x2800+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x2800+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x2800+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x2800+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x2800+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x2800+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x2800+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x2800+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x2800+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x2800+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x2800+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x2800+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x2800+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x2800+0x1A0)))&0x01)==0x00)
group.long (0x2800+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x2800+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x2800+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x2800+0x600)++0x03 "WIN A"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x2800+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window A After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window A After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x2800+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x2800+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x2800+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x2800+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x2800+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x2800+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x2800+0x700)++0x1F "WINBUF A"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x2800+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x2800+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x2800+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x2800+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x2800+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_B"
width 37.
rgroup.long 0x3400++0x17 "WINC B"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x3400+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x3400+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x3400+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x3400+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x3400+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x3400+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x3400+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x3400+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x3400+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x3400+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x3400+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x3400+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x3400+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x3400+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x3400+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x3400+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x3400+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x3400+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x3400+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x3400+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x3400+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x3400+0x1A0)))&0x01)==0x00)
group.long (0x3400+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x3400+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x3400+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x3400+0x600)++0x03 "WIN B"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x3400+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window B After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window B After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x3400+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x3400+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x3400+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x3400+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x3400+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x3400+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x3400+0x700)++0x1F "WINBUF B"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x3400+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,,BL_16B2,?..."
group.long (0x3400+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x3400+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x3400+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x3400+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_C"
width 37.
rgroup.long 0x4000++0x17 "WINC C"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x4000+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x4000+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x4000+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x4000+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x4000+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x4000+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x4000+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x4000+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x4000+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x4000+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x4000+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x4000+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x4000+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x4000+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x4000+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x4000+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x4000+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x4000+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x4000+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x4000+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x4000+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x4000+0x1A0)))&0x01)==0x00)
group.long (0x4000+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x4000+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x4000+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x4000+0x600)++0x03 "WIN C"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x4000+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window C After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window C After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x4000+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x4000+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x4000+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x4000+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x4000+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x4000+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x4000+0x700)++0x1F "WINBUF C"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x4000+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x4000+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x4000+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x4000+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x4000+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_D"
width 37.
rgroup.long 0x4C00++0x17 "WINC D"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x4C00+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x4C00+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x4C00+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x4C00+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x4C00+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x4C00+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x4C00+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x4C00+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x4C00+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x4C00+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x4C00+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x4C00+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x4C00+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x4C00+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x4C00+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x4C00+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x4C00+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x4C00+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x4C00+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x4C00+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x4C00+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x4C00+0x1A0)))&0x01)==0x00)
group.long (0x4C00+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x4C00+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x4C00+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x4C00+0x600)++0x03 "WIN D"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x4C00+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window D After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window D After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x4C00+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x4C00+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x4C00+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x4C00+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x4C00+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x4C00+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x4C00+0x700)++0x1F "WINBUF D"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x4C00+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x4C00+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x4C00+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x4C00+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x4C00+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_E"
width 37.
rgroup.long 0x5800++0x17 "WINC E"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x5800+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x5800+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x5800+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x5800+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x5800+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x5800+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x5800+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x5800+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x5800+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x5800+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x5800+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x5800+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x5800+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x5800+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x5800+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x5800+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x5800+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x5800+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x5800+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x5800+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x5800+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x5800+0x1A0)))&0x01)==0x00)
group.long (0x5800+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x5800+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x5800+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x5800+0x600)++0x03 "WIN E"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x5800+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window E After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window E After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x5800+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x5800+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x5800+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x5800+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x5800+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x5800+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x5800+0x700)++0x1F "WINBUF E"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x5800+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x5800+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x5800+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x5800+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x5800+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_F"
width 37.
rgroup.long 0x6400++0x17 "WINC F"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x6400+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x6400+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x6400+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x6400+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x6400+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x6400+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x6400+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x6400+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x6400+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x6400+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x6400+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x6400+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x6400+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x6400+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x6400+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x6400+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x6400+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x6400+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x6400+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x6400+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x6400+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x6400+0x1A0)))&0x01)==0x00)
group.long (0x6400+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x6400+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x6400+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x6400+0x600)++0x03 "WIN F"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x6400+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window F After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window F After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x6400+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x6400+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x6400+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x6400+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x6400+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x6400+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x6400+0x700)++0x1F "WINBUF F"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x6400+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x6400+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x6400+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x6400+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x6400+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree "DC_T"
width 37.
rgroup.long 0x7000++0x17 "WINC T"
line.long 0x00 "D_PRECOMP_WGRP_PIPE_CAPA_0,PRECOMP Pipe CAPA Register"
bitfld.long 0x00 20.--23. " D_CGMT_WIDTH                ,Color gamut matrix width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 16.--19. "               D_LUT_WIDTH             ,LUT width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 12.--15. " D_YUV_WIDTH                 ,YUV width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 8.--11. "               D_SCLR_WIDTH            ,SCLR width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
textline "                                              "
bitfld.long 0x00 4.--7. " D_UNIT_WIDTH                ,Unit width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
bitfld.long 0x00 0.--3. "               D_FULL_WIDTH            ,Full width" "8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,?..."
line.long 0x04 "D_PRECOMP_WGRP_PIPE_CAPB_0,PRECOMP Pipe CAPB Register"
bitfld.long 0x04 16. " D_DEGAMMA_SUPPORT           ,Degamma support" "Not supported,Supported"
bitfld.long 0x04 15. "         D_FP16_SUPPORT          ,FP16 support" "Not supported,Supported"
textline "                                              "
bitfld.long 0x04 14. " D_CGMT_PRESENT              ,Color gamut matrix present" "No,Yes"
bitfld.long 0x04 12.--13. "                   D_LUT_TYPE              ,LUT type" "None,Type 257,Type 1025,?..."
textline "                                              "
bitfld.long 0x04 8.--9. " D_SCALER_TYPE               ,Scaler type" "None,Normal,Wide,?..."
bitfld.long 0x04 0.--1. "                D_MAX_WINDOWS           ,Max windows" "1 window,2 windows,3 windows,Up to 4 windows"
line.long 0x08 "D_PRECOMP_WGRP_PIPE_CAPC_0,PRECOMP Pipe CAPC Register"
hexmask.long.word 0x08 16.--31. 1. " D_MAX_PIXELS_5TAP422        ,Max pixels 5TAP422"
hexmask.long.word 0x08 0.--15. 1. "                  D_MAX_PIXELS_5TAP444    ,Max pixels 5TAP444"
line.long 0x0C "D_PRECOMP_WGRP_PIPE_CAPD_0,PRECOMP Pipe CAPD Register"
hexmask.long.word 0x0C 16.--31. 1. " D_MAX_PIXELS_3TAP422        ,Max pixels 3TAP422"
hexmask.long.word 0x0C 0.--15. 1. "                  D_MAX_PIXELS_3TAP444    ,Max pixels 3TAP444"
line.long 0x10 "D_PRECOMP_WGRP_PIPE_CAPE_0,PRECOMP Pipe CAPE Register"
hexmask.long.word 0x10 16.--31. 1. " D_MAX_PIXELS_2TAP422        ,Max pixels 2TAP422"
hexmask.long.word 0x10 0.--15. 1. "                  D_MAX_PIXELS_2TAP444    ,Max pixels 2TAP444"
line.long 0x14 "D_PRECOMP_WGRP_PIPE_CAPF_0,PRECOMP Pipe CAPF Register"
hexmask.long.word 0x14 16.--31. 1. " D_MAX_PIXELS_1TAP422        ,Max pixels 1TAP422"
hexmask.long.word 0x14 0.--15. 1. "                  D_MAX_PIXELS_1TAP444    ,Max pixels 1TAP444"
rgroup.long (0x7000+0x34)++0x03
line.long 0x00 "D_REG_PFE_DEBUG_0,Debug PFE Register"
bitfld.long 0x00 4. " PRECOMP_RESPFIFO_RD_REQ     ,PRECOMP response FIFO read request" "No,Yes"
bitfld.long 0x00 3. "                   PRECOMP_REQFIFO_WR_BUSY ,PRECOMP request FIFO write busy" "No,Yes"
textline "                                              "
bitfld.long 0x00 2. " PRECOMP_ALIVE_LAST          ,PRECOMP alive last" "No,Yes"
bitfld.long 0x00 1. "                   PRECOMP_ALIVE           ,PRECOMP alive" "No,Yes"
textline "                                              "
bitfld.long 0x00 0. " A_SLCG_DISPCLK_WIN_EN       ,A second level clock gating display clock window enable" "Disabled,Enabled"
group.long (0x7000+0x38)++0x0B
line.long 0x00 "D_REG_ACT_CONTROL_0,Activation Control Register"
bitfld.long 0x00 0. " D_ACT_CNTR_SEL              ,Select which counter to use for window A activation" "Vertical counter,Horizontal counter"
line.long 0x04 "D_DISPLAY_WIN_CLK_GATE_OVERRIDE_0,Clock Gate Override Registers"
bitfld.long 0x04 0. " D_DISPCLK_WIN_GATE_OVERRIDE ,Display clock window gate override" "Disabled,Enabled"
line.long 0x08 "D_COMP_WGRP_PIPE_CGCTL_0,Pipe Clock Gating Control Register"
bitfld.long 0x08 31. " CGCTL[31]                   ,Disable bit for second level clock gating in pixel pipe 31" "No,Yes"
bitfld.long 0x08 30. "                   [30]                    ,Disable bit for second level clock gating in pixel pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x08 29. " [29]                        ,Disable bit for second level clock gating in pixel pipe 29" "No,Yes"
bitfld.long 0x08 28. "                   [28]                    ,Disable bit for second level clock gating in pixel pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x08 27. " [27]                        ,Disable bit for second level clock gating in pixel pipe 27" "No,Yes"
bitfld.long 0x08 26. "                   [26]                    ,Disable bit for second level clock gating in pixel pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x08 25. " [25]                        ,Disable bit for second level clock gating in pixel pipe 25" "No,Yes"
bitfld.long 0x08 24. "                   [24]                    ,Disable bit for second level clock gating in pixel pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x08 23. " [23]                        ,Disable bit for second level clock gating in pixel pipe 23" "No,Yes"
bitfld.long 0x08 22. "                   [22]                    ,Disable bit for second level clock gating in pixel pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x08 21. " [21]                        ,Disable bit for second level clock gating in pixel pipe 21" "No,Yes"
bitfld.long 0x08 20. "                   [20]                    ,Disable bit for second level clock gating in pixel pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x08 19. " [19]                        ,Disable bit for second level clock gating in pixel pipe 19" "No,Yes"
bitfld.long 0x08 18. "                   [18]                    ,Disable bit for second level clock gating in pixel pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x08 17. " [17]                        ,Disable bit for second level clock gating in pixel pipe 17" "No,Yes"
bitfld.long 0x08 16. "                   [16]                    ,Disable bit for second level clock gating in pixel pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x08 15. " [15]                        ,Disable bit for second level clock gating in pixel pipe 15" "No,Yes"
bitfld.long 0x08 14. "                   [14]                    ,Disable bit for second level clock gating in pixel pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x08 13. " [13]                        ,Disable bit for second level clock gating in pixel pipe 13" "No,Yes"
bitfld.long 0x08 12. "                   [12]                    ,Disable bit for second level clock gating in pixel pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x08 11. " [11]                        ,Disable bit for second level clock gating in pixel pipe 11" "No,Yes"
bitfld.long 0x08 10. "                   [10]                    ,Disable bit for second level clock gating in pixel pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x08 9. " [9]                         ,Disable bit for second level clock gating in pixel pipe 9" "No,Yes"
bitfld.long 0x08 8. "                   [8]                     ,Disable bit for second level clock gating in pixel pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x08 7. " [7]                         ,Disable bit for second level clock gating in pixel pipe 7" "No,Yes"
bitfld.long 0x08 6. "                   [6]                     ,Disable bit for second level clock gating in pixel pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x08 5. " [5]                         ,Disable bit for second level clock gating in pixel pipe 5" "No,Yes"
bitfld.long 0x08 4. "                   [4]                     ,Disable bit for second level clock gating in pixel pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x08 3. " [3]                         ,Disable bit for second level clock gating in pixel pipe 3" "No,Yes"
bitfld.long 0x08 2. "                   [2]                     ,Disable bit for second level clock gating in pixel pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x08 1. " [1]                         ,Disable bit for second level clock gating in pixel pipe 1" "No,Yes"
bitfld.long 0x08 0. "                   [0]                     ,Disable bit for second level clock gating in pixel pipe 0" "No,Yes"
rgroup.long (0x7000+0x44)++0x03
line.long 0x00 "D_COMP_WGRP_PIPE_DEBUG0_0,WGRP Pipe Debug Register"
bitfld.long 0x00 0.--2. " FSM_STATE                   ,FSM state" "Idle,PREIF loadv,LUT,BEG,PROC,END,?..."
group.long (0x7000+0x80)++0x03
line.long 0x00 "D_PRECOMP_WGRP_LOADV_COUNTER_0,Pre-Compositor WGRP LOADV Counter Register"
textline "                                              "
hgroup.long (0x7000+0x84)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PKT_RCVD_0,Pre-Compositor WGRP Packet Received Register"
in
hgroup.long (0x7000+0x88)++0x03
hide.long 0x00 "D_PRECOMP_WGRP_PIX_RCVD_0,Pre-Compositor WGRP Pixel Packets Received Register"
in
textline "                                              "
group.long (0x7000+0x8C)++0x0B
line.long 0x00 "D_PRECOMP_WGRP_CGCTL_0,Pre-Compositor WGRP Clock Gating Control Register"
bitfld.long 0x00 31. " CGCTL[31]                   ,Disable bit for second level clock gating in the precomp pipe 31" "No,Yes"
bitfld.long 0x00 30. "                   [30]                    ,Disable bit for second level clock gating in the precomp pipe 30" "No,Yes"
textline "                                              "
bitfld.long 0x00 29. " [29]                        ,Disable bit for second level clock gating in the precomp pipe 29" "No,Yes"
bitfld.long 0x00 28. "                   [28]                    ,Disable bit for second level clock gating in the precomp pipe 28" "No,Yes"
textline "                                              "
bitfld.long 0x00 27. " [27]                        ,Disable bit for second level clock gating in the precomp pipe 27" "No,Yes"
bitfld.long 0x00 26. "                   [26]                    ,Disable bit for second level clock gating in the precomp pipe 26" "No,Yes"
textline "                                              "
bitfld.long 0x00 25. " [25]                        ,Disable bit for second level clock gating in the precomp pipe 25" "No,Yes"
bitfld.long 0x00 24. "                   [24]                    ,Disable bit for second level clock gating in the precomp pipe 24" "No,Yes"
textline "                                              "
bitfld.long 0x00 23. " [23]                        ,Disable bit for second level clock gating in the precomp pipe 23" "No,Yes"
bitfld.long 0x00 22. "                   [22]                    ,Disable bit for second level clock gating in the precomp pipe 22" "No,Yes"
textline "                                              "
bitfld.long 0x00 21. " [21]                        ,Disable bit for second level clock gating in the precomp pipe 21" "No,Yes"
bitfld.long 0x00 20. "                   [20]                    ,Disable bit for second level clock gating in the precomp pipe 20" "No,Yes"
textline "                                              "
bitfld.long 0x00 19. " [19]                        ,Disable bit for second level clock gating in the precomp pipe 19" "No,Yes"
bitfld.long 0x00 18. "                   [18]                    ,Disable bit for second level clock gating in the precomp pipe 18" "No,Yes"
textline "                                              "
bitfld.long 0x00 17. " [17]                        ,Disable bit for second level clock gating in the precomp pipe 17" "No,Yes"
bitfld.long 0x00 16. "                   [16]                    ,Disable bit for second level clock gating in the precomp pipe 16" "No,Yes"
textline "                                              "
bitfld.long 0x00 15. " [15]                        ,Disable bit for second level clock gating in the precomp pipe 15" "No,Yes"
bitfld.long 0x00 14. "                   [14]                    ,Disable bit for second level clock gating in the precomp pipe 14" "No,Yes"
textline "                                              "
bitfld.long 0x00 13. " [13]                        ,Disable bit for second level clock gating in the precomp pipe 13" "No,Yes"
bitfld.long 0x00 12. "                   [12]                    ,Disable bit for second level clock gating in the precomp pipe 12" "No,Yes"
textline "                                              "
bitfld.long 0x00 11. " [11]                        ,Disable bit for second level clock gating in the precomp pipe 11" "No,Yes"
bitfld.long 0x00 10. "                   [10]                    ,Disable bit for second level clock gating in the precomp pipe 10" "No,Yes"
textline "                                              "
bitfld.long 0x00 9. " [9]                         ,Disable bit for second level clock gating in the precomp pipe 9" "No,Yes"
bitfld.long 0x00 8. "                   [8]                     ,Disable bit for second level clock gating in the precomp pipe 8" "No,Yes"
textline "                                              "
bitfld.long 0x00 7. " [7]                         ,Disable bit for second level clock gating in the precomp pipe 7" "No,Yes"
bitfld.long 0x00 6. "                   [6]                     ,Disable bit for second level clock gating in the precomp pipe 6" "No,Yes"
textline "                                              "
bitfld.long 0x00 5. " [5]                         ,Disable bit for second level clock gating in the precomp pipe 5" "No,Yes"
bitfld.long 0x00 4. "                   [4]                     ,Disable bit for second level clock gating in the precomp pipe 4" "No,Yes"
textline "                                              "
bitfld.long 0x00 3. " [3]                         ,Disable bit for second level clock gating in the precomp pipe 3" "No,Yes"
bitfld.long 0x00 2. "                   [2]                     ,Disable bit for second level clock gating in the precomp pipe 2" "No,Yes"
textline "                                              "
bitfld.long 0x00 1. " [1]                         ,Disable bit for second level clock gating in the precomp pipe 1" "No,Yes"
bitfld.long 0x00 0. "                   [0]                     ,Disable bit for second level clock gating in the precomp pipe 0" "No,Yes"
line.long 0x04 "D_PRECOMP_WGRP_DFLT_RGB_COLOR_0,Pre-Compositor WGRP Default RGB Color Register"
hexmask.long.byte 0x04 24.--31. 1. " A_A                         ,A alpha"
hexmask.long.byte 0x04 16.--23. 1. "                    A_R                     ,A red"
textline "                                              "
hexmask.long.byte 0x04 8.--15. 1. " A_G                         ,A green"
hexmask.long.byte 0x04 0.--7. 1. "                    A_B                     ,A blue"
line.long 0x08 "D_PRECOMP_WGRP_DFLT_YUV_COLOR_0,Pre-Compositor WGRP Default YUV Color Register"
hexmask.long.byte 0x08 24.--31. 1. " D_A                         ,Alpha"
hexmask.long.byte 0x08 16.--23. 1. "                    D_CR                    ,CR"
textline "                                              "
hexmask.long.byte 0x08 8.--15. 1. " D_Y                         ,Luminance for YCbCr601"
hexmask.long.byte 0x08 0.--7. 1. "                    D_CB                    ,CB"
group.long (0x7000+0x98)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG0_0,Pre-Compositor WGRP Debug 0 Register"
bitfld.long 0x00 4. " D_WIN0_DISCARDED            ,Least one pixel provided by ISOHUB for this window had to be discarded due to an error in the window/pixel sequence" "False,True"
bitfld.long 0x00 3. "                 D_WIN0_DUMMY            ,Least one dummy pixel was inserted into the pipe for this window" "False,True"
textline "                                              "
bitfld.long 0x00 2. " D_WIN0_ABORTED              ,Window fetch was aborted by ISOHUB" "False,True"
bitfld.long 0x00 0.--1. "                 D_WIN0_STATE            ,State pixel for window" "Not started,In progress,Completed,?..."
group.long (0x7000+0x9C)++0x03
line.long 0x00 "D_PRECOMP_WGRP_DEBUG1_0,Pre-Compositor WGRP Debug 1 Register"
eventfld.long 0x00 29. " D_CLR                       ,Clear" "NOP,Clear"
hexmask.long 0x00 0.--27. 1. "                 D_INPUT_WAIT_COUNT      ,Number of window input wait events detected so far since the counter was last cleared"
group.long (0x7000+0xC0)++0x0F
line.long 0x00 "D_IHUB_WGRP_ASR_CTLA_0,ISO Hub WGRP ASR Control A Register"
bitfld.long 0x00 2. " D_MODE                      ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x00 0.--1. " D_SUBMODE                   ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x04 "D_IHUB_WGRP_ASR_CTLB_0,ISO Hub WGRP ASR Control B Register"
hexmask.long 0x04 0.--28. 1. " D_WATERMARK_LO              ,Watermark low"
line.long 0x08 "D_IHUB_WGRP_ASR_CTLC_0,ISO Hub WGRP ASR Control C Register"
hexmask.long 0x08 0.--28. 1. " D_WATERMARK_HI              ,Watermark high"
line.long 0x0C "D_IHUB_WGRP_LATENCY_0,ISOHub WGRP Latency Register"
bitfld.long 0x0C 31. " D_CLEAR                     ,Clear" "Done,Pending"
hexmask.long.word 0x0C 0.--15. 1. "               D_MAX                   ,Max"
rgroup.long (0x7000+0xD0)++0x07
line.long 0x00 "D_IHUB_WGRP_OCC_0,ISO Hub WGRP Occupancy Of Latency Buffer Register"
hexmask.long 0x00 0.--28. 1. " D_PIXELS                    ,Pixels"
line.long 0x04 "D_IHUB_WGRP_DEBUG_STATUS_0,ISO Hub WGRP Debug Status Register"
bitfld.long 0x04 8.--10. " D_CMVGASM                   ,CMVGASM" "Idle,Start,Wait for graph done,Wait for font done,Wait for char done,Wait for RDOUT done,?..."
bitfld.long 0x04 4.--6. "   D_CMRDOUTSM             ,CMRDOUTSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
textline "                                              "
bitfld.long 0x04 0.--2. " D_CMREQSM                   ,CMREQSM" "Idle,Start,Wait for TF done,Wait for surf done,Done,?..."
rgroup.long (0x7000+0xE0)++0x07
line.long 0x00 "D_IHUB_WGRP_REQ_SENT_0,ISO Hub WGRP Request Sent Register"
line.long 0x04 "D_IHUB_WGRP_RSP_RCVD_0,ISO Hub WGRP Responses Received Register"
group.long (0x7000+0xF8)++0x03
line.long 0x00 "D_IHUB_WGRP_CRITICAL_CTL_0,ISO Hub WGRP Critical Control Register"
rbitfld.long 0x00 31. " D_STATUS                    ,Status" "Not above critical,Above critical"
bitfld.long 0x00 29. "    D_MODE                  ,Mode" "Ignore,Enabled"
textline "                                              "
hexmask.long 0x00 0.--28. 1. " D_WATERMARK                 ,Watermark"
rgroup.long (0x7000+0xFC)++0x03
line.long 0x00 "D_IHUB_WGRP_TOTAL_SIZE_0,ISO Hub WGRP Total Size Register"
textline "                                              "
group.long (0x7000+0x108)++0x0F
line.long 0x00 "D_IHUB_WGRP_MEMACC_0,WGRP Data Access Mechanism Register"
bitfld.long 0x00 7. " D_SETTING_NEW                                         ,Provides the mechanism to trigger a new configuration" "Done,Pending"
bitfld.long 0x00 6. "               D_CONTRACT_END                    ,Contract end" "Wait,Force"
textline "                                              "
bitfld.long 0x00 5. " D_REQUEST                                             ,The software requested state of ISO fetching for each WGRP" "Stop,Fetch"
rbitfld.long 0x00 4. "                 D_WIN3_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 3. " D_WIN2_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 2. "              D_WIN1_STATUS                     ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
textline "                                              "
rbitfld.long 0x00 1. " D_WIN0_STATUS                                         ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
rbitfld.long 0x00 0. "              D_STATUS                          ,Indicates that requests for the indicated window have stopped in response to the setting of MEMACCESS_REQUEST" "Stopped,Fetching"
line.long 0x04 "D_IHUB_WGRP_LATENCY_CTLA_0,ISO Hub WGRP Latency Control Register"
bitfld.long 0x04 2. " D_MODE                                                ,Software sets the ASR operating mode" "Ignore,Enabled"
textline "                                              "
bitfld.long 0x04 0.--1. " D_SUBMODE                                             ,Submode" "Watermark,Vblank,Watermark and Vblank,?..."
line.long 0x08 "D_IHUB_WGRP_LATENCY_CTLB_0,ISO Hub WGRP Latency Control B Register"
rbitfld.long 0x08 31. " D_STATUS                                              ,Status" "Not above watermark,Above watermark"
hexmask.long 0x08 0.--28. 1. "   D_WATERMARK                       ,Watermark"
line.long 0x0C "D_IHUB_WIN_STATUS_0,ISO Hub Window Status Register"
hexmask.long.word 0x0C 12.--27. 1. " D_MIN_POOL_CONFIG                                     ,A min pool config"
eventfld.long 0x0C 11. "                  D_PENDING_CREDITS_AT_END_OF_FRAME ,Pending credits at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 10. " D_PENDING_REQUESTS_AT_END_OF_FRAME                    ,Pending request at end of frame" "No,Yes"
textline "                                              "
eventfld.long 0x0C 9. " D_EVEN_OFFSET_NOT_PROGRAMMED_ALONG_WITH_PLANAR_FORMAT ,Even offset not programmed along with planar format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 8. " D_FETCH_PARAM_CHANGED_BEFORE_LINE_END                 ,Fetch param changed before line end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 7. " D_UNSUPPORTED_COLOR_FORMAT                            ,Unsupported color format" "No,Yes"
textline "                                              "
eventfld.long 0x0C 6. " D_ROTATION_NOT_ENABLED_IN_BLX4                        ,Rotation not enabled in BLX4" "No,Yes"
textline "                                              "
eventfld.long 0x0C 5. " D_FORMATTER_FIFO_OVERFLOW_ERR                         ,Formatter FIFO overflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 4. " D_FORMATTER_CNTR_UNDERFLOW_ERR                        ,Formatter counter underflow error" "No,Yes"
textline "                                              "
eventfld.long 0x0C 3. " D_FORMATTER_NOT_IN_SPOOLUP_AT_FRAME_START             ,Formatter not in spool-up at frame start" "No,Yes"
textline "                                              "
eventfld.long 0x0C 2. " D_THREAD_GROUP_NOT_ENABLED                            ,Thread group not enabled" "No,Yes"
textline "                                              "
eventfld.long 0x0C 1. " D_POOL_NOT_EMPTY_AT_FRAME_END                         ,Pool not empty at frame end" "No,Yes"
textline "                                              "
eventfld.long 0x0C 0. " D_DP_FETCH_ORDER_ERR_DETECTED                         ,Fetch order error detected" "No,Yes"
textline "                                              "
rgroup.long (0x7000+0x124)++0x03
line.long 0x00 "D_IHUB_WIN_REQ_0,ISO Hub Window Request Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
rgroup.long (0x7000+0x134)++0x03
line.long 0x00 "D_IHUB_WIN_OCCLUDED_REQ_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_VALUE                                 ,Value"
rgroup.long (0x7000+0x144)++0x03
line.long 0x00 "D_IHUB_WIN_GET_0,ISO Hub Window Request Occluded Register"
hexmask.long.word 0x00 0.--15. 1. " D_LINE                                  ,Line"
group.long (0x7000+0x180)++0x13
line.long 0x00 "D_PRECOMP_WGRP_PIPE_METER_0,Start Of Pipe Metering Register"
rbitfld.long 0x00 31. " D_STATUS                                ,This field indicates how far the new VAL value has been promoted so far" "Done,Pending"
hexmask.long.word 0x00 0.--15. 1. "           D_VAL           ,Meter value in U8.8 fixed point format"
line.long 0x04 "D_IHUB_WGRP_POOL_CONFIG_0,ISO Hub WGRP Memory Pool Allocation Register"
rbitfld.long 0x04 31. " D_STATUS                                ,Indicates whether the requested change has taken full effect yet" "Done,Pending"
hexmask.long.word 0x04 0.--15. 1. "           D_ENTRIES       ,Set the number of MEMPOOL_ENTRY_WIDTH entries allocated to the indicated (indexed) WGRP"
line.long 0x08 "D_IHUB_WGRP_FETCH_METER_0,ISO Hub WGRP Fetch Meter Register"
hexmask.long.byte 0x08 0.--7. 1. " A_SLOTS                                 ,A Slot"
line.long 0x0C "D_IHUB_WGRP_LINEBUF_CONFIG_0,ISO Hub WGRP Line Buffering Configuration Register"
bitfld.long 0x0C 14. " D_MODE                                  ,Amount of lines will be buffered for block linear surfaces" "Two lines,Four lines"
line.long 0x10 "D_IHUB_WGRP_REQ_LIMIT_0,ISO Hub WGRP Request Limit Register"
hexmask.long.word 0x10 0.--11. 1. " D_LIMIT                                 ,Limit"
rgroup.long (0x7000+0x194)++0x07
line.long 0x00 "D_IHUB_WGRP_DEBUG_REQ_LIMIT_0,ISO Hub WGRP Debug Request Limit Register"
hexmask.long.word 0x00 0.--11. 1. " D_STATUS                                ,Status"
line.long 0x04 "D_IHUB_WGRP_STATUS_0,ISO Hub WGRP Status Register"
bitfld.long 0x04 31. " D_STATE                                 ,Reports whether the WGRP is idle or active" "Idle,Active"
hexmask.long.word 0x04 0.--15. 1. "            D_ENTRIES       ,Reports the instantaneous latency buffer usage by the WGRP in MEMPOOL_ENTRY_WIDTH entries"
group.long (0x7000+0x19C)++0x03
line.long 0x00 "D_IHUB_WGRP_CONFIG_0,ISO Hub WGRP Config"
bitfld.long 0x00 0.--1. " D_PITCH_REQUEST_SIZE                    ,Pitch request size" "Size 32B,Size 64B,Size 128B,Size 256B"
if (((per.l(ad:0x54200000+(0x7000+0x1A0)))&0x01)==0x00)
group.long (0x7000+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 1.--5. " D_NUM                                   ,Number of threads" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                D_ENABLE        ,Enable thread group assignment for the window" "Disabled,Enabled"
else
group.long (0x7000+0x1A0)++0x03
line.long 0x00 "D_IHUB_WIN_THREAD_GROUP_0,ISO Hub Window Thread Group"
bitfld.long 0x00 0. " D_ENABLE                                ,Enable thread group assignment for the window" "Disabled,Enabled"
endif
group.long (0x7000+0x200)++0x07
line.long 0x00 "D_STREAMID_0,Stream ID Register"
hexmask.long.word 0x00 0.--9. 1. " D_ID                                    ,ID"
line.long 0x04 "D_RSB_0,RSB register"
bitfld.long 0x04 0. " D_NONSECURE                             ,Non secure" "0,1"
width 54.
group.long (0x7000+0x600)++0x03 "WIN T"
line.long 0x00 "D_WIN_OPTIONS_0,Window Options"
bitfld.long 0x00 30. " D_WIN_ENABLE                            ,AD Window enable" "Disabled,Enabled"
bitfld.long 0x00 16. "          D_CP_ENABLE     ,Color palette enable" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 6. " D_COLOR_EXPAND                          ,Input format to internal format color expansion enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          D_SCAN_COLUMN   ,Scanning direction" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 2. " D_V_DIRECTION                           ,Vertical (Y) drawing" "Increment,Decrement"
bitfld.long 0x00 0. "         D_H_DIRECTION   ,Horizontal (X) drawing" "Increment,Decrement"
group.long (0x7000+0x608)++0x37
line.long 0x00 "D_CORE_WINDOWGROUP_SET_CONTROL_0,Window Group Set Control Register"
bitfld.long 0x00 0.--3. " D_OWNER                                 ,Owner" "Head0,Head1,Head2,,,,,,,,,,,,,None"
line.long 0x04 "D_COLOR_DEPTH_0,Window Color Depth Register"
hexmask.long.byte 0x04 0.--6. 1. " D_COLOR_DEPTH                           ,Window Color Depth"
line.long 0x08 "D_POSITION_0,Position And Size Of Window T After Scaling"
hexmask.long.word 0x08 16.--30. 1. " D_V_POSITION                            ,Vertical position"
hexmask.long.word 0x08 0.--14. 1. "              D_H_POSITION    ,Horizontal position"
line.long 0x0C "D_SIZE_0,Size Of Window T After Scaling"
hexmask.long.word 0x0C 16.--30. 1. " D_V_SIZE                                ,Window vertical size (lines)"
hexmask.long.word 0x0C 0.--14. 1. "              D_H_SIZE        ,Window horizontal size (pixels)"
line.long 0x10 "D_PCALC_WINDOW_SET_CROPPED_SIZE_IN_0,Window Pre-Scaled And Pre-Rotated Size"
hexmask.long.word 0x10 16.--30. 1. " D_HEIGHT                                ,Vertical pre-scaled size (lines)"
hexmask.long.word 0x10 0.--14. 1. "              D_WIDTH         ,Horizontal pre-scaled size (pixels)"
line.long 0x14 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_H_START_PHASE_0,Window Group Horizontal Input Scaler Register"
line.long 0x18 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_V_START_PHASE_0,Window Group Vertical Input Scaler Register"
line.long 0x1C "D_WINDOW_SET_PLANAR_STORAGE_0,Window Set Planar Storage"
hexmask.long.word 0x1C 0.--12. 1. " D_PITCH                                 ,RGBA or Y plane pitch, in 64B chunks"
line.long 0x20 "D_WINDOW_SET_PLANAR_STORAGE_UV_0,Window Set Planar Storage UV Register"
hexmask.long.word 0x20 16.--28. 1. " D_PITCH_UV1                             ,Vertical (planar) pitch, in 64B chunks"
hexmask.long.word 0x20 0.--12. 1. "              D_PITCH_UV0     ,UV (semiplanar) or U (planar) pitch in 64B chunks"
line.long 0x24 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_HPHASE_INCR_0,Phase Increment Value For Horizontal Scaler Register"
line.long 0x28 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_VPHASE_INCR_0,Phase Increment Value For Vertical Scaler Register"
line.long 0x2C "D_WINDOW_SET_PARAMS_0,Window Set Parameters Register"
bitfld.long 0x2C 15. " D_CLAMP_BEFORE_BLEND                    ,Enabled clamping of the final window pixel component values" "Disabled,Enabled"
bitfld.long 0x2C 13.--14. "          D_DE_GAMMA      ,Enabled sRGB de-gamma of the input data" "None,SRGB,YUV8_10,YUV12"
textline "                                                               "
bitfld.long 0x2C 10.--11. " D_INPUT_RANGE                           ,Specified the black..white input value range for the input surface" "Bypass,Limited,Full,?..."
bitfld.long 0x2C 8.--9. "           D_COLOR_SPACE   ,Color space" "RGB,YUV_601,YUV_709,YUV_2020"
line.long 0x30 "D_WINDOWGROUP_SET_CONTROL_INPUT_SCALER_0,Window Group Set Control Input Scaler Register"
bitfld.long 0x30 3.--5. " D_HORIZONTAL_TAPS                       ,Control the number of taps employed in the horizontal direction" ",TAPS_2,,TAPS_5,?..."
bitfld.long 0x30 0.--2. "            D_VERTICAL_TAPS ,Number of taps in the vertical filter to be selected by the user." ",TAPS_2,,TAPS_5,?..."
line.long 0x34 "D_WINDOWGROUP_SET_INPUT_SCALER_COEFF_VALUE_0,Window Group Set Control Input Scaler Coefficient Register"
bitfld.long 0x34 31. " D_SET_READ_INDEX                        ,Set read index" "0,1"
hexmask.long.byte 0x34 15.--22. 1. "                 D_INDEX         ,Set to the value in the data field"
textline "                                                               "
hexmask.long.word 0x34 0.--9. 1. " D_DATA                                  ,Value to set a coefficient"
rgroup.long (0x7000+0x640)++0x03
line.long 0x00 "D_WINDOWGROUP_GET_INPUT_SCALER_COEFF_VALUE_0,Window Group Get Input Scaler Coefficient Register"
hexmask.long.byte 0x00 15.--22. 1. " D_INDEX                                 ,Specifies which coefficient is being read"
hexmask.long.word 0x00 0.--9. 1. "                D_DATA          ,Value retrieved for the coefficient given by INDEX"
group.long (0x7000+0x644)++0x07
line.long 0x00 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_USAGE_0,Window Group Set Input Scaler Usage Register"
bitfld.long 0x00 2. " D_USE422                                ,Use422" "Disabled,Enabled"
bitfld.long 0x00 1. "          D_VBYPASS       ,Vertical Bypass" "Disabled,Enabled"
textline "                                                               "
bitfld.long 0x00 0. " D_HBYPASS                               ,Horizontal Bypass" "Disabled,Enabled"
line.long 0x04 "D_PCALC_WINDOWGROUP_SET_INPUT_SCALER_POINT_IN_0,Window Group Set Input Scaler Point Register"
hexmask.long.word 0x04 16.--31. 1. " D_Y                                     ,Lines"
hexmask.long.word 0x04 0.--15. 1. "              D_X             ,Pixels"
group.long (0x7000+0x658)++0x0B
line.long 0x00 "D_BLEND_LAYER_CONTROL_0,Blend Layer Control Register"
bitfld.long 0x00 25.--27. " D_COLOR_KEY_SELECT                      ,Select whether color key matches are disabled or taken from Src or Dst input" "None,SCR,DST,?..."
bitfld.long 0x00 24. "              D_BLEND_BYPASS  ,Disabled blending for this layer" "Blend enabled,Blend bypass"
textline "                                                               "
hexmask.long.byte 0x00 16.--23. 1. " D_K2                                    ,Constant alpha values"
hexmask.long.byte 0x00 8.--15. 1. "                D_K1            ,Constant alpha values"
textline "                                                               "
hexmask.long.byte 0x00 0.--7. 1. " D_WINDOW_LAYER_DEPTH                    ,Defines window composition order"
line.long 0x04 "D_BLEND_MATCH_SELECT_0,Blend Match Select Register"
bitfld.long 0x04 12.--13. " D_BLEND_FACTOR_DST_ALPHA_MATCH_SELECT   ,Blend factor DST alpha match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x04 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_MATCH_SELECT   ,Blend factor SCR alpha match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x04 4.--6. " D_BLEND_FACTOR_DST_COLOR_MATCH_SELECT   ,Blend factor DST color match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x04 0.--2. " D_BLEND_FACTOR_SRC_COLOR_MATCH_SELECT   ,Blend factor SRC color match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
line.long 0x08 "D_BLEND_NOMATCH_SELECT_0,Blend No Match Select Register"
bitfld.long 0x08 12.--13. " D_BLEND_FACTOR_DST_ALPHA_NOMATCH_SELECT ,Blend factor DST alpha no match select" "Zero,One,NEG K1 times SCR,K2"
textline "                                                               "
bitfld.long 0x08 8.--9. " D_BLEND_FACTOR_SRC_ALPHA_NOMATCH_SELECT ,Blend factor SCR alpha no match select" "Zero,K1,K2,NEG K1 times DST"
textline "                                                               "
bitfld.long 0x08 4.--6. " D_BLEND_FACTOR_DST_COLOR_NOMATCH_SELECT ,Blend factor DST color no match select" "Zero,One,K1,K2,K1 times DST,NEG K1 times DST,NEG K1 times SRC,NEG K1"
textline "                                                               "
bitfld.long 0x08 0.--2. " D_BLEND_FACTOR_SRC_COLOR_NOMATCH_SELECT ,Blend factor SRC color no match select" "Zero,One,K1,K1 times DST,NEG K1 times DST,K1 times SRC,?..."
group.long (0x7000+0x680)++0x07
line.long 0x00 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_0,Set Input LUT Base Register"
line.long 0x04 "D_COREPVT_WINDOWGROUP_SET_INPUT_LUT_BASE_HI_0,Set Input LUT Base High Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_ADDRESS                               ,Address"
group.long (0x7000+0x690)++0x03
line.long 0x00 "D_PRECOMP_WGRP_PARAMS_0,Parameter Register"
bitfld.long 0x00 0. " D_SWAP_UV                               ,Swapped U and V component" "No,Yes"
group.long (0x7000+0x6C0)++0x33
line.long 0x00 "D_WINDOW_SET_CONTROL_0,Window Set Control Register"
bitfld.long 0x00 5. " D_CSC                                   ,Turn gamut color space conversion on for this window" "Disabled,Enabled"
line.long 0x04 "D_CORE_WINDOWGROUP_SET_CSC_RED2RED_0,Window Group Color Space Conversion (Red To Red) Register"
hexmask.long.tbyte 0x04 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x08 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2RED_0,Window Group Color Space Conversion (Green To Red) Register"
hexmask.long.tbyte 0x08 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x0C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2RED_0,Window Group Color Space Conversion (Blue To Red) Register"
hexmask.long.tbyte 0x0C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x10 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2RED_0,Window Group Color Space Conversion (Constant To Red) Register"
hexmask.long.tbyte 0x10 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x14 "D_CORE_WINDOWGROUP_SET_CSC_RED2GREEN_0,Window Group Color Space Conversion (Red To Green) Register"
hexmask.long.tbyte 0x14 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x18 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2GREEN_0,Window Group Color Space Conversion (Green To Green) Register"
hexmask.long.tbyte 0x18 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x1C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2GREEN_0,Window Group Color Space Conversion (Blue To Green) Register"
hexmask.long.tbyte 0x1C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x20 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2GREEN_0,Window Group Color Space Conversion (Constant To Green) Register"
hexmask.long.tbyte 0x20 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x24 "D_CORE_WINDOWGROUP_SET_CSC_RED2BLUE_0,Window Group Color Space Conversion (Red To Blue) Register"
hexmask.long.tbyte 0x24 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x28 "D_CORE_WINDOWGROUP_SET_CSC_GREEN2BLUE_0,Window Group Color Space Conversion (Green To Blue) Register"
hexmask.long.tbyte 0x28 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x2C "D_CORE_WINDOWGROUP_SET_CSC_BLUE2BLUE_0,Window Group Color Space Conversion (Blue To Blue) Register"
hexmask.long.tbyte 0x2C 0.--18. 1. " D_COEFF                                 ,Coefficients"
line.long 0x30 "D_CORE_WINDOWGROUP_SET_CSC_CONSTANT2BLUE_0,Window Group Color Space Conversion (Constant To Blue) Register"
hexmask.long.tbyte 0x30 0.--18. 1. " D_COEFF                                 ,Coefficients"
group.long (0x7000+0x700)++0x1F "WINBUF T"
line.long 0x00 "D_START_ADDR_0,Window Start Address Register"
line.long 0x04 "D_START_ADDR_NS,Window Shadowed Start Address"
line.long 0x08 "D_START_ADDR_U,Window Start Address For U Plane Register"
line.long 0x0C "D_START_ADDR_U_NS_0,Window Shadow Start Address For U Plane Register"
line.long 0x10 "D_START_ADDR_V_0,Window Start Address For V Plane Register"
line.long 0x14 "D_START_ADDR_V_NS_0,Window Shadow Start Address For V Plane Register"
line.long 0x18 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_0,Window Pixel Offset Register"
hexmask.long.word 0x18 16.--31. 1. " D_Y                                     ,Window vertical line offset"
hexmask.long.word 0x18 0.--15. 1. "              D_X             ,Window horizontal pixel offset"
line.long 0x1C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_NS_0,Window Shadow Horizontal Pixel Offset Register"
hexmask.long.word 0x1C 16.--31. 1. " D_Y_NS                                  ,Window shadowed vertical line offset"
hexmask.long.word 0x1C 0.--15. 1. "              D_X_NS          ,Window shadowed horizontal pixel offset"
group.long (0x7000+0x72C)++0x03
line.long 0x00 "D_SURFACE_KIND_0,Window Surface Kind Register"
bitfld.long 0x00 4.--6. " D_BLOCK_HEIGHT                          ,Block height" "Height 1,Height 2,Height 4,Height 8,Height 16,Height 32,?..."
bitfld.long 0x00 0.--1. "         D_SURFACE_KIND  ,Surface kind" "Pitch,Tiled,BL_16B2,?..."
group.long (0x7000+0x734)++0x4F
line.long 0x00 "D_START_ADDR_HI_0,Window Higher Start Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " D_START_ADDR_HI                         ,Window start address byte"
line.long 0x04 "D_START_ADDR_HI_NS_0,Window Shadowed Higher Start Address Register"
hexmask.long.byte 0x04 0.--7. 0x01 " D_START_ADDR_HI_NS                      ,Window shadowed start address"
line.long 0x08 "D_START_ADDR_HI_U_0,Window Higher Start Address For U Plane Register"
hexmask.long.byte 0x08 0.--7. 0x01 " D_START_ADDR_HI_U                       ,Window start address for U plane"
line.long 0x0C "D_START_ADDR_HI_U_NS_0,Window Shadowed Higher Start Address For U Plane Register"
hexmask.long.byte 0x0C 0.--7. 0x01 " D_START_ADDR_HI_U_NS                    ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x10 "D_START_ADDR_HI_V_0,Window Higher Start Address For V Plane Register"
hexmask.long.byte 0x10 0.--7. 0x01 " D_START_ADDR_HI_V                       ,Window higher 32 bits of start address for V plane"
line.long 0x14 "D_START_ADDR_HI_V_NS_0,Window Shadowed Higher Start Address For V Plane Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_START_ADDR_HI_V_NS                    ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x18 "D_START_ADDR_FIELD2,Window start address"
line.long 0x1C "D_START_ADDR_FIELD2_NS_0,Window Shadowed Start Address Register"
line.long 0x20 "D_START_ADDR_FIELD2_U_0,Window Start Address For U Plane Register"
line.long 0x24 "D_START_ADDR_FIELD2_U_NS_0,Window Shadowed Start Address For U Plane Register"
line.long 0x28 "D_START_ADDR_FIELD2_V_0,Window Start Address For V Plane Register"
line.long 0x2C "D_START_ADDR_FIELD2_V_NS_0,Window Shadowed Start Address For V Plane Register"
line.long 0x30 "D_START_ADDR_FIELD2_HI_0,Window Higher Field 2 Start Address Register"
hexmask.long.byte 0x30 0.--7. 0x01 " D_START_ADDR_FIELD2_HI                  ,Window start address"
line.long 0x34 "D_START_ADDR_FIELD2_HI_NS_0,Window Shadowed Higher Field 2 Start Address Register"
hexmask.long.byte 0x34 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_NS               ,Window shadowed start address"
line.long 0x38 "D_START_ADDR_FIELD2_HI_U_0,Window Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x38 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U                ,Window start address for U plane"
line.long 0x3C "D_START_ADDR_FIELD2_HI_U_NS_0,Window Shadowed Higher Field 2 Start Address For U Plane Register"
hexmask.long.byte 0x3C 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_U_NS             ,Window shadowed higher 32 bits of start address for U plane"
line.long 0x40 "D_START_ADDR_FIELD2_HI_V_0,Window Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x40 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V                ,Window higher 32 bits of start address for V plane"
line.long 0x44 "D_START_ADDR_FIELD2_HI_V_NS_0,Window Shadowed Higher Field 2 Start Address For V Plane Register"
hexmask.long.byte 0x44 0.--7. 0x01 " D_START_ADDR_FIELD2_HI_V_NS             ,Window shadowed higher 32 bits of start address for V plane"
line.long 0x48 "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_0,Window Field 2 Interlace Offset Register"
hexmask.long.word 0x48 16.--31. 1. " D_Y                                     ,Window vertical line offset for field 2"
hexmask.long.word 0x48 0.--15. 1. "              D_X             ,Window horizontal pixel offset for field 2"
line.long 0x4C "D_PCALC_WINDOW_SET_CROPPED_POINT_IN_FIELD2_NS_0,Window Field 2 Interlace Offset"
hexmask.long.word 0x4C 16.--31. 1. " D_Y_NS                                  ,Window vertical line offset for field 2"
hexmask.long.word 0x4C 0.--15. 1. "              D_X_NS          ,Window horizontal pixel offset for field 2"
group.long (0x7000+0x7B4)++0x2F
line.long 0x00 "D_SCRATCH_REGISTER_0_0,Window Scratch 0 Register"
line.long 0x04 "D_SCRATCH_REGISTER_1_0,Window Scratch 1 Register"
line.long 0x08 "D_CDE_CONTROL_0,Window CDE Control Register"
bitfld.long 0x08 11. " D_TRAVERSALPATTERN                      ,Traversal pattern" "Fixed,Random"
bitfld.long 0x08 4.--7. "            D_KIND          ,Kind" "CRA,BRA,YUV_8B_1C,YUV_8B_2C,YUV_10B_1C,YUV_10B_2C,YUV_12B_1C,YUV_12B_2C,?..."
textline "                                                               "
bitfld.long 0x08 0. " D_ENABLESURFACE                         ,Enable surface" "Disabled,Enabled"
line.long 0x0C "D_CDE_COMPTAG_BASE_0,Window CDE Compositor Tag Base Register"
line.long 0x10 "D_CDE_COMPTAG_BASE_NS_0,Window Shadowed CDE Compositor Tag Base Register"
line.long 0x14 "D_CDE_COMPTAG_BASEHI_0,Window CDE Compositor Tag Base High Register"
hexmask.long.byte 0x14 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x18 "D_CDE_COMPTAG_BASEHI_NS_0,Window Shadowed CDE Compositor Tag Base High Register"
hexmask.long.byte 0x18 0.--7. 0x01 " D_BASEADDRESSHI                         ,Base address high"
line.long 0x1C "D_CDE_COMPTAG_BASE_FIELD2_0,Window CDE Compositor Tag Base Field 2 Register"
line.long 0x20 "D_CDE_COMPTAG_BASE_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base Field 2 Register"
line.long 0x24 "D_CDE_COMPTAG_BASEHI_FIELD2_0,Window CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x24 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2                  ,Base address high field 2"
line.long 0x28 "D_CDE_COMPTAG_BASEHI_FIELD2_NS_0,Window Shadowed CDE Compositor Tag Base High Field 2 Register"
hexmask.long.byte 0x28 0.--7. 0x01 " D_BASEADDRESSHI_FIELD2_NS               ,Base address high field 2"
line.long 0x2C "D_CDE_ZBC_COLOR_0,Window CDE ZBC Color Register"
group.long (0x7000+0x7F4)++0x03
line.long 0x00 "D_CDE_CTB_ENTRY_0,Window CDE CTB Entry Register"
rgroup.long (0x7000+0x7F8)++0x03
line.long 0x00 "D_CDE_MCRSPERROR_0,Window CDE MCRSP Error Register"
bitfld.long 0x00 2. " D_ERRORREQ                              ,Error request" "CTBREQ,COMPREQ"
bitfld.long 0x00 0.--1. "           D_MCRSPERROR    ,MCRSP error" "Okay,EXOKAY,SLVERR,DECERR"
width 0x0B
tree.end
tree.end
width 0x0B
tree.end
tree "Display Interfaces"
base ad:0x15300000
width 22.
tree "MIPI-DSI Registers"
group.long 0x00++0x0B
line.long 0x00 "INCR_SYNCPT_0,DSI_INCR_SYNCPT_0"
hexmask.long.byte 0x00 8.--15. 1. " COND                 ,Condition mapped from raise/wait"
hexmask.long.byte 0x00 0.--7. 1. "             INDX                   ,Syncpt index value"
line.long 0x04 "INCR_SYNCPT_CNTRL_0,DSI_INCR_SYNCPT_CNTRL_0"
bitfld.long 0x04 8. " INCR_SYNCPT_NO_STALL ,The client host interface will be stalled when FIFOs are full" "No full,Full"
bitfld.long 0x04 0. "        INCR_SYNCPT_SOFT_RESET ,All internal states of the client syncpt block will be reset" "No reset,Reset"
line.long 0x08 "INCR_SYNCPT_ERROR_0,DSI_INCR_SYNCPT_ERROR_0"
sif (cpuis("TEGRAX2"))
group.long 0x20++0x03
line.long 0x00 "CTXSW_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL         ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "           NEXT_CLASS             ,Next requested channel"
else
group.long 0x20++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
rbitfld.long 0x00 28.--31. " NEXT_CHANNEL         ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 16.--25. 1. "             NEXT_CLASS             ,Next requested class"
bitfld.long 0x00 12.--15. "           CURR_CHANNEL      ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x00 11. " AUTO_ACK             ,Automatically acknowledge" "Manual,AutoACK"
hexmask.long.word 0x00 0.--9. 1. "        CURR_CLASS             ,Current working class"
endif
base ad:0x15300004
rgroup.long 0x24++0x03
line.long 0x00 "RD_DATA_0,DSI Read Return Data"
group.long 0x28++0x27
line.long 0x00 "WR_DATA_0,Host FIFO Write Input"
line.long 0x04 "POWER_CONTROL_0,Display Power Control. DSI Enable"
bitfld.long 0x04 0. " LEG_DSI_ENABLE       ,DSI interface enable" "Disabled,Enabled"
line.long 0x08 "INT_ENABLE_0,Interrupt Enable Register"
bitfld.long 0x08 0. " CTXSW_INT_ENABLE     ,Context switch interrupt enable" "Disabled,Enabled"
line.long 0x0C "INT_STATUS_0,Interrupt Status Register"
eventfld.long 0x0C 0. " CTXSW_INT            ,Context switch interrupt status" "No interrupt,Interrupt"
line.long 0x10 "INT_MASK_0,Interrupt Mask"
bitfld.long 0x10 0. " CTXSW_INT_MASK       ,Context switch interrupt mask" "Masked,Not masked"
line.long 0x14 "HOST_DSI_CONTROL_0,DSI Control Register When Input Is From HOST"
bitfld.long 0x14 21. " FIFO_STAT_RESET      ,Clear FIFO underflow/overflow flags" "No occurred,Occurred"
bitfld.long 0x14 20. "    CRC_RESET              ,CRC generator reset" "No reset,Reset"
bitfld.long 0x14 16.--18. "       DSI_PHY_CLK_DIV   ,Phy clock divider value for byte clock" "/1,/2,?..."
textline "                               "
bitfld.long 0x14 12.--13. " HOST_TX_TRIG_SRC     ,Source of the trigger" "SOL,FIFO Level,Immediate,?..."
bitfld.long 0x14 8.--9. "     DSI_ULTRA_LOW_POWER    ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
bitfld.long 0x14 7. "     PERIPH_RESET      ,Initiate an escape mode peripheral reset" "Disabled,Enabled"
textline "                               "
bitfld.long 0x14 6. " RAW_DATA             ,Host raw data mode" "Disabled,Enabled"
bitfld.long 0x14 5. "       DSI_HIGH_SPEED_TRANS   ,DSI high speed transmission of packets" "Low,High"
bitfld.long 0x14 4. "           PKT_WR_FIFO_SEL   ,Host write FIFO select" "Host,Video"
textline "                               "
bitfld.long 0x14 3. " IMM_BTA              ,Generate BTA immediately" "Disabled,Enabled"
bitfld.long 0x14 2. "       PKT_BTA                ,Generate BTA at the end of host packets" "Disabled,Enabled"
bitfld.long 0x14 1. "       CS_ENABLE         ,Enable hardware check sum for host packets" "Disabled,Enabled"
textline "                               "
bitfld.long 0x14 0. " ECC_ENABLE           ,Enable hardware error correction code" "Disabled,Enabled"
line.long 0x18 "CONTROL_0,General DSI Control Register"
bitfld.long 0x18 31. " DSI_DBG_ENABLE       ,Turn off clock monitoring when enabled for debug" "Disabled,Enabled"
bitfld.long 0x18 30. "       DFMT_16BPP_SWAP_EN     ,16BPP Swap enabled" "Disabled,Enabled"
bitfld.long 0x18 20. "       DSI_HS_CLK_CTRL   ,Control for the HS clock lane" "Continuous,TX Only"
textline "                               "
bitfld.long 0x18 16.--17. " DSI_VIRTUAL_CHANNEL  ,Virtual channel ID" "0,1,2,3"
bitfld.long 0x18 12.--13. "              DSI_DATA_FORMAT        ,Pixel data format transmitted" "BIT16P,BIT18NP,BIT18P,BIT24P"
bitfld.long 0x18 8.--9. "        VID_TX_TRIG_SRC   ,Source of the trigger to start sending packets" "SOL,FIFO Level,Immediate,?..."
textline "                               "
bitfld.long 0x18 4.--5. " DSI_NUM_DATA_LANES   ,Number of D-PHY data lanes" "1,2,3,4"
bitfld.long 0x18 3. "              VID_DCS_ENABLE         ,Enable for insertion of DCS commands" "Disabled,Enabled"
bitfld.long 0x18 2. "       DSI_VID_SOURCE    ,Source of video pixels" "Display 0,Display 1"
textline "                               "
bitfld.long 0x18 1. " DSI_VID_ENABLE       ,Video DSI interface enable" "Disabled,Enabled"
bitfld.long 0x18 0. "       DSI_HOST_ENABLE        ,Host DSI interface enable" "Disabled,Enabled"
line.long 0x1C "SOL_DELAY_0,Number Of Byte-clock Counts To Wait"
hexmask.long.word 0x1C 0.--15. 1. " SOL_DELAY            ,Start of line before generating output packets"
line.long 0x20 "MAX_THRESHOLD_0,Maximum Threshold Registers For DSI Related Packets"
hexmask.long.word 0x20 0.--15. 1. " MAX_THRESHOLD        ,Start draining FIFO once this threshold is met"
line.long 0x24 "TRIGGER_0,Manual Transmissions Trigger Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x24 2. " SKEWCAL_TRIGGER      ,SKEWCAL trigger" "Not triggered,Triggered"
textline "                               "
endif
bitfld.long 0x24 1. " DSI_HOST_TRIGGER     ,DSI Host trigger" "Not triggered,Triggered"
bitfld.long 0x24 0. "  DSI_VID_TRIGGER        ,DSI VID trigger" "Not triggered,Triggered"
rgroup.long 0x50++0x07
line.long 0x00 "TX_CRC_0,Transmission CRC"
line.long 0x04 "STATUS_0,DSI Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 13. " DSI_CLOCK_LANE_IDLE  ,DSI clock lane" "Busy,Idle"
bitfld.long 0x04 12. "           HRD_FIFO_UNDERFLOW     ,Host read data FIFO underflow event occurred" "No underflow,Underflow"
bitfld.long 0x04 11. "   HRD_FIFO_OVERFLOW ,Host read data FIFO overflow event occurred" "No overflow,overflow"
textline "                               "
endif
bitfld.long 0x04 10. " DSI_IDLE             ,DSI is IDLE" "Busy,Idle"
bitfld.long 0x04 9. "           LB_UNDERFLOW           ,Line buffer underflow event happened" "No underflow,Underflow"
bitfld.long 0x04 8. "   LB_OVERFLOW       ,Line buffer overflow event happened" "No overflow,Overflow"
textline "                               "
bitfld.long 0x04 0.--4. " RD_FIFO_COUNT        ,Data words left in the host read data return FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0x58++0x03
line.long 0x00 "DSI_VID_BTA_CONTROL_0,DSI BTA Operation In Video/DCS Mode Control Register"
bitfld.long 0x00 1.--3. " BTA_VID_LINE_TYPE    ,Blank Line type on which BTA operation is to be performed in video/DCS mode" "Type 0,Type 1,Type 2,Type 3,Type 4,Type 5,?..."
bitfld.long 0x00 0. "         BTA_VID_MODE           ,Configuration bit to choose if BTA operation has to be done for every frame until disabled (or) only once when triggered" "One time,Continuous"
endif
tree.end
width 20.
tree "Initialization Sequence Registers"
group.long 0x68++0x03
line.long 0x00 "INIT_SEQ_CONTROL_0,DSI Initialization Sequence Control"
sif (cpuis("TEGRAX1"))
hexmask.long.byte 0x00 8.--14. 1. " DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count"
elif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " DSI_INIT_SEQ_MODE         ,Configuration bit to choose if init sequence" "Continuous,Once"
hexmask.long.byte 0x00 8.--14. 1. "  DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count"
textline "                             "
else
bitfld.long 0x00 8.--13. " DSI_FRAME_INIT_BYTE_COUNT ,Frame initialization sequence byte count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 0. " DSI_SEND_INIT_SEQUENCE    ,Send initialization sequence" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "INIT_SEQ_DATA_0_0,DSI Init Sequence Write Data 0"
group.long 0x70++0x03
line.long 0x00 "INIT_SEQ_DATA_1_0,DSI Init Sequence Write Data 1"
group.long 0x74++0x03
line.long 0x00 "INIT_SEQ_DATA_2_0,DSI Init Sequence Write Data 2"
group.long 0x78++0x03
line.long 0x00 "INIT_SEQ_DATA_3_0,DSI Init Sequence Write Data 3"
group.long 0x7C++0x03
line.long 0x00 "INIT_SEQ_DATA_4_0,DSI Init Sequence Write Data 4"
group.long 0x80++0x03
line.long 0x00 "INIT_SEQ_DATA_5_0,DSI Init Sequence Write Data 5"
group.long 0x84++0x03
line.long 0x00 "INIT_SEQ_DATA_6_0,DSI Init Sequence Write Data 6"
group.long 0x88++0x03
line.long 0x00 "INIT_SEQ_DATA_7_0,DSI Init Sequence Write Data 7"
tree.end
width 16.
tree "Packet Sequence Registers"
group.long 0x8C++0x07
line.long 0x00 "PKT_SEQ_0_LO_0,DSI Packet Sequence 0 LO Half"
bitfld.long 0x00 30. " SEQ_0_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_02_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_02_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_02_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_01_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_01_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_01_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_00_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_00_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_00_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_0_HI_0,DSI Packet Sequence 0 HI Half"
bitfld.long 0x04 29. " PKT_05_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_05_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_05_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_04_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_04_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_04_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_03_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_03_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_03_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
group.long 0x94++0x07
line.long 0x00 "PKT_SEQ_1_LO_0,DSI Packet Sequence 1 LO Half"
bitfld.long 0x00 30. " SEQ_1_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_12_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_12_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_12_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_11_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_11_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_11_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_10_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_10_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_10_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_1_HI_0,DSI Packet Sequence 1 HI Half"
bitfld.long 0x04 29. " PKT_15_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_15_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_15_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_14_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_14_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_14_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_13_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_13_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_13_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
group.long 0x9C++0x07
line.long 0x00 "PKT_SEQ_2_LO_0,DSI Packet Sequence 2 LO Half"
bitfld.long 0x00 30. " SEQ_2_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_22_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_22_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_22_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_21_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_21_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_21_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_20_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_20_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_20_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_2_HI_0,DSI Packet Sequence 2 HI Half"
bitfld.long 0x04 29. " PKT_25_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_25_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_25_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_24_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_24_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_24_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_23_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_23_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_23_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
group.long 0xA4++0x07
line.long 0x00 "PKT_SEQ_3_LO_0,DSI Packet Sequence 3 LO Half"
bitfld.long 0x00 30. " SEQ_3_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_32_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_32_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_32_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_31_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_31_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_31_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_30_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_30_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_30_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_3_HI_0,DSI Packet Sequence 3 HI Half"
bitfld.long 0x04 29. " PKT_35_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_35_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_35_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_34_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_34_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_34_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_33_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_33_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_33_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
group.long 0xAC++0x07
line.long 0x00 "PKT_SEQ_4_LO_0,DSI Packet Sequence 4 LO Half"
bitfld.long 0x00 30. " SEQ_4_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_42_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_42_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_42_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_41_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_41_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_41_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_40_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_40_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_40_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_4_HI_0,DSI Packet Sequence 4 HI Half"
bitfld.long 0x04 29. " PKT_45_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_45_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_45_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_44_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_44_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_44_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_43_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_43_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_43_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
group.long 0xB4++0x07
line.long 0x00 "PKT_SEQ_5_LO_0,DSI Packet Sequence 5 LO Half"
bitfld.long 0x00 30. " SEQ_5_FORCE_LP ,Force the D-PHY to go to LP mode after the last packet of the sequence" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 29. " PKT_52_EN      ,Packet 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23.--28. "  PKT_52_ID   ,Packet 2 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--22. "    PKT_52_SIZE ,Packet 2 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 19. " PKT_51_EN      ,Packet 1 enable" "Disabled,Enabled"
bitfld.long 0x00 13.--18. "  PKT_51_ID   ,Packet 1 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 10.--12. "    PKT_51_SIZE ,Packet 1 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PKT_50_EN      ,Packet 0 enable" "Disabled,Enabled"
bitfld.long 0x00 3.--8. "  PKT_50_ID   ,Packet 0 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "    PKT_50_SIZE ,Packet 0 size pointer" "0,1,2,3,4,5,6,7"
line.long 0x04 "PKT_SEQ_5_HI_0,DSI Packet Sequence 5 HI Half"
bitfld.long 0x04 29. " PKT_55_EN      ,Packet 5 enable" "Disabled,Enabled"
bitfld.long 0x04 23.--28. "  PKT_55_ID   ,Packet 5 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 20.--22. "    PKT_55_SIZE ,Packet 5 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 19. " PKT_54_EN      ,Packet 4 enable" "Disabled,Enabled"
bitfld.long 0x04 13.--18. "  PKT_54_ID   ,Packet 4 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 10.--12. "    PKT_54_SIZE ,Packet 4 size pointer" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x04 9. " PKT_53_EN      ,Packet 3 enable" "Disabled,Enabled"
bitfld.long 0x04 3.--8. "  PKT_53_ID   ,Packet 3 Packet ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--2. "    PKT_53_SIZE ,Packet 3 size pointer" "0,1,2,3,4,5,6,7"
tree.end
tree "DCS Command and Packet Length Registers"
group.long 0xCC++0x13
line.long 0x00 "DCS_CMDS_0,DCS Command IDs Used For Line Types 3 And 5"
hexmask.long.byte 0x00 8.--15. 1. " LT5_DCS_CMD     ,DCS command for line type 5"
hexmask.long.byte 0x00 0.--7. 1. "        LT3_DCS_CMD  ,DCS command for line type 3"
line.long 0x04 "PKT_LEN_0_1_0,DSI Packet Lengths 0 And 1"
hexmask.long.word 0x04 16.--31. 1. " LENGTH_1        ,Packet length 1"
hexmask.long.word 0x04 0.--15. 1. "      LENGTH_0     ,Packet length 0"
line.long 0x08 "PKT_LEN_2_3_0,DSI Packet Lengths 2 And 3"
hexmask.long.word 0x08 16.--31. 1. " LENGTH_3        ,Packet length 3"
hexmask.long.word 0x08 0.--15. 1. "      LENGTH_2     ,Packet length 2"
line.long 0x0C "KT_LEN_4_5_0,DSI Packet Lengths 4 And 5"
hexmask.long.word 0x0C 16.--31. 1. " LENGTH_5        ,Packet length 5"
hexmask.long.word 0x0C 0.--15. 1. "      LENGTH_4     ,Packet length 4"
line.long 0x10 "PKT_LEN_6_7_0,DSI Packet Lengths 6 And 7"
hexmask.long.word 0x10 16.--31. 1. " LENGTH_7        ,Packet length 7"
hexmask.long.word 0x10 0.--15. 1. "      LENGTH_6     ,Packet length 6"
tree.end
tree "Physical Interface Timing Registers"
group.long 0xF0++0x0F
line.long 0x00 "PHY_TIMING_0_0,DSI D-PHY Timing Register 0"
hexmask.long.byte 0x00 24.--31. 1. " DSI_THSDEXIT    ,Time to drive LP11 after HS"
hexmask.long.byte 0x00 16.--23. 1. "        DSI_THSTRAIL ,Time to drive HS flipped bit at EOT"
hexmask.long.byte 0x00 8.--15. 1. "    DSI_TDATZERO ,Time to drive HS0 before SOT"
hexmask.long.byte 0x00 0.--7. 1. "  DSI_THSPREPR ,Time to drive LP00 before HS data"
line.long 0x04 "PHY_TIMING_1_0,DSI D-PHY Timing Register 1"
hexmask.long.byte 0x04 24.--31. 1. " DSI_TCLKTRAIL   ,Time to drive HS0 before clock goes to LP11"
hexmask.long.byte 0x04 16.--23. 1. "        DSI_TCLKPOST ,Time to drive clock after the last HS data"
hexmask.long.byte 0x04 8.--15. 1. "    DSI_TCLKZERO ,Time to drive LP00 before HS clock"
hexmask.long.byte 0x04 0.--7. 1. "  DSI_TTLPX    ,LP period"
line.long 0x08 "PHY_TIMING_2_0,DSI D-PHY Timing Register 2"
hexmask.long.byte 0x08 16.--23. 1. " DSI_TCLKPREPARE ,Time to drive LP0 before CLK_ZERO starts off on clock lane"
hexmask.long.byte 0x08 8.--15. 1. "        DSI_TCLKPRE  ,Time to run clock before enabling data lane"
hexmask.long.byte 0x08 0.--7. 1. "    DSI_TWAKEUP  ,LP period"
line.long 0x0C "BTA_TIMING_0,DSI D-PHY Bus-Turn-Around Timing"
sif (CPUIS("TEGRAX1"))
hexmask.long.byte 0x0C 24.--31. 1. " DSI_TPKTBTA     ,Time delay between end of host packet transmission and generation of PKT BTA"
textline "                         "
endif
hexmask.long.byte 0x0C 16.--23. 1. " DSI_TTAGET      ,Time to drive LP00 at end of BTA"
hexmask.long.byte 0x0C 8.--15. 1. "        DSI_TTASURE  ,Time to receive LP00 at end of BTA"
hexmask.long.byte 0x0C 0.--7. 1. "    DSI_TTAGO    ,Time to drive LP00 at start of BTA"
tree.end
tree "Contention Recovery Timers"
group.long 0x110++0x03
line.long 0x00 "TIMEOUT_0_0,DSI Time Out Terminal Count Register 0"
hexmask.long.word 0x00 16.--31. 1. " LRXH_TO         ,Low power receive time out terminal count"
hexmask.long.word 0x00 0.--15. 1. "      HTX_TO       ,High speed transmit time out terminal count"
group.long 0x114++0x03
line.long 0x00 "TIMEOUT_1_0,DSI Time Out Terminal Count Register 1"
hexmask.long.word 0x00 16.--31. 1. " PR_TO           ,Peripheral reset duration"
hexmask.long.word 0x00 0.--15. 1. "      TA_TO        ,Turn around time out terminal count"
group.long 0x118++0x03
line.long 0x00 "TO_TALLY_0,DSI Time Out Tally Register"
rbitfld.long 0x00 24. " P_RESET_STATUS  ,Peripheral reset time out status" "In reset,Ready"
hexmask.long.byte 0x00 16.--23. 1. "  TA_TALLY     ,Turn around time out tally"
hexmask.long.byte 0x00 8.--15. 1. "    LRXH_TALLY   ,LP Rx time out tally"
hexmask.long.byte 0x00 0.--7. 1. "  HTX_TALLY    ,HS Tx time out tally"
tree.end
width 23.
tree "Physical Pad Control Registers"
group.long 0x12C++0x07
line.long 0x00 "PAD_CONTROL_0,DSI PHY Configuration Register"
bitfld.long 0x00 24. " DSI_PAD_PULLDN_CLK_ENAB   ,Enable pad pulldown for clock bit at power on" "Disabled,Enabled"
bitfld.long 0x00 16.--19. "        DSI_PAD_PULLDN_ENAB    ,Pad pulldown on power on" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
bitfld.long 0x00 8. "        DSI_PAD_PDIO_CLK      ,Power down for clock bit, drivers, receivers and contention detectors" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 0.--3. " DSI_PAD_PDIO              ,Power down for data bit,drivers,receivers and contention detectors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "PAD_CONTROL_CD_0,Contention Detection Logic Enable Signals"
bitfld.long 0x04 16.--18. " DSI_PAD_CDDNADJ           ,Level adjust on low limit of detection" "0.3V,0.375V,0.45V,0.525V,0.3V,0.225V,0.15V,0.075V"
bitfld.long 0x04 8. "          DSI_PAD_CD_EN_CLK      ,Clock bit contention detector enable" "Disabled,Enabled"
bitfld.long 0x04 0.--3. "        DSI_PAD_CD_EN         ,Data bits contention detector enable" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
rgroup.long 0x134++0x03
line.long 0x00 "PAD_CD_STATUS_0,Contention Detection Status From MIPI PAD"
bitfld.long 0x00 18. " DSI_PAD_CDN_CLK           ,DSI PAD CDN CLK" "0,1"
bitfld.long 0x00 16. "               DSI_PAD_CDP_CLK        ,DSI PAD CDP CLK" "0,1"
bitfld.long 0x00 8.--11. "               DSI_PAD_CDN           ,DSI PAD CDN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                "
bitfld.long 0x00 0.--3. " DSI_PAD_CDP               ,DSI PAD CDP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x138++0x17
line.long 0x00 "VID_MODE_CONTROL_0,Host Command Packet During Video Mode"
bitfld.long 0x00 1.--3. " DSI_LINE_TYPE             ,LINE TYPE on which host command packet to be transmitted" "Line type 0,Line type 1,Line type 2,,Line type 4,?..."
bitfld.long 0x00 0. "     DSI_CMD_PKT_VID_ENABLE ,Host command packet during video mode" "Disabled,Enabled"
line.long 0x04 "PAD_CONTROL_1_0,DSI PHY Configuration Register 1"
bitfld.long 0x04 12.--14. " DSI_PAD_OUTADJ3           ,Input delay trimmer for data bit 3" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps"
bitfld.long 0x04 8.--10. "          DSI_PAD_OUTADJ2        ,Input delay trimmer for data bit 2" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps"
bitfld.long 0x04 4.--6. "          DSI_PAD_OUTADJ1       ,Input delay trimmer for data bit 1" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps"
textline "                                "
bitfld.long 0x04 0.--2. " DSI_PAD_OUTADJ0           ,Input delay trimmer for data bit 0" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps"
line.long 0x08 "PAD_CONTROL_2_0,DSI PHY Configuration Register 2"
bitfld.long 0x08 16.--18. " DSI_PAD_SLEWUPADJ         ,Pull-up slew rate adjust" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 12.--14. "               DSI_PAD_SLEWDNADJ      ,Pull-down slew rate adjust" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 8.--10. "               DSI_PAD_LPUPADJ       ,Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,?..."
textline "                                "
bitfld.long 0x08 4.--6. " DSI_PAD_LPDNADJ           ,Input delay trimmer for data bit 0" "130ohm,110ohm,130ohm,150ohm,?..."
bitfld.long 0x08 0.--2. "          DSI_PAD_OUTADJCLK      ,Output trimmer delay for clock bit" "0 ps,40 ps,80 ps,120 ps,160 ps,200 ps,240 ps,280 ps"
line.long 0x0C "PAD_CONTROL_3_0,DSI PHY Configuration Register 3"
bitfld.long 0x0C 28. " DSI_PAD_PDVCLAMP          ,Power down regulator" "Power Up,Power down"
bitfld.long 0x0C 16. "      DSI_PAD_BANDWD_IN      ,Increase bandwidth of differential receiver" "Disabled,Enabled"
bitfld.long 0x0C 12.--13. "        DSI_PAD_PREEMP_PD_CLK ,Clock bit HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
textline "                                "
bitfld.long 0x0C 8.--9. " DSI_PAD_PREEMP_PU_CLK     ,Clock bit HS driver pull up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x0C 4.--5. "  DSI_PAD_PREEMP_PD      ,Clock bit HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x0C 0.--1. "  DSI_PAD_PREEMP_PU     ,Clock bit HS driver pull up pre-emphasis" "No preemphasis,,,Maximum"
line.long 0x10 "PAD_CONTROL_4_0,DSI PHY Configuration Register 4"
bitfld.long 0x10 28. " DSI_PAD_HS_BSO_CLK        ,Enables BIAS and power regulators on for HS mode" "Disabled,Enabled"
bitfld.long 0x10 20.--23. "        DSI_PAD_HS_BSO         ,Enables BIAS and power regulators on for HS mode" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
bitfld.long 0x10 16. "        DSI_PAD_LP_BSO_CLK    ,Enables BIAS and power regulators on for LP mode" "Disabled,Enabled"
textline "                                "
bitfld.long 0x10 8.--11. " DSI_PAD_LP_BSO            ,Enables BIAS and power regulators on for LP mode" "Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
bitfld.long 0x10 4. "        DSI_PAD_TXBW_EN        ,Increase bandwidth of output driver" "Disabled,Enabled"
bitfld.long 0x10 0. "        DSI_PAD_REV_CLK       ,Reverse clock polarity" "Not reversed,Reversed"
line.long 0x14 "GANGED_MODE_CONTROL_0,Mode Control Register 0"
sif (cpuis("TEGRAX1"))
bitfld.long 0x14 1.--2. " DUMMY_PIX_LEFT_RIGHT_SIDE ,Dummy pixels side" "Normal,Left,Right,?..."
textline "                                "
endif
bitfld.long 0x14 0. " DSI_GANGED_MODE_EN        ,Ganged mode transaction enabled" "Disabled,Enabled"
textline "                                "
width 27.
group.long 0x150++0x0F
line.long 0x00 "GANGED_MODE_START_0,Mode Start Register 0"
hexmask.long.word 0x00 0.--12. 1. " DSI_GANGED_START_POINTER       ,Start pointer for indicating the start of partial active valid pixel data"
line.long 0x04 "GANGED_MODE_SIZE_0,Mode Size Register 0"
hexmask.long.word 0x04 16.--28. 1. " DSI_GANGED_VALID_LOW_WIDTH     ,Width of partial inactive/ignored pixel data from the valid pixels"
hexmask.long.word 0x04 0.--12. 1. "            DSI_GANGED_VALID_HIGH_WIDTH    ,Width of partial active valid pixel data latched from the valid pixels"
line.long 0x08 "RAW_DATA_BYTE_COUNT_0,Raw Data Counter Register 0"
hexmask.long.word 0x08 0.--15. 1. " DSI_RAW_DATA_BYTE_COUNT        ,Host RAW DATA byte count specifies the total number of bytes to send"
line.long 0x0C "ULTRA_LOW_POWER_CONTROL_0,Ultra Low Power Sequence Control Register 0"
bitfld.long 0x0C 8.--9. " DSI_ULTRA_LOW_POWER_DATA_LANE3 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
bitfld.long 0x0C 6.--7. "      DSI_ULTRA_LOW_POWER_DATA_LANE2 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
bitfld.long 0x0C 4.--5. "  DSI_ULTRA_LOW_POWER_DATA_LANE1 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
textline "                                    "
bitfld.long 0x0C 2.--3. " DSI_ULTRA_LOW_POWER_DATA_LANE0 ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
bitfld.long 0x0C 0.--1. "      DSI_ULTRA_LOW_POWER_CLK_LANE   ,Ultra low power" "Normal,Enter ULPM,Exit ULPM,?..."
textline "                                    "
group.long 0x160++0x03
line.long 0x00 "INIT_SEQ_DATA_8_0,DSI Init Sequence Write Data 8"
group.long 0x164++0x03
line.long 0x00 "INIT_SEQ_DATA_9_0,DSI Init Sequence Write Data 9"
group.long 0x168++0x03
line.long 0x00 "INIT_SEQ_DATA_10_0,DSI Init Sequence Write Data 10"
group.long 0x16C++0x03
line.long 0x00 "INIT_SEQ_DATA_11_0,DSI Init Sequence Write Data 11"
group.long 0x170++0x03
line.long 0x00 "INIT_SEQ_DATA_12_0,DSI Init Sequence Write Data 12"
group.long 0x174++0x03
line.long 0x00 "INIT_SEQ_DATA_13_0,DSI Init Sequence Write Data 13"
group.long 0x178++0x03
line.long 0x00 "INIT_SEQ_DATA_14_0,DSI Init Sequence Write Data 14"
group.long 0x17C++0x03
line.long 0x00 "INIT_SEQ_DATA_15_0,DSI Init Sequence Write Data 15"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                                    "
group.long 0x180++0x07
line.long 0x00 "DUMMY_PIX_CNT_0,Dummy Pixel Count Register"
hexmask.long.byte 0x00 16.--23. 1. " RIGHT_DUMMY_PIX_CNT            ,Number of dummy pixels padded to the right of active pixel stream"
hexmask.long.byte 0x00 0.--7. 1. "              LEFT_DUMMY_PIX_CNT             ,Number of dummy pixels padded to the left of active pixel stream"
line.long 0x04 "DSI_DSC_CONTROL_0,Display Stream Compression Control Register"
bitfld.long 0x04 16.--17. " NUM_COMPRESS_PKTS_PER_ROW      ,Number of compressed image packets per row between two sync events" "1,2,,4"
hexmask.long.word 0x04 2.--11. 1. "               COMPRESS_RATE                  ,Compression bit rate"
bitfld.long 0x04 0. "        COMPRESS_MODE_EN               ,Compressed bit stream transport mode enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x18C++0x0B
line.long 0x00 "DSI_LANE_XBAR_CTRL_0,DSI Lane Control Register"
bitfld.long 0x00 17.--18. " DATA_LANE3_XSEL                ,Lane3 selection" "Lane 0,Lane 1,Lane 2,Lane 3"
bitfld.long 0x00 14.--15. "          DATA_LANE2_XSEL                ,Lane2 selection" "Lane 0,Lane 1,Lane 2,Lane 3"
bitfld.long 0x00 11.--12. "      DATA_LANE1_XSEL                ,Lane1 selection" "Lane 0,Lane 1,Lane 2,Lane 3"
textline "                                    "
bitfld.long 0x00 8.--9. " DATA_LANE0_XSEL                ,Lane0 selection" "Lane 0,Lane 1,Lane 2,Lane 3"
bitfld.long 0x00 4. "          DATA_LANE3_POLARITY            ,Swaps P/N pins polarity of data lane-3" "Normal,Reversed"
textline "                                    "
bitfld.long 0x00 3. " DATA_LANE2_POLARITY            ,Swaps P/N pins polarity of data lane-2" "Normal,Reversed"
textline "                                    "
bitfld.long 0x00 2. " DATA_LANE1_POLARITY            ,Swaps P/N pins polarity of data lane-1" "Normal,Reversed"
bitfld.long 0x00 1. "        DATA_LANE0_POLARITY            ,Swaps P/N pins polarity of data lane-0" "Normal,Reversed"
bitfld.long 0x00 0. "    CLOCK_LANE_POLARITY            ,Swaps P/N pins polarity of clock lane" "Normal,Reversed"
line.long 0x04 "DSI_SKEWCAL_CTRL_0,DSI Deskew Calibration Control Register"
bitfld.long 0x04 6. " SKEWCAL_SYNCPT_ENABLE          ,Syncpt Enable for Skew calibration operation" "Disabled,Enabled"
bitfld.long 0x04 5. "        SKEWCAL_CRC_ENABLE             ,CRC Enable for Skew calibrating data pattern too along with other DSI packets" "Disabled,Enabled"
bitfld.long 0x04 2.--4. "    SKEWCAL_LINE_TYPE              ,Line type selection for Skew calibration" "Line 0,Line 1,Line 2,,Line 4,?..."
textline "                                    "
bitfld.long 0x04 1. " SKEWCAL_MODE                   ,Skew Calibration Mode" "Non-continuous,Continuous"
bitfld.long 0x04 0. "  SKEWCAL_ENABLE                 ,Skew calibration enable" "Disabled,Enabled"
line.long 0x08 "DSI_SKEWCAL_TIMING_0,DSI Deskew Calibration Duration Register"
hexmask.long.tbyte 0x08 0.--23. 1. " SKEWCAL_TIME                   ,Time that DSI drives the skew calibration data pattern"
endif
endif
tree.end
width 0x0B
tree "DSI PADCTL Registers"
base ad:0x15880000
width 32.
group.long 0x00++0x13
line.long 0x00 "CTXSW_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL  ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "               NEXT_CLASS    ,Next requested class"
line.long 0x04 "CTXSW_0,CTXSW_0"
hexmask.long.word 0x04 11.--20. 1. " CURR_CHANNEL  ,Current working channel"
bitfld.long 0x04 10. "               AUTO_ACK      ,Automatically acknowledge" "Manual,AutoACK"
hexmask.long.word 0x04 0.--9. 1. "            CURR_CLASS    ,Current working class"
line.long 0x08 "GLOBAL_CNTRLS_0,DSI Pad Global Control Register"
hexmask.long.byte 0x08 16.--23. 1. " SPARE_TOP     ,Spare bits for top level control"
line.long 0x0C "INTERNAL_HS_BIAS_OVERRIDE_0,Internal Bias Regulator Override Register"
bitfld.long 0x0C 3. " HS_BSO_D      ,Internal bias override for HS drivers in partition-D of the PHY brick" "Disabled,Enabled"
bitfld.long 0x0C 2. "           HS_BSO_C      ,Internal bias override for HS drivers in partition-C of the PHY brick" "Disabled,Enabled"
bitfld.long 0x0C 1. "           HS_BSO_B      ,Internal bias override for HS drivers in partition-B of the PHY brick" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 0. " HS_BSO_A      ,Internal bias override for HS drivers in partition-A of the PHY brick" "Disabled,Enabled"
line.long 0x10 "CONTENTION_DETECT_LVL_ADJUST_0,Contention Detection Control Register"
bitfld.long 0x10 24.--27. " CDDNADJ_D     ,Partition-D Level adjust on low limit of detection" "0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075 V,0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075V"
bitfld.long 0x10 16.--19. "            CDDNADJ_C     ,Partition-C Level adjust on low limit of detection" "0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075 V,0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075V"
bitfld.long 0x10 8.--11. "            CDDNADJ_B     ,Partition-B Level adjust on low limit of detection" "0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075 V,0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075V"
textline "                                         "
bitfld.long 0x10 0.--3. " CDDNADJ_A     ,Partition-A Level adjust on low limit of detection" "0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075 V,0.3 V,0.375 V,0.45 V,0.525 V,0.3 V,0.225 V,0.15 V,0.075V"
group.long 0x14++0x27
line.long 0x00 "A_LANES_PWR_DOWN_0,DPHY lanes Power Down Control Bits Register"
bitfld.long 0x00 2. " PD_IO1        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 1. "           PD_IO0        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 0. "           PD_CLK        ,Power down for clock lane" "Disabled,Enabled"
line.long 0x04 "A_PULL_DOWN_0,Interface lanes Pull Down Controls Register"
bitfld.long 0x04 2. " E_PULLDN_IO1  ,10Kohm weak pull down for data lane-1" "Disabled,Enabled"
bitfld.long 0x04 1. "           E_PULLDN_IO0  ,10Kohm weak pull down for data lane-0" "Disabled,Enabled"
bitfld.long 0x04 0. "           E_PULLDN_CLK  ,10Kohm weak pull down for clock lane" "Disabled,Enabled"
line.long 0x08 "A_INTERNAL_LP_BIAS_OVERRIDE_0,Internal LP Bias Regulator Override Register"
bitfld.long 0x08 2. " E_ATE_IO1     ,Internal bias override for data lane-1 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 1. "           E_ATE_IO0     ,Internal bias override for data lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 0. "           E_ATE_CLK     ,Internal bias override for clock lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
line.long 0x0C "A_DPHY_CLK_CONFIG_0,Clock Lane Configuration Register"
bitfld.long 0x0C 0. " REV_CLK       ,Reverse clock polarity 1st SOT bit goes on negative edge of clock lane" "Disabled,Enabled"
line.long 0x10 "A_OUTPUT_DELAY_TRIMMER_0,Output Delay Trimmer Register"
bitfld.long 0x10 20.--25. " OUTADJ_IO1    ,Data lane-1 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 10.--15. "                 OUTADJ_IO0    ,Data lane-0 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                 OUTADJ_CLK    ,Clock lane output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "A_PRE_EMPHASIS_0,HS Driver Pull-up/down Pre-emphasis Controls Register"
bitfld.long 0x14 20.--21. " PEMPD_IO1     ,Enable data lane-1 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 16.--17. "     PEMPD_IO0     ,Enable data lane-0 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 12.--13. "     PEMPD_CLK     ,Enable clock lane HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
textline "                                         "
bitfld.long 0x14 8.--9. " PEMPU_IO1     ,Enable data lane-1 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 4.--5. "     PEMPU_IO0     ,Enable data lane-0 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 0.--1. "     PEMPU_CLK     ,Enable clock lane HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
line.long 0x18 "A_CPHY_MID_STRENGTH_0,CPHY lane Mid Strength Level Control Register"
bitfld.long 0x18 1. " TRIO1         ,Trio1 control" "Mid-voltage-level,Tri-stated"
bitfld.long 0x18 0. "  TRIO0         ,Trio0 control" "Mid-voltage-level,Tri-stated"
line.long 0x1C "A_LP_DRVR_IMPEDANCE_CTRL_0,LP Driver Pull-up/down Impedance Control Register"
bitfld.long 0x1C 20.--23. " LPDNADJ_IO1   ,Data lane-1 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 16.--19. "            LPDNADJ_IO0   ,Data lane-0 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 12.--15. "            LPDNADJ_CLK   ,Clock lane Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
textline "                                         "
bitfld.long 0x1C 8.--11. " LPUNADJ_IO1   ,Data lane-1 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 4.--7. "            LPUNADJ_IO0   ,Data lane-0 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 0.--3. "            LPUNADJ_CLK   ,Clock lane Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
line.long 0x20 "A_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x20 20.--23. " SLEWDNADJ_IO1 ,Data lane-1 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 16.--19. "          SLEWDNADJ_IO0 ,Data lane-0 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 12.--15. "          SLEWDNADJ_CLK ,Clock lane pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
textline "                                         "
bitfld.long 0x20 8.--11. " SLEWUNADJ_IO1 ,Data lane-1 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 4.--7. "          SLEWUNADJ_IO0 ,Data lane-0 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 0.--3. "          SLEWUNADJ_CLK ,Clock lane pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
line.long 0x24 "A_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x24 2. " E_CD_IO1      ,Data lane-1 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 1. "           E_CD_IO0      ,Data lane-0 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 0. "           E_CD_CLK      ,Clock lane contention detector enable" "Disabled,Enabled"
rgroup.long (0x14+0x28)++0x03
line.long 0x00 "A_CONTENTION_DETECT_STATUS_0,Contention Detection Status from MIPI PAD"
bitfld.long 0x00 5. " CDN_IO1       ,Data lane-1 N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 4. "       CDP_IO1       ,Data lane-1 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 3. "       CDN_IO0       ,Data lane-0 N bit contention detection status" "Not detected,Detected"
textline "                                         "
bitfld.long 0x00 2. " CDP_IO0       ,Data lane-0 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 1. "       CDN_CLK       ,Clock lane N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 0. "       CDP_CLK       ,Clock lane P bit contention detection status" "Not detected,Detected"
group.long (0x14+0x2C)++0x03
line.long 0x00 "A_SPARE_BITS_0,MIPI Pad Partition Level Spare Control Bits"
bitfld.long 0x00 8.--11. " SPARE_IO1     ,Spare bit IO1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 SPARE_IO0     ,Spare bit IO0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--3. "                 SPARE_CLK     ,Spare bit CLK" "0,1,2,3,4,5,6,7"
group.long 0x54++0x27
line.long 0x00 "B_LANES_PWR_DOWN_0,DPHY lanes Power Down Control Bits Register"
bitfld.long 0x00 2. " PD_IO1        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 1. "           PD_IO0        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 0. "           PD_CLK        ,Power down for clock lane" "Disabled,Enabled"
line.long 0x04 "B_PULL_DOWN_0,Interface lanes Pull Down Controls Register"
bitfld.long 0x04 2. " E_PULLDN_IO1  ,10Kohm weak pull down for data lane-1" "Disabled,Enabled"
bitfld.long 0x04 1. "           E_PULLDN_IO0  ,10Kohm weak pull down for data lane-0" "Disabled,Enabled"
bitfld.long 0x04 0. "           E_PULLDN_CLK  ,10Kohm weak pull down for clock lane" "Disabled,Enabled"
line.long 0x08 "B_INTERNAL_LP_BIAS_OVERRIDE_0,Internal LP Bias Regulator Override Register"
bitfld.long 0x08 2. " E_ATE_IO1     ,Internal bias override for data lane-1 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 1. "           E_ATE_IO0     ,Internal bias override for data lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 0. "           E_ATE_CLK     ,Internal bias override for clock lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
line.long 0x0C "B_DPHY_CLK_CONFIG_0,Clock Lane Configuration Register"
bitfld.long 0x0C 0. " REV_CLK       ,Reverse clock polarity 1st SOT bit goes on negative edge of clock lane" "Disabled,Enabled"
line.long 0x10 "B_OUTPUT_DELAY_TRIMMER_0,Output Delay Trimmer Register"
bitfld.long 0x10 20.--25. " OUTADJ_IO1    ,Data lane-1 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 10.--15. "                 OUTADJ_IO0    ,Data lane-0 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                 OUTADJ_CLK    ,Clock lane output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "B_PRE_EMPHASIS_0,HS Driver Pull-up/down Pre-emphasis Controls Register"
bitfld.long 0x14 20.--21. " PEMPD_IO1     ,Enable data lane-1 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 16.--17. "     PEMPD_IO0     ,Enable data lane-0 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 12.--13. "     PEMPD_CLK     ,Enable clock lane HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
textline "                                         "
bitfld.long 0x14 8.--9. " PEMPU_IO1     ,Enable data lane-1 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 4.--5. "     PEMPU_IO0     ,Enable data lane-0 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 0.--1. "     PEMPU_CLK     ,Enable clock lane HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
line.long 0x18 "B_CPHY_MID_STRENGTH_0,CPHY lane Mid Strength Level Control Register"
bitfld.long 0x18 1. " TRIO1         ,Trio1 control" "Mid-voltage-level,Tri-stated"
bitfld.long 0x18 0. "  TRIO0         ,Trio0 control" "Mid-voltage-level,Tri-stated"
line.long 0x1C "B_LP_DRVR_IMPEDANCE_CTRL_0,LP Driver Pull-up/down Impedance Control Register"
bitfld.long 0x1C 20.--23. " LPDNADJ_IO1   ,Data lane-1 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 16.--19. "            LPDNADJ_IO0   ,Data lane-0 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 12.--15. "            LPDNADJ_CLK   ,Clock lane Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
textline "                                         "
bitfld.long 0x1C 8.--11. " LPUNADJ_IO1   ,Data lane-1 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 4.--7. "            LPUNADJ_IO0   ,Data lane-0 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 0.--3. "            LPUNADJ_CLK   ,Clock lane Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
line.long 0x20 "B_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x20 20.--23. " SLEWDNADJ_IO1 ,Data lane-1 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 16.--19. "          SLEWDNADJ_IO0 ,Data lane-0 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 12.--15. "          SLEWDNADJ_CLK ,Clock lane pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
textline "                                         "
bitfld.long 0x20 8.--11. " SLEWUNADJ_IO1 ,Data lane-1 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 4.--7. "          SLEWUNADJ_IO0 ,Data lane-0 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 0.--3. "          SLEWUNADJ_CLK ,Clock lane pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
line.long 0x24 "B_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x24 2. " E_CD_IO1      ,Data lane-1 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 1. "           E_CD_IO0      ,Data lane-0 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 0. "           E_CD_CLK      ,Clock lane contention detector enable" "Disabled,Enabled"
rgroup.long (0x54+0x28)++0x03
line.long 0x00 "B_CONTENTION_DETECT_STATUS_0,Contention Detection Status from MIPI PAD"
bitfld.long 0x00 5. " CDN_IO1       ,Data lane-1 N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 4. "       CDP_IO1       ,Data lane-1 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 3. "       CDN_IO0       ,Data lane-0 N bit contention detection status" "Not detected,Detected"
textline "                                         "
bitfld.long 0x00 2. " CDP_IO0       ,Data lane-0 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 1. "       CDN_CLK       ,Clock lane N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 0. "       CDP_CLK       ,Clock lane P bit contention detection status" "Not detected,Detected"
group.long (0x54+0x2C)++0x03
line.long 0x00 "B_SPARE_BITS_0,MIPI Pad Partition Level Spare Control Bits"
bitfld.long 0x00 8.--11. " SPARE_IO1     ,Spare bit IO1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 SPARE_IO0     ,Spare bit IO0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--3. "                 SPARE_CLK     ,Spare bit CLK" "0,1,2,3,4,5,6,7"
group.long 0x94++0x27
line.long 0x00 "C_LANES_PWR_DOWN_0,DPHY lanes Power Down Control Bits Register"
bitfld.long 0x00 2. " PD_IO1        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 1. "           PD_IO0        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 0. "           PD_CLK        ,Power down for clock lane" "Disabled,Enabled"
line.long 0x04 "C_PULL_DOWN_0,Interface lanes Pull Down Controls Register"
bitfld.long 0x04 2. " E_PULLDN_IO1  ,10Kohm weak pull down for data lane-1" "Disabled,Enabled"
bitfld.long 0x04 1. "           E_PULLDN_IO0  ,10Kohm weak pull down for data lane-0" "Disabled,Enabled"
bitfld.long 0x04 0. "           E_PULLDN_CLK  ,10Kohm weak pull down for clock lane" "Disabled,Enabled"
line.long 0x08 "C_INTERNAL_LP_BIAS_OVERRIDE_0,Internal LP Bias Regulator Override Register"
bitfld.long 0x08 2. " E_ATE_IO1     ,Internal bias override for data lane-1 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 1. "           E_ATE_IO0     ,Internal bias override for data lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 0. "           E_ATE_CLK     ,Internal bias override for clock lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
line.long 0x0C "C_DPHY_CLK_CONFIG_0,Clock Lane Configuration Register"
bitfld.long 0x0C 0. " REV_CLK       ,Reverse clock polarity 1st SOT bit goes on negative edge of clock lane" "Disabled,Enabled"
line.long 0x10 "C_OUTPUT_DELAY_TRIMMER_0,Output Delay Trimmer Register"
bitfld.long 0x10 20.--25. " OUTADJ_IO1    ,Data lane-1 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 10.--15. "                 OUTADJ_IO0    ,Data lane-0 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                 OUTADJ_CLK    ,Clock lane output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "C_PRE_EMPHASIS_0,HS Driver Pull-up/down Pre-emphasis Controls Register"
bitfld.long 0x14 20.--21. " PEMPD_IO1     ,Enable data lane-1 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 16.--17. "     PEMPD_IO0     ,Enable data lane-0 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 12.--13. "     PEMPD_CLK     ,Enable clock lane HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
textline "                                         "
bitfld.long 0x14 8.--9. " PEMPU_IO1     ,Enable data lane-1 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 4.--5. "     PEMPU_IO0     ,Enable data lane-0 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 0.--1. "     PEMPU_CLK     ,Enable clock lane HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
line.long 0x18 "C_CPHY_MID_STRENGTH_0,CPHY lane Mid Strength Level Control Register"
bitfld.long 0x18 1. " TRIO1         ,Trio1 control" "Mid-voltage-level,Tri-stated"
bitfld.long 0x18 0. "  TRIO0         ,Trio0 control" "Mid-voltage-level,Tri-stated"
line.long 0x1C "C_LP_DRVR_IMPEDANCE_CTRL_0,LP Driver Pull-up/down Impedance Control Register"
bitfld.long 0x1C 20.--23. " LPDNADJ_IO1   ,Data lane-1 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 16.--19. "            LPDNADJ_IO0   ,Data lane-0 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 12.--15. "            LPDNADJ_CLK   ,Clock lane Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
textline "                                         "
bitfld.long 0x1C 8.--11. " LPUNADJ_IO1   ,Data lane-1 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 4.--7. "            LPUNADJ_IO0   ,Data lane-0 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 0.--3. "            LPUNADJ_CLK   ,Clock lane Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
line.long 0x20 "C_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x20 20.--23. " SLEWDNADJ_IO1 ,Data lane-1 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 16.--19. "          SLEWDNADJ_IO0 ,Data lane-0 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 12.--15. "          SLEWDNADJ_CLK ,Clock lane pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
textline "                                         "
bitfld.long 0x20 8.--11. " SLEWUNADJ_IO1 ,Data lane-1 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 4.--7. "          SLEWUNADJ_IO0 ,Data lane-0 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 0.--3. "          SLEWUNADJ_CLK ,Clock lane pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
line.long 0x24 "C_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x24 2. " E_CD_IO1      ,Data lane-1 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 1. "           E_CD_IO0      ,Data lane-0 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 0. "           E_CD_CLK      ,Clock lane contention detector enable" "Disabled,Enabled"
rgroup.long (0x94+0x28)++0x03
line.long 0x00 "C_CONTENTION_DETECT_STATUS_0,Contention Detection Status from MIPI PAD"
bitfld.long 0x00 5. " CDN_IO1       ,Data lane-1 N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 4. "       CDP_IO1       ,Data lane-1 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 3. "       CDN_IO0       ,Data lane-0 N bit contention detection status" "Not detected,Detected"
textline "                                         "
bitfld.long 0x00 2. " CDP_IO0       ,Data lane-0 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 1. "       CDN_CLK       ,Clock lane N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 0. "       CDP_CLK       ,Clock lane P bit contention detection status" "Not detected,Detected"
group.long (0x94+0x2C)++0x03
line.long 0x00 "C_SPARE_BITS_0,MIPI Pad Partition Level Spare Control Bits"
bitfld.long 0x00 8.--11. " SPARE_IO1     ,Spare bit IO1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 SPARE_IO0     ,Spare bit IO0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--3. "                 SPARE_CLK     ,Spare bit CLK" "0,1,2,3,4,5,6,7"
group.long 0xD4++0x27
line.long 0x00 "D_LANES_PWR_DOWN_0,DPHY lanes Power Down Control Bits Register"
bitfld.long 0x00 2. " PD_IO1        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 1. "           PD_IO0        ,Power down for data lane-1" "Disabled,Enabled"
bitfld.long 0x00 0. "           PD_CLK        ,Power down for clock lane" "Disabled,Enabled"
line.long 0x04 "D_PULL_DOWN_0,Interface lanes Pull Down Controls Register"
bitfld.long 0x04 2. " E_PULLDN_IO1  ,10Kohm weak pull down for data lane-1" "Disabled,Enabled"
bitfld.long 0x04 1. "           E_PULLDN_IO0  ,10Kohm weak pull down for data lane-0" "Disabled,Enabled"
bitfld.long 0x04 0. "           E_PULLDN_CLK  ,10Kohm weak pull down for clock lane" "Disabled,Enabled"
line.long 0x08 "D_INTERNAL_LP_BIAS_OVERRIDE_0,Internal LP Bias Regulator Override Register"
bitfld.long 0x08 2. " E_ATE_IO1     ,Internal bias override for data lane-1 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 1. "           E_ATE_IO0     ,Internal bias override for data lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
bitfld.long 0x08 0. "           E_ATE_CLK     ,Internal bias override for clock lane-0 to bypass the slew-rate control unit for LP driver" "Disabled,Enabled"
line.long 0x0C "D_DPHY_CLK_CONFIG_0,Clock Lane Configuration Register"
bitfld.long 0x0C 0. " REV_CLK       ,Reverse clock polarity 1st SOT bit goes on negative edge of clock lane" "Disabled,Enabled"
line.long 0x10 "D_OUTPUT_DELAY_TRIMMER_0,Output Delay Trimmer Register"
bitfld.long 0x10 20.--25. " OUTADJ_IO1    ,Data lane-1 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 10.--15. "                 OUTADJ_IO0    ,Data lane-0 output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                 OUTADJ_CLK    ,Clock lane output delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "D_PRE_EMPHASIS_0,HS Driver Pull-up/down Pre-emphasis Controls Register"
bitfld.long 0x14 20.--21. " PEMPD_IO1     ,Enable data lane-1 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 16.--17. "     PEMPD_IO0     ,Enable data lane-0 HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 12.--13. "     PEMPD_CLK     ,Enable clock lane HS driver pull down pre-emphasis" "No preemphasis,,,Maximum"
textline "                                         "
bitfld.long 0x14 8.--9. " PEMPU_IO1     ,Enable data lane-1 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 4.--5. "     PEMPU_IO0     ,Enable data lane-0 HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
bitfld.long 0x14 0.--1. "     PEMPU_CLK     ,Enable clock lane HS driver pull Up pre-emphasis" "No preemphasis,,,Maximum"
line.long 0x18 "D_CPHY_MID_STRENGTH_0,CPHY lane Mid Strength Level Control Register"
bitfld.long 0x18 1. " TRIO1         ,Trio1 control" "Mid-voltage-level,Tri-stated"
bitfld.long 0x18 0. "  TRIO0         ,Trio0 control" "Mid-voltage-level,Tri-stated"
line.long 0x1C "D_LP_DRVR_IMPEDANCE_CTRL_0,LP Driver Pull-up/down Impedance Control Register"
bitfld.long 0x1C 20.--23. " LPDNADJ_IO1   ,Data lane-1 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 16.--19. "            LPDNADJ_IO0   ,Data lane-0 Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 12.--15. "            LPDNADJ_CLK   ,Clock lane Driver pull-down impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
textline "                                         "
bitfld.long 0x1C 8.--11. " LPUNADJ_IO1   ,Data lane-1 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 4.--7. "            LPUNADJ_IO0   ,Data lane-0 Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
bitfld.long 0x1C 0.--3. "            LPUNADJ_CLK   ,Clock lane Driver pull-up impedance control" "130 ohm,110 ohm,130 ohm,150 ohm,4,5,6,130 ohm,110 ohm,130 ohm,150 ohm,?..."
line.long 0x20 "D_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x20 20.--23. " SLEWDNADJ_IO1 ,Data lane-1 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 16.--19. "          SLEWDNADJ_IO0 ,Data lane-0 pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 12.--15. "          SLEWDNADJ_CLK ,Clock lane pull-down slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
textline "                                         "
bitfld.long 0x20 8.--11. " SLEWUNADJ_IO1 ,Data lane-1 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 4.--7. "          SLEWUNADJ_IO0 ,Data lane-0 pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
bitfld.long 0x20 0.--3. "          SLEWUNADJ_CLK ,Clock lane pull-up slew rate adjust" "Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases,Increases,Increases,Increases,Increases,Decreases,Decreases,Decreases,Decreases"
line.long 0x24 "D_LP_DRVR_SLEW_RATE_CTRL_0,LP Driver Pull-up/down Slew Rate Control Register"
bitfld.long 0x24 2. " E_CD_IO1      ,Data lane-1 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 1. "           E_CD_IO0      ,Data lane-0 contention detector enable" "Disabled,Enabled"
bitfld.long 0x24 0. "           E_CD_CLK      ,Clock lane contention detector enable" "Disabled,Enabled"
rgroup.long (0xD4+0x28)++0x03
line.long 0x00 "D_CONTENTION_DETECT_STATUS_0,Contention Detection Status from MIPI PAD"
bitfld.long 0x00 5. " CDN_IO1       ,Data lane-1 N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 4. "       CDP_IO1       ,Data lane-1 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 3. "       CDN_IO0       ,Data lane-0 N bit contention detection status" "Not detected,Detected"
textline "                                         "
bitfld.long 0x00 2. " CDP_IO0       ,Data lane-0 P bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 1. "       CDN_CLK       ,Clock lane N bit contention detection status" "Not detected,Detected"
bitfld.long 0x00 0. "       CDP_CLK       ,Clock lane P bit contention detection status" "Not detected,Detected"
group.long (0xD4+0x2C)++0x03
line.long 0x00 "D_SPARE_BITS_0,MIPI Pad Partition Level Spare Control Bits"
bitfld.long 0x00 8.--11. " SPARE_IO1     ,Spare bit IO1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 SPARE_IO0     ,Spare bit IO0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--3. "                 SPARE_CLK     ,Spare bit CLK" "0,1,2,3,4,5,6,7"
width 0x0B
tree.end
tree.end
tree "HDMI Display Port"
tree "SOR0"
base ad:0x15540000
width 51.
sif (!cpuis("TEGRAX2"))
group.long 0x00++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
rbitfld.long 0x00 28.--31. " NEXT_CHANNEL                  ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 16.--25. 1. "                     NEXT_CLASS                    ,Next requested class"
textline "                                                            "
bitfld.long 0x00 12.--15. " CURR_CHANNEL                  ,Current working channel reset to invalid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "                     AUTO_ACK                      ,Automatically acknowledge any incoming context switch requests" "Manual,Autoack"
textline "                                                            "
hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS                    ,Current working class"
endif
group.long 0x04++0x0F
line.long 0x00 "NV_PDISP_SOR_SUPER_STATE0_0,State Supervisor"
bitfld.long 0x00 0. " UPDATE                        ,Update" "Not updated,Updated"
line.long 0x04 "NV_PDISP_SOR_SUPER_STATE1_0,Triple Buffered Register"
bitfld.long 0x04 3. " ATTACHED                      ,Attached SOR to display head" "No,Yes"
bitfld.long 0x04 2. "                    ASY_ORMODE                    ,SOR sending active data" "Safe,Normal"
textline "                                                            "
bitfld.long 0x04 0.--1. " ASY_HEAD_OPMODE               ,Display sending active pixels to SOR" "Sleep,Snooze,Awake,?..."
line.long 0x08 "NV_PDISP_SOR_STATE0_0,NV PDISP SOR STATE0"
bitfld.long 0x08 0. " UPDATE                        ,Update" "Not updated,Updated"
line.long 0x0C "NV_PDISP_SOR_STATE1_0,SOR Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH                ,The pixel depth" "DEFAULTVAL,BPP_16_422,BPP_18_4444,,,BPP_24_444,BPP_30_444,,BPP_36_444,?..."
textline "                                                            "
else
bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH                ,The pixel depth" "DEFAULTVAL,,BPP_18_4444,,,BPP_24_444,?..."
textline "                                                            "
endif
bitfld.long 0x0C 15.--16. " ASY_REPLICATE                 ,HDMI pixel replication enable/disable" "Off,x2,x4,?..."
textline "                                                            "
bitfld.long 0x0C 14. " ASY_DEPOL                     ,ASY DEPOL" "Positive,Negative"
bitfld.long 0x0C 13. "               ASY_VSYNCPOL                  ,ASY VSYNCPOL" "Positive,Negative"
textline "                                                            "
bitfld.long 0x0C 12. " ASY_HSYNCPOL                  ,ASY HSYNCPOL" "Positive,Negative"
bitfld.long 0x0C 8.--11. "               ASY_PROTOCOL                  ,ASY protocol" "LVDS custom,Single TMDS A,Single TMDS B,,,,,,DP A,DP B,,,,,,Custom"
textline "                                                            "
bitfld.long 0x0C 6.--7. " ASY_CRCMODE                   ,ASY CRCMODE" "Active raster,Complete raster,Non active raster,?..."
bitfld.long 0x0C 4.--5. "      ASY_SUBOWNER                  ,ASY SUBOWNER" "None,SUBHEAD0,SUBHEAD1,Both"
textline "                                                            "
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 0.--3. " ASY_OWNER                     ,SOR display pipe control" "None,HEAD0,HEAD1,HEAD2,?..."
else
bitfld.long 0x0C 0.--3. " ASY_OWNER                     ,SOR display pipe control" "None,HEAD0,HEAD1,?..."
endif
sif (!cpuis("TEGRAX2"))
group.long 0x14++0x2F
line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control 0 Register 0"
bitfld.long 0x00 4.--5. " INTERLACED                    ,Interlaced" "Progressive,Interlaced,?..."
bitfld.long 0x00 3. "            RANGECOMPRESS                 ,Compresses the range of an RGB signal" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE                      ,Dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "                   COLORSPACE                    ,Colorspace" "RGB,YUV_601,YUV_709,?..."
line.long 0x04 "NV_PDISP_HEAD_STATE0_1,Head Control 0 Register 1"
bitfld.long 0x04 4.--5. " INTERLACED                    ,INTERLACED" "Progressive,Interlaced,?..."
bitfld.long 0x04 3. "            RANGECOMPRESS                 ,Compresses the range of an RGB signal" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 2. " DYNRANGE                      ,Dynamic range for the output" "VESA,CEA"
bitfld.long 0x04 0.--1. "                   COLORSPACE                    ,Colorspace" "RGB,YUV_601,YUV_709,?..."
line.long 0x08 "NV_PDISP_HEAD_STATE1_0,Head Control 1 Register 0"
hexmask.long.word 0x08 16.--30. 1. " VTOTAL                        ,Total number of lines in a frame of the raster"
hexmask.long.word 0x08 0.--14. 1. "                   HTOTAL                        ,Total number of pixels in a line of the raster"
line.long 0x0C "NV_PDISP_HEAD_STATE1_1,Head Control 1 Register 1"
hexmask.long.word 0x0C 16.--30. 1. " VTOTAL                        ,Total number of lines in a frame of the raster"
hexmask.long.word 0x0C 0.--14. 1. "                   HTOTAL                        ,Total number of pixels in a line of the raster"
line.long 0x10 "NV_PDISP_HEAD_STATE2_0,Head Control 2 Register 0"
hexmask.long.word 0x10 16.--30. 1. " VSYNC_END                     ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x10 0.--14. 1. "                   HSYNC_END                     ,Total number of pixels after which horizontal sync ends"
line.long 0x14 "NV_PDISP_HEAD_STATE2_1,Head Control 2 Register 1"
hexmask.long.word 0x14 16.--30. 1. " VSYNC_END                     ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x14 0.--14. 1. "                   HSYNC_END                     ,Total number of pixels after which horizontal sync ends"
line.long 0x18 "NV_PDISP_HEAD_STATE3_0,Head Control 3 Register 0"
hexmask.long.word 0x18 16.--30. 1. " VBLANK_END                    ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x18 0.--14. 1. "                   HBLANK_END                    ,Total number of pixels after which horizontal blank ends"
line.long 0x1C "NV_PDISP_HEAD_STATE3_1,Head Control 3 Register 1"
hexmask.long.word 0x1C 16.--30. 1. " VBLANK_END                    ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x1C 0.--14. 1. "                   HBLANK_END                    ,Total number of pixels after which horizontal blank ends"
line.long 0x20 "NV_PDISP_HEAD_STATE4_0,Head Control 4 Register 0"
hexmask.long.word 0x20 16.--30. 1. " VBLANK_START                  ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x20 0.--14. 1. "                   HBLANK_START                  ,Total number of pixels after which horizontal blank starts"
line.long 0x24 "NV_PDISP_HEAD_STATE4_1,Head Control 4 Register 1"
hexmask.long.word 0x24 16.--30. 1. " VBLANK_START                  ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x24 0.--14. 1. "                   HBLANK_START                  ,Total number of pixels after which horizontal blank starts"
line.long 0x28 "NV_PDISP_HEAD_STATE5_0,Head Control 5 Register 0"
hexmask.long.word 0x28 16.--30. 1. " VBLANK_END_2                  ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x28 0.--14. 1. "                   VBLANK_START_2                ,Total number of lines after which vertical blank starts 2"
line.long 0x2C "NV_PDISP_HEAD_STATE5_1,Head Control 5 Register 1"
hexmask.long.word 0x2C 16.--30. 1. " VBLANK_END_2                  ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x2C 0.--14. 1. "                   VBLANK_START_2                ,Total number of lines after which vertical blank starts 2"
endif
group.long 0x44++0x03
line.long 0x00 "NV_PDISP_SOR_CRC_CNTRL_0,CRC Control"
bitfld.long 0x00 0. " ARM_CRC_ENABLE                ,Arm CRC enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
rgroup.long 0x48++0x03
line.long 0x00 "NV_PDISP_SOR_DP_DEBUG_MVID_0,NV_PDISP_SOR_DP_DEBUG_MVID_0"
bitfld.long 0x00 23. " ARM_CRC_ENABLE[23]            ,ARM CRC enable 23" "Disabled,Enabled"
bitfld.long 0x00 22. "               ARM_CRC_ENABLE[22]            ,ARM CRC enable 22" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 21. " ARM_CRC_ENABLE[21]            ,ARM CRC enable 21" "Disabled,Enabled"
bitfld.long 0x00 20. "               ARM_CRC_ENABLE[20]            ,ARM CRC enable 20" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 19. " ARM_CRC_ENABLE[19]            ,ARM CRC enable 19" "Disabled,Enabled"
bitfld.long 0x00 18. "               ARM_CRC_ENABLE[18]            ,ARM CRC enable 18" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 17. " ARM_CRC_ENABLE[17]            ,ARM CRC enable 17" "Disabled,Enabled"
bitfld.long 0x00 16. "               ARM_CRC_ENABLE[16]            ,ARM CRC enable 16" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 15. " ARM_CRC_ENABLE[15]            ,ARM CRC enable 15" "Disabled,Enabled"
bitfld.long 0x00 14. "               ARM_CRC_ENABLE[14]            ,ARM CRC enable 14" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 13. " ARM_CRC_ENABLE[13]            ,ARM CRC enable 13" "Disabled,Enabled"
bitfld.long 0x00 12. "               ARM_CRC_ENABLE[12]            ,ARM CRC enable 12" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 11. " ARM_CRC_ENABLE[11]            ,ARM CRC enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "               ARM_CRC_ENABLE[10]            ,ARM CRC enable 10" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 9. " ARM_CRC_ENABLE[9]             ,ARM CRC enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "               ARM_CRC_ENABLE[8]             ,ARM CRC enable 8" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 7. " ARM_CRC_ENABLE[7]             ,ARM CRC enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "               ARM_CRC_ENABLE[6]             ,ARM CRC enable 6" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 5. " ARM_CRC_ENABLE[5]             ,ARM CRC enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "               ARM_CRC_ENABLE[4]             ,ARM CRC enable 4" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 3. " ARM_CRC_ENABLE[3]             ,ARM CRC enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "               ARM_CRC_ENABLE[2]             ,ARM CRC enable 2" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 1. " ARM_CRC_ENABLE[1]             ,ARM CRC enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "               ARM_CRC_ENABLE[0]             ,ARM CRC enable 0" "Disabled,Enabled"
endif
group.long 0x4C++0x03
line.long 0x00 "NV_PDISP_SOR_CLK_CNTRL_0,NV PDISP SOR Clock CNTRL 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 2.--6. " DP_LINK_SPEED                 ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,,G8_1,?..."
else
bitfld.long 0x00 2.--6. " DP_LINK_SPEED                 ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,G8_1,?..."
endif
bitfld.long 0x00 0.--1. "                  DP_CLK_SEL                    ,Selects which clock is used for the internal logic" "Single PCLK,DIFF PCLK,Single DPCLK,DIFF DPCLK"
rgroup.long 0x50++0x03
line.long 0x00 "NV_PDISP_SOR_CAP_0,Serial Output Resource"
bitfld.long 0x00 31. " LVDS_ONLY                     ,LVDS only" "False,True"
bitfld.long 0x00 25. "                  DP_B                          ,DP B" "False,True"
textline "                                                            "
bitfld.long 0x00 24. " DP_A                          ,DP A" "False,True"
bitfld.long 0x00 20. "                  DDI                           ,DDI" "False,True"
textline "                                                            "
bitfld.long 0x00 16. " SDI                           ,SDI" "False,True"
bitfld.long 0x00 13. "                  DISPLAY_OVER_PCIE             ,Display over PCIE" "False,True"
textline "                                                            "
bitfld.long 0x00 12. " SINGLE_TMDS_225_MHZ           ,Single TMDS 225 MHZ" "False,True"
bitfld.long 0x00 11. "                  DUAL_TMDS                     ,Dual TMDS" "False,True"
textline "                                                            "
bitfld.long 0x00 10. " DUAL_SINGLE_TMDS              ,Dual single TMDS" "False,True"
bitfld.long 0x00 9. "                  SINGLE_TMDS_B                 ,Single TMDS B" "False,True"
textline "                                                            "
bitfld.long 0x00 8. " SINGLE_TMDS_A                 ,Single TMDS A" "False,True"
bitfld.long 0x00 3. "                  DUAL_LVDS_24                  ,Dual LVDS 24" "False,True"
textline "                                                            "
bitfld.long 0x00 2. " DUAL_LVDS_18                  ,Dual LVDS 18" "False,True"
bitfld.long 0x00 1. "                  SINGLE_LVDS 24                ,Single LVDS 24" "False,True"
textline "                                                            "
bitfld.long 0x00 0. " SINGLE_LVDS_18                ,Single LVDS 18" "False,True"
group.long 0x54++0x03
line.long 0x00 "NV_PDISP_SOR_PWR_0,Power State Of The SOR"
eventfld.long 0x00 31. " SETTING_NEW                   ,New setting of power mode to take effect" "Done,Pending"
rbitfld.long 0x00 28. "                MODE                          ,Currently active state" "Normal,Safe"
textline "                                                            "
rbitfld.long 0x00 24. " HALT_DELAY                    ,Halt delay" "Done,Active"
bitfld.long 0x00 17. "                 SAFE_START                    ,Safe start" "Normal,Alt"
textline "                                                            "
bitfld.long 0x00 16. " SAFE_STATE                    ,Safe operating state" "PD,PU"
bitfld.long 0x00 1. "                     NORMAL_START                  ,Normal start" "Normal,Alt"
textline "                                                            "
bitfld.long 0x00 0. " NORMAL_STATE                  ,Sets the normal operating state" "PD,PU"
sif (!cpuis("TEGRAX2"))
group.long 0x5C++0x0F
line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP_SOR_PLL0_0"
bitfld.long 0x00 24.--27. " ICHPMP                        ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA"
textline "                                                            "
bitfld.long 0x00 19. " FILTER[3]                     ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO"
bitfld.long 0x00 16.--18. "       FILTER[2:0]                   ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7"
textline "                                                            "
bitfld.long 0x00 12.--13. " TXREG_LEVEL                   ,TXREG level" "V25,V15,V35,V45"
bitfld.long 0x00 8.--11. "                    VCOCAP                        ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 6.--7. " PLLREG_LEVEL                  ,PLLREG level" "V25,V15,V35,V45"
bitfld.long 0x00 5. "                    PULLDOWN                      ,Weak pull-down enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " VCOPD                         ,VCOPD" "Rescind,Assert"
bitfld.long 0x00 0. "                PWR                           ,Power" "On,Off"
line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1"
bitfld.long 0x04 29. " COHERENTMODE                  ,Coherent mode" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "               LOADADJ                       ,Load pulse position adjust" "Center,?..."
textline "                                                            "
rbitfld.long 0x04 15. " TERM_COMPOUT                  ,Termination calibration status" "Low,High"
bitfld.long 0x04 9.--12. "                   TMDS_TERMADJ                  ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest"
textline "                                                            "
bitfld.long 0x04 8. " TMDS_TERM                     ,Termination enable" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "               IOCURRENT                     ,Used for I/O control" "RST,?..."
line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2"
bitfld.long 0x08 28.--31. " PLL_MDIV                      ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 26.--27. "                     CLKGEN_MODE                   ,CLKGEN mode" ",DP TMDS,HBR3,MPHY"
textline "                                                            "
bitfld.long 0x08 25. " AUX9                          ,AUX9 - LVDSEN" "Allow,Override"
bitfld.long 0x08 24. "               AUX8                          ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 23. " AUX7                          ,AUX7 - port powerdown" "Disabled,Enabled"
bitfld.long 0x08 22. "               AUX6                          ,AUX6 - bandgap powerdown" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 21. " AUX5                          ,AUX5 - link LVDS" "Single,Dual"
bitfld.long 0x08 20. "                 AUX4                          ,AUX4 - duplicate control" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " AUX3                          ,AUX3 - rotate" "Disabled,Enabled"
bitfld.long 0x08 18. "               AUX2                          ,AUX2 - powerdown" "Override,Allow"
textline "                                                            "
bitfld.long 0x08 17. " AUX1                          ,AUX1 - sequencer PLLCAPPD" "Allow,Override"
bitfld.long 0x08 16. "               AUX0                          ,AUX0 - sequencer PLL pulldown" "Allow,Override"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV                      ,PLL NDIV"
bitfld.long 0x08 4.--7. "                     PLL_PDIV                      ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..."
textline "                                                            "
bitfld.long 0x08 2.--3. " PLL_PDIV_MODE                 ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..."
bitfld.long 0x08 1. "         DIV_RATIO_OVERRIDE            ,DIV ratio override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " DCIR_PLL_RESET                ,DCIR PLL reset" "Override,Allow"
line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro"
bitfld.long 0x0C 28.--31. " BG_TEMP_COEF                  ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--27. "                     BG_VREF_LEVEL                 ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V"
textline "                                                            "
hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN                ,Test REFCLK EN"
bitfld.long 0x0C 14. "                     PLL_BYPASS                    ,PLL bypass" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 13. " PLLVDD_MODE                   ,Field to determine the PLL voltage" "1.8 V,3.3 V"
bitfld.long 0x0C 12. "                  CLKDIST_MODE                  ,Clock distribution by CMOS/CML buffers" "CMOS,CML"
textline "                                                            "
bitfld.long 0x0C 8.--11. " AVDD10_LEVEL                  ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..."
bitfld.long 0x0C 4.--7. "                 AVDD14_LEVEL                  ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..."
textline "                                                            "
bitfld.long 0x0C 0.--1. " KICKSTART                     ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60"
endif
group.long 0x6C++0x03
line.long 0x00 "NV_PDISP_SOR_CSTM_0,Select A Number Of Operating Modes For The SOR"
bitfld.long 0x00 28.--30. " ROTDAT                        ,Right rotated color channel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "                      ROTCLK                        ,Number of sclk cycles which the output clock " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 21. " PLLDIV                        ,Controls the internal clock dividers of the TMDS_MACRO" ",By 10"
bitfld.long 0x00 19. "                  BALANCED                      ,Balanced" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 18. " NEW_MODE                      ,None of the control bits of the second link for dual-link mode" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 16. " LVDS_EN                       ,Output driver configuration for encoding of the data and output common mode control" "TMDS,?..."
bitfld.long 0x00 15. "                   LINKACTB                      ,Enables digital logic of links B" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 14. " LINKACTA                      ,Enables digital logic of links A" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               MODE                          ,Controls the digital output encoding applied to the data stream in custom mode" ",TMDS,?..."
textline "                                                            "
bitfld.long 0x00 11. " UPPER                         ,LVDS bank A is the upper" "False,True"
bitfld.long 0x00 9. "                  PD_TXCB                       ,Power down the clock pin of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 8. " PD_TXCA                       ,Power down the clock pin of link A" "Enabled,Disabled"
bitfld.long 0x00 7. "               PD_TXDB_3                     ,Bitwise control to power down the data pin 3 of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 6. " PD_TXDB_2                     ,Bitwise control to power down the data pin 2 of link B" "Enabled,Disabled"
bitfld.long 0x00 5. "               PD_TXDB_1                     ,Bitwise control to power down the data pin 1 of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 4. " PD_TXDB_0                     ,Bitwise control to power down the data pin 0 of link B" "Enabled,Disabled"
bitfld.long 0x00 3. "               PD_TXDA_3                     ,Bitwise control to power down the data pin 3 of link A" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXDA_2                     ,Bitwise control to power down the data pin 2 of link A" "Enabled,Disabled"
bitfld.long 0x00 1. "               PD_TXDA_1                     ,Bitwise control to power down the data pin 1 of link A" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXDA_0                     ,Bitwise control to power down the data pin 0 of link A" "Enabled,Disabled"
group.long 0x7C++0x0B
line.long 0x00 "NV_PDISP_SOR_BLANK_0,Override The SOR Output Resource Pixels With Blank Data"
rbitfld.long 0x00 2. " STATUS                        ,Output resource is sending blank pixels forced by the OVERRIDE bit" "Not blanked,Blanked"
bitfld.long 0x00 1. "            TRANSITION                    ,Controls the timing of the output resource blank override" "Immediate,Next VSYNC"
textline "                                                            "
bitfld.long 0x00 0. " OVERRIDE                      ,Override" "False,True"
line.long 0x04 "NV_PDISP_SOR_SEQ_CTL_0,Sequencer Control Register For SOR"
bitfld.long 0x04 30. " SWITCH                        ,Switch" "Wait,Force"
rbitfld.long 0x04 28. "                  STATUS                        ,Sequencer stopped/running" "Stopped,Running"
textline "                                                            "
rbitfld.long 0x04 16.--19. " PC                            ,The current value of the program counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "                     PD_PC_ALT                     ,The alternate entry point into the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 8.--11. " PD_PC                         ,The program counter for the start of the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                     PU_PC_ALT                     ,The alternate entry point into the power up program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
rbitfld.long 0x04 0.--3. " PU_PC                         ,The program counter for the start of the power up program sequence" "0,?..."
line.long 0x08 "NV_PDISP_SOR_LANE_SEQ_CTL_0,Sequencer Control Register For SOR Lane"
bitfld.long 0x08 31. " SETTING_NEW                   ,Run sequencer outside of the normal SOR sequencer operation" "Done,Pending"
rbitfld.long 0x08 28. "                SEQ_STATE                     ,Sequencer state" "Idle,Busy"
textline "                                                            "
bitfld.long 0x08 20. " SEQUENCE                      ,Controls the direction of the power up/power down sequence" "Up,Down"
bitfld.long 0x08 16. "                   NEW_POWER_STATE               ,Controls whether the lanes should be powered up/powered down" "PU,PD"
textline "                                                            "
bitfld.long 0x08 12.--15. " DELAY                         ,Number of microseconds to delay between each lanes' power state change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 9. "                     LANE9_STATE                   ,LANE9 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 8. " LANE8_STATE                   ,LANE8 state" "Power up,Power down"
rbitfld.long 0x08 7. "             LANE7_STATE                   ,LANE7 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 6. " LANE6_STATE                   ,LANE6 state" "Power up,Power down"
rbitfld.long 0x08 5. "             LANE5_STATE                   ,LANE5 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 4. " LANE4_STATE                   ,LANE4 state" "Power up,Power down"
rbitfld.long 0x08 3. "             LANE3_STATE                   ,LANE3 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 2. " LANE2_STATE                   ,LANE2 state" "Power up,Power down"
rbitfld.long 0x08 1. "             LANE1_STATE                   ,LANE1 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 0. " LANE0_STATE                   ,LANE0 state" "Power up,Power down"
group.long 0x88++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST0_0,Preload The Power-Up And Power-Down Sequence 0"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x8C++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST1_0,Preload The Power-Up And Power-Down Sequence 1"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x90++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST2_0,Preload The Power-Up And Power-Down Sequence 2"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x94++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST3_0,Preload The Power-Up And Power-Down Sequence 3"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x98++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST4_0,Preload The Power-Up And Power-Down Sequence 4"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x9C++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST5_0,Preload The Power-Up And Power-Down Sequence 5"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST6_0,Preload The Power-Up And Power-Down Sequence 6"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST7_0,Preload The Power-Up And Power-Down Sequence 7"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA8++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST8_0,Preload The Power-Up And Power-Down Sequence 8"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xAC++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST9_0,Preload The Power-Up And Power-Down Sequence 9"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTA_0,Preload The Power-Up And Power-Down Sequence A"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTB_0,Preload The Power-Up And Power-Down Sequence B"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB8++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTC_0,Preload The Power-Up And Power-Down Sequence C"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xBC++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTD_0,Preload The Power-Up And Power-Down Sequence D"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTE_0,Preload The Power-Up And Power-Down Sequence E"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTF_0,Preload The Power-Up And Power-Down Sequence F"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC8++0x07
line.long 0x00 "NV_PDISP_SOR_PWM_DIV_0,PWM Divide"
hexmask.long.tbyte 0x00 0.--23. 1. " DIVIDE                        ,Defines the period of the PWM output"
line.long 0x04 "NV_PDISP_SOR_PWM_CTL_0,Controls The Optional PWM Function"
bitfld.long 0x04 31. " SETTING_NEW                   ,Setting new" "Done,Pending"
bitfld.long 0x04 30. "                CLKSEL                        ,Clock select" "PCLK,XTAL"
textline "                                                            "
hexmask.long.tbyte 0x04 0.--23. 1. " DUTY_CYCLE                    ,Duty cycle of PWM output"
group.long 0x128++0x47
line.long 0x00 "NV_PDISP_SOR_XBAR_CTRL_0,Controls The XBAR Between The SOR And The TMDS Analog Macro"
bitfld.long 0x00 29.--31. " LINK1_XSEL_4                  ,Link1 XSEL 4" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 26.--28. "                   LINK1_XSEL_3                  ,Link1 XSEL 3" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 23.--25. " LINK1_XSEL_2                  ,Link1 XSEL 2" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 20.--22. "                   LINK1_XSEL_1                  ,Link1 XSEL 1" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 17.--19. " LINK1_XSEL_0                  ,Link1 XSEL 0" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 14.--16. "                   LINK0_XSEL_4                  ,Link0 XSEL 4" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 11.--13. " LINK0_XSEL_3                  ,Link0 XSEL 3" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 8.--10. "                   LINK0_XSEL_2                  ,Link0 XSEL 2" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 5.--7. " LINK0_XSEL_1                  ,Link0 XSEL 1" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 2.--4. "                   LINK0_XSEL_0                  ,Link0 XSEL 0" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 1. " LINK_SWAP                     ,Link swap" "Not swapped,Swapped"
bitfld.long 0x00 0. "            BYPASS                        ,Bypass XBAR" "Not bypassed,Bypassed"
line.long 0x04 "NV_PDISP_SOR_XBAR_POL_0,Polarity Of The Channels Control"
bitfld.long 0x04 9. " POL_LINK1_4                   ,POL Link1 4" "Normal,Inverted"
bitfld.long 0x04 8. "               POL_LINK1_3                   ,POL Link1 3" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 7. " POL_LINK1_2                   ,POL Link1 2" "Normal,Inverted"
bitfld.long 0x04 6. "               POL_LINK1_1                   ,POL Link1 1" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 5. " POL_LINK1_0                   ,POL Link1 0" "Normal,Inverted"
bitfld.long 0x04 4. "               POL_LINK0_4                   ,POL Link0 4" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 3. " POL_LINK0_3                   ,POL Link0 3" "Normal,Inverted"
bitfld.long 0x04 2. "               POL_LINK0_2                   ,POL Link0 2" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 1. " POL_LINK0_1                   ,POL Link0 1" "Normal,Inverted"
bitfld.long 0x04 0. "               POL_LINK0_0                   ,POL Link0 0" "Normal,Inverted"
line.long 0x08 "NV_PDISP_SOR_DP_LINKCTL0_0,Select Index The SOR"
bitfld.long 0x08 31. " FORCE_IDLEPTTRN               ,Force idle pattern" "No,Yes"
bitfld.long 0x08 28. "                    COMPLIANCEPTTRN               ,Compliance test pattern" "No pattern,Color square"
textline "                                                            "
bitfld.long 0x08 16.--20. " LANECOUNT                     ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..."
bitfld.long 0x08 14. "                      ENHANCEDFRAME                 ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 10. " SYNCMODE                      ,Link clock and pixel clock are synchronous" "Disabled,Enabled"
hexmask.long.byte 0x08 2.--8. 1. "               TUSIZE                        ,Transfer unit size"
textline "                                                            "
bitfld.long 0x08 0. " ENABLE                        ,The current DP port" "Disabled,Enabled"
line.long 0x0C "NV_PDISP_SOR_DP_LINKCTL1_0,Select Index Port Within The SOR"
bitfld.long 0x0C 31. " FORCE_IDLEPTTRN               ,Force idle pattern" "No,Yes"
bitfld.long 0x0C 28. "                    COMPLIANCEPTTRN               ,Compliance test pattern" "No pattern,Color square"
textline "                                                            "
bitfld.long 0x0C 16.--20. " LANECOUNT                     ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..."
bitfld.long 0x0C 14. "                      ENHANCEDFRAME                 ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 10. " SYNCMODE                      ,Link clock and pixel clock are synchronous" "Disabled,Enabled"
hexmask.long.byte 0x0C 2.--8. 1. "               TUSIZE                        ,Transfer unit size"
textline "                                                            "
bitfld.long 0x0C 0. " ENABLE                        ,The current DP port" "Disabled,Enabled"
line.long 0x10 "NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0,SOR Lane Drive Current 0"
hexmask.long.byte 0x10 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x10 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x10 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x10 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x14 "NV_PDISP_SOR_LANE_DRIVE_CURRENT1_0,SOR Lane Drive Current 1"
hexmask.long.byte 0x14 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x14 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x14 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x18 "NV_PDISP_SOR_LANE4_DRIVE_CURRENT0_0,SOR Lane 4 Drive Current 0"
hexmask.long.byte 0x18 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x1C "NV_PDISP_SOR_LANE4_DRIVE_CURRENT1_0,SOR Lane 4 Drive Current 1"
hexmask.long.byte 0x1C 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x20 "NV_PDISP_SOR_LANE_PREEMPHASIS0_0,SOR Lane Pre-Emphasis 0"
hexmask.long.byte 0x20 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x20 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x20 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x20 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x24 "NV_PDISP_SOR_LANE_PREEMPHASIS1_0,SOR Lane Pre-Emphasis 1"
hexmask.long.byte 0x24 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x24 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x24 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x28 "NV_PDISP_SOR_LANE4_PREEMPHASIS0_0,SOR Lane 4 Pre-Emphasis 0"
hexmask.long.byte 0x28 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x2C "NV_PDISP_SOR_LANE4_PREEMPHASIS1_0,SOR Lane 4 Pre-Emphasis 1"
hexmask.long.byte 0x2C 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x30 "NV_PDISP_SOR_POSTCURSOR0_0,SOR Lane Post-Cursor 0"
hexmask.long.byte 0x30 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x30 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x30 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x34 "NV_PDISP_SOR_POSTCURSOR1_0,SOR Lane Post-Cursor 1"
hexmask.long.byte 0x34 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x34 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x34 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x34 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x38 "NV_PDISP_SOR_DP_CONFIG0_0,SOR DP Config 0"
bitfld.long 0x38 31. " RD_RESET_VAL                  ,Internal running disparity" "Negative,Positive"
bitfld.long 0x38 28. "               IDLE_BEFORE_ATTACH            ,Idle before attach" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x38 26. " ACTIVESYM_CNTL                ,ACTIVESYM CNTL" "Disabled,Enabled"
bitfld.long 0x38 24. "               ACTIVESYM_POLARITY            ,ACTIVESYM polarity" "Negative,Positive"
textline "                                                            "
bitfld.long 0x38 16.--19. " ACTIVESYM_FRAC                ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x38 8.--14. 1. "                     ACTIVESYM_COUNT               ,Number of symbols sent out every transfer irrespective of the TU count"
textline "                                                            "
bitfld.long 0x38 0.--5. " WATERMARK                     ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "NV_PDISP_SOR_DP_CONFIG1_0,SOR DP Config 1"
bitfld.long 0x3C 31. " RD_RESET_VAL                  ,Internal running disparity" "Negative,Positive"
bitfld.long 0x3C 28. "               IDLE_BEFORE_ATTACH            ,Idle before attach" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x3C 26. " ACTIVESYM_CNTL                ,ACTIVESYM CNTL" "Disabled,Enabled"
bitfld.long 0x3C 24. "               ACTIVESYM_POLARITY            ,ACTIVESYM polarity" "Negative,Positive"
textline "                                                            "
bitfld.long 0x3C 16.--19. " ACTIVESYM_FRAC                ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 8.--14. 1. "                     ACTIVESYM_COUNT               ,Number of symbols sent out every transfer irrespective of the TU count"
textline "                                                            "
bitfld.long 0x3C 0.--5. " WATERMARK                     ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x40 "NV_PDISP_SOR_DP_MN0_0,SOR DP MN 0"
bitfld.long 0x40 30.--31. " M_MOD                         ,M_DELTA field not used/added/subtracted the M value" "None,INC,DEC,?..."
bitfld.long 0x40 24.--27. "                   M_DELTA                       ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
hexmask.long.tbyte 0x40 0.--23. 1. " N_VAL                         ,The value that will be used for calculating M"
line.long 0x44 "NV_PDISP_SOR_DP_MN1_0,SOR DP MN 1"
bitfld.long 0x44 30.--31. " M_MOD                         ,Describes how the M_DELTA field should be applied to the M value" "NONE,INC,DEC,?..."
bitfld.long 0x44 24.--27. "                   M_DELTA                       ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
hexmask.long.tbyte 0x44 0.--23. 1. " N_VAL                         ,The value that will be used for calculating M"
sif (!cpuis("TEGRAX2"))
if (((per.l(ad:0x15540000+0x130))&0x01)==0x01)
group.long 0x170++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x170++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
if (((per.l(ad:0x15540000+0x134))&0x01)==0x01)
group.long 0x174++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x174++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
endif
group.long 0x180++0x47
line.long 0x00 "NV_PDISP_SOR_DP_SPARE0_0,NV PDISP SOR DP Spare"
bitfld.long 0x00 31. " SOR_PSR_DIABLE_CYA            ,SOR PSR disable CYA" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                                            "
bitfld.long 0x00 30. " SOR_MSA_SOURCE_SEL            ,Allows software to choose whether SOR uses MSA data" "SOR,RG"
hexmask.long.word 0x00 14.--29. 1. "                    REG                           ,REG"
textline "                                                            "
bitfld.long 0x00 12.--13. " DEBUG_MODE                    ,Controls the mapping of DEBUG_OUT" "0,1,2,3"
hexmask.long.byte 0x00 4.--11. 1. "                      DEBUG_OUT                     ,Spare output bits for debug"
else
textline "                                                            "
hexmask.long 0x00 4.--30. 1. " REG                           ,REG"
endif
textline "                                                            "
bitfld.long 0x00 3. " DISP_VIDEO_PREAMBLE_CYA       ,Selects between video preamble from display versus the locally generated video preamble signal" "Disabled,Enabled"
bitfld.long 0x00 2. "               SOR_CLK_SEL                   ,Safe/macro clock as the SOR clock" "Safe,Macro"
textline "                                                            "
bitfld.long 0x00 1. " PANEL                         ,DP panel is external/internal" "External,Internal"
bitfld.long 0x00 0. "               SEQ_ENABLE                    ,Enables the sequencer in DP mode" "No,Yes"
line.long 0x04 "NV_PDISP_SOR_DP_SPARE1_0,NV_PDISP_SOR_DP_SPARE"
sif (cpuis("TEGRAX2"))
hexmask.long 0x04 4.--31. 1. " REG                           ,Reg"
bitfld.long 0x04 3. "               SOR_CLK_OVR_ON                ,SOR override for SLCG" "False,True"
else
hexmask.long 0x04 3.--31. 1. " REG                           ,Reg"
endif
textline "                                                            "
bitfld.long 0x04 2. " SOR_CLK_SEL                   ,Safe/macro clock as the SOR clock" "Safe,Macro"
textline "                                                            "
bitfld.long 0x04 1. " PANEL                         ,DP panel is external/internal" "External,Internal"
bitfld.long 0x04 0. "               SEQ_ENABLE                    ,Enables the sequencer in DP mode" "No,Yes"
line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_CTRL_0,SOR DP Audio Control"
eventfld.long 0x08 31. " NEW_SETTINGS                  ,New settings" "Done,Pending"
rbitfld.long 0x08 21. "                MUTE_STATUS                   ,Mute status" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 20. " CA_SELECT                     ,Channel/speaker allocation select" "SW,HW"
bitfld.long 0x08 19. "                     SS_SELECT                     ,Sample size select" "SW,HW"
textline "                                                            "
bitfld.long 0x08 18. " SF_SELECT                     ,Sampling frequency select" "SW,HW"
bitfld.long 0x08 17. "                     CC_SELECT                     ,Channel count select" "SW,HW"
textline "                                                            "
bitfld.long 0x08 16. " CT_SELECT                     ,Coding type select" "SW,HW"
hexmask.long.byte 0x08 8.--15. 1. "                     PACKET_ID                     ,Packet ID"
textline "                                                            "
bitfld.long 0x08 7. " GENERIC_INFOFRAME_ENABLE      ,Allows software to send infoframes (AVI etc.) other than audio infoframe" "No,Yes"
bitfld.long 0x08 6. "                    INFOFRAME_HEADER_OVERRIDE     ,Lets the values in AUDIO_INFOFRAME_HEADER override the default values" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 2.--3. " MUTE                          ,Controls the AudioMute_Flag in the VB-ID" "Auto,Disabled,Enabled,?..."
bitfld.long 0x08 0. "               ENABLE                        ,Enables field for Audio over DisplayPort" "No,Yes"
line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_HBLANK_SYMBOLS_0,SOR DP Audio HBlank Symbols"
hexmask.long.tbyte 0x0C 0.--16. 1. " VALUE                         ,Value"
line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_VBLANK_SYMBOLS_0,SOR DP Audio VBlank Symbols"
hexmask.long.tbyte 0x10 0.--20. 1. " VALUE                         ,Value"
line.long 0x14 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_HEADER_0,SOR DP Generic Infoframe Header"
hexmask.long.byte 0x14 24.--31. 1. " HB3                           ,HB3"
hexmask.long.byte 0x14 16.--23. 1. "                     HB2                           ,HB2"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " HB1                           ,HB1"
hexmask.long.byte 0x14 0.--7. 1. "                     HB0                           ,HB0"
line.long 0x18 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK0_0,SOR DP Generic Infoframe Subpack0"
hexmask.long.byte 0x18 24.--31. 1. " DB3                           ,DB3"
hexmask.long.byte 0x18 16.--23. 1. "                     DB2                           ,DB2"
textline "                                                            "
hexmask.long.byte 0x18 8.--15. 1. " DB1                           ,DB1"
hexmask.long.byte 0x18 0.--7. 1. "                     DB0                           ,DB0"
line.long 0x1C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK1_0,SOR DP Generic Infoframe Subpack1"
hexmask.long.byte 0x1C 24.--31. 1. " DB7                           ,DB7"
hexmask.long.byte 0x1C 16.--23. 1. "                     DB6                           ,DB6"
textline "                                                            "
hexmask.long.byte 0x1C 8.--15. 1. " DB5                           ,DB5"
hexmask.long.byte 0x1C 0.--7. 1. "                     DB4                           ,DB4"
line.long 0x20 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK2_0,SOR DP Generic Infoframe Subpack2"
hexmask.long.byte 0x20 24.--31. 1. " DB11                          ,DB11"
hexmask.long.byte 0x20 16.--23. 1. "                     DB10                          ,DB10"
textline "                                                            "
hexmask.long.byte 0x20 8.--15. 1. " DB9                           ,DB9"
hexmask.long.byte 0x20 0.--7. 1. "                     DB8                           ,DB8"
line.long 0x24 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK3_0,SOR DP Generic Infoframe Subpack3"
hexmask.long.byte 0x24 24.--31. 1. " DB15                          ,DB15"
hexmask.long.byte 0x24 16.--23. 1. "                     DB14                          ,DB14"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " DB13                          ,DB13"
hexmask.long.byte 0x24 0.--7. 1. "                     DB12                          ,DB12"
line.long 0x28 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK4_0,SOR DP Generic Infoframe Subpack4"
hexmask.long.byte 0x28 24.--31. 1. " DB19                          ,DB19"
hexmask.long.byte 0x28 16.--23. 1. "                     DB18                          ,DB18"
textline "                                                            "
hexmask.long.byte 0x28 8.--15. 1. " DB17                          ,DB17"
hexmask.long.byte 0x28 0.--7. 1. "                     DB16                          ,DB16"
line.long 0x2C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK5_0,SOR DP Generic Infoframe Subpack5"
hexmask.long.byte 0x2C 24.--31. 1. " DB23                          ,DB23"
hexmask.long.byte 0x2C 16.--23. 1. "                     DB22                          ,DB22"
textline "                                                            "
hexmask.long.byte 0x2C 8.--15. 1. " DB21                          ,DB21"
hexmask.long.byte 0x2C 0.--7. 1. "                     DB20                          ,DB20"
line.long 0x30 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK6_0,SOR DP Generic Infoframe Subpack6"
hexmask.long.byte 0x30 24.--31. 1. " DB27                          ,DB27"
hexmask.long.byte 0x30 16.--23. 1. "                     DB26                          ,DB26"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " DB25                          ,DB25"
hexmask.long.byte 0x30 0.--7. 1. "                     DB24                          ,DB24"
line.long 0x34 "NV_PDISP_SOR_DP_TPG_0,Controls The Training Patterns Needed During Link Training"
bitfld.long 0x34 30. " LANE3_CHANNELCODING           ,Lane 3 - supports the main link channel coding" "Disabled,Enabled"
bitfld.long 0x34 28.--29. "               LANE3_SCRAMBLEREN             ,Lane 3 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
textline "                                                            "
bitfld.long 0x34 24.--27. " LANE3_PATTERN                 ,Lane 3 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
bitfld.long 0x34 22. "        LANE2_CHANNELCODING           ,Lane 2 - supports the main link channel coding" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x34 20.--21. " LANE2_SCRAMBLEREN             ,Lane 2 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
bitfld.long 0x34 16.--19. "         LANE2_PATTERN                 ,Lane 2 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
textline "                                                            "
bitfld.long 0x34 14. " LANE1_CHANNELCODING           ,Lane 1 - supports the main link channel coding" "Disabled,Enabled"
bitfld.long 0x34 12.--13. "               LANE1_SCRAMBLEREN             ,Lane 1 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
textline "                                                            "
bitfld.long 0x34 8.--11. " LANE1_PATTERN                 ,Lane 1 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
bitfld.long 0x34 6. "        LANE0_CHANNELCODING           ,Lane 0 - supports the main link channel coding" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x34 4.--5. " LANE0_SCRAMBLEREN             ,Lane 0 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
bitfld.long 0x34 0.--3. "         LANE0_PATTERN                 ,Lane 0 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
line.long 0x38 "NV_PDISP_SOR_DP_TPG_CONFIG_0,Additional Controls For The DP Test Pattern Generator"
hexmask.long.tbyte 0x38 0.--16. 1. " HBR2_COMPLIANCE_PERIOD        ,Total symbols there are between the start of a new scrambler reset sequence"
line.long 0x3C "NV_PDISP_SOR_DP_LQ_CSTM0_0,Program A Custom 80-bit Test Pattern [31:0]"
line.long 0x40 "NV_PDISP_SOR_DP_LQ_CSTM1_0,Program A Custom 80-bit Test Pattern [63:32]"
line.long 0x44 "NV_PDISP_SOR_DP_LQ_CSTM2_0,Program A Custom 80-bit Test Pattern [79:64]"
sif (!cpuis("TEGRAX2"))
group.long 0x1C8++0x0B
line.long 0x00 "NV_PDISP_SOR_PLL4_0,SOR PLL4"
bitfld.long 0x00 24.--29. " SETUP_LCKDET                  ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                     LOCK_OVERRIDE                 ,Lock override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 22. " ENABLE_LCKDET                 ,Enable LCKDET" "Enabled,Disabled"
rbitfld.long 0x00 21. "               LOCKDET                       ,LOCKDET" "0,1"
line.long 0x04 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2"
hexmask.long.byte 0x04 24.--31. 1. " SPAREPLL                      ,Spare PLL"
bitfld.long 0x04 20.--23. "                     SPARE4                        ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 16.--19. " SPARE3                        ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "                     SPARE2                        ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 8.--11. " SPARE1                        ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                     SPARE0                        ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 0. " REG_BYPASS                    ,REG bypass" "0,1"
line.long 0x08 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3"
hexmask.long.byte 0x08 24.--31. 1. " TX_PATTERN_GEN                ,TX pattern GEN"
endif
rgroup.long 0x1D4++0x0F
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_AN_MSB_0,HDCP AN MSB Register"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_AN_LSB_0,HDCP AN LSB Register"
line.long 0x08 "NV_PDISP_SOR_DP_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register"
hexmask.long.byte 0x08 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)"
line.long 0x0C "NV_PDISP_SOR_DP_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register"
group.long 0x1E4++0x0B
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register"
bitfld.long 0x00 31. " REPEATER                      ,Repeater" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      VALUE                         ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register"
line.long 0x08 "NV_PDISP_SOR_DP_HDCP_CTRL_0,HDCP Control Register"
bitfld.long 0x08 15. " UPSTREAM                      ,SPRIME and MPRIME calculations will use AN and BKSV and M0 values from the TMDS/DP HDCP block" "TMDS,DP"
rbitfld.long 0x08 13. "                   SROM_ERR                      ,Error occurs while using the HDCP SROM" "No error,Error"
textline "                                                            "
rbitfld.long 0x08 12. " SROM_EN                       ,HDCP SROM is in use" "Disabled,Enabled"
rbitfld.long 0x08 11. "               MPRIME                        ,M' has been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x08 10. " SPRIME                        ,S' has been calculated" "Invalid,Valid"
rbitfld.long 0x08 9. "                R0                            ,Km Ks M0 and R0 have been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x08 8. " AN                            ,An value has been generated" "Invalid,Valid"
bitfld.long 0x08 3. "                ONEONE                        ,Enables the HDCP 1.1 features" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 2. " DUAL_LINK_EN                  ,Turns dual-link mode on" "Disabled,Enabled"
bitfld.long 0x08 1. "               CRYPT                         ,Turns encryption on" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " RUN                           ,Starts downstream protocol" "No,Yes"
rgroup.long 0x1F0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_RI_0,HDCP RI Register"
hexmask.long.word 0x00 0.--15. 1. " VALUE                         ,RI register holds the 16-bit link integrity check value"
group.long 0x1F8++0x07
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_EMU1_0,SOR NV PDISP SOR DP HDCP EMU1"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_CYA_0,HDCP Diagnostic Register"
rgroup.long 0x200++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AN_MSB_0,HDCP AN MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AN_LSB_0,HDCP AN LSB Register"
group.long 0x208++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CN_MSB_0,HDCP CN MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CN_LSB_0,HDCP CN LSB Register"
rgroup.long 0x210++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register"
hexmask.long.byte 0x00 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register"
group.long 0x218++0x0F
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register"
bitfld.long 0x00 31. " REPEATER                      ,Repeater" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      VALUE                         ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register"
line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_CKSV_MSB_0,HDCP CKSV MSB Register"
hexmask.long.byte 0x08 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the software's key selection vector (KSV)"
line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_CKSV_LSB_0,HDCP CKSV LSB Register"
rgroup.long 0x228++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_DKSV_MSB_0,HDCP DKSV MSB Register"
hexmask.long.byte 0x00 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's upstream key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_DKSV_LSB_0,HDCP DKSV LSB Register"
group.long 0x230++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CTRL_0,HDCP Control Register"
rbitfld.long 0x00 13. " SROM_ERR                      ,Error occurs while using the HDCP SROM" "No error,Error"
rbitfld.long 0x00 12. "               SROM_EN                       ,HDCP SROM is in use" "Disabled,Enabled"
textline "                                                            "
rbitfld.long 0x00 11. " MPRIME                        ,M' has been calculated" "Invalid,Valid"
rbitfld.long 0x00 10. "                SPRIME                        ,S' has been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x00 9. " R0                            ,Km Ks M0 and R0 have been calculated" "Invalid,Valid"
rbitfld.long 0x00 8. "                AN                            ,An value has been generated" "Invalid,Valid"
textline "                                                            "
bitfld.long 0x00 3. " ONEONE                        ,Enables the HDCP 1.1 features" "Disabled,Enabled"
bitfld.long 0x00 2. "               DUAL_LINK_EN                  ,Turns dual-link mode on" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 1. " CRYPT                         ,Turns encryption on" "Disabled,Enabled"
bitfld.long 0x00 0. "               RUN                           ,Starts downstream protocol" "No,Yes"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CMODE_0,HDCP CMODE Register"
bitfld.long 0x04 4.--7. " INDEX                         ,Index" "SOR0,SOR1,SOR2,SOR3,SOR4,SOR5,SOR6,SOR7,DAC0,DAC1,DAC2,PIOR0,PIOR1,PIOR2,PIOR3,PIOR4"
bitfld.long 0x04 0.--3. "                  MODE                          ,Mode" ",Read S,Read M,?..."
rgroup.long 0x238++0x17
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_MSB_0,HDCP MPRIME MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_LSB_0,HDCP MPRIME LSB Register"
line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_MSB_0,HDCP SPRIME MSB Register"
bitfld.long 0x08 7. " STATUS_READZ                  ,Implements the HDCP upstream spec's read Z operation" "Not implemented,Implemented"
bitfld.long 0x08 6. "        STATUS_CS                     ,Implements the connection state (CS) register" "Not implemented,Implemented"
textline "                                                            "
bitfld.long 0x08 5. " STATUS_SCOPE                  ,Report the status for the STATUS_UNPROTECTED field" "Scope 2 heads,Scope 1 head"
bitfld.long 0x08 4. "          STATUS_INTPNL                 ,Transmitting to an internal panel on this head" "Inactive,Active"
textline "                                                            "
bitfld.long 0x08 0.--3. " STATUS_MAX_CMODE_IDX          ,Identifies the maximum CMode index allowed for requesting status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB2_0,HDCP SPRIME LSB2 Register"
bitfld.long 0x0C 28.--31. " STATUS_CMODE_IDX              ,Identifies the index of the port to which the status request was actually routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 27. "                     STATUS_UNPROTECTED            ,Queried port is transmitting unprotected data" "No,Yes"
textline "                                                            "
bitfld.long 0x0C 26. " STATUS_EXTPNL                 ,Port identified digital interface and transmitting on other than an internal panel" "Inactive,Active"
bitfld.long 0x0C 25. "               STATUS_RPTR                   ,Status repeater" "Inactive,Active"
textline "                                                            "
bitfld.long 0x0C 24. " STATUS_ENCRYPTING             ,HDCP unit in this head is actually encrypting the data it receives" "No,Yes"
hexmask.long.tbyte 0x0C 0.--23. 1. "                    VALUE                         ,Value"
line.long 0x10 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB1_0,HDCP SPRIME LSB1 Register"
line.long 0x14 "NV_PDISP_SOR_TMDS_HDCP_RI_0,HDCP RI Register"
hgroup.long 0x250++0x07
hide.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CS_MSB_0,HDCP CS MSB Register"
hide.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CS_LSB_0,HDCP CS LSB Register"
rgroup.long 0x25C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU_RDATA0_0,HDMI Audio EMU RDATA0"
group.long 0x260++0x0B
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU1_0,HDMI Audio EMU1"
bitfld.long 0x00 31. " WRITE                         ,Write" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      ADDR                          ,Address"
line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_EMU2_0,HDMI Audio EMU2"
line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_CTRL_0,HDMI Audio Infoframe Control Register"
bitfld.long 0x08 9. " CHKSUM_HW                     ,Way to calculate the checksum for the infoframes" "Disabled,Enabled"
bitfld.long 0x08 8. "               SINGLE                        ,InfoFrame to be transmitted exactly once" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 4. " OTHER                         ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled"
bitfld.long 0x08 0. "               ENABLE                        ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled"
rgroup.long 0x26C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_STATUS_0,HDMI Audio InfoFrame Status"
bitfld.long 0x00 0. " SENT                          ,Sent" "Waiting,Done"
group.long 0x270++0x0F
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_HEADER_0,HDMI Audio InfoFrame Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_LOW_0,HDMI Audio InfoFrame SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,HDMI Audio InfoFrame SUBPACK0 High"
hexmask.long.byte 0x08 8.--15. 1. " PB5                           ,PB5"
hexmask.long.byte 0x08 0.--7. 1. "                     PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_CTRL_0,HDMI AVI Infoframe Control Register"
bitfld.long 0x0C 9. " CHKSUM_HW                     ,Way to calculate the checksum for the infoframes" "Disabled,Enabled"
bitfld.long 0x0C 8. "               SINGLE                        ,InfoFrame to be transmitted exactly once" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 4. " OTHER                         ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled"
bitfld.long 0x0C 0. "               ENABLE                        ,Enables the hardware calculation to be passed to the packe" "Disabled,Enabled"
rgroup.long 0x280++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_STATUS_0,HDMI AVI Infoframe Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x284++0x13
line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_HEADER_0,HDMI AVI Infoframe Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_0,HDMI AVI Infoframe SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_0,HDMI AVI Infoframe SUBPACK0 High"
hexmask.long.byte 0x08 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x08 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x08 0.--7. 1. " PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_0,HDMI AVI Infoframe SUBPACK1 Low"
hexmask.long.byte 0x0C 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x0C 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x0C 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x0C 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x10 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_0,HDMI AVI Infoframe SUBPACK1 High"
hexmask.long.byte 0x10 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x10 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x10 0.--7. 1. " PB11                          ,PB11"
rgroup.long 0x29C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_STATUS_0,HDMI Generic Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0xB0++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_HEADER_0,HDMI Generic Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
group.long 0x2A4++0x6B
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_LOW_0,HDMI Generic SUBPACK0 Low"
hexmask.long.byte 0x00 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x00 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x00 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_HIGH_0,HDMI Generic SUBPACK0 High"
hexmask.long.byte 0x04 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x04 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x04 0.--7. 1. " PB4                           ,PB4"
line.long 0x08 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_LOW_0,HDMI Generic SUBPACK1 Low"
hexmask.long.byte 0x08 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x08 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x08 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x0C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_HIGH_0,HDMI Generic SUBPACK1 High"
hexmask.long.byte 0x0C 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x0C 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x0C 0.--7. 1. " PB11                          ,PB11"
line.long 0x10 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_LOW_0,HDMI Generic SUBPACK2 Low"
hexmask.long.byte 0x10 24.--31. 1. " PB17                          ,PB17"
hexmask.long.byte 0x10 16.--23. 1. "                     PB16                          ,PB16"
textline "                                                            "
hexmask.long.byte 0x10 8.--15. 1. " PB15                          ,PB15"
hexmask.long.byte 0x10 0.--7. 1. "                     PB14                          ,PB14"
line.long 0x14 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_HIGH_0,HDMI Generic SUBPACK2 High"
hexmask.long.byte 0x14 16.--23. 1. " PB20                          ,PB20"
hexmask.long.byte 0x14 8.--15. 1. "                     PB19                          ,PB19"
textline "                                                            "
hexmask.long.byte 0x14 0.--7. 1. " PB18                          ,PB18"
line.long 0x18 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_LOW_0,HDMI Generic SUBPACK3 Low"
hexmask.long.byte 0x18 24.--31. 1. " PB24                          ,PB24"
hexmask.long.byte 0x18 16.--23. 1. "                     PB23                          ,PB23"
textline "                                                            "
hexmask.long.byte 0x18 8.--15. 1. " PB22                          ,PB22"
hexmask.long.byte 0x18 0.--7. 1. "                     PB21                          ,PB21"
line.long 0x1C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_HIGH_0,HDMI Generic SUBPACK2 High"
hexmask.long.byte 0x1C 16.--23. 1. " PB27                          ,PB27"
hexmask.long.byte 0x1C 8.--15. 1. "                     PB26                          ,PB26"
textline "                                                            "
hexmask.long.byte 0x1C 0.--7. 1. " PB25                          ,PB25"
line.long 0x20 "NV_PDISP_SOR_HDMI_ACR_CTRL_0,HDMI Audio Clock Regeneration Control"
bitfld.long 0x20 24.--27. " FREQS                         ,Audio sampling frequency" "FREQ_44_1KHZ,,FREQ_48KHZ,FREQ_32KHZ,,,,,FREQ_88_2KHZ,,FREQ_96KHZ,,FREQ_176_4KHZ,,FREQ_192KHZ,?..."
bitfld.long 0x20 16. "          FREQS_ENABLE                  ,Uses the sampling frequency" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x20 8. " MEASURE_ENABLE                ,Uses the sampling frequency measured" "Disabled,Enabled"
bitfld.long 0x20 0. "               PACKET_ENABLE                 ,Uses the channel status information read from the incoming SPDIF" "Disabled,Enabled"
line.long 0x24 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK Low"
hexmask.long.byte 0x24 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x24 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " SB3                           ,SB3"
line.long 0x28 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK High"
bitfld.long 0x28 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x28 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x28 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x28 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x2C "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK Low"
hexmask.long.byte 0x2C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x2C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x2C 8.--15. 1. " SB3                           ,SB3"
line.long 0x30 "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK High"
bitfld.long 0x30 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x30 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x30 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x34 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK Low"
hexmask.long.byte 0x34 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x34 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x34 8.--15. 1. " SB3                           ,SB3"
line.long 0x38 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK High"
bitfld.long 0x38 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x38 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x38 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x38 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x3C "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK Low"
hexmask.long.byte 0x3C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x3C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x3C 8.--15. 1. " SB3                           ,SB3"
line.long 0x40 "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK High"
bitfld.long 0x40 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x40 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x40 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x40 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x44 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK Low"
hexmask.long.byte 0x44 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x44 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x44 8.--15. 1. " SB3                           ,SB3"
line.long 0x48 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK High"
bitfld.long 0x48 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x48 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x48 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x48 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x4C "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK Low"
hexmask.long.byte 0x4C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x4C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x4C 8.--15. 1. " SB3                           ,SB3"
line.long 0x50 "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK High"
bitfld.long 0x50 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x50 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x50 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x50 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x54 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK Low"
hexmask.long.byte 0x54 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x54 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x54 8.--15. 1. " SB3                           ,SB3"
line.long 0x58 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK High"
bitfld.long 0x58 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x58 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x58 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x58 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x5C "NV_PDISP_SOR_HDMI_CTRL_0,HDMI Control"
bitfld.long 0x5C 30. " ENABLE                        ,Enables HDMI for this head" "Disabled,Enabled"
bitfld.long 0x5C 28. "               CA_SELECT                     ,Value of channel allocation value software/hardware based" "SW,HW"
textline "                                                            "
bitfld.long 0x5C 27. " SS_SELECT                     ,Value of sample size software/hardware based" "SW,HW"
bitfld.long 0x5C 26. "                     SF_SELECT                     ,Value of sampling frequency software/hardware based" "SW,HW"
textline "                                                            "
bitfld.long 0x5C 25. " CC_SELECT                     ,Value of channel count software/hardware based" "SW,HW"
bitfld.long 0x5C 24. "                     CT_SELECT                     ,Value of coding type software/hardware based" "SW,HW"
textline "                                                            "
hexmask.long.byte 0x5C 16.--20. 1. " MAX_AC_PACKET                 ,Maximum number of 32-pixel packets"
bitfld.long 0x5C 12. "                     SAMPLE_FLAT                   ,Controls the values of HB2[3:0]" "CLR,SET"
textline "                                                            "
bitfld.long 0x5C 10. " AUDIO_LAYOUT_SELECT           ,AUDIO_LAYOUT information is automatically detected by hardware/software" "HW,SW"
bitfld.long 0x5C 8. "                     AUDIO_LAYOUT                  ,Controls layout HB1[4]" "Layout 2CH,Layout 8CH"
textline "                                                            "
hexmask.long.byte 0x5C 0.--6. 1. " REKEY                         ,Number of clocks required for HDCP rekey"
line.long 0x60 "NV_PDISP_SOR_HDMI_VSYNC_KEEPOUT_0,HDMI VSYNC Keepout"
bitfld.long 0x60 31. " ENABLE                        ,Enables keepout window" "Disabled,Enabled"
hexmask.long.word 0x60 16.--25. 1. "               START                         ,Defines the start of the keepout period"
textline "                                                            "
hexmask.long.word 0x60 0.--9. 1. " END                           ,Defines the end of the keepout period"
line.long 0x64 "NV_PDISP_SOR_HDMI_VSYNC_WINDOW_0,HDMI VSYNC Window"
bitfld.long 0x64 31. " ENABLE                        ,Allow EESS signaling during the window of opportunity" "Disabled,Enabled"
hexmask.long.word 0x64 16.--25. 1. "               START                         ,Defines the start of the window of opportunity"
textline "                                                            "
hexmask.long.word 0x64 0.--9. 1. " END                           ,Defines the end of the window of opportunity"
line.long 0x68 "NV_PDISP_SOR_HDMI_GCP_CTRL_0,HDMI GCP Control"
bitfld.long 0x68 8. " SINGLE                        ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled"
bitfld.long 0x68 4. "               OTHER                         ,Cause infoframe to be transmitted to every other frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x68 0. " ENABLE                        ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled"
rgroup.long 0x310++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_STATUS_0,HDMI GCP Status"
bitfld.long 0x00 24.--26. " HSYNC_END_PP                  ,Indicates the pixel phase for the end fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 20.--22. "                   HSYNC_START_PP                ,Indicates the pixel phase for the start fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 16.--18. " VSYNC_END_PP                  ,Indicates the pixel phase for the end fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 12.--14. "                   VSYNC_START_PP                ,Indicates the pixel phase for the start fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 8.--10. " ACTIVE_END_PP                 ,Indicates the pixel phase for the END fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 4.--6. "                   ACTIVE_START_PP               ,Indicates the pixel phase for the start fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x314++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_SUBPACK_0,HDMI GCP SUBPACK"
hexmask.long.byte 0x00 16.--23. 1. " SB2                           ,SB2"
hexmask.long.byte 0x00 8.--15. 1. "                     SB1                           ,SB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " SB0                           ,SB0"
group.long 0x320++0x07
line.long 0x00 "NV_PDISP_SOR_HDMI_EMU0_0,SOR NV PDISP SOR HDMI EMU0"
line.long 0x04 "NV_PDISP_SOR_HDMI_EMU1_0,SOR NV PDISP SOR HDMI EMU1"
rgroup.long 0x328++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_EMU1_RDATA_0,SOR NV PDISP SOR HDMI EMU1 RDATA"
group.long 0x32C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_SPARE_0,HDMI Spare"
rgroup.long 0x330++0x07
line.long 0x00 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS1_0,HDMI SPDIF Channel Status1"
bitfld.long 0x00 28.--31. " ACCURACY                      ,Transmitter clock accuracy" "High,Normal,Variable pitch,Other,?..."
bitfld.long 0x00 24.--27. "         SFREQ                         ,Reported sampling frequency of the input audio stream" ",Undefined,?..."
textline "                                                            "
bitfld.long 0x00 20.--23. " CHANNEL                       ,Channel number of the audio" "Undefined,?..."
bitfld.long 0x00 16.--19. "              SOURCE                        ,Source number of the audio" "Undefined,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " CODE                          ,This byte defines the category code of the input device"
bitfld.long 0x00 6.--7. "                     MODE                          ,Defines one of four possible channel status formats for bytes 1-23 of channel status" "0,1,2,3"
textline "                                                            "
bitfld.long 0x00 3.--5. " D                             ,2 audio channels without pre-emphasis/pre-emphasis" "No pre-emphasis,Pre-emphasis,?..."
bitfld.long 0x00 2. "        COPYRIGHT                     ,Copyright status of the audio" "Yes,No"
textline "                                                            "
bitfld.long 0x00 1. " TYPE                          ,Specifies the type of data the audio word represents" "PCM,Other"
bitfld.long 0x00 0. "                  USE                           ,Specifies consumer/professional use of the channel status block" "CONSUMER,PRO"
line.long 0x04 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS2_0,HDMI SPDIF Channel Status2"
bitfld.long 0x04 4.--7. " ORIGINAL                      ,ORIGINAL" "Undefined,?..."
bitfld.long 0x04 1.--3. "              LENGTH                        ,Audio sample word length of this block depends on MAX_LENGTH" "MAX20_UNDEF/MAX24_UNDEF,MAX20_16BITS/MAX24_20BITS,MAX20_18BITS/MAX24_22BITS,,MAX20_19BITS/MAX24_23BITS,MAX20_20BITS/MAX24_24BITS,MAX20_17BITS/MAX24_21BITS,?..."
textline "                                                            "
bitfld.long 0x04 0. " MAX_LENGTH                    ,Reports if the maximum audio sample word length is 20 bits or 24 bits" "0,1"
group.long 0x33C++0x03
line.long 0x00 "NV_PDISP_HDCPRIF_ROM_CTRL_0,HDCPRIF Control Register"
hexmask.long.word 0x00 0.--15. 1. " ACK_ATTEMPTS                  ,Controls the number of Ack Attempts"
group.long 0x394++0x17
line.long 0x00 "NV_PDISP_HDCPRIF_ROM_TIMING_0,HDCPRIF Control Timing Register"
bitfld.long 0x00 24.--27. " PRESCALE                      ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. "                     START_DLY                     ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the rising edge of SCL"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " DATA_DLY                      ,Defines how many scaled ticks pass  before SDA (the data bit) makes a transition after the falling edge of SCL"
hexmask.long.byte 0x00 0.--7. 1. "                     BIT_PERIOD                    ,Defines the timing of the SCL (serial clock) output"
line.long 0x04 "NV_PDISP_SOR_REFCLK_0,SOR REFCLK"
hexmask.long.byte 0x04 8.--15. 1. " DIV_INT                       ,Divisor integer"
bitfld.long 0x04 6.--7. "                     DIV_FRAC                      ,Divisor fractional" "0,1,2,3"
line.long 0x08 "NV_PDISP_CRC_CONTROL_0,CRC Control"
bitfld.long 0x08 0. " ARM_CRC_ENABLE                ,Enables or disables computation of CRC" "Disabled,Enabled"
line.long 0x0C "NV_PDISP_INPUT_CONTROL_0,Input Control"
bitfld.long 0x0C 1. " ARM_VIDEO_RANGE               ,Controls whether R/G/B values of 0 and 255 are permitted" "Full,Limited"
bitfld.long 0x0C 0. "                HDMI_SRC_SELECT               ,Selects from which of the two display units to take input" "Display,DisplayB"
line.long 0x10 "NV_PDISP_SCRATCH_0,Scratch"
line.long 0x14 "NV_PDISP_KEY_CTRL_0,HDCP KEY SRAM Register Control"
hexmask.long.word 0x14 22.--31. 0x40 " ADDRESS                       ,Reports the next byte address in the local key store"
hexmask.long.word 0x14 12.--21. 0x10 "                   LOAD_ADDRESS                  ,Selects the start byte address of the contiguous locations in the local key store"
textline "                                                            "
rbitfld.long 0x14 6. " PKEY_LOADED                   ,Indicates that the private key value has been received from KFUSE and is ready for use" "False,True"
bitfld.long 0x14 5. "                  PKEY_REQUEST_RELOAD           ,Requests that the private key be requested again from KFUSE" "Idle,Triggered"
textline "                                                            "
bitfld.long 0x14 4. " WRITE16                       ,HDCP keys module will write all 16 bytes of data into the local key store" "Done,Triggered"
bitfld.long 0x14 1. "              AUTOINC                       ,Auto-increment" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x14 0. " LOCAL_KEYS                    ,On-chip HDCP key store " "Disabled,Enabled"
group.long 0x3B8++0x13
line.long 0x00 "NV_PDISP_KEY_HDCP_KEY_0_0,SOR NV_PDISP Key HDCP Key 0"
line.long 0x04 "NV_PDISP_KEY_HDCP_KEY_1_0,SOR NV_PDISP Key HDCP Key 1"
line.long 0x08 "NV_PDISP_KEY_HDCP_KEY_2_0,SOR NV_PDISP Key HDCP Key 2"
line.long 0x0C "NV_PDISP_KEY_HDCP_KEY_3_0,SOR NV_PDISP Key HDCP Key 3"
line.long 0x10 "NV_PDISP_KEY_HDCP_KEY_TRIG_0,SOR NV PDISP Key HDCP Key Trigger"
bitfld.long 0x10 8. " LOAD_HDCP_KEY                 ,Load HDCP key" "Idle,Triggered"
wgroup.long 0x3CC++0x03
line.long 0x00 "NV_PDISP_KEY_SKEY_INDEX_0,SOR NV PDISP Key SKEY INDEX"
bitfld.long 0x00 0.--3. " IDX_VALUE                     ,Index value" ",,,,,,,,,,,,,,,Test"
group.long 0x3F0++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_CNTRL0_0,HD Audio (Known as Azalia)"
rbitfld.long 0x00 31. " INPUT_MODE                    ,This bit indicates what the audio data source is" "HDA,SPDIF"
bitfld.long 0x00 29. "                  INJECT_NULLSMPL               ,Inserts null samples into the audio FIFO  for each Azalia frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " SOURCE_SELECT                 ,Determines whether to use the S/PDIF or Azalia (HDAL) audio input" "Auto,SPDIF,HDAL,?..."
rbitfld.long 0x00 16.--19. "                  SAMPLING_FREQ                 ,Incoming audio stream sampling frequency in the Azalia code" "FREQ_44_1KHZ,FREQ Unknown,FREQ_48_0KHZ,FREQ_32_0KHZ,,,,,FREQ_88_2KHZ,,FREQ_96_0KHZ,,FREQ_176_4KHZ,,FREQ_192_0KHZ,?..."
textline "                                                            "
bitfld.long 0x00 12. " AFIFO_FLUSH                   ,Ensures that the next new audio packet sent will begin on the correct channel" "Disabled,Enabled"
bitfld.long 0x00 0. "               PORT_CONNECTIVITY             ,Controls the behavior of the Port Connectivity field of the Azalia configuration defaults verb" "Enabled,Disabled"
group.long 0x3FC++0x1B
line.long 0x00 "NV_PDISP_SOR_AUDIO_NVAL_0320_0,SOR Audio N values 32 KHz"
hexmask.long.tbyte 0x00 0.--19. 1. " VALUE                         ,The correct N value for 32 KHz audio at the current pixel clock frequency"
line.long 0x04 "NV_PDISP_SOR_AUDIO_NVAL_0441_0,SOR Audio N values 44.1 KHz"
hexmask.long.tbyte 0x04 0.--19. 1. " VALUE                         ,The correct N value for 44.1 KHz audio at the current pixel clock frequency"
line.long 0x08 "NV_PDISP_SOR_AUDIO_NVAL_0882_0,SOR Audio N values 88.2 KHz"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                         ,The correct N value for 88.2 KHz audio at the current pixel clock frequency"
line.long 0x0C "NV_PDISP_SOR_AUDIO_NVAL_1764_0,SOR Audio N values 176.4 KHz"
hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE                         ,The correct N value for 176.4 KHz audio at the current pixel clock frequency"
line.long 0x10 "NV_PDISP_SOR_AUDIO_NVAL_0480_0,SOR Audio N values 48 KHz"
hexmask.long.tbyte 0x10 0.--19. 1. " VALUE                         ,The correct N value for 48 KHz audio at the current pixel clock frequency"
line.long 0x14 "NV_PDISP_SOR_AUDIO_NVAL_0960_0,SOR Audio N values 96 KHz"
hexmask.long.tbyte 0x14 0.--19. 1. " VALUE                         ,The correct N value for 96 KHz audio at the current pixel clock frequency"
line.long 0x18 "NV_PDISP_SOR_AUDIO_NVAL_1920_0,SOR Audio N values 192 KHz"
hexmask.long.tbyte 0x18 0.--19. 1. " VALUE                         ,The correct N value for 192 KHz audio at the current pixel clock frequency"
hgroup.long 0x418++0x0F
hide.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH0_0,SOR Audio HDA Scratch0"
hide.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH1_0,SOR Audio HDA Scratch1"
hide.long 0x08 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH2_0,SOR Audio HDA Scratch2"
hide.long 0x0C "NV_PDISP_SOR_AUDIO_HDA_SCRATCH3_0,SOR Audio HDA Scratch3"
rgroup.long 0x428++0x07
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0_0,SOR Audio HDA Codec SCRATCH0"
line.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH1_0,SOR Audio HDA Codec SCRATCH1"
group.long 0x430++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_ELD_BUFWR_0,SOR Audio HDA ELD Buffer"
hexmask.long.byte 0x00 8.--15. 1. " INDEX                         ,Index"
hexmask.long.byte 0x00 0.--7. 1. "                     DATABYTE                      ,Databyte"
group.long 0x434++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_PRESENSE_0,SOR Audio HDA Presense"
bitfld.long 0x00 1. " ELDV                          ,Indicates whether the data in the ELD buffer is valid and ready to read" "Invalid,Valid"
bitfld.long 0x00 0. "                PD                            ,Presence detect" "Not present,Present"
rgroup.long 0x438++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CP_0,SOR Audio HDA Content Protection"
bitfld.long 0x00 2. " REQUEST_STATE_VALID           ,Request state valid" "Invalid,Valid"
bitfld.long 0x00 0.--1. "                REQUEST_STATE                 ,Request state" "Don't care,,Protection off,Protection on"
group.long 0x43C++0x23
line.long 0x00 "NV_PDISP_SOR_AUDIO_AVAL_0320_0,Audio AVAL 32 KHz"
hexmask.long.tbyte 0x00 0.--19. 1. " VALUE                         ,The correct A value for 32 KHz audio at the current pixel clock frequency"
line.long 0x04 "NV_PDISP_SOR_AUDIO_AVAL_0441_0,Audio AVAL 44.1 KHz"
hexmask.long.tbyte 0x04 0.--19. 1. " VALUE                         ,The correct A value for 44.1 KHz audio at the current pixel clock frequency"
line.long 0x08 "NV_PDISP_SOR_AUDIO_AVAL_0882_0,Audio AVAL 88.2 KHz"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                         ,The correct A value for 88.2 KHz audio at the current pixel clock frequency"
line.long 0x0C "NV_PDISP_SOR_AUDIO_AVAL_1764_0,Audio AVAL 176.4 KHz"
hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE                         ,The correct A value for 176.4 KHz audio at the current pixel clock frequency"
line.long 0x10 "NV_PDISP_SOR_AUDIO_AVAL_0480_0,Audio AVAL 48 KHz"
hexmask.long.tbyte 0x10 0.--19. 1. " VALUE                         ,The correct A value for 48 KHz audio at the current pixel clock frequency"
line.long 0x14 "NV_PDISP_SOR_AUDIO_AVAL_0960_0,Audio AVAL 96 KHz"
hexmask.long.tbyte 0x14 0.--19. 1. " VALUE                         ,The correct A value for 96 KHz audio at the current pixel clock frequency"
line.long 0x18 "NV_PDISP_SOR_AUDIO_AVAL_1920_0,Audio AVAL 192 KHz"
hexmask.long.tbyte 0x18 0.--19. 1. " VALUE                         ,The correct A value for 192 KHz audio at the current pixel clock frequency"
line.long 0x1C "NV_PDISP_SOR_AUDIO_AVAL_DEFAULT_0,Audio AVAL Default"
hexmask.long.tbyte 0x1C 0.--19. 1. " VALUE                         ,Default A value if the Azalia codec sampling frequency does not match any"
line.long 0x20 "NV_PDISP_SOR_AUDIO_GEN_CTRL_0,SOR Audio GEN Control"
hexmask.long.word 0x20 16.--31. 1. " DEV_ID                        ,Device ID to identify the current chip"
hexmask.long.byte 0x20 0.--7. 1. "                   REV_ID                        ,Rev ID for the codec"
group.long 0x470++0x0B
line.long 0x00 "NV_PDISP_INT_STATUS_0,NV PDISP Interrupt Status"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 21. " LANE3_FIFO_OVERFLOW           ,LANE3 FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 20. "           LANE2_FIFO_OVERFLOW           ,LANE2 FIFO overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 19. " LANE1_FIFO_OVERFLOW           ,LANE1 FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 18. "           LANE0_FIFO_OVERFLOW           ,LANE0 FIFO overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 17. " SPKT_OVERRUN                  ,SPKT overrun" "No interrupt,Interrupt"
eventfld.long 0x00 16. "           LANE3_STEER_ERROR             ,LANE3 steer error" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 15. " LANE2_STEER_ERROR             ,LANE2 steer error" "No interrupt,Interrupt"
eventfld.long 0x00 14. "           LANE1_STEER_ERROR             ,LANE1 steer error" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 13. " LANE0_STEER_ERROR             ,LANE0 steer error" "No interrupt,Interrupt"
eventfld.long 0x00 12. "           LANE3_PIXPACK_OVERFLOW        ,LANE3 pixpack overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 11. " LANE2_PIXPACK_OVERFLOW        ,LANE2 pixpack overflow" "No interrupt,Interrupt"
eventfld.long 0x00 10. "           LANE1_PIXPACK_OVERFLOW        ,LANE1 pixpack overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 9. " LANE0_PIXPACK_OVERFLOW        ,LANE0 pixpack overflow" "No interrupt,Interrupt"
eventfld.long 0x00 8. "           LANE3_FIFO_UNDERFLOW          ,LANE3 FIFO underflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 7. " LANE2_FIFO_UNDERFLOW          ,LANE2 FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 6. "           LANE1_FIFO_UNDERFLOW          ,LANE1 FIFO underflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 5. " LANE0_FIFO_UNDERFLOW          ,LANE0 FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 4. "           REG_SECURE_ACCESS_ERR         ,REG secure access error" "No interrupt,Interrupt"
textline "                                                            "
endif
eventfld.long 0x00 3. " SCRATCH                       ,Scratch" "No interrupt,Interrupt"
eventfld.long 0x00 2. "           CP_REQUEST                    ,CP Request" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 1. " CODEC_SCRATCH1                ,Codec scratch1" "No interrupt,Interrupt"
eventfld.long 0x00 0. "           CODEC_SCRATCH0                ,Codec scratch0" "No interrupt,Interrupt"
line.long 0x04 "NV_PDISP_INT_MASK_0,NV PDISP Interrupt Masked"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 21. " LANE3_FIFO_OVERFLOW_MASK      ,LANE3 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x04 20. "             LANE2_FIFO_OVERFLOW_MASK      ,LANE2 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 19. " LANE1_FIFO_OVERFLOW_MASK      ,LANE1 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x04 18. "             LANE0_FIFO_OVERFLOW_MASK      ,LANE0 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 17. " SPKT_OVERRUN_MASK             ,SPKT overrun mask" "Masked,Not masked"
bitfld.long 0x04 16. "             LANE3_STEER_ERROR_MASK        ,LANE3 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 15. " LANE2_STEER_ERROR_MASK        ,LANE2 steer error mask" "Masked,Not masked"
bitfld.long 0x04 14. "             LANE1_STEER_ERROR_MASK        ,LANE1 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 13. " LANE0_STEER_ERROR_MASK        ,LANE0 steer error mask" "Masked,Not masked"
bitfld.long 0x04 12. "             LANE3_PIXPACK_OVERFLOW_MASK   ,LANE3 pixpack overflow mask" "Masked,Not Masked"
textline "                                                            "
bitfld.long 0x04 11. " LANE2_PIXPACK_OVERFLOW_MASK   ,LANE2 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x04 10. "             LANE1_PIXPACK_OVERFLOW_MASK   ,LANE1 pixpack overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 9. " LANE0_PIXPACK_OVERFLOW_MASK   ,LANE0 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x04 8. "             LANE3_FIFO_UNDERFLOW_MASK     ,LANE3 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 7. " LANE2_FIFO_UNDERFLOW_MASK     ,LANE2 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x04 6. "             LANE1_FIFO_UNDERFLOW_MASK     ,LANE1 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 5. " LANE0_FIFO_UNDERFLOW_MASK     ,LANE0 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x04 4. "             REG_SECURE_ACCESS_ERR_MASK    ,REG secure access error" "Masked,Not masked"
textline "                                                            "
endif
bitfld.long 0x04 3. " SCRATCH_MASK                  ,Scratch mask" "Masked,Not masked"
bitfld.long 0x04 2. "             CP_REQUEST_MASK               ,CP request mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 1. " CODEC_SCRATCH1_MASK           ,Codec scratch1 mask" "Masked,Not masked"
bitfld.long 0x04 0. "             CODEC_SCRATCH0_MASK           ,Codec scratch0 mask" "Masked,Not masked"
line.long 0x08 "NV_PDISP_INT_ENABLE_0,NV PDISP Interrupt Enable"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 21. " LANE3_FIFO_OVERFLOW_ENABLE    ,LANE3 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x08 20. "               LANE2_FIFO_OVERFLOW_ENABLE    ,LANE2 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " LANE1_FIFO_OVERFLOW_ENABLE    ,LANE1 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x08 18. "               LANE0_FIFO_OVERFLOW_ENABLE    ,LANE0 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 17. " SPKT_OVERRUN_ENABLE           ,SPKT overrun enable" "Disabled,Enabled"
bitfld.long 0x08 16. "               LANE3_STEER_ERROR_ENABLE      ,LANE3 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 15. " LANE2_STEER_ERROR_ENABLE      ,LANE2 steer error enable" "Disabled,Enabled"
bitfld.long 0x08 14. "               LANE1_STEER_ERROR_ENABLE      ,LANE1 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 13. " LANE0_STEER_ERROR_ENABLE      ,LANE0 steer error enable" "Disabled,Enabled"
bitfld.long 0x08 12. "               LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 11. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x08 10. "               LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 9. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x08 8. "               LANE3_FIFO_UNDERFLOW_ENABLE   ,LANE3 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 7. " LANE2_FIFO_UNDERFLOW_ENABLE   ,LANE2 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x08 6. "               LANE1_FIFO_UNDERFLOW_ENABLE   ,LANE1 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 5. " LANE0_FIFO_UNDERFLOW_ENABLE   ,LANE0 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x08 4. "               REG_SECURE_ACCESS_ERR_ENABLE  ,REG secure access error enable" "Disabled,Enabled"
textline "                                                            "
endif
bitfld.long 0x08 3. " SCRATCH_ENABLE                ,Scratch enable" "Disabled,Enabled"
bitfld.long 0x08 2. "               CP_REQUEST_ENABLE             ,CP request enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 1. " CODEC_SCRATCH1_ENABLE         ,Codec scratch1 enable" "Disabled,Enabled"
bitfld.long 0x08 0. "               CODEC_SCRATCH0_ENABLE         ,Codec scratch0 enable" "Disabled,Enabled"
rgroup.long 0x47C++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_M0_LO_0,SOR NV PDISP SOR TMDS HDCP M0 Low"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_M0_HI_0,SOR NV PDISP SOR TMDS HDCP M0 High"
group.long 0x484++0x03
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_STATUS_0,SOR NV PDISP SOR TMDS HDCP Status"
bitfld.long 0x00 8. " OVERRIDE_ENABLE               ,Override enable" "Disabled,Enabled"
bitfld.long 0x00 2. "               SCOPE_OVERRIDE                ,Scope override" "No override,Override"
textline "                                                            "
bitfld.long 0x00 1. " UNPROTECTED_OVERRIDE          ,Unprotected override" "No override,Override"
bitfld.long 0x00 0. "            RPTR_OVERRIDE                 ,Repeater override" "No override,Override"
group.long 0x488++0x07
line.long 0x00 "NV_HDACODEC_AUDIO_GEN_CTL_0,HDACODEC Audio GEN Control"
bitfld.long 0x00 4. " COPY_POLARITY                 ,The polarity of the COPY bit is currently inverted" "Old,New"
bitfld.long 0x00 0.--3. "                    CHSTS_FS_3840                 ,CHSTS sampling frequency 384 KHz" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_CTRL_0,HDMI Vendor Specific Infoframe Control"
bitfld.long 0x04 16. " VIDEO_FMT                     ,Specifies how the remaining bytes in the infoframe should be interpreted by the specification" "SW controlled,HW controlled"
bitfld.long 0x04 9. "          CHKSUM_HW                     ,Hardware provides a way to calculate the checksum for the infoframes" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 8. " SINGLE                        ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled"
bitfld.long 0x04 4. "               OTHER                         ,Cause infoframe to be transmitted every other frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 0. " ENABLE                        ,Initiates infoframe generation" "Disabled,Enabled"
rgroup.long 0x490++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_STATUS_0,HDMI Vendor Specific Infoframe Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x494++0x23
line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_HEADER_0,HDMI Vendor Specific Infoframe Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_LOW_0,HDMI Vendor Specific Infoframe SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK0 High"
hexmask.long.byte 0x08 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x08 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x08 0.--7. 1. " PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_LOW_0,HDMI Vendor Specific Infoframe SUBPACK1 Low"
hexmask.long.byte 0x0C 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x0C 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x0C 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x0C 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x10 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK1 High"
hexmask.long.byte 0x10 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x10 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x10 0.--7. 1. " PB11                          ,PB11"
line.long 0x14 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_LOW_0,HDMI Vendor Specific Infoframe SUBPACK2 Low"
hexmask.long.byte 0x14 24.--31. 1. " PB17                          ,PB17"
hexmask.long.byte 0x14 16.--23. 1. "                     PB16                          ,PB16"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " PB15                          ,PB15"
hexmask.long.byte 0x14 0.--7. 1. "                     PB14                          ,PB14"
line.long 0x18 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK2 High"
hexmask.long.byte 0x18 16.--23. 1. " PB20                          ,PB20"
hexmask.long.byte 0x18 8.--15. 1. "                     PB19                          ,PB19"
textline "                                                            "
hexmask.long.byte 0x18 0.--7. 1. " PB18                          ,PB18"
line.long 0x1C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_LOW_0,HDMI Vendor Specific Infoframe SUBPACK3 Low"
hexmask.long.byte 0x1C 24.--31. 1. " PB24                          ,PB24"
hexmask.long.byte 0x1C 16.--23. 1. "                     PB23                          ,PB23"
textline "                                                            "
hexmask.long.byte 0x1C 8.--15. 1. " PB22                          ,PB22"
hexmask.long.byte 0x1C 0.--7. 1. "                     PB21                          ,PB21"
line.long 0x20 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK3 High"
hexmask.long.byte 0x20 16.--23. 1. " PB27                          ,PB27"
hexmask.long.byte 0x20 8.--15. 1. "                     PB26                          ,PB26"
textline "                                                            "
hexmask.long.byte 0x20 0.--7. 1. " PB25                          ,PB25"
group.long 0x4C0++0x27
line.long 0x00 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_HEADER_0,SOR DP Audio InfoFrame Header"
hexmask.long.byte 0x00 24.--31. 1. " HB3                           ,HB3"
hexmask.long.byte 0x00 16.--23. 1. "                     HB2                           ,HB2"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " HB1                           ,HB1"
hexmask.long.byte 0x00 0.--7. 1. "                     HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_LOW_0,SOR DP Audio InfoFrame SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,SOR DP Audio InfoFrame SUBPACK0 High"
hexmask.long.byte 0x08 8.--15. 1. " PB5                           ,PB5"
hexmask.long.byte 0x08 0.--7. 1. "                     PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0320_0,SOR DP Audio Timestamp 32 KHz"
hexmask.long.word 0x0C 16.--31. 1. " N                             ,N"
hexmask.long.word 0x0C 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0441_0,SOR DP Audio Timestamp 44.1 KHz"
hexmask.long.word 0x10 16.--31. 1. " N                             ,N"
hexmask.long.word 0x10 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x14 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0882_0,SOR DP Audio Timestamp 88.2 KHz"
hexmask.long.word 0x14 16.--31. 1. " N                             ,N"
hexmask.long.word 0x14 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x18 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1764_0,SOR DP Audio Timestamp 176.4"
hexmask.long.word 0x18 16.--31. 1. " N                             ,N"
hexmask.long.word 0x18 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x1C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0480_0,SOR DP Audio Timestamp 48 KHz"
hexmask.long.word 0x1C 16.--31. 1. " N                             ,N"
hexmask.long.word 0x1C 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x20 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0960_0,SOR DP Audio Timestamp 96 KHz"
hexmask.long.word 0x20 16.--31. 1. " N                             ,N"
hexmask.long.word 0x20 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x24 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1920_0,SOR DP Audio Timestamp 192 KHz"
hexmask.long.word 0x24 16.--31. 1. " N                             ,N"
hexmask.long.word 0x24 0.--15. 1. "                   D_M                           ,D_N"
group.long 0x4F0++0x03
line.long 0x00 "NV_PDISP_HDMI_AUDIO_N_0,Audio N"
bitfld.long 0x00 28. " LOOKUP                        ,Hardware will select the appropriate value of N" "Disabled,Enabled"
rgroup.long 0x4F4++0x03
line.long 0x00 "NV_PDISP_HDMI_LANE_CALIB_FUSE_0,NV PDISP HDMI Lane Calibration Fuse"
hexmask.long.byte 0x00 24.--31. 1. " LANE3_CALIB                   ,Lane 3 calibration"
hexmask.long.byte 0x00 16.--23. 1. "                     LANE2_CALIB                   ,Lane 2 calibration"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " LANE1_CALIB                   ,Lane 1 calibration"
hexmask.long.byte 0x00 0.--7. 1. "                     LANE0_CALIB                   ,Lane 0 calibration"
group.long 0x4F8++0x0F
line.long 0x00 "NV_PDISP_SOR_HDMI2_CTRL_0,NV PDISP SOR HDMI2 Control"
hexmask.long.word 0x00 16.--31. 1. " SSCP_START                    ,This sets the start point of the SSCP period"
bitfld.long 0x00 4.--7. "                   SSCP_LENGTH                   ,This sets the length of the SSCP period which is output once per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 2. " SCRAMBLE_AT_LOADV             ,Scramble at LOADV" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLOCK_MODE                    ,This bit allows the clock signal to be divide by 4" "Normal,Mode DIV by4"
textline "                                                            "
bitfld.long 0x00 0. " SCRAMBLE                      ,This bit enables scrambling for HDMI 2.0" "Disabled,Enabled"
line.long 0x04 "NV_PDISP_SOR_HDMI2_LFSR0_0,NV PDISP SOR HDMI2 LFSR0"
hexmask.long.word 0x04 16.--31. 1. " LANE1_SEED                    ,Lane 1 seed"
hexmask.long.word 0x04 0.--15. 1. "                   LANE0_SEED                    ,Lane 0 seed"
line.long 0x08 "NV_PDISP_SOR_HDMI2_LFSR1_0,NV PDISP SOR HDMI2 LFSR1"
hexmask.long.word 0x08 0.--15. 1. " LANE2_SEED                    ,Lane 2 seed"
line.long 0x0C "NV_PDISP_SOR_HDCP22_CTRL_0,HDCP 2.2 Control Register"
bitfld.long 0x0C 6. " DISABLE_LANE_CNT0             ,Enables HW to disable encryption when SOR lane count is set to 0" "Yes,No"
bitfld.long 0x0C 5. "                    DISABLE_DETACH                ,Enables HW to disable encryption when SOR is detached from the head" "Yes,No"
textline "                                                            "
bitfld.long 0x0C 4. " REPEATER                      ,Reporting that the SOR is authenticated with a downstream REPEATER " "Yes,No"
bitfld.long 0x0C 2. "                    LOCK_TYPE                     ,Protected software write to the TYPE register" "Unlocked,Locked"
textline "                                                            "
bitfld.long 0x0C 1. " INIT                          ,Initial value to indicate a fresh start of a new session" "Done,Triggered"
bitfld.long 0x0C 0. "              CRYPT                         ,Would actually start encrypting the incoming data" "Disabled,Enabled"
rgroup.long 0x508++0x03
line.long 0x00 "NV_PDISP_SOR_HDCP22_STATUS_0,HDCP 2.2 Status register"
bitfld.long 0x00 9.--11. " HDCP_STATE                    ,HDCP_STATE" "Idle,Wait LC128,Wait AES ready,HDCP22 enable,HDMI encrypt on,DP encrypt on,?..."
bitfld.long 0x00 7.--8. "        AUTODIS_STATE                 ,AUTODIS state" "Idle,Encrypting,Disabled LC_0,Disabled detach"
textline "                                                            "
bitfld.long 0x00 6. " LC128_ERROR                   ,LC128 error" "No,Yes"
bitfld.long 0x00 5. "                    LANE_CNT0_DISABLE             ,Lane CNT0 disable" "No,Yes"
textline "                                                            "
bitfld.long 0x00 4. " DETACHED_DISABLE              ,Detached disable" "No,Yes"
bitfld.long 0x00 3. "                    DATA_CNT_OVERFLOW             ,This indicates if the Data counter has overflowed" "No,Yes"
textline "                                                            "
bitfld.long 0x00 2. " FRAME_CNT_OVERFLOW            ,This indicates if the Frame counter has overflowed" "No overflow,Overflow"
bitfld.long 0x00 0. "            CRYPT_STATUS                  ,Reports the actual link encryption status" "Inactive,Active"
group.long 0x510++0x2B
line.long 0x00 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_MSB_0,AES-CTR Key Bus MBS"
line.long 0x04 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB1_0,AES-CTR Key Bus LSB1"
line.long 0x08 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB2_0,AES-CTR Key Bus LSB2"
line.long 0x0C "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB3_0,AES-CTR Key Bus LSB3"
line.long 0x10 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_MSB_0,AES-CTR Data Bus MBS"
line.long 0x14 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_LSB_0,AES-CTR Data Bus LBS"
line.long 0x18 "NV_PDISP_SOR_HDCP22_SST_DP_TYPE_0,AES-CTR DP Type"
hexmask.long.byte 0x18 0.--7. 1. " VALUE                         ,Value"
line.long 0x1C "NV_PDISP_SOR_HDCP22_LC128_MSB_0,NV PDISP SOR HDCP22 LC128 MSB"
line.long 0x20 "NV_PDISP_SOR_HDCP22_LC128_LSB1_0,NV PDISP SOR HDCP22 LC128 LSB1"
line.long 0x24 "NV_PDISP_SOR_HDCP22_LC128_LSB2_0,NV PDISP SOR HDCP22 LC128 LSB2"
line.long 0x28 "NV_PDISP_SOR_HDCP22_LC128_LSB3_0,NV PDISP SOR HDCP22 LC128 LSB3"
sif (cpuis("TEGRAX2"))
rgroup.long 0x53C++0x03
line.long 0x00 "CTXSW_0_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "         NEXT_CLASS     ,Next requested class"
group.long 0x540++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
hexmask.long.word 0x00 11.--20. 1. " CURR_CHANNEL ,Current working channel"
bitfld.long 0x00 10. "         AUTO_ACK       ,Automatically acknowledge any incoming context switch requests" "Manual,Auto ACK"
textline "                                                            "
hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS   ,Current working class"
group.long 0x544++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x548++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_1,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x54C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_2,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x550++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_0,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x554++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_1,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x558++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_2,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x55C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_0,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x560++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_1,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x564++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_2,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x568++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_0,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x56C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_1,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x570++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_2,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x574++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_0,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x578++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_1,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x57C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_2,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x580++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_0,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
group.long 0x584++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_1,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
group.long 0x588++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_2,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
textline "                                                            "
group.long 0x58C++0x13
line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP SOR PLL0"
bitfld.long 0x00 24.--27. " ICHPMP                        ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA"
textline "                                                            "
bitfld.long 0x00 19. " FILTER[3]                     ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO"
bitfld.long 0x00 16.--18. "       FILTER[2:0]                   ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7"
textline "                                                            "
bitfld.long 0x00 12.--13. " TXREG_LEVEL                   ,TXREG level" "V25,V15,V35,V45"
bitfld.long 0x00 8.--11. "                    VCOCAP                        ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 6.--7. " PLLREG_LEVEL                  ,PLLREG level" "V25,V15,V35,V45"
bitfld.long 0x00 5. "                    PULLDOWN                      ,Weak pull-down enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " VCOPD                         ,VCOPD" "Rescind,Assert"
bitfld.long 0x00 0. "                PWR                           ,Power" "On,Off"
line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1"
bitfld.long 0x04 29. " COHERENTMODE                  ,Coherent mode" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "               LOADADJ                       ,Load pulse position adjust" "Center,?..."
textline "                                                            "
rbitfld.long 0x04 15. " TERM_COMPOUT                  ,Termination calibration status" "Low,High"
bitfld.long 0x04 9.--12. "                   TMDS_TERMADJ                  ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest"
textline "                                                            "
bitfld.long 0x04 8. " TMDS_TERM                     ,Termination enable" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "               IOCURRENT                     ,Used for I/O control" "RST,?..."
line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2"
bitfld.long 0x08 28.--31. " PLL_MDIV                      ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 26.--27. "                     CLKGEN_MODE                   ,CLKGEN mode" "LVDS,DP TMDS,?..."
textline "                                                            "
bitfld.long 0x08 25. " AUX9                          ,AUX9 - LVDSEN" "Allow,Override"
bitfld.long 0x08 24. "               AUX8                          ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 23. " AUX7                          ,AUX7 - port powerdown" "Disabled,Enabled"
bitfld.long 0x08 22. "               AUX6                          ,AUX6 - bandgap powerdown" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 21. " AUX5                          ,AUX5 - link LVDS" "Single,Dual"
bitfld.long 0x08 20. "                 AUX4                          ,AUX4 - duplicate control" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " AUX3                          ,AUX3 - rotate" "Disabled,Enabled"
bitfld.long 0x08 18. "               AUX2                          ,AUX2 - powerdown" "Override,Allow"
textline "                                                            "
bitfld.long 0x08 17. " AUX1                          ,AUX1 - sequencer PLLCAPPD" "Allow,Override"
bitfld.long 0x08 16. "               AUX0                          ,AUX0 - sequencer PLL pulldown" "Allow,Override"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV                      ,PLL NDIV"
bitfld.long 0x08 4.--7. "                     PLL_PDIV                      ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..."
textline "                                                            "
bitfld.long 0x08 2.--3. " PLL_PDIV_MODE                 ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..."
bitfld.long 0x08 1. "         DIV_RATIO_OVERRIDE            ,DIV ratio override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " DCIR_PLL_RESET                ,DCIR PLL reset" "Override,Allow"
line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro"
bitfld.long 0x0C 28.--31. " BG_TEMP_COEF                  ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--27. "                     BG_VREF_LEVEL                 ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V"
textline "                                                            "
hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN                ,Test REFCLK EN"
bitfld.long 0x0C 14. "                     PLL_BYPASS                    ,PLL bypass" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 13. " PLLVDD_MODE                   ,Field to determine the PLL voltage" "1.8 V,3.3 V"
bitfld.long 0x0C 12. "                  CLKDIST_MODE                  ,Clock distribution by CMOS/CML buffers" "CMOS,CML"
textline "                                                            "
bitfld.long 0x0C 8.--11. " AVDD10_LEVEL                  ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..."
bitfld.long 0x0C 4.--7. "                 AVDD14_LEVEL                  ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..."
textline "                                                            "
bitfld.long 0x0C 0.--1. " KICKSTART                     ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60"
line.long 0x10 "NV_PDISP_SOR_PLL4_0,SOR NV PDISP SOR PLL4"
bitfld.long 0x10 24.--29. " SETUP_LCKDET                  ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 23. "                     LOCK_OVERRIDE                 ,Lock override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x10 22. " ENABLE_LCKDET                 ,Enable LCKDET" "Enabled,Disabled"
rbitfld.long 0x10 21. "               LOCKDET                       ,Status signal indicating whether PLL is locked within the desired resolution" "Not locked,Locked"
textline "                                                            "
bitfld.long 0x10 6.--7. " AVDD10_LOAD                   ,Internal regulated 1.0V extra loading for stability control bits" "0 mA,1 mA,2 mA,3 mA"
bitfld.long 0x10 4.--5. "                   AVDD14_LOAD                   ,Internal regulated 1.4V extra loading for stability control bits" "0 uA,175 uA,350 uA,525 uA"
if (((per.l(ad:0x15540000+0x130))&0x01)==0x01)
group.long 0x5A0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x5A0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
if (((per.l(ad:0x15540000+0x134))&0x01)==0x01)
group.long 0x5A4++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL 1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x5A4++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
group.long 0x5A8++0x23
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2"
hexmask.long.byte 0x00 24.--31. 1. " SPAREPLL                      ,Spare PLL"
bitfld.long 0x00 20.--23. "             SPARE4                        ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 16.--19. " SPARE3                        ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "             SPARE2                        ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 8.--11. " SPARE1                        ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             SPARE0                        ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 0. " REG_BYPASS                    ,REG bypass" "0,1"
line.long 0x04 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3"
hexmask.long.byte 0x04 24.--31. 1. " TX_PATTERN_GEN                ,TX pattern GEN"
line.long 0x08 "NV_PDISP_SOR_DP_BS,Program The Timing Of The Scrambler Reset"
bitfld.long 0x08 19. " OVERRIDE                      ,Override" "Done,Pending"
hexmask.long.word 0x08 10.--18. 1. "        CNT_STATUS                    ,Value of running BS count"
textline "                                                            "
rbitfld.long 0x08 9. " OVERRIDE_DEBUG                ,Reports the BS_OVERRIDE status of each of the 8-Lane DP primary/secondary pipelines" "Done,Pending"
hexmask.long.word 0x08 0.--8. 1. "        CNT                           ,Count"
line.long 0x0C "NV_PDISP_SOR_DP_MISC1_OVERRIDE_0,SOR DP MISC1 Override"
bitfld.long 0x0C 31. " CNTL                          ,CNTL" "Done,Pending"
bitfld.long 0x0C 0. "        ENABLE                        ,Enables MISC bit 6 overriding" "Disabled,Enabled"
line.long 0x10 "NV_PDISP_SOR_DP_MISC1_BIT6_0,SOR DP MISC1 Bit 6"
bitfld.long 0x10 0. " VAL                           ,Value" "0,1"
line.long 0x14 "NV_PDISP_DP_INT_STATUS_0,DP Interrupt Status"
eventfld.long 0x14 16. " LANE3_FIFO_OVERFLOW           ,Lane 3 FIFO overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 15. "  LANE2_FIFO_OVERFLOW           ,Lane 2 FIFO overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 14. " LANE1_FIFO_OVERFLOW           ,Lane 1 FIFO overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 13. "  LANE0_FIFO_OVERFLOW           ,Lane 0 FIFO overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 12. " SPKT_OVERRUN                  ,SPKT overrun" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 11. " LANE3_STEER_ERROR             ,Lane 3 steer error" "Not interrupt,Interrupt"
eventfld.long 0x14 10. "  LANE2_STEER_ERROR             ,Lane 2 steer error" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 9. " LANE1_STEER_ERROR             ,Lane 1 steer error" "Not interrupt,Interrupt"
eventfld.long 0x14 8. "  LANE0_STEER_ERROR             ,Lane 0 steer error" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 7. " LANE3_PIXPACK_OVERFLOW        ,Lane 3 pixpack overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 6. "  LANE2_PIXPACK_OVERFLOW        ,Lane 2 pixpack overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 5. " LANE1_PIXPACK_OVERFLOW        ,Lane 1 pixpack overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 4. "  LANE0_PIXPACK_OVERFLOW        ,Lane 0 pixpack overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 3. " LANE3_FIFO_UNDERFLOW          ,Lane 3 FIFO underflow" "Not interrupt,Interrupt"
eventfld.long 0x14 2. "  LANE2_FIFO_UNDERFLOW          ,Lane 2 FIFO underflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 1. " LANE1_FIFO_UNDERFLOW          ,Lane 1 FIFO underflow" "Not interrupt,Interrupt"
eventfld.long 0x14 0. "  LANE0_FIFO_UNDERFLOW          ,Lane 0 FIFO underflow" "Not interrupt,Interrupt"
line.long 0x18 "NV_PDISP_DP_INT_MASK_0,DP Interrupt Mask"
bitfld.long 0x18 16. " LANE3_FIFO_OVERFLOW_MASK      ,LANE3 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x18 15. "     LANE2_FIFO_OVERFLOW_MASK      ,LANE2 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 14. " LANE1_FIFO_OVERFLOW_MASK      ,LANE1 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x18 13. "     LANE0_FIFO_OVERFLOW_MASK      ,LANE0 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 12. " SPKT_OVERRUN_MASK             ,SPKT overrun mask" "Masked,Not masked"
bitfld.long 0x18 11. "     LANE3_STEER_ERROR_MASK        ,LANE3 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 10. " LANE2_STEER_ERROR_MASK        ,LANE2 steer error mask" "Masked,Not masked"
bitfld.long 0x18 9. "     LANE1_STEER_ERROR_MASK        ,LANE1 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 8. " LANE0_STEER_ERROR_MASK        ,LANE0 steer error mask" "Masked,Not masked"
bitfld.long 0x18 7. "     LANE3_PIXPACK_OVERFLOW_MASK   ,LANE3 pixpack overflow mask" "Masked,Not Masked"
textline "                                                            "
bitfld.long 0x18 6. " LANE2_PIXPACK_OVERFLOW_MASK   ,LANE2 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x18 5. "     LANE1_PIXPACK_OVERFLOW_MASK   ,LANE1 pixpack overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 4. " LANE0_PIXPACK_OVERFLOW_MASK   ,LANE0 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x18 3. "     LANE3_FIFO_UNDERFLOW_MASK     ,LANE3 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 2. " LANE2_FIFO_UNDERFLOW_MASK     ,LANE2 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x18 1. "     LANE1_FIFO_UNDERFLOW_MASK     ,LANE1 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 0. " LANE0_FIFO_UNDERFLOW_MASK     ,LANE0 FIFO underflow mask" "Masked,Not masked"
line.long 0x1C "NV_PDISP_DP_INT_ENABLE_0,DP Interrupt Enable"
bitfld.long 0x1C 16. " LANE3_FIFO_OVERFLOW_ENABLE    ,LANE3 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 15. "       LANE2_FIFO_OVERFLOW_ENABLE    ,LANE2 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 14. " LANE1_FIFO_OVERFLOW_ENABLE    ,LANE1 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 13. "       LANE0_FIFO_OVERFLOW_ENABLE    ,LANE0 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 12. " SPKT_OVERRUN_ENABLE           ,SPKT overrun enable" "Disabled,Enabled"
bitfld.long 0x1C 11. "       LANE3_STEER_ERROR_ENABLE      ,LANE3 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 10. " LANE2_STEER_ERROR_ENABLE      ,LANE2 steer error enable" "Disabled,Enabled"
bitfld.long 0x1C 9. "       LANE1_STEER_ERROR_ENABLE      ,LANE1 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 8. " LANE0_STEER_ERROR_ENABLE      ,LANE0 steer error enable" "Disabled,Enabled"
bitfld.long 0x1C 7. "       LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 6. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 5. "       LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 4. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 3. "       LANE3_FIFO_UNDERFLOW_ENABLE   ,LANE3 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 2. " LANE2_FIFO_UNDERFLOW_ENABLE   ,LANE2 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x1C 1. "       LANE1_FIFO_UNDERFLOW_ENABLE   ,LANE1 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 0. " LANE0_FIFO_UNDERFLOW_ENABLE   ,LANE0 FIFO underflow enable" "Disabled,Enabled"
line.long 0x20 "NV_PDISP_SOR_VPR_POLICY_0,SOR VPR Policy Table Register"
bitfld.long 0x20 3. " ALLOW_DIGITAL_OUT             ,Allow digital output" "Disallow,Allow"
bitfld.long 0x20 2. "       ALLOW_INTERNAL_PANEL          ,Allow internal panel output" "Disallow,Allow"
textline "                                                            "
bitfld.long 0x20 1. " ALLOW_HDCP1X_PROTECTED        , Allow HDCP1.x protected output" "Disallow,Allow"
bitfld.long 0x20 0. "       ALLOW_HDCP22_PROTECTED        ,Allow HDCP2.2 protected output" "Disallow,Allow"
endif
width 0x0B
tree.end
tree "SOR1"
base ad:0x15580000
width 51.
sif (!cpuis("TEGRAX2"))
group.long 0x00++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
rbitfld.long 0x00 28.--31. " NEXT_CHANNEL                  ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 16.--25. 1. "                     NEXT_CLASS                    ,Next requested class"
textline "                                                            "
bitfld.long 0x00 12.--15. " CURR_CHANNEL                  ,Current working channel reset to invalid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "                     AUTO_ACK                      ,Automatically acknowledge any incoming context switch requests" "Manual,Autoack"
textline "                                                            "
hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS                    ,Current working class"
endif
group.long 0x04++0x0F
line.long 0x00 "NV_PDISP_SOR_SUPER_STATE0_0,State Supervisor"
bitfld.long 0x00 0. " UPDATE                        ,Update" "Not updated,Updated"
line.long 0x04 "NV_PDISP_SOR_SUPER_STATE1_0,Triple Buffered Register"
bitfld.long 0x04 3. " ATTACHED                      ,Attached SOR to display head" "No,Yes"
bitfld.long 0x04 2. "                    ASY_ORMODE                    ,SOR sending active data" "Safe,Normal"
textline "                                                            "
bitfld.long 0x04 0.--1. " ASY_HEAD_OPMODE               ,Display sending active pixels to SOR" "Sleep,Snooze,Awake,?..."
line.long 0x08 "NV_PDISP_SOR_STATE0_0,NV PDISP SOR STATE0"
bitfld.long 0x08 0. " UPDATE                        ,Update" "Not updated,Updated"
line.long 0x0C "NV_PDISP_SOR_STATE1_0,SOR Control Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH                ,The pixel depth" "DEFAULTVAL,BPP_16_422,BPP_18_4444,,,BPP_24_444,BPP_30_444,,BPP_36_444,?..."
textline "                                                            "
else
bitfld.long 0x0C 17.--20. " ASY_PIXELDEPTH                ,The pixel depth" "DEFAULTVAL,,BPP_18_4444,,,BPP_24_444,?..."
textline "                                                            "
endif
bitfld.long 0x0C 15.--16. " ASY_REPLICATE                 ,HDMI pixel replication enable/disable" "Off,x2,x4,?..."
textline "                                                            "
bitfld.long 0x0C 14. " ASY_DEPOL                     ,ASY DEPOL" "Positive,Negative"
bitfld.long 0x0C 13. "               ASY_VSYNCPOL                  ,ASY VSYNCPOL" "Positive,Negative"
textline "                                                            "
bitfld.long 0x0C 12. " ASY_HSYNCPOL                  ,ASY HSYNCPOL" "Positive,Negative"
bitfld.long 0x0C 8.--11. "               ASY_PROTOCOL                  ,ASY protocol" "LVDS custom,Single TMDS A,Single TMDS B,,,,,,DP A,DP B,,,,,,Custom"
textline "                                                            "
bitfld.long 0x0C 6.--7. " ASY_CRCMODE                   ,ASY CRCMODE" "Active raster,Complete raster,Non active raster,?..."
bitfld.long 0x0C 4.--5. "      ASY_SUBOWNER                  ,ASY SUBOWNER" "None,SUBHEAD0,SUBHEAD1,Both"
textline "                                                            "
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 0.--3. " ASY_OWNER                     ,SOR display pipe control" "None,HEAD0,HEAD1,HEAD2,?..."
else
bitfld.long 0x0C 0.--3. " ASY_OWNER                     ,SOR display pipe control" "None,HEAD0,HEAD1,?..."
endif
sif (!cpuis("TEGRAX2"))
group.long 0x14++0x2F
line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control 0 Register 0"
bitfld.long 0x00 4.--5. " INTERLACED                    ,Interlaced" "Progressive,Interlaced,?..."
bitfld.long 0x00 3. "            RANGECOMPRESS                 ,Compresses the range of an RGB signal" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE                      ,Dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "                   COLORSPACE                    ,Colorspace" "RGB,YUV_601,YUV_709,?..."
line.long 0x04 "NV_PDISP_HEAD_STATE0_1,Head Control 0 Register 1"
bitfld.long 0x04 4.--5. " INTERLACED                    ,INTERLACED" "Progressive,Interlaced,?..."
bitfld.long 0x04 3. "            RANGECOMPRESS                 ,Compresses the range of an RGB signal" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 2. " DYNRANGE                      ,Dynamic range for the output" "VESA,CEA"
bitfld.long 0x04 0.--1. "                   COLORSPACE                    ,Colorspace" "RGB,YUV_601,YUV_709,?..."
line.long 0x08 "NV_PDISP_HEAD_STATE1_0,Head Control 1 Register 0"
hexmask.long.word 0x08 16.--30. 1. " VTOTAL                        ,Total number of lines in a frame of the raster"
hexmask.long.word 0x08 0.--14. 1. "                   HTOTAL                        ,Total number of pixels in a line of the raster"
line.long 0x0C "NV_PDISP_HEAD_STATE1_1,Head Control 1 Register 1"
hexmask.long.word 0x0C 16.--30. 1. " VTOTAL                        ,Total number of lines in a frame of the raster"
hexmask.long.word 0x0C 0.--14. 1. "                   HTOTAL                        ,Total number of pixels in a line of the raster"
line.long 0x10 "NV_PDISP_HEAD_STATE2_0,Head Control 2 Register 0"
hexmask.long.word 0x10 16.--30. 1. " VSYNC_END                     ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x10 0.--14. 1. "                   HSYNC_END                     ,Total number of pixels after which horizontal sync ends"
line.long 0x14 "NV_PDISP_HEAD_STATE2_1,Head Control 2 Register 1"
hexmask.long.word 0x14 16.--30. 1. " VSYNC_END                     ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x14 0.--14. 1. "                   HSYNC_END                     ,Total number of pixels after which horizontal sync ends"
line.long 0x18 "NV_PDISP_HEAD_STATE3_0,Head Control 3 Register 0"
hexmask.long.word 0x18 16.--30. 1. " VBLANK_END                    ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x18 0.--14. 1. "                   HBLANK_END                    ,Total number of pixels after which horizontal blank ends"
line.long 0x1C "NV_PDISP_HEAD_STATE3_1,Head Control 3 Register 1"
hexmask.long.word 0x1C 16.--30. 1. " VBLANK_END                    ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x1C 0.--14. 1. "                   HBLANK_END                    ,Total number of pixels after which horizontal blank ends"
line.long 0x20 "NV_PDISP_HEAD_STATE4_0,Head Control 4 Register 0"
hexmask.long.word 0x20 16.--30. 1. " VBLANK_START                  ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x20 0.--14. 1. "                   HBLANK_START                  ,Total number of pixels after which horizontal blank starts"
line.long 0x24 "NV_PDISP_HEAD_STATE4_1,Head Control 4 Register 1"
hexmask.long.word 0x24 16.--30. 1. " VBLANK_START                  ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x24 0.--14. 1. "                   HBLANK_START                  ,Total number of pixels after which horizontal blank starts"
line.long 0x28 "NV_PDISP_HEAD_STATE5_0,Head Control 5 Register 0"
hexmask.long.word 0x28 16.--30. 1. " VBLANK_END_2                  ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x28 0.--14. 1. "                   VBLANK_START_2                ,Total number of lines after which vertical blank starts 2"
line.long 0x2C "NV_PDISP_HEAD_STATE5_1,Head Control 5 Register 1"
hexmask.long.word 0x2C 16.--30. 1. " VBLANK_END_2                  ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x2C 0.--14. 1. "                   VBLANK_START_2                ,Total number of lines after which vertical blank starts 2"
endif
group.long 0x44++0x03
line.long 0x00 "NV_PDISP_SOR_CRC_CNTRL_0,CRC Control"
bitfld.long 0x00 0. " ARM_CRC_ENABLE                ,Arm CRC enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
rgroup.long 0x48++0x03
line.long 0x00 "NV_PDISP_SOR_DP_DEBUG_MVID_0,NV_PDISP_SOR_DP_DEBUG_MVID_0"
bitfld.long 0x00 23. " ARM_CRC_ENABLE[23]            ,ARM CRC enable 23" "Disabled,Enabled"
bitfld.long 0x00 22. "               ARM_CRC_ENABLE[22]            ,ARM CRC enable 22" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 21. " ARM_CRC_ENABLE[21]            ,ARM CRC enable 21" "Disabled,Enabled"
bitfld.long 0x00 20. "               ARM_CRC_ENABLE[20]            ,ARM CRC enable 20" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 19. " ARM_CRC_ENABLE[19]            ,ARM CRC enable 19" "Disabled,Enabled"
bitfld.long 0x00 18. "               ARM_CRC_ENABLE[18]            ,ARM CRC enable 18" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 17. " ARM_CRC_ENABLE[17]            ,ARM CRC enable 17" "Disabled,Enabled"
bitfld.long 0x00 16. "               ARM_CRC_ENABLE[16]            ,ARM CRC enable 16" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 15. " ARM_CRC_ENABLE[15]            ,ARM CRC enable 15" "Disabled,Enabled"
bitfld.long 0x00 14. "               ARM_CRC_ENABLE[14]            ,ARM CRC enable 14" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 13. " ARM_CRC_ENABLE[13]            ,ARM CRC enable 13" "Disabled,Enabled"
bitfld.long 0x00 12. "               ARM_CRC_ENABLE[12]            ,ARM CRC enable 12" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 11. " ARM_CRC_ENABLE[11]            ,ARM CRC enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "               ARM_CRC_ENABLE[10]            ,ARM CRC enable 10" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 9. " ARM_CRC_ENABLE[9]             ,ARM CRC enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "               ARM_CRC_ENABLE[8]             ,ARM CRC enable 8" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 7. " ARM_CRC_ENABLE[7]             ,ARM CRC enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "               ARM_CRC_ENABLE[6]             ,ARM CRC enable 6" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 5. " ARM_CRC_ENABLE[5]             ,ARM CRC enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "               ARM_CRC_ENABLE[4]             ,ARM CRC enable 4" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 3. " ARM_CRC_ENABLE[3]             ,ARM CRC enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "               ARM_CRC_ENABLE[2]             ,ARM CRC enable 2" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 1. " ARM_CRC_ENABLE[1]             ,ARM CRC enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "               ARM_CRC_ENABLE[0]             ,ARM CRC enable 0" "Disabled,Enabled"
endif
group.long 0x4C++0x03
line.long 0x00 "NV_PDISP_SOR_CLK_CNTRL_0,NV PDISP SOR Clock CNTRL 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 2.--6. " DP_LINK_SPEED                 ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,,G8_1,?..."
else
bitfld.long 0x00 2.--6. " DP_LINK_SPEED                 ,Selects the multiplier used by the analog macro PLL" ",,,,,,G1_62,LVDS,G2_16,G2_43,G2_7,,G3_24,,,,G4_32,,,,G5_4,,,,,,,,,G8_1,?..."
endif
bitfld.long 0x00 0.--1. "                  DP_CLK_SEL                    ,Selects which clock is used for the internal logic" "Single PCLK,DIFF PCLK,Single DPCLK,DIFF DPCLK"
rgroup.long 0x50++0x03
line.long 0x00 "NV_PDISP_SOR_CAP_0,Serial Output Resource"
bitfld.long 0x00 31. " LVDS_ONLY                     ,LVDS only" "False,True"
bitfld.long 0x00 25. "                  DP_B                          ,DP B" "False,True"
textline "                                                            "
bitfld.long 0x00 24. " DP_A                          ,DP A" "False,True"
bitfld.long 0x00 20. "                  DDI                           ,DDI" "False,True"
textline "                                                            "
bitfld.long 0x00 16. " SDI                           ,SDI" "False,True"
bitfld.long 0x00 13. "                  DISPLAY_OVER_PCIE             ,Display over PCIE" "False,True"
textline "                                                            "
bitfld.long 0x00 12. " SINGLE_TMDS_225_MHZ           ,Single TMDS 225 MHZ" "False,True"
bitfld.long 0x00 11. "                  DUAL_TMDS                     ,Dual TMDS" "False,True"
textline "                                                            "
bitfld.long 0x00 10. " DUAL_SINGLE_TMDS              ,Dual single TMDS" "False,True"
bitfld.long 0x00 9. "                  SINGLE_TMDS_B                 ,Single TMDS B" "False,True"
textline "                                                            "
bitfld.long 0x00 8. " SINGLE_TMDS_A                 ,Single TMDS A" "False,True"
bitfld.long 0x00 3. "                  DUAL_LVDS_24                  ,Dual LVDS 24" "False,True"
textline "                                                            "
bitfld.long 0x00 2. " DUAL_LVDS_18                  ,Dual LVDS 18" "False,True"
bitfld.long 0x00 1. "                  SINGLE_LVDS 24                ,Single LVDS 24" "False,True"
textline "                                                            "
bitfld.long 0x00 0. " SINGLE_LVDS_18                ,Single LVDS 18" "False,True"
group.long 0x54++0x03
line.long 0x00 "NV_PDISP_SOR_PWR_0,Power State Of The SOR"
eventfld.long 0x00 31. " SETTING_NEW                   ,New setting of power mode to take effect" "Done,Pending"
rbitfld.long 0x00 28. "                MODE                          ,Currently active state" "Normal,Safe"
textline "                                                            "
rbitfld.long 0x00 24. " HALT_DELAY                    ,Halt delay" "Done,Active"
bitfld.long 0x00 17. "                 SAFE_START                    ,Safe start" "Normal,Alt"
textline "                                                            "
bitfld.long 0x00 16. " SAFE_STATE                    ,Safe operating state" "PD,PU"
bitfld.long 0x00 1. "                     NORMAL_START                  ,Normal start" "Normal,Alt"
textline "                                                            "
bitfld.long 0x00 0. " NORMAL_STATE                  ,Sets the normal operating state" "PD,PU"
sif (!cpuis("TEGRAX2"))
group.long 0x5C++0x0F
line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP_SOR_PLL0_0"
bitfld.long 0x00 24.--27. " ICHPMP                        ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA"
textline "                                                            "
bitfld.long 0x00 19. " FILTER[3]                     ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO"
bitfld.long 0x00 16.--18. "       FILTER[2:0]                   ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7"
textline "                                                            "
bitfld.long 0x00 12.--13. " TXREG_LEVEL                   ,TXREG level" "V25,V15,V35,V45"
bitfld.long 0x00 8.--11. "                    VCOCAP                        ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 6.--7. " PLLREG_LEVEL                  ,PLLREG level" "V25,V15,V35,V45"
bitfld.long 0x00 5. "                    PULLDOWN                      ,Weak pull-down enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " VCOPD                         ,VCOPD" "Rescind,Assert"
bitfld.long 0x00 0. "                PWR                           ,Power" "On,Off"
line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1"
bitfld.long 0x04 29. " COHERENTMODE                  ,Coherent mode" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "               LOADADJ                       ,Load pulse position adjust" "Center,?..."
textline "                                                            "
rbitfld.long 0x04 15. " TERM_COMPOUT                  ,Termination calibration status" "Low,High"
bitfld.long 0x04 9.--12. "                   TMDS_TERMADJ                  ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest"
textline "                                                            "
bitfld.long 0x04 8. " TMDS_TERM                     ,Termination enable" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "               IOCURRENT                     ,Used for I/O control" "RST,?..."
line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2"
bitfld.long 0x08 28.--31. " PLL_MDIV                      ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 26.--27. "                     CLKGEN_MODE                   ,CLKGEN mode" ",DP TMDS,HBR3,MPHY"
textline "                                                            "
bitfld.long 0x08 25. " AUX9                          ,AUX9 - LVDSEN" "Allow,Override"
bitfld.long 0x08 24. "               AUX8                          ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 23. " AUX7                          ,AUX7 - port powerdown" "Disabled,Enabled"
bitfld.long 0x08 22. "               AUX6                          ,AUX6 - bandgap powerdown" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 21. " AUX5                          ,AUX5 - link LVDS" "Single,Dual"
bitfld.long 0x08 20. "                 AUX4                          ,AUX4 - duplicate control" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " AUX3                          ,AUX3 - rotate" "Disabled,Enabled"
bitfld.long 0x08 18. "               AUX2                          ,AUX2 - powerdown" "Override,Allow"
textline "                                                            "
bitfld.long 0x08 17. " AUX1                          ,AUX1 - sequencer PLLCAPPD" "Allow,Override"
bitfld.long 0x08 16. "               AUX0                          ,AUX0 - sequencer PLL pulldown" "Allow,Override"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV                      ,PLL NDIV"
bitfld.long 0x08 4.--7. "                     PLL_PDIV                      ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..."
textline "                                                            "
bitfld.long 0x08 2.--3. " PLL_PDIV_MODE                 ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..."
bitfld.long 0x08 1. "         DIV_RATIO_OVERRIDE            ,DIV ratio override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " DCIR_PLL_RESET                ,DCIR PLL reset" "Override,Allow"
line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro"
bitfld.long 0x0C 28.--31. " BG_TEMP_COEF                  ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--27. "                     BG_VREF_LEVEL                 ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V"
textline "                                                            "
hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN                ,Test REFCLK EN"
bitfld.long 0x0C 14. "                     PLL_BYPASS                    ,PLL bypass" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 13. " PLLVDD_MODE                   ,Field to determine the PLL voltage" "1.8 V,3.3 V"
bitfld.long 0x0C 12. "                  CLKDIST_MODE                  ,Clock distribution by CMOS/CML buffers" "CMOS,CML"
textline "                                                            "
bitfld.long 0x0C 8.--11. " AVDD10_LEVEL                  ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..."
bitfld.long 0x0C 4.--7. "                 AVDD14_LEVEL                  ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..."
textline "                                                            "
bitfld.long 0x0C 0.--1. " KICKSTART                     ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60"
endif
group.long 0x6C++0x03
line.long 0x00 "NV_PDISP_SOR_CSTM_0,Select A Number Of Operating Modes For The SOR"
bitfld.long 0x00 28.--30. " ROTDAT                        ,Right rotated color channel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "                      ROTCLK                        ,Number of sclk cycles which the output clock " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 21. " PLLDIV                        ,Controls the internal clock dividers of the TMDS_MACRO" ",By 10"
bitfld.long 0x00 19. "                  BALANCED                      ,Balanced" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 18. " NEW_MODE                      ,None of the control bits of the second link for dual-link mode" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 16. " LVDS_EN                       ,Output driver configuration for encoding of the data and output common mode control" "TMDS,?..."
bitfld.long 0x00 15. "                   LINKACTB                      ,Enables digital logic of links B" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 14. " LINKACTA                      ,Enables digital logic of links A" "Disabled,Enabled"
bitfld.long 0x00 12.--13. "               MODE                          ,Controls the digital output encoding applied to the data stream in custom mode" ",TMDS,?..."
textline "                                                            "
bitfld.long 0x00 11. " UPPER                         ,LVDS bank A is the upper" "False,True"
bitfld.long 0x00 9. "                  PD_TXCB                       ,Power down the clock pin of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 8. " PD_TXCA                       ,Power down the clock pin of link A" "Enabled,Disabled"
bitfld.long 0x00 7. "               PD_TXDB_3                     ,Bitwise control to power down the data pin 3 of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 6. " PD_TXDB_2                     ,Bitwise control to power down the data pin 2 of link B" "Enabled,Disabled"
bitfld.long 0x00 5. "               PD_TXDB_1                     ,Bitwise control to power down the data pin 1 of link B" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 4. " PD_TXDB_0                     ,Bitwise control to power down the data pin 0 of link B" "Enabled,Disabled"
bitfld.long 0x00 3. "               PD_TXDA_3                     ,Bitwise control to power down the data pin 3 of link A" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXDA_2                     ,Bitwise control to power down the data pin 2 of link A" "Enabled,Disabled"
bitfld.long 0x00 1. "               PD_TXDA_1                     ,Bitwise control to power down the data pin 1 of link A" "Enabled,Disabled"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXDA_0                     ,Bitwise control to power down the data pin 0 of link A" "Enabled,Disabled"
group.long 0x7C++0x0B
line.long 0x00 "NV_PDISP_SOR_BLANK_0,Override The SOR Output Resource Pixels With Blank Data"
rbitfld.long 0x00 2. " STATUS                        ,Output resource is sending blank pixels forced by the OVERRIDE bit" "Not blanked,Blanked"
bitfld.long 0x00 1. "            TRANSITION                    ,Controls the timing of the output resource blank override" "Immediate,Next VSYNC"
textline "                                                            "
bitfld.long 0x00 0. " OVERRIDE                      ,Override" "False,True"
line.long 0x04 "NV_PDISP_SOR_SEQ_CTL_0,Sequencer Control Register For SOR"
bitfld.long 0x04 30. " SWITCH                        ,Switch" "Wait,Force"
rbitfld.long 0x04 28. "                  STATUS                        ,Sequencer stopped/running" "Stopped,Running"
textline "                                                            "
rbitfld.long 0x04 16.--19. " PC                            ,The current value of the program counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "                     PD_PC_ALT                     ,The alternate entry point into the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 8.--11. " PD_PC                         ,The program counter for the start of the power down program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                     PU_PC_ALT                     ,The alternate entry point into the power up program sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
rbitfld.long 0x04 0.--3. " PU_PC                         ,The program counter for the start of the power up program sequence" "0,?..."
line.long 0x08 "NV_PDISP_SOR_LANE_SEQ_CTL_0,Sequencer Control Register For SOR Lane"
bitfld.long 0x08 31. " SETTING_NEW                   ,Run sequencer outside of the normal SOR sequencer operation" "Done,Pending"
rbitfld.long 0x08 28. "                SEQ_STATE                     ,Sequencer state" "Idle,Busy"
textline "                                                            "
bitfld.long 0x08 20. " SEQUENCE                      ,Controls the direction of the power up/power down sequence" "Up,Down"
bitfld.long 0x08 16. "                   NEW_POWER_STATE               ,Controls whether the lanes should be powered up/powered down" "PU,PD"
textline "                                                            "
bitfld.long 0x08 12.--15. " DELAY                         ,Number of microseconds to delay between each lanes' power state change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x08 9. "                     LANE9_STATE                   ,LANE9 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 8. " LANE8_STATE                   ,LANE8 state" "Power up,Power down"
rbitfld.long 0x08 7. "             LANE7_STATE                   ,LANE7 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 6. " LANE6_STATE                   ,LANE6 state" "Power up,Power down"
rbitfld.long 0x08 5. "             LANE5_STATE                   ,LANE5 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 4. " LANE4_STATE                   ,LANE4 state" "Power up,Power down"
rbitfld.long 0x08 3. "             LANE3_STATE                   ,LANE3 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 2. " LANE2_STATE                   ,LANE2 state" "Power up,Power down"
rbitfld.long 0x08 1. "             LANE1_STATE                   ,LANE1 state" "Power up,Power down"
textline "                                                            "
rbitfld.long 0x08 0. " LANE0_STATE                   ,LANE0 state" "Power up,Power down"
group.long 0x88++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST0_0,Preload The Power-Up And Power-Down Sequence 0"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x8C++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST1_0,Preload The Power-Up And Power-Down Sequence 1"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x90++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST2_0,Preload The Power-Up And Power-Down Sequence 2"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x94++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST3_0,Preload The Power-Up And Power-Down Sequence 3"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x98++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST4_0,Preload The Power-Up And Power-Down Sequence 4"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0x9C++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST5_0,Preload The Power-Up And Power-Down Sequence 5"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST6_0,Preload The Power-Up And Power-Down Sequence 6"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST7_0,Preload The Power-Up And Power-Down Sequence 7"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xA8++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST8_0,Preload The Power-Up And Power-Down Sequence 8"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xAC++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INST9_0,Preload The Power-Up And Power-Down Sequence 9"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTA_0,Preload The Power-Up And Power-Down Sequence A"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTB_0,Preload The Power-Up And Power-Down Sequence B"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xB8++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTC_0,Preload The Power-Up And Power-Down Sequence C"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xBC++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTD_0,Preload The Power-Up And Power-Down Sequence D"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC0++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTE_0,Preload The Power-Up And Power-Down Sequence E"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC4++0x03
line.long 0x00 "NV_PDISP_SOR_SEQ_INSTF_0,Preload The Power-Up And Power-Down Sequence F"
bitfld.long 0x00 31. " PLL_PULLDOWN                  ,Weak pulldown enable" "Disabled,Enabled"
bitfld.long 0x00 30. "               POWERDOWN_MACRO               ,Override LINKACTA LINKACTB and force TMDS macro to powerdown state" "Normal,Powerdown"
textline "                                                            "
bitfld.long 0x00 29. " ASSERT_PLL_RESET              ,Assert reset to the PLL" "Normal,RST"
bitfld.long 0x00 28. "                 BLANK_V                       ,Override the VSYNC signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 27. " BLANK_H                       ,Override the HSYNC signal from the RG" "Normal,Inactive"
bitfld.long 0x00 26. "               BLANK_DE                      ,Override the DE signal from the RG" "Normal,Inactive"
textline "                                                            "
bitfld.long 0x00 25. " BLACK_DATA                    ,Override the pixel bus from the RG and replace the pixels with black" "Normal,Black"
bitfld.long 0x00 24. "                 TRISTATE_IOS                  ,Coerce all output pins to tristate" "Enabled,Tristate"
textline "                                                            "
bitfld.long 0x00 23. " DRIVE_PWM_OUT_LO              ,Drive the PWM circuit output LO" "False,True"
bitfld.long 0x00 22. "                  PIN_B                         ,State to drive the external pin to" "Low,High"
textline "                                                            "
bitfld.long 0x00 21. " PIN_A                         ,State to drive the external pin to" "Low,High"
bitfld.long 0x00 19. "                   SEQUENCE                      ,Controls the direction of the lane power up/power down sequence" "Up,Down"
textline "                                                            "
bitfld.long 0x00 18. " LANE_SEQ                      ,Sequencer will kick off the Lane Sequencer" "Stopped,Run"
bitfld.long 0x00 17. "                PDPORT                        ,Asserts the PDPORT port on the SOR analog macro" "No,Yes"
textline "                                                            "
bitfld.long 0x00 16. " PDPLL                         ,Asserts the PDPLL port on the analog macro powering down the PLL" "No,Yes"
bitfld.long 0x00 15. "                    HALT                          ,Halt" "False,True"
textline "                                                            "
bitfld.long 0x00 12.--13. " WAIT_UNITS                    ,Wait delay mode" "US,MS,VSYNC,?..."
hexmask.long.word 0x00 0.--9. 1. "                  WAIT_TIME                     ,Amount of time to wait "
group.long 0xC8++0x07
line.long 0x00 "NV_PDISP_SOR_PWM_DIV_0,PWM Divide"
hexmask.long.tbyte 0x00 0.--23. 1. " DIVIDE                        ,Defines the period of the PWM output"
line.long 0x04 "NV_PDISP_SOR_PWM_CTL_0,Controls The Optional PWM Function"
bitfld.long 0x04 31. " SETTING_NEW                   ,Setting new" "Done,Pending"
bitfld.long 0x04 30. "                CLKSEL                        ,Clock select" "PCLK,XTAL"
textline "                                                            "
hexmask.long.tbyte 0x04 0.--23. 1. " DUTY_CYCLE                    ,Duty cycle of PWM output"
group.long 0x128++0x47
line.long 0x00 "NV_PDISP_SOR_XBAR_CTRL_0,Controls The XBAR Between The SOR And The TMDS Analog Macro"
bitfld.long 0x00 29.--31. " LINK1_XSEL_4                  ,Link1 XSEL 4" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 26.--28. "                   LINK1_XSEL_3                  ,Link1 XSEL 3" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 23.--25. " LINK1_XSEL_2                  ,Link1 XSEL 2" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 20.--22. "                   LINK1_XSEL_1                  ,Link1 XSEL 1" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 17.--19. " LINK1_XSEL_0                  ,Link1 XSEL 0" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 14.--16. "                   LINK0_XSEL_4                  ,Link0 XSEL 4" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 11.--13. " LINK0_XSEL_3                  ,Link0 XSEL 3" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 8.--10. "                   LINK0_XSEL_2                  ,Link0 XSEL 2" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 5.--7. " LINK0_XSEL_1                  ,Link0 XSEL 1" "0,1,2,3,4,5,6,ZERO"
bitfld.long 0x00 2.--4. "                   LINK0_XSEL_0                  ,Link0 XSEL 0" "0,1,2,3,4,5,6,ZERO"
textline "                                                            "
bitfld.long 0x00 1. " LINK_SWAP                     ,Link swap" "Not swapped,Swapped"
bitfld.long 0x00 0. "            BYPASS                        ,Bypass XBAR" "Not bypassed,Bypassed"
line.long 0x04 "NV_PDISP_SOR_XBAR_POL_0,Polarity Of The Channels Control"
bitfld.long 0x04 9. " POL_LINK1_4                   ,POL Link1 4" "Normal,Inverted"
bitfld.long 0x04 8. "               POL_LINK1_3                   ,POL Link1 3" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 7. " POL_LINK1_2                   ,POL Link1 2" "Normal,Inverted"
bitfld.long 0x04 6. "               POL_LINK1_1                   ,POL Link1 1" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 5. " POL_LINK1_0                   ,POL Link1 0" "Normal,Inverted"
bitfld.long 0x04 4. "               POL_LINK0_4                   ,POL Link0 4" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 3. " POL_LINK0_3                   ,POL Link0 3" "Normal,Inverted"
bitfld.long 0x04 2. "               POL_LINK0_2                   ,POL Link0 2" "Normal,Inverted"
textline "                                                            "
bitfld.long 0x04 1. " POL_LINK0_1                   ,POL Link0 1" "Normal,Inverted"
bitfld.long 0x04 0. "               POL_LINK0_0                   ,POL Link0 0" "Normal,Inverted"
line.long 0x08 "NV_PDISP_SOR_DP_LINKCTL0_0,Select Index The SOR"
bitfld.long 0x08 31. " FORCE_IDLEPTTRN               ,Force idle pattern" "No,Yes"
bitfld.long 0x08 28. "                    COMPLIANCEPTTRN               ,Compliance test pattern" "No pattern,Color square"
textline "                                                            "
bitfld.long 0x08 16.--20. " LANECOUNT                     ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..."
bitfld.long 0x08 14. "                      ENHANCEDFRAME                 ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 10. " SYNCMODE                      ,Link clock and pixel clock are synchronous" "Disabled,Enabled"
hexmask.long.byte 0x08 2.--8. 1. "               TUSIZE                        ,Transfer unit size"
textline "                                                            "
bitfld.long 0x08 0. " ENABLE                        ,The current DP port" "Disabled,Enabled"
line.long 0x0C "NV_PDISP_SOR_DP_LINKCTL1_0,Select Index Port Within The SOR"
bitfld.long 0x0C 31. " FORCE_IDLEPTTRN               ,Force idle pattern" "No,Yes"
bitfld.long 0x0C 28. "                    COMPLIANCEPTTRN               ,Compliance test pattern" "No pattern,Color square"
textline "                                                            "
bitfld.long 0x0C 16.--20. " LANECOUNT                     ,Controls the lane configuration of the DP datapath" "0,1,,2,,,,,,,,,,,,4,?..."
bitfld.long 0x0C 14. "                      ENHANCEDFRAME                 ,Enhanced framing symbol sequence for BS/SR/CPBS/CPSR" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 10. " SYNCMODE                      ,Link clock and pixel clock are synchronous" "Disabled,Enabled"
hexmask.long.byte 0x0C 2.--8. 1. "               TUSIZE                        ,Transfer unit size"
textline "                                                            "
bitfld.long 0x0C 0. " ENABLE                        ,The current DP port" "Disabled,Enabled"
line.long 0x10 "NV_PDISP_SOR_LANE_DRIVE_CURRENT0_0,SOR Lane Drive Current 0"
hexmask.long.byte 0x10 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x10 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x10 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x10 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x14 "NV_PDISP_SOR_LANE_DRIVE_CURRENT1_0,SOR Lane Drive Current 1"
hexmask.long.byte 0x14 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x14 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x14 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x18 "NV_PDISP_SOR_LANE4_DRIVE_CURRENT0_0,SOR Lane 4 Drive Current 0"
hexmask.long.byte 0x18 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x1C "NV_PDISP_SOR_LANE4_DRIVE_CURRENT1_0,SOR Lane 4 Drive Current 1"
hexmask.long.byte 0x1C 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x20 "NV_PDISP_SOR_LANE_PREEMPHASIS0_0,SOR Lane Pre-Emphasis 0"
hexmask.long.byte 0x20 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x20 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x20 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x20 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x24 "NV_PDISP_SOR_LANE_PREEMPHASIS1_0,SOR Lane Pre-Emphasis 1"
hexmask.long.byte 0x24 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x24 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x24 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x28 "NV_PDISP_SOR_LANE4_PREEMPHASIS0_0,SOR Lane 4 Pre-Emphasis 0"
hexmask.long.byte 0x28 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x2C "NV_PDISP_SOR_LANE4_PREEMPHASIS1_0,SOR Lane 4 Pre-Emphasis 1"
hexmask.long.byte 0x2C 0.--7. 1. " LANE4                         ,LANE4 controls the fifth lane"
line.long 0x30 "NV_PDISP_SOR_POSTCURSOR0_0,SOR Lane Post-Cursor 0"
hexmask.long.byte 0x30 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x30 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x30 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x34 "NV_PDISP_SOR_POSTCURSOR1_0,SOR Lane Post-Cursor 1"
hexmask.long.byte 0x34 24.--31. 1. " LANE3_DP_LANE3                ,Lane 3 DP lane 3"
hexmask.long.byte 0x34 16.--23. 1. "                     LANE2_DP_LANE0                ,Lane 2 DP lane 0"
textline "                                                            "
hexmask.long.byte 0x34 8.--15. 1. " LANE1_DP_LANE1                ,Lane 1 DP lane 1"
hexmask.long.byte 0x34 0.--7. 1. "                     LANE0_DP_LANE2                ,Lane 0 DP lane 2"
line.long 0x38 "NV_PDISP_SOR_DP_CONFIG0_0,SOR DP Config 0"
bitfld.long 0x38 31. " RD_RESET_VAL                  ,Internal running disparity" "Negative,Positive"
bitfld.long 0x38 28. "               IDLE_BEFORE_ATTACH            ,Idle before attach" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x38 26. " ACTIVESYM_CNTL                ,ACTIVESYM CNTL" "Disabled,Enabled"
bitfld.long 0x38 24. "               ACTIVESYM_POLARITY            ,ACTIVESYM polarity" "Negative,Positive"
textline "                                                            "
bitfld.long 0x38 16.--19. " ACTIVESYM_FRAC                ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x38 8.--14. 1. "                     ACTIVESYM_COUNT               ,Number of symbols sent out every transfer irrespective of the TU count"
textline "                                                            "
bitfld.long 0x38 0.--5. " WATERMARK                     ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x3C "NV_PDISP_SOR_DP_CONFIG1_0,SOR DP Config 1"
bitfld.long 0x3C 31. " RD_RESET_VAL                  ,Internal running disparity" "Negative,Positive"
bitfld.long 0x3C 28. "               IDLE_BEFORE_ATTACH            ,Idle before attach" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x3C 26. " ACTIVESYM_CNTL                ,ACTIVESYM CNTL" "Disabled,Enabled"
bitfld.long 0x3C 24. "               ACTIVESYM_POLARITY            ,ACTIVESYM polarity" "Negative,Positive"
textline "                                                            "
bitfld.long 0x3C 16.--19. " ACTIVESYM_FRAC                ,Active fraction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x3C 8.--14. 1. "                     ACTIVESYM_COUNT               ,Number of symbols sent out every transfer irrespective of the TU count"
textline "                                                            "
bitfld.long 0x3C 0.--5. " WATERMARK                     ,Defines the number of symbols that the DP logic will wait for at the beginning of a line before ending blanking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x40 "NV_PDISP_SOR_DP_MN0_0,SOR DP MN 0"
bitfld.long 0x40 30.--31. " M_MOD                         ,M_DELTA field not used/added/subtracted the M value" "None,INC,DEC,?..."
bitfld.long 0x40 24.--27. "                   M_DELTA                       ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
hexmask.long.tbyte 0x40 0.--23. 1. " N_VAL                         ,The value that will be used for calculating M"
line.long 0x44 "NV_PDISP_SOR_DP_MN1_0,SOR DP MN 1"
bitfld.long 0x44 30.--31. " M_MOD                         ,Describes how the M_DELTA field should be applied to the M value" "NONE,INC,DEC,?..."
bitfld.long 0x44 24.--27. "                   M_DELTA                       ,Defines an offset that will be used to modify the calculated M value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
hexmask.long.tbyte 0x44 0.--23. 1. " N_VAL                         ,The value that will be used for calculating M"
sif (!cpuis("TEGRAX2"))
if (((per.l(ad:0x15580000+0x130))&0x01)==0x01)
group.long 0x170++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x170++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
if (((per.l(ad:0x15580000+0x134))&0x01)==0x01)
group.long 0x174++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x174++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
endif
group.long 0x180++0x47
line.long 0x00 "NV_PDISP_SOR_DP_SPARE0_0,NV PDISP SOR DP Spare"
bitfld.long 0x00 31. " SOR_PSR_DIABLE_CYA            ,SOR PSR disable CYA" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                                            "
bitfld.long 0x00 30. " SOR_MSA_SOURCE_SEL            ,Allows software to choose whether SOR uses MSA data" "SOR,RG"
hexmask.long.word 0x00 14.--29. 1. "                    REG                           ,REG"
textline "                                                            "
bitfld.long 0x00 12.--13. " DEBUG_MODE                    ,Controls the mapping of DEBUG_OUT" "0,1,2,3"
hexmask.long.byte 0x00 4.--11. 1. "                      DEBUG_OUT                     ,Spare output bits for debug"
else
textline "                                                            "
hexmask.long 0x00 4.--30. 1. " REG                           ,REG"
endif
textline "                                                            "
bitfld.long 0x00 3. " DISP_VIDEO_PREAMBLE_CYA       ,Selects between video preamble from display versus the locally generated video preamble signal" "Disabled,Enabled"
bitfld.long 0x00 2. "               SOR_CLK_SEL                   ,Safe/macro clock as the SOR clock" "Safe,Macro"
textline "                                                            "
bitfld.long 0x00 1. " PANEL                         ,DP panel is external/internal" "External,Internal"
bitfld.long 0x00 0. "               SEQ_ENABLE                    ,Enables the sequencer in DP mode" "No,Yes"
line.long 0x04 "NV_PDISP_SOR_DP_SPARE1_0,NV_PDISP_SOR_DP_SPARE"
sif (cpuis("TEGRAX2"))
hexmask.long 0x04 4.--31. 1. " REG                           ,Reg"
bitfld.long 0x04 3. "               SOR_CLK_OVR_ON                ,SOR override for SLCG" "False,True"
else
hexmask.long 0x04 3.--31. 1. " REG                           ,Reg"
endif
textline "                                                            "
bitfld.long 0x04 2. " SOR_CLK_SEL                   ,Safe/macro clock as the SOR clock" "Safe,Macro"
textline "                                                            "
bitfld.long 0x04 1. " PANEL                         ,DP panel is external/internal" "External,Internal"
bitfld.long 0x04 0. "               SEQ_ENABLE                    ,Enables the sequencer in DP mode" "No,Yes"
line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_CTRL_0,SOR DP Audio Control"
eventfld.long 0x08 31. " NEW_SETTINGS                  ,New settings" "Done,Pending"
rbitfld.long 0x08 21. "                MUTE_STATUS                   ,Mute status" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 20. " CA_SELECT                     ,Channel/speaker allocation select" "SW,HW"
bitfld.long 0x08 19. "                     SS_SELECT                     ,Sample size select" "SW,HW"
textline "                                                            "
bitfld.long 0x08 18. " SF_SELECT                     ,Sampling frequency select" "SW,HW"
bitfld.long 0x08 17. "                     CC_SELECT                     ,Channel count select" "SW,HW"
textline "                                                            "
bitfld.long 0x08 16. " CT_SELECT                     ,Coding type select" "SW,HW"
hexmask.long.byte 0x08 8.--15. 1. "                     PACKET_ID                     ,Packet ID"
textline "                                                            "
bitfld.long 0x08 7. " GENERIC_INFOFRAME_ENABLE      ,Allows software to send infoframes (AVI etc.) other than audio infoframe" "No,Yes"
bitfld.long 0x08 6. "                    INFOFRAME_HEADER_OVERRIDE     ,Lets the values in AUDIO_INFOFRAME_HEADER override the default values" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 2.--3. " MUTE                          ,Controls the AudioMute_Flag in the VB-ID" "Auto,Disabled,Enabled,?..."
bitfld.long 0x08 0. "               ENABLE                        ,Enables field for Audio over DisplayPort" "No,Yes"
line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_HBLANK_SYMBOLS_0,SOR DP Audio HBlank Symbols"
hexmask.long.tbyte 0x0C 0.--16. 1. " VALUE                         ,Value"
line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_VBLANK_SYMBOLS_0,SOR DP Audio VBlank Symbols"
hexmask.long.tbyte 0x10 0.--20. 1. " VALUE                         ,Value"
line.long 0x14 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_HEADER_0,SOR DP Generic Infoframe Header"
hexmask.long.byte 0x14 24.--31. 1. " HB3                           ,HB3"
hexmask.long.byte 0x14 16.--23. 1. "                     HB2                           ,HB2"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " HB1                           ,HB1"
hexmask.long.byte 0x14 0.--7. 1. "                     HB0                           ,HB0"
line.long 0x18 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK0_0,SOR DP Generic Infoframe Subpack0"
hexmask.long.byte 0x18 24.--31. 1. " DB3                           ,DB3"
hexmask.long.byte 0x18 16.--23. 1. "                     DB2                           ,DB2"
textline "                                                            "
hexmask.long.byte 0x18 8.--15. 1. " DB1                           ,DB1"
hexmask.long.byte 0x18 0.--7. 1. "                     DB0                           ,DB0"
line.long 0x1C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK1_0,SOR DP Generic Infoframe Subpack1"
hexmask.long.byte 0x1C 24.--31. 1. " DB7                           ,DB7"
hexmask.long.byte 0x1C 16.--23. 1. "                     DB6                           ,DB6"
textline "                                                            "
hexmask.long.byte 0x1C 8.--15. 1. " DB5                           ,DB5"
hexmask.long.byte 0x1C 0.--7. 1. "                     DB4                           ,DB4"
line.long 0x20 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK2_0,SOR DP Generic Infoframe Subpack2"
hexmask.long.byte 0x20 24.--31. 1. " DB11                          ,DB11"
hexmask.long.byte 0x20 16.--23. 1. "                     DB10                          ,DB10"
textline "                                                            "
hexmask.long.byte 0x20 8.--15. 1. " DB9                           ,DB9"
hexmask.long.byte 0x20 0.--7. 1. "                     DB8                           ,DB8"
line.long 0x24 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK3_0,SOR DP Generic Infoframe Subpack3"
hexmask.long.byte 0x24 24.--31. 1. " DB15                          ,DB15"
hexmask.long.byte 0x24 16.--23. 1. "                     DB14                          ,DB14"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " DB13                          ,DB13"
hexmask.long.byte 0x24 0.--7. 1. "                     DB12                          ,DB12"
line.long 0x28 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK4_0,SOR DP Generic Infoframe Subpack4"
hexmask.long.byte 0x28 24.--31. 1. " DB19                          ,DB19"
hexmask.long.byte 0x28 16.--23. 1. "                     DB18                          ,DB18"
textline "                                                            "
hexmask.long.byte 0x28 8.--15. 1. " DB17                          ,DB17"
hexmask.long.byte 0x28 0.--7. 1. "                     DB16                          ,DB16"
line.long 0x2C "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK5_0,SOR DP Generic Infoframe Subpack5"
hexmask.long.byte 0x2C 24.--31. 1. " DB23                          ,DB23"
hexmask.long.byte 0x2C 16.--23. 1. "                     DB22                          ,DB22"
textline "                                                            "
hexmask.long.byte 0x2C 8.--15. 1. " DB21                          ,DB21"
hexmask.long.byte 0x2C 0.--7. 1. "                     DB20                          ,DB20"
line.long 0x30 "NV_PDISP_SOR_DP_GENERIC_INFOFRAME_SUBPACK6_0,SOR DP Generic Infoframe Subpack6"
hexmask.long.byte 0x30 24.--31. 1. " DB27                          ,DB27"
hexmask.long.byte 0x30 16.--23. 1. "                     DB26                          ,DB26"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " DB25                          ,DB25"
hexmask.long.byte 0x30 0.--7. 1. "                     DB24                          ,DB24"
line.long 0x34 "NV_PDISP_SOR_DP_TPG_0,Controls The Training Patterns Needed During Link Training"
bitfld.long 0x34 30. " LANE3_CHANNELCODING           ,Lane 3 - supports the main link channel coding" "Disabled,Enabled"
bitfld.long 0x34 28.--29. "               LANE3_SCRAMBLEREN             ,Lane 3 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
textline "                                                            "
bitfld.long 0x34 24.--27. " LANE3_PATTERN                 ,Lane 3 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
bitfld.long 0x34 22. "        LANE2_CHANNELCODING           ,Lane 2 - supports the main link channel coding" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x34 20.--21. " LANE2_SCRAMBLEREN             ,Lane 2 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
bitfld.long 0x34 16.--19. "         LANE2_PATTERN                 ,Lane 2 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
textline "                                                            "
bitfld.long 0x34 14. " LANE1_CHANNELCODING           ,Lane 1 - supports the main link channel coding" "Disabled,Enabled"
bitfld.long 0x34 12.--13. "               LANE1_SCRAMBLEREN             ,Lane 1 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
textline "                                                            "
bitfld.long 0x34 8.--11. " LANE1_PATTERN                 ,Lane 1 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
bitfld.long 0x34 6. "        LANE0_CHANNELCODING           ,Lane 0 - supports the main link channel coding" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x34 4.--5. " LANE0_SCRAMBLEREN             ,Lane 0 - scrambles data symbols before transmission" "Disabled,Enabled Galios,?..."
bitfld.long 0x34 0.--3. "         LANE0_PATTERN                 ,Lane 0 - link training pattern setting" "No Pattern,Training 1,Training 2,Training 3,D10.2,SBLERRRATE,PRBS7,CSTM,HBR2 compliance,?..."
line.long 0x38 "NV_PDISP_SOR_DP_TPG_CONFIG_0,Additional Controls For The DP Test Pattern Generator"
hexmask.long.tbyte 0x38 0.--16. 1. " HBR2_COMPLIANCE_PERIOD        ,Total symbols there are between the start of a new scrambler reset sequence"
line.long 0x3C "NV_PDISP_SOR_DP_LQ_CSTM0_0,Program A Custom 80-bit Test Pattern [31:0]"
line.long 0x40 "NV_PDISP_SOR_DP_LQ_CSTM1_0,Program A Custom 80-bit Test Pattern [63:32]"
line.long 0x44 "NV_PDISP_SOR_DP_LQ_CSTM2_0,Program A Custom 80-bit Test Pattern [79:64]"
sif (!cpuis("TEGRAX2"))
group.long 0x1C8++0x0B
line.long 0x00 "NV_PDISP_SOR_PLL4_0,SOR PLL4"
bitfld.long 0x00 24.--29. " SETUP_LCKDET                  ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                     LOCK_OVERRIDE                 ,Lock override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 22. " ENABLE_LCKDET                 ,Enable LCKDET" "Enabled,Disabled"
rbitfld.long 0x00 21. "               LOCKDET                       ,LOCKDET" "0,1"
line.long 0x04 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2"
hexmask.long.byte 0x04 24.--31. 1. " SPAREPLL                      ,Spare PLL"
bitfld.long 0x04 20.--23. "                     SPARE4                        ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 16.--19. " SPARE3                        ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "                     SPARE2                        ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 8.--11. " SPARE1                        ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                     SPARE0                        ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x04 0. " REG_BYPASS                    ,REG bypass" "0,1"
line.long 0x08 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3"
hexmask.long.byte 0x08 24.--31. 1. " TX_PATTERN_GEN                ,TX pattern GEN"
endif
rgroup.long 0x1D4++0x0F
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_AN_MSB_0,HDCP AN MSB Register"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_AN_LSB_0,HDCP AN LSB Register"
line.long 0x08 "NV_PDISP_SOR_DP_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register"
hexmask.long.byte 0x08 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)"
line.long 0x0C "NV_PDISP_SOR_DP_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register"
group.long 0x1E4++0x0B
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register"
bitfld.long 0x00 31. " REPEATER                      ,Repeater" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      VALUE                         ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register"
line.long 0x08 "NV_PDISP_SOR_DP_HDCP_CTRL_0,HDCP Control Register"
bitfld.long 0x08 15. " UPSTREAM                      ,SPRIME and MPRIME calculations will use AN and BKSV and M0 values from the TMDS/DP HDCP block" "TMDS,DP"
rbitfld.long 0x08 13. "                   SROM_ERR                      ,Error occurs while using the HDCP SROM" "No error,Error"
textline "                                                            "
rbitfld.long 0x08 12. " SROM_EN                       ,HDCP SROM is in use" "Disabled,Enabled"
rbitfld.long 0x08 11. "               MPRIME                        ,M' has been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x08 10. " SPRIME                        ,S' has been calculated" "Invalid,Valid"
rbitfld.long 0x08 9. "                R0                            ,Km Ks M0 and R0 have been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x08 8. " AN                            ,An value has been generated" "Invalid,Valid"
bitfld.long 0x08 3. "                ONEONE                        ,Enables the HDCP 1.1 features" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 2. " DUAL_LINK_EN                  ,Turns dual-link mode on" "Disabled,Enabled"
bitfld.long 0x08 1. "               CRYPT                         ,Turns encryption on" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " RUN                           ,Starts downstream protocol" "No,Yes"
rgroup.long 0x1F0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_RI_0,HDCP RI Register"
hexmask.long.word 0x00 0.--15. 1. " VALUE                         ,RI register holds the 16-bit link integrity check value"
group.long 0x1F8++0x07
line.long 0x00 "NV_PDISP_SOR_DP_HDCP_EMU1_0,SOR NV PDISP SOR DP HDCP EMU1"
line.long 0x04 "NV_PDISP_SOR_DP_HDCP_CYA_0,HDCP Diagnostic Register"
rgroup.long 0x200++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AN_MSB_0,HDCP AN MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AN_LSB_0,HDCP AN LSB Register"
group.long 0x208++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CN_MSB_0,HDCP CN MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CN_LSB_0,HDCP CN LSB Register"
rgroup.long 0x210++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_AKSV_MSB_0,HDCP AKSV MSB Register"
hexmask.long.byte 0x00 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's downstream key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_AKSV_LSB_0,HDCP AKSV LSB Register"
group.long 0x218++0x0F
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_BKSV_MSB_0,HDCP BKSV MSB Register"
bitfld.long 0x00 31. " REPEATER                      ,Repeater" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      VALUE                         ,Holds the 8 most significant bits of the receiver's key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB_0,HDCP BKSV LSB Register"
line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_CKSV_MSB_0,HDCP CKSV MSB Register"
hexmask.long.byte 0x08 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the software's key selection vector (KSV)"
line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_CKSV_LSB_0,HDCP CKSV LSB Register"
rgroup.long 0x228++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_DKSV_MSB_0,HDCP DKSV MSB Register"
hexmask.long.byte 0x00 0.--7. 1. " VALUE                         ,Holds the 8 most significant bits of the transmitter's upstream key selection vector (KSV)"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_DKSV_LSB_0,HDCP DKSV LSB Register"
group.long 0x230++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CTRL_0,HDCP Control Register"
rbitfld.long 0x00 13. " SROM_ERR                      ,Error occurs while using the HDCP SROM" "No error,Error"
rbitfld.long 0x00 12. "               SROM_EN                       ,HDCP SROM is in use" "Disabled,Enabled"
textline "                                                            "
rbitfld.long 0x00 11. " MPRIME                        ,M' has been calculated" "Invalid,Valid"
rbitfld.long 0x00 10. "                SPRIME                        ,S' has been calculated" "Invalid,Valid"
textline "                                                            "
rbitfld.long 0x00 9. " R0                            ,Km Ks M0 and R0 have been calculated" "Invalid,Valid"
rbitfld.long 0x00 8. "                AN                            ,An value has been generated" "Invalid,Valid"
textline "                                                            "
bitfld.long 0x00 3. " ONEONE                        ,Enables the HDCP 1.1 features" "Disabled,Enabled"
bitfld.long 0x00 2. "               DUAL_LINK_EN                  ,Turns dual-link mode on" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 1. " CRYPT                         ,Turns encryption on" "Disabled,Enabled"
bitfld.long 0x00 0. "               RUN                           ,Starts downstream protocol" "No,Yes"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CMODE_0,HDCP CMODE Register"
bitfld.long 0x04 4.--7. " INDEX                         ,Index" "SOR0,SOR1,SOR2,SOR3,SOR4,SOR5,SOR6,SOR7,DAC0,DAC1,DAC2,PIOR0,PIOR1,PIOR2,PIOR3,PIOR4"
bitfld.long 0x04 0.--3. "                  MODE                          ,Mode" ",Read S,Read M,?..."
rgroup.long 0x238++0x17
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_MSB_0,HDCP MPRIME MSB Register"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_MPRIME_LSB_0,HDCP MPRIME LSB Register"
line.long 0x08 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_MSB_0,HDCP SPRIME MSB Register"
bitfld.long 0x08 7. " STATUS_READZ                  ,Implements the HDCP upstream spec's read Z operation" "Not implemented,Implemented"
bitfld.long 0x08 6. "        STATUS_CS                     ,Implements the connection state (CS) register" "Not implemented,Implemented"
textline "                                                            "
bitfld.long 0x08 5. " STATUS_SCOPE                  ,Report the status for the STATUS_UNPROTECTED field" "Scope 2 heads,Scope 1 head"
bitfld.long 0x08 4. "          STATUS_INTPNL                 ,Transmitting to an internal panel on this head" "Inactive,Active"
textline "                                                            "
bitfld.long 0x08 0.--3. " STATUS_MAX_CMODE_IDX          ,Identifies the maximum CMode index allowed for requesting status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB2_0,HDCP SPRIME LSB2 Register"
bitfld.long 0x0C 28.--31. " STATUS_CMODE_IDX              ,Identifies the index of the port to which the status request was actually routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 27. "                     STATUS_UNPROTECTED            ,Queried port is transmitting unprotected data" "No,Yes"
textline "                                                            "
bitfld.long 0x0C 26. " STATUS_EXTPNL                 ,Port identified digital interface and transmitting on other than an internal panel" "Inactive,Active"
bitfld.long 0x0C 25. "               STATUS_RPTR                   ,Status repeater" "Inactive,Active"
textline "                                                            "
bitfld.long 0x0C 24. " STATUS_ENCRYPTING             ,HDCP unit in this head is actually encrypting the data it receives" "No,Yes"
hexmask.long.tbyte 0x0C 0.--23. 1. "                    VALUE                         ,Value"
line.long 0x10 "NV_PDISP_SOR_TMDS_HDCP_SPRIME_LSB1_0,HDCP SPRIME LSB1 Register"
line.long 0x14 "NV_PDISP_SOR_TMDS_HDCP_RI_0,HDCP RI Register"
hgroup.long 0x250++0x07
hide.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_CS_MSB_0,HDCP CS MSB Register"
hide.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_CS_LSB_0,HDCP CS LSB Register"
rgroup.long 0x25C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU_RDATA0_0,HDMI Audio EMU RDATA0"
group.long 0x260++0x0B
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_EMU1_0,HDMI Audio EMU1"
bitfld.long 0x00 31. " WRITE                         ,Write" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                      ADDR                          ,Address"
line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_EMU2_0,HDMI Audio EMU2"
line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_CTRL_0,HDMI Audio Infoframe Control Register"
bitfld.long 0x08 9. " CHKSUM_HW                     ,Way to calculate the checksum for the infoframes" "Disabled,Enabled"
bitfld.long 0x08 8. "               SINGLE                        ,InfoFrame to be transmitted exactly once" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 4. " OTHER                         ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled"
bitfld.long 0x08 0. "               ENABLE                        ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled"
rgroup.long 0x26C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_STATUS_0,HDMI Audio InfoFrame Status"
bitfld.long 0x00 0. " SENT                          ,Sent" "Waiting,Done"
group.long 0x270++0x0F
line.long 0x00 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_HEADER_0,HDMI Audio InfoFrame Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_LOW_0,HDMI Audio InfoFrame SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,HDMI Audio InfoFrame SUBPACK0 High"
hexmask.long.byte 0x08 8.--15. 1. " PB5                           ,PB5"
hexmask.long.byte 0x08 0.--7. 1. "                     PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_CTRL_0,HDMI AVI Infoframe Control Register"
bitfld.long 0x0C 9. " CHKSUM_HW                     ,Way to calculate the checksum for the infoframes" "Disabled,Enabled"
bitfld.long 0x0C 8. "               SINGLE                        ,InfoFrame to be transmitted exactly once" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 4. " OTHER                         ,InfoFrame to be transmitted to every other frame" "Disabled,Enabled"
bitfld.long 0x0C 0. "               ENABLE                        ,Enables the hardware calculation to be passed to the packe" "Disabled,Enabled"
rgroup.long 0x280++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_STATUS_0,HDMI AVI Infoframe Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x284++0x13
line.long 0x00 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_HEADER_0,HDMI AVI Infoframe Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_LOW_0,HDMI AVI Infoframe SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK0_HIGH_0,HDMI AVI Infoframe SUBPACK0 High"
hexmask.long.byte 0x08 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x08 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x08 0.--7. 1. " PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_LOW_0,HDMI AVI Infoframe SUBPACK1 Low"
hexmask.long.byte 0x0C 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x0C 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x0C 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x0C 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x10 "NV_PDISP_SOR_HDMI_AVI_INFOFRAME_SUBPACK1_HIGH_0,HDMI AVI Infoframe SUBPACK1 High"
hexmask.long.byte 0x10 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x10 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x10 0.--7. 1. " PB11                          ,PB11"
rgroup.long 0x29C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_STATUS_0,HDMI Generic Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0xB0++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_HEADER_0,HDMI Generic Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
group.long 0x2A4++0x6B
line.long 0x00 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_LOW_0,HDMI Generic SUBPACK0 Low"
hexmask.long.byte 0x00 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x00 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x00 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK0_HIGH_0,HDMI Generic SUBPACK0 High"
hexmask.long.byte 0x04 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x04 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x04 0.--7. 1. " PB4                           ,PB4"
line.long 0x08 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_LOW_0,HDMI Generic SUBPACK1 Low"
hexmask.long.byte 0x08 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x08 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x08 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x0C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK1_HIGH_0,HDMI Generic SUBPACK1 High"
hexmask.long.byte 0x0C 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x0C 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x0C 0.--7. 1. " PB11                          ,PB11"
line.long 0x10 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_LOW_0,HDMI Generic SUBPACK2 Low"
hexmask.long.byte 0x10 24.--31. 1. " PB17                          ,PB17"
hexmask.long.byte 0x10 16.--23. 1. "                     PB16                          ,PB16"
textline "                                                            "
hexmask.long.byte 0x10 8.--15. 1. " PB15                          ,PB15"
hexmask.long.byte 0x10 0.--7. 1. "                     PB14                          ,PB14"
line.long 0x14 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK2_HIGH_0,HDMI Generic SUBPACK2 High"
hexmask.long.byte 0x14 16.--23. 1. " PB20                          ,PB20"
hexmask.long.byte 0x14 8.--15. 1. "                     PB19                          ,PB19"
textline "                                                            "
hexmask.long.byte 0x14 0.--7. 1. " PB18                          ,PB18"
line.long 0x18 "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_LOW_0,HDMI Generic SUBPACK3 Low"
hexmask.long.byte 0x18 24.--31. 1. " PB24                          ,PB24"
hexmask.long.byte 0x18 16.--23. 1. "                     PB23                          ,PB23"
textline "                                                            "
hexmask.long.byte 0x18 8.--15. 1. " PB22                          ,PB22"
hexmask.long.byte 0x18 0.--7. 1. "                     PB21                          ,PB21"
line.long 0x1C "NV_PDISP_SOR_HDMI_GENERIC_SUBPACK3_HIGH_0,HDMI Generic SUBPACK2 High"
hexmask.long.byte 0x1C 16.--23. 1. " PB27                          ,PB27"
hexmask.long.byte 0x1C 8.--15. 1. "                     PB26                          ,PB26"
textline "                                                            "
hexmask.long.byte 0x1C 0.--7. 1. " PB25                          ,PB25"
line.long 0x20 "NV_PDISP_SOR_HDMI_ACR_CTRL_0,HDMI Audio Clock Regeneration Control"
bitfld.long 0x20 24.--27. " FREQS                         ,Audio sampling frequency" "FREQ_44_1KHZ,,FREQ_48KHZ,FREQ_32KHZ,,,,,FREQ_88_2KHZ,,FREQ_96KHZ,,FREQ_176_4KHZ,,FREQ_192KHZ,?..."
bitfld.long 0x20 16. "          FREQS_ENABLE                  ,Uses the sampling frequency" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x20 8. " MEASURE_ENABLE                ,Uses the sampling frequency measured" "Disabled,Enabled"
bitfld.long 0x20 0. "               PACKET_ENABLE                 ,Uses the channel status information read from the incoming SPDIF" "Disabled,Enabled"
line.long 0x24 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK Low"
hexmask.long.byte 0x24 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x24 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x24 8.--15. 1. " SB3                           ,SB3"
line.long 0x28 "NV_PDISP_SOR_HDMI_ACR_0320_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 32 KHz SUBPACK High"
bitfld.long 0x28 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x28 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x28 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x28 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x2C "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK Low"
hexmask.long.byte 0x2C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x2C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x2C 8.--15. 1. " SB3                           ,SB3"
line.long 0x30 "NV_PDISP_SOR_HDMI_ACR_0441_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 44.1 KHz SUBPACK High"
bitfld.long 0x30 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x30 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x30 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x30 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x34 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK Low"
hexmask.long.byte 0x34 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x34 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x34 8.--15. 1. " SB3                           ,SB3"
line.long 0x38 "NV_PDISP_SOR_HDMI_ACR_0882_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 88.2 KHz SUBPACK High"
bitfld.long 0x38 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x38 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x38 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x38 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x3C "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK Low"
hexmask.long.byte 0x3C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x3C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x3C 8.--15. 1. " SB3                           ,SB3"
line.long 0x40 "NV_PDISP_SOR_HDMI_ACR_1764_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 176.4 KHz SUBPACK High"
bitfld.long 0x40 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x40 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x40 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x40 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x44 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK Low"
hexmask.long.byte 0x44 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x44 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x44 8.--15. 1. " SB3                           ,SB3"
line.long 0x48 "NV_PDISP_SOR_HDMI_ACR_0480_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 48 KHz SUBPACK High"
bitfld.long 0x48 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x48 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x48 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x48 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x4C "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK Low"
hexmask.long.byte 0x4C 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x4C 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x4C 8.--15. 1. " SB3                           ,SB3"
line.long 0x50 "NV_PDISP_SOR_HDMI_ACR_0960_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 96 KHz SUBPACK High"
bitfld.long 0x50 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x50 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x50 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x50 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x54 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_LOW_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK Low"
hexmask.long.byte 0x54 24.--31. 1. " SB1                           ,SB1"
hexmask.long.byte 0x54 16.--23. 1. "                     SB2                           ,SB2"
textline "                                                            "
hexmask.long.byte 0x54 8.--15. 1. " SB3                           ,SB3"
line.long 0x58 "NV_PDISP_SOR_HDMI_ACR_1920_SUBPACK_HIGH_0,HDMI Audio Clock Regeneration 192 KHz SUBPACK High"
bitfld.long 0x58 31. " ENABLE                        ,Allow sent packet" "Disabled,Enabled"
hexmask.long.byte 0x58 16.--23. 1. "               SB4                           ,SB4"
textline "                                                            "
hexmask.long.byte 0x58 8.--15. 1. " SB5                           ,SB5"
hexmask.long.byte 0x58 0.--7. 1. "                     SB6                           ,SB6"
line.long 0x5C "NV_PDISP_SOR_HDMI_CTRL_0,HDMI Control"
bitfld.long 0x5C 30. " ENABLE                        ,Enables HDMI for this head" "Disabled,Enabled"
bitfld.long 0x5C 28. "               CA_SELECT                     ,Value of channel allocation value software/hardware based" "SW,HW"
textline "                                                            "
bitfld.long 0x5C 27. " SS_SELECT                     ,Value of sample size software/hardware based" "SW,HW"
bitfld.long 0x5C 26. "                     SF_SELECT                     ,Value of sampling frequency software/hardware based" "SW,HW"
textline "                                                            "
bitfld.long 0x5C 25. " CC_SELECT                     ,Value of channel count software/hardware based" "SW,HW"
bitfld.long 0x5C 24. "                     CT_SELECT                     ,Value of coding type software/hardware based" "SW,HW"
textline "                                                            "
hexmask.long.byte 0x5C 16.--20. 1. " MAX_AC_PACKET                 ,Maximum number of 32-pixel packets"
bitfld.long 0x5C 12. "                     SAMPLE_FLAT                   ,Controls the values of HB2[3:0]" "CLR,SET"
textline "                                                            "
bitfld.long 0x5C 10. " AUDIO_LAYOUT_SELECT           ,AUDIO_LAYOUT information is automatically detected by hardware/software" "HW,SW"
bitfld.long 0x5C 8. "                     AUDIO_LAYOUT                  ,Controls layout HB1[4]" "Layout 2CH,Layout 8CH"
textline "                                                            "
hexmask.long.byte 0x5C 0.--6. 1. " REKEY                         ,Number of clocks required for HDCP rekey"
line.long 0x60 "NV_PDISP_SOR_HDMI_VSYNC_KEEPOUT_0,HDMI VSYNC Keepout"
bitfld.long 0x60 31. " ENABLE                        ,Enables keepout window" "Disabled,Enabled"
hexmask.long.word 0x60 16.--25. 1. "               START                         ,Defines the start of the keepout period"
textline "                                                            "
hexmask.long.word 0x60 0.--9. 1. " END                           ,Defines the end of the keepout period"
line.long 0x64 "NV_PDISP_SOR_HDMI_VSYNC_WINDOW_0,HDMI VSYNC Window"
bitfld.long 0x64 31. " ENABLE                        ,Allow EESS signaling during the window of opportunity" "Disabled,Enabled"
hexmask.long.word 0x64 16.--25. 1. "               START                         ,Defines the start of the window of opportunity"
textline "                                                            "
hexmask.long.word 0x64 0.--9. 1. " END                           ,Defines the end of the window of opportunity"
line.long 0x68 "NV_PDISP_SOR_HDMI_GCP_CTRL_0,HDMI GCP Control"
bitfld.long 0x68 8. " SINGLE                        ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled"
bitfld.long 0x68 4. "               OTHER                         ,Cause infoframe to be transmitted to every other frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x68 0. " ENABLE                        ,Enables the hardware calculation to be passed to the packet" "Disabled,Enabled"
rgroup.long 0x310++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_STATUS_0,HDMI GCP Status"
bitfld.long 0x00 24.--26. " HSYNC_END_PP                  ,Indicates the pixel phase for the end fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 20.--22. "                   HSYNC_START_PP                ,Indicates the pixel phase for the start fragment number of the HSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 16.--18. " VSYNC_END_PP                  ,Indicates the pixel phase for the end fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 12.--14. "                   VSYNC_START_PP                ,Indicates the pixel phase for the start fragment number of the VSYNC" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 8.--10. " ACTIVE_END_PP                 ,Indicates the pixel phase for the END fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..."
bitfld.long 0x00 4.--6. "                   ACTIVE_START_PP               ,Indicates the pixel phase for the start fragment number of the ACTIVE" ",PP_1,PP_2,PP_3,PP_0,?..."
textline "                                                            "
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x314++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_GCP_SUBPACK_0,HDMI GCP SUBPACK"
hexmask.long.byte 0x00 16.--23. 1. " SB2                           ,SB2"
hexmask.long.byte 0x00 8.--15. 1. "                     SB1                           ,SB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " SB0                           ,SB0"
group.long 0x320++0x07
line.long 0x00 "NV_PDISP_SOR_HDMI_EMU0_0,SOR NV PDISP SOR HDMI EMU0"
line.long 0x04 "NV_PDISP_SOR_HDMI_EMU1_0,SOR NV PDISP SOR HDMI EMU1"
rgroup.long 0x328++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_EMU1_RDATA_0,SOR NV PDISP SOR HDMI EMU1 RDATA"
group.long 0x32C++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_SPARE_0,HDMI Spare"
rgroup.long 0x330++0x07
line.long 0x00 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS1_0,HDMI SPDIF Channel Status1"
bitfld.long 0x00 28.--31. " ACCURACY                      ,Transmitter clock accuracy" "High,Normal,Variable pitch,Other,?..."
bitfld.long 0x00 24.--27. "         SFREQ                         ,Reported sampling frequency of the input audio stream" ",Undefined,?..."
textline "                                                            "
bitfld.long 0x00 20.--23. " CHANNEL                       ,Channel number of the audio" "Undefined,?..."
bitfld.long 0x00 16.--19. "              SOURCE                        ,Source number of the audio" "Undefined,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " CODE                          ,This byte defines the category code of the input device"
bitfld.long 0x00 6.--7. "                     MODE                          ,Defines one of four possible channel status formats for bytes 1-23 of channel status" "0,1,2,3"
textline "                                                            "
bitfld.long 0x00 3.--5. " D                             ,2 audio channels without pre-emphasis/pre-emphasis" "No pre-emphasis,Pre-emphasis,?..."
bitfld.long 0x00 2. "        COPYRIGHT                     ,Copyright status of the audio" "Yes,No"
textline "                                                            "
bitfld.long 0x00 1. " TYPE                          ,Specifies the type of data the audio word represents" "PCM,Other"
bitfld.long 0x00 0. "                  USE                           ,Specifies consumer/professional use of the channel status block" "CONSUMER,PRO"
line.long 0x04 "NV_PDISP_SOR_HDMI_SPDIF_CHN_STATUS2_0,HDMI SPDIF Channel Status2"
bitfld.long 0x04 4.--7. " ORIGINAL                      ,ORIGINAL" "Undefined,?..."
bitfld.long 0x04 1.--3. "              LENGTH                        ,Audio sample word length of this block depends on MAX_LENGTH" "MAX20_UNDEF/MAX24_UNDEF,MAX20_16BITS/MAX24_20BITS,MAX20_18BITS/MAX24_22BITS,,MAX20_19BITS/MAX24_23BITS,MAX20_20BITS/MAX24_24BITS,MAX20_17BITS/MAX24_21BITS,?..."
textline "                                                            "
bitfld.long 0x04 0. " MAX_LENGTH                    ,Reports if the maximum audio sample word length is 20 bits or 24 bits" "0,1"
group.long 0x33C++0x03
line.long 0x00 "NV_PDISP_HDCPRIF_ROM_CTRL_0,HDCPRIF Control Register"
hexmask.long.word 0x00 0.--15. 1. " ACK_ATTEMPTS                  ,Controls the number of Ack Attempts"
group.long 0x394++0x17
line.long 0x00 "NV_PDISP_HDCPRIF_ROM_TIMING_0,HDCPRIF Control Timing Register"
bitfld.long 0x00 24.--27. " PRESCALE                      ,Prescale" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. "                     START_DLY                     ,Defines how many scaled ticks pass before SDA (the data bit) makes a transition after the rising edge of SCL"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " DATA_DLY                      ,Defines how many scaled ticks pass  before SDA (the data bit) makes a transition after the falling edge of SCL"
hexmask.long.byte 0x00 0.--7. 1. "                     BIT_PERIOD                    ,Defines the timing of the SCL (serial clock) output"
line.long 0x04 "NV_PDISP_SOR_REFCLK_0,SOR REFCLK"
hexmask.long.byte 0x04 8.--15. 1. " DIV_INT                       ,Divisor integer"
bitfld.long 0x04 6.--7. "                     DIV_FRAC                      ,Divisor fractional" "0,1,2,3"
line.long 0x08 "NV_PDISP_CRC_CONTROL_0,CRC Control"
bitfld.long 0x08 0. " ARM_CRC_ENABLE                ,Enables or disables computation of CRC" "Disabled,Enabled"
line.long 0x0C "NV_PDISP_INPUT_CONTROL_0,Input Control"
bitfld.long 0x0C 1. " ARM_VIDEO_RANGE               ,Controls whether R/G/B values of 0 and 255 are permitted" "Full,Limited"
bitfld.long 0x0C 0. "                HDMI_SRC_SELECT               ,Selects from which of the two display units to take input" "Display,DisplayB"
line.long 0x10 "NV_PDISP_SCRATCH_0,Scratch"
line.long 0x14 "NV_PDISP_KEY_CTRL_0,HDCP KEY SRAM Register Control"
hexmask.long.word 0x14 22.--31. 0x40 " ADDRESS                       ,Reports the next byte address in the local key store"
hexmask.long.word 0x14 12.--21. 0x10 "                   LOAD_ADDRESS                  ,Selects the start byte address of the contiguous locations in the local key store"
textline "                                                            "
rbitfld.long 0x14 6. " PKEY_LOADED                   ,Indicates that the private key value has been received from KFUSE and is ready for use" "False,True"
bitfld.long 0x14 5. "                  PKEY_REQUEST_RELOAD           ,Requests that the private key be requested again from KFUSE" "Idle,Triggered"
textline "                                                            "
bitfld.long 0x14 4. " WRITE16                       ,HDCP keys module will write all 16 bytes of data into the local key store" "Done,Triggered"
bitfld.long 0x14 1. "              AUTOINC                       ,Auto-increment" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x14 0. " LOCAL_KEYS                    ,On-chip HDCP key store " "Disabled,Enabled"
group.long 0x3B8++0x13
line.long 0x00 "NV_PDISP_KEY_HDCP_KEY_0_0,SOR NV_PDISP Key HDCP Key 0"
line.long 0x04 "NV_PDISP_KEY_HDCP_KEY_1_0,SOR NV_PDISP Key HDCP Key 1"
line.long 0x08 "NV_PDISP_KEY_HDCP_KEY_2_0,SOR NV_PDISP Key HDCP Key 2"
line.long 0x0C "NV_PDISP_KEY_HDCP_KEY_3_0,SOR NV_PDISP Key HDCP Key 3"
line.long 0x10 "NV_PDISP_KEY_HDCP_KEY_TRIG_0,SOR NV PDISP Key HDCP Key Trigger"
bitfld.long 0x10 8. " LOAD_HDCP_KEY                 ,Load HDCP key" "Idle,Triggered"
wgroup.long 0x3CC++0x03
line.long 0x00 "NV_PDISP_KEY_SKEY_INDEX_0,SOR NV PDISP Key SKEY INDEX"
bitfld.long 0x00 0.--3. " IDX_VALUE                     ,Index value" ",,,,,,,,,,,,,,,Test"
group.long 0x3F0++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_CNTRL0_0,HD Audio (Known as Azalia)"
rbitfld.long 0x00 31. " INPUT_MODE                    ,This bit indicates what the audio data source is" "HDA,SPDIF"
bitfld.long 0x00 29. "                  INJECT_NULLSMPL               ,Inserts null samples into the audio FIFO  for each Azalia frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " SOURCE_SELECT                 ,Determines whether to use the S/PDIF or Azalia (HDAL) audio input" "Auto,SPDIF,HDAL,?..."
rbitfld.long 0x00 16.--19. "                  SAMPLING_FREQ                 ,Incoming audio stream sampling frequency in the Azalia code" "FREQ_44_1KHZ,FREQ Unknown,FREQ_48_0KHZ,FREQ_32_0KHZ,,,,,FREQ_88_2KHZ,,FREQ_96_0KHZ,,FREQ_176_4KHZ,,FREQ_192_0KHZ,?..."
textline "                                                            "
bitfld.long 0x00 12. " AFIFO_FLUSH                   ,Ensures that the next new audio packet sent will begin on the correct channel" "Disabled,Enabled"
bitfld.long 0x00 0. "               PORT_CONNECTIVITY             ,Controls the behavior of the Port Connectivity field of the Azalia configuration defaults verb" "Enabled,Disabled"
group.long 0x3FC++0x1B
line.long 0x00 "NV_PDISP_SOR_AUDIO_NVAL_0320_0,SOR Audio N values 32 KHz"
hexmask.long.tbyte 0x00 0.--19. 1. " VALUE                         ,The correct N value for 32 KHz audio at the current pixel clock frequency"
line.long 0x04 "NV_PDISP_SOR_AUDIO_NVAL_0441_0,SOR Audio N values 44.1 KHz"
hexmask.long.tbyte 0x04 0.--19. 1. " VALUE                         ,The correct N value for 44.1 KHz audio at the current pixel clock frequency"
line.long 0x08 "NV_PDISP_SOR_AUDIO_NVAL_0882_0,SOR Audio N values 88.2 KHz"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                         ,The correct N value for 88.2 KHz audio at the current pixel clock frequency"
line.long 0x0C "NV_PDISP_SOR_AUDIO_NVAL_1764_0,SOR Audio N values 176.4 KHz"
hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE                         ,The correct N value for 176.4 KHz audio at the current pixel clock frequency"
line.long 0x10 "NV_PDISP_SOR_AUDIO_NVAL_0480_0,SOR Audio N values 48 KHz"
hexmask.long.tbyte 0x10 0.--19. 1. " VALUE                         ,The correct N value for 48 KHz audio at the current pixel clock frequency"
line.long 0x14 "NV_PDISP_SOR_AUDIO_NVAL_0960_0,SOR Audio N values 96 KHz"
hexmask.long.tbyte 0x14 0.--19. 1. " VALUE                         ,The correct N value for 96 KHz audio at the current pixel clock frequency"
line.long 0x18 "NV_PDISP_SOR_AUDIO_NVAL_1920_0,SOR Audio N values 192 KHz"
hexmask.long.tbyte 0x18 0.--19. 1. " VALUE                         ,The correct N value for 192 KHz audio at the current pixel clock frequency"
hgroup.long 0x418++0x0F
hide.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH0_0,SOR Audio HDA Scratch0"
hide.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH1_0,SOR Audio HDA Scratch1"
hide.long 0x08 "NV_PDISP_SOR_AUDIO_HDA_SCRATCH2_0,SOR Audio HDA Scratch2"
hide.long 0x0C "NV_PDISP_SOR_AUDIO_HDA_SCRATCH3_0,SOR Audio HDA Scratch3"
rgroup.long 0x428++0x07
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH0_0,SOR Audio HDA Codec SCRATCH0"
line.long 0x04 "NV_PDISP_SOR_AUDIO_HDA_CODEC_SCRATCH1_0,SOR Audio HDA Codec SCRATCH1"
group.long 0x430++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_ELD_BUFWR_0,SOR Audio HDA ELD Buffer"
hexmask.long.byte 0x00 8.--15. 1. " INDEX                         ,Index"
hexmask.long.byte 0x00 0.--7. 1. "                     DATABYTE                      ,Databyte"
group.long 0x434++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_PRESENSE_0,SOR Audio HDA Presense"
bitfld.long 0x00 1. " ELDV                          ,Indicates whether the data in the ELD buffer is valid and ready to read" "Invalid,Valid"
bitfld.long 0x00 0. "                PD                            ,Presence detect" "Not present,Present"
rgroup.long 0x438++0x03
line.long 0x00 "NV_PDISP_SOR_AUDIO_HDA_CP_0,SOR Audio HDA Content Protection"
bitfld.long 0x00 2. " REQUEST_STATE_VALID           ,Request state valid" "Invalid,Valid"
bitfld.long 0x00 0.--1. "                REQUEST_STATE                 ,Request state" "Don't care,,Protection off,Protection on"
group.long 0x43C++0x23
line.long 0x00 "NV_PDISP_SOR_AUDIO_AVAL_0320_0,Audio AVAL 32 KHz"
hexmask.long.tbyte 0x00 0.--19. 1. " VALUE                         ,The correct A value for 32 KHz audio at the current pixel clock frequency"
line.long 0x04 "NV_PDISP_SOR_AUDIO_AVAL_0441_0,Audio AVAL 44.1 KHz"
hexmask.long.tbyte 0x04 0.--19. 1. " VALUE                         ,The correct A value for 44.1 KHz audio at the current pixel clock frequency"
line.long 0x08 "NV_PDISP_SOR_AUDIO_AVAL_0882_0,Audio AVAL 88.2 KHz"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                         ,The correct A value for 88.2 KHz audio at the current pixel clock frequency"
line.long 0x0C "NV_PDISP_SOR_AUDIO_AVAL_1764_0,Audio AVAL 176.4 KHz"
hexmask.long.tbyte 0x0C 0.--19. 1. " VALUE                         ,The correct A value for 176.4 KHz audio at the current pixel clock frequency"
line.long 0x10 "NV_PDISP_SOR_AUDIO_AVAL_0480_0,Audio AVAL 48 KHz"
hexmask.long.tbyte 0x10 0.--19. 1. " VALUE                         ,The correct A value for 48 KHz audio at the current pixel clock frequency"
line.long 0x14 "NV_PDISP_SOR_AUDIO_AVAL_0960_0,Audio AVAL 96 KHz"
hexmask.long.tbyte 0x14 0.--19. 1. " VALUE                         ,The correct A value for 96 KHz audio at the current pixel clock frequency"
line.long 0x18 "NV_PDISP_SOR_AUDIO_AVAL_1920_0,Audio AVAL 192 KHz"
hexmask.long.tbyte 0x18 0.--19. 1. " VALUE                         ,The correct A value for 192 KHz audio at the current pixel clock frequency"
line.long 0x1C "NV_PDISP_SOR_AUDIO_AVAL_DEFAULT_0,Audio AVAL Default"
hexmask.long.tbyte 0x1C 0.--19. 1. " VALUE                         ,Default A value if the Azalia codec sampling frequency does not match any"
line.long 0x20 "NV_PDISP_SOR_AUDIO_GEN_CTRL_0,SOR Audio GEN Control"
hexmask.long.word 0x20 16.--31. 1. " DEV_ID                        ,Device ID to identify the current chip"
hexmask.long.byte 0x20 0.--7. 1. "                   REV_ID                        ,Rev ID for the codec"
group.long 0x470++0x0B
line.long 0x00 "NV_PDISP_INT_STATUS_0,NV PDISP Interrupt Status"
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 21. " LANE3_FIFO_OVERFLOW           ,LANE3 FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 20. "           LANE2_FIFO_OVERFLOW           ,LANE2 FIFO overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 19. " LANE1_FIFO_OVERFLOW           ,LANE1 FIFO overflow" "No interrupt,Interrupt"
eventfld.long 0x00 18. "           LANE0_FIFO_OVERFLOW           ,LANE0 FIFO overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 17. " SPKT_OVERRUN                  ,SPKT overrun" "No interrupt,Interrupt"
eventfld.long 0x00 16. "           LANE3_STEER_ERROR             ,LANE3 steer error" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 15. " LANE2_STEER_ERROR             ,LANE2 steer error" "No interrupt,Interrupt"
eventfld.long 0x00 14. "           LANE1_STEER_ERROR             ,LANE1 steer error" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 13. " LANE0_STEER_ERROR             ,LANE0 steer error" "No interrupt,Interrupt"
eventfld.long 0x00 12. "           LANE3_PIXPACK_OVERFLOW        ,LANE3 pixpack overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 11. " LANE2_PIXPACK_OVERFLOW        ,LANE2 pixpack overflow" "No interrupt,Interrupt"
eventfld.long 0x00 10. "           LANE1_PIXPACK_OVERFLOW        ,LANE1 pixpack overflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 9. " LANE0_PIXPACK_OVERFLOW        ,LANE0 pixpack overflow" "No interrupt,Interrupt"
eventfld.long 0x00 8. "           LANE3_FIFO_UNDERFLOW          ,LANE3 FIFO underflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 7. " LANE2_FIFO_UNDERFLOW          ,LANE2 FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 6. "           LANE1_FIFO_UNDERFLOW          ,LANE1 FIFO underflow" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 5. " LANE0_FIFO_UNDERFLOW          ,LANE0 FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 4. "           REG_SECURE_ACCESS_ERR         ,REG secure access error" "No interrupt,Interrupt"
textline "                                                            "
endif
eventfld.long 0x00 3. " SCRATCH                       ,Scratch" "No interrupt,Interrupt"
eventfld.long 0x00 2. "           CP_REQUEST                    ,CP Request" "No interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x00 1. " CODEC_SCRATCH1                ,Codec scratch1" "No interrupt,Interrupt"
eventfld.long 0x00 0. "           CODEC_SCRATCH0                ,Codec scratch0" "No interrupt,Interrupt"
line.long 0x04 "NV_PDISP_INT_MASK_0,NV PDISP Interrupt Masked"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 21. " LANE3_FIFO_OVERFLOW_MASK      ,LANE3 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x04 20. "             LANE2_FIFO_OVERFLOW_MASK      ,LANE2 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 19. " LANE1_FIFO_OVERFLOW_MASK      ,LANE1 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x04 18. "             LANE0_FIFO_OVERFLOW_MASK      ,LANE0 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 17. " SPKT_OVERRUN_MASK             ,SPKT overrun mask" "Masked,Not masked"
bitfld.long 0x04 16. "             LANE3_STEER_ERROR_MASK        ,LANE3 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 15. " LANE2_STEER_ERROR_MASK        ,LANE2 steer error mask" "Masked,Not masked"
bitfld.long 0x04 14. "             LANE1_STEER_ERROR_MASK        ,LANE1 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 13. " LANE0_STEER_ERROR_MASK        ,LANE0 steer error mask" "Masked,Not masked"
bitfld.long 0x04 12. "             LANE3_PIXPACK_OVERFLOW_MASK   ,LANE3 pixpack overflow mask" "Masked,Not Masked"
textline "                                                            "
bitfld.long 0x04 11. " LANE2_PIXPACK_OVERFLOW_MASK   ,LANE2 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x04 10. "             LANE1_PIXPACK_OVERFLOW_MASK   ,LANE1 pixpack overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 9. " LANE0_PIXPACK_OVERFLOW_MASK   ,LANE0 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x04 8. "             LANE3_FIFO_UNDERFLOW_MASK     ,LANE3 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 7. " LANE2_FIFO_UNDERFLOW_MASK     ,LANE2 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x04 6. "             LANE1_FIFO_UNDERFLOW_MASK     ,LANE1 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 5. " LANE0_FIFO_UNDERFLOW_MASK     ,LANE0 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x04 4. "             REG_SECURE_ACCESS_ERR_MASK    ,REG secure access error" "Masked,Not masked"
textline "                                                            "
endif
bitfld.long 0x04 3. " SCRATCH_MASK                  ,Scratch mask" "Masked,Not masked"
bitfld.long 0x04 2. "             CP_REQUEST_MASK               ,CP request mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x04 1. " CODEC_SCRATCH1_MASK           ,Codec scratch1 mask" "Masked,Not masked"
bitfld.long 0x04 0. "             CODEC_SCRATCH0_MASK           ,Codec scratch0 mask" "Masked,Not masked"
line.long 0x08 "NV_PDISP_INT_ENABLE_0,NV PDISP Interrupt Enable"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 21. " LANE3_FIFO_OVERFLOW_ENABLE    ,LANE3 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x08 20. "               LANE2_FIFO_OVERFLOW_ENABLE    ,LANE2 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " LANE1_FIFO_OVERFLOW_ENABLE    ,LANE1 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x08 18. "               LANE0_FIFO_OVERFLOW_ENABLE    ,LANE0 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 17. " SPKT_OVERRUN_ENABLE           ,SPKT overrun enable" "Disabled,Enabled"
bitfld.long 0x08 16. "               LANE3_STEER_ERROR_ENABLE      ,LANE3 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 15. " LANE2_STEER_ERROR_ENABLE      ,LANE2 steer error enable" "Disabled,Enabled"
bitfld.long 0x08 14. "               LANE1_STEER_ERROR_ENABLE      ,LANE1 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 13. " LANE0_STEER_ERROR_ENABLE      ,LANE0 steer error enable" "Disabled,Enabled"
bitfld.long 0x08 12. "               LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 11. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x08 10. "               LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 9. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x08 8. "               LANE3_FIFO_UNDERFLOW_ENABLE   ,LANE3 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 7. " LANE2_FIFO_UNDERFLOW_ENABLE   ,LANE2 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x08 6. "               LANE1_FIFO_UNDERFLOW_ENABLE   ,LANE1 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 5. " LANE0_FIFO_UNDERFLOW_ENABLE   ,LANE0 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x08 4. "               REG_SECURE_ACCESS_ERR_ENABLE  ,REG secure access error enable" "Disabled,Enabled"
textline "                                                            "
endif
bitfld.long 0x08 3. " SCRATCH_ENABLE                ,Scratch enable" "Disabled,Enabled"
bitfld.long 0x08 2. "               CP_REQUEST_ENABLE             ,CP request enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 1. " CODEC_SCRATCH1_ENABLE         ,Codec scratch1 enable" "Disabled,Enabled"
bitfld.long 0x08 0. "               CODEC_SCRATCH0_ENABLE         ,Codec scratch0 enable" "Disabled,Enabled"
rgroup.long 0x47C++0x07
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_M0_LO_0,SOR NV PDISP SOR TMDS HDCP M0 Low"
line.long 0x04 "NV_PDISP_SOR_TMDS_HDCP_M0_HI_0,SOR NV PDISP SOR TMDS HDCP M0 High"
group.long 0x484++0x03
line.long 0x00 "NV_PDISP_SOR_TMDS_HDCP_STATUS_0,SOR NV PDISP SOR TMDS HDCP Status"
bitfld.long 0x00 8. " OVERRIDE_ENABLE               ,Override enable" "Disabled,Enabled"
bitfld.long 0x00 2. "               SCOPE_OVERRIDE                ,Scope override" "No override,Override"
textline "                                                            "
bitfld.long 0x00 1. " UNPROTECTED_OVERRIDE          ,Unprotected override" "No override,Override"
bitfld.long 0x00 0. "            RPTR_OVERRIDE                 ,Repeater override" "No override,Override"
group.long 0x488++0x07
line.long 0x00 "NV_HDACODEC_AUDIO_GEN_CTL_0,HDACODEC Audio GEN Control"
bitfld.long 0x00 4. " COPY_POLARITY                 ,The polarity of the COPY bit is currently inverted" "Old,New"
bitfld.long 0x00 0.--3. "                    CHSTS_FS_3840                 ,CHSTS sampling frequency 384 KHz" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_CTRL_0,HDMI Vendor Specific Infoframe Control"
bitfld.long 0x04 16. " VIDEO_FMT                     ,Specifies how the remaining bytes in the infoframe should be interpreted by the specification" "SW controlled,HW controlled"
bitfld.long 0x04 9. "          CHKSUM_HW                     ,Hardware provides a way to calculate the checksum for the infoframes" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 8. " SINGLE                        ,Cause infoframe to be transmitted exactly once" "Disabled,Enabled"
bitfld.long 0x04 4. "               OTHER                         ,Cause infoframe to be transmitted every other frame" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x04 0. " ENABLE                        ,Initiates infoframe generation" "Disabled,Enabled"
rgroup.long 0x490++0x03
line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_STATUS_0,HDMI Vendor Specific Infoframe Status"
bitfld.long 0x00 0. " SENT                          ,Field will be set to after the first packet is sent" "Waiting,Done"
group.long 0x494++0x23
line.long 0x00 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_HEADER_0,HDMI Vendor Specific Infoframe Header"
hexmask.long.byte 0x00 16.--23. 1. " HB2                           ,HB2"
hexmask.long.byte 0x00 8.--15. 1. "                     HB1                           ,HB1"
textline "                                                            "
hexmask.long.byte 0x00 0.--7. 1. " HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_LOW_0,HDMI Vendor Specific Infoframe SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK0 High"
hexmask.long.byte 0x08 16.--23. 1. " PB6                           ,PB6"
hexmask.long.byte 0x08 8.--15. 1. "                     PB5                           ,PB5"
textline "                                                            "
hexmask.long.byte 0x08 0.--7. 1. " PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_LOW_0,HDMI Vendor Specific Infoframe SUBPACK1 Low"
hexmask.long.byte 0x0C 24.--31. 1. " PB10                          ,PB10"
hexmask.long.byte 0x0C 16.--23. 1. "                     PB9                           ,PB9"
textline "                                                            "
hexmask.long.byte 0x0C 8.--15. 1. " PB8                           ,PB8"
hexmask.long.byte 0x0C 0.--7. 1. "                     PB7                           ,PB7"
line.long 0x10 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK1 High"
hexmask.long.byte 0x10 16.--23. 1. " PB13                          ,PB13"
hexmask.long.byte 0x10 8.--15. 1. "                     PB12                          ,PB12"
textline "                                                            "
hexmask.long.byte 0x10 0.--7. 1. " PB11                          ,PB11"
line.long 0x14 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_LOW_0,HDMI Vendor Specific Infoframe SUBPACK2 Low"
hexmask.long.byte 0x14 24.--31. 1. " PB17                          ,PB17"
hexmask.long.byte 0x14 16.--23. 1. "                     PB16                          ,PB16"
textline "                                                            "
hexmask.long.byte 0x14 8.--15. 1. " PB15                          ,PB15"
hexmask.long.byte 0x14 0.--7. 1. "                     PB14                          ,PB14"
line.long 0x18 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK2 High"
hexmask.long.byte 0x18 16.--23. 1. " PB20                          ,PB20"
hexmask.long.byte 0x18 8.--15. 1. "                     PB19                          ,PB19"
textline "                                                            "
hexmask.long.byte 0x18 0.--7. 1. " PB18                          ,PB18"
line.long 0x1C "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_LOW_0,HDMI Vendor Specific Infoframe SUBPACK3 Low"
hexmask.long.byte 0x1C 24.--31. 1. " PB24                          ,PB24"
hexmask.long.byte 0x1C 16.--23. 1. "                     PB23                          ,PB23"
textline "                                                            "
hexmask.long.byte 0x1C 8.--15. 1. " PB22                          ,PB22"
hexmask.long.byte 0x1C 0.--7. 1. "                     PB21                          ,PB21"
line.long 0x20 "NV_PDISP_SOR_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH_0,HDMI Vendor Specific Infoframe SUBPACK3 High"
hexmask.long.byte 0x20 16.--23. 1. " PB27                          ,PB27"
hexmask.long.byte 0x20 8.--15. 1. "                     PB26                          ,PB26"
textline "                                                            "
hexmask.long.byte 0x20 0.--7. 1. " PB25                          ,PB25"
group.long 0x4C0++0x27
line.long 0x00 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_HEADER_0,SOR DP Audio InfoFrame Header"
hexmask.long.byte 0x00 24.--31. 1. " HB3                           ,HB3"
hexmask.long.byte 0x00 16.--23. 1. "                     HB2                           ,HB2"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " HB1                           ,HB1"
hexmask.long.byte 0x00 0.--7. 1. "                     HB0                           ,HB0"
line.long 0x04 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_LOW_0,SOR DP Audio InfoFrame SUBPACK0 Low"
hexmask.long.byte 0x04 24.--31. 1. " PB3                           ,PB3"
hexmask.long.byte 0x04 16.--23. 1. "                     PB2                           ,PB2"
textline "                                                            "
hexmask.long.byte 0x04 8.--15. 1. " PB1                           ,PB1"
hexmask.long.byte 0x04 0.--7. 1. "                     PB0                           ,PB0"
line.long 0x08 "NV_PDISP_SOR_DP_AUDIO_INFOFRAME_SUBPACK0_HIGH_0,SOR DP Audio InfoFrame SUBPACK0 High"
hexmask.long.byte 0x08 8.--15. 1. " PB5                           ,PB5"
hexmask.long.byte 0x08 0.--7. 1. "                     PB4                           ,PB4"
line.long 0x0C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0320_0,SOR DP Audio Timestamp 32 KHz"
hexmask.long.word 0x0C 16.--31. 1. " N                             ,N"
hexmask.long.word 0x0C 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x10 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0441_0,SOR DP Audio Timestamp 44.1 KHz"
hexmask.long.word 0x10 16.--31. 1. " N                             ,N"
hexmask.long.word 0x10 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x14 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0882_0,SOR DP Audio Timestamp 88.2 KHz"
hexmask.long.word 0x14 16.--31. 1. " N                             ,N"
hexmask.long.word 0x14 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x18 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1764_0,SOR DP Audio Timestamp 176.4"
hexmask.long.word 0x18 16.--31. 1. " N                             ,N"
hexmask.long.word 0x18 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x1C "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0480_0,SOR DP Audio Timestamp 48 KHz"
hexmask.long.word 0x1C 16.--31. 1. " N                             ,N"
hexmask.long.word 0x1C 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x20 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_0960_0,SOR DP Audio Timestamp 96 KHz"
hexmask.long.word 0x20 16.--31. 1. " N                             ,N"
hexmask.long.word 0x20 0.--15. 1. "                   D_M                           ,D_N"
line.long 0x24 "NV_PDISP_SOR_DP_AUDIO_TIMESTAMP_1920_0,SOR DP Audio Timestamp 192 KHz"
hexmask.long.word 0x24 16.--31. 1. " N                             ,N"
hexmask.long.word 0x24 0.--15. 1. "                   D_M                           ,D_N"
group.long 0x4F0++0x03
line.long 0x00 "NV_PDISP_HDMI_AUDIO_N_0,Audio N"
bitfld.long 0x00 28. " LOOKUP                        ,Hardware will select the appropriate value of N" "Disabled,Enabled"
rgroup.long 0x4F4++0x03
line.long 0x00 "NV_PDISP_HDMI_LANE_CALIB_FUSE_0,NV PDISP HDMI Lane Calibration Fuse"
hexmask.long.byte 0x00 24.--31. 1. " LANE3_CALIB                   ,Lane 3 calibration"
hexmask.long.byte 0x00 16.--23. 1. "                     LANE2_CALIB                   ,Lane 2 calibration"
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " LANE1_CALIB                   ,Lane 1 calibration"
hexmask.long.byte 0x00 0.--7. 1. "                     LANE0_CALIB                   ,Lane 0 calibration"
group.long 0x4F8++0x0F
line.long 0x00 "NV_PDISP_SOR_HDMI2_CTRL_0,NV PDISP SOR HDMI2 Control"
hexmask.long.word 0x00 16.--31. 1. " SSCP_START                    ,This sets the start point of the SSCP period"
bitfld.long 0x00 4.--7. "                   SSCP_LENGTH                   ,This sets the length of the SSCP period which is output once per frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 2. " SCRAMBLE_AT_LOADV             ,Scramble at LOADV" "Disabled,Enabled"
bitfld.long 0x00 1. "               CLOCK_MODE                    ,This bit allows the clock signal to be divide by 4" "Normal,Mode DIV by4"
textline "                                                            "
bitfld.long 0x00 0. " SCRAMBLE                      ,This bit enables scrambling for HDMI 2.0" "Disabled,Enabled"
line.long 0x04 "NV_PDISP_SOR_HDMI2_LFSR0_0,NV PDISP SOR HDMI2 LFSR0"
hexmask.long.word 0x04 16.--31. 1. " LANE1_SEED                    ,Lane 1 seed"
hexmask.long.word 0x04 0.--15. 1. "                   LANE0_SEED                    ,Lane 0 seed"
line.long 0x08 "NV_PDISP_SOR_HDMI2_LFSR1_0,NV PDISP SOR HDMI2 LFSR1"
hexmask.long.word 0x08 0.--15. 1. " LANE2_SEED                    ,Lane 2 seed"
line.long 0x0C "NV_PDISP_SOR_HDCP22_CTRL_0,HDCP 2.2 Control Register"
bitfld.long 0x0C 6. " DISABLE_LANE_CNT0             ,Enables HW to disable encryption when SOR lane count is set to 0" "Yes,No"
bitfld.long 0x0C 5. "                    DISABLE_DETACH                ,Enables HW to disable encryption when SOR is detached from the head" "Yes,No"
textline "                                                            "
bitfld.long 0x0C 4. " REPEATER                      ,Reporting that the SOR is authenticated with a downstream REPEATER " "Yes,No"
bitfld.long 0x0C 2. "                    LOCK_TYPE                     ,Protected software write to the TYPE register" "Unlocked,Locked"
textline "                                                            "
bitfld.long 0x0C 1. " INIT                          ,Initial value to indicate a fresh start of a new session" "Done,Triggered"
bitfld.long 0x0C 0. "              CRYPT                         ,Would actually start encrypting the incoming data" "Disabled,Enabled"
rgroup.long 0x508++0x03
line.long 0x00 "NV_PDISP_SOR_HDCP22_STATUS_0,HDCP 2.2 Status register"
bitfld.long 0x00 9.--11. " HDCP_STATE                    ,HDCP_STATE" "Idle,Wait LC128,Wait AES ready,HDCP22 enable,HDMI encrypt on,DP encrypt on,?..."
bitfld.long 0x00 7.--8. "        AUTODIS_STATE                 ,AUTODIS state" "Idle,Encrypting,Disabled LC_0,Disabled detach"
textline "                                                            "
bitfld.long 0x00 6. " LC128_ERROR                   ,LC128 error" "No,Yes"
bitfld.long 0x00 5. "                    LANE_CNT0_DISABLE             ,Lane CNT0 disable" "No,Yes"
textline "                                                            "
bitfld.long 0x00 4. " DETACHED_DISABLE              ,Detached disable" "No,Yes"
bitfld.long 0x00 3. "                    DATA_CNT_OVERFLOW             ,This indicates if the Data counter has overflowed" "No,Yes"
textline "                                                            "
bitfld.long 0x00 2. " FRAME_CNT_OVERFLOW            ,This indicates if the Frame counter has overflowed" "No overflow,Overflow"
bitfld.long 0x00 0. "            CRYPT_STATUS                  ,Reports the actual link encryption status" "Inactive,Active"
group.long 0x510++0x2B
line.long 0x00 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_MSB_0,AES-CTR Key Bus MBS"
line.long 0x04 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB1_0,AES-CTR Key Bus LSB1"
line.long 0x08 "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB2_0,AES-CTR Key Bus LSB2"
line.long 0x0C "NV_PDISP_SOR_HDCP22_AES_CTR_KEY_LSB3_0,AES-CTR Key Bus LSB3"
line.long 0x10 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_MSB_0,AES-CTR Data Bus MBS"
line.long 0x14 "NV_PDISP_SOR_HDCP22_AES_CTR_DATA_LSB_0,AES-CTR Data Bus LBS"
line.long 0x18 "NV_PDISP_SOR_HDCP22_SST_DP_TYPE_0,AES-CTR DP Type"
hexmask.long.byte 0x18 0.--7. 1. " VALUE                         ,Value"
line.long 0x1C "NV_PDISP_SOR_HDCP22_LC128_MSB_0,NV PDISP SOR HDCP22 LC128 MSB"
line.long 0x20 "NV_PDISP_SOR_HDCP22_LC128_LSB1_0,NV PDISP SOR HDCP22 LC128 LSB1"
line.long 0x24 "NV_PDISP_SOR_HDCP22_LC128_LSB2_0,NV PDISP SOR HDCP22 LC128 LSB2"
line.long 0x28 "NV_PDISP_SOR_HDCP22_LC128_LSB3_0,NV PDISP SOR HDCP22 LC128 LSB3"
sif (cpuis("TEGRAX2"))
rgroup.long 0x53C++0x03
line.long 0x00 "CTXSW_0_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "         NEXT_CLASS     ,Next requested class"
group.long 0x540++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
hexmask.long.word 0x00 11.--20. 1. " CURR_CHANNEL ,Current working channel"
bitfld.long 0x00 10. "         AUTO_ACK       ,Automatically acknowledge any incoming context switch requests" "Manual,Auto ACK"
textline "                                                            "
hexmask.long.word 0x00 0.--9. 1. " CURR_CLASS   ,Current working class"
group.long 0x544++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_0,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x548++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_1,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x54C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE0_2,Head Control Register"
bitfld.long 0x00 4.--5. " INTERLACED   ,Interlaced is not supported" "Progressive,?..."
bitfld.long 0x00 3. "  RANGECOMPRESS  ,Compresses the range of an RGB signal to range required for CEA ranged RGB output" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " DYNRANGE     ,Sets the dynamic range for the output" "VESA,CEA"
bitfld.long 0x00 0.--1. "         COLORSPACE     ,YUV_601/YUV_709 are not supported" "RGB,?..."
group.long 0x550++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_0,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x554++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_1,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x558++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE1_2,Size Of The Raster"
hexmask.long.word 0x00 16.--30. 1. " VTOTAL       ,Total number of lines in a frame of the raster"
hexmask.long.word 0x00 0.--14. 1. "         HTOTAL         ,Total number of pixels in a line of the raster"
group.long 0x55C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_0,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x560++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_1,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x564++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE2_2,Location Of The Horizontal And Vertical Sync End"
hexmask.long.word 0x00 16.--30. 1. " VSYNC_END    ,Total number of lines after which vertical sync ends"
hexmask.long.word 0x00 0.--14. 1. "         HSYNC_END      ,Total number of pixels after which horizontal sync ends"
group.long 0x568++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_0,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x56C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_1,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x570++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE3_2,Location Of The Horizontal And Vertical Blank End"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END   ,Total number of lines after which vertical blank ends"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_END     ,Total number of pixels after which horizontal blank ends"
group.long 0x574++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_0,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x578++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_1,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x57C++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE4_2,Location Of The Horizontal And Vertical Blank Start"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_START ,Total number of lines after which vertical blank starts"
hexmask.long.word 0x00 0.--14. 1. "         HBLANK_START   ,Total number of pixels after which horizontal blank starts"
group.long 0x580++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_0,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
group.long 0x584++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_1,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
group.long 0x588++0x03
line.long 0x00 "NV_PDISP_HEAD_STATE5_2,Interlaced Mode"
hexmask.long.word 0x00 16.--30. 1. " VBLANK_END_2 ,Total number of lines after which vertical blank ends 2"
hexmask.long.word 0x00 0.--14. 1. "         VBLANK_START_2 ,Total number of lines after which vertical blank starts 2"
textline "                                                            "
group.long 0x58C++0x13
line.long 0x00 "NV_PDISP_SOR_PLL0_0,NV PDISP SOR PLL0"
bitfld.long 0x00 24.--27. " ICHPMP                        ,Additions to the charge pump current" "0,0.375 uA,0.75 uA,1.125 uA,1.5 uA,1.875 uA,2.25 uA,2.625 uA,3 uA,3.375 uA,3.75 uA,4.125 uA,4.5 uA,4.875 uA,5.25 uA,5.625 uA"
textline "                                                            "
bitfld.long 0x00 19. " FILTER[3]                     ,Controls this VCO startup bit for the TMDS_DUAL macro" "Normal operation,Forced VCO"
bitfld.long 0x00 16.--18. "       FILTER[2:0]                   ,Select the loop filter and adjust the filter resistor value" "0,1,2,3,4,5,6,7"
textline "                                                            "
bitfld.long 0x00 12.--13. " TXREG_LEVEL                   ,TXREG level" "V25,V15,V35,V45"
bitfld.long 0x00 8.--11. "                    VCOCAP                        ,Selects the VCO capacitor and adjusts ring oscillator inter-stage load" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 6.--7. " PLLREG_LEVEL                  ,PLLREG level" "V25,V15,V35,V45"
bitfld.long 0x00 5. "                    PULLDOWN                      ,Weak pull-down enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 2. " VCOPD                         ,VCOPD" "Rescind,Assert"
bitfld.long 0x00 0. "                PWR                           ,Power" "On,Off"
line.long 0x04 "NV_PDISP_SOR_PLL1_0,Configure The Main SOR PLL1"
bitfld.long 0x04 29. " COHERENTMODE                  ,Coherent mode" "Disabled,Enabled"
bitfld.long 0x04 20.--23. "               LOADADJ                       ,Load pulse position adjust" "Center,?..."
textline "                                                            "
rbitfld.long 0x04 15. " TERM_COMPOUT                  ,Termination calibration status" "Low,High"
bitfld.long 0x04 9.--12. "                   TMDS_TERMADJ                  ,Termination resistance control" "Lowest,1,2,3,4,5,6,7,OHM500,9,10,11,12,13,14,Highest"
textline "                                                            "
bitfld.long 0x04 8. " TMDS_TERM                     ,Termination enable" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "               IOCURRENT                     ,Used for I/O control" "RST,?..."
line.long 0x08 "NV_PDISP_SOR_PLL2_0,Configure The Main SOR PLL2"
bitfld.long 0x08 28.--31. " PLL_MDIV                      ,PLL M divider" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 26.--27. "                     CLKGEN_MODE                   ,CLKGEN mode" "LVDS,DP TMDS,?..."
textline "                                                            "
bitfld.long 0x08 25. " AUX9                          ,AUX9 - LVDSEN" "Allow,Override"
bitfld.long 0x08 24. "               AUX8                          ,AUX8 - sequencer PLLCAPPD enforce" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 23. " AUX7                          ,AUX7 - port powerdown" "Disabled,Enabled"
bitfld.long 0x08 22. "               AUX6                          ,AUX6 - bandgap powerdown" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 21. " AUX5                          ,AUX5 - link LVDS" "Single,Dual"
bitfld.long 0x08 20. "                 AUX4                          ,AUX4 - duplicate control" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 19. " AUX3                          ,AUX3 - rotate" "Disabled,Enabled"
bitfld.long 0x08 18. "               AUX2                          ,AUX2 - powerdown" "Override,Allow"
textline "                                                            "
bitfld.long 0x08 17. " AUX1                          ,AUX1 - sequencer PLLCAPPD" "Allow,Override"
bitfld.long 0x08 16. "               AUX0                          ,AUX0 - sequencer PLL pulldown" "Allow,Override"
textline "                                                            "
hexmask.long.byte 0x08 8.--15. 1. " PLL_NDIV                      ,PLL NDIV"
bitfld.long 0x08 4.--7. "                     PLL_PDIV                      ,PLL P divider" "BY 1,BY 2,BY 4,BY 8,BY 16,?..."
textline "                                                            "
bitfld.long 0x08 2.--3. " PLL_PDIV_MODE                 ,PLL PDIV mode" "LVDS mode,TMDS DP mode,EDP RATE3 mode,?..."
bitfld.long 0x08 1. "         DIV_RATIO_OVERRIDE            ,DIV ratio override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x08 0. " DCIR_PLL_RESET                ,DCIR PLL reset" "Override,Allow"
line.long 0x0C "NV_PDISP_SOR_PLL3_0,Directly Controls The SOR Analog Macro"
bitfld.long 0x0C 28.--31. " BG_TEMP_COEF                  ,Bandgap temperature coefficient" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 24.--27. "                     BG_VREF_LEVEL                 ,Bandgap output voltages" "0.588 V,0.602 V,0.616 V,0.63 V,0.644 V,0.658 V,0.672 V,0.686 V,0.7 V,0.714 V,0.728 V,0.742 V,0.756 V,0.77 V,0.784 V,0.798 V"
textline "                                                            "
hexmask.long.byte 0x0C 16.--23. 1. " TEST_REFCLK_EN                ,Test REFCLK EN"
bitfld.long 0x0C 14. "                     PLL_BYPASS                    ,PLL bypass" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x0C 13. " PLLVDD_MODE                   ,Field to determine the PLL voltage" "1.8 V,3.3 V"
bitfld.long 0x0C 12. "                  CLKDIST_MODE                  ,Clock distribution by CMOS/CML buffers" "CMOS,CML"
textline "                                                            "
bitfld.long 0x0C 8.--11. " AVDD10_LEVEL                  ,Internal regulated 1.0v voltage level control bits" ",,,0.95 V,1.00 V,1.05 V,1.10 V,?..."
bitfld.long 0x0C 4.--7. "                 AVDD14_LEVEL                  ,Internal regulated 1.4v voltage level control bits" ",,,1.35 V,1.40 V,1.45 V,1.50 V,?..."
textline "                                                            "
bitfld.long 0x0C 0.--1. " KICKSTART                     ,Short loop-filter [%] of AVDD14" "Disabled,Loop 40,Loop 50,Loop 60"
line.long 0x10 "NV_PDISP_SOR_PLL4_0,SOR NV PDISP SOR PLL4"
bitfld.long 0x10 24.--29. " SETUP_LCKDET                  ,Setup LCKDET" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 23. "                     LOCK_OVERRIDE                 ,Lock override" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x10 22. " ENABLE_LCKDET                 ,Enable LCKDET" "Enabled,Disabled"
rbitfld.long 0x10 21. "               LOCKDET                       ,Status signal indicating whether PLL is locked within the desired resolution" "Not locked,Locked"
textline "                                                            "
bitfld.long 0x10 6.--7. " AVDD10_LOAD                   ,Internal regulated 1.0V extra loading for stability control bits" "0 mA,1 mA,2 mA,3 mA"
bitfld.long 0x10 4.--5. "                   AVDD14_LOAD                   ,Internal regulated 1.4V extra loading for stability control bits" "0 uA,175 uA,350 uA,525 uA"
if (((per.l(ad:0x15580000+0x130))&0x01)==0x01)
group.long 0x5A0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x5A0++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL0_0,SOR DP PADCTL0"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
if (((per.l(ad:0x15580000+0x134))&0x01)==0x01)
group.long 0x5A4++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL 1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
bitfld.long 0x00 3. "               PD_TXD_3                      ,Controls to power down the lane 3" "Yes,No"
textline "                                                            "
bitfld.long 0x00 2. " PD_TXD_0                      ,Controls to power down the lane 0" "Yes,No"
bitfld.long 0x00 1. "                    PD_TXD_1                      ,Controls to power down the lane 1" "Yes,No"
textline "                                                            "
bitfld.long 0x00 0. " PD_TXD_2                      ,Controls to power down the lane 2" "Yes,No"
else
group.long 0x5A4++0x03
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL1_0,SOR DP PADCTL1"
bitfld.long 0x00 31. " VCOLIMIT_DISABLE              ,VCO-protection clamp disable" "No,Yes"
bitfld.long 0x00 30. "                    VCOCALIB_TS0                  ,VCO-calibration block counts" "96 cycles,128 cycles"
textline "                                                            "
bitfld.long 0x00 29. " VCOCALIB_OVERWRB              ,VCO-calibration block" "Disabled,Enabled"
bitfld.long 0x00 28. "               VCOCALIB_ENB                  ,VCO-calibration block" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 27. " LOADADJ_BYPN                  ,LOADADJ-calibration block" "Disabled,Enabled"
bitfld.long 0x00 26. "               LOADADJ_SYNC_EN               ,LOADADJ-calibration code" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 25. " VCOLIMIT_SEL                  ,Clamp counter counts" "128 cycles,32 cycles"
bitfld.long 0x00 24. "             VCO_2X                        ,VCO startup diagnostics control input to the DP analog macro" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 23. " PAD_CAL_PD                    ,Powerdown control for the pad calibration logic" "Powerup,Powerdown"
bitfld.long 0x00 22. "              TX_PU                         ,Pull-up current sources" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 20.--21. " REG_CTRL                      ,Internal regulator control" "0,1,2,3"
bitfld.long 0x00 16.--19. "                      VCMMODE                       ,VCM pin mode select" "Tristate,Test MUX,Weak pull-down,,Strong pull-down,?..."
textline "                                                            "
hexmask.long.byte 0x00 8.--15. 1. " TX_PU_VALUE                   ,TX pull-up current source drive"
bitfld.long 0x00 7. "                     COMMONMODE_TXD_3_DP_TXD_3     ,Common mode TXD 3 DP TXD 3" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 6. " COMMONMODE_TXD_2_DP_TXD_0     ,Common mode TXD 2 DP TXD 0" "Disabled,Enabled"
bitfld.long 0x00 5. "               COMMONMODE_TXD_1_DP_TXD_1     ,Common mode TXD 1 DP TXD 1" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x00 4. " COMMONMODE_TXD_0_DP_TXD_2     ,Common mode TXD 0 DP TXD 2" "Disabled,Enabled"
endif
group.long 0x5A8++0x23
line.long 0x00 "NV_PDISP_SOR_DP_PADCTL2_0,SOR DP PADCTL2"
hexmask.long.byte 0x00 24.--31. 1. " SPAREPLL                      ,Spare PLL"
bitfld.long 0x00 20.--23. "             SPARE4                        ,Spare 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 16.--19. " SPARE3                        ,Spare 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "             SPARE2                        ,Spare 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 8.--11. " SPARE1                        ,Spare 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "             SPARE0                        ,Spare 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                            "
bitfld.long 0x00 0. " REG_BYPASS                    ,REG bypass" "0,1"
line.long 0x04 "NV_PDISP_SOR_DP_PADCTL3_0,SOR DP PADCTL3"
hexmask.long.byte 0x04 24.--31. 1. " TX_PATTERN_GEN                ,TX pattern GEN"
line.long 0x08 "NV_PDISP_SOR_DP_BS,Program The Timing Of The Scrambler Reset"
bitfld.long 0x08 19. " OVERRIDE                      ,Override" "Done,Pending"
hexmask.long.word 0x08 10.--18. 1. "        CNT_STATUS                    ,Value of running BS count"
textline "                                                            "
rbitfld.long 0x08 9. " OVERRIDE_DEBUG                ,Reports the BS_OVERRIDE status of each of the 8-Lane DP primary/secondary pipelines" "Done,Pending"
hexmask.long.word 0x08 0.--8. 1. "        CNT                           ,Count"
line.long 0x0C "NV_PDISP_SOR_DP_MISC1_OVERRIDE_0,SOR DP MISC1 Override"
bitfld.long 0x0C 31. " CNTL                          ,CNTL" "Done,Pending"
bitfld.long 0x0C 0. "        ENABLE                        ,Enables MISC bit 6 overriding" "Disabled,Enabled"
line.long 0x10 "NV_PDISP_SOR_DP_MISC1_BIT6_0,SOR DP MISC1 Bit 6"
bitfld.long 0x10 0. " VAL                           ,Value" "0,1"
line.long 0x14 "NV_PDISP_DP_INT_STATUS_0,DP Interrupt Status"
eventfld.long 0x14 16. " LANE3_FIFO_OVERFLOW           ,Lane 3 FIFO overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 15. "  LANE2_FIFO_OVERFLOW           ,Lane 2 FIFO overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 14. " LANE1_FIFO_OVERFLOW           ,Lane 1 FIFO overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 13. "  LANE0_FIFO_OVERFLOW           ,Lane 0 FIFO overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 12. " SPKT_OVERRUN                  ,SPKT overrun" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 11. " LANE3_STEER_ERROR             ,Lane 3 steer error" "Not interrupt,Interrupt"
eventfld.long 0x14 10. "  LANE2_STEER_ERROR             ,Lane 2 steer error" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 9. " LANE1_STEER_ERROR             ,Lane 1 steer error" "Not interrupt,Interrupt"
eventfld.long 0x14 8. "  LANE0_STEER_ERROR             ,Lane 0 steer error" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 7. " LANE3_PIXPACK_OVERFLOW        ,Lane 3 pixpack overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 6. "  LANE2_PIXPACK_OVERFLOW        ,Lane 2 pixpack overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 5. " LANE1_PIXPACK_OVERFLOW        ,Lane 1 pixpack overflow" "Not interrupt,Interrupt"
eventfld.long 0x14 4. "  LANE0_PIXPACK_OVERFLOW        ,Lane 0 pixpack overflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 3. " LANE3_FIFO_UNDERFLOW          ,Lane 3 FIFO underflow" "Not interrupt,Interrupt"
eventfld.long 0x14 2. "  LANE2_FIFO_UNDERFLOW          ,Lane 2 FIFO underflow" "Not interrupt,Interrupt"
textline "                                                            "
eventfld.long 0x14 1. " LANE1_FIFO_UNDERFLOW          ,Lane 1 FIFO underflow" "Not interrupt,Interrupt"
eventfld.long 0x14 0. "  LANE0_FIFO_UNDERFLOW          ,Lane 0 FIFO underflow" "Not interrupt,Interrupt"
line.long 0x18 "NV_PDISP_DP_INT_MASK_0,DP Interrupt Mask"
bitfld.long 0x18 16. " LANE3_FIFO_OVERFLOW_MASK      ,LANE3 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x18 15. "     LANE2_FIFO_OVERFLOW_MASK      ,LANE2 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 14. " LANE1_FIFO_OVERFLOW_MASK      ,LANE1 FIFO overflow mask" "Masked,Not masked"
bitfld.long 0x18 13. "     LANE0_FIFO_OVERFLOW_MASK      ,LANE0 FIFO overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 12. " SPKT_OVERRUN_MASK             ,SPKT overrun mask" "Masked,Not masked"
bitfld.long 0x18 11. "     LANE3_STEER_ERROR_MASK        ,LANE3 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 10. " LANE2_STEER_ERROR_MASK        ,LANE2 steer error mask" "Masked,Not masked"
bitfld.long 0x18 9. "     LANE1_STEER_ERROR_MASK        ,LANE1 steer error mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 8. " LANE0_STEER_ERROR_MASK        ,LANE0 steer error mask" "Masked,Not masked"
bitfld.long 0x18 7. "     LANE3_PIXPACK_OVERFLOW_MASK   ,LANE3 pixpack overflow mask" "Masked,Not Masked"
textline "                                                            "
bitfld.long 0x18 6. " LANE2_PIXPACK_OVERFLOW_MASK   ,LANE2 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x18 5. "     LANE1_PIXPACK_OVERFLOW_MASK   ,LANE1 pixpack overflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 4. " LANE0_PIXPACK_OVERFLOW_MASK   ,LANE0 pixpack overflow mask" "Masked,Not masked"
bitfld.long 0x18 3. "     LANE3_FIFO_UNDERFLOW_MASK     ,LANE3 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 2. " LANE2_FIFO_UNDERFLOW_MASK     ,LANE2 FIFO underflow mask" "Masked,Not masked"
bitfld.long 0x18 1. "     LANE1_FIFO_UNDERFLOW_MASK     ,LANE1 FIFO underflow mask" "Masked,Not masked"
textline "                                                            "
bitfld.long 0x18 0. " LANE0_FIFO_UNDERFLOW_MASK     ,LANE0 FIFO underflow mask" "Masked,Not masked"
line.long 0x1C "NV_PDISP_DP_INT_ENABLE_0,DP Interrupt Enable"
bitfld.long 0x1C 16. " LANE3_FIFO_OVERFLOW_ENABLE    ,LANE3 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 15. "       LANE2_FIFO_OVERFLOW_ENABLE    ,LANE2 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 14. " LANE1_FIFO_OVERFLOW_ENABLE    ,LANE1 FIFO overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 13. "       LANE0_FIFO_OVERFLOW_ENABLE    ,LANE0 FIFO overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 12. " SPKT_OVERRUN_ENABLE           ,SPKT overrun enable" "Disabled,Enabled"
bitfld.long 0x1C 11. "       LANE3_STEER_ERROR_ENABLE      ,LANE3 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 10. " LANE2_STEER_ERROR_ENABLE      ,LANE2 steer error enable" "Disabled,Enabled"
bitfld.long 0x1C 9. "       LANE1_STEER_ERROR_ENABLE      ,LANE1 steer error enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 8. " LANE0_STEER_ERROR_ENABLE      ,LANE0 steer error enable" "Disabled,Enabled"
bitfld.long 0x1C 7. "       LANE3_PIXPACK_OVERFLOW_ENABLE ,LANE3 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 6. " LANE2_PIXPACK_OVERFLOW_ENABLE ,LANE2 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 5. "       LANE1_PIXPACK_OVERFLOW_ENABLE ,LANE1 pixpack overflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 4. " LANE0_PIXPACK_OVERFLOW_ENABLE ,LANE0 pixpack overflow enable" "Disabled,Enabled"
bitfld.long 0x1C 3. "       LANE3_FIFO_UNDERFLOW_ENABLE   ,LANE3 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 2. " LANE2_FIFO_UNDERFLOW_ENABLE   ,LANE2 FIFO underflow enable" "Disabled,Enabled"
bitfld.long 0x1C 1. "       LANE1_FIFO_UNDERFLOW_ENABLE   ,LANE1 FIFO underflow enable" "Disabled,Enabled"
textline "                                                            "
bitfld.long 0x1C 0. " LANE0_FIFO_UNDERFLOW_ENABLE   ,LANE0 FIFO underflow enable" "Disabled,Enabled"
line.long 0x20 "NV_PDISP_SOR_VPR_POLICY_0,SOR VPR Policy Table Register"
bitfld.long 0x20 3. " ALLOW_DIGITAL_OUT             ,Allow digital output" "Disallow,Allow"
bitfld.long 0x20 2. "       ALLOW_INTERNAL_PANEL          ,Allow internal panel output" "Disallow,Allow"
textline "                                                            "
bitfld.long 0x20 1. " ALLOW_HDCP1X_PROTECTED        , Allow HDCP1.x protected output" "Disallow,Allow"
bitfld.long 0x20 0. "       ALLOW_HDCP22_PROTECTED        ,Allow HDCP2.2 protected output" "Disallow,Allow"
endif
width 0x0B
tree.end
tree "DCP KFUSE Control Registers"
base ad:0x03830000
width 18.
group.long 0x80++0x03
line.long 0x00 "STATE_0,Commands And Status For ECC Mode"
bitfld.long 0x00 31. " SOFTRESET ,Soft reset" "0,1"
bitfld.long 0x00 25. "                  STOP     ,Stop" "0,1"
bitfld.long 0x00 24. "          RESTART  ,Restart" "0,1"
rbitfld.long 0x00 17. "          CRCPASS ,CRC pass" "Fail,Pass"
textline "                           "
rbitfld.long 0x00 16. " DONE      ,DONE" "0,1"
rbitfld.long 0x00 8.--13. "                  ERRBLOCK ,Contains offset of first errored block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "         CURBLOCK ,Counter of current block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rgroup.long 0x84++0x03
line.long 0x00 "ERRCOUNT_0,ECC Decode Error Count"
hexmask.long.byte 0x00 24.--30. 1. " ERR_FATAL ,Number of uncorrectable errors"
hexmask.long.byte 0x00 16.--22. 1. "                 ERR_3    ,Number of correctable 3-bit errors"
hexmask.long.byte 0x00 8.--14. 1. "         ERR_2    ,Number of correctable 2-bit errors"
hexmask.long.byte 0x00 0.--6. 1. "         ERR_1   ,Number of correctable 1-bit errors"
group.long 0x88++0x03
line.long 0x00 "KEYADDR_0,Key Address"
bitfld.long 0x00 16. " AUTOINC   ,Auto incrementation" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 0x01 "           ADDR     ,Word address"
rgroup.long 0x8C++0x03
line.long 0x00 "KEYS_0,Keys"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CG1_0,Clock Gating 1"
bitfld.long 0x00 0. " SLCG_CTRL ,Kfuse block SLCG(clock gating) enable" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "PD_0,PD"
rbitfld.long 0x00 1. " STATUS    ,PD status bit" "Power up,Power down"
bitfld.long 0x00 0. "         CTRL     ,PD (POWER DOWN) feature" "Power up,Power down"
width 0x0B
tree.end
tree "HDA Registers"
base ad:0x03510000
width 33.
group.long 0x0++0x03
line.long 0x00 "AXI_BAR0_SZ_0,AXI BAR0 mapping"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE                       ,Size of the address range associated with BAR0"
group.long 0x4++0x03
line.long 0x00 "AXI_BAR1_SZ_0,AXI BAR1 mapping"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE                       ,Size of the address range associated with BAR1"
group.long 0x8++0x03
line.long 0x00 "AXI_BAR2_SZ_0,AXI BAR2 mapping"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE                       ,Size of the address range associated with BAR2"
group.long 0xC++0x03
line.long 0x00 "AXI_BAR3_SZ_0,AXI BAR3 mapping"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE                       ,Size of the address range associated with BAR3"
group.long 0x40++0x03
line.long 0x00 "AXI_BAR0_START_0,AXI BAR0 mapping"
hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR0_START                      ,Start of AXI address space for BAR0"
group.long 0x44++0x03
line.long 0x00 "AXI_BAR1_START_0,AXI BAR1 mapping"
hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR1_START                      ,Start of AXI address space for BAR1"
group.long 0x48++0x03
line.long 0x00 "AXI_BAR2_START_0,AXI BAR2 mapping"
hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR2_START                      ,Start of AXI address space for BAR2"
group.long 0x4C++0x03
line.long 0x00 "AXI_BAR3_START_0,AXI BAR3 mapping"
hexmask.long.tbyte 0x00 12.--31. 1. " AXI_BAR3_START                      ,Start of AXI address space for BAR3"
group.long 0x80++0x03
line.long 0x00 "FPCI_BAR0_0,AXI BAR0 mapping"
hexmask.long 0x00 4.--31. 1. " FPCI_BAR0_START                     ,FPCI address space mapped into the BAR0"
bitfld.long 0x00 0. "                     FPCI_BAR0_ACCESS_TYPE             ,Address region memory mapped indicator" "Memory mapped access,I\O config access"
group.long 0x84++0x03
line.long 0x00 "FPCI_BAR1_0,AXI BAR1 mapping"
hexmask.long 0x00 4.--31. 1. " FPCI_BAR1_START                     ,FPCI address space mapped into the BAR1"
bitfld.long 0x00 0. "                     FPCI_BAR1_ACCESS_TYPE             ,Address region memory mapped indicator" "Memory mapped access,I\O config access"
group.long 0x88++0x03
line.long 0x00 "FPCI_BAR2_0,AXI BAR2 mapping"
hexmask.long 0x00 4.--31. 1. " FPCI_BAR2_START                     ,FPCI address space mapped into the BAR2"
bitfld.long 0x00 0. "                     FPCI_BAR2_ACCESS_TYPE             ,Address region memory mapped indicator" "Memory mapped access,I\O config access"
group.long 0x8C++0x03
line.long 0x00 "FPCI_BAR3_0,AXI BAR3 mapping"
hexmask.long 0x00 4.--31. 1. " FPCI_BAR3_START                     ,FPCI address space mapped into the BAR3"
bitfld.long 0x00 0. "                     FPCI_BAR3_ACCESS_TYPE             ,Address region memory mapped indicator" "Memory mapped access,I\O config access"
group.long 0xC0++0x0B
line.long 0x00 "MSI_BAR_SZ_0,MSI BAR SIZE"
hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE                        ,Size of the address range associated with MSI BAR"
line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR START"
hexmask.long.tbyte 0x04 12.--31. 1. " MSI_AXI_BAR_START                   ,Start of upstream AXI address space for MSI BAR"
line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR START"
hexmask.long 0x08 4.--31. 1. " MSI_FPCI_BAR_START                  ,Start of upstream FPCI address space for MSI BAR"
group.long 0x100++0x1F
line.long 0x00 "MSI_VEC0_0,MSI VECTOR0"
bitfld.long 0x00 31. " MSI_VECTOR[31]                      ,MSI vector 31" "0,1"
bitfld.long 0x00 30. "                            [30]                              ,MSI vector 30" "0,1"
textline "                                          "
bitfld.long 0x00 29. "           [29]                      ,MSI vector 29" "0,1"
bitfld.long 0x00 28. "                            [28]                              ,MSI vector 28" "0,1"
textline "                                          "
bitfld.long 0x00 27. "           [27]                      ,MSI vector 27" "0,1"
bitfld.long 0x00 26. "                            [26]                              ,MSI vector 26" "0,1"
textline "                                          "
bitfld.long 0x00 25. "           [25]                      ,MSI vector 25" "0,1"
bitfld.long 0x00 24. "                            [24]                              ,MSI vector 24" "0,1"
textline "                                          "
bitfld.long 0x00 23. "           [23]                      ,MSI vector 23" "0,1"
bitfld.long 0x00 22. "                            [22]                              ,MSI vector 22" "0,1"
textline "                                          "
bitfld.long 0x00 21. "           [21]                      ,MSI vector 21" "0,1"
bitfld.long 0x00 20. "                            [20]                              ,MSI vector 20" "0,1"
textline "                                          "
bitfld.long 0x00 19. "           [19]                      ,MSI vector 19" "0,1"
bitfld.long 0x00 18. "                            [18]                              ,MSI vector 18" "0,1"
textline "                                          "
bitfld.long 0x00 17. "           [17]                      ,MSI vector 17" "0,1"
bitfld.long 0x00 16. "                            [16]                              ,MSI vector 16" "0,1"
textline "                                          "
bitfld.long 0x00 15. "           [15]                      ,MSI vector 15" "0,1"
bitfld.long 0x00 14. "                            [14]                              ,MSI vector 14" "0,1"
textline "                                          "
bitfld.long 0x00 13. "           [13]                      ,MSI vector 13" "0,1"
bitfld.long 0x00 12. "                            [12]                              ,MSI vector 12" "0,1"
textline "                                          "
bitfld.long 0x00 11. "           [11]                      ,MSI vector 11" "0,1"
bitfld.long 0x00 10. "                            [10]                              ,MSI vector 10" "0,1"
textline "                                          "
bitfld.long 0x00 9. "           [9]                       ,MSI vector 9" "0,1"
bitfld.long 0x00 8. "                            [8]                               ,MSI vector 8" "0,1"
textline "                                          "
bitfld.long 0x00 7. "           [7]                       ,MSI vector 7" "0,1"
bitfld.long 0x00 6. "                            [6]                               ,MSI vector 6" "0,1"
textline "                                          "
bitfld.long 0x00 5. "           [5]                       ,MSI vector 5" "0,1"
bitfld.long 0x00 4. "                            [4]                               ,MSI vector 4" "0,1"
textline "                                          "
bitfld.long 0x00 3. "           [3]                       ,MSI vector 3" "0,1"
bitfld.long 0x00 2. "                            [2]                               ,MSI vector 2" "0,1"
textline "                                          "
bitfld.long 0x00 1. "           [1]                       ,MSI vector 1" "0,1"
bitfld.long 0x00 0. "                            [0]                               ,MSI vector 0" "0,1"
line.long 0x04 "MSI_VEC1_0,MSI VECTOR1"
bitfld.long 0x04 31. " MSI_VECTOR[63]                      ,MSI vector 63" "0,1"
bitfld.long 0x04 30. "                            [62]                              ,MSI vector 62" "0,1"
textline "                                          "
bitfld.long 0x04 29. "           [61]                      ,MSI vector 61" "0,1"
bitfld.long 0x04 28. "                            [60]                              ,MSI vector 60" "0,1"
textline "                                          "
bitfld.long 0x04 27. "           [59]                      ,MSI vector 59" "0,1"
bitfld.long 0x04 26. "                            [58]                              ,MSI vector 58" "0,1"
textline "                                          "
bitfld.long 0x04 25. "           [57]                      ,MSI vector 57" "0,1"
bitfld.long 0x04 24. "                            [56]                              ,MSI vector 56" "0,1"
textline "                                          "
bitfld.long 0x04 23. "           [55]                      ,MSI vector 55" "0,1"
bitfld.long 0x04 22. "                            [54]                              ,MSI vector 54" "0,1"
textline "                                          "
bitfld.long 0x04 21. "           [53]                      ,MSI vector 53" "0,1"
bitfld.long 0x04 20. "                            [52]                              ,MSI vector 52" "0,1"
textline "                                          "
bitfld.long 0x04 19. "           [51]                      ,MSI vector 51" "0,1"
bitfld.long 0x04 18. "                            [50]                              ,MSI vector 50" "0,1"
textline "                                          "
bitfld.long 0x04 17. "           [49]                      ,MSI vector 49" "0,1"
bitfld.long 0x04 16. "                            [48]                              ,MSI vector 48" "0,1"
textline "                                          "
bitfld.long 0x04 15. "           [47]                      ,MSI vector 47" "0,1"
bitfld.long 0x04 14. "                            [46]                              ,MSI vector 46" "0,1"
textline "                                          "
bitfld.long 0x04 13. "           [45]                      ,MSI vector 45" "0,1"
bitfld.long 0x04 12. "                            [44]                              ,MSI vector 44" "0,1"
textline "                                          "
bitfld.long 0x04 11. "           [43]                      ,MSI vector 43" "0,1"
bitfld.long 0x04 10. "                            [42]                              ,MSI vector 42" "0,1"
textline "                                          "
bitfld.long 0x04 9. "           [41]                      ,MSI vector 41" "0,1"
bitfld.long 0x04 8. "                            [40]                              ,MSI vector 40" "0,1"
textline "                                          "
bitfld.long 0x04 7. "           [39]                      ,MSI vector 39" "0,1"
bitfld.long 0x04 6. "                            [38]                              ,MSI vector 38" "0,1"
textline "                                          "
bitfld.long 0x04 5. "           [37]                      ,MSI vector 37" "0,1"
bitfld.long 0x04 4. "                            [36]                              ,MSI vector 36" "0,1"
textline "                                          "
bitfld.long 0x04 3. "           [35]                      ,MSI vector 35" "0,1"
bitfld.long 0x04 2. "                            [34]                              ,MSI vector 34" "0,1"
textline "                                          "
bitfld.long 0x04 1. "           [33]                      ,MSI vector 33" "0,1"
bitfld.long 0x04 0. "                            [32]                              ,MSI vector 32" "0,1"
line.long 0x08 "MSI_VEC2_0,MSI VECTOR2"
bitfld.long 0x08 31. " MSI_VECTOR[95]                      ,MSI vector 95" "0,1"
bitfld.long 0x08 30. "                            [94]                              ,MSI vector 94" "0,1"
textline "                                          "
bitfld.long 0x08 29. "           [93]                      ,MSI vector 93" "0,1"
bitfld.long 0x08 28. "                            [92]                              ,MSI vector 92" "0,1"
textline "                                          "
bitfld.long 0x08 27. "           [91]                      ,MSI vector 91" "0,1"
bitfld.long 0x08 26. "                            [90]                              ,MSI vector 90" "0,1"
textline "                                          "
bitfld.long 0x08 25. "           [89]                      ,MSI vector 89" "0,1"
bitfld.long 0x08 24. "                            [88]                              ,MSI vector 88" "0,1"
textline "                                          "
bitfld.long 0x08 23. "           [87]                      ,MSI vector 87" "0,1"
bitfld.long 0x08 22. "                            [86]                              ,MSI vector 86" "0,1"
textline "                                          "
bitfld.long 0x08 21. "           [85]                      ,MSI vector 85" "0,1"
bitfld.long 0x08 20. "                            [84]                              ,MSI vector 84" "0,1"
textline "                                          "
bitfld.long 0x08 19. "           [83]                      ,MSI vector 83" "0,1"
bitfld.long 0x08 18. "                            [82]                              ,MSI vector 82" "0,1"
textline "                                          "
bitfld.long 0x08 17. "           [81]                      ,MSI vector 81" "0,1"
bitfld.long 0x08 16. "                            [80]                              ,MSI vector 80" "0,1"
textline "                                          "
bitfld.long 0x08 15. "           [79]                      ,MSI vector 79" "0,1"
bitfld.long 0x08 14. "                            [78]                              ,MSI vector 78" "0,1"
textline "                                          "
bitfld.long 0x08 13. "           [77]                      ,MSI vector 77" "0,1"
bitfld.long 0x08 12. "                            [76]                              ,MSI vector 76" "0,1"
textline "                                          "
bitfld.long 0x08 11. "           [75]                      ,MSI vector 75" "0,1"
bitfld.long 0x08 10. "                            [74]                              ,MSI vector 74" "0,1"
textline "                                          "
bitfld.long 0x08 9. "           [73]                      ,MSI vector 73" "0,1"
bitfld.long 0x08 8. "                            [72]                              ,MSI vector 72" "0,1"
textline "                                          "
bitfld.long 0x08 7. "           [71]                      ,MSI vector 71" "0,1"
bitfld.long 0x08 6. "                            [70]                              ,MSI vector 70" "0,1"
textline "                                          "
bitfld.long 0x08 5. "           [69]                      ,MSI vector 69" "0,1"
bitfld.long 0x08 4. "                            [68]                              ,MSI vector 68" "0,1"
textline "                                          "
bitfld.long 0x08 3. "           [67]                      ,MSI vector 67" "0,1"
bitfld.long 0x08 2. "                            [66]                              ,MSI vector 66" "0,1"
textline "                                          "
bitfld.long 0x08 1. "           [65]                      ,MSI vector 65" "0,1"
bitfld.long 0x08 0. "                            [64]                              ,MSI vector 64" "0,1"
line.long 0x0C "MSI_VEC3_0,MSI VECTOR3"
bitfld.long 0x0C 31. " MSI_VECTOR[127]                     ,MSI vector 127" "0,1"
bitfld.long 0x0C 30. "                            [126]                             ,MSI vector 126" "0,1"
textline "                                          "
bitfld.long 0x0C 29. "           [125]                     ,MSI vector 125" "0,1"
bitfld.long 0x0C 28. "                            [124]                             ,MSI vector 124" "0,1"
textline "                                          "
bitfld.long 0x0C 27. "           [123]                     ,MSI vector 123" "0,1"
bitfld.long 0x0C 26. "                            [122]                             ,MSI vector 122" "0,1"
textline "                                          "
bitfld.long 0x0C 25. "           [121]                     ,MSI vector 121" "0,1"
bitfld.long 0x0C 24. "                            [120]                             ,MSI vector 120" "0,1"
textline "                                          "
bitfld.long 0x0C 23. "           [119]                     ,MSI vector 119" "0,1"
bitfld.long 0x0C 22. "                            [118]                             ,MSI vector 118" "0,1"
textline "                                          "
bitfld.long 0x0C 21. "           [117]                     ,MSI vector 117" "0,1"
bitfld.long 0x0C 20. "                            [116]                             ,MSI vector 116" "0,1"
textline "                                          "
bitfld.long 0x0C 19. "           [115]                     ,MSI vector 115" "0,1"
bitfld.long 0x0C 18. "                            [114]                             ,MSI vector 114" "0,1"
textline "                                          "
bitfld.long 0x0C 17. "           [113]                     ,MSI vector 113" "0,1"
bitfld.long 0x0C 16. "                            [112]                             ,MSI vector 112" "0,1"
textline "                                          "
bitfld.long 0x0C 15. "           [111]                     ,MSI vector 111" "0,1"
bitfld.long 0x0C 14. "                            [110]                             ,MSI vector 110" "0,1"
textline "                                          "
bitfld.long 0x0C 13. "           [109]                     ,MSI vector 109" "0,1"
bitfld.long 0x0C 12. "                            [108]                             ,MSI vector 108" "0,1"
textline "                                          "
bitfld.long 0x0C 11. "           [107]                     ,MSI vector 107" "0,1"
bitfld.long 0x0C 10. "                            [106]                             ,MSI vector 106" "0,1"
textline "                                          "
bitfld.long 0x0C 9. "           [105]                     ,MSI vector 105" "0,1"
bitfld.long 0x0C 8. "                            [104]                             ,MSI vector 104" "0,1"
textline "                                          "
bitfld.long 0x0C 7. "           [103]                     ,MSI vector 103" "0,1"
bitfld.long 0x0C 6. "                            [102]                             ,MSI vector 102" "0,1"
textline "                                          "
bitfld.long 0x0C 5. "           [101]                     ,MSI vector 101" "0,1"
bitfld.long 0x0C 4. "                            [100]                             ,MSI vector 100" "0,1"
textline "                                          "
bitfld.long 0x0C 3. "           [99]                      ,MSI vector 99" "0,1"
bitfld.long 0x0C 2. "                            [98]                              ,MSI vector 98" "0,1"
textline "                                          "
bitfld.long 0x0C 1. "           [97]                      ,MSI vector 97" "0,1"
bitfld.long 0x0C 0. "                            [96]                              ,MSI vector 96" "0,1"
line.long 0x10 "MSI_VEC4_0,MSI VECTOR4"
bitfld.long 0x10 31. " MSI_VECTOR[159]                     ,MSI vector 159" "0,1"
bitfld.long 0x10 30. "                            [158]                             ,MSI vector 158" "0,1"
textline "                                          "
bitfld.long 0x10 29. "           [157]                     ,MSI vector 157" "0,1"
bitfld.long 0x10 28. "                            [156]                             ,MSI vector 156" "0,1"
textline "                                          "
bitfld.long 0x10 27. "           [155]                     ,MSI vector 155" "0,1"
bitfld.long 0x10 26. "                            [154]                             ,MSI vector 154" "0,1"
textline "                                          "
bitfld.long 0x10 25. "           [153]                     ,MSI vector 153" "0,1"
bitfld.long 0x10 24. "                            [152]                             ,MSI vector 152" "0,1"
textline "                                          "
bitfld.long 0x10 23. "           [151]                     ,MSI vector 151" "0,1"
bitfld.long 0x10 22. "                            [150]                             ,MSI vector 150" "0,1"
textline "                                          "
bitfld.long 0x10 21. "           [149]                     ,MSI vector 149" "0,1"
bitfld.long 0x10 20. "                            [148]                             ,MSI vector 148" "0,1"
textline "                                          "
bitfld.long 0x10 19. "           [147]                     ,MSI vector 147" "0,1"
bitfld.long 0x10 18. "                            [146]                             ,MSI vector 146" "0,1"
textline "                                          "
bitfld.long 0x10 17. "           [145]                     ,MSI vector 145" "0,1"
bitfld.long 0x10 16. "                            [144]                             ,MSI vector 144" "0,1"
textline "                                          "
bitfld.long 0x10 15. "           [143]                     ,MSI vector 143" "0,1"
bitfld.long 0x10 14. "                            [142]                             ,MSI vector 142" "0,1"
textline "                                          "
bitfld.long 0x10 13. "           [141]                     ,MSI vector 141" "0,1"
bitfld.long 0x10 12. "                            [140]                             ,MSI vector 140" "0,1"
textline "                                          "
bitfld.long 0x10 11. "           [139]                     ,MSI vector 139" "0,1"
bitfld.long 0x10 10. "                            [138]                             ,MSI vector 138" "0,1"
textline "                                          "
bitfld.long 0x10 9. "           [137]                     ,MSI vector 137" "0,1"
bitfld.long 0x10 8. "                            [136]                             ,MSI vector 136" "0,1"
textline "                                          "
bitfld.long 0x10 7. "           [135]                     ,MSI vector 135" "0,1"
bitfld.long 0x10 6. "                            [134]                             ,MSI vector 134" "0,1"
textline "                                          "
bitfld.long 0x10 5. "           [133]                     ,MSI vector 133" "0,1"
bitfld.long 0x10 4. "                            [132]                             ,MSI vector 132" "0,1"
textline "                                          "
bitfld.long 0x10 3. "           [131]                     ,MSI vector 131" "0,1"
bitfld.long 0x10 2. "                            [130]                             ,MSI vector 130" "0,1"
textline "                                          "
bitfld.long 0x10 1. "           [129]                     ,MSI vector 129" "0,1"
bitfld.long 0x10 0. "                            [128]                             ,MSI vector 128" "0,1"
line.long 0x14 "MSI_VEC5_0,MSI VECTOR5"
bitfld.long 0x14 31. " MSI_VECTOR[191]                     ,MSI vector 191" "0,1"
bitfld.long 0x14 30. "                            [190]                             ,MSI vector 190" "0,1"
textline "                                          "
bitfld.long 0x14 29. "           [189]                     ,MSI vector 189" "0,1"
bitfld.long 0x14 28. "                            [188]                             ,MSI vector 188" "0,1"
textline "                                          "
bitfld.long 0x14 27. "           [187]                     ,MSI vector 187" "0,1"
bitfld.long 0x14 26. "                            [186]                             ,MSI vector 186" "0,1"
textline "                                          "
bitfld.long 0x14 25. "           [185]                     ,MSI vector 185" "0,1"
bitfld.long 0x14 24. "                            [184]                             ,MSI vector 184" "0,1"
textline "                                          "
bitfld.long 0x14 23. "           [183]                     ,MSI vector 183" "0,1"
bitfld.long 0x14 22. "                            [182]                             ,MSI vector 182" "0,1"
textline "                                          "
bitfld.long 0x14 21. "           [181]                     ,MSI vector 181" "0,1"
bitfld.long 0x14 20. "                            [180]                             ,MSI vector 180" "0,1"
textline "                                          "
bitfld.long 0x14 19. "           [179]                     ,MSI vector 179" "0,1"
bitfld.long 0x14 18. "                            [178]                             ,MSI vector 178" "0,1"
textline "                                          "
bitfld.long 0x14 17. "           [177]                     ,MSI vector 177" "0,1"
bitfld.long 0x14 16. "                            [176]                             ,MSI vector 176" "0,1"
textline "                                          "
bitfld.long 0x14 15. "           [175]                     ,MSI vector 175" "0,1"
bitfld.long 0x14 14. "                            [174]                             ,MSI vector 174" "0,1"
textline "                                          "
bitfld.long 0x14 13. "           [173]                     ,MSI vector 173" "0,1"
bitfld.long 0x14 12. "                            [172]                             ,MSI vector 172" "0,1"
textline "                                          "
bitfld.long 0x14 11. "           [171]                     ,MSI vector 171" "0,1"
bitfld.long 0x14 10. "                            [170]                             ,MSI vector 170" "0,1"
textline "                                          "
bitfld.long 0x14 9. "           [169]                     ,MSI vector 169" "0,1"
bitfld.long 0x14 8. "                            [168]                             ,MSI vector 168" "0,1"
textline "                                          "
bitfld.long 0x14 7. "           [167]                     ,MSI vector 167" "0,1"
bitfld.long 0x14 6. "                            [166]                             ,MSI vector 166" "0,1"
textline "                                          "
bitfld.long 0x14 5. "           [165]                     ,MSI vector 165" "0,1"
bitfld.long 0x14 4. "                            [164]                             ,MSI vector 164" "0,1"
textline "                                          "
bitfld.long 0x14 3. "           [163]                     ,MSI vector 163" "0,1"
bitfld.long 0x14 2. "                            [162]                             ,MSI vector 162" "0,1"
textline "                                          "
bitfld.long 0x14 1. "           [161]                     ,MSI vector 161" "0,1"
bitfld.long 0x14 0. "                            [160]                             ,MSI vector 160" "0,1"
line.long 0x18 "MSI_VEC6_0,MSI VECTOR6"
bitfld.long 0x18 31. " MSI_VECTOR[223]                     ,MSI vector 223" "0,1"
bitfld.long 0x18 30. "                            [222]                             ,MSI vector 222" "0,1"
textline "                                          "
bitfld.long 0x18 29. "           [221]                     ,MSI vector 221" "0,1"
bitfld.long 0x18 28. "                            [220]                             ,MSI vector 220" "0,1"
textline "                                          "
bitfld.long 0x18 27. "           [219]                     ,MSI vector 219" "0,1"
bitfld.long 0x18 26. "                            [218]                             ,MSI vector 218" "0,1"
textline "                                          "
bitfld.long 0x18 25. "           [217]                     ,MSI vector 217" "0,1"
bitfld.long 0x18 24. "                            [216]                             ,MSI vector 216" "0,1"
textline "                                          "
bitfld.long 0x18 23. "           [215]                     ,MSI vector 215" "0,1"
bitfld.long 0x18 22. "                            [214]                             ,MSI vector 214" "0,1"
textline "                                          "
bitfld.long 0x18 21. "           [213]                     ,MSI vector 213" "0,1"
bitfld.long 0x18 20. "                            [212]                             ,MSI vector 212" "0,1"
textline "                                          "
bitfld.long 0x18 19. "           [211]                     ,MSI vector 211" "0,1"
bitfld.long 0x18 18. "                            [210]                             ,MSI vector 210" "0,1"
textline "                                          "
bitfld.long 0x18 17. "           [209]                     ,MSI vector 209" "0,1"
bitfld.long 0x18 16. "                            [208]                             ,MSI vector 208" "0,1"
textline "                                          "
bitfld.long 0x18 15. "           [207]                     ,MSI vector 207" "0,1"
bitfld.long 0x18 14. "                            [206]                             ,MSI vector 206" "0,1"
textline "                                          "
bitfld.long 0x18 13. "           [205]                     ,MSI vector 205" "0,1"
bitfld.long 0x18 12. "                            [204]                             ,MSI vector 204" "0,1"
textline "                                          "
bitfld.long 0x18 11. "           [203]                     ,MSI vector 203" "0,1"
bitfld.long 0x18 10. "                            [202]                             ,MSI vector 202" "0,1"
textline "                                          "
bitfld.long 0x18 9. "           [201]                     ,MSI vector 201" "0,1"
bitfld.long 0x18 8. "                            [200]                             ,MSI vector 200" "0,1"
textline "                                          "
bitfld.long 0x18 7. "           [199]                     ,MSI vector 199" "0,1"
bitfld.long 0x18 6. "                            [198]                             ,MSI vector 198" "0,1"
textline "                                          "
bitfld.long 0x18 5. "           [197]                     ,MSI vector 197" "0,1"
bitfld.long 0x18 4. "                            [196]                             ,MSI vector 196" "0,1"
textline "                                          "
bitfld.long 0x18 3. "           [195]                     ,MSI vector 195" "0,1"
bitfld.long 0x18 2. "                            [194]                             ,MSI vector 194" "0,1"
textline "                                          "
bitfld.long 0x18 1. "           [193]                     ,MSI vector 193" "0,1"
bitfld.long 0x18 0. "                            [192]                             ,MSI vector 192" "0,1"
line.long 0x1C "MSI_VEC7_0,MSI VECTOR7"
bitfld.long 0x1C 31. " MSI_VECTOR[255]                     ,MSI vector 255" "0,1"
bitfld.long 0x1C 30. "                            [254]                             ,MSI vector 254" "0,1"
textline "                                          "
bitfld.long 0x1C 29. "           [253]                     ,MSI vector 253" "0,1"
bitfld.long 0x1C 28. "                            [252]                             ,MSI vector 252" "0,1"
textline "                                          "
bitfld.long 0x1C 27. "           [251]                     ,MSI vector 251" "0,1"
bitfld.long 0x1C 26. "                            [250]                             ,MSI vector 250" "0,1"
textline "                                          "
bitfld.long 0x1C 25. "           [249]                     ,MSI vector 249" "0,1"
bitfld.long 0x1C 24. "                            [248]                             ,MSI vector 248" "0,1"
textline "                                          "
bitfld.long 0x1C 23. "           [247]                     ,MSI vector 247" "0,1"
bitfld.long 0x1C 22. "                            [246]                             ,MSI vector 246" "0,1"
textline "                                          "
bitfld.long 0x1C 21. "           [245]                     ,MSI vector 245" "0,1"
bitfld.long 0x1C 20. "                            [244]                             ,MSI vector 244" "0,1"
textline "                                          "
bitfld.long 0x1C 19. "           [243]                     ,MSI vector 243" "0,1"
bitfld.long 0x1C 18. "                            [242]                             ,MSI vector 242" "0,1"
textline "                                          "
bitfld.long 0x1C 17. "           [241]                     ,MSI vector 241" "0,1"
bitfld.long 0x1C 16. "                            [240]                             ,MSI vector 240" "0,1"
textline "                                          "
bitfld.long 0x1C 15. "           [239]                     ,MSI vector 239" "0,1"
bitfld.long 0x1C 14. "                            [238]                             ,MSI vector 238" "0,1"
textline "                                          "
bitfld.long 0x1C 13. "           [237]                     ,MSI vector 237" "0,1"
bitfld.long 0x1C 12. "                            [236]                             ,MSI vector 236" "0,1"
textline "                                          "
bitfld.long 0x1C 11. "           [235]                     ,MSI vector 235" "0,1"
bitfld.long 0x1C 10. "                            [234]                             ,MSI vector 234" "0,1"
textline "                                          "
bitfld.long 0x1C 9. "           [233]                     ,MSI vector 233" "0,1"
bitfld.long 0x1C 8. "                            [232]                             ,MSI vector 232" "0,1"
textline "                                          "
bitfld.long 0x1C 7. "           [231]                     ,MSI vector 231" "0,1"
bitfld.long 0x1C 6. "                            [230]                             ,MSI vector 230" "0,1"
textline "                                          "
bitfld.long 0x1C 5. "           [229]                     ,MSI vector 229" "0,1"
bitfld.long 0x1C 4. "                            [228]                             ,MSI vector 228" "0,1"
textline "                                          "
bitfld.long 0x1C 3. "           [227]                     ,MSI vector 227" "0,1"
bitfld.long 0x1C 2. "                            [226]                             ,MSI vector 226" "0,1"
textline "                                          "
bitfld.long 0x1C 1. "           [225]                     ,MSI vector 225" "0,1"
bitfld.long 0x1C 0. "                            [224]                             ,MSI vector 224" "0,1"
group.long 0x140++0x1F
line.long 0x00 "MSI_EN_VEC0_0,MSI ENABLE VECTOR0"
bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[32]               ,MSI enable vector 32" "Disabled,Enabled"
bitfld.long 0x00 30. "                     [31]                              ,MSI enable vector 31" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 29. "                  [30]               ,MSI enable vector 30" "Disabled,Enabled"
bitfld.long 0x00 28. "                     [29]                              ,MSI enable vector 29" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 27. "                  [28]               ,MSI enable vector 28" "Disabled,Enabled"
bitfld.long 0x00 26. "                     [27]                              ,MSI enable vector 27" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 25. "                  [26]               ,MSI enable vector 26" "Disabled,Enabled"
bitfld.long 0x00 24. "                     [25]                              ,MSI enable vector 25" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 23. "                  [24]               ,MSI enable vector 24" "Disabled,Enabled"
bitfld.long 0x00 22. "                     [23]                              ,MSI enable vector 23" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 21. "                  [22]               ,MSI enable vector 22" "Disabled,Enabled"
bitfld.long 0x00 20. "                     [21]                              ,MSI enable vector 21" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 19. "                  [20]               ,MSI enable vector 20" "Disabled,Enabled"
bitfld.long 0x00 18. "                     [19]                              ,MSI enable vector 19" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 17. "                  [18]               ,MSI enable vector 18" "Disabled,Enabled"
bitfld.long 0x00 16. "                     [17]                              ,MSI enable vector 17" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 15. "                  [16]               ,MSI enable vector 16" "Disabled,Enabled"
bitfld.long 0x00 14. "                     [15]                              ,MSI enable vector 15" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 13. "                  [14]               ,MSI enable vector 14" "Disabled,Enabled"
bitfld.long 0x00 12. "                     [13]                              ,MSI enable vector 13" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 11. "                  [12]               ,MSI enable vector 12" "Disabled,Enabled"
bitfld.long 0x00 10. "                     [11]                              ,MSI enable vector 11" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 9. "                  [10]               ,MSI enable vector 10" "Disabled,Enabled"
bitfld.long 0x00 8. "                     [9]                               ,MSI enable vector 9" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 7. "                  [8]                ,MSI enable vector 8" "Disabled,Enabled"
bitfld.long 0x00 6. "                     [7]                               ,MSI enable vector 7" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 5. "                  [6]                ,MSI enable vector 6" "Disabled,Enabled"
bitfld.long 0x00 4. "                     [5]                               ,MSI enable vector 5" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 3. "                  [4]                ,MSI enable vector 4" "Disabled,Enabled"
bitfld.long 0x00 2. "                     [3]                               ,MSI enable vector 3" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 1. "                  [2]                ,MSI enable vector 2" "Disabled,Enabled"
bitfld.long 0x00 0. "                     [1]                               ,MSI enable vector 1" "Disabled,Enabled"
line.long 0x04 "MSI_EN_VEC0_1,MSI ENABLE VECTOR1"
bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63]               ,MSI enable vector 63" "Disabled,Enabled"
bitfld.long 0x04 30. "                     [62]                              ,MSI enable vector 62" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 29. "                  [61]               ,MSI enable vector 61" "Disabled,Enabled"
bitfld.long 0x04 28. "                     [60]                              ,MSI enable vector 60" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 27. "                  [59]               ,MSI enable vector 59" "Disabled,Enabled"
bitfld.long 0x04 26. "                     [58]                              ,MSI enable vector 58" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 25. "                  [57]               ,MSI enable vector 57" "Disabled,Enabled"
bitfld.long 0x04 24. "                     [56]                              ,MSI enable vector 56" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 23. "                  [55]               ,MSI enable vector 55" "Disabled,Enabled"
bitfld.long 0x04 22. "                     [54]                              ,MSI enable vector 54" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 21. "                  [53]               ,MSI enable vector 53" "Disabled,Enabled"
bitfld.long 0x04 20. "                     [52]                              ,MSI enable vector 52" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 19. "                  [51]               ,MSI enable vector 51" "Disabled,Enabled"
bitfld.long 0x04 18. "                     [50]                              ,MSI enable vector 50" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 17. "                  [49]               ,MSI enable vector 49" "Disabled,Enabled"
bitfld.long 0x04 16. "                     [48]                              ,MSI enable vector 48" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 15. "                  [47]               ,MSI enable vector 47" "Disabled,Enabled"
bitfld.long 0x04 14. "                     [46]                              ,MSI enable vector 46" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 13. "                  [45]               ,MSI enable vector 45" "Disabled,Enabled"
bitfld.long 0x04 12. "                     [44]                              ,MSI enable vector 44" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 11. "                  [43]               ,MSI enable vector 43" "Disabled,Enabled"
bitfld.long 0x04 10. "                     [42]                              ,MSI enable vector 42" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 9. "                  [41]               ,MSI enable vector 41" "Disabled,Enabled"
bitfld.long 0x04 8. "                     [40]                              ,MSI enable vector 40" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 7. "                  [39]               ,MSI enable vector 39" "Disabled,Enabled"
bitfld.long 0x04 6. "                     [38]                              ,MSI enable vector 38" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 5. "                  [37]               ,MSI enable vector 37" "Disabled,Enabled"
bitfld.long 0x04 4. "                     [36]                              ,MSI enable vector 36" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 3. "                  [35]               ,MSI enable vector 35" "Disabled,Enabled"
bitfld.long 0x04 2. "                     [34]                              ,MSI enable vector 34" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x04 1. "                  [33]               ,MSI enable vector 33" "Disabled,Enabled"
bitfld.long 0x04 0. "                     [32]                              ,MSI enable vector 32" "Disabled,Enabled"
line.long 0x08 "MSI_EN_VEC0_2,MSI ENABLE VECTOR2"
bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95]               ,MSI enable vector 95" "Disabled,Enabled"
bitfld.long 0x08 30. "                     [94]                              ,MSI enable vector 94" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 29. "                  [93]               ,MSI enable vector 93" "Disabled,Enabled"
bitfld.long 0x08 28. "                     [92]                              ,MSI enable vector 92" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 27. "                  [91]               ,MSI enable vector 91" "Disabled,Enabled"
bitfld.long 0x08 26. "                     [90]                              ,MSI enable vector 90" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 25. "                  [89]               ,MSI enable vector 89" "Disabled,Enabled"
bitfld.long 0x08 24. "                     [88]                              ,MSI enable vector 88" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 23. "                  [87]               ,MSI enable vector 87" "Disabled,Enabled"
bitfld.long 0x08 22. "                     [86]                              ,MSI enable vector 86" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 21. "                  [85]               ,MSI enable vector 85" "Disabled,Enabled"
bitfld.long 0x08 20. "                     [84]                              ,MSI enable vector 84" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 19. "                  [83]               ,MSI enable vector 83" "Disabled,Enabled"
bitfld.long 0x08 18. "                     [82]                              ,MSI enable vector 82" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 17. "                  [81]               ,MSI enable vector 81" "Disabled,Enabled"
bitfld.long 0x08 16. "                     [80]                              ,MSI enable vector 80" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 15. "                  [79]               ,MSI enable vector 79" "Disabled,Enabled"
bitfld.long 0x08 14. "                     [78]                              ,MSI enable vector 78" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 13. "                  [77]               ,MSI enable vector 77" "Disabled,Enabled"
bitfld.long 0x08 12. "                     [76]                              ,MSI enable vector 76" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 11. "                  [75]               ,MSI enable vector 75" "Disabled,Enabled"
bitfld.long 0x08 10. "                     [74]                              ,MSI enable vector 74" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 9. "                  [73]               ,MSI enable vector 73" "Disabled,Enabled"
bitfld.long 0x08 8. "                     [72]                              ,MSI enable vector 72" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 7. "                  [71]               ,MSI enable vector 71" "Disabled,Enabled"
bitfld.long 0x08 6. "                     [70]                              ,MSI enable vector 70" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 5. "                  [69]               ,MSI enable vector 69" "Disabled,Enabled"
bitfld.long 0x08 4. "                     [68]                              ,MSI enable vector 68" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 3. "                  [67]               ,MSI enable vector 67" "Disabled,Enabled"
bitfld.long 0x08 2. "                     [66]                              ,MSI enable vector 66" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x08 1. "                  [65]               ,MSI enable vector 65" "Disabled,Enabled"
bitfld.long 0x08 0. "                     [64]                              ,MSI enable vector 64" "Disabled,Enabled"
line.long 0x0C "MSI_EN_VEC0_3,MSI ENABLE VECTOR3"
bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127]              ,MSI enable vector 127" "Disabled,Enabled"
bitfld.long 0x0C 30. "                     [126]                             ,MSI enable vector 126" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 29. "                  [125]              ,MSI enable vector 125" "Disabled,Enabled"
bitfld.long 0x0C 28. "                     [124]                             ,MSI enable vector 124" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 27. "                  [123]              ,MSI enable vector 123" "Disabled,Enabled"
bitfld.long 0x0C 26. "                     [122]                             ,MSI enable vector 122" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 25. "                  [121]              ,MSI enable vector 121" "Disabled,Enabled"
bitfld.long 0x0C 24. "                     [120]                             ,MSI enable vector 120" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 23. "                  [119]              ,MSI enable vector 119" "Disabled,Enabled"
bitfld.long 0x0C 22. "                     [118]                             ,MSI enable vector 118" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 21. "                  [117]              ,MSI enable vector 117" "Disabled,Enabled"
bitfld.long 0x0C 20. "                     [116]                             ,MSI enable vector 116" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 19. "                  [115]              ,MSI enable vector 115" "Disabled,Enabled"
bitfld.long 0x0C 18. "                     [114]                             ,MSI enable vector 114" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 17. "                  [113]              ,MSI enable vector 113" "Disabled,Enabled"
bitfld.long 0x0C 16. "                     [112]                             ,MSI enable vector 112" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 15. "                  [111]              ,MSI enable vector 111" "Disabled,Enabled"
bitfld.long 0x0C 14. "                     [110]                             ,MSI enable vector 110" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 13. "                  [109]              ,MSI enable vector 109" "Disabled,Enabled"
bitfld.long 0x0C 12. "                     [108]                             ,MSI enable vector 108" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 11. "                  [107]              ,MSI enable vector 107" "Disabled,Enabled"
bitfld.long 0x0C 10. "                     [106]                             ,MSI enable vector 106" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 9. "                  [105]              ,MSI enable vector 105" "Disabled,Enabled"
bitfld.long 0x0C 8. "                     [104]                             ,MSI enable vector 104" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 7. "                  [103]              ,MSI enable vector 103" "Disabled,Enabled"
bitfld.long 0x0C 6. "                     [102]                             ,MSI enable vector 102" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 5. "                  [101]              ,MSI enable vector 101" "Disabled,Enabled"
bitfld.long 0x0C 4. "                     [100]                             ,MSI enable vector 100" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 3. "                  [99]               ,MSI enable vector 99" "Disabled,Enabled"
bitfld.long 0x0C 2. "                     [98]                              ,MSI enable vector 98" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x0C 1. "                  [97]               ,MSI enable vector 97" "Disabled,Enabled"
bitfld.long 0x0C 0. "                     [96]                              ,MSI enable vector 96" "Disabled,Enabled"
line.long 0x10 "MSI_EN_VEC0_4,MSI ENABLE VECTOR4"
bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159]              ,MSI enable vector 159" "Disabled,Enabled"
bitfld.long 0x10 30. "                     [158]                             ,MSI enable vector 158" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 29. "                  [157]              ,MSI enable vector 157" "Disabled,Enabled"
bitfld.long 0x10 28. "                     [156]                             ,MSI enable vector 156" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 27. "                  [155]              ,MSI enable vector 155" "Disabled,Enabled"
bitfld.long 0x10 26. "                     [154]                             ,MSI enable vector 154" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 25. "                  [153]              ,MSI enable vector 153" "Disabled,Enabled"
bitfld.long 0x10 24. "                     [152]                             ,MSI enable vector 152" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 23. "                  [151]              ,MSI enable vector 151" "Disabled,Enabled"
bitfld.long 0x10 22. "                     [150]                             ,MSI enable vector 150" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 21. "                  [149]              ,MSI enable vector 149" "Disabled,Enabled"
bitfld.long 0x10 20. "                     [148]                             ,MSI enable vector 148" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 19. "                  [147]              ,MSI enable vector 147" "Disabled,Enabled"
bitfld.long 0x10 18. "                     [146]                             ,MSI enable vector 146" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 17. "                  [145]              ,MSI enable vector 145" "Disabled,Enabled"
bitfld.long 0x10 16. "                     [144]                             ,MSI enable vector 144" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 15. "                  [143]              ,MSI enable vector 143" "Disabled,Enabled"
bitfld.long 0x10 14. "                     [142]                             ,MSI enable vector 142" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 13. "                  [141]              ,MSI enable vector 141" "Disabled,Enabled"
bitfld.long 0x10 12. "                     [140]                             ,MSI enable vector 140" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 11. "                  [139]              ,MSI enable vector 139" "Disabled,Enabled"
bitfld.long 0x10 10. "                     [138]                             ,MSI enable vector 138" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 9. "                  [137]              ,MSI enable vector 137" "Disabled,Enabled"
bitfld.long 0x10 8. "                     [136]                             ,MSI enable vector 136" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 7. "                  [135]              ,MSI enable vector 135" "Disabled,Enabled"
bitfld.long 0x10 6. "                     [134]                             ,MSI enable vector 134" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 5. "                  [133]              ,MSI enable vector 133" "Disabled,Enabled"
bitfld.long 0x10 4. "                     [132]                             ,MSI enable vector 132" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 3. "                  [131]              ,MSI enable vector 131" "Disabled,Enabled"
bitfld.long 0x10 2. "                     [130]                             ,MSI enable vector 130" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x10 1. "                  [129]              ,MSI enable vector 129" "Disabled,Enabled"
bitfld.long 0x10 0. "                     [128]                             ,MSI enable vector 128" "Disabled,Enabled"
line.long 0x14 "MSI_EN_VEC0_5,MSI ENABLE VECTOR5"
bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191]              ,MSI enable vector 191" "Disabled,Enabled"
bitfld.long 0x14 30. "                     [190]                             ,MSI enable vector 190" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 29. "                  [189]              ,MSI enable vector 189" "Disabled,Enabled"
bitfld.long 0x14 28. "                     [188]                             ,MSI enable vector 188" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 27. "                  [187]              ,MSI enable vector 187" "Disabled,Enabled"
bitfld.long 0x14 26. "                     [186]                             ,MSI enable vector 186" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 25. "                  [185]              ,MSI enable vector 185" "Disabled,Enabled"
bitfld.long 0x14 24. "                     [184]                             ,MSI enable vector 184" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 23. "                  [183]              ,MSI enable vector 183" "Disabled,Enabled"
bitfld.long 0x14 22. "                     [182]                             ,MSI enable vector 182" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 21. "                  [181]              ,MSI enable vector 181" "Disabled,Enabled"
bitfld.long 0x14 20. "                     [180]                             ,MSI enable vector 180" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 19. "                  [179]              ,MSI enable vector 179" "Disabled,Enabled"
bitfld.long 0x14 18. "                     [178]                             ,MSI enable vector 178" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 17. "                  [177]              ,MSI enable vector 177" "Disabled,Enabled"
bitfld.long 0x14 16. "                     [176]                             ,MSI enable vector 176" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 15. "                  [175]              ,MSI enable vector 175" "Disabled,Enabled"
bitfld.long 0x14 14. "                     [174]                             ,MSI enable vector 174" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 13. "                  [173]              ,MSI enable vector 173" "Disabled,Enabled"
bitfld.long 0x14 12. "                     [172]                             ,MSI enable vector 172" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 11. "                  [171]              ,MSI enable vector 171" "Disabled,Enabled"
bitfld.long 0x14 10. "                     [170]                             ,MSI enable vector 170" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 9. "                  [169]              ,MSI enable vector 169" "Disabled,Enabled"
bitfld.long 0x14 8. "                     [168]                             ,MSI enable vector 168" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 7. "                  [167]              ,MSI enable vector 167" "Disabled,Enabled"
bitfld.long 0x14 6. "                     [166]                             ,MSI enable vector 166" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 5. "                  [165]              ,MSI enable vector 165" "Disabled,Enabled"
bitfld.long 0x14 4. "                     [164]                             ,MSI enable vector 164" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 3. "                  [163]              ,MSI enable vector 163" "Disabled,Enabled"
bitfld.long 0x14 2. "                     [162]                             ,MSI enable vector 162" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x14 1. "                  [161]              ,MSI enable vector 161" "Disabled,Enabled"
bitfld.long 0x14 0. "                     [160]                             ,MSI enable vector 160" "Disabled,Enabled"
line.long 0x18 "MSI_EN_VEC0_6,MSI ENABLE VECTOR6"
bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223]              ,MSI enable vector 223" "Disabled,Enabled"
bitfld.long 0x18 30. "                     [222]                             ,MSI enable vector 222" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 29. "                  [221]              ,MSI enable vector 221" "Disabled,Enabled"
bitfld.long 0x18 28. "                     [220]                             ,MSI enable vector 220" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 27. "                  [219]              ,MSI enable vector 219" "Disabled,Enabled"
bitfld.long 0x18 26. "                     [218]                             ,MSI enable vector 218" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 25. "                  [217]              ,MSI enable vector 217" "Disabled,Enabled"
bitfld.long 0x18 24. "                     [216]                             ,MSI enable vector 216" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 23. "                  [215]              ,MSI enable vector 215" "Disabled,Enabled"
bitfld.long 0x18 22. "                     [214]                             ,MSI enable vector 214" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 21. "                  [213]              ,MSI enable vector 213" "Disabled,Enabled"
bitfld.long 0x18 20. "                     [212]                             ,MSI enable vector 212" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 19. "                  [211]              ,MSI enable vector 211" "Disabled,Enabled"
bitfld.long 0x18 18. "                     [210]                             ,MSI enable vector 210" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 17. "                  [209]              ,MSI enable vector 209" "Disabled,Enabled"
bitfld.long 0x18 16. "                     [208]                             ,MSI enable vector 208" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 15. "                  [207]              ,MSI enable vector 207" "Disabled,Enabled"
bitfld.long 0x18 14. "                     [206]                             ,MSI enable vector 206" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 13. "                  [205]              ,MSI enable vector 205" "Disabled,Enabled"
bitfld.long 0x18 12. "                     [204]                             ,MSI enable vector 204" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 11. "                  [203]              ,MSI enable vector 203" "Disabled,Enabled"
bitfld.long 0x18 10. "                     [202]                             ,MSI enable vector 202" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 9. "                  [201]              ,MSI enable vector 201" "Disabled,Enabled"
bitfld.long 0x18 8. "                     [200]                             ,MSI enable vector 200" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 7. "                  [199]              ,MSI enable vector 199" "Disabled,Enabled"
bitfld.long 0x18 6. "                     [198]                             ,MSI enable vector 198" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 5. "                  [197]              ,MSI enable vector 197" "Disabled,Enabled"
bitfld.long 0x18 4. "                     [196]                             ,MSI enable vector 196" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 3. "                  [195]              ,MSI enable vector 195" "Disabled,Enabled"
bitfld.long 0x18 2. "                     [194]                             ,MSI enable vector 194" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 1. "                  [193]              ,MSI enable vector 193" "Disabled,Enabled"
bitfld.long 0x18 0. "                     [192]                             ,MSI enable vector 192" "Disabled,Enabled"
line.long 0x1C "MSI_EN_VEC0_7,MSI ENABLE VECTOR7"
bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255]              ,MSI enable vector 255" "Disabled,Enabled"
bitfld.long 0x1C 30. "                     [254]                             ,MSI enable vector 254" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 29. "                  [253]              ,MSI enable vector 253" "Disabled,Enabled"
bitfld.long 0x1C 28. "                     [252]                             ,MSI enable vector 252" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 27. "                  [251]              ,MSI enable vector 251" "Disabled,Enabled"
bitfld.long 0x1C 26. "                     [250]                             ,MSI enable vector 250" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 25. "                  [249]              ,MSI enable vector 249" "Disabled,Enabled"
bitfld.long 0x1C 24. "                     [248]                             ,MSI enable vector 248" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 23. "                  [247]              ,MSI enable vector 247" "Disabled,Enabled"
bitfld.long 0x1C 22. "                     [246]                             ,MSI enable vector 246" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 21. "                  [245]              ,MSI enable vector 245" "Disabled,Enabled"
bitfld.long 0x1C 20. "                     [244]                             ,MSI enable vector 244" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 19. "                  [243]              ,MSI enable vector 243" "Disabled,Enabled"
bitfld.long 0x1C 18. "                     [242]                             ,MSI enable vector 242" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 17. "                  [241]              ,MSI enable vector 241" "Disabled,Enabled"
bitfld.long 0x1C 16. "                     [240]                             ,MSI enable vector 240" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 15. "                  [239]              ,MSI enable vector 239" "Disabled,Enabled"
bitfld.long 0x1C 14. "                     [238]                             ,MSI enable vector 238" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 13. "                  [237]              ,MSI enable vector 237" "Disabled,Enabled"
bitfld.long 0x1C 12. "                     [236]                             ,MSI enable vector 236" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 11. "                  [235]              ,MSI enable vector 235" "Disabled,Enabled"
bitfld.long 0x1C 10. "                     [234]                             ,MSI enable vector 234" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 9. "                  [233]              ,MSI enable vector 233" "Disabled,Enabled"
bitfld.long 0x1C 8. "                     [232]                             ,MSI enable vector 232" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 7. "                  [231]              ,MSI enable vector 231" "Disabled,Enabled"
bitfld.long 0x1C 6. "                     [230]                             ,MSI enable vector 230" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 5. "                  [229]              ,MSI enable vector 229" "Disabled,Enabled"
bitfld.long 0x1C 4. "                     [228]                             ,MSI enable vector 228" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 3. "                  [227]              ,MSI enable vector 227" "Disabled,Enabled"
bitfld.long 0x1C 2. "                     [226]                             ,MSI enable vector 226" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x1C 1. "                  [225]              ,MSI enable vector 225" "Disabled,Enabled"
bitfld.long 0x1C 0. "                     [224]                             ,MSI enable vector 224" "Disabled,Enabled"
group.long 0x180++0x2B
line.long 0x00 "CONFIGURATION_0,Configuration"
bitfld.long 0x00 31. " CLKEN_OVERRIDE                      ,Override the clock enable" "No override,Override"
bitfld.long 0x00 19. "                  PW_NO_DEVSEL_ERR_CYA              ,Detection of DECERR disables" "Enabled,Disabled"
textline "                                          "
rbitfld.long 0x00 18. " INITIATOR_READ_IDLE                 ,Status reads on AFI upstream""0,1"
rbitfld.long 0x00 17. "                            INITIATOR_WRITE_IDLE              ,Status write on AFI upstream" "0,1"
textline "                                          "
bitfld.long 0x00 15. " WDATA_LEAD_CYA                      ,Enable/Disable the handling write data of IPFS" "Enabled,Disabled"
bitfld.long 0x00 14. "                     WR_INTRLV_CYA                     ,Enable/disable the handling write requests on IPFS" "Enabled,Disabled"
textline "                                          "
rbitfld.long 0x00 11. " TARGET_READ_IDLE                    ,IPFS read target status" "0,1"
rbitfld.long 0x00 10. "                            TARGET_WRITE_IDLE                 ,IPFS write target status" "0,1"
textline "                                          "
rbitfld.long 0x00 9. " MSI_VEC_EMPTY                       ,MSI Vector registers status" "Not empty,Empty"
bitfld.long 0x00 7. "                    UFPCI_MSIAW                       ,MSI After Write ordering rule" "0,1"
textline "                                          "
bitfld.long 0x00 6. " UFPCI_PWPASSPW                      ,Input to upstream FPCI" "0,1"
bitfld.long 0x00 5. "                            UFPCI_PASSPW                      ,Input to upstream FPCI" "0,1"
textline "                                          "
bitfld.long 0x00 4. " UFPCI_PWPASSNPW                     ,Used for upstream FPCI" "0,1"
bitfld.long 0x00 3. "                            DFPCI_PWPASSNPW                   ,Used for downstream FPCI" "0,1"
textline "                                          "
bitfld.long 0x00 2. " DFPCI_RSPPASSPW                     ,Input to downstream FPCI" "0,1"
bitfld.long 0x00 1. "                            DFPCI_PASSPW                      ,Input to downstream FPCI" "0,1"
textline "                                          "
bitfld.long 0x00 0. " EN_FPCI                             ,IPFS device block disabled" "No,Yes"
line.long 0x04 "FPCI_ERROR_MASKS_0,FPCI Error Masks"
bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT              ,FPCI Master Abort" "No error,Error"
bitfld.long 0x04 1. "                     MASK_FPCI_DATA_ERROR              ,FPCI Data Error" "No error,Error"
textline "                                          "
bitfld.long 0x04 0. " MASK_FPCI_TARGET_ABORT              ,FPCI AXI OKAY" "No error,Error"
line.long 0x08 "INTR_MASK_0,Interrupt Masks"
bitfld.long 0x08 16. " IP_INT_MASK                         ,:IP (SATA/AZA) interrupt to MPCORE gate mask" "No interrupt,Interrupt"
bitfld.long 0x08 8. "                 MSI_MASK                          ,MSI to MPCORE gate mask" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x08 0. " INT_MASK                            ,Interrupt to MPCORE gate mask" "No interrupt,Interrupt"
line.long 0x0C "INTR_CODE_0,Interrupt Control"
bitfld.long 0x0C 0.--4. " INT_CODE                            ,Eight interrupt codes" "INT_CODE_CLEAR,INT_CODE_INI_SLVERR,INT_CODE_INI_DECERR,INT_CODE_TGT_SLVERR,INT_CODE_TGT_DECERR,INT_CODE_TGT_WRERR,,INT_CODE_DFPCI_DECERR,INT_CODE_AXI_DECERR,INT_CODE_FPCI_TIMEOUT,,,,,,INT_CODE_SM_FATAL_ERROR,INT_CODE_SM_NON_FATAL_ERROR,?..."
line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature"
hexmask.long 0x10 2.--31. 1. " INT_INFO                            ,Address for FPCI generated errors"
bitfld.long 0x10 0. "                     DIR                               ,Direction of the AXI/FPCI transaction" "Write,Read"
line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address"
hexmask.long.byte 0x14 0.--7. 1. " INT_INFO_UPPER                      ,Upper byte of captured FPCI address"
line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable"
bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR               ,Enable bit for interrupt code 15" "Disabled,Enabled"
bitfld.long 0x18 12. "                     EN_SM_FATAL_ERROR                 ,Enable bit for interrupt code 14" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 7. " EN_FPCI_TIMEOUT                     ,Enable bit for interrupt code 9" "Disabled,Enabled"
bitfld.long 0x18 6. "                     EN_AXI_DECERR                     ,Enable bit for interrupt code 8" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 5. " EN_DFPCI_DECERR                     ,Enable bit for interrupt code 7" "Disabled,Enabled"
bitfld.long 0x18 4. "                     EN_TGT_WRERR                      ,Enable bit for interrupt code 5" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 3. " EN_TGT_DECERR                       ,Enable bit for interrupt code 4" "Disabled,Enabled"
bitfld.long 0x18 2. "                     EN_TGT_SLVERR                     ,Enable bit for interrupt code 3" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x18 1. " EN_INI_DECERR                       ,Enable bit for interrupt code 2" "Disabled,Enabled"
bitfld.long 0x18 0. "                     EN_INI_SLVERR                     ,Enable bit for interrupt code 1" "Disabled,Enabled"
line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration"
bitfld.long 0x1C 0.--4. " UNITID_T0C0                         ,Upstream FPCI Unit ID for controller 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x20 "CFG_REVID_0,CFG_REVID register"
rbitfld.long 0x20 19. " DEV2SM_NONISO_REQUEST_PEND          ,Non ISO request pending" "No,Yes"
rbitfld.long 0x20 18. "                          DEV2SM_ISO_REQUEST_PEND           ,ISO request pending" "No,Yes"
textline "                                          "
bitfld.long 0x20 12.--13. " STRAP_CPU_MODE                      ,MSI send mode" "NB_INTEL,NB_AMD,AMD,TMTA"
bitfld.long 0x20 11. "                     CFG_REVID_WRITE_ENABLE            ,the enable to override the revid" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x20 10. " CFG_REVID_OVERRIDE                  ,Current revision ID override" "Disabled,Enabled"
rbitfld.long 0x20 4. "                     DEV2LEG_NONCOH_REQUEST_PEND       ,Non coherent req pending" "No,Yes"
textline "                                          "
rbitfld.long 0x20 3. " DEV2LEG_COH_REQUEST_PEND            ,Coherent req pending" "No,Yes"
bitfld.long 0x20 2. "                          SM2DEV_FPCI_TIMEOUT_EN            ,FPCI timeout enable control" "Disabled,Enabled"
line.long 0x24 "FPCI_TIMEOUT_0,FPCI_TIMEOUT register"
hexmask.long.tbyte 0x24 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH          ,Timeout thresh value"
line.long 0x28 "TOM_0,Top of Memory Limit"
hexmask.long.word 0x28 16.--29. 1. " LEG2ALL_TOM2                        ,Top of Memory Limit 2"
hexmask.long.word 0x28 0.--11. 1. "                         LEG2ALL_TOM1                      ,Top of Memory Limit 1"
rgroup.long 0x1AC++0x0B
line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending"
hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND      ,Number of pending initiator iso PW responses"
line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending"
hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND     ,Number of pending initiator niso PW responses"
line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status"
bitfld.long 0x08 2. " IP_INTR_STATUS                      ,Status of IP (SATA/AZA) interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 1. "                 MSI_INTR_STATUS                   ,Status of MSI interrupt" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x08 0. " IPFS_INTR_STATUS                    ,Status of ipfs interrupt" "No interrupt,Interrupt"
group.long 0x1B8++0x07
line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables"
bitfld.long 0x00 31. " EN_DFPCI_BEN                        ,DFPCI ben bit enable" "Disabled,Enabled"
bitfld.long 0x00 0.--3. "                     DFPCI_BYTE_ENABLE_N               ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE_HYSTERESIS_0"
hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT                     ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks"
sif (!cpuis("TEGRAX2"))
group.long 0x1D8++0x03
line.long 0x00 "SPARE_REG0_0,SPARE_REG0_0"
endif
sif (cpuis("TEGRAX2"))
group.long 0x1DC++0x07
line.long 0x00 "MISC_0,MISC_0"
bitfld.long 0x00 0. " HDA_DEVICE_DIS                      ,Serial ATA Interface 0 Disable" "No,Yes"
line.long 0x04 "HDA_GSC_ID_0,HDA_GSC_ID_0"
bitfld.long 0x04 0.--4. " HDA_GSC_ID                          ,HDA_GSC_ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x1DC++0x07
line.long 0x00 "HDA_MCCIF_FIFOCTRL_0,HDA_MCCIF_FIFOCTRL_0"
bitfld.long 0x00 20. " HDA_RCLK_OVR_MODE                   ,HDA_RCLK_OVR_MODE" "Legacy,On"
bitfld.long 0x00 19. "                       HDA_WCLK_OVR_MODE                 ,HDA_WCLK_OVR_MODE" "Legacy,On"
textline "                                          "
bitfld.long 0x00 18. " HDA_CCLK_OVERRIDE                   ,HDA_CCLK_OVERRIDE" "No override,Override"
bitfld.long 0x00 17. "                  HDA_RCLK_OVERRIDE                 ,HDA_RCLK_OVERRIDE" "No override,Override"
textline "                                          "
bitfld.long 0x00 16. " HDA_WCLK_OVERRIDE                   ,HDA_WCLK_OVERRIDE" "No override,Override"
bitfld.long 0x00 3. "                  HDA_MCCIF_RDCL_RDFAST             ,HDA_MCCIF_RDCL_RDFAST" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 2. " HDA_MCCIF_WRMC_CLLE2X               ,HDA_MCCIF_WRMC_CLLE2X" "Disabled,Enabled"
bitfld.long 0x00 1. "                     HDA_MCCIF_RDMC_RDFAST             ,HDA_MCCIF_RDMC_RDFAST" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " HDA_MCCIF_WRCL_MCLE2X               ,HDA_MCCIF_WRCL_MCLE2X" "Disabled,Enabled"
line.long 0x04 "MISC_0,MISC_0"
bitfld.long 0x04 0. " HDA_DEVICE_DIS                      ,Serial ATA Interface 0 Disable" "No,Yes"
endif
group.long 0x1E4++0x0B
line.long 0x00 "ORDERING_RULES_0,ORDERING_RULES_0"
bitfld.long 0x00 3. " UPSTREAM_MSIAW                      ,Modified Upstream MSIAW ordering" "MSIAW,Legacy (Tegra 3)"
bitfld.long 0x00 2. "             UPSTREAM_RESPAW                   ,Modified RespAW ordering" "RespAW,Legacy (Tegra 3)"
textline "                                          "
bitfld.long 0x00 1. " UPSTREAM_RAW                        ,Modified RAW ordering" "RAW,Legacy (Tegra 3)"
line.long 0x04 "A2F_UFPCI_CFG0_0,A2F_UFPCI_CFG0_0"
hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR               ,STATIC_WAIT_IDLE_CNTR"
bitfld.long 0x04 16.--18. "                           STATIC_UFPCI_UFA_STARVE_CNTR_PRI1 ,STATIC_UFPCI_UFA_STARVE_CNTR_PRI1" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.long 0x04 12.--15. " STATIC_UFPCI_UFA_STARVE_CNTR_PRI0   ,STATIC_UFPCI_UFA_STARVE_CNTR_PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 10.--11. "                           STATIC_UFPCI_RR_BURST_SZ_PRI1     ,STATIC_UFPCI_RR_BURST_SZ_PRI1" "0,1,2,3"
textline "                                          "
bitfld.long 0x04 8.--9. " STATIC_UFPCI_RR_BURST_SZ_PRI0       ,STATIC_UFPCI_RR_BURST_SZ_PRI0" "0,1,2,3"
bitfld.long 0x04 7. "                            STATIC_WAIT_CLAMP_EN              ,STATIC_WAIT_CLAMP_EN" "0,1"
textline "                                          "
bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN       ,STATIC_UFPCI_UFA_DYN_BLOCK_EN" "0,1"
bitfld.long 0x04 5. "                            STATIC_UFPCI_UFA_BLK_COHERENT     ,STATIC_UFPCI_UFA_BLK_COHERENT" "0,1"
textline "                                          "
bitfld.long 0x04 2.--4. " STATIC_UFPCI_BLOCK_CMD_THRESHOLD    ,STATIC_UFPCI_BLOCK_CMD_THRESHOLD" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1. "                            STATIC_CYA_UFA_ARB                ,STATIC_CYA_UFA_ARB" "0,1"
textline "                                          "
bitfld.long 0x04 0. " STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK" "0,1"
line.long 0x08 "A2F_UFPCI_CFG1_0,A2F_UFPCI_CFG1_0"
hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR            ,STATIC_WAIT_UNCLAMP_CNTR"
sif (!cpuis("TEGRAX2"))
group.long 0x1F0++0x03
line.long 0x00 "DUMMY_REG_0,DUMMY_REG_0"
bitfld.long 0x00 0. " DUMMY                               ,Dummy register" "0,1"
endif
width 0x0B
tree.end
tree "DPAUX0 Registers"
base ad:0x155c0000
width 25.
sif (!cpuis("TEGRAX2"))
group.long 0x00++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
rbitfld.long 0x00 28.--31. " NEXT_CHANNEL      ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 16.--25. 1. "            NEXT_CLASS        ,Next requested class"
bitfld.long 0x00 12.--15. "                   CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 11. " AUTO_ACK          ,Automatically acknowledge incoming context" "Manual,Autoack"
hexmask.long.word 0x00 0.--9. 1. "       CURR_CLASS        ,Current working class"
endif
group.long (0x04+0x0)++0x03 "REG_0"
line.long 0x00 "INTR_EN_AUX_0,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x0)++0x03
line.long 0x00 "INTR_AUX_0,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_0,Data Register Array For DisplayPort Write 0 (Register 0)"
group.long (0x34+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_0,Data Register Array For DisplayPort Write 1 (Register 0)"
group.long (0x44+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_0,Data Register Array For DisplayPort Write 2 (Register 0)"
group.long (0x54+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_0,Data Register Array For DisplayPort Write 3 (Register 0)"
rgroup.long (0x64+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_0,Data Register Array For DisplayPort Read 0 (Register 0)"
rgroup.long (0x74+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_0,Data Register Array For DisplayPort Read 1 (Register 0)"
rgroup.long (0x84+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_0,Data Register Array For DisplayPort Read 2 (Register 0)"
rgroup.long (0x94+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_0,Data Register Array For DisplayPort Read 3 (Register 0)"
group.long (0xA4+0x0)++0x03
line.long 0x00 "DP_AUXADDR_0,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x0)++0x03
line.long 0x00 "DP_AUXCTL_0,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x0)++0x03
line.long 0x00 "DP_AUXSTAT_0,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x0)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_0,AUX Sink Status Low"
rgroup.long (0xE4+0x0)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_0,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x0)++0x03
line.long 0x00 "HPD_CONFIG_0,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x0)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_0,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x0)++0x03
line.long 0x00 "DP_AUX_CONFIG_0,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x0)++0x03
line.long 0x00 "HYBRID_PADCTL_0,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x0)++0x03
line.long 0x00 "HYBRID_SPARE_0,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0x4)++0x03 "REG_1"
line.long 0x00 "INTR_EN_AUX_1,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x4)++0x03
line.long 0x00 "INTR_AUX_1,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_1,Data Register Array For DisplayPort Write 0 (Register 1)"
group.long (0x34+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_1,Data Register Array For DisplayPort Write 1 (Register 1)"
group.long (0x44+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_1,Data Register Array For DisplayPort Write 2 (Register 1)"
group.long (0x54+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_1,Data Register Array For DisplayPort Write 3 (Register 1)"
rgroup.long (0x64+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_1,Data Register Array For DisplayPort Read 0 (Register 1)"
rgroup.long (0x74+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_1,Data Register Array For DisplayPort Read 1 (Register 1)"
rgroup.long (0x84+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_1,Data Register Array For DisplayPort Read 2 (Register 1)"
rgroup.long (0x94+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_1,Data Register Array For DisplayPort Read 3 (Register 1)"
group.long (0xA4+0x4)++0x03
line.long 0x00 "DP_AUXADDR_1,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x4)++0x03
line.long 0x00 "DP_AUXCTL_1,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x4)++0x03
line.long 0x00 "DP_AUXSTAT_1,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x4)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_1,AUX Sink Status Low"
rgroup.long (0xE4+0x4)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_1,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x4)++0x03
line.long 0x00 "HPD_CONFIG_1,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x4)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_1,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x4)++0x03
line.long 0x00 "DP_AUX_CONFIG_1,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x4)++0x03
line.long 0x00 "HYBRID_PADCTL_1,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x4)++0x03
line.long 0x00 "HYBRID_SPARE_1,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0x8)++0x03 "REG_2"
line.long 0x00 "INTR_EN_AUX_2,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x8)++0x03
line.long 0x00 "INTR_AUX_2,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_2,Data Register Array For DisplayPort Write 0 (Register 2)"
group.long (0x34+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_2,Data Register Array For DisplayPort Write 1 (Register 2)"
group.long (0x44+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_2,Data Register Array For DisplayPort Write 2 (Register 2)"
group.long (0x54+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_2,Data Register Array For DisplayPort Write 3 (Register 2)"
rgroup.long (0x64+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_2,Data Register Array For DisplayPort Read 0 (Register 2)"
rgroup.long (0x74+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_2,Data Register Array For DisplayPort Read 1 (Register 2)"
rgroup.long (0x84+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_2,Data Register Array For DisplayPort Read 2 (Register 2)"
rgroup.long (0x94+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_2,Data Register Array For DisplayPort Read 3 (Register 2)"
group.long (0xA4+0x8)++0x03
line.long 0x00 "DP_AUXADDR_2,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x8)++0x03
line.long 0x00 "DP_AUXCTL_2,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x8)++0x03
line.long 0x00 "DP_AUXSTAT_2,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x8)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_2,AUX Sink Status Low"
rgroup.long (0xE4+0x8)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_2,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x8)++0x03
line.long 0x00 "HPD_CONFIG_2,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x8)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_2,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x8)++0x03
line.long 0x00 "DP_AUX_CONFIG_2,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x8)++0x03
line.long 0x00 "HYBRID_PADCTL_2,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x8)++0x03
line.long 0x00 "HYBRID_SPARE_2,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0xC)++0x03 "REG_3"
line.long 0x00 "INTR_EN_AUX_3,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0xC)++0x03
line.long 0x00 "INTR_AUX_3,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_3,Data Register Array For DisplayPort Write 0 (Register 3)"
group.long (0x34+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_3,Data Register Array For DisplayPort Write 1 (Register 3)"
group.long (0x44+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_3,Data Register Array For DisplayPort Write 2 (Register 3)"
group.long (0x54+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_3,Data Register Array For DisplayPort Write 3 (Register 3)"
rgroup.long (0x64+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_3,Data Register Array For DisplayPort Read 0 (Register 3)"
rgroup.long (0x74+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_3,Data Register Array For DisplayPort Read 1 (Register 3)"
rgroup.long (0x84+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_3,Data Register Array For DisplayPort Read 2 (Register 3)"
rgroup.long (0x94+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_3,Data Register Array For DisplayPort Read 3 (Register 3)"
group.long (0xA4+0xC)++0x03
line.long 0x00 "DP_AUXADDR_3,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0xC)++0x03
line.long 0x00 "DP_AUXCTL_3,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0xC)++0x03
line.long 0x00 "DP_AUXSTAT_3,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0xC)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_3,AUX Sink Status Low"
rgroup.long (0xE4+0xC)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_3,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0xC)++0x03
line.long 0x00 "HPD_CONFIG_3,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0xC)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_3,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0xC)++0x03
line.long 0x00 "DP_AUX_CONFIG_3,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0xC)++0x03
line.long 0x00 "HYBRID_PADCTL_3,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0xC)++0x03
line.long 0x00 "HYBRID_SPARE_3,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
sif (cpuis("TEGRAX2"))
group.long 0x174++0x07
line.long 0x00 "CTXSW_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL      ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "          NEXT_CLASS        ,Next requested class"
line.long 0x04 "CTXSW_0,Context Switch Register"
hexmask.long.word 0x04 11.--20. 1. " CURR_CHANNEL      ,Current working channel"
textline "                                  "
bitfld.long 0x04 10. " AUTO_ACK          ,Automatically acknowledge incoming context" "Manual,Autoack"
hexmask.long.word 0x04 0.--9. 1. "      CURR_CLASS        ,Current working class"
group.long (0x17C+0x0)++0x07 "REG_0"
line.long 0x00 "HSM_INTR_EN_AUX_0,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x0)++0x03
line.long 0x00 "HSM_INTR_AUX_0,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0x4)++0x07 "REG_1"
line.long 0x00 "HSM_INTR_EN_AUX_1,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x4)++0x03
line.long 0x00 "HSM_INTR_AUX_1,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0x8)++0x07 "REG_2"
line.long 0x00 "HSM_INTR_EN_AUX_2,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x8)++0x03
line.long 0x00 "HSM_INTR_AUX_2,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0xC)++0x07 "REG_3"
line.long 0x00 "HSM_INTR_EN_AUX_3,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0xC)++0x03
line.long 0x00 "HSM_INTR_AUX_3,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
endif
width 0x0B
tree.end
tree "DPAUX1 Registers"
base ad:0x15040000
width 25.
sif (!cpuis("TEGRAX2"))
group.long 0x00++0x03
line.long 0x00 "CTXSW_0,Context Switch Register"
rbitfld.long 0x00 28.--31. " NEXT_CHANNEL      ,Next requested channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 16.--25. 1. "            NEXT_CLASS        ,Next requested class"
bitfld.long 0x00 12.--15. "                   CURR_CHANNEL ,Current working channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 11. " AUTO_ACK          ,Automatically acknowledge incoming context" "Manual,Autoack"
hexmask.long.word 0x00 0.--9. 1. "       CURR_CLASS        ,Current working class"
endif
group.long (0x04+0x0)++0x03 "REG_0"
line.long 0x00 "INTR_EN_AUX_0,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x0)++0x03
line.long 0x00 "INTR_AUX_0,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_0,Data Register Array For DisplayPort Write 0 (Register 0)"
group.long (0x34+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_0,Data Register Array For DisplayPort Write 1 (Register 0)"
group.long (0x44+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_0,Data Register Array For DisplayPort Write 2 (Register 0)"
group.long (0x54+0x0)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_0,Data Register Array For DisplayPort Write 3 (Register 0)"
rgroup.long (0x64+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_0,Data Register Array For DisplayPort Read 0 (Register 0)"
rgroup.long (0x74+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_0,Data Register Array For DisplayPort Read 1 (Register 0)"
rgroup.long (0x84+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_0,Data Register Array For DisplayPort Read 2 (Register 0)"
rgroup.long (0x94+0x0)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_0,Data Register Array For DisplayPort Read 3 (Register 0)"
group.long (0xA4+0x0)++0x03
line.long 0x00 "DP_AUXADDR_0,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x0)++0x03
line.long 0x00 "DP_AUXCTL_0,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x0)++0x03
line.long 0x00 "DP_AUXSTAT_0,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x0)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_0,AUX Sink Status Low"
rgroup.long (0xE4+0x0)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_0,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x0)++0x03
line.long 0x00 "HPD_CONFIG_0,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x0)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_0,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x0)++0x03
line.long 0x00 "DP_AUX_CONFIG_0,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x0)++0x03
line.long 0x00 "HYBRID_PADCTL_0,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x0)++0x03
line.long 0x00 "HYBRID_SPARE_0,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0x4)++0x03 "REG_1"
line.long 0x00 "INTR_EN_AUX_1,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x4)++0x03
line.long 0x00 "INTR_AUX_1,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_1,Data Register Array For DisplayPort Write 0 (Register 1)"
group.long (0x34+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_1,Data Register Array For DisplayPort Write 1 (Register 1)"
group.long (0x44+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_1,Data Register Array For DisplayPort Write 2 (Register 1)"
group.long (0x54+0x4)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_1,Data Register Array For DisplayPort Write 3 (Register 1)"
rgroup.long (0x64+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_1,Data Register Array For DisplayPort Read 0 (Register 1)"
rgroup.long (0x74+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_1,Data Register Array For DisplayPort Read 1 (Register 1)"
rgroup.long (0x84+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_1,Data Register Array For DisplayPort Read 2 (Register 1)"
rgroup.long (0x94+0x4)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_1,Data Register Array For DisplayPort Read 3 (Register 1)"
group.long (0xA4+0x4)++0x03
line.long 0x00 "DP_AUXADDR_1,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x4)++0x03
line.long 0x00 "DP_AUXCTL_1,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x4)++0x03
line.long 0x00 "DP_AUXSTAT_1,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x4)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_1,AUX Sink Status Low"
rgroup.long (0xE4+0x4)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_1,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x4)++0x03
line.long 0x00 "HPD_CONFIG_1,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x4)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_1,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x4)++0x03
line.long 0x00 "DP_AUX_CONFIG_1,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x4)++0x03
line.long 0x00 "HYBRID_PADCTL_1,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x4)++0x03
line.long 0x00 "HYBRID_SPARE_1,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0x8)++0x03 "REG_2"
line.long 0x00 "INTR_EN_AUX_2,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0x8)++0x03
line.long 0x00 "INTR_AUX_2,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_2,Data Register Array For DisplayPort Write 0 (Register 2)"
group.long (0x34+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_2,Data Register Array For DisplayPort Write 1 (Register 2)"
group.long (0x44+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_2,Data Register Array For DisplayPort Write 2 (Register 2)"
group.long (0x54+0x8)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_2,Data Register Array For DisplayPort Write 3 (Register 2)"
rgroup.long (0x64+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_2,Data Register Array For DisplayPort Read 0 (Register 2)"
rgroup.long (0x74+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_2,Data Register Array For DisplayPort Read 1 (Register 2)"
rgroup.long (0x84+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_2,Data Register Array For DisplayPort Read 2 (Register 2)"
rgroup.long (0x94+0x8)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_2,Data Register Array For DisplayPort Read 3 (Register 2)"
group.long (0xA4+0x8)++0x03
line.long 0x00 "DP_AUXADDR_2,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0x8)++0x03
line.long 0x00 "DP_AUXCTL_2,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0x8)++0x03
line.long 0x00 "DP_AUXSTAT_2,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0x8)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_2,AUX Sink Status Low"
rgroup.long (0xE4+0x8)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_2,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0x8)++0x03
line.long 0x00 "HPD_CONFIG_2,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0x8)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_2,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0x8)++0x03
line.long 0x00 "DP_AUX_CONFIG_2,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0x8)++0x03
line.long 0x00 "HYBRID_PADCTL_2,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0x8)++0x03
line.long 0x00 "HYBRID_SPARE_2,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
group.long (0x04+0xC)++0x03 "REG_3"
line.long 0x00 "INTR_EN_AUX_3,Interrupt Enable AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Disabled,Enabled"
bitfld.long 0x00 2. "      IRQ_EVENT         ,Interrupt request" "Disabled,Enabled"
bitfld.long 0x00 1. "               UNPLUG_EVENT  ,HPD line high" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Disabled,Enabled"
group.long (0x14+0xC)++0x03
line.long 0x00 "INTR_AUX_3,Interrupt AUX"
bitfld.long 0x00 3. " AUX_DONE          ,AUX transaction interrupt" "Not pending,Pending"
bitfld.long 0x00 2. "   IRQ_EVENT         ,Interrupt request" "Not pending,Pending"
bitfld.long 0x00 1. "            UNPLUG_EVENT  ,HPD line high" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 0. " PLUG_EVENT        ,HPD line low" "Not pending,Pending"
group.long (0x24+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W0_3,Data Register Array For DisplayPort Write 0 (Register 3)"
group.long (0x34+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W1_3,Data Register Array For DisplayPort Write 1 (Register 3)"
group.long (0x44+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W2_3,Data Register Array For DisplayPort Write 2 (Register 3)"
group.long (0x54+0xC)++0x03
line.long 0x00 "DP_AUXDATA_WRITE_W3_3,Data Register Array For DisplayPort Write 3 (Register 3)"
rgroup.long (0x64+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W0_3,Data Register Array For DisplayPort Read 0 (Register 3)"
rgroup.long (0x74+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W1_3,Data Register Array For DisplayPort Read 1 (Register 3)"
rgroup.long (0x84+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W2_3,Data Register Array For DisplayPort Read 2 (Register 3)"
rgroup.long (0x94+0xC)++0x03
line.long 0x00 "DP_AUXDATA_READ_W3_3,Data Register Array For DisplayPort Read 3 (Register 3)"
group.long (0xA4+0xC)++0x03
line.long 0x00 "DP_AUXADDR_3,Address Register For DisplayPort AUX "
hexmask.long.tbyte 0x00 0.--19. 0x01 " REG               ,20-bit address register transaction reads from/writes to the sink AUX"
group.long (0xB4+0xC)++0x03
line.long 0x00 "DP_AUXCTL_3,Main Control Register For AUX Transactions"
bitfld.long 0x00 31. " RST               ,AUX channel reset" "Deasserted,Asserted"
rbitfld.long 0x00 24.--25. "    SEMA_GRANT        ,AUX channel obtained" "None,RM,VBIOS,PMU"
bitfld.long 0x00 20.--21. "                  SEMA_REQUEST ,AUX semaphore request" "RELEASE,RM,VBIOS,PMU"
textline "                                  "
bitfld.long 0x00 16. " TRANSACTREQ       ,AUX channel transaction request" "Done,Pending"
bitfld.long 0x00 12.--15. "       CMD               ,AUX command" "I2CWR,I2CRD,I2CREQWSTAT,,MOTWR,MOTRD,MOTREQWSTAT,,AUXWR,AUXRD,?..."
bitfld.long 0x00 8. "            ADDRESS_ONLY ,I2C-over-AUX address-only transactions" "No,Yes"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " CMDLEN            ,AUX channel data bytes number"
group.long (0xC4+0xC)++0x03
line.long 0x00 "DP_AUXSTAT_3,DP AUX Status"
rbitfld.long 0x00 28. " HPD_STATUS        ,HPD line state" "Unplugged,Plugged"
rbitfld.long 0x00 20.--23. "     AUXCTL_STATE      ,AUXCTL state machine" "Idle,SYNC,Start 1,Command,Address,Length,Write 1,Read 1,Get M,Stop 1,Stop 2,Reply,Clean up,?..."
rbitfld.long 0x00 16.--19. "               REPLYTYPE    ,AUX channel command reply" "ACK,NACK,DEFER,,I2CNACK,,,,I2CDEFER,?..."
textline "                                  "
bitfld.long 0x00 11. " NO_STOP_ERROR     ,STOP signal error pending" "Not pending,Pending"
bitfld.long 0x00 10. "   SINKSTAT_ERROR    ,SINKSTAT_ERROR" "Not pending,Pending"
bitfld.long 0x00 9. "            RX_ERROR     ,AUX channel receive error pending" "Not pending,Pending"
textline "                                  "
bitfld.long 0x00 8. " TIMEOUT_ERROR     ,Timeout error pending" "Not pending,Pending"
hexmask.long.byte 0x00 0.--7. 1. "   REPLY_M           , AUX channel transaction receive"
rgroup.long (0xD4+0xC)++0x07
line.long 0x00 "DP_AUX_SINKSTATLO_3,AUX Sink Status Low"
rgroup.long (0xE4+0xC)++0x07
line.long 0x04 "P_AUX_SINKSTATHI_3,AUX Sink Status High"
hexmask.long.word 0x04 0.--15. 0x01 " REG               ,Data buffer for sink/link status information"
group.long (0xF4+0xC)++0x03
line.long 0x00 "HPD_CONFIG_3,HPD Config"
hexmask.long.word 0x00 16.--31. 1. " UNPLUG_MIN_TIME   ,HPD line low before unplug"
hexmask.long.word 0x00 0.--15. 1. "          PLUG_MIN_TIME     ,HPD line high before plug"
group.long (0x104+0xC)++0x03
line.long 0x00 "HPD_IRQ_CONFIG_3,HPD IRQ Config"
hexmask.long.word 0x00 0.--15. 1. " MIN_LOW_TIME      ,IRQ minimum time"
group.long (0x114+0xC)++0x03
line.long 0x00 "DP_AUX_CONFIG_3,DP AUX Config"
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT           ,Sets the wait time (in microseconds)"
group.long (0x124+0xC)++0x03
line.long 0x00 "HYBRID_PADCTL_3,Hybrid Pads Control"
bitfld.long 0x00 15. " I2C_SDA_INPUT_RCV ,DATA channel I2C pad's high receiver enable" "Disabled,Enabled"
bitfld.long 0x00 14. "      I2C_SCL_INPUT_RCV ,CLK channel I2C pad's high receiver enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "V0_10,V0_55,V1_10,V1_60"
bitfld.long 0x00 8.--10. "         AUX_DRVZ          ,Output impedance driver control" "OHM_93_37,OHM_70_12,OHM_62_94,OHM_51_53,OHM_56_49,OHM_47_15,OHM_43_91,OHM_38_10"
bitfld.long 0x00 2.--7. "              AUX_DRVI     ,Output driver current control" "0mA,7.17mA,7.38mA,7.59mA,7.81mA,8.02mA,8.23mA,8.44mA,8.65mA,8.86mA,9.07mA,9.28mA,9.49mA,9.7mA,9.91mA,10.12mA,10.33mA,10.54mA,10.75mA,10.96mA,11.17mA,11.37mA,11.58mA,11.79mA,12mA (default),12.2mA,12.41mA,12.62mA,12.82mA,13.03mA,13.23mA,13.44mA,13.64mA,13.84mA,14.04mA,14.25mA,14.45mA,14.65mA,14.85mA,15.05mA,15.24mA,15.44mA,15.63mA,15.83mA,16.02mA,16.21mA,16.4mA,16.59mA,16.78mA,16.96mA,17.14mA,17.32mA,17.49mA,17.66mA,17.82mA,17.98mA,18.13mA,18.28mA,18.43mA,18.56mA,18.69mA,18.82mA,18.94mA,19.05mA"
else
textline "                                  "
bitfld.long 0x00 12.--13. " AUX_CMH           ,Output common voltage mode control" "0.6 V,0.64 V,0.70 V,0.56 V"
bitfld.long 0x00 8.--10. "        AUX_DRVZ          ,Output impedance driver control" "OHM_78,OHM_60,OHM_54,OHM_45,OHM_50,OHM_42,OHM_39,OHM_34"
bitfld.long 0x00 2.--7. "                 AUX_DRVI     ,Output driver current control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                  "
bitfld.long 0x00 1. " AUX_INPUT_RCV     ,AUX CH pad receiver enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " MODE              ,AUX/I2C pad mode control" "AUX,I2C"
group.long (0x134+0xC)++0x03
line.long 0x00 "HYBRID_SPARE_3,Hybrid Spare"
sif (cpuis("TEGRAX2"))
hexmask.long 0x00 2.--31. 1. " REG               ,REG"
bitfld.long 0x00 1. "      RCV_33_18_SEL     ,receiver to detect 3.3V-signaling or 1.8V-signaling" "1_8V,3_3V"
textline "                                  "
endif
bitfld.long 0x00 0. " PAD_PWR           ,Hybrid pad E_PWRD port control" "Power-up,Power-down"
sif (cpuis("TEGRAX2"))
group.long 0x174++0x07
line.long 0x00 "CTXSW_NEXT_0,Context Switch Register"
hexmask.long.word 0x00 10.--19. 1. " NEXT_CHANNEL      ,Next requested channel"
hexmask.long.word 0x00 0.--9. 1. "          NEXT_CLASS        ,Next requested class"
line.long 0x04 "CTXSW_0,Context Switch Register"
hexmask.long.word 0x04 11.--20. 1. " CURR_CHANNEL      ,Current working channel"
textline "                                  "
bitfld.long 0x04 10. " AUTO_ACK          ,Automatically acknowledge incoming context" "Manual,Autoack"
hexmask.long.word 0x04 0.--9. 1. "      CURR_CLASS        ,Current working class"
group.long (0x17C+0x0)++0x07 "REG_0"
line.long 0x00 "HSM_INTR_EN_AUX_0,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x0)++0x03
line.long 0x00 "HSM_INTR_AUX_0,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0x4)++0x07 "REG_1"
line.long 0x00 "HSM_INTR_EN_AUX_1,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x4)++0x03
line.long 0x00 "HSM_INTR_AUX_1,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0x8)++0x07 "REG_2"
line.long 0x00 "HSM_INTR_EN_AUX_2,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0x8)++0x03
line.long 0x00 "HSM_INTR_AUX_2,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
group.long (0x17C+0xC)++0x07 "REG_3"
line.long 0x00 "HSM_INTR_EN_AUX_3,HSM_INTR_EN_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt for HSM IRQ event" "Disabled,Enabled"
group.long (0x18C+0xC)++0x03
line.long 0x00 "HSM_INTR_AUX_3,HSM_INTR_AUX_0"
bitfld.long 0x00 0. " IRQ_EVENT         ,Interrupt status generated by DP SOR over AUX logic" "Not pending,Pending"
endif
width 0x0B
tree.end
tree.end
tree "HDMI CEC"
base ad:0x03960000
width 16.
group.long 0x00++0x0B
line.long 0x00 "SW_CONTROL_0,Software Control Mode 0"
bitfld.long 0x00 31. " MODE                                ,Mode" "Disabled,Enabled"
rbitfld.long 0x00 4. "          FILTERED_RX_DATA_PIN                ,Filtrated RX data pin" "Not filtrated,Filtrated"
rbitfld.long 0x00 0. "    RAW_INPUT_DATA_PIN ,Raw input data pin" "0,1"
line.long 0x04 "HW_CONTROL_0,Hardware Control Mode 0"
bitfld.long 0x04 31. " TX_RX_MODE                          ,TX/RX mode" "Disabled,Enabled"
bitfld.long 0x04 30. "          FAST_SIM_MODE                       ,Fast sim mode" "Disabled,Enabled"
bitfld.long 0x04 24. "         TX_NAK_MODE        ,TX not acknowledge mode" "Block,Frame"
textline "                         "
bitfld.long 0x04 16. " RX_NAK_MODE                         ,RX not acknowledge mode" "Block,Frame"
bitfld.long 0x04 15. "             RX_SNOOP                            ,RX snoop" "Disabled,Enabled"
hexmask.long.word 0x04 0.--14. 0x01 "         RX_LOGICAL_ADDRS   ,RX logical address"
line.long 0x08 "INPUT_FILTER_0,Input Filter 0"
bitfld.long 0x08 31. " MODE                                ,Mode" "Disabled,Enabled"
bitfld.long 0x08 0.--5. "          FIFO_LENGTH                         ,FIFO length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif (!cpuis("TEGRAX2"))
hgroup.long 0x0C++0x03
hide.long 0x00 "SPARE_0,Spare register for future use"
endif
group.long 0x10++0x03
line.long 0x00 "TX_REGISTER_0,TX Register 0"
bitfld.long 0x00 17. " RETRY_FRAME                         ,Retry frame indicator" "Not retry,Retry"
bitfld.long 0x00 16. "         GENERATE_START_BIT                  ,Generate start bit" "Not generated,Generated"
textline "                         "
bitfld.long 0x00 12. " ADDRESS_MODE                        ,Hardware direct/broadcast address" "Direct,Broadcast"
bitfld.long 0x00 8. "         EOM                                 ,End of message" "Not end,End"
hexmask.long.byte 0x00 0.--7. 1. "          DATA               ,8 bit address/data transmission"
rgroup.long 0x14++0x03
line.long 0x00 "RX_REGISTER_0,RX Register 0"
bitfld.long 0x00 9. " ACK_NAK                             ,Acknowledge/Not acknowledge bus read" "Acknowledged,Not acknowledged"
bitfld.long 0x00 8. "  EOM                                 ,End of message bus read" "0,1"
hexmask.long.byte 0x00 0.--7. 1. "                DATA               ,Bus read data bits"
group.long 0x18++0x07
line.long 0x00 "RX_TIMING_0_0,RX Timing Register 0"
hexmask.long.byte 0x00 24.--31. 1. " RX_START_BIT_MIN_DURATION           ,RX start bit minimum duration"
hexmask.long.byte 0x00 16.--23. 1. "                RX_START_BIT_MAX_DURATION           ,RX start bit maximum duration"
textline "                         "
hexmask.long.byte 0x00 8.--15. 1. " RX_START_BIT_MIN_LO_TIME            ,RX start bit minimum low time"
hexmask.long.byte 0x00 0.--7. 1. "                RX_START_BIT_MAX_LO_TIME            ,RX start bit maximum low time"
line.long 0x04 "RX_TIMING_1_0,RX Timing Register 1"
hexmask.long.byte 0x04 24.--31. 1. " RX_START_BIT_MIN_DURATION           ,RX start bit minimum duration"
hexmask.long.byte 0x04 16.--23. 1. "                RX_START_BIT_MAX_DURATION           ,RX start bit maximum duration"
textline "                         "
hexmask.long.byte 0x04 8.--15. 1. " RX_START_BIT_MIN_LO_TIME            ,RX start bit minimum low time"
hexmask.long.byte 0x04 0.--7. 1. "                RX_START_BIT_MAX_LO_TIME            ,RX start bit maximum low time"
group.long 0x20++0x03
line.long 0x00 "RX_TIMING_2_0,RX Timing Register 2"
hexmask.long.byte 0x00 0.--7. 1. " RX_END_OF_BLOCK_TIME                ,RX end of block time"
group.long 0x24++0x07
line.long 0x00 "TX_TIMING_0_0,TX Timing Register 0"
hexmask.long.byte 0x00 24.--31. 1. " TX_BUS_ERROR_LO_TIME                ,TX bus error low time"
textline "                         "
bitfld.long 0x00 16.--19. " TX_BUS_XITION_TIME                  ,TX bus xition time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
hexmask.long.byte 0x00 8.--15. 1. " TX_START_BIT_DURATION               ,TX start bit duration"
hexmask.long.byte 0x00 0.--7. 1. "                TX_START_BIT_LO_TIME                ,TX start bit low time"
line.long 0x04 "TX_TIMING_1_0,TX Timing Register 1"
hexmask.long.byte 0x04 24.--31. 1. " TX_ACK_NAK_BIT_SAMPLE_TIME          ,TX ACK/NAK bit sample time"
hexmask.long.byte 0x04 16.--23. 1. "                TX_DATA_BIT_DURATION                ,TX data bit duration"
textline "                         "
hexmask.long.byte 0x04 8.--15. 1. " TX_HI_DATA_BIT_LO_TIME              ,TX high data bit low time"
hexmask.long.byte 0x04 0.--7. 1. "                TX_LO_DATA_BIT_LO_TIME              ,TX low data bit low time"
group.long 0x2C++0x0B
line.long 0x00 "TX_TIMING_2_0,TX Timing Register 2"
bitfld.long 0x00 8.--11. " BUS_IDLE_TIME_RETRY_FRAME           ,Bus idle time retry frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                BUS_IDLE_TIME_NEW_FRAME             ,Bus idle time new frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
bitfld.long 0x00 0.--3. " BUS_IDLE_TIME_ADDITIONAL_FRAME      ,Bus idle time additional frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "INT_STAT_0,Interrupt Status 0"
bitfld.long 0x04 14. " FILTERED_RX_DATA_PIN_TRANSITION_L2H ,Filtrated RX data pin transition low to high" "No interrupt,Interrupt"
bitfld.long 0x04 13. "      FILTERED_RX_DATA_PIN_TRANSITION_H2L ,Filtrated RX data pin transition high to low" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 12. " RX_BUS_ERROR_DETECTED               ,RX bus error detected" "No interrupt,Interrupt"
bitfld.long 0x04 11. "      RX_BUS_ANOMALY_DETECTED             ,RX bus anomaly detected" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 10. " RX_START_BIT_DETECTED               ,RX start bit detected" "No interrupt,Interrupt"
bitfld.long 0x04 9. "      RX_REGISTER_OVERRUN                 ,RX register overrun" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 8. " RX_REGISTER_FULL                    ,RX register full" "No interrupt,Interrupt"
bitfld.long 0x04 5. "      TX_FRAME_TRANSMITTED                ,TX frame transmitted" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 4. " TX_BUS_ANOMALY_DETECTED             ,TX bus anomaly detected" "No interrupt,Interrupt"
bitfld.long 0x04 3. "      TX_ARBITRATION_FAILED               ,TX arbitration failed" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 2. " TX_FRAME_OR_BLOCK_NAKD              ,TX frame or block not acknowledge" "No interrupt,Interrupt"
bitfld.long 0x04 1. "      TX_REGISTER_UNDERRUN                ,TX register error occur" "No interrupt,Interrupt"
textline "                         "
bitfld.long 0x04 0. " TX_REGISTER_EMPTY                   ,TX register empty" "No interrupt,Interrupt"
line.long 0x08 "INT_MASK_0,Interrupt Mask 0"
bitfld.long 0x08 14. " FILTERED_RX_DATA_PIN_TRANSITION_L2H ,Filtrated RX data pin transition low to high mask" "Disabled,Enabled"
bitfld.long 0x08 13. "          FILTERED_RX_DATA_PIN_TRANSITION_H2L ,Filtrated RX data pin transition high to low mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 12. " RX_BUS_ERROR_DETECTED               ,RX bus error detected mask" "Disabled,Enabled"
bitfld.long 0x08 11. "          RX_BUS_ANOMALY_DETECTED             ,RX bus anomaly detected mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 10. " RX_START_BIT_DETECTED               ,RX start bit detected mask" "Disabled,Enabled"
bitfld.long 0x08 9. "          RX_REGISTER_OVERRUN                 ,RX register overrun mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 8. " RX_REGISTER_FULL                    ,RX register full mask" "Disabled,Enabled"
bitfld.long 0x08 5. "          TX_FRAME_TRANSMITTED                ,TX frame transmitted mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 4. " TX_BUS_ANOMALY_DETECTED             ,TX bus anomaly detected mask" "Disabled,Enabled"
bitfld.long 0x08 3. "          TX_ARBITRATION_FAILED               ,TX arbitration failed mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 2. " TX_FRAME_OR_BLOCK_NAKD              ,TX frame or block not acknowledge mask" "Disabled,Enabled"
bitfld.long 0x08 1. "          TX_REGISTER_UNDERRUN                ,TX register error occur mask" "Disabled,Enabled"
textline "                         "
bitfld.long 0x08 0. " TX_REGISTER_EMPTY                   ,TX register empty mask" "Disabled,Enabled"
rgroup.long 0x38++0x07
line.long 0x00 "HW_DEBUG_RX_0,Hardware Debug RX 0"
bitfld.long 0x00 27. " RXDATABIT_SAMPLE_TIMER              ,RX data bit sample timer" "0,1"
bitfld.long 0x00 26. "                 LOGICADDR_MATCH                     ,Logic address match" "Not matched,Matched"
textline "                         "
bitfld.long 0x00 25. " FORCELOOUT                          ,Force low out" "Not forced,Forced"
bitfld.long 0x00 21.--24. "        STATE                               ,State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
bitfld.long 0x00 17.--20. " RXBIT_COUNT                         ,RX bit count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.tbyte 0x00 0.--16. 1. "                DURATION_COUNT                      ,Duration count"
line.long 0x04 "HW_DEBUG_TX_0,Hardware Debug TX 0"
bitfld.long 0x04 26. " TXDATABIT_SAMPLE_TIMER              ,TX data bit sample timer" "Not matched,Matched"
bitfld.long 0x04 25. "       FORCELOOUT                          ,Force low out" "Not forced,Forced"
textline "                         "
bitfld.long 0x04 21.--24. " STATE                               ,State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 17.--20. "                TXBIT_COUNT                         ,TX bit count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
hexmask.long.tbyte 0x04 0.--16. 1. " DURATION_COUNT                      ,Duration count"
hgroup.long 0x40++0x03
hide.long 0x00 "HW_SPARE_0_0,Hardware Spare 0"
width 0x0B
tree.end
tree "VI (Video Input)"
base ad:0x15700000
width 24.
tree "VI General Configuration Registers"
group.long 0x3C++0x0F
line.long 0x00 "CFG_SECURE_CHANNELS_0,Configuration Secure Channels"
bitfld.long 0x00 11. " SECURE[11]                    ,Secure 11" "Not secure,Secure"
bitfld.long 0x00 10. "    SECURE[10]                ,Secure 10" "Not secure,Secure"
bitfld.long 0x00 9. "    SECURE[9]                  ,Secure 9" "Not secure,Secure"
textline "                                 "
bitfld.long 0x00 8. " SECURE[8]                     ,Secure 8" "Not secure,Secure"
bitfld.long 0x00 7. "    SECURE[7]                 ,Secure 7" "Not secure,Secure"
bitfld.long 0x00 6. "    SECURE[6]                  ,Secure 6" "Not secure,Secure"
textline "                                 "
bitfld.long 0x00 5. " SECURE[5]                     ,Secure 5" "Not secure,Secure"
bitfld.long 0x00 4. "    SECURE[4]                 ,Secure 4" "Not secure,Secure"
bitfld.long 0x00 3. "    SECURE[3]                  ,Secure 3" "Not secure,Secure"
textline "                                 "
bitfld.long 0x00 2. " SECURE[2]                     ,Secure 2" "Not secure,Secure"
bitfld.long 0x00 1. "    SECURE[1]                 ,Secure 1" "Not secure,Secure"
bitfld.long 0x00 0. "    SECURE[0]                  ,Secure 0" "Not secure,Secure"
line.long 0x04 "CFG_SECURE_GROUP_0,Configuration Secure Group"
hexmask.long.word 0x04 0.--10. 1. " USERSEC                       ,USERSEC"
line.long 0x08 "CFG_INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x08 29. " VGP6_INT_STATUS               ,VGP6 pin interrupt status" "No interrupt,Interrupt"
bitfld.long 0x08 28. "  VGP5_INT_STATUS           ,VGP5 pin interrupt status" "No interrupt,Interrupt"
bitfld.long 0x08 27. "  VGP4_INT_STATUS            ,VGP4 pin interrupt status" "No interrupt,Interrupt"
textline "                                 "
bitfld.long 0x08 26. " VGP3_INT_STATUS               ,VGP3 pin interrupt status" "No interrupt,Interrupt"
bitfld.long 0x08 25. "  VGP2_INT_STATUS           ,VGP2 pin interrupt status" "No interrupt,Interrupt"
bitfld.long 0x08 24. "  VGP1_INT_STATUS            ,VGP1 pin interrupt status" "No interrupt,Interrupt"
textline "                                 "
eventfld.long 0x08 0. " MASTER_ERR_STATUS             ,Set whenever there is any kind of error situation" "No interrupt,Interrupt"
line.long 0x0C "CFG_INTERRUPT_MASK_0,Interrupt Mask"
bitfld.long 0x0C 29. " VGP6_INT_MASK                 ,VGP6 pin interrupt mask" "Not masked,Masked"
bitfld.long 0x0C 28. "    VGP5_INT_MASK             ,VGP5 pin interrupt mask" "Not masked,Masked"
bitfld.long 0x0C 27. "    VGP4_INT_MASK              ,VGP4 pin interrupt mask" "Not masked,Masked"
textline "                                 "
bitfld.long 0x0C 26. " VGP3_INT_MASK                 ,VGP3 pin interrupt mask" "Not masked,Masked"
bitfld.long 0x0C 25. "    VGP2_INT_MASK             ,VGP2 pin interrupt mask" "Not masked,Masked"
bitfld.long 0x0C 24. "    VGP1_INT_MASK              ,VGP1 pin interrupt mask" "Not masked,Masked"
textline "                                 "
bitfld.long 0x0C 7. " HOST_PKTINJECT_STALL_ERR_MASK ,Interrupt mask for Host1x packet inject stall error" "Not masked,Masked"
bitfld.long 0x0C 6. "    CSIMUX_FIFO_OVFL_ERR_MASK ,Interrupt mask for CSIMUX FIFO overflow" "Not masked,Masked"
bitfld.long 0x0C 5. "    ATOMP_PACKER_OVFL_ERR_MASK ,Interrupt mask for ATOMP packer FIFO overflow" "Not masked,Masked"
textline "                                 "
bitfld.long 0x0C 3. " NOTIFY_FIFO_OVFL_ERR_MASK     ,Interrupt mask for notify FIFO overflow" "Not masked,Masked"
bitfld.long 0x0C 0. "    ISPBUFA_ERR_MASK          ,Interrupt mask for ISPBUFA error status" "Not masked,Masked"
tree.end
width 33.
tree "VGPIO Registers"
group.long 0x4C++0x027
line.long 0x00 "CFG_PWM_CONTROL_0,VI Pulse Width Modulation Control"
hexmask.long.byte 0x00 24.--31. 1. " PWM_COUNTER             ,PWM counter 8-bit value"
bitfld.long 0x00 20.--21. "            PWM_MODE            ,PWM mode continuous" "Continuous,Single,Counter,?..."
bitfld.long 0x00 4. "    PWM_DIRECTION     ,PWM direction" "Incrementing,Decrementing"
textline "                                          "
bitfld.long 0x00 0. " PWM_ENABLE              ,PWM enable" "Disabled,Enabled"
line.long 0x04 "CFG_PWM_HIGH_PULSE_0,PWM High Pulse Period"
line.long 0x08 "CFG_PWM_LOW_PULSE_0,PWM Low Pulse Period"
line.long 0x0C "CFG_PWM_SELECT_PULSE_A_0,PWM Pulse Select A"
bitfld.long 0x0C 31. " PWM_SELECT_A[31]        ,PWM select bits 31" "Not selected,Selected"
bitfld.long 0x0C 30. "  PWM_SELECT_A[30]    ,PWM select bits 30" "Not selected,Selected"
bitfld.long 0x0C 29. "  PWM_SELECT_A[29]  ,PWM select bits 29" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 28. " PWM_SELECT_A[28]        ,PWM select bits 28" "Not selected,Selected"
bitfld.long 0x0C 27. "  PWM_SELECT_A[27]    ,PWM select bits 27" "Not selected,Selected"
bitfld.long 0x0C 26. "  PWM_SELECT_A[26]  ,PWM select bits 26" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 25. " PWM_SELECT_A[25]        ,PWM select bits 25" "Not selected,Selected"
bitfld.long 0x0C 24. "  PWM_SELECT_A[24]    ,PWM select bits 24" "Not selected,Selected"
bitfld.long 0x0C 23. "  PWM_SELECT_A[23]  ,PWM select bits 23" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 22. " PWM_SELECT_A[22]        ,PWM select bits 22" "Not selected,Selected"
bitfld.long 0x0C 21. "  PWM_SELECT_A[21]    ,PWM select bits 21" "Not selected,Selected"
bitfld.long 0x0C 20. "  PWM_SELECT_A[20]  ,PWM select bits 20" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 19. " PWM_SELECT_A[19]        ,PWM select bits 19" "Not selected,Selected"
bitfld.long 0x0C 18. "  PWM_SELECT_A[18]    ,PWM select bits 18" "Not selected,Selected"
bitfld.long 0x0C 17. "  PWM_SELECT_A[17]  ,PWM select bits 17" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 16. " PWM_SELECT_A[16]        ,PWM select bits 16" "Not selected,Selected"
bitfld.long 0x0C 15. "  PWM_SELECT_A[15]    ,PWM select bits 15" "Not selected,Selected"
bitfld.long 0x0C 14. "  PWM_SELECT_A[14]  ,PWM select bits 14" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 13. " PWM_SELECT_A[13]        ,PWM select bits 13" "Not selected,Selected"
bitfld.long 0x0C 12. "  PWM_SELECT_A[12]    ,PWM select bits 12" "Not selected,Selected"
bitfld.long 0x0C 11. "  PWM_SELECT_A[11]  ,PWM select bits 11" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 10. " PWM_SELECT_A[10]        ,PWM select bits 10" "Not selected,Selected"
bitfld.long 0x0C 9. "  PWM_SELECT_A[9]     ,PWM select bits 9" "Not selected,Selected"
bitfld.long 0x0C 8. "  PWM_SELECT_A[8]   ,PWM select bits 8" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 7. " PWM_SELECT_A[7]         ,PWM select bits 7" "Not selected,Selected"
bitfld.long 0x0C 6. "  PWM_SELECT_A[6]     ,PWM select bits 6" "Not selected,Selected"
bitfld.long 0x0C 5. "  PWM_SELECT_A[5]   ,PWM select bits 5" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 4. " PWM_SELECT_A[4]         ,PWM select bits 4" "Not selected,Selected"
bitfld.long 0x0C 3. "  PWM_SELECT_A[3]     ,PWM select bits 3" "Not selected,Selected"
bitfld.long 0x0C 2. "  PWM_SELECT_A[2]   ,PWM select bits 2" "Not selected,Selected"
textline "                                          "
bitfld.long 0x0C 1. " PWM_SELECT_A[1]         ,PWM select bits 1" "Not selected,Selected"
bitfld.long 0x0C 0. "  PWM_SELECT_A[0]     ,PWM select bits 0" "Not selected,Selected"
line.long 0x10 "CFG_PWM_SELECT_PULSE_B_0,PWM Pulse Select B"
bitfld.long 0x10 31. " PWM_SELECT_B[63]        ,PWM select bits 63" "Not selected,Selected"
bitfld.long 0x10 30. "  PWM_SELECT_B[62]    ,PWM select bits 62" "Not selected,Selected"
bitfld.long 0x10 29. "  PWM_SELECT_B[61]  ,PWM select bits 61" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 28. " PWM_SELECT_B[60]        ,PWM select bits 60" "Not selected,Selected"
bitfld.long 0x10 27. "  PWM_SELECT_B[59]    ,PWM select bits 59" "Not selected,Selected"
bitfld.long 0x10 26. "  PWM_SELECT_B[58]  ,PWM select bits 58" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 25. " PWM_SELECT_B[57]        ,PWM select bits 57" "Not selected,Selected"
bitfld.long 0x10 24. "  PWM_SELECT_B[56]    ,PWM select bits 56" "Not selected,Selected"
bitfld.long 0x10 23. "  PWM_SELECT_B[55]  ,PWM select bits 55" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 22. " PWM_SELECT_B[54]        ,PWM select bits 54" "Not selected,Selected"
bitfld.long 0x10 21. "  PWM_SELECT_B[53]    ,PWM select bits 53" "Not selected,Selected"
bitfld.long 0x10 20. "  PWM_SELECT_B[52]  ,PWM select bits 52" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 19. " PWM_SELECT_B[51]        ,PWM select bits 51" "Not selected,Selected"
bitfld.long 0x10 18. "  PWM_SELECT_B[50]    ,PWM select bits 50" "Not selected,Selected"
bitfld.long 0x10 17. "  PWM_SELECT_B[49]  ,PWM select bits 49" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 16. " PWM_SELECT_B[48]        ,PWM select bits 48" "Not selected,Selected"
bitfld.long 0x10 15. "  PWM_SELECT_B[47]    ,PWM select bits 47" "Not selected,Selected"
bitfld.long 0x10 14. "  PWM_SELECT_B[46]  ,PWM select bits 46" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 13. " PWM_SELECT_B[45]        ,PWM select bits 45" "Not selected,Selected"
bitfld.long 0x10 12. "  PWM_SELECT_B[44]    ,PWM select bits 44" "Not selected,Selected"
bitfld.long 0x10 11. "  PWM_SELECT_B[43]  ,PWM select bits 43" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 10. " PWM_SELECT_B[42]        ,PWM select bits 42" "Not selected,Selected"
bitfld.long 0x10 9. "  PWM_SELECT_B[41]    ,PWM select bits 41" "Not selected,Selected"
bitfld.long 0x10 8. "  PWM_SELECT_B[40]  ,PWM select bits 40" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 7. " PWM_SELECT_B[39]        ,PWM select bits 39" "Not selected,Selected"
bitfld.long 0x10 6. "  PWM_SELECT_B[38]    ,PWM select bits 38" "Not selected,Selected"
bitfld.long 0x10 5. "  PWM_SELECT_B[37]  ,PWM select bits 37" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 4. " PWM_SELECT_B[36]        ,PWM select bits 36" "Not selected,Selected"
bitfld.long 0x10 3. "  PWM_SELECT_B[35]    ,PWM select bits 35" "Not selected,Selected"
bitfld.long 0x10 2. "  PWM_SELECT_B[34]  ,PWM select bits 34" "Not selected,Selected"
textline "                                          "
bitfld.long 0x10 1. " PWM_SELECT_B[33]        ,PWM select bits 33" "Not selected,Selected"
bitfld.long 0x10 0. "  PWM_SELECT_B[32]    ,PWM select bits 32" "Not selected,Selected"
line.long 0x14 "CFG_PWM_SELECT_PULSE_C_0,PWM Pulse Select C"
bitfld.long 0x14 31. " PWM_SELECT_C[95]        ,PWM select bits 95" "Not selected,Selected"
bitfld.long 0x14 30. "  PWM_SELECT_C[94]    ,PWM select bits 94" "Not selected,Selected"
bitfld.long 0x14 29. "  PWM_SELECT_C[93]  ,PWM select bits 93" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 28. " PWM_SELECT_C[92]        ,PWM select bits 92" "Not selected,Selected"
bitfld.long 0x14 27. "  PWM_SELECT_C[91]    ,PWM select bits 91" "Not selected,Selected"
bitfld.long 0x14 26. "  PWM_SELECT_C[90]  ,PWM select bits 90" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 25. " PWM_SELECT_C[89]        ,PWM select bits 89" "Not selected,Selected"
bitfld.long 0x14 24. "  PWM_SELECT_C[88]    ,PWM select bits 88" "Not selected,Selected"
bitfld.long 0x14 23. "  PWM_SELECT_C[87]  ,PWM select bits 87" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 22. " PWM_SELECT_C[86]        ,PWM select bits 86" "Not selected,Selected"
bitfld.long 0x14 21. "  PWM_SELECT_C[85]    ,PWM select bits 85" "Not selected,Selected"
bitfld.long 0x14 20. "  PWM_SELECT_C[84]  ,PWM select bits 84" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 19. " PWM_SELECT_C[83]        ,PWM select bits 83" "Not selected,Selected"
bitfld.long 0x14 18. "  PWM_SELECT_C[82]    ,PWM select bits 82" "Not selected,Selected"
bitfld.long 0x14 17. "  PWM_SELECT_C[81]  ,PWM select bits 81" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 16. " PWM_SELECT_C[80]        ,PWM select bits 80" "Not selected,Selected"
bitfld.long 0x14 15. "  PWM_SELECT_C[79]    ,PWM select bits 79" "Not selected,Selected"
bitfld.long 0x14 14. "  PWM_SELECT_C[78]  ,PWM select bits 78" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 13. " PWM_SELECT_C[77]        ,PWM select bits 77" "Not selected,Selected"
bitfld.long 0x14 12. "  PWM_SELECT_C[76]    ,PWM select bits 76" "Not selected,Selected"
bitfld.long 0x14 11. "  PWM_SELECT_C[75]  ,PWM select bits 75" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 10. " PWM_SELECT_C[74]        ,PWM select bits 74" "Not selected,Selected"
bitfld.long 0x14 9. "  PWM_SELECT_C[73]    ,PWM select bits 73" "Not selected,Selected"
bitfld.long 0x14 8. "  PWM_SELECT_C[72]  ,PWM select bits 72" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 7. " PWM_SELECT_C[71]        ,PWM select bits 71" "Not selected,Selected"
bitfld.long 0x14 6. "  PWM_SELECT_C[70]    ,PWM select bits 70" "Not selected,Selected"
bitfld.long 0x14 5. "  PWM_SELECT_C[69]  ,PWM select bits 69" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 4. " PWM_SELECT_C[68]        ,PWM select bits 68" "Not selected,Selected"
bitfld.long 0x14 3. "  PWM_SELECT_C[67]    ,PWM select bits 67" "Not selected,Selected"
bitfld.long 0x14 2. "  PWM_SELECT_C[66]  ,PWM select bits 66" "Not selected,Selected"
textline "                                          "
bitfld.long 0x14 1. " PWM_SELECT_C[65]        ,PWM select bits 65" "Not selected,Selected"
bitfld.long 0x14 0. "  PWM_SELECT_C[64]    ,PWM select bits 64" "Not selected,Selected"
line.long 0x18 "CFG_PWM_SELECT_PULSE_D_0,PWM Pulse Select D"
bitfld.long 0x18 31. " PWM_SELECT_D[127]       ,PWM select bits 127" "Not selected,Selected"
bitfld.long 0x18 30. "  PWM_SELECT_D[126]   ,PWM select bits 126" "Not selected,Selected"
bitfld.long 0x18 29. "  PWM_SELECT_D[125] ,PWM select bits 125" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 28. " PWM_SELECT_D[124]       ,PWM select bits 124" "Not selected,Selected"
bitfld.long 0x18 27. "  PWM_SELECT_D[123]   ,PWM select bits 123" "Not selected,Selected"
bitfld.long 0x18 26. "  PWM_SELECT_D[122] ,PWM select bits 122" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 25. " PWM_SELECT_D[121]       ,PWM select bits 121" "Not selected,Selected"
bitfld.long 0x18 24. "  PWM_SELECT_D[120]   ,PWM select bits 120" "Not selected,Selected"
bitfld.long 0x18 23. "  PWM_SELECT_D[119] ,PWM select bits 119" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 22. " PWM_SELECT_D[118]       ,PWM select bits 118" "Not selected,Selected"
bitfld.long 0x18 21. "  PWM_SELECT_D[117]   ,PWM select bits 117" "Not selected,Selected"
bitfld.long 0x18 20. "  PWM_SELECT_D[116] ,PWM select bits 116" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 19. " PWM_SELECT_D[115]       ,PWM select bits 115" "Not selected,Selected"
bitfld.long 0x18 18. "  PWM_SELECT_D[114]   ,PWM select bits 114" "Not selected,Selected"
bitfld.long 0x18 17. "  PWM_SELECT_D[113] ,PWM select bits 113" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 16. " PWM_SELECT_D[112]       ,PWM select bits 112" "Not selected,Selected"
bitfld.long 0x18 15. "  PWM_SELECT_D[111]   ,PWM select bits 111" "Not selected,Selected"
bitfld.long 0x18 14. "  PWM_SELECT_D[110] ,PWM select bits 110" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 13. " PWM_SELECT_D[109]       ,PWM select bits 109" "Not selected,Selected"
bitfld.long 0x18 12. "  PWM_SELECT_D[108]   ,PWM select bits 108" "Not selected,Selected"
bitfld.long 0x18 11. "  PWM_SELECT_D[107] ,PWM select bits 107" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 10. " PWM_SELECT_D[106]       ,PWM select bits 106" "Not selected,Selected"
bitfld.long 0x18 9. "  PWM_SELECT_D[105]   ,PWM select bits 105" "Not selected,Selected"
bitfld.long 0x18 8. "  PWM_SELECT_D[104] ,PWM select bits 104" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 7. " PWM_SELECT_D[103]       ,PWM select bits 103" "Not selected,Selected"
bitfld.long 0x18 6. "  PWM_SELECT_D[102]   ,PWM select bits 102" "Not selected,Selected"
bitfld.long 0x18 5. "  PWM_SELECT_D[101] ,PWM select bits 101" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 4. " PWM_SELECT_D[100]       ,PWM select bits 100" "Not selected,Selected"
bitfld.long 0x18 3. "  PWM_SELECT_D[99]    ,PWM select bits 99" "Not selected,Selected"
bitfld.long 0x18 2. "  PWM_SELECT_D[98]  ,PWM select bits 98" "Not selected,Selected"
textline "                                          "
bitfld.long 0x18 1. " PWM_SELECT_D[97]        ,PWM select bits 97" "Not selected,Selected"
bitfld.long 0x18 0. "  PWM_SELECT_D[96]    ,PWM select bits 96" "Not selected,Selected"
textline "                                          "
if (((per.l(ad:0x15700000+0x78))&0x30000)==0x10000)
group.long 0x78++0x03
line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin output select VGP1" "Data,?..."
bitfld.long 0x00 16. "          VGP1_OUTPUT_ENABLE ,VGP1 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP1_INPUT_DATA  ,VGP1 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP1_OUTPUT_DATA       ,VGP1 pin output data" "Low,High"
else
group.long 0x78++0x03
line.long 0x00 "CFG_VGP1_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP1 ,Pin output select VGP1" "Data,?..."
bitfld.long 0x00 16. "          VGP1_OUTPUT_ENABLE ,VGP1 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP1_INPUT_DATA  ,VGP1 pin input data" "Low,High"
endif
if (((per.l(ad:0x15700000+0x7C))&0x30000)==0x10000)
group.long 0x7C++0x03
line.long 0x00 "CFG_VGP2_0,VI VGP2 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin output select VGP2" "Data,?..."
bitfld.long 0x00 16. "          VGP2_OUTPUT_ENABLE ,VGP2 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP2_INPUT_DATA  ,VGP2 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP2_OUTPUT_DATA       ,VGP2 pin output data" "Low,High"
else
group.long 0x7C++0x03
line.long 0x00 "CFG_VGP2_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP2 ,Pin output select VGP2" "Data,?..."
bitfld.long 0x00 16. "          VGP2_OUTPUT_ENABLE ,VGP2 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP2_INPUT_DATA  ,VGP2 pin input data" "Low,High"
endif
if (((per.l(ad:0x15700000+0x80))&0x30000)==0x10000)
group.long 0x80++0x03
line.long 0x00 "CFG_VGP3_0,VI VGP3 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin output select VGP3" "Data,?..."
bitfld.long 0x00 16. "          VGP3_OUTPUT_ENABLE ,VGP3 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP3_INPUT_DATA  ,VGP3 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP3_OUTPUT_DATA       ,VGP3 pin output data" "Low,High"
else
group.long 0x80++0x03
line.long 0x00 "CFG_VGP3_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP3 ,Pin output select VGP3" "Data,?..."
bitfld.long 0x00 16. "          VGP3_OUTPUT_ENABLE ,VGP3 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP3_INPUT_DATA  ,VGP3 pin input data" "Low,High"
endif
if (((per.l(ad:0x15700000+0x84))&0x30000)==0x10000)
group.long 0x84++0x03
line.long 0x00 "CFG_VGP4_0,VI VGP4 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin output select VGP4" "Data,?..."
bitfld.long 0x00 16. "          VGP4_OUTPUT_ENABLE ,VGP4 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP4_INPUT_DATA  ,VGP4 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP4_OUTPUT_DATA       ,VGP4 pin output data" "Low,High"
else
group.long 0x84++0x03
line.long 0x00 "CFG_VGP4_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP4 ,Pin output select VGP4" "Data,?..."
bitfld.long 0x00 16. "          VGP4_OUTPUT_ENABLE ,VGP4 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP4_INPUT_DATA  ,VGP4 pin input data" "Low,High"
endif
if (((per.l(ad:0x15700000+0x88))&0x30000)==0x10000)
group.long 0x88++0x03
line.long 0x00 "CFG_VGP5_0,VI VGP5 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin output select VGP5" "Data,?..."
bitfld.long 0x00 16. "          VGP5_OUTPUT_ENABLE ,VGP5 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP5_INPUT_DATA  ,VGP5 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP5_OUTPUT_DATA       ,VGP5 pin output data" "Low,High"
else
group.long 0x88++0x03
line.long 0x00 "CFG_VGP5_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP5 ,Pin output select VGP5" "Data,?..."
bitfld.long 0x00 16. "          VGP5_OUTPUT_ENABLE ,VGP5 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP5_INPUT_DATA  ,VGP5 pin input data" "Low,High"
endif
if (((per.l(ad:0x15700000+0x8C))&0x30000)==0x10000)
group.long 0x8C++0x03
line.long 0x00 "CFG_VGP6_0,VI VGP6 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin output select VGP6" "Data,?..."
bitfld.long 0x00 16. "          VGP6_OUTPUT_ENABLE ,VGP6 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP6_INPUT_DATA  ,VGP6 pin input data" "Low,High"
textline "                                          "
bitfld.long 0x00 0. " VGP6_OUTPUT_DATA       ,VGP6 pin output data" "Low,High"
else
group.long 0x8C++0x03
line.long 0x00 "CFG_VGP6_0,VI VGP1 Input/Output Config/Data"
bitfld.long 0x00 17. " PIN_OUTPUT_SELECT_VGP6 ,Pin output select VGP6" "Data,?..."
bitfld.long 0x00 16. "          VGP6_OUTPUT_ENABLE ,VGP6 pin output enable" "Disabled,Enabled"
rbitfld.long 0x00 8. "      VGP6_INPUT_DATA  ,VGP6 pin input data" "Low,High"
endif
textline "                                          "
group.long 0x90++0x07
line.long 0x00 "CFG_INTERRUPT_TYPE_SELECT_0,Interrupt Type Select"
bitfld.long 0x00 6. " VGP6_INT_TYPE           ,VGP6 pin interrupt type" "Edge,Level"
bitfld.long 0x00 5. "         VGP5_INT_TYPE       ,VGP5 pin interrupt type" "Edge,Level"
bitfld.long 0x00 4. "         VGP4_INT_TYPE     ,VGP4 pin interrupt type" "Edge,Level"
textline "                                          "
bitfld.long 0x00 3. " VGP3_INT_TYPE           ,VGP3 pin interrupt type" "Edge,Level"
bitfld.long 0x00 2. "         VGP2_INT_TYPE       ,VGP2 pin interrupt type" "Edge,Level"
bitfld.long 0x00 1. "         VGP1_INT_TYPE     ,VGP1 pin interrupt type" "Edge,Level"
line.long 0x04 "CFG_INTERRUPT_POLARITY_SELECT_0,Interrupt Polarity Select"
bitfld.long 0x04 6. " VGP6_INT_POLARITY       ,VGP6 pin interrupt type" "Falling edge,Rising edge"
bitfld.long 0x04 5. "  VGP5_INT_POLARITY   ,VGP5 pin interrupt type" "Falling edge,Rising edge"
bitfld.long 0x04 4. "  VGP4_INT_POLARITY ,VGP4 pin interrupt type" "Falling edge,Rising edge"
textline "                                          "
bitfld.long 0x04 3. " VGP3_INT_POLARITY       ,VGP3 pin interrupt type" "Falling edge,Rising edge"
bitfld.long 0x04 2. "  VGP2_INT_POLARITY   ,VGP2 pin interrupt type" "Falling edge,Rising edge"
bitfld.long 0x04 1. "  VGP1_INT_POLARITY ,VGP1 pin interrupt type" "Falling edge,Rising edge"
tree.end
width 29.
tree "Configuration Registers"
group.long 0xB8++0x07
line.long 0x00 "CFG_READY_FOR_LATENCY_0,Configuration Ready For Latency"
hexmask.long.word 0x00 0.--8. 1. " COUNT_TRESHOLD ,Indicates that VI is ready for latency event if number of entries in the FIFO is less than COUNT_THRESHOLD"
line.long 0x04 "CFG_REGISTER_DEBUG_ACCESS_0,Configuration Register Debug Access"
bitfld.long 0x04 1. " WR_ACT_SEL     ,Host write operations operate on both shadow and active register (debug)" "Disabled,Enabled"
bitfld.long 0x04 0. "  RD_MUX_SEL ,Host read operations are on non-shadowed register (debug)" "Disabled,Enabled"
tree.end
width 25.
tree "PIXFMT Registers"
group.long 0x200++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_0,COMPAND KNEE CFG0 0"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x204++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_1,COMPAND KNEE CFG0 1"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x208++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_2,COMPAND KNEE CFG0 2"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x20C++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_3,COMPAND KNEE CFG0 3"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x210++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_4,COMPAND KNEE CFG0 4"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x214++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_5,COMPAND KNEE CFG0 5"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x218++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_6,COMPAND KNEE CFG0 6"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x21C++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_7,COMPAND KNEE CFG0 7"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x220++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_8,COMPAND KNEE CFG0 8"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x224++0x03
line.long 0x00 "COMPAND_KNEE_CFG0_9,COMPAND KNEE CFG0 9"
hexmask.long.tbyte 0x00 7.--26. 1. " BASE   ,Input position for this knee point in U20 format"
group.long 0x228++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_0,COMPAND KNEE CFG1 0"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x22C++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_1,COMPAND KNEE CFG1 1"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x230++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_2,COMPAND KNEE CFG1 2"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x234++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_3,COMPAND KNEE CFG1 3"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x238++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_4,COMPAND KNEE CFG1 4"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x23C++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_5,COMPAND KNEE CFG1 5"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x240++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_6,COMPAND KNEE CFG1 6"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x244++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_7,COMPAND KNEE CFG1 7"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x248++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_8,COMPAND KNEE CFG1 8"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x24C++0x03
line.long 0x00 "COMPAND_KNEE_CFG1_9,COMPAND KNEE CFG1 9"
hexmask.long.tbyte 0x00 0.--16. 1. " SCALE  ,Scale above this knee point in U10.7 format"
group.long 0x250++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_0,COMPAND KNEE CFG2 0"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x254++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_1,COMPAND KNEE CFG2 1"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x258++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_2,COMPAND KNEE CFG2 2"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x25C++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_3,COMPAND KNEE CFG2 3"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x260++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_4,COMPAND KNEE CFG2 4"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x264++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_5,COMPAND KNEE CFG2 5"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x268++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_6,COMPAND KNEE CFG2 6"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x26C++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_7,COMPAND KNEE CFG2 7"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x270++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_8,COMPAND KNEE CFG2 8"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x274++0x03
line.long 0x00 "COMPAND_KNEE_CFG2_9,COMPAND KNEE CFG2 9"
hexmask.long 0x00 0.--26. 0x01 " OFFSET ,Output offset for this knee point in U20.7 format"
group.long 0x300++0x03
line.long 0x00 "PDAF_PATTERN_0,PDAF Pattern 0"
group.long 0x304++0x03
line.long 0x00 "PDAF_PATTERN_1,PDAF Pattern 1"
group.long 0x308++0x03
line.long 0x00 "PDAF_PATTERN_2,PDAF Pattern 2"
group.long 0x30C++0x03
line.long 0x00 "PDAF_PATTERN_3,PDAF Pattern 3"
group.long 0x310++0x03
line.long 0x00 "PDAF_PATTERN_4,PDAF Pattern 4"
group.long 0x314++0x03
line.long 0x00 "PDAF_PATTERN_5,PDAF Pattern 5"
group.long 0x318++0x03
line.long 0x00 "PDAF_PATTERN_6,PDAF Pattern 6"
group.long 0x31C++0x03
line.long 0x00 "PDAF_PATTERN_7,PDAF Pattern 7"
group.long 0x320++0x03
line.long 0x00 "PDAF_PATTERN_8,PDAF Pattern 8"
group.long 0x324++0x03
line.long 0x00 "PDAF_PATTERN_9,PDAF Pattern 9"
group.long 0x328++0x03
line.long 0x00 "PDAF_PATTERN_10,PDAF Pattern 10"
group.long 0x32C++0x03
line.long 0x00 "PDAF_PATTERN_11,PDAF Pattern 11"
group.long 0x330++0x03
line.long 0x00 "PDAF_PATTERN_12,PDAF Pattern 12"
group.long 0x334++0x03
line.long 0x00 "PDAF_PATTERN_13,PDAF Pattern 13"
group.long 0x338++0x03
line.long 0x00 "PDAF_PATTERN_14,PDAF Pattern 14"
group.long 0x33C++0x03
line.long 0x00 "PDAF_PATTERN_15,PDAF Pattern 15"
group.long 0x340++0x03
line.long 0x00 "PDAF_PATTERN_16,PDAF Pattern 16"
group.long 0x344++0x03
line.long 0x00 "PDAF_PATTERN_17,PDAF Pattern 17"
group.long 0x348++0x03
line.long 0x00 "PDAF_PATTERN_18,PDAF Pattern 18"
group.long 0x34C++0x03
line.long 0x00 "PDAF_PATTERN_19,PDAF Pattern 19"
group.long 0x350++0x03
line.long 0x00 "PDAF_PATTERN_20,PDAF Pattern 20"
group.long 0x354++0x03
line.long 0x00 "PDAF_PATTERN_21,PDAF Pattern 21"
group.long 0x358++0x03
line.long 0x00 "PDAF_PATTERN_22,PDAF Pattern 22"
group.long 0x35C++0x03
line.long 0x00 "PDAF_PATTERN_23,PDAF Pattern 23"
group.long 0x360++0x03
line.long 0x00 "PDAF_PATTERN_24,PDAF Pattern 24"
group.long 0x364++0x03
line.long 0x00 "PDAF_PATTERN_25,PDAF Pattern 25"
group.long 0x368++0x03
line.long 0x00 "PDAF_PATTERN_26,PDAF Pattern 26"
group.long 0x36C++0x03
line.long 0x00 "PDAF_PATTERN_27,PDAF Pattern 27"
group.long 0x370++0x03
line.long 0x00 "PDAF_PATTERN_28,PDAF Pattern 28"
group.long 0x374++0x03
line.long 0x00 "PDAF_PATTERN_29,PDAF Pattern 29"
group.long 0x378++0x03
line.long 0x00 "PDAF_PATTERN_30,PDAF Pattern 30"
group.long 0x37C++0x03
line.long 0x00 "PDAF_PATTERN_31,PDAF Pattern 31"
group.long 0x380++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_0,PDAF Pattern Replace 0"
group.long 0x384++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_1,PDAF Pattern Replace 1"
group.long 0x388++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_2,PDAF Pattern Replace 2"
group.long 0x38C++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_3,PDAF Pattern Replace 3"
group.long 0x390++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_4,PDAF Pattern Replace 4"
group.long 0x394++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_5,PDAF Pattern Replace 5"
group.long 0x398++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_6,PDAF Pattern Replace 6"
group.long 0x39C++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_7,PDAF Pattern Replace 7"
group.long 0x3A0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_8,PDAF Pattern Replace 8"
group.long 0x3A4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_9,PDAF Pattern Replace 9"
group.long 0x3A8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_10,PDAF Pattern Replace 10"
group.long 0x3AC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_11,PDAF Pattern Replace 11"
group.long 0x3B0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_12,PDAF Pattern Replace 12"
group.long 0x3B4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_13,PDAF Pattern Replace 13"
group.long 0x3B8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_14,PDAF Pattern Replace 14"
group.long 0x3BC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_15,PDAF Pattern Replace 15"
group.long 0x3C0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_16,PDAF Pattern Replace 16"
group.long 0x3C4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_17,PDAF Pattern Replace 17"
group.long 0x3C8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_18,PDAF Pattern Replace 18"
group.long 0x3CC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_19,PDAF Pattern Replace 19"
group.long 0x3D0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_20,PDAF Pattern Replace 20"
group.long 0x3D4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_21,PDAF Pattern Replace 21"
group.long 0x3D8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_22,PDAF Pattern Replace 22"
group.long 0x3DC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_23,PDAF Pattern Replace 23"
group.long 0x3E0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_24,PDAF Pattern Replace 24"
group.long 0x3E4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_25,PDAF Pattern Replace 25"
group.long 0x3E8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_26,PDAF Pattern Replace 26"
group.long 0x3EC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_27,PDAF Pattern Replace 27"
group.long 0x3F0++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_28,PDAF Pattern Replace 28"
group.long 0x3F4++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_29,PDAF Pattern Replace 29"
group.long 0x3F8++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_30,PDAF Pattern Replace 30"
group.long 0x3FC++0x03
line.long 0x00 "PDAF_PATTERN_REPLACE_31,PDAF Pattern Replace 31"
tree.end
width 10.
tree "CSIMUX Registers"
group.long 0x400++0x03
line.long 0x00 "DEINT_0,CSI MUX DEINT"
group.long 0x404++0x03
line.long 0x00 "STREAM_0,CSI MUX Stream 0"
group.long 0x408++0x03
line.long 0x00 "STREAM_1,CSI MUX Stream 1"
group.long 0x40C++0x03
line.long 0x00 "STREAM_2,CSI MUX Stream 2"
group.long 0x410++0x03
line.long 0x00 "STREAM_3,CSI MUX Stream 3"
group.long 0x414++0x03
line.long 0x00 "STREAM_4,CSI MUX Stream 4"
group.long 0x418++0x03
line.long 0x00 "STREAM_5,CSI MUX Stream 5"
width 32.
textline "                                         "
group.long 0x41C++0x0B
line.long 0x00 "EIGHT_LANE_DEINT_CONFIG_0,Eight-Lane De-Interleaving Configuration Register"
bitfld.long 0x00 30.--31. " MUXSEL               ,Which CSI BRICKS master slave configuration is in use when 8 lane in use" "PAIR_MS_02,PAIR_MS_24,?..."
bitfld.long 0x00 28.--29. "    MODE                 ,Whether de-interleaving mode is in use Mode3_x6 - x6 mode3 all in VI IAS as far as de-interleave pattern" "Disable,MODE2,MODE3,MODE3_X6"
bitfld.long 0x00 26. "      FRAMEIDGEN          ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 25. " STICKYFAULT          ,Some form of fault on the line has occurred if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                  ,VPR mode for DEINTERLAVED stream there is at most one virtual channel" "0,1"
bitfld.long 0x00 23. "             SRESET              ,Reset some state associated with EIGHT_LANE de-interleave" "No effect,Reset"
textline "                                         "
bitfld.long 0x00 22. " QBLOCK               ,Block traffic and reset both FIFO queues associated with EIGHT_LANE de-interleaving" "Disabled,Enabled"
bitfld.long 0x00 21. "      FEINJECT             ,Manually force a frame end on stream is in a frame (always issue during a Q_RESET)" "Not forced,Forced"
bitfld.long 0x00 20. "    FESHORTTIMER        ,FESHORTTIMER" "0,1"
textline "                                         "
hexmask.long.word 0x00 4.--19. 1. " FEMAXTIME            ,Force a frame end after a frame start when FE_MAX_TIME*2^20 clock cycles have elapsed"
bitfld.long 0x00 0.--3. "          WT                   ,The weight of deint stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "EIGHT_LANE_DEINT_NOTIFY_MASK_0,Eight Lane DEINT Notify Mask"
bitfld.long 0x04 20.--23. " STREAM_EVENT_HI_MASK ,Stream event high mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "            STREAM_EVENT_LO_MASK ,Steam event low mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 2.--15. 1. "            FRAME_FAULT_MASK    ,Frame fault mask"
textline "                                         "
bitfld.long 0x04 0.--1. " FRAME_STATUS_MASK    ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x424++0x03
line.long 0x00 "CONFIG_STREAM_0,Configuration Stream 0"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x428++0x03
line.long 0x00 "CONFIG_STREAM_1,Configuration Stream 1"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x42C++0x03
line.long 0x00 "CONFIG_STREAM_2,Configuration Stream 2"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x430++0x03
line.long 0x00 "CONFIG_STREAM_3,Configuration Stream 3"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x434++0x03
line.long 0x00 "CONFIG_STREAM_4,Configuration Stream 4"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x438++0x03
line.long 0x00 "CONFIG_STREAM_5,Configuration Stream 5"
bitfld.long 0x00 26.--29. " FRAMEIDGEN           ,Insert a sequential frame ID on each incoming frame discard CSI frame ID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 25. "            STICKYFAULT          ,Some form of fault on the stream if bit reads high" "Not occurred,Occurred"
rbitfld.long 0x00 24. "  VPR                 ,PMC VPR mode for associated CSI brick" "0,1"
textline "                                         "
bitfld.long 0x00 23. " SRESET               ,Reset some state associated with STREAM" "No reset,Reset"
bitfld.long 0x00 22. "      QBLOCK               ,Block traffic and reset both FIFO queue associated with stream" "No reset,Reset"
bitfld.long 0x00 21. "      FEINJECT            ,Manually Force a Frame End on VC associated with stream" "Not forced,Forced"
textline "                                         "
bitfld.long 0x00 20. " FESHORTTIMER         ,FE short timmer" "0,1"
hexmask.long.word 0x00 4.--19. 1. "             FEMAXTIME            ,FE max time"
bitfld.long 0x00 0.--3. "          WT                  ,The weight of stream into arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x43C++0x03
line.long 0x00 "CONFIG_FEINJECT_VC_0,Configuration FE Inject VC"
bitfld.long 0x00 20.--23. " STREAM5_FEINJECT_VC  ,Stream 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "            STREAM4_FEINJECT_VC  ,Stream 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "            STREAM3_FEINJECT_VC ,Stream 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 8.--11. " STREAM2_FEINJECT_VC  ,Stream 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "            STREAM1_FEINJECT_VC  ,Stream 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "            STREAM0_FEINJECT_VC ,Stream 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x440++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_0,Notify Mask Stream 0"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x444++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_1,Notify Mask Stream 1"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x448++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_2,Notify Mask Stream 2"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x44C++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_3,Notify Mask Stream 3"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x450++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_4,Notify Mask Stream 4"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x454++0x03
line.long 0x00 "NOTIFY_MASK_STREAM_5,Notify Mask Stream 5"
bitfld.long 0x00 16.--19. " STREAM_EVENT_MASK    ,Stream event mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 2.--15. 1. "            FRAME_FAULT_MASK     ,Frame fault mask"
bitfld.long 0x00 0.--1. "          FRAME_STATUS_MASK   ,Mask particular status events from being notified" "0,1,2,3"
group.long 0x458++0x03
line.long 0x00 "CSI_STREAM_0,CSI Stream 0"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x45C++0x03
line.long 0x00 "CSI_STREAM_1,CSI Stream 1"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x460++0x03
line.long 0x00 "CSI_STREAM_2,CSI Stream 2"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x464++0x03
line.long 0x00 "CSI_STREAM_3,CSI Stream 3"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x468++0x03
line.long 0x00 "CSI_STREAM_4,CSI Stream 4"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x46C++0x03
line.long 0x00 "CSI_STREAM_5,CSI Stream 5"
bitfld.long 0x00 3. " FAULT_MASK[3]        ,Line short error mask" "Not masked,Masked"
bitfld.long 0x00 2. "    FAULT_MASK[2]        ,CRC error on payload mask" "Not masked,Masked"
bitfld.long 0x00 1. "    FAULT_MASK[1]       ,PH Single bit error repaired mask" "Not masked,Masked"
bitfld.long 0x00 0. "    FAULT_MASK[0] ,PP FSM timeout mask" "Not masked,Masked"
group.long 0x470++0x03
line.long 0x00 "STAT_CFG_0,Statistics Configuration"
bitfld.long 0x00 0. " ENABLE_FSTAT         ,Enable FIFO statistics computation" "Disabled,Enabled"
group.long 0x474++0x03
line.long 0x00 "STAT_STREAM_0,Statistics Stream 0"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x478++0x03
line.long 0x00 "STAT_STREAM_1,Statistics Stream 1"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x47C++0x03
line.long 0x00 "STAT_STREAM_2,Statistics Stream 2"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x480++0x03
line.long 0x00 "STAT_STREAM_3,Statistics Stream 3"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x484++0x03
line.long 0x00 "STAT_STREAM_4,Statistics Stream 4"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x488++0x03
line.long 0x00 "STAT_STREAM_5,Statistics Stream 5"
rbitfld.long 0x00 24.--29. " FIFO_MAX_WR_COUNT    ,FIFO max write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 18.--23. "            FIFO_WR_COUNT        ,FIFO write count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 12.--17. "            FIFO_MAX_RD_COUNT   ,FIFO max read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x00 6.--11. " FIFO_RD_COUNT        ,FIFO read count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "            FIFO_DEPTH           ,FIFO depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rgroup.long 0x48C++0x03
line.long 0x00 "STAT_FRAME_0,Statistics Frame 0"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x490++0x03
line.long 0x00 "STAT_FRAME_1,Statistics Frame 1"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x494++0x03
line.long 0x00 "STAT_FRAME_2,Statistics Frame 2"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x498++0x03
line.long 0x00 "STAT_FRAME_3,Statistics Frame 3"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x49C++0x03
line.long 0x00 "STAT_FRAME_4,Statistics Frame 4"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4A0++0x03
line.long 0x00 "STAT_FRAME_5,Statistics Frame 5"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4A4++0x03
line.long 0x00 "STAT_FRAME_6,Statistics Frame 6"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4A8++0x03
line.long 0x00 "STAT_FRAME_7,Statistics Frame 7"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4AC++0x03
line.long 0x00 "STAT_FRAME_8,Statistics Frame 8"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4B0++0x03
line.long 0x00 "STAT_FRAME_9,Statistics Frame 9"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4B4++0x03
line.long 0x00 "STAT_FRAME_10,Statistics Frame 10"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4B8++0x03
line.long 0x00 "STAT_FRAME_11,Statistics Frame 11"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4BC++0x03
line.long 0x00 "STAT_FRAME_12,Statistics Frame 12"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4C0++0x03
line.long 0x00 "STAT_FRAME_13,Statistics Frame 13"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4C4++0x03
line.long 0x00 "STAT_FRAME_14,Statistics Frame 14"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4C8++0x03
line.long 0x00 "STAT_FRAME_15,Statistics Frame 15"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4CC++0x03
line.long 0x00 "STAT_FRAME_16,Statistics Frame 16"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4D0++0x03
line.long 0x00 "STAT_FRAME_17,Statistics Frame 17"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4D4++0x03
line.long 0x00 "STAT_FRAME_18,Statistics Frame 18"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4D8++0x03
line.long 0x00 "STAT_FRAME_19,Statistics Frame 19"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4DC++0x03
line.long 0x00 "STAT_FRAME_20,Statistics Frame 20"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4E0++0x03
line.long 0x00 "STAT_FRAME_21,Statistics Frame 21"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4E4++0x03
line.long 0x00 "STAT_FRAME_22,Statistics Frame 22"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4E8++0x03
line.long 0x00 "STAT_FRAME_23,Statistics Frame 23"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
rgroup.long 0x4EC++0x07
line.long 0x00 "STAT_FRAME_DEINT_0,Statistics Frame DEINT"
bitfld.long 0x00 16. " INFRAME              ,INFRAME" "0,1"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID              ,Frame ID"
line.long 0x04 "FRAME_STATUS_0,Frame Status"
bitfld.long 0x04 24. " DEINT_INFRAME        ,De-interleave is in frame" "No,Yes"
bitfld.long 0x04 23. "           S5V3_INFRAME         ,Stream 5 VC 3 in frame status" "No,Yes"
bitfld.long 0x04 22. "           S5V2_INFRAME        ,Stream 5 VC 2 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 21. " S5V1_INFRAME         ,Stream 5 VC 1 in frame status" "No,Yes"
bitfld.long 0x04 20. "           S5V0_INFRAME         ,Stream 5 VC 0 in frame status" "No,Yes"
bitfld.long 0x04 19. "           S4V3_INFRAME        ,Stream 4 VC 3 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 18. " S4V2_INFRAME         ,Stream 4 VC 2 in frame status" "No,Yes"
bitfld.long 0x04 17. "           S4V1_INFRAME         ,Stream 4 VC 1 in frame status" "No,Yes"
bitfld.long 0x04 16. "           S4V0_INFRAME        ,Stream 4 VC 0 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 15. " S3V3_INFRAME         ,Stream 3 VC 3 in frame status" "No,Yes"
bitfld.long 0x04 14. "           S3V2_INFRAME         ,Stream 3 VC 2 in frame status" "No,Yes"
bitfld.long 0x04 13. "           S3V1_INFRAME        ,Stream 3 VC 1 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 12. " S3V0_INFRAME         ,Stream 3 VC 0 in frame status" "No,Yes"
bitfld.long 0x04 11. "           S2V3_INFRAME         ,Stream 2 VC 3 in frame status" "No,Yes"
bitfld.long 0x04 10. "           S2V2_INFRAME        ,Stream 2 VC 2 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 9. " S2V1_INFRAME         ,Stream 2 VC 1 in frame status" "No,Yes"
bitfld.long 0x04 8. "           S2V0_INFRAME         ,Stream 2 VC 0 in frame status" "No,Yes"
bitfld.long 0x04 7. "           S1V3_INFRAME        ,Stream 1 VC 3 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 6. " S1V2_INFRAME         ,Stream 1 VC 2 in frame status" "No,Yes"
bitfld.long 0x04 5. "           S1V1_INFRAME         ,Stream 1 VC 1 in frame status" "No,Yes"
bitfld.long 0x04 4. "           S1V0_INFRAME        ,Stream 1 VC 0 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 3. " S0V3_INFRAME         ,Stream 0 VC 3 in frame status" "No,Yes"
bitfld.long 0x04 2. "           S0V2_INFRAME         ,Stream 0 VC 2 in frame status" "No,Yes"
bitfld.long 0x04 1. "           S0V1_INFRAME        ,Stream 0 VC 1 in frame status" "No,Yes"
textline "                                         "
bitfld.long 0x04 0. " S0V0_INFRAME         ,Stream 0 VC 0 in frame status" "No,Yes"
group.long 0x4F4++0x03
line.long 0x00 "INJECT_DATA_0_0,PPC4 PXL0"
group.long 0x4F8++0x03
line.long 0x00 "INJECT_DATA_1_0,PPC4 PXL1"
group.long 0x4FC++0x03
line.long 0x00 "INJECT_DATA_2_0,PPC4 PXL2"
group.long 0x500++0x03
line.long 0x00 "INJECT_DATA_3_0,PPC4 PXL3"
group.long 0x504++0x0F
line.long 0x00 "INJECT_HEADER_0,Inject Header"
bitfld.long 0x00 16.--19. " CTYPE                ,CTYPE" ",SP_FE,LP_LE,,LP_LS,,LP_LS_LE,,SP_FS,LP_DATA,?..."
bitfld.long 0x00 14.--15. "      VC                   ,VC" "0,1,2,3"
bitfld.long 0x00 8.--13. "             DTYPE               ,DTYPE or FE_ERROR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
hexmask.long.byte 0x00 0.--7. 1. " PXL_ENABLE           ,PXL enable"
line.long 0x04 "INJECT_CFG_0,Inject Configuration"
rbitfld.long 0x04 26.--31. " FIFO_DEPTH           ,Number of programmable packets that can be stored before release into CSIMUX (32)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 20.--25. "            FIFO_WR_COUNT        ,Number programmed packet entries waiting to be released as seen from WRITE side of FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x04 14.--19. "            FIFO_RD_COUNT       ,Number programmed packet entries waiting to be released as seen from READ side of FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x04 13. " PIPE_STALL           ,Stall the CSIMUX pipeline while high" "Low,High"
bitfld.long 0x04 12. "          ACCUMULATE           ,Accumulate packets written by HOST or releases them" "Release,Accumulate"
bitfld.long 0x04 5. "    STREAM_SWITCH[5]    ,Hot encoded packet source stream 5" "CSI,HOST"
textline "                                         "
bitfld.long 0x04 4. " STREAM_SWITCH[4]     ,Hot encoded packet source stream 4" "CSI,HOST"
bitfld.long 0x04 3. "          STREAM_SWITCH[3]     ,Hot encoded packet source stream 3" "CSI,HOST"
bitfld.long 0x04 2. "          STREAM_SWITCH[2]    ,Hot encoded packet source stream 2" "CSI,HOST"
textline "                                         "
bitfld.long 0x04 1. " STREAM_SWITCH[1]     ,Hot encoded packet source stream 1" "CSI,HOST"
bitfld.long 0x04 0. "          STREAM_SWITCH[0]     ,Hot encoded packet source stream 0" "CSI,HOST"
line.long 0x08 "INJECT_0,Inject"
bitfld.long 0x08 5. " STREAM[5]            ,Stream 5" "Not injected,Injected"
bitfld.long 0x08 4. "  STREAM[4]            ,Stream 4" "Not injected,Injected"
bitfld.long 0x08 3. "  STREAM[3]           ,Stream 3" "Not injected,Injected"
textline "                                         "
bitfld.long 0x08 2. " STREAM[2]            ,Stream 2" "Not injected,Injected"
bitfld.long 0x08 1. "  STREAM[1]            ,Stream 1" "Not injected,Injected"
bitfld.long 0x08 0. "  STREAM[0]           ,Stream 0" "Not injected,Injected"
line.long 0x0C "STREAM_SWIZZLER_0,Stream Swizzle"
bitfld.long 0x0C 20.--22. " STREAM5_SWIZZLE_SRC  ,Source CSI stream for VI stream 5" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 16.--18. "             STREAM4_SWIZZLE_SRC  ,Source CSI stream for VI stream 4" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 12.--14. "             STREAM3_SWIZZLE_SRC ,Source CSI stream for VI stream 3" "0,1,2,3,4,5,6,7"
textline "                                         "
bitfld.long 0x0C 8.--10. " STREAM2_SWIZZLE_SRC  ,Source CSI stream for VI stream 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 4.--6. "             STREAM1_SWIZZLE_SRC  ,Source CSI stream for VI stream 1" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 0.--2. "             STREAM0_SWIZZLE_SRC ,Source CSI stream for VI stream 0" "0,1,2,3,4,5,6,7"
tree.end
width 23.
tree "ISPBUF Registers"
group.long 0x1000++0x07
line.long 0x00 "ERROR_0,Error"
eventfld.long 0x00 0. " FIFO_OVERFLOW ,FIFO overflow" "No overflow,Overflow"
line.long 0x04 "SW_RESET_0,Software Reset"
bitfld.long 0x04 0. " ISPINTF_RESET ,Reset ISP interface" "No effect,Reset"
tree.end
tree "ATOMP Register"
group.long 0x3400++0x03
line.long 0x00 "DVFS_LIMIT_WR_LIMIT_0,DVFS Limit Write Limit"
hexmask.long.word 0x00 0.--8. 1. " LIMIT         ,Limit"
tree.end
width 22.
tree "NOTIFY Registers"
rgroup.long 0x4000++0x0F
line.long 0x00 "FIFO_TAG_0_0,FIFO TAG 0"
hexmask.long.word 0x00 16.--31. 1. " FRAME_ID             ,Frame ID from the popped event"
hexmask.long.byte 0x00 8.--15. 1. "         CHANNEL          ,Channel from the popped event"
bitfld.long 0x00 1.--5. "    TAG              ,Tag from the popped event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
bitfld.long 0x00 0. " VALID                ,Whether the popped event was valid" "Invalid,Valid"
line.long 0x04 "FIFO_TIMESTAMP_0_0,FIFO Timestamp 0"
line.long 0x08 "FIFO_DATA_0_0,FIFO Data 0"
rgroup.long 0x5FF0++0x0F
line.long 0x00 "FIFO_TAG_511_0,FIFO TAG 511"
hexmask.long.word 0x00 16.--31. 1. " FRAME_ID             ,Frame ID from the popped event"
hexmask.long.byte 0x00 8.--15. 1. "         CHANNEL          ,Frame ID from the popped event"
bitfld.long 0x00 1.--5. "    TAG              ,Tag from the popped event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
bitfld.long 0x00 0. " VALID                ,Whether the popped event was valid" "Invalid,Valid"
line.long 0x04 "FIFO_TIMESTAMP_511_0,FIFO Timestamp 511"
line.long 0x08 "FIFO_DATA_511_0,FIFO Data 511"
group.long 0x6000++0x23
line.long 0x00 "TAG_CLASSIFY_0_0,TAG Classify 0"
bitfld.long 0x00 31. " NO_OUTPUT[31]        ,NO_OUTPUT[31] corresponds to tag 31" "0,1"
bitfld.long 0x00 30. "            NO_OUTPUT[30]    ,NO_OUTPUT[30] corresponds to tag 30" "0,1"
bitfld.long 0x00 29. "     NO_OUTPUT[29]    ,NO_OUTPUT[29] corresponds to tag 29" "0,1"
bitfld.long 0x00 28. "     NO_OUTPUT[28]    ,NO_OUTPUT[28] corresponds to tag 28" "0,1"
textline "                               "
bitfld.long 0x00 27. " NO_OUTPUT[27]        ,NO_OUTPUT[27] corresponds to tag 27" "0,1"
bitfld.long 0x00 26. "            NO_OUTPUT[26]    ,NO_OUTPUT[26] corresponds to tag 26" "0,1"
bitfld.long 0x00 25. "     NO_OUTPUT[25]    ,NO_OUTPUT[25] corresponds to tag 25" "0,1"
bitfld.long 0x00 24. "     NO_OUTPUT[24]    ,NO_OUTPUT[24] corresponds to tag 24" "0,1"
textline "                               "
bitfld.long 0x00 23. " NO_OUTPUT[23]        ,NO_OUTPUT[23] corresponds to tag 23" "0,1"
bitfld.long 0x00 22. "            NO_OUTPUT[22]    ,NO_OUTPUT[22] corresponds to tag 22" "0,1"
bitfld.long 0x00 21. "     NO_OUTPUT[21]    ,NO_OUTPUT[21] corresponds to tag 21" "0,1"
bitfld.long 0x00 20. "     NO_OUTPUT[20]    ,NO_OUTPUT[20] corresponds to tag 20" "0,1"
textline "                               "
bitfld.long 0x00 19. " NO_OUTPUT[19]        ,NO_OUTPUT[19] corresponds to tag 19" "0,1"
bitfld.long 0x00 18. "            NO_OUTPUT[18]    ,NO_OUTPUT[18] corresponds to tag 18" "0,1"
bitfld.long 0x00 17. "     NO_OUTPUT[17]    ,NO_OUTPUT[17] corresponds to tag 17" "0,1"
bitfld.long 0x00 16. "     NO_OUTPUT[16]    ,NO_OUTPUT[16] corresponds to tag 16" "0,1"
textline "                               "
bitfld.long 0x00 15. " NO_OUTPUT[15]        ,NO_OUTPUT[15] corresponds to tag 15" "0,1"
bitfld.long 0x00 14. "            NO_OUTPUT[14]    ,NO_OUTPUT[14] corresponds to tag 14" "0,1"
bitfld.long 0x00 13. "     NO_OUTPUT[13]    ,NO_OUTPUT[13] corresponds to tag 13" "0,1"
bitfld.long 0x00 12. "     NO_OUTPUT[12]    ,NO_OUTPUT[12] corresponds to tag 12" "0,1"
textline "                               "
bitfld.long 0x00 11. " NO_OUTPUT[11]        ,NO_OUTPUT[11] corresponds to tag 11" "0,1"
bitfld.long 0x00 10. "            NO_OUTPUT[10]    ,NO_OUTPUT[10] corresponds to tag 10" "0,1"
bitfld.long 0x00 9. "     NO_OUTPUT[9]     ,NO_OUTPUT[9] corresponds to tag 9" "0,1"
bitfld.long 0x00 8. "     NO_OUTPUT[8]     ,NO_OUTPUT[8] corresponds to tag 8" "0,1"
textline "                               "
bitfld.long 0x00 7. " NO_OUTPUT[7]         ,NO_OUTPUT[7] corresponds to tag 7" "0,1"
bitfld.long 0x00 6. "            NO_OUTPUT[6]     ,NO_OUTPUT[6] corresponds to tag 6" "0,1"
bitfld.long 0x00 5. "     NO_OUTPUT[5]     ,NO_OUTPUT[5] corresponds to tag 5" "0,1"
bitfld.long 0x00 4. "     NO_OUTPUT[4]     ,NO_OUTPUT[4] corresponds to tag 4" "0,1"
textline "                               "
bitfld.long 0x00 3. " NO_OUTPUT[3]         ,NO_OUTPUT[3] corresponds to tag 3" "0,1"
bitfld.long 0x00 2. "            NO_OUTPUT[2]     ,NO_OUTPUT[2] corresponds to tag 2" "0,1"
bitfld.long 0x00 1. "     NO_OUTPUT[1]     ,NO_OUTPUT[1] corresponds to tag 1" "0,1"
bitfld.long 0x00 0. "     NO_OUTPUT[0]     ,NO_OUTPUT[0] corresponds to tag 0" "0,1"
line.long 0x04 "TAG_CLASSIFY_1_0,TAG Classify 1"
bitfld.long 0x04 31. " HIGH_PRI[31]         ,HIGH_PRI[31] corresponds to tag 31" "0,1"
bitfld.long 0x04 30. "            HIGH_PRI[30]     ,HIGH_PRI[30] corresponds to tag 30" "0,1"
bitfld.long 0x04 29. "     HIGH_PRI[29]     ,HIGH_PRI[29] corresponds to tag 29" "0,1"
bitfld.long 0x04 28. "     HIGH_PRI[28]     ,HIGH_PRI[28] corresponds to tag 28" "0,1"
textline "                               "
bitfld.long 0x04 27. " HIGH_PRI[27]         ,HIGH_PRI[27] corresponds to tag 27" "0,1"
bitfld.long 0x04 26. "            HIGH_PRI[26]     ,HIGH_PRI[26] corresponds to tag 26" "0,1"
bitfld.long 0x04 25. "     HIGH_PRI[25]     ,HIGH_PRI[25] corresponds to tag 25" "0,1"
bitfld.long 0x04 24. "     HIGH_PRI[24]     ,HIGH_PRI[24] corresponds to tag 24" "0,1"
textline "                               "
bitfld.long 0x04 23. " HIGH_PRI[23]         ,HIGH_PRI[23] corresponds to tag 23" "0,1"
bitfld.long 0x04 22. "            HIGH_PRI[22]     ,HIGH_PRI[22] corresponds to tag 22" "0,1"
bitfld.long 0x04 21. "     HIGH_PRI[21]     ,HIGH_PRI[21] corresponds to tag 21" "0,1"
bitfld.long 0x04 20. "     HIGH_PRI[20]     ,HIGH_PRI[20] corresponds to tag 20" "0,1"
textline "                               "
bitfld.long 0x04 19. " HIGH_PRI[19]         ,HIGH_PRI[19] corresponds to tag 19" "0,1"
bitfld.long 0x04 18. "            HIGH_PRI[18]     ,HIGH_PRI[18] corresponds to tag 18" "0,1"
bitfld.long 0x04 17. "     HIGH_PRI[17]     ,HIGH_PRI[17] corresponds to tag 17" "0,1"
bitfld.long 0x04 16. "     HIGH_PRI[16]     ,HIGH_PRI[16] corresponds to tag 16" "0,1"
textline "                               "
bitfld.long 0x04 15. " HIGH_PRI[15]         ,HIGH_PRI[15] corresponds to tag 15" "0,1"
bitfld.long 0x04 14. "            HIGH_PRI[14]     ,HIGH_PRI[14] corresponds to tag 14" "0,1"
bitfld.long 0x04 13. "     HIGH_PRI[13]     ,HIGH_PRI[13] corresponds to tag 13" "0,1"
bitfld.long 0x04 12. "     HIGH_PRI[12]     ,HIGH_PRI[12] corresponds to tag 12" "0,1"
textline "                               "
bitfld.long 0x04 11. " HIGH_PRI[11]         ,HIGH_PRI[11] corresponds to tag 11" "0,1"
bitfld.long 0x04 10. "            HIGH_PRI[10]     ,HIGH_PRI[10] corresponds to tag 10" "0,1"
bitfld.long 0x04 9. "     HIGH_PRI[9]      ,HIGH_PRI[9] corresponds to tag 9" "0,1"
bitfld.long 0x04 8. "     HIGH_PRI[8]      ,HIGH_PRI[8] corresponds to tag 8" "0,1"
textline "                               "
bitfld.long 0x04 7. " HIGH_PRI[7]          ,HIGH_PRI[7] corresponds to tag 7" "0,1"
bitfld.long 0x04 6. "            HIGH_PRI[6]      ,HIGH_PRI[6] corresponds to tag 6" "0,1"
bitfld.long 0x04 5. "     HIGH_PRI[5]      ,HIGH_PRI[5] corresponds to tag 5" "0,1"
bitfld.long 0x04 4. "     HIGH_PRI[4]      ,HIGH_PRI[4] corresponds to tag 4" "0,1"
textline "                               "
bitfld.long 0x04 3. " HIGH_PRI[3]          ,HIGH_PRI[3] corresponds to tag 3" "0,1"
bitfld.long 0x04 2. "            HIGH_PRI[2]      ,HIGH_PRI[2] corresponds to tag 2" "0,1"
bitfld.long 0x04 1. "     HIGH_PRI[1]      ,HIGH_PRI[1] corresponds to tag 1" "0,1"
bitfld.long 0x04 0. "     HIGH_PRI[0]      ,HIGH_PRI[0] corresponds to tag 0" "0,1"
line.long 0x08 "TAG_CLASSIFY_2_0,TAG Classify 2"
bitfld.long 0x08 31. " SAFETY[31]           ,SAFETY[31] corresponds to tag 31" "0,1"
bitfld.long 0x08 30. "            SAFETY[30]       ,SAFETY[30] corresponds to tag 30" "0,1"
bitfld.long 0x08 29. "     SAFETY[29]       ,SAFETY[29] corresponds to tag 29" "0,1"
bitfld.long 0x08 28. "     SAFETY[28]       ,SAFETY[28] corresponds to tag 28" "0,1"
textline "                               "
bitfld.long 0x08 27. " SAFETY[27]           ,SAFETY[27] corresponds to tag 27" "0,1"
bitfld.long 0x08 26. "            SAFETY[26]       ,SAFETY[26] corresponds to tag 26" "0,1"
bitfld.long 0x08 25. "     SAFETY[25]       ,SAFETY[25] corresponds to tag 25" "0,1"
bitfld.long 0x08 24. "     SAFETY[24]       ,SAFETY[24] corresponds to tag 24" "0,1"
textline "                               "
bitfld.long 0x08 23. " SAFETY[23]           ,SAFETY[23] corresponds to tag 23" "0,1"
bitfld.long 0x08 22. "            SAFETY[22]       ,SAFETY[22] corresponds to tag 22" "0,1"
bitfld.long 0x08 21. "     SAFETY[21]       ,SAFETY[21] corresponds to tag 21" "0,1"
bitfld.long 0x08 20. "     SAFETY[20]       ,SAFETY[20] corresponds to tag 20" "0,1"
textline "                               "
bitfld.long 0x08 19. " SAFETY[19]           ,SAFETY[19] corresponds to tag 19" "0,1"
bitfld.long 0x08 18. "            SAFETY[18]       ,SAFETY[18] corresponds to tag 18" "0,1"
bitfld.long 0x08 17. "     SAFETY[17]       ,SAFETY[17] corresponds to tag 17" "0,1"
bitfld.long 0x08 16. "     SAFETY[16]       ,SAFETY[16] corresponds to tag 16" "0,1"
textline "                               "
bitfld.long 0x08 15. " SAFETY[15]           ,SAFETY[15] corresponds to tag 15" "0,1"
bitfld.long 0x08 14. "            SAFETY[14]       ,SAFETY[14] corresponds to tag 14" "0,1"
bitfld.long 0x08 13. "     SAFETY[13]       ,SAFETY[13] corresponds to tag 13" "0,1"
bitfld.long 0x08 12. "     SAFETY[12]       ,SAFETY[12] corresponds to tag 12" "0,1"
textline "                               "
bitfld.long 0x08 11. " SAFETY[11]           ,SAFETY[11] corresponds to tag 11" "0,1"
bitfld.long 0x08 10. "            SAFETY[10]       ,SAFETY[10] corresponds to tag 10" "0,1"
bitfld.long 0x08 9. "     SAFETY[9]        ,SAFETY[9] corresponds to tag 9" "0,1"
bitfld.long 0x08 8. "     SAFETY[8]        ,SAFETY[8] corresponds to tag 8" "0,1"
textline "                               "
bitfld.long 0x08 7. " SAFETY[7]            ,SAFETY[7] corresponds to tag 7" "0,1"
bitfld.long 0x08 6. "            SAFETY[6]        ,SAFETY[6] corresponds to tag 6" "0,1"
bitfld.long 0x08 5. "     SAFETY[5]        ,SAFETY[5] corresponds to tag 5" "0,1"
bitfld.long 0x08 4. "     SAFETY[4]        ,SAFETY[4] corresponds to tag 4" "0,1"
textline "                               "
bitfld.long 0x08 3. " SAFETY[3]            ,SAFETY[3] corresponds to tag 3" "0,1"
bitfld.long 0x08 2. "            SAFETY[2]        ,SAFETY[2] corresponds to tag 2" "0,1"
bitfld.long 0x08 1. "     SAFETY[1]        ,SAFETY[1] corresponds to tag 1" "0,1"
bitfld.long 0x08 0. "     SAFETY[0]        ,SAFETY[0] corresponds to tag 0" "0,1"
line.long 0x0C "TAG_CLASSIFY_3_0,TAG Classify 3"
eventfld.long 0x0C 31. " SAFETY_ERROR[31]     ,SAFETY_ERROR[31] corresponds to tag 31" "0,1"
eventfld.long 0x0C 30. "            SAFETY_ERROR[30] ,SAFETY_ERROR[30] corresponds to tag 30" "0,1"
eventfld.long 0x0C 29. "     SAFETY_ERROR[29] ,SAFETY_ERROR[29] corresponds to tag 29" "0,1"
eventfld.long 0x0C 28. "     SAFETY_ERROR[28] ,SAFETY_ERROR[28] corresponds to tag 28" "0,1"
textline "                               "
eventfld.long 0x0C 27. " SAFETY_ERROR[27]     ,SAFETY_ERROR[27] corresponds to tag 27" "0,1"
eventfld.long 0x0C 26. "            SAFETY_ERROR[26] ,SAFETY_ERROR[26] corresponds to tag 26" "0,1"
eventfld.long 0x0C 25. "     SAFETY_ERROR[25] ,SAFETY_ERROR[25] corresponds to tag 25" "0,1"
eventfld.long 0x0C 24. "     SAFETY_ERROR[24] ,SAFETY_ERROR[24] corresponds to tag 24" "0,1"
textline "                               "
eventfld.long 0x0C 23. " SAFETY_ERROR[23]     ,SAFETY_ERROR[23] corresponds to tag 23" "0,1"
eventfld.long 0x0C 22. "            SAFETY_ERROR[22] ,SAFETY_ERROR[22] corresponds to tag 22" "0,1"
eventfld.long 0x0C 21. "     SAFETY_ERROR[21] ,SAFETY_ERROR[21] corresponds to tag 21" "0,1"
eventfld.long 0x0C 20. "     SAFETY_ERROR[20] ,SAFETY_ERROR[20] corresponds to tag 20" "0,1"
textline "                               "
eventfld.long 0x0C 19. " SAFETY_ERROR[19]     ,SAFETY_ERROR[19] corresponds to tag 19" "0,1"
eventfld.long 0x0C 18. "            SAFETY_ERROR[18] ,SAFETY_ERROR[18] corresponds to tag 18" "0,1"
eventfld.long 0x0C 17. "     SAFETY_ERROR[17] ,SAFETY_ERROR[17] corresponds to tag 17" "0,1"
eventfld.long 0x0C 16. "     SAFETY_ERROR[16] ,SAFETY_ERROR[16] corresponds to tag 16" "0,1"
textline "                               "
eventfld.long 0x0C 15. " SAFETY_ERROR[15]     ,SAFETY_ERROR[15] corresponds to tag 15" "0,1"
eventfld.long 0x0C 14. "            SAFETY_ERROR[14] ,SAFETY_ERROR[14] corresponds to tag 14" "0,1"
eventfld.long 0x0C 13. "     SAFETY_ERROR[13] ,SAFETY_ERROR[13] corresponds to tag 13" "0,1"
eventfld.long 0x0C 12. "     SAFETY_ERROR[12] ,SAFETY_ERROR[12] corresponds to tag 12" "0,1"
textline "                               "
eventfld.long 0x0C 11. " SAFETY_ERROR[11]     ,SAFETY_ERROR[11] corresponds to tag 11" "0,1"
eventfld.long 0x0C 10. "            SAFETY_ERROR[10] ,SAFETY_ERROR[10] corresponds to tag 10" "0,1"
eventfld.long 0x0C 9. "     SAFETY_ERROR[9]  ,SAFETY_ERROR[9] corresponds to tag 9" "0,1"
eventfld.long 0x0C 8. "     SAFETY_ERROR[8]  ,SAFETY_ERROR[8] corresponds to tag 8" "0,1"
textline "                               "
eventfld.long 0x0C 7. " SAFETY_ERROR[7]      ,SAFETY_ERROR[7] corresponds to tag 7" "0,1"
eventfld.long 0x0C 6. "            SAFETY_ERROR[6]  ,SAFETY_ERROR[6] corresponds to tag 6" "0,1"
eventfld.long 0x0C 5. "     SAFETY_ERROR[5]  ,SAFETY_ERROR[5] corresponds to tag 5" "0,1"
eventfld.long 0x0C 4. "     SAFETY_ERROR[4]  ,SAFETY_ERROR[4] corresponds to tag 4" "0,1"
textline "                               "
eventfld.long 0x0C 3. " SAFETY_ERROR[3]      ,SAFETY_ERROR[3] corresponds to tag 3" "0,1"
eventfld.long 0x0C 2. "            SAFETY_ERROR[2]  ,SAFETY_ERROR[2] corresponds to tag 2" "0,1"
eventfld.long 0x0C 1. "     SAFETY_ERROR[1]  ,SAFETY_ERROR[1] corresponds to tag 1" "0,1"
eventfld.long 0x0C 0. "     SAFETY_ERROR[0]  ,SAFETY_ERROR[0] corresponds to tag 0" "0,1"
line.long 0x10 "TAG_CLASSIFY_4_0,TAG Classify 4"
bitfld.long 0x10 0. " TEST                 ,Power-on self-test register for VI to hardware safety monitor path" "0,1"
line.long 0x14 "FIFO_OCCUPANCY_0,FIFO Occupancy"
hexmask.long.word 0x14 20.--29. 1. " MAX                  ,Highest watermark reached for CPU buffer FIFO"
hexmask.long.word 0x14 10.--19. 1. "         CURRENT          ,Number of entries currently in CPU buffer FIFO"
hexmask.long.word 0x14 0.--9. 1. "  SIZE             ,Size of CPU buffer FIFO"
line.long 0x18 "OCCUPANCY_URGENT_0,Occupancy Urgent"
hexmask.long.word 0x18 0.--9. 1. " URGENT               ,CPU buffer FIFO high watermark at which to trigger a high-priority interrupt even if no high priority events are present in the FIFO"
line.long 0x1C "HIGHPRIO_0,High Priority"
hexmask.long.word 0x1C 0.--15. 1. " HIGHPRIO             ,Number of high priority events that the CPU has not yet processed"
line.long 0x20 "ERROR_0,Error"
eventfld.long 0x20 0. " NOTIFY_FIFO_OVERFLOW ,Notify FIFO overflow" "No overflow,Overflow"
tree.end
width 31.
tree "Channel 0 Specific Registers"
group.long 0x10000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x10000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x10000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x10000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x10000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x10000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x10000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x10000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 0 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 0 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 0 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x10000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x10000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x10000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x10000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x10000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 1 Specific Registers"
group.long 0x20000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x20000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x20000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x20000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x20000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x20000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x20000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x20000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 1 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 1 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x20000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x20000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x20000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x20000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x20000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 2 Specific Registers"
group.long 0x30000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x30000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x30000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x30000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x30000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x30000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x30000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x30000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 2 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 2 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x30000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x30000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x30000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x30000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x30000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 3 Specific Registers"
group.long 0x40000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x40000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x40000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x40000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x40000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x40000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x40000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x40000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 3 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 3 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 3 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x40000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x40000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x40000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x40000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x40000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 4 Specific Registers"
group.long 0x50000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x50000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x50000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x50000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x50000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x50000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x50000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x50000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 4 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 4 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 4 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x50000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x50000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x50000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x50000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x50000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 5 Specific Registers"
group.long 0x60000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x60000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x60000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x60000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x60000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x60000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x60000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x60000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 5 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 5 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 5 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x60000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x60000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x60000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x60000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x60000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 6 Specific Registers"
group.long 0x70000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x70000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x70000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x70000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x70000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x70000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x70000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x70000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 6 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 6 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 6 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x70000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x70000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x70000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x70000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x70000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 7 Specific Registers"
group.long 0x80000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x80000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x80000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x80000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x80000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x80000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x80000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x80000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 7 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 7 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 7 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x80000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x80000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x80000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x80000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x80000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 8 Specific Registers"
group.long 0x90000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0x90000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0x90000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0x90000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0x90000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0x90000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0x90000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0x90000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 8 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 8 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 8 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0x90000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0x90000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0x90000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0x90000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0x90000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 9 Specific Registers"
group.long 0xA0000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0xA0000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0xA0000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0xA0000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0xA0000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0xA0000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0xA0000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0xA0000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 9 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 9 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 9 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0xA0000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0xA0000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0xA0000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0xA0000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0xA0000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 10 Specific Registers"
group.long 0xB0000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0xB0000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0xB0000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0xB0000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0xB0000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0xB0000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0xB0000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0xB0000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 10 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 10 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 10 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0xB0000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0xB0000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0xB0000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0xB0000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0xB0000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
tree "Channel 11 Specific Registers"
group.long 0xC0000++0x07 "Host Channel Registers (Non-Shadowed)"
line.long 0x00 "AXISTREAMID_CFG_0,AXI Stream ID Register"
hexmask.long.byte 0x00 0.--7. 1. " STREAMID             ,Initial value will correspond to global STREAMID"
line.long 0x04 "CHANNEL_COMMAND_0,Channel Command Register"
bitfld.long 0x04 5. " WR_ACT_SEL           ,Host write operations operate on both shadow and active register (debug)" "Not selected,Selected"
bitfld.long 0x04 4. "              RD_MUX_SEL         ,Host read operations are on non-shadowed register" "Not selected,Selected"
bitfld.long 0x04 1. "            AUTOLOAD           ,AUTOLOAD" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x04 0. " LOAD                 ,Atomically loads all channel state from shadow register to active registers" "Disabled,Enabled"
group.long (0xC0000+0x18)++0x03 "Spare Registers (Shadowed)"
line.long 0x00 "CHANSEL_0,Chansel Register"
group.long (0xC0000+0x1C)++0x03 "Non-Shadowed Chansel Register"
line.long 0x00 "CONTROL_0,Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE                ,Spare control bits that are non-shadowed"
bitfld.long 0x00 4. "           POST_RUNAWAY_EMBED ,Post runway embedded" "0,1"
bitfld.long 0x00 3. "            POST_RUNAWAY_PIXEL ,Post runway pixel" "0,1"
textline "                                        "
bitfld.long 0x00 2. " EARLY_ABORT          ,Early abort" "Disabled,Enabled"
bitfld.long 0x00 1. "       SINGLESHOT         ,SINGLESHOT" "Disabled,Enabled"
bitfld.long 0x00 0. "     ENABLE             ,Enables or disables this channels match state in CHANSEL" "Disabled,Enabled"
group.long (0xC0000+0x20)++0x3F "Shadowed Chansel Registers"
line.long 0x00 "MATCH_0,Match"
bitfld.long 0x00 14.--19. " STREAM               ,Stream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "             STREAM_MASK        ,Stream mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--7. "           VIRTUAL_CHANNEL    ,Virtual channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                        "
bitfld.long 0x00 0.--3. " VIRTUAL_CHANNEL_MASK ,Virtual channel mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "MATCH_DATATYPE_0,Channel Match Data Type Register"
bitfld.long 0x04 6.--11. " DATATYPE             ,Data type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "             DATATYPE_MASK      ,Data type mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "MATCH_FRAMEID_0,Channel Match Frame ID Register"
hexmask.long.word 0x08 16.--31. 1. " FRAMEID              ,Frame ID"
hexmask.long.word 0x08 0.--15. 1. "           FRAMEID_MASK       ,Frame ID mask"
line.long 0x0C "DT_OVERRIDE_0,Datatype Override"
bitfld.long 0x0C 1.--6. " OVRD_DT              ,Datatype to override input format with" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0. "             DT_OVRD_EN         ,Enable input format override" "Disabled,Enabled"
line.long 0x10 "FRAME_X_0,Expected Frame X Dimension"
hexmask.long.word 0x10 0.--15. 1. " WIDTH                ,Pixel Width of frame"
line.long 0x14 "FRAME_Y_0,Expected Frame Y Dimension"
hexmask.long.word 0x14 0.--15. 1. " HEIGHT               ,Line Height of frame"
line.long 0x18 "EMBED_X_0,Upper Bound Of The Number Of Bytes On An Embedded Line"
hexmask.long.tbyte 0x18 0.--17. 1. " MAX_BYTES            ,Maximum number of embedded data bytes on a line"
line.long 0x1C "EMBED_Y_0,Embedded Lines Configuration"
bitfld.long 0x1C 24. " EXPECT               ,Embedded data expected within channel" "Not expected,Expected"
hexmask.long.word 0x1C 0.--15. 1. "   LINES              ,Number of embedded lines in frame"
line.long 0x20 "FLUSH_0,Flush"
bitfld.long 0x20 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x20 24. "       PERIODIC           ,Whether a flush notice should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x20 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a flush notice is sent out"
line.long 0x24 "LINE_TIMER_0,Line Timer"
bitfld.long 0x24 25. " ENABLE               ,Whether to turn off feature" "Disabled,Enabled"
bitfld.long 0x24 24. "       PERIODIC           ,Whether a notification should be sent for the first tripline or repeatedly" "Not sent,Sent"
hexmask.long.word 0x24 0.--15. 1. "     TRIPLINE           ,Pixel line count at which a notification is sent out"
line.long 0x28 "SKIP_X_0,SKIP X"
hexmask.long.word 0x28 0.--12. 1. " PACKETS              ,Number of packets to skip on output at start of line counted in groups of 8 pixels"
line.long 0x2C "CROP_X_0,CROP X"
hexmask.long.word 0x2C 0.--15. 1. " WIDTH                ,Line width in pixels after which no packets will be transmitted"
line.long 0x30 "SKIP_Y_0,SKIP Y"
hexmask.long.word 0x30 0.--15. 1. " LINES                ,Number of lines to skip at top of the frame"
line.long 0x34 "CROP_Y_0,CROP Y"
hexmask.long.word 0x34 0.--15. 1. " HEIGHT               ,Height in lines after which no lines will be transmitted"
line.long 0x38 "OUT_X_0,OUT X"
hexmask.long.word 0x38 0.--15. 1. " WIDTH                ,Pixel Width of cropped frame at output of chansel"
line.long 0x3C "OUT_Y_0,OUT Y"
hexmask.long.word 0x3C 0.--15. 1. " HEIGHT               ,Line Height of cropped frame at output of chansel"
group.long (0xC0000+0x60)++0x07 "General Warning"
line.long 0x00 "NOTIFY_MASK_0,Notify Mask Register"
bitfld.long 0x00 31. " DTYPE_MISMATCH       ,Data type mismatch" "Not masked,Masked"
bitfld.long 0x00 22. "     EMBED_INFRINGE     ,Unexpected embedded data in frame" "Not masked,Masked"
bitfld.long 0x00 21. "   EMBED_LONG_LINE    ,Extra bytes on line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 20. " EMBED_SPURIOUS       ,Embedded bytes found between line start and line end" "Not masked,Masked"
bitfld.long 0x00 19. "     EMBED_RUNAWAY      ,Too many embedded lines in frame" "Not masked,Masked"
bitfld.long 0x00 18. "   EMBED_MISSING_LE   ,Two embedded line starts without a line end in between" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 17. " EMBED_EOF            ,Last byte of embedded data" "Not masked,Masked"
bitfld.long 0x00 16. "     EMBED_SOF          ,First byte of embedded data Pixel data related events" "Not masked,Masked"
bitfld.long 0x00 7. "   PIXEL_LINE_TIMER   ,Line counting event" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 6. " PIXEL_SHORT_LINE     ,A line has fewer pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 5. "     PIXEL_LONG_LINE    ,A line has more pixels than expected width" "Not masked,Masked"
bitfld.long 0x00 4. "   PIXEL_SPURIOUS     ,A pixel found between line end and line start markers" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 3. " PIXEL_RUNAWAY        ,Too many pixel lines in frame" "Not masked,Masked"
bitfld.long 0x00 2. "     PIXEL_MISSING_LE   ,Two lines starts without a line end in between" "Not masked,Masked"
bitfld.long 0x00 1. "   PIXEL_EOF          ,Last pixel of frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x00 0. " PIXEL_SOF            ,First pixel of frame" "Not masked,Masked"
line.long 0x04 "NOTIFY_MASK_XCPT_0,Notify Mask Except Register"
bitfld.long 0x04 9. " NOMATCH              ,Do not report on pixel preceded by a valid frame start but for which no channel matches" "Not masked,Masked"
bitfld.long 0x04 8. "     EMBED_OPEN_LINE    ,Frame end occurred while still processing embedded byte line" "Not masked,Masked"
bitfld.long 0x04 7. "   PIXEL_OPEN_LINE    ,Frame end (FE) occurs while still processing a pixel line" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 6. " FORCE_FE             ,Pixels stopped an FE was forced due to a latent LOAD event" "Not masked,Masked"
bitfld.long 0x04 5. "     STALE_FRAME        ,Do not report on channels that did not receive a LOAD prior to each frame start (FS)" "Not masked,Masked"
bitfld.long 0x04 4. "   COLLISION          ,Do not report on frames that match a channel already processing another frame" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 3. " EMPTY_FRAME          ,Do not report on frames without any pixels" "Not masked,Masked"
bitfld.long 0x04 2. "     EMBED_SHORT_FRAME  ,Do not report on frames that have received partial embedded data" "Not masked,Masked"
bitfld.long 0x04 1. "   PIXEL_SHORT_FRAME  ,Do not report on frames that have received partial pixels" "Not masked,Masked"
textline "                                        "
bitfld.long 0x04 0. " LOAD_FRAMED          ,Do not fault on LOAD that occur while in frame" "Not masked,Masked"
rgroup.long (0xC0000+0x68)++0x03 "Observation Registers"
line.long 0x00 "FRAME_SOURCE_0,FRAME_SOURCE_0"
bitfld.long 0x00 25. " IN_FRAME             ,In frame status" "Current,Elapsed"
bitfld.long 0x00 24. "        VPR                ,VPR status of frame" "0,1"
bitfld.long 0x00 22.--23. "            VC                 ,Virtual Channel within stream (binary)" "00,01,10,11"
textline "                                        "
bitfld.long 0x00 16.--21. " STREAM_HOT           ,Stream 1-hot encoded" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--15. 1. "             FRAMEID            ,Frame ID"
group.long (0xC0000+0x6C)++0x03
line.long 0x00 "FRAME_COUNT_0,FRAME_COUNT_0"
hexmask.long.byte 0x00 24.--31. 1. " BAD                  ,Count of faulty frame end seen saturates at 255"
hexmask.long.word 0x00 12.--23. 1. "             FE                 ,Count of all frame end seen saturates at 4095"
hexmask.long.word 0x00 0.--11. 1. "         FS                 ,Count of all frame start seen saturates at 4095"
textline "                                        "
group.long (0xC0000+0x80)++0x27
line.long 0x00 "PIXFMT_ENABLE_0,Pixel Memory Enable Register"
bitfld.long 0x00 2. " PDAF_EN              ,PDAF separation for channel 11 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       COMPAND_EN         ,Companding unit for channel 11 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     PIXFMT_EN          ,PIXFMT witing pixels for channel 11 enable" "Disabled,Enabled"
line.long 0x04 "PIXFMT_FORMAT_0,Pixel Memory Format Register"
hexmask.long.byte 0x04 0.--7. 1. " FORMAT               ,Pixel memory format for the VI channel"
line.long 0x08 "PIXFMT_WIDE_0,Pixel Memory Width Register"
bitfld.long 0x08 1. " ENDIAN               ,Order for merging adjacent pixels" "Big Endian,Little Endian"
bitfld.long 0x08 0. "  ENABLE             ,Enable merge for adjacent RAW8/RAW10 pixels" "Disabled,Enabled"
line.long 0x0C "PIXFMT_PDAF_CROP_X_0,Pixel Memory PDAF Crop Width Register"
hexmask.long.word 0x0C 16.--31. 1. " RIGHT                ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x0C 0.--15. 1. "           LEFT               ,Within a line X pixel position at which PDAF separation begins"
line.long 0x10 "CROP_Y_0,Pixel Memory PDAF Crop Height Register"
hexmask.long.word 0x10 16.--31. 1. " BOTTOM               ,Line at which PDAF separation ends"
hexmask.long.word 0x10 0.--15. 1. "           TOP                ,Line at which PDAF separation begins"
line.long 0x14 "PIXFMT_PDAF_CONFIG0_0,Pixel Memory PDAF Configuration Register"
hexmask.long.word 0x14 16.--31. 1. " REPLACE_VALUE        ,Value to replace PDAF pixel with (in nvcsi2vi pixel bus format)"
bitfld.long 0x14 0. "           REPLACE_ENABLE     ,Whether to replace PDAF pixels sent to primary surface with an alternative value" "Disabled,Enabled"
line.long 0x18 "PIXFMT_PDAF_REPLACE_CROP_X_0,Pixel Memory PDAF Replace Crop Width Register"
hexmask.long.word 0x18 16.--31. 1. " REPLACE_RIGHT        ,Within a line X pixel position at which PDAF separation ends"
hexmask.long.word 0x18 0.--15. 1. "           REPLACE_LEFT       ,Within a line X pixel position at which PDAF separation begins"
line.long 0x1C "PIXFMT_PDAF_REPLACE_CROP_Y_0,Pixel Memory PDAF Replace Crop Height Register"
hexmask.long.word 0x1C 16.--31. 1. " REPLACE_BOTTOM       ,Line at which PDAF separation ends"
hexmask.long.word 0x1C 0.--15. 1. "           REPLACE_TOP        ,Line at which PDAF separation begins"
line.long 0x20 "PIXFMT_PDAF_LAST_PIXEL_0,Pixel Memory PDAF Last Pixel Register"
hexmask.long.word 0x20 16.--31. 1. " Y                    ,Y coordinate of last PDAF pixel within the PDAF crop window"
hexmask.long.word 0x20 0.--15. 1. "           X                  ,X coordinate of last PDAF pixel within the PDAF crop window"
line.long 0x24 "PIXFMT_PDAF_CONFIG1_0,Pixel Memory PDAF Configuration Register"
hexmask.long.byte 0x24 0.--7. 1. " PDAF_FORMAT          ,Memory format in which the PDAF pixels will be written in"
rgroup.long (0xC0000+0xBC)++0x03
line.long 0x00 "DPCM_STATISTICS_0_0,DPCM Statistic 0 Register"
group.long (0xC0000+0xC0)++0x0F
line.long 0x00 "DPCM_STATISTICS_1_0,DPCM Statistics 1 Register"
line.long 0x04 "DPCM_HDR_LONG_TO_SHORT_0,DPCM HDR Long-To-Short Register"
hexmask.long.word 0x04 16.--31. 0x01 " OFFSET               ,Offset factor for long-to-short transitions"
hexmask.long.word 0x04 0.--15. 1. "           SCALE              ,Scale factor for long-to-short transitions"
line.long 0x08 "DPCM_HDR_SHORT_TO_LONG_0,DPCM HDR Short-To-Long-To-Short Register"
hexmask.long.word 0x08 16.--31. 0x01 " OFFSET               ,Offset factor for short-to-long transitions"
hexmask.long.word 0x08 0.--15. 1. "           SCALE              ,SCALE factor for short-to-long transitions"
line.long 0x0C "DPCM_HDR_SAMPLE_MAP_0,DPCM HDR Sample Map Register"
bitfld.long 0x0C 30. " EXPOS33              ,HDR Tile pixel 33 exposure long or short" "Short,Long"
bitfld.long 0x0C 28. "          EXPOS23            ,HDR Tile pixel 23 exposure long or short" "Short,Long"
bitfld.long 0x0C 26. "        EXPOS13            ,HDR Tile pixel 13 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 24. " EXPOS03              ,HDR Tile pixel 03 exposure long or short" "Short,Long"
bitfld.long 0x0C 22. "          EXPOS32            ,HDR Tile pixel 32 exposure long or short" "Short,Long"
bitfld.long 0x0C 20. "        EXPOS22            ,HDR Tile pixel 22 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 18. " EXPOS12              ,HDR Tile pixel 12 exposure long or short" "Short,Long"
bitfld.long 0x0C 16. "          EXPOS02            ,HDR Tile pixel 02 exposure long or short" "Short,Long"
bitfld.long 0x0C 14. "        EXPOS31            ,HDR Tile pixel 31 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 12. " EXPOS21              ,HDR Tile pixel 21 exposure long or short" "Short,Long"
bitfld.long 0x0C 10. "          EXPOS11            ,HDR Tile pixel 11 exposure long or short" "Short,Long"
bitfld.long 0x0C 8. "        EXPOS01            ,HDR Tile pixel 01 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 6. " EXPOS30              ,HDR Tile pixel 30 exposure long or short" "Short,Long"
bitfld.long 0x0C 4. "          EXPOS20            ,HDR Tile pixel 20 exposure long or short" "Short,Long"
bitfld.long 0x0C 2. "        EXPOS10            ,HDR Tile pixel 10 exposure long or short" "Short,Long"
textline "                                        "
bitfld.long 0x0C 0. " EXPOS00              ,HDR Tile pixel 00 exposure long or short" "Short,Long"
group.long (0xC0000+0xE4)++0x33
line.long 0x00 "ATOMP_SURFACE_OFFSET0_H_0,ATOMP Surface Offset High 0 Register"
hexmask.long.byte 0x00 0.--7. 0x01 " OFFSET_HI            ,Offset high"
line.long 0x04 "ATOMP_SURFACE_STRIDE0_0,ATOMP Surface Stride 0 Register"
hexmask.long.tbyte 0x04 0.--17. 1. " STRIDE               ,Stride"
line.long 0x08 "ATOMP_DPCM_CHUNK_0,ATOMP DPCM Chunk Register"
hexmask.long.tbyte 0x08 0.--17. 0x01 " OFFSET               ,Offset"
line.long 0x0C "ATOMP_SURFACE_OFFSET1_0,ATOMP Surface Offset 1 Register"
line.long 0x10 "ATOMP_SURFACE_OFFSET1_H_0,ATOMP Surface Offset High 1 Register"
hexmask.long.byte 0x10 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x14 "ATOMP_SURFACE_STRIDE1_0,ATOMP Surface Stride 1 Register"
hexmask.long.tbyte 0x14 0.--17. 1. " STRIDE               ,Stride"
line.long 0x18 "ATOMP_SURFACE_OFFSET2_0,ATOMP Surface Offset 2 Register"
line.long 0x1C "ATOMP_SURFACE_OFFSET2_H_0,ATOMP Surface Offset High 2 Register"
hexmask.long.byte 0x1C 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x20 "ATOMP_SURFACE_STRIDE2_0,ATOMP Surface Stride 2 Register"
hexmask.long.tbyte 0x20 0.--17. 1. " STRIDE               ,Stride"
line.long 0x24 "ATOMP_EMB_SURFACE_OFFSET0_0,ATOMP Embedded Surface Offset 0 Register"
line.long 0x28 "ATOMP_EMB_SURFACE_OFFSET0_H_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.byte 0x28 0.--7. 1. " OFFSET_HI            ,Offset high"
line.long 0x2C "ATOMP_EMB_SURFACE_STRIDE0_0,ATOMP Embedded Surface Offset High 0 Register"
hexmask.long.tbyte 0x2C 0.--17. 1. " STRIDE               ,Stride"
line.long 0x30 "ATOMP_DVFSFIFO_WATERMARK_0,ATOMP SVFS FIFO Watermark Register"
hexmask.long.word 0x30 9.--17. 1. " LOW_WATERMARK        ,Low watermark"
hexmask.long.word 0x30 0.--8. 1. "           HIGH_WATERMARK     ,High watermark"
rgroup.long (0xC0000+0x118)++0x03
line.long 0x00 "ATOMP_CHANNEL_SUPPORT_0,ATOMP Channel Support Register"
bitfld.long 0x00 3. " PDAF                 ,PDAF" "Unsupported,Supported"
bitfld.long 0x00 2. "    SEMI_PLANAR        ,SEMI PLANAR" "0,1"
bitfld.long 0x00 1. "            PLANAR             ,PLANAR" "0,1"
textline "                                        "
bitfld.long 0x00 0. " BAYER                ,BAYER" "0,1"
group.long (0xC0000+0x11C)++0x07
line.long 0x00 "ATOMP_HIGH_PRI_REQ_0,AROMP High Priority Request Registers"
bitfld.long 0x00 1.--2. " COUNT                ,Count" "0,1,2,3"
bitfld.long 0x00 0. "              ENABLE             ,Enable" "Disabled,Enabled"
tree.end
width 0x0B
tree.end
tree "MIPI-CSI Camera Serial Interface"
base ad:0x150C0000
width 27.
tree "NVCSI Configuration"
group.long 0x00++0x0B
line.long 0x00 "NVCSI_INCR_SYNCPT_0,NVCSI INCR Syncpt"
hexmask.long.byte 0x00 10.--17. 1. " NVCSI_COND ,Condition mapped from raise/wait"
hexmask.long.word 0x00 0.--9. 1. "   NVCSI_INDX ,Syncpt index value"
line.long 0x04 "NVCSI_INCR_SYNCPT_CNTRL_0,NVCSI INCR Syncpt Control"
bitfld.long 0x04 8. " NO_STALL   ,No stall" "No,Yes"
bitfld.long 0x04 0. "  SOFT_RESET ,Soft reset" "No effect,Reset"
line.long 0x08 "NVCSI_INCR_SYNCPT_ERROR_0,NVCSI INCR Syncpt Error"
tree.end
width 33.
tree "NVCSI Global"
rgroup.long 0x80++0x03
line.long 0x00 "NVCSI_ID_0,NVCSI ID"
bitfld.long 0x00 4.--7. " VER_ID                          ,Version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "            REV_ID                          ,Revision ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x84++0x03
line.long 0x00 "DEBUG_CONTROL_0_0,Debug Control 0"
bitfld.long 0x00 8.--13. " DEBUG_0_EVENT_SEL               ,Debug 0 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_0_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x88++0x03
line.long 0x00 "DEBUG_CONTROL_1_0,Debug Control 1"
bitfld.long 0x00 8.--13. " DEBUG_1_EVENT_SEL               ,Debug 1 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_1_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x8C++0x03
line.long 0x00 "DEBUG_CONTROL_2_0,Debug Control 2"
bitfld.long 0x00 8.--13. " DEBUG_2_EVENT_SEL               ,Debug 2 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_2_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x90++0x03
line.long 0x00 "DEBUG_CONTROL_3_0,Debug Control 3"
bitfld.long 0x00 8.--13. " DEBUG_3_EVENT_SEL               ,Debug 3 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_3_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x94++0x03
line.long 0x00 "DEBUG_CONTROL_4_0,Debug Control 4"
bitfld.long 0x00 8.--13. " DEBUG_4_EVENT_SEL               ,Debug 4 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_4_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x98++0x03
line.long 0x00 "DEBUG_CONTROL_5_0,Debug Control 5"
bitfld.long 0x00 8.--13. " DEBUG_5_EVENT_SEL               ,Debug 5 event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--2. "            DEBUG_5_STREAM_SEL              ,Select stream" "No stream,Stream 0,Stream 1,Stream 2,Stream 3,Stream 4,Stream 5,?..."
group.long 0x9C++0x017
line.long 0x00 "DEBUG_COUNTER_0_0,Debug Counter 0"
line.long 0x04 "DEBUG_COUNTER_1_0,Debug Counter 1"
line.long 0x08 "DEBUG_COUNTER_2_0,Debug Counter 2"
line.long 0x0C "DEBUG_COUNTER_3_0,Debug Counter 3"
line.long 0x10 "DEBUG_COUNTER_4_0,Debug Counter 4"
line.long 0x14 "DEBUG_COUNTER_5_0,Debug Counter 5"
rgroup.long 0xB4++0x07
line.long 0x00 "INTR_PEND_0,Interrupt Pending Register"
bitfld.long 0x00 11. " PHY_2_CILB_INTR_PEND_STATUS     ,Phy 2 cilb interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  PHY_2_CILA_INTR_PEND_STATUS     ,Phy 2 cila interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x00 9. " PHY_1_CILB_INTR_PEND_STATUS     ,Phy 1 cilb interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  PHY_1_CILA_INTR_PEND_STATUS     ,Phy 1 cila interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x00 7. " PHY_0_CILB_INTR_PEND_STATUS     ,Phy 0 cilb interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  PHY_0_CILA_INTR_PEND_STATUS     ,Phy 0 cila interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x00 5. " STREAM_5_INTR_PEND_STATUS       ,Stream 5 interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STREAM_4_INTR_PEND_STATUS       ,Stream 4 interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x00 3. " STREAM_3_INTR_PEND_STATUS       ,Stream 3 interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  STREAM_2_INTR_PEND_STATUS       ,Stream 2 interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x00 1. " STREAM_1_INTR_PEND_STATUS       ,Stream 1 interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  STREAM_0_INTR_PEND_STATUS       ,Stream 0 interrupt pending status" "No interrupt,Interrupt"
line.long 0x04 "ERR_INTR_PEND_0,Error Interrupt Pending Register"
bitfld.long 0x04 11. " PHY_2_CILB_ERR_INTR_PEND_STATUS ,Phy 2 cilb error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 10. "  PHY_2_CILA_ERR_INTR_PEND_STATUS ,Phy 2 cila error interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x04 9. " PHY_1_CILB_ERR_INTR_PEND_STATUS ,Phy 1 cilb error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 8. "  PHY_1_CILA_ERR_INTR_PEND_STATUS ,Phy 1 cila error interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x04 7. " PHY_0_CILB_ERR_INTR_PEND_STATUS ,Phy 0 cilb error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 6. "  PHY_0_CILA_ERR_INTR_PEND_STATUS ,Phy 0 cila error interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x04 5. " STREAM_5_ERR_INTR_PEND_STATUS   ,Stream 5 error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 4. "  STREAM_4_ERR_INTR_PEND_STATUS   ,Stream 4 error interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x04 3. " STREAM_3_ERR_INTR_PEND_STATUS   ,Stream 3 error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 2. "  STREAM_2_ERR_INTR_PEND_STATUS   ,Stream 2 error interrupt pending status" "No interrupt,Interrupt"
textline "                                          "
bitfld.long 0x04 1. " STREAM_1_ERR_INTR_PEND_STATUS   ,Stream 1 error interrupt pending status" "No interrupt,Interrupt"
bitfld.long 0x04 0. "  STREAM_0_ERR_INTR_PEND_STATUS   ,Stream 0 error interrupt pending status" "No interrupt,Interrupt"
group.long 0xBC++0x03
line.long 0x00 "SEC_CTRL_0,Secure Control"
bitfld.long 0x00 10. " CFG_SECURE_EN[10]               ,Lock for CFG_SECURE_EN register" "Unlocked,Locked"
bitfld.long 0x00 9. "      CFG_SECURE_EN[9]                ,PHY 2 secure enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 8. " CFG_SECURE_EN[8]                ,Stream 5 secure enable" "Disabled,Enabled"
bitfld.long 0x00 7. "      CFG_SECURE_EN[7]                ,Stream 4 secure enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 6. " CFG_SECURE_EN[6]                ,PHY 1 secure enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      CFG_SECURE_EN[5]                ,Stream 3 secure enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 4. " CFG_SECURE_EN[4]                ,Stream 2 secure enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      CFG_SECURE_EN[3]                ,PHY 0 secure enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 2. " CFG_SECURE_EN[2]                ,Stream 1 secure enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      CFG_SECURE_EN[1]                ,Stream 0 secure enable" "Disabled,Enabled"
textline "                                          "
bitfld.long 0x00 0. " CFG_SECURE_EN[0]                ,Global space secure enable" "Disabled,Enabled"
tree.end
width 43.
width 28.
tree "NVCSI_STREAM_0"
group.long 0x10000++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x10000+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x10000+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x10000+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x10000+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x10000+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x10000+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x10000+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x10000+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x10000+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x10000+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x10000+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x10000+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x10000+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x10000+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x10000+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x10000+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x10000+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x10000+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x10000+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x10000+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x10000+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10000+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x10000+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x10000+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x10000+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x10000+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x10000+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x10000+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x10000+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x10000+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_0_A"
group.long ((0x10000+0x400)+0x0)++0x03
line.long 0x00 "CILA_INTR_STATUS_CILA_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x10000+0x400)+0x4)++0x03
line.long 0x00 "CILA_INTR_MASK_CILA_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
group.long ((0x10000+0x400)+0x8)++0x03
line.long 0x00 "CILA_ERR_INTR_STATUS_CILA_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x10000+0x400)+0xC)++0x03
line.long 0x00 "CILA_ERR_INTR_MASK_CILA_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
width 35.
tree.end
width 0x0B
width 28.
tree "NVCSI_STREAM_1"
group.long 0x10800++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x10800+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x10800+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x10800+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x10800+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x10800+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x10800+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x10800+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x10800+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x10800+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x10800+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x10800+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x10800+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x10800+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x10800+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x10800+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x10800+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x10800+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x10800+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x10800+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x10800+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x10800+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x10800+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x10800+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x10800+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x10800+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x10800+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x10800+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x10800+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x10800+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x10800+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_0_B"
group.long ((0x10800+0x400)+0x0)++0x03
line.long 0x00 "CILB_INTR_STATUS_CILB_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x10800+0x400)+0x4)++0x03
line.long 0x00 "CILB_INTR_MASK_CILB_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
group.long ((0x10800+0x400)+0x8)++0x03
line.long 0x00 "CILB_ERR_INTR_STATUS_CILB_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x10800+0x400)+0xC)++0x03
line.long 0x00 "CILB_ERR_INTR_MASK_CILB_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
width 35.
group.long ((0x10800+0x400)+0x7400)++0x03
line.long 0x00 "NVCSI_CIL_PHY_CTRL_0,NVCSI CIL PHY Control"
bitfld.long 0x00 0. " CFG_PHY_MODE           ,Config PHY mode" "D-PHY,C-PHY"
if (((per.l(ad:0x150C0000+(0x10800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x10800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,3 lanes,4 lanes (CLKA),4 lanes (CLKB),?..."
else
group.long ((0x10800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,,4 lanes (CLKA),4 lanes (CLKB),?..."
endif
group.long ((0x10800+0x400)+0x7408)++0x0B
line.long 0x00 "NVCSI_CIL_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL Clock Enable Override Control"
bitfld.long 0x00 0. " CLKEN_OVERRIDE         ,Clock enable override for CIL" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_PAD_CONFIG_0,NVCSI CIL PAD Config"
bitfld.long 0x04 12.--15. " LOADADJ                ,Load adjustment value to be connected to pad not used for CSI functional mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x04 9. " PDVCLAMP               ,Power down regular which supplies current to de-serializer logic" "No,Yes"
textline "                                            "
bitfld.long 0x04 8. " E_VCLAMP_SHORT         ,Enables short VCLAMP regulator to VDDP" "Disabled,Enabled"
textline "                                            "
hexmask.long.byte 0x04 0.--7. 1. " SPARE_TOP              ,Spare register bits for top level control"
line.long 0x08 "NVCSI_CIL_LANE_SWIZZLE_CTRL_0,NVCSI CIL Lane Swizzle Control"
bitfld.long 0x08 0.--4. " LANE_SWIZZLE_CTRL      ,Polarity swizzle control for bricks" "A0 A1 B0 B1 --> A0 A1 B0 B1,A0 A1 B0 B1 --> A0 A1 B1 B0,A0 A1 B0 B1 --> A0 B0 B1 A1,A0 A1 B0 B1 --> A0 B0 A1 B1,A0 A1 B0 B1 --> A0 B1 A1 B0,A0 A1 B0 B1 --> A0 B1 B0 A1,A0 A1 B0 B1 --> A1 A0 B0 B1,A0 A1 B0 B1 --> A1 A0 B1 B0,A0 A1 B0 B1 --> A1 B0 B1 A0,A0 A1 B0 B1 --> A1 B0 A0 B1,A0 A1 B0 B1 --> A1 B1 A0 B0,A0 A1 B0 B1 --> A1 B1 B0 A0,A0 A1 B0 B1 --> B0 A1 A0 B1,A0 A1 B0 B1 --> B0 A1 B1 A0,A0 A1 B0 B1 --> B0 A0 B1 A1,A0 A1 B0 B1 --> B0 A0 A1 B1,A0 A1 B0 B1 --> B0 B1 A1 A0,A0 A1 B0 B1 --> B0 B1 A0 A1,A0 A1 B0 B1 --> B1 A1 B0 A0,A0 A1 B0 B1 --> B1 A1 A0 B0,A0 A1 B0 B1 --> B1 B0 A0 A1,A0 A1 B0 B1 --> B1 B0 A1 A0,A0 A1 B0 B1 --> B1 A0 A1 B0,A0 A1 B0 B1 --> B1 A0 B0 A1,?..."
rgroup.long ((0x10800+0x400)+0x7414)++0x03
line.long 0x00 "NVCSI_CIL_BK_MODE_STATUS_0,NVCSI CIL Brick Mode Status"
bitfld.long 0x00 0.--1. " BK_MODE                ,Brick mode" "Two independent 2x bricks,One 4x brick (CLKA),One 4x brick (CLKB),?..."
textline "                                            "
group.long ((0x10800+0x400)+0x7418)++0x07
line.long 0x00 "NVCSI_CIL_A_SW_RESET_0,NVCSI CIL A Software Reset"
bitfld.long 0x00 1. " SW_RESET1_A                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_A                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL A Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_A           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_A           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x10800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x10800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 19. "                                                                        BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 17. "                                                                        PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
else
group.long ((0x10800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_A            ,Enable LP receiver of clock partition A" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 18. " PD_CLK_A                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
endif
group.long ((0x10800+0x400)+0x7424)++0x0F
line.long 0x00 "NVCSI_CIL_A_DPHY_INADJ_CTRL_0,NVCSI CIL A DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_A     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_A            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 14. "    SW_SET_DPHY_INADJ_IO1_A     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_A            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 6. "    SW_SET_DPHY_INADJ_IO0_A     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_A            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_A_C-PHY_INADJ_CTRL_0,NVCSI CIL A C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 12.--13. "    C-PHY_INADJ_RXCA_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio1" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 8.--9. "    C-PHY_INADJ_RXAB_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio0" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 2.--3. "    C-PHY_INADJ_RXBC_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_A_CLK_DESKEW_CTRL_0,NVCSI CIL A Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_A      ,Clock INADJ sweep control A" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_A      ,Clock INADJ limit high A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. "    CLK_INADJ_LIMIT_LOW_A       ,Clock INADJ limit low A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_A_DATA_DESKEW_CTRL_0,NVCSI CIL A Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_A    ,Data INADJ sweep control 1 A" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_A    ,Data INADJ limit high 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 16.--21. "    DATA_INADJ_LIMIT_LOW1_A     ,Data INADJ limit low 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_A    ,Data INADJ sweep control 0 A" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 8.--13. "    DATA_INADJ_LIMIT_HIGH0_A    ,Data INADJ limit high 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_A     ,Data INADJ limit low 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
width 55.
rgroup.long ((0x10800+0x400)+0x7434)++0x23
line.long 0x00 "NVCSI_CIL_A_DPHY_DESKEW_STATUS_0,NVCSI CIL A DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_A        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_A       ,Calibration done status IO 1" "False,True"
textline "                                                                "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_A        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_A       ,Calibration done status IO 0" "False,True"
textline "                                                                "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_A       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_A      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 1"
textline "                                                                "
width 40.
if (((per.l(ad:0x150C0000+(0x10800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x10800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_A    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                 "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_A    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
else
group.long ((0x10800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_A    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                 "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_A    ,Polarity swizzle control for lane A0" "Low,High"
endif
group.long ((0x10800+0x400)+0x745C)++0x03
line.long 0x00 "NVCSI_CIL_A_CONTROL_0,NVCSI CIL A Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clock lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
textline "                                                 "
rgroup.long ((0x10800+0x400)+0x7460)++0x13
line.long 0x00 "NVCSI_CIL_A_C-PHY_ERR_STATUS_0,NVCSI CIL A C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_A    ,Lane demmaper error mux1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_A ,Lane demmper error RX control1 A" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_A         ,Lane decoder error1 A"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_A    ,Lane demmper error mux0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_A ,Lane demmper error RX control0 A" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_A         ,Lane decoder error0 A"
line.long 0x04 "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL A Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_A      ,Escape mode command0 A"
line.long 0x08 "NVCSI_CIL_A_ESCAPE_MODE_DATA_0_0,NVCSI CIL A Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_A         ,Escape mode data0 A"
line.long 0x0C "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL A Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_A      ,Escape mode command1 A"
line.long 0x10 "NVCSI_CIL_A_ESCAPE_MODE_DATA_1_0,NVCSI CIL A Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_A         ,Escape mode data1 A"
group.long ((0x10800+0x400)+0x7474)++0x07
line.long 0x00 "NVCSI_CIL_A_DPHY_SYNC_PATTERN_0,NVCSI CIL A DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC A" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL A DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
group.long ((0x10800+0x400)+0x747C)++0x07
line.long 0x00 "NVCSI_CIL_B_SW_RESET_0,NVCSI CIL B Software Reset"
bitfld.long 0x00 1. " SW_RESET1_B                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_B                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL B Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_B           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_B           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x10800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x10800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 17. " PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long ((0x10800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_B            ,Enable LP receiver of clock partition B" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 18. " PD_CLK_B                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long ((0x10800+0x400)+0x7488)++0x0F
line.long 0x00 "NVCSI_CIL_B_DPHY_INADJ_CTRL_0,NVCSI CIL B DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_B     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_B            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 14. " SW_SET_DPHY_INADJ_IO1_B     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_B            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 6. " SW_SET_DPHY_INADJ_IO0_B     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_B            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_B_C-PHY_INADJ_CTRL_0,NVCSI CIL B C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x04 12.--13. " C-PHY_INADJ_RXCA_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode,tuning the RX path trimmer of RXCA, trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio1" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 8.--9. " C-PHY_INADJ_RXAB_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXCA, trio0" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 2.--3. " C-PHY_INADJ_RXBC_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_B_CLK_DESKEW_CTRL_0,NVCSI CIL B Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_B      ,Clock INADJ sweep control B" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_B      ,Clock INADJ limit high B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x08 0.--5. " CLK_INADJ_LIMIT_LOW_B       ,Clock INADJ limit low B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_B_DATA_DESKEW_CTRL_0,NVCSI CIL B Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_B    ,Data INADJ sweep control 1 B" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_B    ,Data INADJ limit high 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x0C 16.--21. " DATA_INADJ_LIMIT_LOW1_B     ,Data INADJ limit low 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_B    ,Data INADJ sweep control 0 B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x0C 8.--13. " DATA_INADJ_LIMIT_HIGH0_B    ,Data INADJ limit high 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_B     ,Data INADJ limit low 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
width 52.
rgroup.long ((0x10800+0x400)+0x7498)++0x23
line.long 0x00 "NVCSI_CIL_B_DPHY_DESKEW_STATUS_0,NVCSI CIL B DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_B        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_B       ,Calibration done status IO 1" "False,True"
textline "                                                             "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_B        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_B       ,Calibration done status IO 0" "False,True"
textline "                                                             "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_B       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_B      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 1"
if (((per.l(ad:0x150C0000+(0x10800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x10800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_B    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_B    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
else
group.long ((0x10800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_B    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                             "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_B    ,Polarity swizzle control for lane A0" "Low,High"
textline "                                                             "
endif
width 40.
group.long ((0x10800+0x400)+0x74C0)++0x03
line.long 0x00 "NVCSI_CIL_B_CONTROL_0,NVCSI CIL B Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
rgroup.long ((0x10800+0x400)+0x74C4)++0x13
line.long 0x00 "NVCSI_CIL_B_C-PHY_ERR_STATUS_0,NVCSI CIL B C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_B    ,Lane demmaper error mux1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_B ,Lane demmper error RX control1 B" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_B         ,Lane decoder error1 B"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_B    ,Lane demmper error mux0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_B ,Lane demmper error RX control0 B" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_B         ,Lane decoder error0 B"
line.long 0x04 "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL B Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_B      ,Escape mode command0 B"
line.long 0x08 "NVCSI_CIL_B_ESCAPE_MODE_DATA_0_0,NVCSI CIL B Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_B         ,Escape mode data0 B"
line.long 0x0C "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL B Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_B      ,Escape mode command1 B"
line.long 0x10 "NVCSI_CIL_B_ESCAPE_MODE_DATA_1_0,NVCSI CIL B Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_B         ,Escape mode data1 B"
group.long ((0x10800+0x400)+0x74D8)++0x07
line.long 0x00 "NVCSI_CIL_B_DPHY_SYNC_PATTERN_0,NVCSI CIL B DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC B" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL B DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
group.long ((0x10800+0x400)+0x74E0)++0x03
line.long 0x00 "NVCSI_CIL_SPARE_0,Spare register"
tree.end
width 0x0B
width 28.
tree "NVCSI_STREAM_2"
group.long 0x20000++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x20000+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x20000+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x20000+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x20000+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x20000+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x20000+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x20000+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x20000+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x20000+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x20000+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x20000+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x20000+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x20000+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x20000+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x20000+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x20000+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x20000+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x20000+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x20000+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x20000+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x20000+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20000+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x20000+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x20000+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x20000+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x20000+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x20000+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x20000+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x20000+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x20000+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_1_A"
group.long ((0x20000+0x400)+0x0)++0x03
line.long 0x00 "CILA_INTR_STATUS_CILA_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x20000+0x400)+0x4)++0x03
line.long 0x00 "CILA_INTR_MASK_CILA_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
group.long ((0x20000+0x400)+0x8)++0x03
line.long 0x00 "CILA_ERR_INTR_STATUS_CILA_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x20000+0x400)+0xC)++0x03
line.long 0x00 "CILA_ERR_INTR_MASK_CILA_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
width 35.
tree.end
width 0x0B
width 28.
tree "NVCSI_STREAM_3"
group.long 0x20800++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x20800+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x20800+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x20800+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x20800+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x20800+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x20800+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x20800+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x20800+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x20800+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x20800+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x20800+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x20800+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x20800+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x20800+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x20800+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x20800+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x20800+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x20800+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x20800+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x20800+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x20800+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x20800+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x20800+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x20800+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x20800+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x20800+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x20800+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x20800+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x20800+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x20800+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_1_B"
group.long ((0x20800+0x400)+0x0)++0x03
line.long 0x00 "CILB_INTR_STATUS_CILB_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x20800+0x400)+0x4)++0x03
line.long 0x00 "CILB_INTR_MASK_CILB_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
group.long ((0x20800+0x400)+0x8)++0x03
line.long 0x00 "CILB_ERR_INTR_STATUS_CILB_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x20800+0x400)+0xC)++0x03
line.long 0x00 "CILB_ERR_INTR_MASK_CILB_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
width 35.
group.long ((0x20800+0x400)+0x7400)++0x03
line.long 0x00 "NVCSI_CIL_PHY_CTRL_0,NVCSI CIL PHY Control"
bitfld.long 0x00 0. " CFG_PHY_MODE           ,Config PHY mode" "D-PHY,C-PHY"
if (((per.l(ad:0x150C0000+(0x20800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x20800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,3 lanes,4 lanes (CLKA),4 lanes (CLKB),?..."
else
group.long ((0x20800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,,4 lanes (CLKA),4 lanes (CLKB),?..."
endif
group.long ((0x20800+0x400)+0x7408)++0x0B
line.long 0x00 "NVCSI_CIL_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL Clock Enable Override Control"
bitfld.long 0x00 0. " CLKEN_OVERRIDE         ,Clock enable override for CIL" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_PAD_CONFIG_0,NVCSI CIL PAD Config"
bitfld.long 0x04 12.--15. " LOADADJ                ,Load adjustment value to be connected to pad not used for CSI functional mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x04 9. " PDVCLAMP               ,Power down regular which supplies current to de-serializer logic" "No,Yes"
textline "                                            "
bitfld.long 0x04 8. " E_VCLAMP_SHORT         ,Enables short VCLAMP regulator to VDDP" "Disabled,Enabled"
textline "                                            "
hexmask.long.byte 0x04 0.--7. 1. " SPARE_TOP              ,Spare register bits for top level control"
line.long 0x08 "NVCSI_CIL_LANE_SWIZZLE_CTRL_0,NVCSI CIL Lane Swizzle Control"
bitfld.long 0x08 0.--4. " LANE_SWIZZLE_CTRL      ,Polarity swizzle control for bricks" "A0 A1 B0 B1 --> A0 A1 B0 B1,A0 A1 B0 B1 --> A0 A1 B1 B0,A0 A1 B0 B1 --> A0 B0 B1 A1,A0 A1 B0 B1 --> A0 B0 A1 B1,A0 A1 B0 B1 --> A0 B1 A1 B0,A0 A1 B0 B1 --> A0 B1 B0 A1,A0 A1 B0 B1 --> A1 A0 B0 B1,A0 A1 B0 B1 --> A1 A0 B1 B0,A0 A1 B0 B1 --> A1 B0 B1 A0,A0 A1 B0 B1 --> A1 B0 A0 B1,A0 A1 B0 B1 --> A1 B1 A0 B0,A0 A1 B0 B1 --> A1 B1 B0 A0,A0 A1 B0 B1 --> B0 A1 A0 B1,A0 A1 B0 B1 --> B0 A1 B1 A0,A0 A1 B0 B1 --> B0 A0 B1 A1,A0 A1 B0 B1 --> B0 A0 A1 B1,A0 A1 B0 B1 --> B0 B1 A1 A0,A0 A1 B0 B1 --> B0 B1 A0 A1,A0 A1 B0 B1 --> B1 A1 B0 A0,A0 A1 B0 B1 --> B1 A1 A0 B0,A0 A1 B0 B1 --> B1 B0 A0 A1,A0 A1 B0 B1 --> B1 B0 A1 A0,A0 A1 B0 B1 --> B1 A0 A1 B0,A0 A1 B0 B1 --> B1 A0 B0 A1,?..."
rgroup.long ((0x20800+0x400)+0x7414)++0x03
line.long 0x00 "NVCSI_CIL_BK_MODE_STATUS_0,NVCSI CIL Brick Mode Status"
bitfld.long 0x00 0.--1. " BK_MODE                ,Brick mode" "Two independent 2x bricks,One 4x brick (CLKA),One 4x brick (CLKB),?..."
textline "                                            "
group.long ((0x20800+0x400)+0x7418)++0x07
line.long 0x00 "NVCSI_CIL_A_SW_RESET_0,NVCSI CIL A Software Reset"
bitfld.long 0x00 1. " SW_RESET1_A                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_A                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL A Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_A           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_A           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x20800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x20800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 19. "                                                                        BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 17. "                                                                        PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
else
group.long ((0x20800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_A            ,Enable LP receiver of clock partition A" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 18. " PD_CLK_A                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
endif
group.long ((0x20800+0x400)+0x7424)++0x0F
line.long 0x00 "NVCSI_CIL_A_DPHY_INADJ_CTRL_0,NVCSI CIL A DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_A     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_A            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 14. "    SW_SET_DPHY_INADJ_IO1_A     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_A            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 6. "    SW_SET_DPHY_INADJ_IO0_A     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_A            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_A_C-PHY_INADJ_CTRL_0,NVCSI CIL A C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 12.--13. "    C-PHY_INADJ_RXCA_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio1" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 8.--9. "    C-PHY_INADJ_RXAB_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio0" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 2.--3. "    C-PHY_INADJ_RXBC_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_A_CLK_DESKEW_CTRL_0,NVCSI CIL A Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_A      ,Clock INADJ sweep control A" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_A      ,Clock INADJ limit high A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. "    CLK_INADJ_LIMIT_LOW_A       ,Clock INADJ limit low A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_A_DATA_DESKEW_CTRL_0,NVCSI CIL A Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_A    ,Data INADJ sweep control 1 A" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_A    ,Data INADJ limit high 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 16.--21. "    DATA_INADJ_LIMIT_LOW1_A     ,Data INADJ limit low 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_A    ,Data INADJ sweep control 0 A" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 8.--13. "    DATA_INADJ_LIMIT_HIGH0_A    ,Data INADJ limit high 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_A     ,Data INADJ limit low 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
width 55.
rgroup.long ((0x20800+0x400)+0x7434)++0x23
line.long 0x00 "NVCSI_CIL_A_DPHY_DESKEW_STATUS_0,NVCSI CIL A DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_A        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_A       ,Calibration done status IO 1" "False,True"
textline "                                                                "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_A        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_A       ,Calibration done status IO 0" "False,True"
textline "                                                                "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_A       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_A      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 1"
textline "                                                                "
width 40.
if (((per.l(ad:0x150C0000+(0x20800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x20800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_A    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                 "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_A    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
else
group.long ((0x20800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_A    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                 "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_A    ,Polarity swizzle control for lane A0" "Low,High"
endif
group.long ((0x20800+0x400)+0x745C)++0x03
line.long 0x00 "NVCSI_CIL_A_CONTROL_0,NVCSI CIL A Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clock lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
textline "                                                 "
rgroup.long ((0x20800+0x400)+0x7460)++0x13
line.long 0x00 "NVCSI_CIL_A_C-PHY_ERR_STATUS_0,NVCSI CIL A C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_A    ,Lane demmaper error mux1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_A ,Lane demmper error RX control1 A" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_A         ,Lane decoder error1 A"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_A    ,Lane demmper error mux0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_A ,Lane demmper error RX control0 A" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_A         ,Lane decoder error0 A"
line.long 0x04 "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL A Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_A      ,Escape mode command0 A"
line.long 0x08 "NVCSI_CIL_A_ESCAPE_MODE_DATA_0_0,NVCSI CIL A Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_A         ,Escape mode data0 A"
line.long 0x0C "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL A Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_A      ,Escape mode command1 A"
line.long 0x10 "NVCSI_CIL_A_ESCAPE_MODE_DATA_1_0,NVCSI CIL A Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_A         ,Escape mode data1 A"
group.long ((0x20800+0x400)+0x7474)++0x07
line.long 0x00 "NVCSI_CIL_A_DPHY_SYNC_PATTERN_0,NVCSI CIL A DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC A" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL A DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
group.long ((0x20800+0x400)+0x747C)++0x07
line.long 0x00 "NVCSI_CIL_B_SW_RESET_0,NVCSI CIL B Software Reset"
bitfld.long 0x00 1. " SW_RESET1_B                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_B                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL B Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_B           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_B           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x20800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x20800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 17. " PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long ((0x20800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_B            ,Enable LP receiver of clock partition B" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 18. " PD_CLK_B                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long ((0x20800+0x400)+0x7488)++0x0F
line.long 0x00 "NVCSI_CIL_B_DPHY_INADJ_CTRL_0,NVCSI CIL B DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_B     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_B            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 14. " SW_SET_DPHY_INADJ_IO1_B     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_B            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 6. " SW_SET_DPHY_INADJ_IO0_B     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_B            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_B_C-PHY_INADJ_CTRL_0,NVCSI CIL B C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x04 12.--13. " C-PHY_INADJ_RXCA_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode,tuning the RX path trimmer of RXCA, trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio1" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 8.--9. " C-PHY_INADJ_RXAB_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXCA, trio0" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 2.--3. " C-PHY_INADJ_RXBC_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_B_CLK_DESKEW_CTRL_0,NVCSI CIL B Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_B      ,Clock INADJ sweep control B" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_B      ,Clock INADJ limit high B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x08 0.--5. " CLK_INADJ_LIMIT_LOW_B       ,Clock INADJ limit low B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_B_DATA_DESKEW_CTRL_0,NVCSI CIL B Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_B    ,Data INADJ sweep control 1 B" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_B    ,Data INADJ limit high 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x0C 16.--21. " DATA_INADJ_LIMIT_LOW1_B     ,Data INADJ limit low 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_B    ,Data INADJ sweep control 0 B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x0C 8.--13. " DATA_INADJ_LIMIT_HIGH0_B    ,Data INADJ limit high 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_B     ,Data INADJ limit low 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
width 52.
rgroup.long ((0x20800+0x400)+0x7498)++0x23
line.long 0x00 "NVCSI_CIL_B_DPHY_DESKEW_STATUS_0,NVCSI CIL B DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_B        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_B       ,Calibration done status IO 1" "False,True"
textline "                                                             "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_B        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_B       ,Calibration done status IO 0" "False,True"
textline "                                                             "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_B       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_B      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 1"
if (((per.l(ad:0x150C0000+(0x20800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x20800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_B    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_B    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
else
group.long ((0x20800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_B    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                             "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_B    ,Polarity swizzle control for lane A0" "Low,High"
textline "                                                             "
endif
width 40.
group.long ((0x20800+0x400)+0x74C0)++0x03
line.long 0x00 "NVCSI_CIL_B_CONTROL_0,NVCSI CIL B Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
rgroup.long ((0x20800+0x400)+0x74C4)++0x13
line.long 0x00 "NVCSI_CIL_B_C-PHY_ERR_STATUS_0,NVCSI CIL B C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_B    ,Lane demmaper error mux1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_B ,Lane demmper error RX control1 B" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_B         ,Lane decoder error1 B"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_B    ,Lane demmper error mux0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_B ,Lane demmper error RX control0 B" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_B         ,Lane decoder error0 B"
line.long 0x04 "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL B Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_B      ,Escape mode command0 B"
line.long 0x08 "NVCSI_CIL_B_ESCAPE_MODE_DATA_0_0,NVCSI CIL B Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_B         ,Escape mode data0 B"
line.long 0x0C "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL B Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_B      ,Escape mode command1 B"
line.long 0x10 "NVCSI_CIL_B_ESCAPE_MODE_DATA_1_0,NVCSI CIL B Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_B         ,Escape mode data1 B"
group.long ((0x20800+0x400)+0x74D8)++0x07
line.long 0x00 "NVCSI_CIL_B_DPHY_SYNC_PATTERN_0,NVCSI CIL B DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC B" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL B DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
group.long ((0x20800+0x400)+0x74E0)++0x03
line.long 0x00 "NVCSI_CIL_SPARE_0,Spare register"
tree.end
width 0x0B
width 28.
tree "NVCSI_STREAM_4"
group.long 0x30000++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x30000+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x30000+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x30000+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x30000+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x30000+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x30000+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x30000+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x30000+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x30000+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x30000+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x30000+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x30000+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x30000+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x30000+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x30000+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x30000+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x30000+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x30000+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x30000+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x30000+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x30000+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30000+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x30000+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x30000+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x30000+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x30000+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x30000+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x30000+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x30000+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x30000+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_2_A"
group.long ((0x30000+0x400)+0x0)++0x03
line.long 0x00 "CILA_INTR_STATUS_CILA_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x30000+0x400)+0x4)++0x03
line.long 0x00 "CILA_INTR_MASK_CILA_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
group.long ((0x30000+0x400)+0x8)++0x03
line.long 0x00 "CILA_ERR_INTR_STATUS_CILA_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x30000+0x400)+0xC)++0x03
line.long 0x00 "CILA_ERR_INTR_MASK_CILA_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_A   ,DPHY CIL deskew calib error control A" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_A  ,DPHY CIL deskew calib error lane1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_A  ,DPHY CIL deskew calib error lane0 A" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_A  ,DPHY CIL deskew calib done control A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_A ,DPHY CIL deskew calib done lane1 A" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_A ,DPHY CIL deskew calib done lane0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_A       ,DPHY CIL clock lane ulpm request A" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_A ,CIL data lane esc mode sync error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_A ,CIL data lane esc mode sync error0 A" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_A                    ,CIL lpdt int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_A            ,CIL ulps trigger int1 A" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_A       ,CIL remote reset trigger int1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_A                    ,CIL lpdt int0 A" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_A            ,CIL ulps trigger int0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_A       ,CIL remote reset trigger int0 A" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_A      ,CIL data lane esc data rec1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_A       ,CIL data lane esc cmd rec1 A" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_A      ,CIL data lane esc data rec0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_A       ,CIL data lane esc cmd rec0 A" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_A   ,CIL data lane RX FIFO full_error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_A          ,CIL data lane control error1 A" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_A        ,CIL data lane sot mb error1 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_A        ,CIL data lane sot sb error1 A" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_A   ,CIL data lane RX FIFO full error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_A          ,CIL data lane ctrl_error0 A" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_A        ,CIL data lane sot mb error0 A" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_A        ,CIL data lane sot sb error0 A" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_A       ,DPHY CIL clock lane control error A" "Not masked,Masked"
textline "                                      "
width 35.
tree.end
width 0x0B
width 28.
tree "NVCSI_STREAM_5"
group.long 0x30800++0x0B
line.long 0x00 "SW_RESET_CTRL_0,Software Enabled Synchronous"
bitfld.long 0x00 0. " CFG_SWRESET                             ,Config software reset" "Disabled,Enabled"
line.long 0x04 "SLCG_CTRL_0,Second Level Clock Gate Control"
bitfld.long 0x04 0. " CFG_SLCG_OVERRIDE                       ,Config SLCG override" "Disabled,Enabled"
line.long 0x08 "PP_EN_CTRL_0,PP Enable Control"
bitfld.long 0x08 0. " CDG_PP_EN                               ,Pixel parser streaming enable" "Disabled,Enabled"
group.long (0x30800+0xC)++0x17
line.long 0x00 "VC0_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x00 0.--5. " CFG_VC0_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC0_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x04 0.--5. " CFG_VC0_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC0_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x08 0.--5. " CFG_VC0_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC0_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x0C 0.--5. " CFG_VC0_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC0_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 0"
bitfld.long 0x10 0.--5. " CFG_VC0_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC0_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 0"
bitfld.long 0x14 31. " CFG_VC0_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC0_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x24)++0x17
line.long 0x00 "VC1_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x00 0.--5. " CFG_VC1_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC1_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x04 0.--5. " CFG_VC1_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC1_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x08 0.--5. " CFG_VC1_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC1_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x0C 0.--5. " CFG_VC1_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC1_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 1"
bitfld.long 0x10 0.--5. " CFG_VC1_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC1_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 1"
bitfld.long 0x14 31. " CFG_VC1_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC1_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x3C)++0x17
line.long 0x00 "VC2_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x00 0.--5. " CFG_VC2_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC2_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x04 0.--5. " CFG_VC2_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC2_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x08 0.--5. " CFG_VC2_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC2_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x0C 0.--5. " CFG_VC2_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC2_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 2"
bitfld.long 0x10 0.--5. " CFG_VC2_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC2_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 2"
bitfld.long 0x14 31. " CFG_VC2_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC2_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x54)++0x17
line.long 0x00 "VC3_DT_NOOVERRIDE_CTRL_0_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x00 0.--5. " CFG_VC3_DT_NOOVERRIDE_0                 ,CFG_VC0_DT_NOOVERRIDE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VC3_DT_NOOVERRIDE_CTRL_1_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x04 0.--5. " CFG_VC3_DT_NOOVERRIDE_1                 ,CFG_VC0_DT_NOOVERRIDE_1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VC3_DT_NOOVERRIDE_CTRL_2_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x08 0.--5. " CFG_VC3_DT_NOOVERRIDE_2                 ,CFG_VC0_DT_NOOVERRIDE_2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "VC3_DT_NOOVERRIDE_CTRL_3_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x0C 0.--5. " CFG_VC3_DT_NOOVERRIDE_3                 ,CFG_VC0_DT_NOOVERRIDE_3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "VC3_DT_NOOVERRIDE_CTRL_4_0,DTYPE No-Override In Virtual Channel 3"
bitfld.long 0x10 0.--5. " CFG_VC3_DT_NOOVERRIDE_4                 ,CFG_VC0_DT_NOOVERRIDE_4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "VC3_DT_OVERRIDE_0,DTYPE Override For Image Frame In Virtual Channel 3"
bitfld.long 0x14 31. " CFG_VC3_DT_OVERRIDE_EN                  ,Override enable for image DT" "Disabled,Enabled"
bitfld.long 0x14 0.--5. "                  CFG_VC3_DT_OVERRIDE                ,Color parser to arrange the pixels to VI/DT from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x6C)++0x17
line.long 0x00 "PPFSM_TIMEOUT_CTRL_0,PPFSM Timeout Controls"
bitfld.long 0x00 31. " CFG_TIMEOUT_EN                          ,Timeout enable" "Disabled,Enabled"
hexmask.long 0x00 0.--30. 1. "                  CFG_TIMEOUT_PERIOD                 ,Timeout period"
line.long 0x04 "PH_CHK_CTRL_0,Packet Header Checks"
bitfld.long 0x04 1. " CFG_PH_CRC_CHK_EN                       ,PH CRC check enable (only for C-PHY case)" "Disabled,Enabled"
bitfld.long 0x04 0. "                  CFG_PH_ECC_CHK_EN                  ,PH ECC check enable (only for D-PHY case)" "Disabled,Enabled"
line.long 0x08 "VC0_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 0"
bitfld.long 0x08 0.--3. " CFG_VC0_DPCM_COMPRESSION_RATIO          ,CFG_VC0_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x0C "VC1_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 1"
bitfld.long 0x0C 0.--3. " CFG_VC1_DPCM_COMPRESSION_RATIO          ,CFG_VC1_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x10 "VC2_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 2"
bitfld.long 0x10 0.--3. " CFG_VC2_DPCM_COMPRESSION_RATIO          ,CFG_VC2_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
line.long 0x14 "VC3_DPCM_CTRL_0,Configuration For Compressed DTYPEs In Virtual Channel 3"
bitfld.long 0x14 0.--3. " CFG_VC3_DPCM_COMPRESSION_RATIO          ,CFG_VC3_DPCM_COMPRESSION_RATIO" "Bypass,Dpcm10_8_10,Dpcm10_7_10,Dpcm10_6_10,Dpcm12_8_12,Dpcm12_7_12,Dpcm12_6_12,Dpcm14_10_14,Dpcm14_8_14,?..."
rgroup.long (0x30800+0x84)++0x0B
line.long 0x00 "PF_CRC_0,Status Register On Packet Data CRC"
hexmask.long.word 0x00 16.--31. 1. " CALC_CRC                                ,16 bit CRC computed overcurrent packet"
hexmask.long.word 0x00 0.--15. 1. "                      RX_CRC                             ,16 bit CRC from PF"
line.long 0x04 "PH_WC_0,Status Register On WC"
hexmask.long.word 0x04 16.--31. 1. " CALC_WC                                 ,16 bit WC computed overcurrent packet"
hexmask.long.word 0x04 0.--15. 1. "                      RX_WC                              ,16 bit WC from PH"
line.long 0x08 "PH_DI_0,Status Register On Data ID"
bitfld.long 0x08 6.--7. " RX_VC                                   ,2 bit VC from PH" "0,1,2,3"
bitfld.long 0x08 0.--5. "                         RX_DT                              ,6 bit DTYPE from PH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x90)++0x03
line.long 0x00 "ERROR_STATUS2VI_MASK_0,Error Status 2VI Mask"
bitfld.long 0x00 24. " CFG_ERR_STATUS2VI_MASK_VC3              ,For VC3 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 16. "                  CFG_ERR_STATUS2VI_MASK_VC2         ,For VC2 error/no error will be sent to VI at EOF" "Error,No error"
textline "                                     "
bitfld.long 0x00 8. " CFG_ERR_STATUS2VI_MASK_VC1              ,For VC1 error/no error will be sent to VI at EOF" "Error,No error"
bitfld.long 0x00 0. "                  CFG_ERR_STATUS2VI_MASK_VC0         ,For VC0 error/no error will be sent to VI at EOF" "Error,No error"
rgroup.long (0x30800+0x94)++0x0F
line.long 0x00 "ERROR_STATUS2VI_VC0_0,Error Status Sent To VI"
bitfld.long 0x00 0.--3. " ERR_STATUS2VI_VC0                       ,ERR_STATUS2VI_VC0" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x04 "ERROR_STATUS2VI_VC1_0,Error Status Sent To VI"
bitfld.long 0x04 0.--3. " ERR_STATUS2VI_VC1                       ,ERR_STATUS2VI_VC1" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x08 "ERROR_STATUS2VI_VC2_0,Error Status Sent To VI"
bitfld.long 0x08 0.--3. " ERR_STATUS2VI_VC2                       ,ERR_STATUS2VI_VC2" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
line.long 0x0C "ERROR_STATUS2VI_VC3_0,Error Status Sent To VI"
bitfld.long 0x0C 0.--3. " ERR_STATUS2VI_VC3                       ,ERR_STATUS2VI_VC3" "PP FSM timeout,PH ECC single bit,Packet payload CRC,Packet payload < WC in PH,?..."
textline "                                     "
group.long (0x30800+0xA4)++0x03
line.long 0x00 "INTR_STATUS_0,Interrupt Status"
bitfld.long 0x00 17. " INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x30800+0xA8)++0x03
line.long 0x00 "INTR_MASK_0,Interrupt Mask"
bitfld.long 0x00 17. " INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x30800+0xAC)++0x03
line.long 0x00 "ERR_INTR_STATUS_0,Error Interrupt Status"
bitfld.long 0x00 18. " ERR_INTR_STAT_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_STAT_PH_CRC_ERR                    ,PH CRC error" "No interrupt,Interrupt"
bitfld.long 0x00 16. "              ERR_INTR_STAT_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 14. "              ERR_INTR_STAT_PD_CRC_ERR_VC3           ,PD CRC error vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "No interrupt,Interrupt"
bitfld.long 0x00 12. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 10. "              ERR_INTR_STAT_PD_CRC_ERR_VC2           ,PD CRC error vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "No interrupt,Interrupt"
bitfld.long 0x00 8. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 6. "              ERR_INTR_STAT_PD_CRC_ERR_VC1           ,PD CRC error vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "No interrupt,Interrupt"
bitfld.long 0x00 4. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_STAT_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 2. "              ERR_INTR_STAT_PD_CRC_ERR_VC0           ,PD CRC error vc0" "No interrupt,Interrupt"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_STAT_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "No interrupt,Interrupt"
bitfld.long 0x00 0. "              ERR_INTR_STAT_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "No interrupt,Interrupt"
textline "                                     "
group.long (0x30800+0xB0)++0x03
line.long 0x00 "ERR_INTR_MASK_0,Error Interrupt Mask"
bitfld.long 0x00 18. " ERR_INTR_MASK_HSM_INTR_SW_TRIGGER           ,HSM interrupt software trigger" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 17. " ERR_INTR_MASK_PH_CRC_ERR                    ,PH CRC error" "Not masked,Masked"
bitfld.long 0x00 16. "              ERR_INTR_MASK_PH_ECC_MULTI_BIT_ERR     ,PH ECC multi bit error" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 15. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC3           ,PD WC short error vc3" "Not masked,Masked"
bitfld.long 0x00 14. "              ERR_INTR_MASK_PD_CRC_ERR_VC3           ,PD CRC error vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 13. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC3     ,PH ECC single bit error vc3" "Not masked,Masked"
bitfld.long 0x00 12. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC3        ,PPFSM timeout vc3" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 11. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC2           ,PD WC short error vc2" "Not masked,Masked"
bitfld.long 0x00 10. "              ERR_INTR_MASK_PD_CRC_ERR_VC2           ,PD CRC error vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 9. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC2     ,PH ECC single bit error vc2" "Not masked,Masked"
bitfld.long 0x00 8. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC2        ,PPFSM timeout vc2" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 7. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC1           ,PD WC short error vc1" "Not masked,Masked"
bitfld.long 0x00 6. "              ERR_INTR_MASK_PD_CRC_ERR_VC1           ,PD CRC error vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 5. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC1     ,PH ECC single bit error vc1" "Not masked,Masked"
bitfld.long 0x00 4. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC1        ,PPFSM timeout vc1" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 3. " ERR_INTR_MASK_PD_WC_SHORT_ERR_VC0           ,PD WC short error vc0" "Not masked,Masked"
bitfld.long 0x00 2. "              ERR_INTR_MASK_PD_CRC_ERR_VC0           ,PD CRC error vc0" "Not masked,Masked"
textline "                                     "
bitfld.long 0x00 1. " ERR_INTR_MASK_PH_ECC_SINGLE_BIT_ERR_VC0     ,PH ECC single bit error vc0" "Not masked,Masked"
bitfld.long 0x00 0. "              ERR_INTR_MASK_PPFSM_TIMEOUT_VC0        ,PPFSM timeout vc0" "Not masked,Masked"
textline "                                     "
group.long (0x30800+0xB4)++0x0B
line.long 0x00 "ERR_INTR_SW_TRIG_0,Software Trigger For HSM Interrupt To Enable Connectivity Check During Boot"
bitfld.long 0x00 0. " CFG_HSM_INTR_SW_TRIGGER                 ,HSM interrupt software trigger" "No interrupt,Interrupt"
line.long 0x04 "TPG_EN_0,TPG Enable Bit"
bitfld.long 0x04 0. " CFG_TPG                                 ,Config TPG" "Disabled,Enabled"
line.long 0x08 "TPG_CTRL_0,TPG Control Register"
bitfld.long 0x08 25. " CFG_EOF_VC3                             ,Enable for VC3 EOF" "Disabled,Enabled"
bitfld.long 0x08 24. "                  CFG_SOF_VC3                        ,Enable for VC3 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 17. " CFG_EOF_VC2                             ,Enable for VC2 EOF" "Disabled,Enabled"
bitfld.long 0x08 16. "                  CFG_SOF_VC2                        ,Enable for VC2 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 9. " CFG_EOF_VC1                             ,Enable for VC1 EOF" "Disabled,Enabled"
bitfld.long 0x08 8. "                  CFG_SOF_VC1                        ,Enable for VC1 SOF" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 1. " CFG_EOF_VC0                             ,Enable for VC0 EOF" "Disabled,Enabled"
bitfld.long 0x08 0. "                  CFG_SOF_VC0                        ,Enable for VC0 SOF" "Disabled,Enabled"
group.long (0x30800+0xC0)++0x03
line.long 0x00 "TPG_BLANK_VC0_0,TPG Blanking VC0 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC0                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC0                     ,Number of core clocks for HBlank"
group.long (0x30800+0xC4)++0x03
line.long 0x00 "TPG_BLANK_VC1_0,TPG Blanking VC1 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC1                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC1                     ,Number of core clocks for HBlank"
group.long (0x30800+0xC8)++0x03
line.long 0x00 "TPG_BLANK_VC2_0,TPG Blanking VC2 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC2                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC2                     ,Number of core clocks for HBlank"
group.long (0x30800+0xCC)++0x03
line.long 0x00 "TPG_BLANK_VC3_0,TPG Blanking VC3 Period Control"
hexmask.long.word 0x00 16.--31. 1. " CFG_VBLANK_VC3                          ,Number of core clocks for VBlank"
hexmask.long.word 0x00 0.--15. 1. "                      CFG_HBLANK_VC3                     ,Number of core clocks for HBlank"
group.long (0x30800+0xD0)++0x03
line.long 0x00 "TPG_YSIZE_VC0_0,TPG YSIZE VC0"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC0                           ,Number of lines in a frame"
group.long (0x30800+0xD4)++0x03
line.long 0x00 "TPG_YSIZE_VC1_0,TPG YSIZE VC1"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC1                           ,Number of lines in a frame"
group.long (0x30800+0xD8)++0x03
line.long 0x00 "TPG_YSIZE_VC2_0,TPG YSIZE VC2"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC2                           ,Number of lines in a frame"
group.long (0x30800+0xDC)++0x03
line.long 0x00 "TPG_YSIZE_VC3_0,TPG YSIZE VC3"
hexmask.long.word 0x00 0.--15. 1. " CFG_YSIZE_VC3                           ,Number of lines in a frame"
group.long (0x30800+0xE0)++0x03
line.long 0x00 "TPG_FRAMEN_VC0_0,TPG FRAMEN VC0"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC0_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC0               ,Frame number send as part of SOF and EOF"
group.long (0x30800+0xE4)++0x03
line.long 0x00 "TPG_FRAMEN_VC1_0,TPG FRAMEN VC1"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC1_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC1               ,Frame number send as part of SOF and EOF"
group.long (0x30800+0xE8)++0x03
line.long 0x00 "TPG_FRAMEN_VC2_0,TPG FRAMEN VC2"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC2_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC2               ,Frame number send as part of SOF and EOF"
group.long (0x30800+0xEC)++0x03
line.long 0x00 "TPG_FRAMEN_VC3_0,TPG FRAMEN VC3"
bitfld.long 0x00 31. " CFG_FRAME_NUMBER_VC3_EN                 ,Frame counter enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "                  CFG_FRAME_NUMBER_VC3               ,Frame number send as part of SOF and EOF"
group.long (0x30800+0xF0)++0x03
line.long 0x00 "TPG_SOL_VC0_0,TPG SOL VC0"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC0                         ,Cfg even pc vc0"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC0                     ,Cfg odd pc vc0"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC0                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0xF4)++0x03
line.long 0x00 "TPG_SOL_VC1_0,TPG SOL VC1"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC1                         ,Cfg even pc vc1"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC1                     ,Cfg odd pc vc1"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC1                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0xF8)++0x03
line.long 0x00 "TPG_SOL_VC2_0,TPG SOL VC2"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC2                         ,Cfg even pc vc2"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC2                     ,Cfg odd pc vc2"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC2                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0xFC)++0x03
line.long 0x00 "TPG_SOL_VC3_0,TPG SOL VC3"
hexmask.long.word 0x00 19.--31. 1. " CFG_EVEN_PC_VC3                         ,Cfg even pc vc3"
hexmask.long.word 0x00 6.--18. 1. "                      CFG_ODD_PC_VC3                     ,Cfg odd pc vc3"
textline "                                     "
bitfld.long 0x00 0.--5. " CFG_DT_VC3                              ,Dtype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x30800+0x100)++0x03
line.long 0x00 "TPG_PIXEN_VC0_0,TPG PIXEN VC0"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC0               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC0           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC0                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC0               ,Pixel enable for odd lines"
group.long (0x30800+0x104)++0x03
line.long 0x00 "TPG_PIXEN_VC1_0,TPG PIXEN VC1"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC1               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC1           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC1                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC1               ,Pixel enable for odd lines"
group.long (0x30800+0x108)++0x03
line.long 0x00 "TPG_PIXEN_VC2_0,TPG PIXEN VC2"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC2               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC2           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC2                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC2               ,Pixel enable for odd lines"
group.long (0x30800+0x10C)++0x03
line.long 0x00 "TPG_PIXEN_VC3_0,TPG PIXEN VC3"
hexmask.long.byte 0x00 24.--31. 1. " CFG_EVEN_EOL_PIXEL_EN_VC3               ,Pixel enable at EOL even lines"
hexmask.long.byte 0x00 16.--23. 1. "                        CFG_ODD_EOL_PIXEL_EN_VC3           ,Pixel enable at EOL odd lines"
textline "                                     "
hexmask.long.byte 0x00 8.--15. 1. " CFG_EVEN_PIXEL_EN_VC3                   ,Pixel enable for even lines"
hexmask.long.byte 0x00 0.--7. 1. "                        CFG_ODD_PIXEL_EN_VC3               ,Pixel enable for odd lines"
group.long (0x30800+0x110)++0x1F
line.long 0x00 "TPG_PIX1_VC0_0,TPG Pixel 1 VC0"
line.long 0x04 "TPG_PIX2_VC0_0,TPG Pixel 2 VC0"
line.long 0x08 "TPG_PIX3_VC0_0,TPG Pixel 3 VC0"
line.long 0x0C "TPG_PIX4_VC0_0,TPG Pixel 4 VC0"
line.long 0x10 "TPG_PIX5_VC0_0,TPG Pixel 5 VC0"
line.long 0x14 "TPG_PIX6_VC0_0,TPG Pixel 6 VC0"
line.long 0x18 "TPG_PIX7_VC0_0,TPG Pixel 7 VC0"
line.long 0x1C "TPG_PIX8_VC0_0,TPG Pixel 8 VC0"
group.long (0x30800+0x130)++0x1F
line.long 0x00 "TPG_PIX1_VC1_0,TPG Pixel 1 VC1"
line.long 0x04 "TPG_PIX2_VC1_0,TPG Pixel 2 VC1"
line.long 0x08 "TPG_PIX3_VC1_0,TPG Pixel 3 VC1"
line.long 0x0C "TPG_PIX4_VC1_0,TPG Pixel 4 VC1"
line.long 0x10 "TPG_PIX5_VC1_0,TPG Pixel 5 VC1"
line.long 0x14 "TPG_PIX6_VC1_0,TPG Pixel 6 VC1"
line.long 0x18 "TPG_PIX7_VC1_0,TPG Pixel 7 VC1"
line.long 0x1C "TPG_PIX8_VC1_0,TPG Pixel 8 VC1"
group.long (0x30800+0x150)++0x1F
line.long 0x00 "TPG_PIX1_VC2_0,TPG Pixel 1 VC2"
line.long 0x04 "TPG_PIX2_VC2_0,TPG Pixel 2 VC2"
line.long 0x08 "TPG_PIX3_VC2_0,TPG Pixel 3 VC2"
line.long 0x0C "TPG_PIX4_VC2_0,TPG Pixel 4 VC2"
line.long 0x10 "TPG_PIX5_VC2_0,TPG Pixel 5 VC2"
line.long 0x14 "TPG_PIX6_VC2_0,TPG Pixel 6 VC2"
line.long 0x18 "TPG_PIX7_VC2_0,TPG Pixel 7 VC2"
line.long 0x1C "TPG_PIX8_VC2_0,TPG Pixel 8 VC2"
group.long (0x30800+0x170)++0x1F
line.long 0x00 "TPG_PIX1_VC3_0,TPG Pixel 1 VC3"
line.long 0x04 "TPG_PIX2_VC3_0,TPG Pixel 2 VC3"
line.long 0x08 "TPG_PIX3_VC3_0,TPG Pixel 3 VC3"
line.long 0x0C "TPG_PIX4_VC3_0,TPG Pixel 4 VC3"
line.long 0x10 "TPG_PIX5_VC3_0,TPG Pixel 5 VC3"
line.long 0x14 "TPG_PIX6_VC3_0,TPG Pixel 6 VC3"
line.long 0x18 "TPG_PIX7_VC3_0,TPG Pixel 7 VC3"
line.long 0x1C "TPG_PIX8_VC3_0,TPG Pixel 8 VC3"
group.long (0x30800+0x194)++0x33
line.long 0x00 "PG_CTRL_0,Pattern Generator Control"
bitfld.long 0x00 2.--3. " PG_MODE                                 ,Mode for Sensor" "Direct,Patch,?..."
bitfld.long 0x00 1. "                    PG_AUTO_INC                        ,Automatic phase increment mode" "Disabled,Enabled"
bitfld.long 0x00 0. "      PG_ENABLE ,Enable pattern generator" "Disabled,Enabled"
line.long 0x04 "PG_BLANK_0,Pattern Generator Blank"
hexmask.long.word 0x04 16.--31. 1. " PG_VBLANK                               ,Vertical blanking for PG"
hexmask.long.word 0x04 0.--15. 1. "                      PG_HBLANK                          ,Horizontal blanking for PG"
line.long 0x08 "PG_PHASE_0,Pattern Generator Phase"
hexmask.long.word 0x08 0.--13. 1. " PG_PHASE                                ,Initial phase"
line.long 0x0C "PG_RED_FREQ_0,Pattern Generator Red Frequency"
hexmask.long.word 0x0C 16.--29. 1. " PG_RED_VERT_INIT_FREQ                   ,Initial vertical frequency"
hexmask.long.word 0x0C 0.--13. 1. "                      PG_RED_HOR_INIT_FREQ               ,Initial horizontal frequency"
line.long 0x10 "PG_RED_FREQ_RATE_0,Pattern Generator Red Frequency Rate"
hexmask.long.byte 0x10 8.--15. 1. " PG_RED_VERT_FREQ_RATE                   ,Rate of change of vertical frequency"
hexmask.long.byte 0x10 0.--7. 1. "                        PG_RED_HOR_FREQ_RATE               ,Rate of change of horizontal frequency"
line.long 0x14 "PG_GREEN_FREQ_0,Pattern Generator Green Frequency"
hexmask.long.word 0x14 16.--29. 1. " PG_GREEN_VERT_INIT_FREQ                 ,Initial vertical frequency"
hexmask.long.word 0x14 0.--13. 1. "                      PG_GREEN_HOR_INIT_FREQ             ,Initial horizontal frequency"
line.long 0x18 "PG_GREEN_FREQ_RATE_0,Pattern Generator Green Frequency Rate"
hexmask.long.byte 0x18 8.--15. 1. " PG_GREEN_VERT_FREQ_RATE                 ,Rate of change of vertical frequency"
hexmask.long.byte 0x18 0.--7. 1. "                        PG_GREEN_HOR_FREQ_RATE             ,Rate of change of horizontal frequency"
line.long 0x1C "PG_BLUE_FREQ_0,Pattern Generator Blue Frequency"
hexmask.long.word 0x1C 16.--29. 1. " PG_BLUE_VERT_INIT_FREQ                  ,Initial vertical frequency"
hexmask.long.word 0x1C 0.--13. 1. "                      PG_BLUE_HOR_INIT_FREQ              ,Initial horizontal frequency"
line.long 0x20 "PG_BLUE_FREQ_RATE_0,Pattern Generator Blue Frequency Rate"
hexmask.long.byte 0x20 8.--15. 1. " PG_BLUE_VERT_FREQ_RATE                  ,Rate of change of vertical frequency"
hexmask.long.byte 0x20 0.--7. 1. "                        PG_BLUE_HOR_FREQ_RATE              ,Rate of change of horizontal frequency"
line.long 0x24 "PG_AOHDR_0,Pattern Generator AOHDR"
bitfld.long 0x24 1.--2. " PG_AOHDR_GAIN_RATIO                     ,Gain ratio for channel balancing" "2:1,4:1,0.5:1,0.25:1"
bitfld.long 0x24 0. "                    PG_AOHDR_ENABLE                    ,AOHDR enable" "Disabled,Enabled"
line.long 0x28 "PG_IMAGE_SIZE_0,Pattern Generator Image Size"
hexmask.long.word 0x28 16.--31. 1. " HEIGHT                                  ,Height"
hexmask.long.word 0x28 0.--15. 1. "                      WORDCOUNT                          ,Word count in Test Pattern Generation mode"
line.long 0x2C "PG_IMAGE_DT_0,Pattern Generator Image Data Type"
bitfld.long 0x2C 0.--5. " DATA_TYPE                               ,Data type" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,RGB888,,,,,,,RAW10,?..."
tree.end
width 0x0B
width 29.
tree "NVCSI_PHY_2_B"
group.long ((0x30800+0x400)+0x0)++0x03
line.long 0x00 "CILB_INTR_STATUS_CILB_0,Interrupt Status"
bitfld.long 0x00 27. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x30800+0x400)+0x4)++0x03
line.long 0x00 "CILB_INTR_MASK_CILB_0,Interrupt Mask"
bitfld.long 0x00 27. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
group.long ((0x30800+0x400)+0x8)++0x03
line.long 0x00 "CILB_ERR_INTR_STATUS_CILB_0,Error Interrupt Status"
bitfld.long 0x00 27. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "No interrupt,Interrupt"
bitfld.long 0x00 26. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "No interrupt,Interrupt"
bitfld.long 0x00 24. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "No interrupt,Interrupt"
bitfld.long 0x00 22. "  ERR_INTR_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "No interrupt,Interrupt"
bitfld.long 0x00 20. "  ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 18. "  ERR_INTR_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "No interrupt,Interrupt"
bitfld.long 0x00 16. "  ERR_INTR_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 14. "  ERR_INTR_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "No interrupt,Interrupt"
bitfld.long 0x00 12. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  ERR_INTR_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "No interrupt,Interrupt"
bitfld.long 0x00 8. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  ERR_INTR_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 2. "  ERR_INTR_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "No interrupt,Interrupt"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "No interrupt,Interrupt"
bitfld.long 0x00 0. "  ERR_INTR_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "No interrupt,Interrupt"
textline "                                      "
group.long ((0x30800+0x400)+0xC)++0x03
line.long 0x00 "CILB_ERR_INTR_MASK_CILB_0,Error Interrupt Mask"
bitfld.long 0x00 27. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_CTRL_B   ,DPHY CIL deskew calib error control B" "Not masked,Masked"
bitfld.long 0x00 26. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE1_B  ,DPHY CIL deskew calib error lane1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 25. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_ERR_LANE0_B  ,DPHY CIL deskew calib error lane0 B" "Not masked,Masked"
bitfld.long 0x00 24. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_CTRL_B  ,DPHY CIL deskew calib done control B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 23. " ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE1_B ,DPHY CIL deskew calib done lane1 B" "Not masked,Masked"
bitfld.long 0x00 22. "  ERR_INTR_MASK_DPHY_CIL_DESKEW_CALIB_DONE_LANE0_B ,DPHY CIL deskew calib done lane0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 21. " ERR_INTR_MASK_DPHY_CIL_CLK_LANE_ULPM_REQ_B       ,DPHY CIL clock lane ulpm request B" "Not masked,Masked"
bitfld.long 0x00 20. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR1_B ,CIL data lane esc mode sync error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 19. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_MODE_SYNC_ERR0_B ,CIL data lane esc mode sync error0 B" "Not masked,Masked"
bitfld.long 0x00 18. "  ERR_INTR_MASK_CIL_LPDT_INT1_B                    ,CIL lpdt int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 17. " ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT1_B            ,CIL ulps trigger int1 B" "Not masked,Masked"
bitfld.long 0x00 16. "  ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT1_B       ,CIL remote reset trigger int1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 15. " ERR_INTR_MASK_CIL_LPDT_INT0_B                    ,CIL lpdt int0 B" "Not masked,Masked"
bitfld.long 0x00 14. "  ERR_INTR_MASK_CIL_ULPS_TRIGGER_INT0_B            ,CIL ulps trigger int0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 13. " ERR_INTR_MASK_CIL_REMOTERST_TRIGGER_INT0_B       ,CIL remote reset trigger int0 B" "Not masked,Masked"
bitfld.long 0x00 12. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC1_B      ,CIL data lane esc data rec1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 11. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC1_B       ,CIL data lane esc cmd rec1 B" "Not masked,Masked"
bitfld.long 0x00 10. "  ERR_INTR_MASK_CIL_DATA_LANE_ESC_DATA_REC0_B      ,CIL data lane esc data rec0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 9. " ERR_INTR_MASK_CIL_DATA_LANE_ESC_CMD_REC0_B       ,CIL data lane esc cmd rec0 B" "Not masked,Masked"
bitfld.long 0x00 8. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR1_B   ,CIL data lane RX FIFO full_error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 7. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR1_B          ,CIL data lane control error1 B" "Not masked,Masked"
bitfld.long 0x00 6. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR1_B        ,CIL data lane sot mb error1 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 5. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR1_B        ,CIL data lane sot sb error1 B" "Not masked,Masked"
bitfld.long 0x00 4. "  ERR_INTR_MASK_CIL_DATA_LANE_RXFIFO_FULL_ERR0_B   ,CIL data lane RX FIFO full error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 3. " ERR_INTR_MASK_CIL_DATA_LANE_CTRL_ERR0_B          ,CIL data lane ctrl_error0 B" "Not masked,Masked"
bitfld.long 0x00 2. "  ERR_INTR_MASK_CIL_DATA_LANE_SOT_MB_ERR0_B        ,CIL data lane sot mb error0 B" "Not masked,Masked"
textline "                                      "
bitfld.long 0x00 1. " ERR_INTR_MASK_CIL_DATA_LANE_SOT_SB_ERR0_B        ,CIL data lane sot sb error0 B" "Not masked,Masked"
bitfld.long 0x00 0. "  ERR_INTR_MASK_DPHY_CIL_CLK_LANE_CTRL_ERR_B       ,DPHY CIL clock lane control error B" "Not masked,Masked"
textline "                                      "
width 35.
group.long ((0x30800+0x400)+0x7400)++0x03
line.long 0x00 "NVCSI_CIL_PHY_CTRL_0,NVCSI CIL PHY Control"
bitfld.long 0x00 0. " CFG_PHY_MODE           ,Config PHY mode" "D-PHY,C-PHY"
if (((per.l(ad:0x150C0000+(0x30800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x30800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,3 lanes,4 lanes (CLKA),4 lanes (CLKB),?..."
else
group.long ((0x30800+0x400)+0x7404)++0x03
line.long 0x00 "NVCSI_CIL_CONFIG_0,NVCSI CIL Config"
bitfld.long 0x00 8.--10. " DATA_LANE_B            ,Data lane B" "0 lanes,1 lanes,2 lanes,?..."
textline "                                            "
bitfld.long 0x00 0.--2. " DATA_LANE_A            ,Data lane A" "0 lanes,1 lanes,2 lanes,,4 lanes (CLKA),4 lanes (CLKB),?..."
endif
group.long ((0x30800+0x400)+0x7408)++0x0B
line.long 0x00 "NVCSI_CIL_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL Clock Enable Override Control"
bitfld.long 0x00 0. " CLKEN_OVERRIDE         ,Clock enable override for CIL" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_PAD_CONFIG_0,NVCSI CIL PAD Config"
bitfld.long 0x04 12.--15. " LOADADJ                ,Load adjustment value to be connected to pad not used for CSI functional mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x04 9. " PDVCLAMP               ,Power down regular which supplies current to de-serializer logic" "No,Yes"
textline "                                            "
bitfld.long 0x04 8. " E_VCLAMP_SHORT         ,Enables short VCLAMP regulator to VDDP" "Disabled,Enabled"
textline "                                            "
hexmask.long.byte 0x04 0.--7. 1. " SPARE_TOP              ,Spare register bits for top level control"
line.long 0x08 "NVCSI_CIL_LANE_SWIZZLE_CTRL_0,NVCSI CIL Lane Swizzle Control"
bitfld.long 0x08 0.--4. " LANE_SWIZZLE_CTRL      ,Polarity swizzle control for bricks" "A0 A1 B0 B1 --> A0 A1 B0 B1,A0 A1 B0 B1 --> A0 A1 B1 B0,A0 A1 B0 B1 --> A0 B0 B1 A1,A0 A1 B0 B1 --> A0 B0 A1 B1,A0 A1 B0 B1 --> A0 B1 A1 B0,A0 A1 B0 B1 --> A0 B1 B0 A1,A0 A1 B0 B1 --> A1 A0 B0 B1,A0 A1 B0 B1 --> A1 A0 B1 B0,A0 A1 B0 B1 --> A1 B0 B1 A0,A0 A1 B0 B1 --> A1 B0 A0 B1,A0 A1 B0 B1 --> A1 B1 A0 B0,A0 A1 B0 B1 --> A1 B1 B0 A0,A0 A1 B0 B1 --> B0 A1 A0 B1,A0 A1 B0 B1 --> B0 A1 B1 A0,A0 A1 B0 B1 --> B0 A0 B1 A1,A0 A1 B0 B1 --> B0 A0 A1 B1,A0 A1 B0 B1 --> B0 B1 A1 A0,A0 A1 B0 B1 --> B0 B1 A0 A1,A0 A1 B0 B1 --> B1 A1 B0 A0,A0 A1 B0 B1 --> B1 A1 A0 B0,A0 A1 B0 B1 --> B1 B0 A0 A1,A0 A1 B0 B1 --> B1 B0 A1 A0,A0 A1 B0 B1 --> B1 A0 A1 B0,A0 A1 B0 B1 --> B1 A0 B0 A1,?..."
rgroup.long ((0x30800+0x400)+0x7414)++0x03
line.long 0x00 "NVCSI_CIL_BK_MODE_STATUS_0,NVCSI CIL Brick Mode Status"
bitfld.long 0x00 0.--1. " BK_MODE                ,Brick mode" "Two independent 2x bricks,One 4x brick (CLKA),One 4x brick (CLKB),?..."
textline "                                            "
group.long ((0x30800+0x400)+0x7418)++0x07
line.long 0x00 "NVCSI_CIL_A_SW_RESET_0,NVCSI CIL A Software Reset"
bitfld.long 0x00 1. " SW_RESET1_A                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_A                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL A Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_A           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_A           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x30800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x30800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 19. "                                                                        BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 17. "                                                                        PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
else
group.long ((0x30800+0x400)+0x7420)++0x03
line.long 0x00 "NVCSI_CIL_A_PAD_CONFIG_0,NVCSI CIL A PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_A            ,Enable LP receiver of partition A lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_A            ,Enable LP receiver of partition A lane 0" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_A            ,Enable LP receiver of clock partition A" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_A                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                            "
bitfld.long 0x00 18. " PD_CLK_A                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_A                    ,Power down for trio 1 and lane 1 of partition A" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 16. " PD_IO0_A                    ,Power down for trio 0 and lane 0 of partition A" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
bitfld.long 0x00 4.--7. " SPARE_IO1_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_A                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                            "
endif
group.long ((0x30800+0x400)+0x7424)++0x0F
line.long 0x00 "NVCSI_CIL_A_DPHY_INADJ_CTRL_0,NVCSI CIL A DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_A     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_A            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 14. "    SW_SET_DPHY_INADJ_IO1_A     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_A            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x00 6. "    SW_SET_DPHY_INADJ_IO0_A     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_A            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_A_C-PHY_INADJ_CTRL_0,NVCSI CIL A C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_A    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 12.--13. "    C-PHY_INADJ_RXCA_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio1" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 8.--9. "    C-PHY_INADJ_RXAB_TRIO1_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXCA trio0" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 2.--3. "    C-PHY_INADJ_RXBC_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXBC trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_A    ,Individual fine tuning delay control on per trimmer in C-PHY mode tuning the RX path trimmer of RXAB trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_A_CLK_DESKEW_CTRL_0,NVCSI CIL A Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_A      ,Clock INADJ sweep control A" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_A      ,Clock INADJ limit high A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x08 0.--5. "    CLK_INADJ_LIMIT_LOW_A       ,Clock INADJ limit low A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_A_DATA_DESKEW_CTRL_0,NVCSI CIL A Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_A    ,Data INADJ sweep control 1 A" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_A    ,Data INADJ limit high 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
bitfld.long 0x0C 16.--21. "    DATA_INADJ_LIMIT_LOW1_A     ,Data INADJ limit low 1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_A    ,Data INADJ sweep control 0 A" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 8.--13. "    DATA_INADJ_LIMIT_HIGH0_A    ,Data INADJ limit high 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_A     ,Data INADJ limit low 0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
width 55.
rgroup.long ((0x30800+0x400)+0x7434)++0x23
line.long 0x00 "NVCSI_CIL_A_DPHY_DESKEW_STATUS_0,NVCSI CIL A DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_A        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_A       ,Calibration done status IO 1" "False,True"
textline "                                                                "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_A        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_A       ,Calibration done status IO 0" "False,True"
textline "                                                                "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_A       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_A      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL A DPHY DESKEW Clock CALIB Status High 1"
textline "                                                                "
width 40.
if (((per.l(ad:0x150C0000+(0x30800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x30800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_A    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                 "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_A    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
else
group.long ((0x30800+0x400)+0x7458)++0x03
line.long 0x00 "NVCSI_CIL_A_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL A Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_A    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                 "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_A    ,Polarity swizzle control for lane A0" "Low,High"
endif
group.long ((0x30800+0x400)+0x745C)++0x03
line.long 0x00 "NVCSI_CIL_A_CONTROL_0,NVCSI CIL A Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clock lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
textline "                                                 "
rgroup.long ((0x30800+0x400)+0x7460)++0x13
line.long 0x00 "NVCSI_CIL_A_C-PHY_ERR_STATUS_0,NVCSI CIL A C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_A    ,Lane demmaper error mux1 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_A ,Lane demmper error RX control1 A" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_A         ,Lane decoder error1 A"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_A    ,Lane demmper error mux0 A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_A ,Lane demmper error RX control0 A" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_A         ,Lane decoder error0 A"
line.long 0x04 "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL A Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_A      ,Escape mode command0 A"
line.long 0x08 "NVCSI_CIL_A_ESCAPE_MODE_DATA_0_0,NVCSI CIL A Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_A         ,Escape mode data0 A"
line.long 0x0C "NVCSI_CIL_A_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL A Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_A      ,Escape mode command1 A"
line.long 0x10 "NVCSI_CIL_A_ESCAPE_MODE_DATA_1_0,NVCSI CIL A Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_A         ,Escape mode data1 A"
group.long ((0x30800+0x400)+0x7474)++0x07
line.long 0x00 "NVCSI_CIL_A_DPHY_SYNC_PATTERN_0,NVCSI CIL A DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC A" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_A_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL A DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
group.long ((0x30800+0x400)+0x747C)++0x07
line.long 0x00 "NVCSI_CIL_B_SW_RESET_0,NVCSI CIL B Software Reset"
bitfld.long 0x00 1. " SW_RESET1_B                 ,Soft reset for lane A1" "Disabled,Enabled"
bitfld.long 0x00 0. "                                   SW_RESET0_B                 ,Soft reset for lane A0" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_CLKEN_OVERRIDE_CTRL_0,NVCSI CIL B Clock Enable Override Control"
bitfld.long 0x04 1. " CLKEN_OVERRIDE1_B           ,Clock enable override for lane A1" "Disabled,Enabled"
bitfld.long 0x04 0. "                                   CLKEN_OVERRIDE0_B           ,Clock enable override for lane A0" "Disabled,Enabled"
if (((per.l(ad:0x150C0000+(0x30800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x30800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 19. " BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 17. " PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long ((0x30800+0x400)+0x7484)++0x03
line.long 0x00 "NVCSI_CIL_B_PAD_CONFIG_0,NVCSI CIL B PAD Config"
bitfld.long 0x00 22. " E_INPUT_LP_IO1_B            ,Enable LP receiver of partition B lane 1" "Disabled,Enabled"
bitfld.long 0x00 21. "                                   E_INPUT_LP_IO0_B            ,Enable LP receiver of partition B lane 0" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 20. " E_INPUT_LP_CLK_B            ,Enable LP receiver of clock partition B" "Disabled,Enabled"
bitfld.long 0x00 19. "                                   BANDWD_IN_B                 ,Increase bandwidth of differential receiver" "0,1"
textline "                                                 "
bitfld.long 0x00 18. " PD_CLK_B                    ,Power down for CLK of partition A" "Disabled,Enabled"
bitfld.long 0x00 17. "                                   PD_IO1_B                    ,Power down for trio 1 and lane 1 of partition B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x00 16. " PD_IO0_B                    ,Power down for trio 0 and lane 0 of partition B" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "                                   SPARE_CLK_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 4.--7. " SPARE_IO1_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                                         SPARE_IO0_B                 ,Spare control bits for pad control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long ((0x30800+0x400)+0x7488)++0x0F
line.long 0x00 "NVCSI_CIL_B_DPHY_INADJ_CTRL_0,NVCSI CIL B DPHY INADJ Control"
bitfld.long 0x00 22. " SW_SET_DPHY_INADJ_CLK_B     ,Software set for clock input delay trimmer" "Not set,Set"
bitfld.long 0x00 16.--21. "                                    DPHY_INADJ_CLK_B            ,Programmable value for CLK input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 14. " SW_SET_DPHY_INADJ_IO1_B     ,Software override for bit 1 input delay trimmer1" "No override,Override"
bitfld.long 0x00 8.--13. "                                DPHY_INADJ_IO1_B            ,Programmable value for bit 1 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 6. " SW_SET_DPHY_INADJ_IO0_B     ,Software override for bit 0 input delay trimmer1" "No override,Override"
bitfld.long 0x00 0.--5. "                                DPHY_INADJ_IO0_B            ,Programmable value for bit 0 input delay trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "NVCSI_CIL_B_C-PHY_INADJ_CTRL_0,NVCSI CIL B C-PHY INADJ Control"
bitfld.long 0x04 20.--23. " C-PHY_EDGE_DELAY_TRIO1_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                         C-PHY_EDGE_DELAY_TRIO0_B    ,Adjust clock pulse width in clock recovery (edge detection) circuit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x04 12.--13. " C-PHY_INADJ_RXCA_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode,tuning the RX path trimmer of RXCA, trio1" "0,1,2,3"
bitfld.long 0x04 10.--11. "                                          C-PHY_INADJ_RXBC_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio1" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 8.--9. " C-PHY_INADJ_RXAB_TRIO1_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio1" "0,1,2,3"
bitfld.long 0x04 4.--5. "                                          C-PHY_INADJ_RXCA_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXCA, trio0" "0,1,2,3"
textline "                                                 "
bitfld.long 0x04 2.--3. " C-PHY_INADJ_RXBC_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXBC, trio0" "0,1,2,3"
bitfld.long 0x04 0.--1. "                                          C-PHY_INADJ_RXAB_TRIO0_B    ,Individual fine tuning delay control on per trimmer in C-PHY mode, tuning the RX path trimmer of RXAB, trio0" "0,1,2,3"
line.long 0x08 "NVCSI_CIL_B_CLK_DESKEW_CTRL_0,NVCSI CIL B Clock DESKEW Control"
bitfld.long 0x08 15. " CLK_INADJ_SWEEP_CTRL_B      ,Clock INADJ sweep control B" "Disabled,Enabled"
bitfld.long 0x08 8.--13. "                                   CLK_INADJ_LIMIT_HIGH_B      ,Clock INADJ limit high B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x08 0.--5. " CLK_INADJ_LIMIT_LOW_B       ,Clock INADJ limit low B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "NVCSI_CIL_B_DATA_DESKEW_CTRL_0,NVCSI CIL B Data DESKEW Control"
bitfld.long 0x0C 31. " DATA_INADJ_SWEEP_CTRL1_B    ,Data INADJ sweep control 1 B" "Disabled,Enabled"
bitfld.long 0x0C 23.--28. "                                   DATA_INADJ_LIMIT_HIGH1_B    ,Data INADJ limit high 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x0C 16.--21. " DATA_INADJ_LIMIT_LOW1_B     ,Data INADJ limit low 1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 15. "                                         DATA_INADJ_SWEEP_CTRL0_B    ,Data INADJ sweep control 0 B" "Disabled,Enabled"
textline "                                                 "
bitfld.long 0x0C 8.--13. " DATA_INADJ_LIMIT_HIGH0_B    ,Data INADJ limit high 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                                         DATA_INADJ_LIMIT_LOW0_B     ,Data INADJ limit low 0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
width 52.
rgroup.long ((0x30800+0x400)+0x7498)++0x23
line.long 0x00 "NVCSI_CIL_B_DPHY_DESKEW_STATUS_0,NVCSI CIL B DPHY DESKEW Status"
bitfld.long 0x00 15. " DPHY_CALIB_ERR_IO1_B        ,Calibration error status IO 1" "False,True"
bitfld.long 0x00 14. "      DPHY_CALIB_DONE_IO1_B       ,Calibration done status IO 1" "False,True"
textline "                                                             "
bitfld.long 0x00 7. " DPHY_CALIB_ERR_IO0_B        ,Calibration error status IO 0" "False,True"
bitfld.long 0x00 6. "      DPHY_CALIB_DONE_IO0_B       ,Calibration done status IO 0" "False,True"
textline "                                                             "
bitfld.long 0x00 1. " DPHY_CALIB_ERR_CTRL_B       ,Calibration done status control" "False,True"
bitfld.long 0x00 0. "      DPHY_CALIB_DONE_CTRL_B      ,Calibration done status control" "False,True"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 0"
line.long 0x08 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 0"
line.long 0x0C "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status Low 1"
line.long 0x10 "NVCSI_CIL_B_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Data CALIB Status High 1"
line.long 0x14 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 0"
line.long 0x18 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 0"
line.long 0x1C "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status Low 1"
line.long 0x20 "NVCSI_CIL_B_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_1_0,NVCSI CIL B DPHY DESKEW Clock CALIB Status High 1"
if (((per.l(ad:0x150C0000+(0x30800+0x400)+0x7400))&0x1)==0x1)
group.long ((0x30800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 11.--13. " POLARITY_SWIZZLE_CPHY1_B    ,Polarity swizzle control for lane A1 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
bitfld.long 0x00 8.--10. " POLARITY_SWIZZLE_CPHY0_B    ,Polarity swizzle control for lane A0 in C-PHY mode" "A B C --> A B C,A B C --> A C B,A B C --> B C A,A B C --> B A C,A B C --> C A B,A B C --> C B A,?..."
textline "                                                             "
else
group.long ((0x30800+0x400)+0x74BC)++0x03
line.long 0x00 "NVCSI_CIL_B_POLARITY_SWIZZLE_CTRL_0,NVCSI CIL B Polarity Swizzle Control"
bitfld.long 0x00 1. " POLARITY_SWIZZLE_DPHY1_B    ,Polarity swizzle control for lane A1" "Low,High"
textline "                                                             "
bitfld.long 0x00 0. " POLARITY_SWIZZLE_DPHY0_B    ,Polarity swizzle control for lane A0" "Low,High"
textline "                                                             "
endif
width 40.
group.long ((0x30800+0x400)+0x74C0)++0x03
line.long 0x00 "NVCSI_CIL_B_CONTROL_0,NVCSI CIL B Control"
bitfld.long 0x00 20.--23. " DESKEW_COMPARE              ,Register select to control the number of comparisons to be done" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 16.--19. " DESKEW_SETTLE               ,Register select to control the number of byte clocks to wait before INADJ value settles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                                 "
bitfld.long 0x00 8.--13. " CLK_SETTLE                  ,Settle time for clk lane when moving from LP to HS" "15 cilclk cycles (default internal delay),8 cilclk cycles,9 cilclk cycles,10 cilclk cycles,11 cilclk cycles,12 cilclk cycles,13 cilclk cycles,14 cilclk cycles,15 cilclk cycles,16 cilclk cycles,17 cilclk cycles,18 cilclk cycles,19 cilclk cycles,20 cilclk cycles,21 cilclk cycles,22 cilclk cycles,23 cilclk cycles,24 cilclk cycles,25 cilclk cycles,26 cilclk cycles,27 cilclk cycles,28 cilclk cycles,29 cilclk cycles,30 cilclk cycles,31 cilclk cycles,32 cilclk cycles,33 cilclk cycles,34 cilclk cycles,35 cilclk cycles,36 cilclk cycles,37 cilclk cycles,38 cilclk cycles,39 cilclk cycles,40 cilclk cycles,41 cilclk cycles,42 cilclk cycles,43 cilclk cycles,44 cilclk cycles,45 cilclk cycles,46 cilclk cycles,47 cilclk cycles,48 cilclk cycles,49 cilclk cycles,50 cilclk cycles,51 cilclk cycles,52 cilclk cycles,53 cilclk cycles,54 cilclk cycles,55 cilclk cycles,56 cilclk cycles,57 cilclk cycles,58 cilclk cycles,59 cilclk cycles,60 cilclk cycles,61 cilclk cycles,62 cilclk cycles,63 cilclk cycles,64 cilclk cycles,65 cilclk cycles,66 cilclk cycles,67 cilclk cycles,68 cilclk cycles,69 cilclk cycles,70 cilclk cycles"
textline "                                                 "
bitfld.long 0x00 7. " BYPASS_LP_SEQ               ,Allows the CLOCK CIL to overlook the LP control sequence" "Disabled,Enabled"
textline "                                                 "
hexmask.long.byte 0x00 0.--6. 1. " THS_SETTLE                  ,Settle time for data lane when moving from LP to HS"
rgroup.long ((0x30800+0x400)+0x74C4)++0x13
line.long 0x00 "NVCSI_CIL_B_C-PHY_ERR_STATUS_0,NVCSI CIL B C-PHY Error Status"
bitfld.long 0x00 24.--29. " LANE_DEMAPPER_ERR_MUX1_B    ,Lane demmaper error mux1 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 23. "                                         LANE_DEMAPPER_ERR_RXCTRL1_B ,Lane demmper error RX control1 B" "No error,Error"
textline "                                                 "
hexmask.long.byte 0x00 16.--22. 1. " LANE_DECODER_ERR1_B         ,Lane decoder error1 B"
bitfld.long 0x00 8.--13. "                                         LANE_DEMAPPER_ERR_MUX0_B    ,Lane demmper error mux0 B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                 "
bitfld.long 0x00 7. " LANE_DEMAPPER_ERR_RXCTRL0_B ,Lane demmper error RX control0 B" "No error,Error"
hexmask.long.byte 0x00 0.--6. 1. "                                   LANE_DECODER_ERR0_B         ,Lane decoder error0 B"
line.long 0x04 "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_0_0,NVCSI CIL B Escape Mode Command 0"
hexmask.long.byte 0x04 0.--7. 1. " ESCAPE_MODE_COMMAND0_B      ,Escape mode command0 B"
line.long 0x08 "NVCSI_CIL_B_ESCAPE_MODE_DATA_0_0,NVCSI CIL B Escape Mode Data 0"
hexmask.long.byte 0x08 0.--7. 1. " ESCAPE_MODE_DATA0_B         ,Escape mode data0 B"
line.long 0x0C "NVCSI_CIL_B_ESCAPE_MODE_COMMAND_1_0,NVCSI CIL B Escape Mode Command 1"
hexmask.long.byte 0x0C 0.--7. 1. " ESCAPE_MODE_COMMAND1_B      ,Escape mode command1 B"
line.long 0x10 "NVCSI_CIL_B_ESCAPE_MODE_DATA_1_0,NVCSI CIL B Escape Mode Data 1"
hexmask.long.byte 0x10 0.--7. 1. " ESCAPE_MODE_DATA1_B         ,Escape mode data1 B"
group.long ((0x30800+0x400)+0x74D8)++0x07
line.long 0x00 "NVCSI_CIL_B_DPHY_SYNC_PATTERN_0,NVCSI CIL B DPHY SYNC Pattern"
bitfld.long 0x00 8. " DISABLE_SB_ERR_IN_SYNC_A    ,Disable SB error in SYNC B" "No,Yes"
bitfld.long 0x00 0. "                                        COMPARE_SYNC_SIX_BITS       ,Compare SYNC six bits" "Disabled,Enabled"
line.long 0x04 "NVCSI_CIL_B_DPHY_DESKEW_SYNC_PATTERN_0,NVCSI CIL B DPHY DESKEW SYNC Pattern"
bitfld.long 0x04 0. " INVERT_DESKEW_PATTERN       ,Invert DESKEW pattern" "Not inverted,Inverted"
tree.end
width 0x0B
width 0x0B
tree.end
tree "MIPI D-PHY CALIBRATION"
base ad:0x03990000
width 25.
group.long 0x00++0x03
line.long 0x00 "MIPI_CAL_MODE_0,Calibration Mode Register"
bitfld.long 0x00 0. " SEL_DPHY_CPHY               ,Describes the calibration in DPHY/CPHY mode" "DPHY,CPHY"
if (((per.l(ad:0x03990000+0x04))&0x3000000)==0x00)
group.long 0x04++0x03
line.long 0x00 "MIPI_CAL_CTRL_0,Calibration Control Register"
bitfld.long 0x00 26.--29. " MIPI_CAL_NOISE_FLT          ,Sensitivity of the noise filter" ",,2,3,4,5,?..."
bitfld.long 0x00 24.--25. "                        MIPI_CAL_PRESCALE           ,Auto-cal calibration step prescale" "0.1us,0.5us,1.0us,1.5us"
bitfld.long 0x00 4. "         MIPI_CAL_CLKEN_OVR          ,Clock enable overflow" "Gated,Always on"
textline "                                  "
bitfld.long 0x00 1. " MIPI_CAL_AUTOCAL_EN         ,When set, calibration is triggered periodically" "Disabled,Enabled"
rbitfld.long 0x00 0. "                 MIPI_CAL_STARTCAL           ,Writing a one to this bit starts the calibration state machine" "Disabled,Enabled"
else
group.long 0x04++0x03
line.long 0x00 "MIPI_CAL_CTRL_0,Calibration Control Register"
bitfld.long 0x00 26.--29. " MIPI_CAL_NOISE_FLT          ,Sensitivity of the noise filter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--25. "                       MIPI_CAL_PRESCALE           ,Auto-cal calibration step prescale" "0.1us,0.5us,1.0us,1.5us"
bitfld.long 0x00 4. "         MIPI_CAL_CLKEN_OVR          ,Clock enable overflow" "GATED,ALWAYS_ON"
textline "                                  "
bitfld.long 0x00 1. " MIPI_CAL_AUTOCAL_EN         ,When set, calibration is triggered periodically" "Disabled,Enabled"
rbitfld.long 0x00 0. "                 MIPI_CAL_STARTCAL           ,Writing a one to this bit starts the calibration state machine" "Disabled,Enabled"
endif
group.long 0x08++0x03
line.long 0x00 "AUTOCAL_CTRL0_0,MIPI Calibration Auto-Calibration Period"
if (((per.l(ad:0x03990000+0x0C))&0x1)==0x00)
group.long 0x0C++0x03
line.long 0x00 "CIL_MIPI_CAL_STATUS_0,CIL MIPI Calibrate Status"
eventfld.long 0x00 31. " MIPI_AUTO_CAL_DONE_DSID     ,MIPI auto calibrate done for DSID" "In progress,Done"
eventfld.long 0x00 30. "              MIPI_AUTO_CAL_DONE_DSIC     ,MIPI auto calibrate done for DSIC" "In progress,Done"
eventfld.long 0x00 29. "   MIPI_AUTO_CAL_DONE_DSIB     ,MIPI auto calibrate done for DSIB" "In progress,Done"
textline "                                  "
eventfld.long 0x00 28. " MIPI_AUTO_CAL_DONE_DSIA     ,MIPI auto calibrate done for DSI" "In progress,Done"
eventfld.long 0x00 25. "              MIPI_AUTO_CAL_DONE_CSIF     ,MIPI auto calibrate done for CSIF" "In progress,Done"
eventfld.long 0x00 24. "   MIPI_AUTO_CAL_DONE_CSIE     ,MIPI auto calibrate done for CSIE" "In progress,Done"
textline "                                  "
eventfld.long 0x00 23. " MIPI_AUTO_CAL_DONE_CSID     ,MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 22. "              MIPI_AUTO_CAL_DONE_CSIC     ,Debug bit MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 21. "   MIPI_AUTO_CAL_DONE_CSIB     ,MIPI auto calibrate done for CSI" "In progress,Done"
textline "                                  "
eventfld.long 0x00 20. " MIPI_AUTO_CAL_DONE_CSIA     ,MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 16. "              MIPI_AUTO_CAL_DONE          ,MIPI auto calibrate done" "In progress,Done"
rbitfld.long 0x00 12.--15. "   MIPI_CAL_DRIV_DN_ADJ        ,Driver pull-down calibration code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
rbitfld.long 0x00 8.--11. " MIPI_CAL_DRIV_UP_ADJ        ,Driver pull up calibration code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 4.--7. "                       MIPI_CAL_TERMADJ            ,Termination code generated by MIPI auto calibrate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
eventfld.long 0x00 0. "            MIPI_CAL_ACTIVE             ,Auto calibrate is active" "Not active,Active"
else
group.long 0x0C++0x03
line.long 0x00 "CIL_MIPI_CAL_STATUS_0,CIL MIPI Calibrate Status"
eventfld.long 0x00 31. " MIPI_AUTO_CAL_DONE_DSID     ,MIPI auto calibrate done for DSID" "In progress,Done"
eventfld.long 0x00 30. "              MIPI_AUTO_CAL_DONE_DSIC     ,MIPI auto calibrate done for DSIC" "In progress,Done"
eventfld.long 0x00 29. "   MIPI_AUTO_CAL_DONE_DSIB     ,MIPI auto calibrate done for DSIB" "In progress,Done"
textline "                                  "
eventfld.long 0x00 28. " MIPI_AUTO_CAL_DONE_DSIA     ,MIPI auto calibrate done for DSI" "In progress,Done"
eventfld.long 0x00 25. "              MIPI_AUTO_CAL_DONE_CSIF     ,MIPI auto calibrate done for CSIF" "In progress,Done"
eventfld.long 0x00 24. "   MIPI_AUTO_CAL_DONE_CSIE     ,MIPI auto calibrate done for CSIE" "In progress,Done"
textline "                                  "
eventfld.long 0x00 23. " MIPI_AUTO_CAL_DONE_CSID     ,MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 22. "              MIPI_AUTO_CAL_DONE_CSIC     ,Debug bit MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 21. "   MIPI_AUTO_CAL_DONE_CSIB     ,MIPI auto calibrate done for CSI" "In progress,Done"
textline "                                  "
eventfld.long 0x00 20. " MIPI_AUTO_CAL_DONE_CSIA     ,MIPI auto calibrate done for CSI" "In progress,Done"
eventfld.long 0x00 16. "              MIPI_AUTO_CAL_DONE          ,MIPI auto calibrate done" "In progress,Done"
textline "                                  "
eventfld.long 0x00 0. " MIPI_CAL_ACTIVE             ,Auto calibrate is active" "Not active,Active"
endif
rgroup.long 0x10++0x03
line.long 0x00 "CIL_MIPI_CAL_STATUS_2_0,MIPI Clock Calibration Status 2"
bitfld.long 0x00 6. " MIPI_CLK_AUTO_CAL_DONE_DSID ,MIPI clock auto calibration done for DSID" "In progress,Done"
bitfld.long 0x00 5. "              MIPI_CLK_AUTO_CAL_DONE_DSIC ,MIPI clock auto calibration done for DSIC" "In progress,Done"
bitfld.long 0x00 4. "   MIPI_CLK_AUTO_CAL_DONE_DSIB ,MIPI clock auto calibration done for DSIB" "In progress,Done"
textline "                                  "
bitfld.long 0x00 3. " MIPI_CLK_AUTO_CAL_DONE_DSIA ,MIPI clock auto calibration done for DSIA" "In progress,Done"
textline "                                  "
width 27.
group.long 0x18++0x03
line.long 0x00 "CILA_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-AB Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEA          ,Calibration state machine setting for channel A" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELA              ,Select the CSIA pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSA_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSA           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1C++0x03
line.long 0x00 "CILB_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-AB Channel B (Upper Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEB          ,Calibration state machine setting for channel B" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELB              ,Select the CSIB pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSB_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSB           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x20++0x03
line.long 0x00 "CILC_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-CD Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEC          ,Calibration state machine setting for channel C" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELC              ,Select the CSIC pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSC_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSC           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x24++0x03
line.long 0x00 "CILD_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-CD Channel B (Upper Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDED          ,Calibration state machine setting for channel D" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELD              ,Select the CSID pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSD_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSD           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x28++0x03
line.long 0x00 "CILE_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-EF Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEE          ,Calibration state machine setting for channel E" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELE              ,Select the CSIE pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSE_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSE           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x2C++0x03
line.long 0x00 "CILF_MIPI_CAL_CONFIG_0,Calibration Settings For CIL-EF Channel B (Upper Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEF          ,Calibration state machine setting for channel F" "Normal operation,Use the register values"
bitfld.long 0x00 21. "  MIPI_CAL_SELF              ,Select the CSIF pads for auto calibration" "Not selected,Selected"
textline "                                    "
bitfld.long 0x00 11.--15. " MIPI_CAL_TERMOSF_CLK       ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSF           ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
group.long 0x3C++0x03
line.long 0x00 "DSIA_MIPI_CAL_CONFIG_0,Calibration Settings For DSIAB Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEDSIA       ,Uses value in the TERMOS/HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_SELDSIA           ,Select the DSIA pad's for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSPDOSDSIA        ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSPUOSDSIA        ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSDSIA        ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x03
line.long 0x00 "DSIB_MIPI_CAL_CONFIG_0,Calibration Settings For DSIAB Channel B (Upper Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEDSIB       ,Uses value in the TERMOS/HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_SELDSIB           ,Select the DSIB pad's for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSPDOSDSIB        ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSPUOSDSIB        ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSDSIB        ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x44++0x03
line.long 0x00 "DSIC_MIPI_CAL_CONFIG_0,Calibration Settings For DSICD Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEDSIC       ,Uses value in the TERMOS/HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_SELDSIC           ,Select the DSIC pad's for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSPDOSDSIC        ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSPUOSDSIC        ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSDSIC        ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x48++0x03
line.long 0x00 "DSID_MIPI_CAL_CONFIG_0,Calibration Settings For DSICD Channel B (Upper Data)"
bitfld.long 0x00 30. " MIPI_CAL_OVERIDEDSID       ,Uses value in the TERMOS/HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_SELDSID           ,Select the DSID pad's for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSPDOSDSID        ,Offset for HSPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSPUOSDSID        ,Offset for HSPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_TERMOSDSID        ,Offset for TERMADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x5C++0x0B
line.long 0x00 "MIPI_BIAS_PAD_CFG0_0,MIPI Bias Pad Configuration Register"
bitfld.long 0x00 1. " MIPI_BIAS_PAD_PDVCLAMP     ,Power down regulator which supplies current to pre-driver logic" "Power up,Power down"
bitfld.long 0x00 0. "               MIPI_BIAS_PAD_E_VCLAMP_REF ,Generates VCLAMP reference voltage for internal regulator" "Disabled,Enabled"
line.long 0x04 "MIPI_BIAS_PAD_CFG1_0,MIPI Bias Pad Configuration Register"
bitfld.long 0x04 24.--27. " PAD_TEST_SEL               ,Controls which signal to be routed to TEST_OUT" "VAUXP,RUP,RDN,VREG,TBD,TBD,TBD,TBD,?..."
bitfld.long 0x04 16.--19. "                    PAD_DRIV_DN_REF            ,Adjust internal reference level for drive pull-down calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            PAD_DRIV_UP_REF            ,Adjust internal reference level for drive pull-up calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x04 0.--3. " PAD_TERM_REF               ,Adjust internal reference level for termination calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "MIPI_BIAS_PAD_CFG2_0,MIPI Bias Pad Configuration Register 2"
bitfld.long 0x08 24.--27. " BG_TEMP_COEFF              ,Band gap temperature coefficient control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 16.--19. "                       PAD_VCLAMP_LEVEL           ,VCLAMP level adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 8.--15. 1. "            SPARE_TOP                  ,Spare bit for MIPI bias config"
textline "                                    "
bitfld.long 0x08 4.--7. " PAD_VAUXP_LEVEL            ,VAUXP level adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 1. "                       PAD_PDVREG                 ,Power down voltage regulator" "Power up,Power down"
bitfld.long 0x08 0. "    PAD_VBYPASS                ,Bypass bang gap voltage reference" "Not bypassed,Bypassed"
group.long 0x68++0x07
line.long 0x00 "DSIA_MIPI_CAL_CONFIG_2_0,Calibration Settings For DSIAB Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_CLKOVERIDEDSIA    ,Uses value in the HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_CLKSELDSIA        ,Select the DSIA pad's clock for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSCLKTERMOSDSIA   ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSCLKPDOSDSIA     ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_HSCLKPUOSDSIA     ,Offset for HSCLKPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "DSIB_MIPI_CAL_CONFIG_2_0,Calibration Settings For DSIAB Channel B (Upper Data)"
bitfld.long 0x04 30. " MIPI_CAL_CLKOVERIDEDSIB    ,Uses value in the HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x04 21. "                   MIPI_CAL_CLKSELDSIB        ,Select the DSIB pad's clock for auto calibration" "Not selected,Selected"
bitfld.long 0x04 16.--20. "  MIPI_CAL_HSCLKTERMOSDSIB   ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x04 8.--12. " MIPI_CAL_HSCLKPDOSDSIB     ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                       MIPI_CAL_HSCLKPUOSDSIB     ,Offset for HSCLKPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x74++0x07
line.long 0x00 "DSIC_MIPI_CAL_CONFIG_2_0,Calibration Settings For DSICD Channel A (Lower Data)"
bitfld.long 0x00 30. " MIPI_CAL_CLKOVERIDEDSIC    ,Uses value in the HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x00 21. "                   MIPI_CAL_CLKSELDSIC        ,Select the DSIC pad's clock for auto calibration" "Not selected,Selected"
bitfld.long 0x00 16.--20. "  MIPI_CAL_HSCLKTERMOSDSIC   ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 8.--12. " MIPI_CAL_HSCLKPDOSDSIC     ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                       MIPI_CAL_HSCLKPUOSDSIC     ,Offset for HSCLKPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "DSID_MIPI_CAL_CONFIG_2_0,Calibration Settings For DSICD Channel Channel B (Upper Data)"
bitfld.long 0x04 30. " MIPI_CAL_CLKOVERIDEDSID    ,Uses value in the HSPUOS/HSPDOS as offset to calibration state/actual value" "Offset,Actual"
bitfld.long 0x04 21. "                   MIPI_CAL_CLKSELDSID        ,Select the DSID pad's clock for auto calibration" "Not selected,Selected"
bitfld.long 0x04 16.--20. "  MIPI_CAL_HSCLKTERMOSDSID   ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x04 8.--12. " MIPI_CAL_HSCLKPDOSDSID     ,Offset for HSCLKPDADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "                       MIPI_CAL_HSCLKPUOSDSID     ,Offset for HSCLKPUADJ (2's complement)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "Audio Processing Engine"
tree "AXBAR"
tree "PART_0"
base ad:0x02900800
width 30.
group.long 0x00++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX1_0,AXBAR Partition 0 ADMAIF RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX2_0,AXBAR Partition 0 ADMAIF RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x08++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX3_0,AXBAR Partition 0 ADMAIF RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x0C++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX4_0,AXBAR Partition 0 ADMAIF RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX5_0,AXBAR Partition 0 ADMAIF RX5 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX6_0,AXBAR Partition 0 ADMAIF RX6 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX7_0,AXBAR Partition 0 ADMAIF RX7 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX8_0,AXBAR Partition 0 ADMAIF RX8 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX9_0,AXBAR Partition 0 ADMAIF RX9 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX10_0,AXBAR Partition 0 ADMAIF RX10 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX11_0,AXBAR Partition 0 ADMAIF RX11 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX12_0,AXBAR Partition 0 ADMAIF RX12 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX13_0,AXBAR Partition 0 ADMAIF RX13 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX14_0,AXBAR Partition 0 ADMAIF RX14 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX15_0,AXBAR Partition 0 ADMAIF RX15 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX16_0,AXBAR Partition 0 ADMAIF RX16 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "AXBAR_PART_0_I2S1_RX1_0,AXBAR Partition 0 I2S1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "AXBAR_PART_0_I2S2_RX1_0,AXBAR Partition 0 I2S2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "AXBAR_PART_0_I2S3_RX1_0,AXBAR Partition 0 I2S3 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "AXBAR_PART_0_I2S4_RX1_0,AXBAR Partition 0 I2S4 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "AXBAR_PART_0_I2S5_RX1_0,AXBAR Partition 0 I2S5 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "AXBAR_PART_0_I2S6_RX1_0,AXBAR Partition 0 I2S6 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x60++0x03
line.long 0x00 "AXBAR_PART_0_SFC1_RX1_0,AXBAR Partition 0 SFC1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x64++0x03
line.long 0x00 "AXBAR_PART_0_SFC2_RX1_0,AXBAR Partition 0 SFC2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "AXBAR_PART_0_SFC3_RX1_0,AXBAR Partition 0 SFC3 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "AXBAR_PART_0_SFC4_RX1_0,AXBAR Partition 0 SFC4 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX1_0,AXBAR Partition 0 MIXER1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x84++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX2_0,AXBAR Partition 0 MIXER1 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX3_0,AXBAR Partition 0 MIXER1 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX4_0,AXBAR Partition 0 MIXER1 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX5_0,AXBAR Partition 0 MIXER1 RX5 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX6_0,AXBAR Partition 0 MIXER1 RX6 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX7_0,AXBAR Partition 0 MIXER1 RX7 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX8_0,AXBAR Partition 0 MIXER1 RX8 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX9_0,AXBAR Partition 0 MIXER1 RX9 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXBAR_PART_0_MIXER1_RX10_0,AXBAR Partition 0 MIXER1 RX10 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXBAR_PART_0_DSPK1_RX1_0,AXBAR Partition 0 DSPK1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "AXBAR_PART_0_DSPK2_RX1_0,AXBAR Partition 0 DSPK2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xD0++0x03
line.long 0x00 "AXBAR_PART_0_SPDIF1_RX1_0,AXBAR Partition 0 SPDIF1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xD4++0x03
line.long 0x00 "AXBAR_PART_0_SPDIF1_RX2_0,AXBAR Partition 0 SPDIF1 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xE0++0x03
line.long 0x00 "AXBAR_PART_0_AFC1_RX1_0,AXBAR Partition 0 AFC1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xE4++0x03
line.long 0x00 "AXBAR_PART_0_AFC2_RX1_0,AXBAR Partition 0 AFC2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xE8++0x03
line.long 0x00 "AXBAR_PART_0_AFC3_RX1_0,AXBAR Partition 0 AFC3 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xEC++0x03
line.long 0x00 "AXBAR_PART_0_AFC4_RX1_0,AXBAR Partition 0 AFC4 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "AXBAR_PART_0_AFC5_RX1_0,AXBAR Partition 0 AFC5 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0xF4++0x03
line.long 0x00 "AXBAR_PART_0_AFC6_RX1_0,AXBAR Partition 0 AFC6 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "AXBAR_PART_0_OPE1_RX1_0,AXBAR Partition 0 OPE1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "AXBAR_PART_0_SPKPROT1_RX1_0,AXBAR Partition 0 SPKPROT1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x120++0x03
line.long 0x00 "AXBAR_PART_0_MVC1_RX1_0,AXBAR Partition 0 MVC1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x124++0x03
line.long 0x00 "AXBAR_PART_0_MVC2_RX1_0,AXBAR Partition 0 MVC2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x140++0x03
line.long 0x00 "AXBAR_PART_0_AMX1_RX1_0,AXBAR Partition 0 AMX1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "AXBAR_PART_0_AMX1_RX2_0,AXBAR Partition 0 AMX1 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x148++0x03
line.long 0x00 "AXBAR_PART_0_AMX1_RX3_0,AXBAR Partition 0 AMX1 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x14C++0x03
line.long 0x00 "AXBAR_PART_0_AMX1_RX4_0,AXBAR Partition 0 AMX1 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x150++0x03
line.long 0x00 "AXBAR_PART_0_AMX2_RX1_0,AXBAR Partition 0 AMX2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x154++0x03
line.long 0x00 "AXBAR_PART_0_AMX2_RX2_0,AXBAR Partition 0 AMX2 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x158++0x03
line.long 0x00 "AXBAR_PART_0_AMX2_RX3_0,AXBAR Partition 0 AMX2 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x15C++0x03
line.long 0x00 "AXBAR_PART_0_AMX2_RX4_0,AXBAR Partition 0 AMX2 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x160++0x03
line.long 0x00 "AXBAR_PART_0_AMX3_RX1_0,AXBAR Partition 0 AMX3 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x164++0x03
line.long 0x00 "AXBAR_PART_0_AMX3_RX2_0,AXBAR Partition 0 AMX3 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x168++0x03
line.long 0x00 "AXBAR_PART_0_AMX3_RX3_0,AXBAR Partition 0 AMX3 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x16C++0x03
line.long 0x00 "AXBAR_PART_0_AMX3_RX4_0,AXBAR Partition 0 AMX3 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x180++0x03
line.long 0x00 "AXBAR_PART_0_ADX1_RX1_0,AXBAR Partition 0 ADX1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x184++0x03
line.long 0x00 "AXBAR_PART_0_ADX2_RX1_0,AXBAR Partition 0 ADX2 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x188++0x03
line.long 0x00 "AXBAR_PART_0_ADX3_RX1_0,AXBAR Partition 0 ADX3 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x18C++0x03
line.long 0x00 "AXBAR_PART_0_ADX4_RX1_0,AXBAR Partition 0 ADX4 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x190++0x03
line.long 0x00 "AXBAR_PART_0_AMX4_RX1_0,AXBAR Partition 0 AMX4 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x194++0x03
line.long 0x00 "AXBAR_PART_0_AMX4_RX2_0,AXBAR Partition 0 AMX4 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x198++0x03
line.long 0x00 "AXBAR_PART_0_AMX4_RX3_0,AXBAR Partition 0 AMX4 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x19C++0x03
line.long 0x00 "AXBAR_PART_0_AMX4_RX4_0,AXBAR Partition 0 AMX4 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1A0++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX17_0,AXBAR Partition 0 ADMAIF RX17 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1A4++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX18_0,AXBAR Partition 0 ADMAIF RX18 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1A8++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX19_0,AXBAR Partition 0 ADMAIF RX19 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1AC++0x03
line.long 0x00 "AXBAR_PART_0_ADMAIF_RX20_0,AXBAR Partition 0 ADMAIF RX20 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1B0++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX1_0,AXBAR Partition 0 ASRC1 RX1 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1B4++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX2_0,AXBAR Partition 0 ASRC1 RX2 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1B8++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX3_0,AXBAR Partition 0 ASRC1 RX3 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1BC++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX4_0,AXBAR Partition 0 ASRC1 RX4 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1C0++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX5_0,AXBAR Partition 0 ASRC1 RX5 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1C4++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX6_0,AXBAR Partition 0 ASRC1 RX6 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
group.long 0x1C8++0x03
line.long 0x00 "AXBAR_PART_0_ASRC1_RX7_0,AXBAR Partition 0 ASRC1 RX7 Register"
bitfld.long 0x00 27. " SFC4_TX1    ,SFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  SFC3_TX1    ,SFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  SFC2_TX1     ,SFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  SFC1_TX1    ,SFC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  I2S6_TX1    ,I2S6 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  I2S5_TX1    ,I2S5 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " I2S4_TX1    ,I2S4 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  I2S3_TX1    ,I2S3 TX1" "Disabled,Enabled"
bitfld.long 0x00 17. "  I2S2_TX1     ,I2S2 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  I2S1_TX1    ,I2S1 TX1" "Disabled,Enabled"
bitfld.long 0x00 15. "  ADMAIF_TX16 ,ADMAIF TX16" "Disabled,Enabled"
bitfld.long 0x00 14. "  ADMAIF_TX15 ,ADMAIF TX15" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 13. " ADMAIF_TX14 ,ADMAIF TX14" "Disabled,Enabled"
bitfld.long 0x00 12. "  ADMAIF_TX13 ,ADMAIF TX13" "Disabled,Enabled"
bitfld.long 0x00 11. "  ADMAIF_TX12  ,ADMAIF TX12" "Disabled,Enabled"
bitfld.long 0x00 10. "  ADMAIF_TX11 ,ADMAIF TX11" "Disabled,Enabled"
bitfld.long 0x00 9. "  ADMAIF_TX10 ,ADMAIF TX10" "Disabled,Enabled"
bitfld.long 0x00 8. "  ADMAIF_TX9  ,ADMAIF TX9" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 7. " ADMAIF_TX8  ,ADMAIF TX8" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADMAIF_TX7  ,ADMAIF TX7" "Disabled,Enabled"
bitfld.long 0x00 5. "  ADMAIF_TX6   ,ADMAIF TX6" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADMAIF_TX5  ,ADMAIF TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADMAIF_TX4  ,ADMAIF TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADMAIF_TX3  ,ADMAIF TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 1. " ADMAIF_TX2  ,ADMAIF TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADMAIF_TX1  ,ADMAIF TX1" "Disabled,Enabled"
width 0x0B
tree.end
tree "PART_1"
base ad:0x02900A00
width 30.
group.long 0x00++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX1_0,AXBAR Partition 1 ADMAIF RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX2_0,AXBAR Partition 1 ADMAIF RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x08++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX3_0,AXBAR Partition 1 ADMAIF RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x0C++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX4_0,AXBAR Partition 1 ADMAIF RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX5_0,AXBAR Partition 1 ADMAIF RX5 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX6_0,AXBAR Partition 1 ADMAIF RX6 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX7_0,AXBAR Partition 1 ADMAIF RX7 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX8_0,AXBAR Partition 1 ADMAIF RX8 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX9_0,AXBAR Partition 1 ADMAIF RX9 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX10_0,AXBAR Partition 1 ADMAIF RX10 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX11_0,AXBAR Partition 1 ADMAIF RX11 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX12_0,AXBAR Partition 1 ADMAIF RX12 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX13_0,AXBAR Partition 1 ADMAIF RX13 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX14_0,AXBAR Partition 1 ADMAIF RX14 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX15_0,AXBAR Partition 1 ADMAIF RX15 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX16_0,AXBAR Partition 1 ADMAIF RX16 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "AXBAR_PART_1_I2S1_RX1_0,AXBAR Partition 1 I2S1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "AXBAR_PART_1_I2S2_RX1_0,AXBAR Partition 1 I2S2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "AXBAR_PART_1_I2S3_RX1_0,AXBAR Partition 1 I2S3 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "AXBAR_PART_1_I2S4_RX1_0,AXBAR Partition 1 I2S4 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "AXBAR_PART_1_I2S5_RX1_0,AXBAR Partition 1 I2S5 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "AXBAR_PART_1_I2S6_RX1_0,AXBAR Partition 1 I2S6 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x60++0x03
line.long 0x00 "AXBAR_PART_1_SFC1_RX1_0,AXBAR Partition 1 SFC1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x64++0x03
line.long 0x00 "AXBAR_PART_1_SFC2_RX1_0,AXBAR Partition 1 SFC2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "AXBAR_PART_1_SFC3_RX1_0,AXBAR Partition 1 SFC3 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "AXBAR_PART_1_SFC4_RX1_0,AXBAR Partition 1 SFC4 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX1_0,AXBAR Partition 1 MIXER1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x84++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX2_0,AXBAR Partition 1 MIXER1 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX3_0,AXBAR Partition 1 MIXER1 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX4_0,AXBAR Partition 1 MIXER1 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX5_0,AXBAR Partition 1 MIXER1 RX5 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX6_0,AXBAR Partition 1 MIXER1 RX6 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX7_0,AXBAR Partition 1 MIXER1 RX7 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX8_0,AXBAR Partition 1 MIXER1 RX8 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX9_0,AXBAR Partition 1 MIXER1 RX9 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXBAR_PART_1_MIXER1_RX10_0,AXBAR Partition 1 MIXER1 RX10 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXBAR_PART_1_DSPK1_RX1_0,AXBAR Partition 1 DSPK1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "AXBAR_PART_1_DSPK2_RX1_0,AXBAR Partition 1 DSPK2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xD0++0x03
line.long 0x00 "AXBAR_PART_1_SPDIF1_RX1_0,AXBAR Partition 1 SPDIF1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xD4++0x03
line.long 0x00 "AXBAR_PART_1_SPDIF1_RX2_0,AXBAR Partition 1 SPDIF1 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xE0++0x03
line.long 0x00 "AXBAR_PART_1_AFC1_RX1_0,AXBAR Partition 1 AFC1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xE4++0x03
line.long 0x00 "AXBAR_PART_1_AFC2_RX1_0,AXBAR Partition 1 AFC2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xE8++0x03
line.long 0x00 "AXBAR_PART_1_AFC3_RX1_0,AXBAR Partition 1 AFC3 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xEC++0x03
line.long 0x00 "AXBAR_PART_1_AFC4_RX1_0,AXBAR Partition 1 AFC4 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "AXBAR_PART_1_AFC5_RX1_0,AXBAR Partition 1 AFC5 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0xF4++0x03
line.long 0x00 "AXBAR_PART_1_AFC6_RX1_0,AXBAR Partition 1 AFC6 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "AXBAR_PART_1_OPE1_RX1_0,AXBAR Partition 1 OPE1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "AXBAR_PART_1_SPKPROT1_RX1_0,AXBAR Partition 1 SPKPROT1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x120++0x03
line.long 0x00 "AXBAR_PART_1_MVC1_RX1_0,AXBAR Partition 1 MVC1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x124++0x03
line.long 0x00 "AXBAR_PART_1_MVC2_RX1_0,AXBAR Partition 1 MVC2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x140++0x03
line.long 0x00 "AXBAR_PART_1_AMX1_RX1_0,AXBAR Partition 1 AMX1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "AXBAR_PART_1_AMX1_RX2_0,AXBAR Partition 1 AMX1 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x148++0x03
line.long 0x00 "AXBAR_PART_1_AMX1_RX3_0,AXBAR Partition 1 AMX1 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x14C++0x03
line.long 0x00 "AXBAR_PART_1_AMX1_RX4_0,AXBAR Partition 1 AMX1 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x150++0x03
line.long 0x00 "AXBAR_PART_1_AMX2_RX1_0,AXBAR Partition 1 AMX2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x154++0x03
line.long 0x00 "AXBAR_PART_1_AMX2_RX2_0,AXBAR Partition 1 AMX2 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x158++0x03
line.long 0x00 "AXBAR_PART_1_AMX2_RX3_0,AXBAR Partition 1 AMX2 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x15C++0x03
line.long 0x00 "AXBAR_PART_1_AMX2_RX4_0,AXBAR Partition 1 AMX2 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x160++0x03
line.long 0x00 "AXBAR_PART_1_AMX3_RX1_0,AXBAR Partition 1 AMX3 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x164++0x03
line.long 0x00 "AXBAR_PART_1_AMX3_RX2_0,AXBAR Partition 1 AMX3 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x168++0x03
line.long 0x00 "AXBAR_PART_1_AMX3_RX3_0,AXBAR Partition 1 AMX3 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x16C++0x03
line.long 0x00 "AXBAR_PART_1_AMX3_RX4_0,AXBAR Partition 1 AMX3 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x180++0x03
line.long 0x00 "AXBAR_PART_1_ADX1_RX1_0,AXBAR Partition 1 ADX1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x184++0x03
line.long 0x00 "AXBAR_PART_1_ADX2_RX1_0,AXBAR Partition 1 ADX2 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x188++0x03
line.long 0x00 "AXBAR_PART_1_ADX3_RX1_0,AXBAR Partition 1 ADX3 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x18C++0x03
line.long 0x00 "AXBAR_PART_1_ADX4_RX1_0,AXBAR Partition 1 ADX4 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x190++0x03
line.long 0x00 "AXBAR_PART_1_AMX4_RX1_0,AXBAR Partition 1 AMX4 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x194++0x03
line.long 0x00 "AXBAR_PART_1_AMX4_RX2_0,AXBAR Partition 1 AMX4 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x198++0x03
line.long 0x00 "AXBAR_PART_1_AMX4_RX3_0,AXBAR Partition 1 AMX4 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x19C++0x03
line.long 0x00 "AXBAR_PART_1_AMX4_RX4_0,AXBAR Partition 1 AMX4 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1A0++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX17_0,AXBAR Partition 1 ADMAIF RX17 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1A4++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX18_0,AXBAR Partition 1 ADMAIF RX18 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1A8++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX19_0,AXBAR Partition 1 ADMAIF RX19 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1AC++0x03
line.long 0x00 "AXBAR_PART_1_ADMAIF_RX20_0,AXBAR Partition 1 ADMAIF RX20 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1B0++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX1_0,AXBAR Partition 1 ASRC1 RX1 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1B4++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX2_0,AXBAR Partition 1 ASRC1 RX2 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1B8++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX3_0,AXBAR Partition 1 ASRC1 RX3 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1BC++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX4_0,AXBAR Partition 1 ASRC1 RX4 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1C0++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX5_0,AXBAR Partition 1 ASRC1 RX5 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1C4++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX6_0,AXBAR Partition 1 ASRC1 RX6 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
group.long 0x1C8++0x03
line.long 0x00 "AXBAR_PART_1_ASRC1_RX7_0,AXBAR Partition 1 ASRC1 RX7 Register"
bitfld.long 0x00 29. " AFC6_TX1    ,AFC6 TX1" "Disabled,Enabled"
bitfld.long 0x00 28. "  AFC5_TX1    ,AFC5 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  AFC4_TX1     ,AFC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 26. "  AFC3_TX1    ,AFC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 25. "  AFC2_TX1   ,AFC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 24. "  AFC1_TX1   ,AFC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " SPDIF1_TX2  ,SPDIF1 TX2" "Disabled,Enabled"
bitfld.long 0x00 20. "  SPDIF1_TX1  ,SPDIF1 TX1" "Disabled,Enabled"
bitfld.long 0x00 16. "  ARAD1_TX1    ,ARAD1 TX1" "Disabled,Enabled"
bitfld.long 0x00 11. "  AMX4_TX1    ,AMX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 10. "  AMX3_TX1   ,AMX3 TX1" "Disabled,Enabled"
bitfld.long 0x00 9. "  AMX2_TX1   ,AMX2 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " AMX1_TX1    ,AMX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 4. "  MIXER1_TX5  ,MIXER1 TX5" "Disabled,Enabled"
bitfld.long 0x00 3. "  MIXER1_TX4   ,MIXER1 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  MIXER1_TX3  ,MIXER1 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  MIXER1_TX2 ,MIXER1 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  MIXER1_TX1 ,MIXER1 TX1" "Disabled,Enabled"
width 0x0B
tree.end
tree "PART_2"
base ad:0x02900C00
width 30.
group.long 0x00++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX1_0,AXBAR Partition 2 ADMAIF RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX2_0,AXBAR Partition 2 ADMAIF RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x08++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX3_0,AXBAR Partition 2 ADMAIF RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x0C++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX4_0,AXBAR Partition 2 ADMAIF RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX5_0,AXBAR Partition 2 ADMAIF RX5 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX6_0,AXBAR Partition 2 ADMAIF RX6 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX7_0,AXBAR Partition 2 ADMAIF RX7 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX8_0,AXBAR Partition 2 ADMAIF RX8 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX9_0,AXBAR Partition 2 ADMAIF RX9 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX10_0,AXBAR Partition 2 ADMAIF RX10 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX11_0,AXBAR Partition 2 ADMAIF RX11 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX12_0,AXBAR Partition 2 ADMAIF RX12 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX13_0,AXBAR Partition 2 ADMAIF RX13 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX14_0,AXBAR Partition 2 ADMAIF RX14 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX15_0,AXBAR Partition 2 ADMAIF RX15 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX16_0,AXBAR Partition 2 ADMAIF RX16 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "AXBAR_PART_2_I2S1_RX1_0,AXBAR Partition 2 I2S1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "AXBAR_PART_2_I2S2_RX1_0,AXBAR Partition 2 I2S2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "AXBAR_PART_2_I2S3_RX1_0,AXBAR Partition 2 I2S3 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "AXBAR_PART_2_I2S4_RX1_0,AXBAR Partition 2 I2S4 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "AXBAR_PART_2_I2S5_RX1_0,AXBAR Partition 2 I2S5 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "AXBAR_PART_2_I2S6_RX1_0,AXBAR Partition 2 I2S6 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x60++0x03
line.long 0x00 "AXBAR_PART_2_SFC1_RX1_0,AXBAR Partition 2 SFC1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x64++0x03
line.long 0x00 "AXBAR_PART_2_SFC2_RX1_0,AXBAR Partition 2 SFC2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "AXBAR_PART_2_SFC3_RX1_0,AXBAR Partition 2 SFC3 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "AXBAR_PART_2_SFC4_RX1_0,AXBAR Partition 2 SFC4 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX1_0,AXBAR Partition 2 MIXER1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x84++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX2_0,AXBAR Partition 2 MIXER1 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX3_0,AXBAR Partition 2 MIXER1 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX4_0,AXBAR Partition 2 MIXER1 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX5_0,AXBAR Partition 2 MIXER1 RX5 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX6_0,AXBAR Partition 2 MIXER1 RX6 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX7_0,AXBAR Partition 2 MIXER1 RX7 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX8_0,AXBAR Partition 2 MIXER1 RX8 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX9_0,AXBAR Partition 2 MIXER1 RX9 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXBAR_PART_2_MIXER1_RX10_0,AXBAR Partition 2 MIXER1 RX10 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXBAR_PART_2_DSPK1_RX1_0,AXBAR Partition 2 DSPK1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "AXBAR_PART_2_DSPK2_RX1_0,AXBAR Partition 2 DSPK2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xD0++0x03
line.long 0x00 "AXBAR_PART_2_SPDIF1_RX1_0,AXBAR Partition 2 SPDIF1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xD4++0x03
line.long 0x00 "AXBAR_PART_2_SPDIF1_RX2_0,AXBAR Partition 2 SPDIF1 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xE0++0x03
line.long 0x00 "AXBAR_PART_2_AFC1_RX1_0,AXBAR Partition 2 AFC1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xE4++0x03
line.long 0x00 "AXBAR_PART_2_AFC2_RX1_0,AXBAR Partition 2 AFC2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xE8++0x03
line.long 0x00 "AXBAR_PART_2_AFC3_RX1_0,AXBAR Partition 2 AFC3 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xEC++0x03
line.long 0x00 "AXBAR_PART_2_AFC4_RX1_0,AXBAR Partition 2 AFC4 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "AXBAR_PART_2_AFC5_RX1_0,AXBAR Partition 2 AFC5 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0xF4++0x03
line.long 0x00 "AXBAR_PART_2_AFC6_RX1_0,AXBAR Partition 2 AFC6 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "AXBAR_PART_2_OPE1_RX1_0,AXBAR Partition 2 OPE1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "AXBAR_PART_2_SPKPROT1_RX1_0,AXBAR Partition 2 SPKPROT1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x120++0x03
line.long 0x00 "AXBAR_PART_2_MVC1_RX1_0,AXBAR Partition 2 MVC1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x124++0x03
line.long 0x00 "AXBAR_PART_2_MVC2_RX1_0,AXBAR Partition 2 MVC2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x140++0x03
line.long 0x00 "AXBAR_PART_2_AMX1_RX1_0,AXBAR Partition 2 AMX1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "AXBAR_PART_2_AMX1_RX2_0,AXBAR Partition 2 AMX1 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x148++0x03
line.long 0x00 "AXBAR_PART_2_AMX1_RX3_0,AXBAR Partition 2 AMX1 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x14C++0x03
line.long 0x00 "AXBAR_PART_2_AMX1_RX4_0,AXBAR Partition 2 AMX1 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x150++0x03
line.long 0x00 "AXBAR_PART_2_AMX2_RX1_0,AXBAR Partition 2 AMX2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x154++0x03
line.long 0x00 "AXBAR_PART_2_AMX2_RX2_0,AXBAR Partition 2 AMX2 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x158++0x03
line.long 0x00 "AXBAR_PART_2_AMX2_RX3_0,AXBAR Partition 2 AMX2 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x15C++0x03
line.long 0x00 "AXBAR_PART_2_AMX2_RX4_0,AXBAR Partition 2 AMX2 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x160++0x03
line.long 0x00 "AXBAR_PART_2_AMX3_RX1_0,AXBAR Partition 2 AMX3 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x164++0x03
line.long 0x00 "AXBAR_PART_2_AMX3_RX2_0,AXBAR Partition 2 AMX3 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x168++0x03
line.long 0x00 "AXBAR_PART_2_AMX3_RX3_0,AXBAR Partition 2 AMX3 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x16C++0x03
line.long 0x00 "AXBAR_PART_2_AMX3_RX4_0,AXBAR Partition 2 AMX3 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x180++0x03
line.long 0x00 "AXBAR_PART_2_ADX1_RX1_0,AXBAR Partition 2 ADX1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x184++0x03
line.long 0x00 "AXBAR_PART_2_ADX2_RX1_0,AXBAR Partition 2 ADX2 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x188++0x03
line.long 0x00 "AXBAR_PART_2_ADX3_RX1_0,AXBAR Partition 2 ADX3 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x18C++0x03
line.long 0x00 "AXBAR_PART_2_ADX4_RX1_0,AXBAR Partition 2 ADX4 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x190++0x03
line.long 0x00 "AXBAR_PART_2_AMX4_RX1_0,AXBAR Partition 2 AMX4 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x194++0x03
line.long 0x00 "AXBAR_PART_2_AMX4_RX2_0,AXBAR Partition 2 AMX4 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x198++0x03
line.long 0x00 "AXBAR_PART_2_AMX4_RX3_0,AXBAR Partition 2 AMX4 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x19C++0x03
line.long 0x00 "AXBAR_PART_2_AMX4_RX4_0,AXBAR Partition 2 AMX4 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1A0++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX17_0,AXBAR Partition 2 ADMAIF RX17 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1A4++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX18_0,AXBAR Partition 2 ADMAIF RX18 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1A8++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX19_0,AXBAR Partition 2 ADMAIF RX19 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1AC++0x03
line.long 0x00 "AXBAR_PART_2_ADMAIF_RX20_0,AXBAR Partition 2 ADMAIF RX20 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1B0++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX1_0,AXBAR Partition 2 ASRC1 RX1 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1B4++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX2_0,AXBAR Partition 2 ASRC1 RX2 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1B8++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX3_0,AXBAR Partition 2 ASRC1 RX3 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1BC++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX4_0,AXBAR Partition 2 ASRC1 RX4 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1C0++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX5_0,AXBAR Partition 2 ASRC1 RX5 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1C4++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX6_0,AXBAR Partition 2 ASRC1 RX6 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
group.long 0x1C8++0x03
line.long 0x00 "AXBAR_PART_2_ASRC1_RX7_0,AXBAR Partition 2 ASRC1 RX7 Register"
bitfld.long 0x00 31. " ADX2_TX4    ,ADX2 TX4" "Disabled,Enabled"
bitfld.long 0x00 30. "  ADX2_TX3    ,ADX2 TX3" "Disabled,Enabled"
bitfld.long 0x00 29. "  ADX2_TX2     ,ADX2 TX2" "Disabled,Enabled"
bitfld.long 0x00 28. "  ADX2_TX1    ,ADX2 TX1" "Disabled,Enabled"
bitfld.long 0x00 27. "  ADX1_TX4  ,ADX1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ADX1_TX3  ,ADX1 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " ADX1_TX2    ,ADX1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ADX1_TX1    ,ADX1 TX1" "Disabled,Enabled"
bitfld.long 0x00 21. "  DMIC4_TX1    ,DMIC4 TX1" "Disabled,Enabled"
bitfld.long 0x00 20. "  DMIC3_TX1   ,DMIC3 TX1" "Disabled,Enabled"
bitfld.long 0x00 19. "  DMIC2_TX1 ,DMIC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 18. "  DMIC1_TX1 ,DMIC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 9. " MVC2_TX1    ,MVC2 TX1" "Disabled,Enabled"
bitfld.long 0x00 8. "  MVC1_TX1    ,MVC1 TX1" "Disabled,Enabled"
bitfld.long 0x00 1. "  SPKPROT1_TX1 ,SPKPROT1 TX1" "Disabled,Enabled"
bitfld.long 0x00 0. "  OPE1_TX1    ,OPE1 TX1" "Disabled,Enabled"
width 0x0B
tree.end
tree "PART_3"
base ad:0x02900E00
width 30.
group.long 0x00++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX1_0,AXBAR Partition 3 ADMAIF RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX2_0,AXBAR Partition 3 ADMAIF RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x08++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX3_0,AXBAR Partition 3 ADMAIF RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x0C++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX4_0,AXBAR Partition 3 ADMAIF RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x10++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX5_0,AXBAR Partition 3 ADMAIF RX5 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x14++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX6_0,AXBAR Partition 3 ADMAIF RX6 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x18++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX7_0,AXBAR Partition 3 ADMAIF RX7 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1C++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX8_0,AXBAR Partition 3 ADMAIF RX8 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x20++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX9_0,AXBAR Partition 3 ADMAIF RX9 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x24++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX10_0,AXBAR Partition 3 ADMAIF RX10 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x28++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX11_0,AXBAR Partition 3 ADMAIF RX11 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x2C++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX12_0,AXBAR Partition 3 ADMAIF RX12 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x30++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX13_0,AXBAR Partition 3 ADMAIF RX13 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x34++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX14_0,AXBAR Partition 3 ADMAIF RX14 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x38++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX15_0,AXBAR Partition 3 ADMAIF RX15 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x3C++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX16_0,AXBAR Partition 3 ADMAIF RX16 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x40++0x03
line.long 0x00 "AXBAR_PART_3_I2S1_RX1_0,AXBAR Partition 3 I2S1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x44++0x03
line.long 0x00 "AXBAR_PART_3_I2S2_RX1_0,AXBAR Partition 3 I2S2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x48++0x03
line.long 0x00 "AXBAR_PART_3_I2S3_RX1_0,AXBAR Partition 3 I2S3 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x4C++0x03
line.long 0x00 "AXBAR_PART_3_I2S4_RX1_0,AXBAR Partition 3 I2S4 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x50++0x03
line.long 0x00 "AXBAR_PART_3_I2S5_RX1_0,AXBAR Partition 3 I2S5 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x54++0x03
line.long 0x00 "AXBAR_PART_3_I2S6_RX1_0,AXBAR Partition 3 I2S6 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x60++0x03
line.long 0x00 "AXBAR_PART_3_SFC1_RX1_0,AXBAR Partition 3 SFC1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x64++0x03
line.long 0x00 "AXBAR_PART_3_SFC2_RX1_0,AXBAR Partition 3 SFC2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "AXBAR_PART_3_SFC3_RX1_0,AXBAR Partition 3 SFC3 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x6C++0x03
line.long 0x00 "AXBAR_PART_3_SFC4_RX1_0,AXBAR Partition 3 SFC4 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x80++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX1_0,AXBAR Partition 3 MIXER1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x84++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX2_0,AXBAR Partition 3 MIXER1 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x88++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX3_0,AXBAR Partition 3 MIXER1 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x8C++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX4_0,AXBAR Partition 3 MIXER1 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x90++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX5_0,AXBAR Partition 3 MIXER1 RX5 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x94++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX6_0,AXBAR Partition 3 MIXER1 RX6 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x98++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX7_0,AXBAR Partition 3 MIXER1 RX7 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x9C++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX8_0,AXBAR Partition 3 MIXER1 RX8 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xA0++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX9_0,AXBAR Partition 3 MIXER1 RX9 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xA4++0x03
line.long 0x00 "AXBAR_PART_3_MIXER1_RX10_0,AXBAR Partition 3 MIXER1 RX10 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xC0++0x03
line.long 0x00 "AXBAR_PART_3_DSPK1_RX1_0,AXBAR Partition 3 DSPK1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xC4++0x03
line.long 0x00 "AXBAR_PART_3_DSPK2_RX1_0,AXBAR Partition 3 DSPK2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xD0++0x03
line.long 0x00 "AXBAR_PART_3_SPDIF1_RX1_0,AXBAR Partition 3 SPDIF1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xD4++0x03
line.long 0x00 "AXBAR_PART_3_SPDIF1_RX2_0,AXBAR Partition 3 SPDIF1 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xE0++0x03
line.long 0x00 "AXBAR_PART_3_AFC1_RX1_0,AXBAR Partition 3 AFC1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xE4++0x03
line.long 0x00 "AXBAR_PART_3_AFC2_RX1_0,AXBAR Partition 3 AFC2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xE8++0x03
line.long 0x00 "AXBAR_PART_3_AFC3_RX1_0,AXBAR Partition 3 AFC3 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xEC++0x03
line.long 0x00 "AXBAR_PART_3_AFC4_RX1_0,AXBAR Partition 3 AFC4 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "AXBAR_PART_3_AFC5_RX1_0,AXBAR Partition 3 AFC5 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0xF4++0x03
line.long 0x00 "AXBAR_PART_3_AFC6_RX1_0,AXBAR Partition 3 AFC6 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "AXBAR_PART_3_OPE1_RX1_0,AXBAR Partition 3 OPE1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "AXBAR_PART_3_SPKPROT1_RX1_0,AXBAR Partition 3 SPKPROT1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x120++0x03
line.long 0x00 "AXBAR_PART_3_MVC1_RX1_0,AXBAR Partition 3 MVC1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x124++0x03
line.long 0x00 "AXBAR_PART_3_MVC2_RX1_0,AXBAR Partition 3 MVC2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x140++0x03
line.long 0x00 "AXBAR_PART_3_AMX1_RX1_0,AXBAR Partition 3 AMX1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x144++0x03
line.long 0x00 "AXBAR_PART_3_AMX1_RX2_0,AXBAR Partition 3 AMX1 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x148++0x03
line.long 0x00 "AXBAR_PART_3_AMX1_RX3_0,AXBAR Partition 3 AMX1 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x14C++0x03
line.long 0x00 "AXBAR_PART_3_AMX1_RX4_0,AXBAR Partition 3 AMX1 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x150++0x03
line.long 0x00 "AXBAR_PART_3_AMX2_RX1_0,AXBAR Partition 3 AMX2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x154++0x03
line.long 0x00 "AXBAR_PART_3_AMX2_RX2_0,AXBAR Partition 3 AMX2 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x158++0x03
line.long 0x00 "AXBAR_PART_3_AMX2_RX3_0,AXBAR Partition 3 AMX2 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x15C++0x03
line.long 0x00 "AXBAR_PART_3_AMX2_RX4_0,AXBAR Partition 3 AMX2 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x160++0x03
line.long 0x00 "AXBAR_PART_3_AMX3_RX1_0,AXBAR Partition 3 AMX3 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x164++0x03
line.long 0x00 "AXBAR_PART_3_AMX3_RX2_0,AXBAR Partition 3 AMX3 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x168++0x03
line.long 0x00 "AXBAR_PART_3_AMX3_RX3_0,AXBAR Partition 3 AMX3 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x16C++0x03
line.long 0x00 "AXBAR_PART_3_AMX3_RX4_0,AXBAR Partition 3 AMX3 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x180++0x03
line.long 0x00 "AXBAR_PART_3_ADX1_RX1_0,AXBAR Partition 3 ADX1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x184++0x03
line.long 0x00 "AXBAR_PART_3_ADX2_RX1_0,AXBAR Partition 3 ADX2 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x188++0x03
line.long 0x00 "AXBAR_PART_3_ADX3_RX1_0,AXBAR Partition 3 ADX3 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x18C++0x03
line.long 0x00 "AXBAR_PART_3_ADX4_RX1_0,AXBAR Partition 3 ADX4 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x190++0x03
line.long 0x00 "AXBAR_PART_3_AMX4_RX1_0,AXBAR Partition 3 AMX4 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x194++0x03
line.long 0x00 "AXBAR_PART_3_AMX4_RX2_0,AXBAR Partition 3 AMX4 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x198++0x03
line.long 0x00 "AXBAR_PART_3_AMX4_RX3_0,AXBAR Partition 3 AMX4 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x19C++0x03
line.long 0x00 "AXBAR_PART_3_AMX4_RX4_0,AXBAR Partition 3 AMX4 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1A0++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX17_0,AXBAR Partition 3 ADMAIF RX17 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1A4++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX18_0,AXBAR Partition 3 ADMAIF RX18 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1A8++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX19_0,AXBAR Partition 3 ADMAIF RX19 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1AC++0x03
line.long 0x00 "AXBAR_PART_3_ADMAIF_RX20_0,AXBAR Partition 3 ADMAIF RX20 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1B0++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX1_0,AXBAR Partition 3 ASRC1 RX1 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1B4++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX2_0,AXBAR Partition 3 ASRC1 RX2 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1B8++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX3_0,AXBAR Partition 3 ASRC1 RX3 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1BC++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX4_0,AXBAR Partition 3 ASRC1 RX4 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1C0++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX5_0,AXBAR Partition 3 ASRC1 RX5 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1C4++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX6_0,AXBAR Partition 3 ASRC1 RX6 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
group.long 0x1C8++0x03
line.long 0x00 "AXBAR_PART_3_ASRC1_RX7_0,AXBAR Partition 3 ASRC1 RX7 Register"
bitfld.long 0x00 29. " ASRC1_TX6   ,ASRC1 TX6" "Disabled,Enabled"
bitfld.long 0x00 28. "  ASRC1_TX5   ,ASRC1 TX5" "Disabled,Enabled"
bitfld.long 0x00 27. "  ASRC1_TX4    ,ASRC1 TX4" "Disabled,Enabled"
bitfld.long 0x00 26. "  ASRC1_TX3   ,ASRC1 TX3" "Disabled,Enabled"
bitfld.long 0x00 25. "  ASRC1_TX2 ,ASRC1 TX2" "Disabled,Enabled"
bitfld.long 0x00 24. "  ASRC1_TX1 ,ASRC1 TX1" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 19. " ADMAIF_TX20 ,ADMAIF TX20" "Disabled,Enabled"
bitfld.long 0x00 18. "  ADMAIF_TX19 ,ADMAIF TX19" "Disabled,Enabled"
bitfld.long 0x00 17. "  ADMAIF_TX18  ,ADMAIF TX18" "Disabled,Enabled"
bitfld.long 0x00 16. "  ADMAIF_TX17 ,ADMAIF TX17" "Disabled,Enabled"
bitfld.long 0x00 7. "  ADX4_TX4  ,ADX4 TX4" "Disabled,Enabled"
bitfld.long 0x00 6. "  ADX4_TX3  ,ADX4 TX3" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " ADX4_TX2    ,ADX4 TX2" "Disabled,Enabled"
bitfld.long 0x00 4. "  ADX4_TX1    ,ADX4 TX1" "Disabled,Enabled"
bitfld.long 0x00 3. "  ADX3_TX4     ,ADX3 TX4" "Disabled,Enabled"
bitfld.long 0x00 2. "  ADX3_TX3    ,ADX3 TX3" "Disabled,Enabled"
bitfld.long 0x00 1. "  ADX3_TX2  ,ADX3 TX2" "Disabled,Enabled"
bitfld.long 0x00 0. "  ADX3_TX1  ,ADX3 TX1" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "SFC"
tree "SFC1"
base ad:0x02902000
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE         ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE         ,RX done" "Unmasked,Masked"
group.long 0x20++0x07
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE         ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE         ,TX done" "Unmasked,Masked"
group.long 0x60++0x07
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , EXPAND" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE          ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET      ,Soft reset" "False,True"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN         ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN      ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS   ,Enable status" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE         ,TX done" "False,True"
bitfld.long 0x04 0. "     RX_DONE         ,RX done" "False,True"
width 0x0B
tree.end
tree "SFC2"
base ad:0x02902200
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE         ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE         ,RX done" "Unmasked,Masked"
group.long 0x20++0x07
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE         ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE         ,TX done" "Unmasked,Masked"
group.long 0x60++0x07
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , EXPAND" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE          ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET      ,Soft reset" "False,True"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN         ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN      ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS   ,Enable status" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE         ,TX done" "False,True"
bitfld.long 0x04 0. "     RX_DONE         ,RX done" "False,True"
width 0x0B
tree.end
tree "SFC3"
base ad:0x02902400
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE         ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE         ,RX done" "Unmasked,Masked"
group.long 0x20++0x07
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE         ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE         ,TX done" "Unmasked,Masked"
group.long 0x60++0x07
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , EXPAND" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE          ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET      ,Soft reset" "False,True"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN         ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN      ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS   ,Enable status" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE         ,TX done" "False,True"
bitfld.long 0x04 0. "     RX_DONE         ,RX done" "False,True"
width 0x0B
tree.end
tree "SFC4"
base ad:0x02902600
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE         ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE         ,RX done" "Unmasked,Masked"
group.long 0x20++0x07
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_FREQ_0,AXBAR RX Frequency Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE         ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE         ,TX done" "Unmasked,Masked"
group.long 0x60++0x07
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS ,CLIENT channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS , AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS     , CLIENT bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND          , EXPAND" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     , Stereo CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  , REPLICATE" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE        , Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       , Mono CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_FREQ_0, AXBAR_TX_FREQ_0 Register"
bitfld.long 0x04 0.--3. " FS_IN           ,FS_IN" "FS8,FS11_025,FS16,FS22_05,FS24,FS32,FS44_1,FS48,FS64,FS88_2,FS96,FS176_4,FS192,?..."
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE          ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET      ,Soft reset" "False,True"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN         ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN      ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS   ,Enable status" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE         ,TX done" "False,True"
bitfld.long 0x04 0. "     RX_DONE         ,RX done" "False,True"
width 0x0B
tree.end
tree.end
tree "I2S"
tree "I2S1"
base ad:0x02901000
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "I2S2"
base ad:0x02901100
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "I2S3"
base ad:0x02901200
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "I2S4"
base ad:0x02901300
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "I2S5"
base ad:0x02901400
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree "I2S6"
base ad:0x02901500
width 31.
group.long 0x00++0x07
line.long 0x00 "AXBAR_RX_ENABLE_0,AXBAR RX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_RX_SOFT_RESET_0,AXBAR RX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL            ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     RX_ENABLED                  ,RX enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE                    ,RX done" "False,True"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX_LOWER_WATERMARK         ,RX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    RX_NORMAL_WATERMARK         ,RX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  RXCIF_FIFO_UNDERRUN         ,RXCIF FIFO underrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " RX_DONE                    ,RX done" "Unmasked,Masked"
group.long 0x20++0x0F
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_RX_CTRL_0,AXBAR RX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,RX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--2. "         HIGHZ_CTR                   ,HIGHZ_CTR" "NOHIGHZ,HIGHZ,HIGHZ_ON_HALF_BIT_CLK,?..."
textline "                                        "
bitfld.long 0x04 0. " BIT_ORDER                  ,BIT order" "MSB first,LSB first"
line.long 0x08 "AXBAR_RX_SLOT_CTRL_0,AXBAR RX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_RX_CLK_TRIM_0,AXBAR RX Clock Trimmer Register"
bitfld.long 0x0C 0.--4. " TRIM_SEL                   ,Clock trimmer for I2S RX clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x40++0x07
line.long 0x00 "AXBAR_TX_ENABLE_0,AXBAR TX Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "AXBAR_TX_SOFT_RESET_0,AXBAR TX Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " TXCIF_FIFO_FULL            ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                  ,TX enabled" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "False,True"
textline "                                        "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE                    ,TX done" "False,True"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX_LOWER_WATERMARK         ,TX lower watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    TX_NORMAL_WATERMARK         ,TX normal watermark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TXCIF_FIFO_OVERRUN          ,TXCIF FIFO overrun" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 0. " TX_DONE                    ,TX done" "Unmasked,Masked"
group.long 0x60++0x0F
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD             ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS              ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS             ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                        "
bitfld.long 0x00 12.--14. " AXBAR_BITS                 ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS                 ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "ZERO,ONE,LFSR,?..."
textline "                                        "
bitfld.long 0x00 4.--5. " STEREO_MONO_CONV           ,Stereo mono CONV" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2.--3. "         FIFO_SIZE_DOWNSHIFT         ,FIFO_SIZE_DOWNSHIFT" "0,1,2,3"
endif
bitfld.long 0x00 1. "         TRUNCATE                    ,Truncate" "Round,Chop"
textline "                                        "
bitfld.long 0x00 0. " MONO_STEREO_CONV           ,Mono stereo CONV" "Zero,Copy"
line.long 0x04 "AXBAR_TX_CTRL_0,AXBAR TX Control Register"
hexmask.long.word 0x04 8.--18. 0x01 " DATA_OFFSET                ,TX data offset to FSYNC"
bitfld.long 0x04 4.--6. "        MASK_BITS                   ,Set these mask bits to get the exact bit size in PCM mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "         BIT_ORDER                   ,Bit order" "MSB first,LSB first"
line.long 0x08 "AXBAR_TX_SLOT_CTRL_0,AXBAR TX Slot Control Register"
hexmask.long.word 0x08 0.--15. 1. " SLOT_ENABLES               ,Used in TDM mode to indicate which of the TDM slots contain data"
line.long 0x0C "AXBAR_TX_CLK_TRIM_0,AXBAR TX Clock Trimmer Register"
bitfld.long 0x0C 8.--12. " TRIM_SEL_MASTER            ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          TRIM_SEL_SLAVE              ,Clock trimmer for pad->Rx pad macro flops in slave mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE                     ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET                 ,Soft reset" "Disabled,Enabled"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_ENABLE                ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 12. " SLCG_CLKEN                 ,SLCG clock enable" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL             ,RXCI FIFO full" "False,True"
bitfld.long 0x00 9. "     RXCIF_FIFO_EMPTY            ,RXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 8. " RX_ENABLED                 ,RX enabled" "False,True"
bitfld.long 0x00 2. "       TXCIF_FIFO_FULL             ,TXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "     TXCIF_FIFO_EMPTY            ,TXCIF FIFO empty" "False,True"
textline "                                        "
bitfld.long 0x00 0. " TX_ENABLED                 ,TX enabled" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11. " RX_LOWER_WATERMARK         ,RX lower watermark" "False,True"
bitfld.long 0x04 10. "       RX_NORMAL_WATERMARK         ,RX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN        ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE                     ,RX done" "False,True"
textline "                                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 3. " TX_UPPER_WATERMARK         ,TX upper watermark" "False,True"
bitfld.long 0x04 2. "       TX_NORMAL_WATERMARK         ,TX normal watermark" "False,True"
textline "                                        "
endif
bitfld.long 0x04 1. " TXCIF_FIFO_OVERRUN         ,TXCIF FIFO overrun" "False,True"
bitfld.long 0x04 0. "       TX_DONE                     ,TX done" "False,True"
group.long 0xA0++0x0F
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 24.--31. 1. " FSYNC_WIDTH                ,Number of bit clocks"
bitfld.long 0x00 20. "          EDGE_CTR                    ,Indicates on which edge to drive data and on which edge to sample data" "Positive,Negative"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
else
bitfld.long 0x00 19. "  PIPE_MACRO_EN               ,Enable pipe macro stage" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 12.--14. " FRAME_FORMAT               ,Frame format" "LRCK mode,FSYNC mode,?..."
bitfld.long 0x00 10. "  MASTER                      ,Controller Master/Slave mode selection" "Disabled,Enabled"
bitfld.long 0x00 9. "  LRCK_POLARITY               ,Left/Right control polarity" "Low,High"
textline "                                        "
bitfld.long 0x00 8. " LPBK                       ,Tx->Rx loop back enable" "Disabled,Enabled"
bitfld.long 0x00 0.--2. "    BIT_SIZE                    ,Bits per sample" ",BIT_SIZE_8,BIT_SIZE_12,BIT_SIZE_16,BIT_SIZE_20,BIT_SIZE_24,BIT_SIZE_28,BIT_SIZE_32"
line.long 0x04 "TIMING_0,Timing Register"
bitfld.long 0x04 12. " NON_SYM_EN                 ,Enables non-symmetry mode" "Disabled,Enabled"
hexmask.long.word 0x04 0.--10. 1. "    CHANNEL_BIT_CNT             ,Number of bit clocks"
line.long 0x08 "SLOT_CTRL_0,Slot Control"
bitfld.long 0x08 0.--3. " TOTAL_SLOTS                ,Number of slots when TDM mode is used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CLK_TRIM_0,Clock Trimmer"
bitfld.long 0x0C 8.--12. " SCLK_TRIM_SEL              ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "          CORE_TRIM_SEL               ,Clock trimmer for core I2S clock segment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 0x0B
tree.end
tree.end
tree "SPDIF"
base ad:0x02906000
width 30.
if (((d.l(ad:0x02906000+0x00))&0x20000000)==0x20000000)||(((d.l(ad:0x02906000+0x00))&0x10000000)==0x10000000)
group.long 0x00++0x17
line.long 0x00 "SPDIF_CTRL_0,SPDIF Control Register"
bitfld.long 0x00 31. " FLOWCTL_EN ,Enable flow control" "Disabled,Enabled"
bitfld.long 0x00 30. "  CAP_LC ,Start capturing from left/right channel" "Right_Ch,Left_Ch"
bitfld.long 0x00 29. "  RX_EN      ,SPDIF receiver enable" "Disabled,Enabled"
bitfld.long 0x00 28. "  TX_EN ,SPDIF transmitter enable" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x00 27. " TC_EN      ,Transmit channel status" "Disabled,Enabled"
rbitfld.long 0x00 26. "  TU_EN  ,Transmit user data" "Disabled,Enabled"
rbitfld.long 0x00 15. "  LBK_EN     ,Loopback test mode" "Disabled,Enabled"
rbitfld.long 0x00 14. "  PACK  ,Pack data mode (Single data/Packeted left or right ch# data into a single word)" "Single,Packeted"
textline "                                       "
rbitfld.long 0x00 12.--13. " BIT_MODE   ,Bit mode" "16bit,20bit,24bit,Raw"
bitfld.long 0x00 11. "     CG_EN  ,Second level clock gating enable" "Disabled,Enabled"
bitfld.long 0x00 7. "  SOFT_RESET ,Resets I2s logic including CIFs and flow control" "No reset,Reset"
else
group.long 0x00++0x17
line.long 0x00 "SPDIF_CTRL_0,SPDIF Control Register"
bitfld.long 0x00 31. " FLOWCTL_EN ,Enable flow control" "Disabled,Enabled"
bitfld.long 0x00 30. "  CAP_LC ,Start capturing from left/right channel" "Right_Ch,Left_Ch"
bitfld.long 0x00 29. "  RX_EN      ,SPDIF receiver enable" "Disabled,Enabled"
bitfld.long 0x00 28. "  TX_EN ,SPDIF transmitter enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " TC_EN      ,Transmit Channel status" "Disabled,Enabled"
bitfld.long 0x00 26. "  TU_EN  ,Transmit user Data" "Disabled,Enabled"
bitfld.long 0x00 15. "  LBK_EN     ,Loopback test mode" "Disabled,Enabled"
bitfld.long 0x00 14. "  PACK  ,Pack data mode (Single data/Packeted left or right ch# data into a single word)" "Single,Packeted"
textline "                                       "
bitfld.long 0x00 12.--13. " BIT_MODE   ,Bit mode" "16bit,20bit,24bit,Raw"
bitfld.long 0x00 11. "     CG_EN  ,Second level clock gating" "Disabled,Enabled"
bitfld.long 0x00 7. "  SOFT_RESET ,Resets I2s logic including CIFs and flow control" "No reset,Reset"
endif
textline "                                       "
group.long 0x04++0x13
line.long 0x00 "SPDIF_STROBE_CTRL_0,SPDIF Data Strobe Control Register"
hexmask.long.byte 0x00 16.--23. 1. " PERIOD         ,Indicates the approximate number of detected SPDIFIN clocks within a biphase period"
bitfld.long 0x00 15. "      STROBE         ,SPDIFIN Data Strobe Mode" "Auto,Manual"
bitfld.long 0x00 8.--12. "    DATA_STROBES    ,Manual data strobe time within the biphase clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "        CLOCK_PERIOD   ,Manual SPDIFIN biphase clock period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x8++0x03
line.long 0x00 "SPDIF_AUDIOCIF_TXDATA_CTRL_0,SPDIF AUDIOCIF TXDATA Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "      AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 12.--14. "      AUDIO_BITS     ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
textline "                                       "
bitfld.long 0x00 8.--10. " CLIENT_BITS    ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
bitfld.long 0x00 6.--7. "   EXPAND         ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     ,Stereo conv" "Ch0,Ch1,AVG,?..."
bitfld.long 0x00 3. "       REPLICATE      ,Replicate" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x00 2. " DIRCETION      ,Direction" "TXCIF,RXCIF"
bitfld.long 0x00 1. "   TRUNCATE       ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       ,Mono conv" "Zero,Copy"
group.long 0xC++0x03
line.long 0x00 "SPDIF_AUDIOCIF_RXDATA_CTRL_0,SPDIF AUDIOCIF RXDATA Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "      AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 12.--14. "      AUDIO_BITS     ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
textline "                                       "
bitfld.long 0x00 8.--10. " CLIENT_BITS    ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
bitfld.long 0x00 6.--7. "   EXPAND         ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     ,Stereo conv" "Ch0,Ch1,AVG,?..."
bitfld.long 0x00 3. "       REPLICATE      ,Replicate" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x00 2. " DIRCETION      ,Direction" "TXCIF,RXCIF"
bitfld.long 0x00 1. "   TRUNCATE       ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       ,Mono conv" "Zero,Copy"
group.long 0x10++0x03
line.long 0x00 "SPDIF_AUDIOCIF_TXUSER_CTRL_0,SPDIF AUDIOCIF TXUSER Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "      AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 12.--14. "      AUDIO_BITS     ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
textline "                                       "
bitfld.long 0x00 8.--10. " CLIENT_BITS    ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
bitfld.long 0x00 6.--7. "   EXPAND         ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     ,Stereo conv" "Ch0,Ch1,AVG,?..."
bitfld.long 0x00 3. "       REPLICATE      ,Replicate" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x00 2. " DIRCETION      ,Direction" "TXCIF,RXCIF"
bitfld.long 0x00 1. "   TRUNCATE       ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       ,Mono conv" "Zero,Copy"
group.long 0x14++0x03
line.long 0x00 "SPDIF_AUDIOCIF_RXUSER_CTRL_0,SPDIF AUDIOCIF RXUSER Control Register"
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 20.--23. "      AUDIO_CHANNELS ,Audio channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 16.--19. "      CLIENT_CHANNELS ,Client channels" "Ch1,Ch2,Ch3,Ch4,Ch5,Ch6,Ch7,Ch8,Ch9,CH10,CH11,Ch12,Ch13,Ch14,Ch15,Ch16"
bitfld.long 0x00 12.--14. "      AUDIO_BITS     ,Audio bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
textline "                                       "
bitfld.long 0x00 8.--10. " CLIENT_BITS    ,Client bits" "Bit4,Bit8,Bit12,Bit16,Bit20,Bit24,Bit28,Bit32"
bitfld.long 0x00 6.--7. "   EXPAND         ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV     ,Stereo conv" "Ch0,Ch1,AVG,?..."
bitfld.long 0x00 3. "       REPLICATE      ,Replicate" "Disabled,Enabled"
textline "                                       "
rbitfld.long 0x00 2. " DIRCETION      ,Direction" "TXCIF,RXCIF"
bitfld.long 0x00 1. "   TRUNCATE       ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV       ,Mono conv" "Zero,Copy"
rgroup.long 0x18++0x17
line.long 0x00 "SPDIF_CH_STA_RX_A_0,SPDIF Channel Status Rx Page Buffer Register A"
line.long 0x04 "SPDIF_CH_STA_RX_B_0,SPDIF Channel Status Rx Page Buffer Register B"
line.long 0x08 "SPDIF_CH_STA_RX_C_0,SPDIF Channel Status Rx Page Buffer Register C"
line.long 0x0C "SPDIF_CH_STA_RX_D_0,SPDIF Channel Status Rx Page Buffer Register D"
line.long 0x10 "SPDIF_CH_STA_RX_E_0,SPDIF Channel Status Rx Page Buffer Register E"
line.long 0x14 "SPDIF_CH_STA_RX_F_0,SPDIF Channel Status Rx Page Buffer Register F"
group.long 0x30++0x17
line.long 0x00 "SPDIF_CH_STA_TX_A_0,SPDIF Channel Status Tx Page Buffer Register A"
line.long 0x04 "SPDIF_CH_STA_TX_B_0,SPDIF Channel Status Tx Page Buffer Register B"
line.long 0x08 "SPDIF_CH_STA_TX_C_0,SPDIF Channel Status Tx Page Buffer Register C"
line.long 0x0C "SPDIF_CH_STA_TX_D_0,SPDIF Channel Status Tx Page Buffer Register D"
line.long 0x10 "SPDIF_CH_STA_TX_E_0,SPDIF Channel Status Tx Page Buffer Register E"
line.long 0x14 "SPDIF_CH_STA_TX_F_0,SPDIF Channel Status Tx Page Buffer Register F"
group.long 0x70++0x0B
line.long 0x00 "SPDIF_FLOWCTL_CTRL_0,SPDIF Flowctl Ctrl 0"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 31. " FILTER         ,Quadric filter" "Linear,Quad"
elif cpuis("TEGRAX1")
bitfld.long 0x00 31. " FILTER         ,Quadric filter" "Linear,Quad"
else
bitfld.long 0x00 31. " FILTER         ,Quadric filter" ",Quad"
endif
bitfld.long 0x00 30. "    DUMMY_WR_EN    ,Insert a dummy frame when enabled" "Disabled,Enabled"
bitfld.long 0x00 8.--11. "  START_THRESHOLD ,Flow control" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 4.--7. "        HIGH_THRESHOLD ,High-threshold for HIGH state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline "                                       "
bitfld.long 0x00 0.--3. " LOW_THRESHOLD  ,Low-threshold for LOW state" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
line.long 0x04 "SPDIF_TX_STEP_0,SPDIF TX Step"
hexmask.long.word 0x04 0.--15. 1. " STEP_SIZE      ,Step size"
line.long 0x08 "SPDIF_FLOW_STATUS_0,Flow Controller Monitor/Counter"
bitfld.long 0x08 31. " FLOW_UNDERFLOW ,FIFO depth  is less than threshold" "Normal,Under"
bitfld.long 0x08 30. "    FLOW_OVERFLOW  ,FIFO depth is greater than threshold" "Normal,Over"
bitfld.long 0x08 4. "    MONITOR_INT_EN  ,Enable monitor interrupt to APBIF" "Disabled,Enabled"
bitfld.long 0x08 3. "  COUNTER_CLR    ,Clear counter" "0,1"
textline "                                       "
bitfld.long 0x08 2. " MONITOR_CLR    ,Clear monitor" "0,1"
bitfld.long 0x08 1. "         COUNTER_EN     ,Enable counter" "Disabled,Enabled"
bitfld.long 0x08 0. "  MONITOR_EN      ,Enable monitor" "Disabled,Enabled"
rgroup.long 0x7C++0x0B
line.long 0x00 "SPDIF_FLOW_TOTAL_0,Spdif Flow Total"
line.long 0x04 "SPDIF_FLOW_OVER_0,Spdif Flow Over"
line.long 0x08 "SPDIF_FLOW_UNDER_0,Spdif Flow Under"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
group.long 0xAC++0x07
line.long 0x00 "SPDIF_INT_STATUS_0_SET/CLR,SPDIF Interrupt Status Register"
setclrfld.long 0x00 15. 0x08 15. 0x0C 15. " USER_TX_DONE                ,User TX done" "False,True"
setclrfld.long 0x00 14. 0x08 14. 0x0C 14. "     USER_RX_DONE                ,User RX done" "False,True"
setclrfld.long 0x00 13. 0x08 13. 0x0C 13. "     DATA_TX_DONE               ,Data TX done" "False,True"
textline "                                       "
setclrfld.long 0x00 12. 0x08 12. 0x0C 12. " DATA_RX_DONE                ,Data RX done" "False,True"
setclrfld.long 0x00 11. 0x08 11. 0x0C 11. "     USER_TXCIF_OVERRUN          ,User TXCIF overrun" "False,True"
setclrfld.long 0x00 10. 0x08 10. 0x0C 10. "     DATA_TXCIF_OVERRUN         ,Data TXCIF overrun" "False,True"
textline "                                       "
setclrfld.long 0x00 9. 0x08 9. 0x0C 9. " USER_RXCIF_UNDERRUN         ,User RXCIF underrun" "False,True"
setclrfld.long 0x00 8. 0x08 8. 0x0C 8. "     DATA_RXCIF_UNDERRUN         ,Data RXCIF underrun" "False,True"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. "     RX_IU                      ,RX IU" "False,True"
textline "                                       "
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX_CHANNEL                  ,RX channel" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     FLOW_CTL_INT                ,Flow CTL INT" "False,True"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     BAD_PREAMBLE               ,Bad preamble" "False,True"
textline "                                       "
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " BSYNC                       ,BSYNC" "False,True"
line.long 0x04 "SPDIF_INT_MASK_0,SPDIF Interrupt Mask Register"
bitfld.long 0x04 15. " USER_TX_DONE                ,User TX done" "Unmasked,Masked"
bitfld.long 0x04 14. "  USER_RX_DONE                ,User RX done" "Unmasked,Masked"
bitfld.long 0x04 13. "  DATA_TX_DONE               ,Data TX done" "Unmasked,Masked"
textline "                                       "
bitfld.long 0x04 12. " DATA_RX_DONE                ,Data RX done" "Unmasked,Masked"
bitfld.long 0x04 11. "  USER_TXCIF_OVERRUN          ,User TXCIF overrun" "Unmasked,Masked"
bitfld.long 0x04 10. "  DATA_TXCIF_OVERRUN         ,Data TXCIF overrun" "Unmasked,Masked"
textline "                                       "
bitfld.long 0x04 9. " USER_RXCIF_UNDERRUN         ,User RXCIF underrun" "Unmasked,Masked"
bitfld.long 0x04 8. "  DATA_RXCIF_UNDERRUN         ,Data RXCIF underrun" "Unmasked,Masked"
bitfld.long 0x04 4. "  RX_IU                      ,RX IU" "Unmasked,Masked"
textline "                                       "
bitfld.long 0x04 3. " RX_CHANNEL                  ,RX channel" "Unmasked,Masked"
bitfld.long 0x04 2. "  FLOW_CTL_INT                ,Flow CTL INT" "Unmasked,Masked"
bitfld.long 0x04 1. "  BAD_PREAMBLE               ,Bad preamble" "Unmasked,Masked"
textline "                                       "
bitfld.long 0x04 0. " BSYNC                       ,BSYNC" "Unmasked,Masked"
rgroup.long 0xBC++0x03
line.long 0x00 "SPDIF_LIVE_STATUS_0,SPDIF Live Status Register"
bitfld.long 0x00 24. " TXC_BSY                     ,TXC BSY" "0,1"
bitfld.long 0x00 19. "         USER_TX_FIFO_FULL           ,User TX FIFO full" "False,True"
bitfld.long 0x00 18. "     USER_TX_FIFO_EMPTY         ,User TX FIFO empty" "False,True"
textline "                                       "
bitfld.long 0x00 17. " DATA_TX_FIFO_FULL           ,Data TX FIFO full" "False,True"
bitfld.long 0x00 16. "     DATA_TX_FIFO_EMPTY          ,Data TX FIFO empty" "False,True"
bitfld.long 0x00 11. "     USER_RX_FIFO_FULL          ,User RX FIFO full" "False,True"
textline "                                       "
bitfld.long 0x00 10. " USER_RX_FIFO_EMPTY          ,User RX FIFO empty" "False,True"
bitfld.long 0x00 9. "     DATA_RX_FIFO_FULL           ,Data RX FIFO full" "False,True"
bitfld.long 0x00 8. "     DATA_RX_FIFO_EMPTY         ,Data RX FIFO empty" "False,True"
textline "                                       "
bitfld.long 0x00 3. " USER_TX_ENABLED             ,User TX enabled" "False,True"
bitfld.long 0x00 2. "     USER_RX_ENABLED             ,User RX enabled" "False,True"
bitfld.long 0x00 1. "     DATA_TX_ENABLED            ,Data TX enabled" "False,True"
textline "                                       "
bitfld.long 0x00 0. " DATA_RX_ENABLED             ,Data RX enabled" "False,True"
endif
width 0x0B
tree.end
tree "AMX"
tree "AMX1"
base ad:0x02903000
width 35.
rgroup.long 0x0C++0x03
line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "      ACIF_FIFO3_FULL   ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY  ,ACIF FIFO3 empty" "False,True"
textline "                                            "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "      ACIF_FIFO1_FULL   ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY  ,ACIF FIFO1 empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE          ,RX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     RX3_DONE          ,RX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "      RX2_DONE          ,RX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     RX1_DONE          ,RX1 done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX4_DONE          ,RX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  RX3_DONE          ,RX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "   RX2_DONE          ,RX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  RX1_DONE          ,RX1 done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x24++0x03
line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x28++0x03
line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x2C++0x03
line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE           ,TX done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE           ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "       TRUNCATE          ,Truncate" "Round,Chop"
textline "                                            "
rbitfld.long 0x00 0. " MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
textline "                                            "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x80++0x0B
line.long 0x00 "AMX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "AMX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "AMX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "      ENABLE_STATUS     ,Enable status" "False,True"
line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " TX_DONE           ,TX done" "Clear,Set"
bitfld.long 0x04 3. "     RX4_DONE          ,RX4 done" "Clear,Set"
bitfld.long 0x04 2. "      RX3_DONE          ,RX3 done" "Clear,Set"
bitfld.long 0x04 1. "     RX2_DONE          ,RX2 done" "Clear,Set"
textline "                                            "
bitfld.long 0x04 0. " RX1_DONE          ,RX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "AMX_CTRL_0,AMX Control Register"
bitfld.long 0x00 14.--15. " MSTR_RX_NUM       ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4"
bitfld.long 0x00 12.--13. "       RX_DEP            ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..."
bitfld.long 0x00 11. "  RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "   RX4_EN            ,RX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  RX3_EN            ,RX3 enable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 1. " RX2_EN            ,RX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  RX1_EN            ,RX1 enable" "Disabled,Enabled"
line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "AMX2"
base ad:0x02903100
width 35.
rgroup.long 0x0C++0x03
line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "      ACIF_FIFO3_FULL   ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY  ,ACIF FIFO3 empty" "False,True"
textline "                                            "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "      ACIF_FIFO1_FULL   ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY  ,ACIF FIFO1 empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE          ,RX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     RX3_DONE          ,RX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "      RX2_DONE          ,RX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     RX1_DONE          ,RX1 done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX4_DONE          ,RX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  RX3_DONE          ,RX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "   RX2_DONE          ,RX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  RX1_DONE          ,RX1 done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x24++0x03
line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x28++0x03
line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x2C++0x03
line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE           ,TX done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE           ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "       TRUNCATE          ,Truncate" "Round,Chop"
textline "                                            "
rbitfld.long 0x00 0. " MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
textline "                                            "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x80++0x0B
line.long 0x00 "AMX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "AMX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "AMX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "      ENABLE_STATUS     ,Enable status" "False,True"
line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " TX_DONE           ,TX done" "Clear,Set"
bitfld.long 0x04 3. "     RX4_DONE          ,RX4 done" "Clear,Set"
bitfld.long 0x04 2. "      RX3_DONE          ,RX3 done" "Clear,Set"
bitfld.long 0x04 1. "     RX2_DONE          ,RX2 done" "Clear,Set"
textline "                                            "
bitfld.long 0x04 0. " RX1_DONE          ,RX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "AMX_CTRL_0,AMX Control Register"
bitfld.long 0x00 14.--15. " MSTR_RX_NUM       ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4"
bitfld.long 0x00 12.--13. "       RX_DEP            ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..."
bitfld.long 0x00 11. "  RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "   RX4_EN            ,RX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  RX3_EN            ,RX3 enable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 1. " RX2_EN            ,RX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  RX1_EN            ,RX1 enable" "Disabled,Enabled"
line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "AMX3"
base ad:0x02903200
width 35.
rgroup.long 0x0C++0x03
line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "      ACIF_FIFO3_FULL   ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY  ,ACIF FIFO3 empty" "False,True"
textline "                                            "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "      ACIF_FIFO1_FULL   ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY  ,ACIF FIFO1 empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE          ,RX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     RX3_DONE          ,RX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "      RX2_DONE          ,RX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     RX1_DONE          ,RX1 done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX4_DONE          ,RX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  RX3_DONE          ,RX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "   RX2_DONE          ,RX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  RX1_DONE          ,RX1 done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x24++0x03
line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x28++0x03
line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x2C++0x03
line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE           ,TX done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE           ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "       TRUNCATE          ,Truncate" "Round,Chop"
textline "                                            "
rbitfld.long 0x00 0. " MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
textline "                                            "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x80++0x0B
line.long 0x00 "AMX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "AMX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "AMX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "      ENABLE_STATUS     ,Enable status" "False,True"
line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " TX_DONE           ,TX done" "Clear,Set"
bitfld.long 0x04 3. "     RX4_DONE          ,RX4 done" "Clear,Set"
bitfld.long 0x04 2. "      RX3_DONE          ,RX3 done" "Clear,Set"
bitfld.long 0x04 1. "     RX2_DONE          ,RX2 done" "Clear,Set"
textline "                                            "
bitfld.long 0x04 0. " RX1_DONE          ,RX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "AMX_CTRL_0,AMX Control Register"
bitfld.long 0x00 14.--15. " MSTR_RX_NUM       ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4"
bitfld.long 0x00 12.--13. "       RX_DEP            ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..."
bitfld.long 0x00 11. "  RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "   RX4_EN            ,RX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  RX3_EN            ,RX3 enable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 1. " RX2_EN            ,RX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  RX1_EN            ,RX1 enable" "Disabled,Enabled"
line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "AMX4"
base ad:0x02903300
width 35.
rgroup.long 0x0C++0x03
line.long 0x00 "AMX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "      ACIF_FIFO3_FULL   ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY  ,ACIF FIFO3 empty" "False,True"
textline "                                            "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "      ACIF_FIFO1_FULL   ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY  ,ACIF FIFO1 empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AMX_AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " RX4_DONE          ,RX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     RX3_DONE          ,RX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "      RX2_DONE          ,RX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     RX1_DONE          ,RX1 done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 3. " RX4_DONE          ,RX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  RX3_DONE          ,RX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "   RX2_DONE          ,RX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  RX1_DONE          ,RX1 done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AMX_AXBAR_RX1_CIF_CTRL_0,AXBAR RX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x24++0x03
line.long 0x00 "AMX_AXBAR_RX2_CIF_CTRL_0,AXBAR RX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x28++0x03
line.long 0x00 "AMX_AXBAR_RX3_CIF_CTRL_0,AXBAR RX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x2C++0x03
line.long 0x00 "AMX_AXBAR_RX4_CIF_CTRL_0,AXBAR RX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
endif
textline "                                            "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "AMX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AMX_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE           ,TX done" "Clear,Set"
line.long 0x04 "AMX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE           ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AMX_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS        ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "       TRUNCATE          ,Truncate" "Round,Chop"
textline "                                            "
rbitfld.long 0x00 0. " MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV       ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 2. "       REPLICATE         ,Replicate" "False,True"
textline "                                            "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
group.long 0x80++0x0B
line.long 0x00 "AMX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "AMX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "AMX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "AMX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "      ENABLE_STATUS     ,Enable status" "False,True"
line.long 0x04 "AMX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " TX_DONE           ,TX done" "Clear,Set"
bitfld.long 0x04 3. "     RX4_DONE          ,RX4 done" "Clear,Set"
bitfld.long 0x04 2. "      RX3_DONE          ,RX3 done" "Clear,Set"
bitfld.long 0x04 1. "     RX2_DONE          ,RX2 done" "Clear,Set"
textline "                                            "
bitfld.long 0x04 0. " RX1_DONE          ,RX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "AMX_CTRL_0,AMX Control Register"
bitfld.long 0x00 14.--15. " MSTR_RX_NUM       ,MSTR_RX_NUM" "RX1,RX2,RX3,RX4"
bitfld.long 0x00 12.--13. "       RX_DEP            ,RX_DEP" "WT_ON_ALL,WT_ON_ANY,?..."
bitfld.long 0x00 11. "  RX4_FORCE_DISABLE ,RX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  RX3_FORCE_DISABLE ,RX3 force disable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 9. " RX2_FORCE_DISABLE ,RX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  RX1_FORCE_DISABLE ,RX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "   RX4_EN            ,RX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  RX3_EN            ,RX3 enable" "Disabled,Enabled"
textline "                                            "
bitfld.long 0x00 1. " RX2_EN            ,RX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  RX1_EN            ,RX1 enable" "Disabled,Enabled"
line.long 0x04 "AMX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "AMX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree.end
tree "ADX"
tree "ADX1"
base ad:0x02903800
width 27.
rgroup.long 0x0C++0x03
line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR   ,RX done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE           ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "     ACIF_FIFO3_FULL  ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True"
textline "                                    "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "     ACIF_FIFO1_FULL  ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR  ,TX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     TX3_DONE_SET/CLR  ,TX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX2_DONE_SET/CLR ,TX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     TX1_DONE_SET/CLR ,TX1 done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX4_DONE          ,TX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  TX3_DONE          ,TX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX2_DONE         ,TX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  TX1_DONE         ,TX1 done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x64++0x03
line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x68++0x03
line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x6C++0x03
line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ADX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "ADX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "ADX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " RX_DONE           ,RX done" "Clear,Set"
bitfld.long 0x04 3. "     TX4_DONE          ,TX4 done" "Clear,Set"
bitfld.long 0x04 2. "     TX3_DONE         ,TX3 done" "Clear,Set"
bitfld.long 0x04 1. "     TX2_DONE         ,TX2 done" "Clear,Set"
textline "                                    "
bitfld.long 0x04 0. " TX1_DONE          ,TX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "ADX_CTRL_0,ADX Control Register"
bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "  TX4_EN           ,TX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  TX3_EN           ,TX3 enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 1. " TX2_EN            ,TX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  TX1_EN            ,TX1 enable" "Disabled,Enabled"
line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "ADX2"
base ad:0x02903900
width 27.
rgroup.long 0x0C++0x03
line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR   ,RX done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE           ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "     ACIF_FIFO3_FULL  ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True"
textline "                                    "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "     ACIF_FIFO1_FULL  ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR  ,TX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     TX3_DONE_SET/CLR  ,TX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX2_DONE_SET/CLR ,TX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     TX1_DONE_SET/CLR ,TX1 done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX4_DONE          ,TX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  TX3_DONE          ,TX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX2_DONE         ,TX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  TX1_DONE         ,TX1 done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x64++0x03
line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x68++0x03
line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x6C++0x03
line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ADX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "ADX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "ADX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " RX_DONE           ,RX done" "Clear,Set"
bitfld.long 0x04 3. "     TX4_DONE          ,TX4 done" "Clear,Set"
bitfld.long 0x04 2. "     TX3_DONE         ,TX3 done" "Clear,Set"
bitfld.long 0x04 1. "     TX2_DONE         ,TX2 done" "Clear,Set"
textline "                                    "
bitfld.long 0x04 0. " TX1_DONE          ,TX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "ADX_CTRL_0,ADX Control Register"
bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "  TX4_EN           ,TX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  TX3_EN           ,TX3 enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 1. " TX2_EN            ,TX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  TX1_EN            ,TX1 enable" "Disabled,Enabled"
line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "ADX3"
base ad:0x02903A00
width 27.
rgroup.long 0x0C++0x03
line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR   ,RX done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE           ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "     ACIF_FIFO3_FULL  ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True"
textline "                                    "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "     ACIF_FIFO1_FULL  ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR  ,TX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     TX3_DONE_SET/CLR  ,TX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX2_DONE_SET/CLR ,TX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     TX1_DONE_SET/CLR ,TX1 done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX4_DONE          ,TX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  TX3_DONE          ,TX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX2_DONE         ,TX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  TX1_DONE         ,TX1 done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x64++0x03
line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x68++0x03
line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x6C++0x03
line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ADX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "ADX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "ADX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " RX_DONE           ,RX done" "Clear,Set"
bitfld.long 0x04 3. "     TX4_DONE          ,TX4 done" "Clear,Set"
bitfld.long 0x04 2. "     TX3_DONE         ,TX3 done" "Clear,Set"
bitfld.long 0x04 1. "     TX2_DONE         ,TX2 done" "Clear,Set"
textline "                                    "
bitfld.long 0x04 0. " TX1_DONE          ,TX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "ADX_CTRL_0,ADX Control Register"
bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "  TX4_EN           ,TX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  TX3_EN           ,TX3 enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 1. " TX2_EN            ,TX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  TX1_EN            ,TX1 enable" "Disabled,Enabled"
line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree "ADX4"
base ad:0x02903B00
width 27.
rgroup.long 0x0C++0x03
line.long 0x00 "ADX_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL    ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY   ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "ADX_AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR   ,RX done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE           ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "ADX_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "ADX_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 7. " ACIF_FIFO4_FULL   ,ACIF FIFO4 full" "False,True"
bitfld.long 0x00 6. "     ACIF_FIFO4_EMPTY  ,ACIF FIFO4 empty" "False,True"
bitfld.long 0x00 5. "     ACIF_FIFO3_FULL  ,ACIF FIFO3 full" "False,True"
bitfld.long 0x00 4. "     ACIF_FIFO3_EMPTY ,ACIF FIFO3 empty" "False,True"
textline "                                    "
bitfld.long 0x00 3. " ACIF_FIFO2_FULL   ,ACIF FIFO2 full" "False,True"
bitfld.long 0x00 2. "     ACIF_FIFO2_EMPTY  ,ACIF FIFO2 empty" "False,True"
bitfld.long 0x00 1. "     ACIF_FIFO1_FULL  ,ACIF FIFO1 full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO1_EMPTY ,ACIF FIFO1 empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "ADX_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " TX4_DONE_SET/CLR  ,TX4 done" "Clear,Set"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "     TX3_DONE_SET/CLR  ,TX3 done" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX2_DONE_SET/CLR ,TX2 done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     TX1_DONE_SET/CLR ,TX1 done" "Clear,Set"
line.long 0x04 "ADX_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 3. " TX4_DONE          ,TX4 done" "Unmasked,Masked"
bitfld.long 0x04 2. "  TX3_DONE          ,TX3 done" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX2_DONE         ,TX2 done" "Unmasked,Masked"
bitfld.long 0x04 0. "  TX1_DONE         ,TX1 done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "ADX_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x64++0x03
line.long 0x00 "ADX_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x68++0x03
line.long 0x00 "ADX_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x6C++0x03
line.long 0x00 "ADX_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD    ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS    ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
rbitfld.long 0x00 16.--19. "      CLIENT_CHANNELS  ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "      AXBAR_BITS       ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                    "
rbitfld.long 0x00 8.--10. " CLIENT_BITS       ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND            ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "       REPLICATE        ,Replicate" "False,True"
endif
textline "                                    "
bitfld.long 0x00 1. " TRUNCATE          ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ADX_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE            ,Enable" "False,True"
line.long 0x04 "ADX_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET        ,Soft reset" "False,True"
line.long 0x08 "ADX_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN           ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "ADX_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR          ,CNFG error" "False,True"
bitfld.long 0x00 8. "     CLKEN             ,Clock enable" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "ADX_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 4. " RX_DONE           ,RX done" "Clear,Set"
bitfld.long 0x04 3. "     TX4_DONE          ,TX4 done" "Clear,Set"
bitfld.long 0x04 2. "     TX3_DONE         ,TX3 done" "Clear,Set"
bitfld.long 0x04 1. "     TX2_DONE         ,TX2 done" "Clear,Set"
textline "                                    "
bitfld.long 0x04 0. " TX1_DONE          ,TX1 done" "Clear,Set"
group.long 0xA4++0x0B
line.long 0x00 "ADX_CTRL_0,ADX Control Register"
bitfld.long 0x00 11. " TX4_FORCE_DISABLE ,TX4 force disable" "Disabled,Enabled"
bitfld.long 0x00 10. "  TX3_FORCE_DISABLE ,TX3 force disable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 9. " TX2_FORCE_DISABLE ,TX2 force disable" "Disabled,Enabled"
bitfld.long 0x00 8. "  TX1_FORCE_DISABLE ,TX1 force disable" "Disabled,Enabled"
bitfld.long 0x00 3. "  TX4_EN           ,TX4 enable" "Disabled,Enabled"
bitfld.long 0x00 2. "  TX3_EN           ,TX3 enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 1. " TX2_EN            ,TX2 enable" "Disabled,Enabled"
bitfld.long 0x00 0. "  TX1_EN            ,TX1 enable" "Disabled,Enabled"
line.long 0x04 "ADX_OUT_BYTE_EN0_0,Out Byte Enable 0 Register"
line.long 0x08 "ADX_OUT_BYTE_EN1_0,Out Byte Enable 1 Register"
width 0x0B
tree.end
tree.end
tree "OPE"
tree "OPE1"
base ad:0x02908000
width 23.
rgroup.long 0x0C++0x03
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "         ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE_SET/CLR ,RX done" "Clear,Set"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE         ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "            AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "   CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                       "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. "          CLIENT_BITS     ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "         EXPAND          ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "  STEREO_CONV     ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 8.--10. "          CLIENT_BITS     ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND          ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "  STEREO_CONV     ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  ,Replicate" "False,True"
endif
textline "                       "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. "          TRUNCATE        ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "         MONO_CONV       ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. "          TRUNCATE        ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV       ,Mono conv" "Zero,Copy"
endif
rgroup.long 0x4C++0x03
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL  ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "         ACIF_FIFO_EMPTY ,ACIF FIFO empty" "False,True"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR ,TX done" "Clear,Set"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE         ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD  ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
rbitfld.long 0x00 20.--23. "            AXBAR_CHANNELS  ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "   CLIENT_CHANNELS ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "  AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                       "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 8.--10. "          CLIENT_BITS     ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "         EXPAND          ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "  STEREO_CONV     ,Stereo conv" "CH0,CH1,AVG,?..."
else
bitfld.long 0x00 8.--10. "          CLIENT_BITS     ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND          ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "  STEREO_CONV     ,Stereo conv" "CH0,CH1,AVG,?..."
endif
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "  REPLICATE  ,Replicate" "False,True"
endif
textline "                       "
sif (cpuis("TEGRAX2"))
rbitfld.long 0x00 1. "          TRUNCATE        ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "         MONO_CONV       ,Mono conv" "Zero,Copy"
else
bitfld.long 0x00 1. "          TRUNCATE        ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV       ,Mono conv" "Zero,Copy"
endif
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE          ,Enable" "False,True"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET      ,Soft reset" "False,True"
line.long 0x08 "CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN         ,Second level clock gating enable" "False,True"
rgroup.long 0x8C++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " CLKEN           ,CLKEN" "False,True"
bitfld.long 0x00 0. "         ENABLE_STATUS   ,Enable status" "False,True"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE         ,TX done" "Clear,Set"
textline "                       "
bitfld.long 0x04 0. "          RX_DONE         ,RX done" "Clear,Set"
group.long 0x94++0x03
line.long 0x00 "DIRECTION_0,Direction Register"
bitfld.long 0x00 0. " DIR             ,Data flow direction" "MBDRC to PEQ,PEQ to MBDRC"
width 0x0B
tree.end
tree.end
tree "PEQ"
tree "PEQ1"
base ad:0x02908100
width 29.
group.long 0x00++0x07
line.long 0x00 "PEQ_SOFT_RST_0,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET    ,Resets PEQ logic" "No reset,Reset"
line.long 0x04 "PEQ_CG_0,CG Register"
bitfld.long 0x04 0. " SLCG_EN       ,Enables second level clock gating" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "PEQ_STATUS_0,Status Register"
bitfld.long 0x00 0. " SLCG_CLKEN    ,Idle detect enable" "False,True"
group.long 0x0C++0x13
line.long 0x00 "PEQ_CONFIG_0,Config Register"
bitfld.long 0x00 2.--5. " BIQUAD_STAGES ,Number of BiQuad stages in PEQ chain" "1,2,3,4,5,6,7,8,9,10,11,12,?..."
bitfld.long 0x00 1. "        BIAS_UNBIAS    ,Rounding option across all rounding operations of MBDRC" "Bias,Unbias"
bitfld.long 0x00 0. "  MODE ,Select mode" "Bypass,Active"
line.long 0x04 "PEQ_AHUBRAMCTL_PEQ_CTRL_0,AHUBRAMCTL PEQ Control Register"
rbitfld.long 0x04 31. " READ_BUSY     ,Read busy" "Done,Busy"
hexmask.long.byte 0x04 16.--23. 1. "      SEQ_READ_COUNT ,Sequence read count"
bitfld.long 0x04 14. "      RW   ,RW" "Read,Write"
bitfld.long 0x04 13. "   ADDR_INIT_EN ,Address init enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x04 12. " SEQ_ACCESS_EN ,SEQ access enable" "Disabled,Enabled"
hexmask.long.word 0x04 0.--8. 0x01 "  RAM_ADDR       ,RAM address"
line.long 0x08 "PEQ_AHUBRAMCTL_PEQ_DATA_0,AHUBRAMCTL PEQ Data Register"
line.long 0x0C "PEQ_AHUBRAMCTL_SHIFT_CTRL_0,AHUBRAMCTL Shift Control Register"
rbitfld.long 0x0C 31. " READ_BUSY     ,Read busy" "Done,Busy"
hexmask.long.byte 0x0C 16.--23. 1. "                     ,SEQ_READ_COUNT,Sequence read count"
bitfld.long 0x0C 14. "      RW   ,RW" "Read,Write"
bitfld.long 0x0C 13. "   ADDR_INIT_EN ,Address init enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x0C 12. " SEQ_ACCESS_EN ,Sequence access enable" "Disabled,Enabled"
hexmask.long.word 0x0C 0.--8. 0x01 "  RAM_ADDR       ,RAM address"
line.long 0x10 "PEQ_AHUBRAMCTL_SHIFT_DATA_0,AHUBRAMCTL Shift Data Register"
width 0x0B
tree.end
tree.end
tree "DMIC"
tree "DMIC1"
base ad:0x02904000
width 36.
rgroup.long 0x0C++0x03
line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY       ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
sif cpuis("TEGRAX2")
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK  ,TX upper watermark" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX_NORMAL_WATERMARK   ,TX normal watermark" "Unmasked,Masked"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS        ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "         CLIENT_CHANNELS  ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "   AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
bitfld.long 0x00 8.--10. "  CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "   REPLICATE  ,Replicate" "False,True"
endif
textline "                                            "
bitfld.long 0x00 1. "  TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV             ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DMIC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "False,True"
line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "False,True"
line.long 0x08 "DMIC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DMIC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "False,True"
bitfld.long 0x00 8. "     SLCG_CLKEN            ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "       ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Clear,Set"
bitfld.long 0x04 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Clear,Set"
group.long 0x64++0x03
line.long 0x00 "DMIC_CTRL_0,Control Register"
bitfld.long 0x00 12.--16. " TRIMMER_SEL         ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--9. "        CHANNEL_SELECT        ,Channel select" "None,Left,Right,Stereo"
bitfld.long 0x00 4. "      LRSEL_POLARITY   ,LRSEL polarity" "Left,Right"
bitfld.long 0x00 0.--1. " OSR        ,OSR" "OSR64,OSR128,OSR256,?..."
width 0x0B
tree.end
tree "DMIC2"
base ad:0x02904100
width 36.
rgroup.long 0x0C++0x03
line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY       ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
sif cpuis("TEGRAX2")
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK  ,TX upper watermark" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX_NORMAL_WATERMARK   ,TX normal watermark" "Unmasked,Masked"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS        ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "         CLIENT_CHANNELS  ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "   AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
bitfld.long 0x00 8.--10. "  CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "   REPLICATE  ,Replicate" "False,True"
endif
textline "                                            "
bitfld.long 0x00 1. "  TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV             ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DMIC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "False,True"
line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "False,True"
line.long 0x08 "DMIC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DMIC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "False,True"
bitfld.long 0x00 8. "     SLCG_CLKEN            ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "       ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Clear,Set"
bitfld.long 0x04 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Clear,Set"
group.long 0x64++0x03
line.long 0x00 "DMIC_CTRL_0,Control Register"
bitfld.long 0x00 12.--16. " TRIMMER_SEL         ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--9. "        CHANNEL_SELECT        ,Channel select" "None,Left,Right,Stereo"
bitfld.long 0x00 4. "      LRSEL_POLARITY   ,LRSEL polarity" "Left,Right"
bitfld.long 0x00 0.--1. " OSR        ,OSR" "OSR64,OSR128,OSR256,?..."
width 0x0B
tree.end
tree "DMIC3"
base ad:0x02904200
width 36.
rgroup.long 0x0C++0x03
line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY       ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
sif cpuis("TEGRAX2")
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK  ,TX upper watermark" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX_NORMAL_WATERMARK   ,TX normal watermark" "Unmasked,Masked"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS        ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "         CLIENT_CHANNELS  ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "   AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
bitfld.long 0x00 8.--10. "  CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "   REPLICATE  ,Replicate" "False,True"
endif
textline "                                            "
bitfld.long 0x00 1. "  TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV             ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DMIC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "False,True"
line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "False,True"
line.long 0x08 "DMIC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DMIC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "False,True"
bitfld.long 0x00 8. "     SLCG_CLKEN            ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "       ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Clear,Set"
bitfld.long 0x04 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Clear,Set"
group.long 0x64++0x03
line.long 0x00 "DMIC_CTRL_0,Control Register"
bitfld.long 0x00 12.--16. " TRIMMER_SEL         ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--9. "        CHANNEL_SELECT        ,Channel select" "None,Left,Right,Stereo"
bitfld.long 0x00 4. "      LRSEL_POLARITY   ,LRSEL polarity" "Left,Right"
bitfld.long 0x00 0.--1. " OSR        ,OSR" "OSR64,OSR128,OSR256,?..."
width 0x0B
tree.end
tree "DMIC4"
base ad:0x02904300
width 36.
rgroup.long 0x0C++0x03
line.long 0x00 "DMIC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY       ,ACIF FIFO empty" "False,True"
group.long 0x10++0x07
line.long 0x00 "DMIC_AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
sif cpuis("TEGRAX2")
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. " TX_UPPER_WATERMARK  ,TX upper watermark" "Clear,Set"
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "DMIC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Unmasked,Masked"
bitfld.long 0x04 1. "  TX_NORMAL_WATERMARK   ,TX normal watermark" "Unmasked,Masked"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DMIC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS        ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "         CLIENT_CHANNELS  ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "   AXBAR_BITS ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                            "
bitfld.long 0x00 8.--10. "  CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "   REPLICATE  ,Replicate" "False,True"
endif
textline "                                            "
bitfld.long 0x00 1. "  TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV             ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DMIC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "False,True"
line.long 0x04 "DMIC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "False,True"
line.long 0x08 "DMIC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DMIC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "False,True"
bitfld.long 0x00 8. "     SLCG_CLKEN            ,SLCG clock enable" "False,True"
bitfld.long 0x00 0. "       ENABLE_STATUS    ,Enable status" "False,True"
line.long 0x04 "DMIC_INT_STATUS_0,Interrupt Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 2. " TX_UPPER_WATERMARK  ,TX upper waterwark" "Clear,Set"
bitfld.long 0x04 1. "     TX_NORMAL_WATERMARK   ,TX normal watermark" "Clear,Set"
textline "                                             "
endif
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Clear,Set"
group.long 0x64++0x03
line.long 0x00 "DMIC_CTRL_0,Control Register"
bitfld.long 0x00 12.--16. " TRIMMER_SEL         ,Trimmer select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--9. "        CHANNEL_SELECT        ,Channel select" "None,Left,Right,Stereo"
bitfld.long 0x00 4. "      LRSEL_POLARITY   ,LRSEL polarity" "Left,Right"
bitfld.long 0x00 0.--1. " OSR        ,OSR" "OSR64,OSR128,OSR256,?..."
width 0x0B
tree.end
tree.end
tree "AHC"
base ad:0x0290B900
width 28.
group.long 0x04++0x07
line.long 0x00 "AHC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET                     ,Soft reset" "No reset,Reset"
line.long 0x04 "AHC_CG_0,CG Register"
bitfld.long 0x04 8. " SLAVE_SLCG_EN                  ,Second level clock gating enable" "Disabled,Enabled"
bitfld.long 0x04 0. "  MASTER_SLCG_EN ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "AHC_STATUS_0,Status Register"
hexmask.long.word 0x00 16.--27. 1. " REQUEST_TIMEOUT_COUNTER        ,Config access timeout value"
bitfld.long 0x00 12.--13. "      LIVE_STATUS    ,Live status" "False,True,?..."
bitfld.long 0x00 9. "      MASTER_CLKEN  ,Master clock enable" "False,True"
bitfld.long 0x00 8. "  SLAVE_CLKEN    ,Slave clock enable" "False,True"
textline "                                     "
bitfld.long 0x00 5. " HRD_FIFO_FULL                  ,HRD FIFO full" "Empty,Full"
bitfld.long 0x00 4. "     HRD_FIFO_EMPTY ,HRD FIFO empty" "Full,Empty"
bitfld.long 0x00 1. "      HWR_FIFO_FULL ,HWR FIFO full" "Empty,Full"
bitfld.long 0x00 0. "  HWR_FIFO_EMPTY ,HWR FIFO empty" "Full,Empty"
group.long 0x10++0x07
line.long 0x00 "AHC_INT_STATUS_0_SET/CLR,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " CONFIG_REQUEST_TIMEOUT         ,Config request timeout,time out status indication bit" "Clear,Set"
line.long 0x04 "AHC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CONFIG_REQUEST_TIMEOUT         ,Config request timeout" "Unmasked,Masked"
group.long 0x24++0x03
line.long 0x00 "AHC_CTRL_0,Control Register"
hexmask.long.word 0x00 0.--11. 1. " REQUEST_TIMEOUT_COUNT          ,Timeout value in terms of AHUB clock cycles"
rgroup.long 0x28++0x0F
line.long 0x00 "AHC_AHUB_INTR_STATUS_0_0,AHUB Interrupt Register Status 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 30. " ARAD1                          ,ARAD1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x00 29. " AFC6                           ,AFC6" "Clear,Set"
bitfld.long 0x00 28. "     AFC5           ,AFC5" "Clear,Set"
bitfld.long 0x00 27. "      AFC4          ,AFC4" "Clear,Set"
textline "                                     "
bitfld.long 0x00 26. " AFC3                           ,AFC3" "Clear,Set"
bitfld.long 0x00 25. "     AFC2           ,AFC2" "Clear,Set"
bitfld.long 0x00 24. "      AFC1          ,AFC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 23. " DMIC4                          ,DMIC4" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x00 22. " DMIC3                          ,DMIC3" "Clear,Set"
bitfld.long 0x00 21. "     DMIC2          ,DMIC2" "Clear,Set"
bitfld.long 0x00 20. "      DMIC1         ,DMIC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 19. " ADX4                           ,ADX4" "Clear,Set"
bitfld.long 0x00 18. "     ADX3           ,ADX3" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x00 17. " ADX2                           ,ADX2" "Clear,Set"
bitfld.long 0x00 16. "     ADX1           ,ADX1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 15. " AMX4                           ,AMX4" "Clear,Set"
bitfld.long 0x00 14. "     AMX3           ,AMX3" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x00 13. " AMX2                           ,AMX2" "Clear,Set"
bitfld.long 0x00 12. "     AMX1           ,AMX1" "Clear,Set"
bitfld.long 0x00 11. "      SFC4          ,SFC4" "Clear,Set"
textline "                                     "
bitfld.long 0x00 10. " SFC3                           ,SFC3" "Clear,Set"
bitfld.long 0x00 9. "     SFC2           ,SFC2" "Clear,Set"
bitfld.long 0x00 8. "      SFC1          ,SFC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 5. " I2S6                           ,I2S6" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x00 4. " I2S5                           ,I2S5" "Clear,Set"
bitfld.long 0x00 3. "     I2S4           ,I2S4" "Clear,Set"
bitfld.long 0x00 2. "      I2S3          ,I2S3" "Clear,Set"
textline "                                     "
bitfld.long 0x00 1. " I2S2                           ,I2S2" "Clear,Set"
bitfld.long 0x00 0. "     I2S1           ,I2S1" "Clear,Set"
line.long 0x04 "AHC_AHUB_INTR_STATUS_1_0,AHUB Interrupt Register Status 1"
bitfld.long 0x04 31. " AHC                            ,AHC" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 29. " ASRC1                          ,ASRC1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x04 28. " XBAR                           ,XBAR" "Clear,Set"
bitfld.long 0x04 24. "     ADMAIF         ,ADMAIF" "Clear,Set"
bitfld.long 0x04 20. "      MIXER1        ,MIXER1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 19. " DSPK2                          ,DSPK2" "Clear,Set"
bitfld.long 0x04 18. "     DSPK1          ,DSPK1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x04 16. " SPDIF1                         ,SPDIF1" "Clear,Set"
bitfld.long 0x04 13. "     MDMIF1         ,MDMIF1" "Clear,Set"
bitfld.long 0x04 12. "      MDMIF0        ,MDMIF0" "Clear,Set"
textline "                                     "
bitfld.long 0x04 9. " MVC2                           ,MVC2" "Clear,Set"
bitfld.long 0x04 8. "     MVC1           ,MVC1" "Clear,Set"
bitfld.long 0x04 4. "      SPKPROT1      ,SPKPROT1" "Clear,Set"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x04 1. " OPE2                           ,OPE2" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x04 0. " OPE1                           ,OPE1" "Clear,Set"
line.long 0x08 "AHC_AHUB_ENABLE_STATUS_0_0,AHUB Enable Status 0"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 30. " ARAD1                          ,ARAD1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x08 29. " AFC6                           ,AFC6" "Clear,Set"
bitfld.long 0x08 28. "     AFC5           ,AFC5" "Clear,Set"
bitfld.long 0x08 27. "      AFC4          ,AFC4" "Clear,Set"
textline "                                     "
bitfld.long 0x08 26. " AFC3                           ,AFC3" "Clear,Set"
bitfld.long 0x08 25. "     AFC2           ,AFC2" "Clear,Set"
bitfld.long 0x08 24. "      AFC1          ,AFC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 23. " DMIC4                          ,DMIC4" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x08 22. " DMIC3                          ,DMIC3" "Clear,Set"
bitfld.long 0x08 21. "     DMIC2          ,DMIC2" "Clear,Set"
bitfld.long 0x08 20. "      DMIC1         ,DMIC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 19. " ADX4                           ,ADX2" "Clear,Set"
bitfld.long 0x08 18. "     ADX3           ,ADX2" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x08 17. " ADX2                           ,ADX2" "Clear,Set"
bitfld.long 0x08 16. "     ADX1           ,ADX1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 15. " AMX4                           ,AMX4" "Clear,Set"
bitfld.long 0x08 14. "     AMX3           ,AMX3" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x08 13. " AMX2                           ,AMX2" "Clear,Set"
bitfld.long 0x08 12. "     AMX1           ,AMX1" "Clear,Set"
bitfld.long 0x08 11. "      SFC4          ,SFC4" "Clear,Set"
textline "                                     "
bitfld.long 0x08 10. " SFC3                           ,SFC3" "Clear,Set"
bitfld.long 0x08 9. "     SFC2           ,SFC2" "Clear,Set"
bitfld.long 0x08 8. "      SFC1          ,SFC1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 5. " I2S6                           ,I2S6" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x08 4. " I2S5                           ,I2S5" "Clear,Set"
bitfld.long 0x08 3. "     I2S4           ,I2S4" "Clear,Set"
bitfld.long 0x08 2. "      I2S3          ,I2S3" "Clear,Set"
textline "                                     "
bitfld.long 0x08 1. " I2S2                           ,I2S2" "Clear,Set"
bitfld.long 0x08 0. "     I2S1           ,I2S1" "Clear,Set"
line.long 0x0C "AHC_AHUB_ENABLE_STATUS_1_0,AHUB Enable Status 1"
bitfld.long 0x0C 31. " AHC                            ,AHC" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 29. " ASRC1                          ,ASRC1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x0C 28. " XBAR                           ,XBAR" "Clear,Set"
bitfld.long 0x0C 24. "     ADMAIF         ,ADMAIF" "Clear,Set"
bitfld.long 0x0C 20. "      MIXER1        ,MIXER1" "Clear,Set"
textline "                                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x0C 19. " DSPK2                          ,DSPK2" "Clear,Set"
bitfld.long 0x0C 18. "     DSPK1          ,DSPK1" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x0C 16. " SPDIF1                         ,SPDIF1" "Clear,Set"
bitfld.long 0x0C 13. "     MDMIF1         ,MDMIF1" "Clear,Set"
bitfld.long 0x0C 12. "      MDMIF0        ,MDMIF0" "Clear,Set"
textline "                                     "
bitfld.long 0x0C 9. " MVC2                           ,MVC2" "Clear,Set"
bitfld.long 0x0C 8. "     MVC1           ,MVC1" "Clear,Set"
bitfld.long 0x0C 4. "      SPKPROT1      ,SPKPROT1" "Clear,Set"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 1. " OPE2                           ,OPE2" "Clear,Set"
textline "                                     "
endif
bitfld.long 0x0C 0. " OPE1                           ,OPE1" "Clear,Set"
width 0x0B
tree.end
tree "AMC"
base ad:0x02993000
width 31.
group.long 0x00++0x03
line.long 0x00 "AMC_CONFIG_0,Config Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6. " APERTURE_NS_DIS              ,Aperture NS disable" "No,Yes"
bitfld.long 0x00 5. "       APR_NS_DIS                  ,APR NS disable" "No,Yes"
textline "                                        "
bitfld.long 0x00 4. " CO_NS_DIS                    ,CO NS disable" "No,Yes"
bitfld.long 0x00 3. "       EVP_LOCK                    ,EVP lock" "Not locked,Locked"
textline "                                        "
endif
bitfld.long 0x00 2. " ERR_RESPONSE_DISABLE         ,Error response disable" "No,Yes"
sif !cpuis("TEGRAX2")
bitfld.long 0x00 1. "       CARVE_OUT_ENABLE            ,Carve out enable" "Disabled,Enabled"
endif
textline "                                        "
bitfld.long 0x00 0. " ARAM_ADDR_ALIAS_ENABLE       ,ARAM address alias enable" "Disabled,Enabled"
group.long 0x04++0x07
line.long 0x00 "AMC_INT_STATUS_0_SET/CLR,Interrupt Ststus Register"
sif cpuis("TEGRAX2")
setclrfld.long 0x00 5. 0x08 5. 0x0C 5. " INVALID_APR_ACCESS           ,Invalid APR access" "Valid,Invalid"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. "   INVALID_CO_ACCESS           ,Invalid CO access" "Valid,Invalid"
textline "                                        "
endif
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. " INVALID_CONFIG_ADDR          ,Invalid config address" "Valid,Invalid"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "   INVALID_BURST_TYPE          ,Invalid burst type" "Valid,Invalid"
textline "                                        "
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " INVALID_REQUEST_TYPE         ,Invalid request type" "Valid,Invalid"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "   INVALID_AMEM_ACCESS         ,Invalid AMEM access" "Valid,Invalid"
line.long 0x04 "AMC_INT_MASK_0,Interrupt Mask Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 5. " INVALID_APR_ACCESS           ,Invalid APR access" "Unmasked,Masked"
bitfld.long 0x04 4. "  INVALID_CO_ACCESS           ,Invalid CO access" "Unmasked,Masked"
textline "                                        "
endif
bitfld.long 0x04 3. " INVALID_CONFIG_ADDR          ,Invalid config address" "Unmasked,Masked"
bitfld.long 0x04 2. "  INVALID_BURST_TYPE          ,Invalid burst type" "Unmasked,Masked"
textline "                                        "
bitfld.long 0x04 1. " INVALID_REQUEST_TYPE         ,Invalid request type" "Unmasked,Masked"
bitfld.long 0x04 0. "  INVALID_AMEM_ACCESS         ,Invalid AMEM access" "Unmasked,Masked"
rgroup.long 0x14++0x03
line.long 0x00 "AMC_ERROR_ADDR_0,Error Address Register"
sif cpuis("TEGRAX2")
group.long 0x18++0x1B
line.long 0x00 "AMC_APR_CONFIG_0,APR Config Register"
bitfld.long 0x00 0. " ENABLE                       ,Enable" "False,True"
line.long 0x04 "AMC_APR_START_ADDR_0,APR Start Address Register"
line.long 0x08 "AMC_APR_SIZE_0,APR Size Register"
hexmask.long 0x08 0.--27. 1. " APR_SIZE                     ,APR size"
line.long 0x0C "AMC_CO_CONFIG_0,CO Config Register"
bitfld.long 0x0C 0. " ENABLE                       ,Enable" "False,True"
line.long 0x10 "AMC_CO_START_ADDR_0,CO Start Address Register"
line.long 0x14 "AMC_CO_SIZE_0,CO Size Register"
hexmask.long.tbyte 0x14 0.--16. 1. " CO_SIZE                      ,CO size"
line.long 0x18 "AMC_APERTURE_BASE_0,Aperture Base Register"
hexmask.long.word 0x18 11.--20. 1. " APERTURE_BASE                ,Aperture base"
else
group.long 0x28++0x03
line.long 0x00 "AMC_APERTURE_BASE_0,Aperture Base Register"
hexmask.long.word 0x00 11.--20. 1. " APERTURE_BASE                ,Aperture base"
endif
group.long 0x700++0x13
line.long 0x00 "AMC_EVP_RESET_VEC_0,EVP Reset Vector Register"
line.long 0x04 "AMC_EVP_UNDEF_VEC_0,EVP UNDEF Vector Register"
line.long 0x08 "AMC_EVP_SWI_VEC_0,EVP SWI Vector Register"
line.long 0x0C "AMC_EVP_PREFETCH_ABORT_VEC_0,EVP Prefetch Abort Vector Register"
line.long 0x10 "AMC_EVP_DATA_ABORT_VEC_0,EVP Data Abort Vector Register"
group.long 0x718++0x27
line.long 0x00 "AMC_EVP_IRQ_VEC_0,EVP IRQ Vector Register"
line.long 0x04 "AMC_EVP_FIQ_VEC_0,EVP FIQ Vector Register"
line.long 0x08 "AMC_EVP_RESET_ADDR_0, EVP Reset Address Register"
line.long 0x0C "AMC_EVP_UNDEF_ADDR_0,EVP UNDEF Address Register"
line.long 0x10 "AMC_EVP_SWI_ADDR_0,EVP SWI Address Register"
line.long 0x14 "AMC_EVP_PREFETCH_ABORT_ADDR_0,EVP Prefetch Abort Address Register"
line.long 0x18 "AMC_EVP_DATA_ABORT_ADDR_0,EVP Data Abort Address Register"
group.long 0x738++0x07
line.long 0x00 "AMC_EVP_IRQ_ADDR_0,EVP IRQ Address Register"
line.long 0x04 "AMC_EVP_FIQ_ADDR_0,EVP FIQ Address Register"
group.long 0x800++0x03
line.long 0x00 "AMC_APERTURE_DATA_0,Aperture Data"
button "APERTURE_DATA_0" "d (ad:0x02993000+0x800)--(ad:0x02993000+0xFFF) /long"
width 0x0B
tree.end
tree "AFC"
tree "AFC1"
base ad:0x02907000
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree "AFC2"
base ad:0x02907100
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree "AFC3"
base ad:0x02907200
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree "AFC4"
base ad:0x02907300
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree "AFC5"
base ad:0x02907400
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree "AFC6"
base ad:0x02907500
width 31.
rgroup.long 0x0C++0x03
line.long 0x00 "AFC_AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
group.long 0x20++0x03
line.long 0x00 "AFC_AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
bitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "     EXPAND                     ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "        STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                        "
sif !cpuis("TEGRAX2")
bitfld.long 0x00 2. " REPLICATE           ,Replicate" "False,True"
textline "                                        "
endif
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x03
line.long 0x00 "AFC_AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 1. "     ACIF_FIFO_EMPTY            ,ACIF FIFO empty" "Full,Empty"
bitfld.long 0x00 0. "       TX_ENABLED         ,TX enabled" "Disabled,Enabled"
group.long 0x50++0x07
line.long 0x00 "AFC_AXBAR_TX_INT_STATUS_0,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_set/clr     ,TX done" "Clear,Set"
line.long 0x04 "AFC_AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AFC_AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                        "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,?..."
rbitfld.long 0x00 16.--19. "       CLIENT_CHANNELS            ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS         ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
rbitfld.long 0x00 1. "         TRUNCATE           ,Truncate" "Round,Chop"
textline "                                        "
rbitfld.long 0x00 0. " MONO_CONV           ,Mono conv" "Zero,Copy"
textline "                                        "
else
bitfld.long 0x00 6.--7. " EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "      STEREO_CONV                ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 2. "         REPLICATE          ,Replicate" "False,True"
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV                  ,Mono conv" "Zero,Copy"
textline "                                        "
endif
group.long 0x80++0x0B
line.long 0x00 "AFC_ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "AFC_SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "AFC_CG_0,CG Register"
bitfld.long 0x08 0. " SLCG_EN             ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x8C++0x03
line.long 0x00 "AFC_STATUS_0,Status Register"
bitfld.long 0x00 31. " CNFG_ERR            ,CNFG error" "No error,Error"
bitfld.long 0x00 5. "  INTERP_RATE_SLOW           ,INTERP rate slow" "False,True"
bitfld.long 0x00 4. "       DECIM_RATE_SLOW    ,DECIM rate slow" "False,True"
textline "                                        "
bitfld.long 0x00 2. " CLKEN               ,Clock enable" "False,True"
bitfld.long 0x00 0. "     TX_ENABLED                 ,TX enabled" "Disabled,Enabled"
group.long 0x90++0x07
line.long 0x00 "AFC_INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 1. " TX_DONE             ,TX done" "Clear,Set"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "     CLK_PPM_DIFF_ERROR_set/clr ,Clock PPM DIFF error" "Clear,Set"
line.long 0x04 "AFC_INT_MASK_0,Interrupt Mask Register"
bitfld.long 0x04 0. " CLK_PPM_DIFF_ERROR  ,CLK_PPM_DIFF error" "Unmasked,Masked"
group.long 0xA4++0x0B
line.long 0x00 "AFC_DEST_I2S_PARAMS_0,Destination I2S Parameters Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 27.--28. " MODULE_SELECT       ,Module select" "I2S,DSPK,?..."
bitfld.long 0x00 24.--26. "      MODULE_ID                  ,Module ID" ",I2S1/DSPK1,I2S2/DSPK2,I2S3,I2S4,I2S5,I2S6,?..."
textline "                                        "
else
bitfld.long 0x00 24.--26. " I2S_ID              ,ID of the destination I2S" ",I2S1,I2S2,I2S3,I2S4,I2S5,?..."
textline "                                        "
endif
hexmask.long.byte 0x00 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x00 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x04 "AFC_TXCIF_FIFO_PARAMS_0,TXCIF FIFO Parameters Register"
hexmask.long.byte 0x04 16.--22. 1. " FIFO_HIGH_THRESHOLD ,RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 8.--14. 1. "        FIFO_START_THRESHOLD       ,The RxCIF FIFO threshold of the destination I2S"
hexmask.long.byte 0x04 0.--6. 1. "          FIFO_LOW_THRESHOLD ,The RxCIF FIFO threshold of the destination I2S"
line.long 0x08 "AFC_CLK_PPM_DIFF_0,Clock PPM Difference Register"
hexmask.long.word 0x08 0.--15. 1. " VALUE               ,Value"
width 0x0B
tree.end
tree.end
tree "MVC"
tree "MVC1"
base ad:0x0290A000
width 31.
rgroup.long 0x0C++0x07
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Full,Empty"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE             ,RX done" "Clear,Set"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE             ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS     ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "          CLIENT_CHANNELS       ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS            ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND             ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "         STEREO_CONV           ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "         REPLICATE             ,Replicate" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV          ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x07
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Full,Empty"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
rbitfld.long 0x00 20.--23. "        AXBAR_CHANNELS     ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "          CLIENT_CHANNELS       ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS            ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND             ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "         STEREO_CONV           ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "         REPLICATE             ,Replicate" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV          ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "CG_0,Clock Gating Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x90++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN          , Status of SLCG" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS      ,Status of MVC enabling" "Disabled,Enabled"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE             ,TX done" "Clear,Set"
bitfld.long 0x04 0. "     RX_DONE            ,RX done" "Clear,Set"
group.long 0xA8++0x07
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MUTE_UNMUTE         ,Mute/UnMute control bit. 8 bits for 8 channels [CH0-CH7]"
bitfld.long 0x00 1. "        CURVE_TYPE         ,Curve type" "POLYNOMIAL,LINEAR_RAMP"
bitfld.long 0x00 0. "  UNBIASED              ,Rounding option" "BIASED,UNBIASED"
line.long 0x04 "SWITCH_0,Switch Register"
bitfld.long 0x04 2. " VOLUME_SWITCH       ,Start using a new volume set for the volume related parameters (TARGET_VOL AND MUTE_UNMUTE)" "Set,Clear"
bitfld.long 0x04 1. "     COEFF_SWITCH       ,Start using a new configuration set for the polynomial coefficients." "Set,Clear"
bitfld.long 0x04 0. "        DURATION_SWITCH       ,Start using a new configuration set for the duration related parameters (DURATION, DURATION_INV, POLY_N1 AND POLY_N2)" "Set,Clear"
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xB0++0x03
line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register"
else
group.long 0xB0++0x03
line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_0[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xB4++0x03
line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register"
else
group.long 0xB4++0x03
line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_1[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xB8++0x03
line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register"
else
group.long 0xB8++0x03
line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_2[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xBC++0x03
line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register"
else
group.long 0xBC++0x03
line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_3[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xC0++0x03
line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register"
else
group.long 0xC0++0x03
line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_4[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xC4++0x03
line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register"
else
group.long 0xC4++0x03
line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_5[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xC8++0x03
line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register"
else
group.long 0xC8++0x03
line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_6[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xCC++0x03
line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register"
else
group.long 0xCC++0x03
line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_7[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xD0++0x03
line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register"
else
group.long 0xD0++0x03
line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_0[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xD4++0x03
line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register"
else
group.long 0xD4++0x03
line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_1[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xD8++0x03
line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register"
else
group.long 0xD8++0x03
line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_2[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xDC++0x03
line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register"
else
group.long 0xDC++0x03
line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_3[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xE0++0x03
line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register"
else
group.long 0xE0++0x03
line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_4[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xE4++0x03
line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register"
else
group.long 0xE4++0x03
line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_5[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xE8++0x03
line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register"
else
group.long 0xE8++0x03
line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_6[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A000+0xA8)&0x02))==0x00)
group.long 0xEC++0x03
line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register"
else
group.long 0xEC++0x03
line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_7[15:0]  ,Target volume linear ramp curve"
endif
group.long 0xF0++0x0F
line.long 0x00 "DURATION_0,Duration Register"
hexmask.long.tbyte 0x00 0.--23. 1. " DURATION            ,Number of samples to reach the target volume"
line.long 0x04 "DURATION_INV_0,Duration Inverse Register"
line.long 0x08 "POLY_N1_0,POLY N1 Register"
hexmask.long.tbyte 0x08 0.--23. 1. " POLY_N1             , The first splitting points"
line.long 0x0C "POLY_N2_0,POLY N2 Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " POLY_N2             ,The second splitting points"
if (((per.l(ad:0x0290A000+0x100)&0x80000000))==0x00)
group.long 0x100++0x03
line.long 0x00 "PEAK_CTRL_0,Peak Control Register"
bitfld.long 0x00 31. " PEAK_TYPE           ,Peak metering type" "WINPEAK,RORPEAK"
hexmask.long.tbyte 0x00 0.--23. 1. "   POLY_N2            ,The second splitting points"
else
group.long 0x100++0x03
line.long 0x00 "PEAK_CTRL_0,Peak Control Register"
bitfld.long 0x00 31. " PEAK_TYPE           ,Peak metering type" "WINPEAK,RORPEAK"
endif
group.long 0x104++0x07
line.long 0x00 "AHUBRAMCTL_CONFIG_RAM_CTRL_0,AHUB RAM CTL Config RAM Control Register"
rbitfld.long 0x00 31. " READ_BUSY           ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "      SEQ_READ_COUNT     ,Sequential read count"
bitfld.long 0x00 14. "           RW                    ,Read/write" "Read,Write"
bitfld.long 0x00 13. "       ADDR_INIT_EN          ,Address initial enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 12. " SEQ_ACCESS_EN       ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "  RAM_ADDR           ,RAM address"
line.long 0x04 "AHUBRAMCTL_CONFIG_RAM_DATA_0,AHUB RAM CTL Config RAM Data Register"
rgroup.long 0x10C++0x03
line.long 0x00 "PEAK_VALUE_0,Peak Value Register"
rgroup.long 0x110++0x03
line.long 0x00 "PEAK_VALUE_1,Peak Value Register"
rgroup.long 0x114++0x03
line.long 0x00 "PEAK_VALUE_2,Peak Value Register"
rgroup.long 0x118++0x03
line.long 0x00 "PEAK_VALUE_3,Peak Value Register"
rgroup.long 0x11C++0x03
line.long 0x00 "PEAK_VALUE_4,Peak Value Register"
rgroup.long 0x120++0x03
line.long 0x00 "PEAK_VALUE_5,Peak Value Register"
rgroup.long 0x124++0x03
line.long 0x00 "PEAK_VALUE_6,Peak Value Register"
rgroup.long 0x128++0x03
line.long 0x00 "PEAK_VALUE_7,Peak Value Register"
rgroup.long 0x12C++0x03
line.long 0x00 "CONFIG_ERR_TYPE_0,Config Error Type Register"
bitfld.long 0x00 2. " VOLUME_CONFIG_ERROR  ,Volume config error" "No error,Error"
bitfld.long 0x00 1. "  COEFF_CONFIG_ERROR ,Coefficient config error" "No error,Error"
bitfld.long 0x00 0. "     DURATION_CONFIG_ERROR ,Duration config error" "No error,Error"
width 0x0B
tree.end
tree "MVC2"
base ad:0x0290A200
width 31.
rgroup.long 0x0C++0x07
line.long 0x00 "AXBAR_RX_STATUS_0,AXBAR RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Full,Empty"
group.long 0x10++0x07
line.long 0x00 "AXBAR_RX_INT_STATUS_0_SET/CLR,AXBAR RX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " RX_DONE             ,RX done" "Clear,Set"
line.long 0x04 "AXBAR_RX_INT_MASK_0,AXBAR RX Interrupt Mask Register"
bitfld.long 0x04 0. " RX_DONE             ,RX done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "AXBAR_RX_CIF_CTRL_0,AXBAR RX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
bitfld.long 0x00 20.--23. "        AXBAR_CHANNELS     ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "          CLIENT_CHANNELS       ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS            ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND             ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "         STEREO_CONV           ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "         REPLICATE             ,Replicate" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV          ,Mono conv" "Zero,Copy"
rgroup.long 0x4C++0x07
line.long 0x00 "AXBAR_TX_STATUS_0,AXBAR TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FULL      ,ACIF FIFO full" "Empty,Full"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Full,Empty"
group.long 0x50++0x07
line.long 0x00 "AXBAR_TX_INT_STATUS_0_SET/CLR,AXBAR TX Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE             ,TX done" "Clear,Set"
line.long 0x04 "AXBAR_TX_INT_MASK_0,AXBAR TX Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE             ,TX done" "Unmasked,Masked"
group.long 0x60++0x03
line.long 0x00 "AXBAR_TX_CIF_CTRL_0,AXBAR TX CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
rbitfld.long 0x00 20.--23. "        AXBAR_CHANNELS     ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
rbitfld.long 0x00 16.--19. "          CLIENT_CHANNELS       ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,?..."
bitfld.long 0x00 12.--14. "         AXBAR_BITS            ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                        "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
else
bitfld.long 0x00 8.--10. " CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
endif
bitfld.long 0x00 6.--7. "     EXPAND             ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "         STEREO_CONV           ,Stereo conv" "CH0,CH1,AVG,?..."
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. "         REPLICATE             ,Replicate" "False,True"
endif
textline "                                        "
bitfld.long 0x00 1. " TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "     MONO_CONV          ,Mono conv" "Zero,Copy"
group.long 0x80++0x0B
line.long 0x00 "ENABLE_0,Enable Register"
bitfld.long 0x00 0. " ENABLE              ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET_0,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET          ,Soft reset" "No reset,Reset"
line.long 0x08 "CG_0,Clock Gating Register"
bitfld.long 0x08 0. " SLCG_EN             , Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x90++0x07
line.long 0x00 "STATUS_0,Status Register"
bitfld.long 0x00 8. " SLCG_CLKEN          , Status of SLCG" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS      ,Status of MVC enabling" "Disabled,Enabled"
line.long 0x04 "INT_STATUS_0,Interrupt Status Register"
bitfld.long 0x04 1. " TX_DONE             ,TX done" "Clear,Set"
bitfld.long 0x04 0. "     RX_DONE            ,RX done" "Clear,Set"
group.long 0xA8++0x07
line.long 0x00 "CTRL_0,Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MUTE_UNMUTE         ,Mute/UnMute control bit. 8 bits for 8 channels [CH0-CH7]"
bitfld.long 0x00 1. "        CURVE_TYPE         ,Curve type" "POLYNOMIAL,LINEAR_RAMP"
bitfld.long 0x00 0. "  UNBIASED              ,Rounding option" "BIASED,UNBIASED"
line.long 0x04 "SWITCH_0,Switch Register"
bitfld.long 0x04 2. " VOLUME_SWITCH       ,Start using a new volume set for the volume related parameters (TARGET_VOL AND MUTE_UNMUTE)" "Set,Clear"
bitfld.long 0x04 1. "     COEFF_SWITCH       ,Start using a new configuration set for the polynomial coefficients." "Set,Clear"
bitfld.long 0x04 0. "        DURATION_SWITCH       ,Start using a new configuration set for the duration related parameters (DURATION, DURATION_INV, POLY_N1 AND POLY_N2)" "Set,Clear"
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xB0++0x03
line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register"
else
group.long 0xB0++0x03
line.long 0x00 "INIT_VOL_0,Volume Initialization 0 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_0[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xB4++0x03
line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register"
else
group.long 0xB4++0x03
line.long 0x00 "INIT_VOL_1,Volume Initialization 1 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_1[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xB8++0x03
line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register"
else
group.long 0xB8++0x03
line.long 0x00 "INIT_VOL_2,Volume Initialization 2 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_2[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xBC++0x03
line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register"
else
group.long 0xBC++0x03
line.long 0x00 "INIT_VOL_3,Volume Initialization 3 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_3[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xC0++0x03
line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register"
else
group.long 0xC0++0x03
line.long 0x00 "INIT_VOL_4,Volume Initialization 4 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_4[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xC4++0x03
line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register"
else
group.long 0xC4++0x03
line.long 0x00 "INIT_VOL_5,Volume Initialization 5 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_5[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xC8++0x03
line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register"
else
group.long 0xC8++0x03
line.long 0x00 "INIT_VOL_6,Volume Initialization 6 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_6[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xCC++0x03
line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register"
else
group.long 0xCC++0x03
line.long 0x00 "INIT_VOL_7,Volume Initialization 7 Register"
hexmask.long.word 0x00 0.--15. 1. " INIT_VOL_7[15:0]    ,Volume initialization linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xD0++0x03
line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register"
else
group.long 0xD0++0x03
line.long 0x00 "TARGET_VOL_0,Target Volume 0 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_0[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xD4++0x03
line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register"
else
group.long 0xD4++0x03
line.long 0x00 "TARGET_VOL_1,Target Volume 1 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_1[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xD8++0x03
line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register"
else
group.long 0xD8++0x03
line.long 0x00 "TARGET_VOL_2,Target Volume 2 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_2[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xDC++0x03
line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register"
else
group.long 0xDC++0x03
line.long 0x00 "TARGET_VOL_3,Target Volume 3 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_3[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xE0++0x03
line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register"
else
group.long 0xE0++0x03
line.long 0x00 "TARGET_VOL_4,Target Volume 4 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_4[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xE4++0x03
line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register"
else
group.long 0xE4++0x03
line.long 0x00 "TARGET_VOL_5,Target Volume 5 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_5[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xE8++0x03
line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register"
else
group.long 0xE8++0x03
line.long 0x00 "TARGET_VOL_6,Target Volume 6 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_6[15:0]  ,Target volume linear ramp curve"
endif
if (((per.l(ad:0x0290A200+0xA8)&0x02))==0x00)
group.long 0xEC++0x03
line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register"
else
group.long 0xEC++0x03
line.long 0x00 "TARGET_VOL_7,Target Volume 7 Register"
hexmask.long.word 0x00 0.--15. 1. " TARGET_VOL_7[15:0]  ,Target volume linear ramp curve"
endif
group.long 0xF0++0x0F
line.long 0x00 "DURATION_0,Duration Register"
hexmask.long.tbyte 0x00 0.--23. 1. " DURATION            ,Number of samples to reach the target volume"
line.long 0x04 "DURATION_INV_0,Duration Inverse Register"
line.long 0x08 "POLY_N1_0,POLY N1 Register"
hexmask.long.tbyte 0x08 0.--23. 1. " POLY_N1             , The first splitting points"
line.long 0x0C "POLY_N2_0,POLY N2 Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " POLY_N2             ,The second splitting points"
if (((per.l(ad:0x0290A200+0x100)&0x80000000))==0x00)
group.long 0x100++0x03
line.long 0x00 "PEAK_CTRL_0,Peak Control Register"
bitfld.long 0x00 31. " PEAK_TYPE           ,Peak metering type" "WINPEAK,RORPEAK"
hexmask.long.tbyte 0x00 0.--23. 1. "   POLY_N2            ,The second splitting points"
else
group.long 0x100++0x03
line.long 0x00 "PEAK_CTRL_0,Peak Control Register"
bitfld.long 0x00 31. " PEAK_TYPE           ,Peak metering type" "WINPEAK,RORPEAK"
endif
group.long 0x104++0x07
line.long 0x00 "AHUBRAMCTL_CONFIG_RAM_CTRL_0,AHUB RAM CTL Config RAM Control Register"
rbitfld.long 0x00 31. " READ_BUSY           ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "      SEQ_READ_COUNT     ,Sequential read count"
bitfld.long 0x00 14. "           RW                    ,Read/write" "Read,Write"
bitfld.long 0x00 13. "       ADDR_INIT_EN          ,Address initial enable" "Disabled,Enabled"
textline "                                        "
bitfld.long 0x00 12. " SEQ_ACCESS_EN       ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "  RAM_ADDR           ,RAM address"
line.long 0x04 "AHUBRAMCTL_CONFIG_RAM_DATA_0,AHUB RAM CTL Config RAM Data Register"
rgroup.long 0x10C++0x03
line.long 0x00 "PEAK_VALUE_0,Peak Value Register"
rgroup.long 0x110++0x03
line.long 0x00 "PEAK_VALUE_1,Peak Value Register"
rgroup.long 0x114++0x03
line.long 0x00 "PEAK_VALUE_2,Peak Value Register"
rgroup.long 0x118++0x03
line.long 0x00 "PEAK_VALUE_3,Peak Value Register"
rgroup.long 0x11C++0x03
line.long 0x00 "PEAK_VALUE_4,Peak Value Register"
rgroup.long 0x120++0x03
line.long 0x00 "PEAK_VALUE_5,Peak Value Register"
rgroup.long 0x124++0x03
line.long 0x00 "PEAK_VALUE_6,Peak Value Register"
rgroup.long 0x128++0x03
line.long 0x00 "PEAK_VALUE_7,Peak Value Register"
rgroup.long 0x12C++0x03
line.long 0x00 "CONFIG_ERR_TYPE_0,Config Error Type Register"
bitfld.long 0x00 2. " VOLUME_CONFIG_ERROR  ,Volume config error" "No error,Error"
bitfld.long 0x00 1. "  COEFF_CONFIG_ERROR ,Coefficient config error" "No error,Error"
bitfld.long 0x00 0. "     DURATION_CONFIG_ERROR ,Duration config error" "No error,Error"
width 0x0B
tree.end
tree.end
tree "ADMA"
tree "GLOBAL"
base ad:0x02930000
width 23.
group.long 0x00++0x0B
line.long 0x00 "CMD_0,ADMA Global Command Register"
bitfld.long 0x00 0. " GLOBAL_ENABLE                ,Set to 1 to enable the DMA transfers from channels" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Global Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Self clearing soft reset" "False,True"
line.long 0x08 "CG_0,ADMA Global Clock Gating Register"
bitfld.long 0x08 2. " CFG_SLCG_ENABLE              ,Second level clock gating enable for the clock driving the registers" "False,True"
bitfld.long 0x08 1. "                       CHANNEL_SLCG_ENABLE          ,Second level clock gating enable for the clock driving the channel controllers except of first 4 channels" "False,True"
textline "                       "
bitfld.long 0x08 0. "          GLOBAL_SLCG_ENABLE           ,Second level clock gating enable for the clock driving first 4 channel controllers and remaining modules" "False,True"
rgroup.long 0x0C++0x03
line.long 0x00 "STATUS_0,ADMA Global Status Register"
bitfld.long 0x00 4. " TRANSFER_PAUSED              ,Transfers from ALL channels can be paused by setting this bit and can be resumed by clearing it" "False,True"
bitfld.long 0x00 3. "                       CFG_CLK_ENABLED              , Indicates whether the registers clock is enabled or disabled" "False,True"
textline "                       "
bitfld.long 0x00 2. "          CHANNEL_CLK_ENABLED          ,Indicates whether the clock driving channel controllers is enabled or disabled" "False,True"
bitfld.long 0x00 1. "                       GLOBAL_CLK_ENABLED           , Indicates whether the clock driving common modules is enabled or disabled" "False,True"
textline "                       "
bitfld.long 0x00 0. "          TRANSFER_ENABLED             ,Asserts when any of the channels is enabled for DMA transfer" "False,True"
group.long 0x20++0x03
line.long 0x00 "CTRL_0,ADMA Global Control Register"
bitfld.long 0x00 16.--19. " OUTSTANDING_MEM_WRITES       ,Outstanding memory writes" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 8.--11. "                           OUTSTANDING_MEM_READS        ,Outstanding memory reads" "0,1,2,3,4,5,6,7,8,?..."
textline "                       "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "Disable,Enable"
group.long 0x2C++0x13
line.long 0x00 "REGION_ID_LOCK_0,ADMA Global Region ID Lock Register"
bitfld.long 0x00 0.--3. " LOCK                         ,Lock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "PAGE1_CHGRP_0,ADMA Global Page 1 CHGRP Register"
hexmask.long.byte 0x04 0.--7. 1. " ENABLE                       ,Enable"
line.long 0x08 "PAGE2_CHGRP_0,ADMA Global Page 2 CHGRP Register"
hexmask.long.byte 0x08 0.--7. 1. " ENABLE                       ,Enable"
line.long 0x0C "PAGE3_CHGRP_0,ADMA Global Page 3 CHGRP Register"
hexmask.long.byte 0x0C 0.--7. 1. " ENABLE                       ,Enable"
line.long 0x10 "PAGE4_CHGRP_0,ADMA Global Page 4 CHGRP Register"
hexmask.long.byte 0x10 0.--7. 1. " ENABLE                       ,Enable"
group.long 0x50++0x03
line.long 0x00 "PAGE1_ARAM_CFG_0,ADMA Global Page 1 ARAM Config Register"
bitfld.long 0x00 0. " ARAM_DISABLE                 ,ARAM disable" "No,Yes"
group.long 0x54++0x03
line.long 0x00 "PAGE2_ARAM_CFG_0,ADMA Global Page 2 ARAM Config Register"
bitfld.long 0x00 0. " ARAM_DISABLE                 ,ARAM disable" "No,Yes"
group.long 0x58++0x03
line.long 0x00 "PAGE3_ARAM_CFG_0,ADMA Global Page 3 ARAM Config Register"
bitfld.long 0x00 0. " ARAM_DISABLE                 ,ARAM disable" "No,Yes"
group.long 0x5C++0x03
line.long 0x00 "PAGE4_ARAM_CFG_0,ADMA Global Page 4 ARAM Config Register"
bitfld.long 0x00 0. " ARAM_DISABLE                 ,ARAM disable" "No,Yes"
group.long 0x70++0x0F
line.long 0x00 "PAGE1_RX_REQUESTORS_0,ADMA Global Page 1 RX Requestors Register"
hexmask.long 0x00 0.--24. 1. " ENABLE                       ,Enable"
line.long 0x04 "PAGE2_RX_REQUESTORS_0,ADMA Global Page 2 RX Requestors Register"
hexmask.long 0x04 0.--24. 1. " ENABLE                       ,Enable"
line.long 0x08 "PAGE3_RX_REQUESTORS_0,ADMA Global Page 3 RX Requestors Register"
hexmask.long 0x08 0.--24. 1. " ENABLE                       ,Enable"
line.long 0x0C "PAGE4_RX_REQUESTORS_0,ADMA Global Page 4 RX Requestors Register"
hexmask.long 0x0C 0.--24. 1. " ENABLE                       ,Enable"
group.long 0x84++0x0F
line.long 0x00 "PAGE1_TX_REQUESTORS_0,ADMA Global Page 1 TX Requestors Register"
hexmask.long.tbyte 0x00 0.--23. 1. " ENABLE                       ,Enable"
line.long 0x04 "PAGE2_TX_REQUESTORS_0,ADMA Global Page 2 TX Requestors Register"
hexmask.long.tbyte 0x04 0.--23. 1. " ENABLE                       ,Enable"
line.long 0x08 "PAGE3_TX_REQUESTORS_0,ADMA Global Page 3 TX Requestors Register"
hexmask.long.tbyte 0x08 0.--23. 1. " ENABLE                       ,Enable"
line.long 0x0C "PAGE4_TX_REQUESTORS_0,ADMA Global Page 4 TX Requestors Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " ENABLE                       ,Enable"
group.long 0x98++0x03
line.long 0x00 "CH1_REGION_ID_0,ADMA Global Channel 1 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x9C++0x03
line.long 0x00 "CH2_REGION_ID_0,ADMA Global Channel 2 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xA0++0x03
line.long 0x00 "CH3_REGION_ID_0,ADMA Global Channel 3 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xA4++0x03
line.long 0x00 "CH4_REGION_ID_0,ADMA Global Channel 4 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xA8++0x03
line.long 0x00 "CH5_REGION_ID_0,ADMA Global Channel 5 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xAC++0x03
line.long 0x00 "CH6_REGION_ID_0,ADMA Global Channel 6 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xB0++0x03
line.long 0x00 "CH7_REGION_ID_0,ADMA Global Channel 7 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xB4++0x03
line.long 0x00 "CH8_REGION_ID_0,ADMA Global Channel 8 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xB8++0x03
line.long 0x00 "CH9_REGION_ID_0,ADMA Global Channel 9 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xBC++0x03
line.long 0x00 "CH10_REGION_ID_0,ADMA Global Channel 10 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xC0++0x03
line.long 0x00 "CH11_REGION_ID_0,ADMA Global Channel 11 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xC4++0x03
line.long 0x00 "CH12_REGION_ID_0,ADMA Global Channel 12 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xC8++0x03
line.long 0x00 "CH13_REGION_ID_0,ADMA Global Channel 13 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xCC++0x03
line.long 0x00 "CH14_REGION_ID_0,ADMA Global Channel 14 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xD0++0x03
line.long 0x00 "CH15_REGION_ID_0,ADMA Global Channel 15 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xD4++0x03
line.long 0x00 "CH16_REGION_ID_0,ADMA Global Channel 16 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xD8++0x03
line.long 0x00 "CH17_REGION_ID_0,ADMA Global Channel 17 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xDC++0x03
line.long 0x00 "CH18_REGION_ID_0,ADMA Global Channel 18 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xE0++0x03
line.long 0x00 "CH19_REGION_ID_0,ADMA Global Channel 19 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xE4++0x03
line.long 0x00 "CH20_REGION_ID_0,ADMA Global Channel 20 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xE8++0x03
line.long 0x00 "CH21_REGION_ID_0,ADMA Global Channel 21 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xEC++0x03
line.long 0x00 "CH22_REGION_ID_0,ADMA Global Channel 22 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xF0++0x03
line.long 0x00 "CH23_REGION_ID_0,ADMA Global Channel 23 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xF4++0x03
line.long 0x00 "CH24_REGION_ID_0,ADMA Global Channel 24 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xF8++0x03
line.long 0x00 "CH25_REGION_ID_0,ADMA Global Channel 25 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0xFC++0x03
line.long 0x00 "CH26_REGION_ID_0,ADMA Global Channel 26 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x100++0x03
line.long 0x00 "CH27_REGION_ID_0,ADMA Global Channel 27 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x104++0x03
line.long 0x00 "CH28_REGION_ID_0,ADMA Global Channel 28 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x108++0x03
line.long 0x00 "CH29_REGION_ID_0,ADMA Global Channel 29 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x10C++0x03
line.long 0x00 "CH30_REGION_ID_0,ADMA Global Channel 30 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x110++0x03
line.long 0x00 "CH31_REGION_ID_0,ADMA Global Channel 31 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
group.long 0x114++0x03
line.long 0x00 "CH32_REGION_ID_0,ADMA Global Channel 32 Region ID Register"
bitfld.long 0x00 0.--1. " REGION_ID                    ,Region ID" "0,1,2,3"
width 0x0B
tree.end
tree "PAGE 1"
base ad:0x02930000
width 22.
tree "Channel 1"
group.long (0x10000)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 1 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 1 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 1 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 1 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10000+0x24))&0x4)==0x4)
group.long (0x10000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 1 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x80000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x00000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x80000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x00000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x80000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x00000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10000+0x2C))&0x80000000)==0x80000000)
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 1 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 1 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 1 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 1 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10000+0x24))&0xF00)==0x400)
group.long (0x10000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 1 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 1 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 1 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 1 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 1 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 2"
group.long (0x10100)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 2 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 2 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 2 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 2 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10100+0x24))&0x4)==0x4)
group.long (0x10100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 2 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x80000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x00000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x80000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x00000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x80000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x00000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10100+0x2C))&0x80000000)==0x80000000)
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 2 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 2 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 2 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 2 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10100+0x24))&0xF00)==0x400)
group.long (0x10100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 2 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 2 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 2 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 2 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 2 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 3"
group.long (0x10200)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 3 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 3 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 3 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 3 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10200+0x24))&0x4)==0x4)
group.long (0x10200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 3 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x80000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x00000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x80000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x00000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x80000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x00000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10200+0x2C))&0x80000000)==0x80000000)
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 3 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 3 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 3 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 3 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10200+0x24))&0xF00)==0x400)
group.long (0x10200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 3 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 3 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 3 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 3 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 3 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 4"
group.long (0x10300)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 4 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 4 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 4 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 4 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10300+0x24))&0x4)==0x4)
group.long (0x10300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 4 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x80000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x00000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x80000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x00000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x80000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x00000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10300+0x2C))&0x80000000)==0x80000000)
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 4 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 4 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 4 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 4 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10300+0x24))&0xF00)==0x400)
group.long (0x10300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 4 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 4 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 4 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 4 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 4 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 5"
group.long (0x10400)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 5 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 5 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 5 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 5 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10400+0x24))&0x4)==0x4)
group.long (0x10400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 5 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x80000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x00000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x80000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x00000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x80000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x00000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10400+0x2C))&0x80000000)==0x80000000)
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 5 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 5 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 5 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 5 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10400+0x24))&0xF00)==0x400)
group.long (0x10400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 5 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 5 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 5 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 5 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 5 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 6"
group.long (0x10500)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 6 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 6 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 6 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 6 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10500+0x24))&0x4)==0x4)
group.long (0x10500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 6 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x80000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x00000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x80000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x00000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x80000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x00000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10500+0x2C))&0x80000000)==0x80000000)
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 6 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 6 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 6 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 6 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10500+0x24))&0xF00)==0x400)
group.long (0x10500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 6 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 6 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 6 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 6 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 6 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 7"
group.long (0x10600)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 7 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 7 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 7 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 7 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10600+0x24))&0x4)==0x4)
group.long (0x10600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 7 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x80000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x00000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x80000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x00000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x80000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x00000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10600+0x2C))&0x80000000)==0x80000000)
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 7 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 7 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 7 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 7 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10600+0x24))&0xF00)==0x400)
group.long (0x10600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 7 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 7 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 7 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 7 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 7 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 8"
group.long (0x10700)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 8 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 8 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 8 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 8 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10700+0x24))&0x4)==0x4)
group.long (0x10700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 8 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x80000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x00000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x80000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x00000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x80000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x00000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10700+0x2C))&0x80000000)==0x80000000)
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 8 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 8 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 8 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 8 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10700+0x24))&0xF00)==0x400)
group.long (0x10700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 8 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 8 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 8 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 8 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 8 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 9"
group.long (0x10800)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 9 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 9 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 9 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 9 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10800+0x24))&0x4)==0x4)
group.long (0x10800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 9 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x80000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x00000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x80000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x00000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x80000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x00000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10800+0x2C))&0x80000000)==0x80000000)
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 9 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 9 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 9 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 9 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10800+0x24))&0xF00)==0x400)
group.long (0x10800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 9 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 9 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 9 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 9 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 9 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 10"
group.long (0x10900)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 10 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 10 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 10 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 10 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10900+0x24))&0x4)==0x4)
group.long (0x10900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 10 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x80000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x00000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x80000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x00000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x80000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x00000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10900+0x2C))&0x80000000)==0x80000000)
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 10 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 10 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 10 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 10 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10900+0x24))&0xF00)==0x400)
group.long (0x10900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 10 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 10 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 10 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 10 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 10 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 11"
group.long (0x10A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 11 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 11 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 11 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 11 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10A00+0x24))&0x4)==0x4)
group.long (0x10A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 11 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x80000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x00000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x80000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x00000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x80000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x00000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10A00+0x2C))&0x80000000)==0x80000000)
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 11 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 11 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 11 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 11 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10A00+0x24))&0xF00)==0x400)
group.long (0x10A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 11 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 11 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 11 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 11 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 11 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 12"
group.long (0x10B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 12 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 12 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 12 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 12 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10B00+0x24))&0x4)==0x4)
group.long (0x10B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 12 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x80000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x00000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x80000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x00000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x80000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x00000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10B00+0x2C))&0x80000000)==0x80000000)
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 12 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 12 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 12 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 12 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10B00+0x24))&0xF00)==0x400)
group.long (0x10B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 12 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 12 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 12 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 12 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 12 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 13"
group.long (0x10C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 13 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 13 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 13 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 13 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10C00+0x24))&0x4)==0x4)
group.long (0x10C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 13 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x80000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x00000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x80000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x00000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x80000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x00000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10C00+0x2C))&0x80000000)==0x80000000)
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 13 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 13 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 13 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 13 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10C00+0x24))&0xF00)==0x400)
group.long (0x10C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 13 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 13 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 13 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 13 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 13 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 14"
group.long (0x10D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 14 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 14 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 14 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 14 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10D00+0x24))&0x4)==0x4)
group.long (0x10D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 14 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x80000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x00000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x80000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x00000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x80000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x00000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10D00+0x2C))&0x80000000)==0x80000000)
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 14 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 14 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 14 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 14 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10D00+0x24))&0xF00)==0x400)
group.long (0x10D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 14 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 14 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 14 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 14 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 14 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 15"
group.long (0x10E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 15 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 15 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 15 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 15 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10E00+0x24))&0x4)==0x4)
group.long (0x10E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 15 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x80000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x00000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x80000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x00000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x80000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x00000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10E00+0x2C))&0x80000000)==0x80000000)
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 15 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 15 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 15 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 15 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10E00+0x24))&0xF00)==0x400)
group.long (0x10E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 15 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 15 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 15 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 15 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 15 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 16"
group.long (0x10F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 16 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 16 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x10F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 16 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x10F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 16 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x10F00+0x24))&0x4)==0x4)
group.long (0x10F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x10F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x10F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 16 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x80000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x00000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x80000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x00000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x80000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x10F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x00000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x10F00+0x2C))&0x80000000)==0x80000000)
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x10F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x10F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 16 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x10F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 16 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x10F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 16 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x10F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 16 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x10F00+0x24))&0xF00)==0x400)
group.long (0x10F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 16 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x10F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 16 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 16 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 16 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 16 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 17"
group.long (0x11000)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 17 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 17 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 17 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 17 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11000+0x24))&0x4)==0x4)
group.long (0x11000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 17 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x80000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x00000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x80000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x00000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x80000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x00000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11000+0x2C))&0x80000000)==0x80000000)
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 17 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 17 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 17 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 17 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11000+0x24))&0xF00)==0x400)
group.long (0x11000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 17 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 17 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 17 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 17 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 17 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 18"
group.long (0x11100)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 18 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 18 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 18 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 18 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11100+0x24))&0x4)==0x4)
group.long (0x11100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 18 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x80000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x00000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x80000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x00000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x80000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x00000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11100+0x2C))&0x80000000)==0x80000000)
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 18 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 18 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 18 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 18 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11100+0x24))&0xF00)==0x400)
group.long (0x11100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 18 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 18 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 18 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 18 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 18 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 19"
group.long (0x11200)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 19 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 19 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 19 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 19 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11200+0x24))&0x4)==0x4)
group.long (0x11200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 19 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x80000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x00000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x80000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x00000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x80000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x00000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11200+0x2C))&0x80000000)==0x80000000)
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 19 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 19 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 19 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 19 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11200+0x24))&0xF00)==0x400)
group.long (0x11200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 19 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 19 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 19 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 19 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 19 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 20"
group.long (0x11300)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 20 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 20 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 20 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 20 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11300+0x24))&0x4)==0x4)
group.long (0x11300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 20 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x80000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x00000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x80000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x00000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x80000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x00000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11300+0x2C))&0x80000000)==0x80000000)
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 20 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 20 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 20 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 20 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11300+0x24))&0xF00)==0x400)
group.long (0x11300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 20 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 20 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 20 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 20 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 20 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 21"
group.long (0x11400)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 21 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 21 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 21 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 21 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11400+0x24))&0x4)==0x4)
group.long (0x11400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 21 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x80000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x00000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x80000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x00000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x80000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x00000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11400+0x2C))&0x80000000)==0x80000000)
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 21 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 21 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 21 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 21 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11400+0x24))&0xF00)==0x400)
group.long (0x11400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 21 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 21 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 21 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 21 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 21 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 22"
group.long (0x11500)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 22 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 22 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 22 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 22 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11500+0x24))&0x4)==0x4)
group.long (0x11500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 22 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x80000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x00000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x80000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x00000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x80000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x00000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11500+0x2C))&0x80000000)==0x80000000)
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 22 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 22 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 22 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 22 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11500+0x24))&0xF00)==0x400)
group.long (0x11500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 22 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 22 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 22 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 22 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 22 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 23"
group.long (0x11600)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 23 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 23 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 23 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 23 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11600+0x24))&0x4)==0x4)
group.long (0x11600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 23 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x80000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x00000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x80000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x00000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x80000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x00000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11600+0x2C))&0x80000000)==0x80000000)
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 23 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 23 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 23 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 23 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11600+0x24))&0xF00)==0x400)
group.long (0x11600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 23 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 23 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 23 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 23 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 23 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 24"
group.long (0x11700)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 24 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 24 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 24 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 24 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11700+0x24))&0x4)==0x4)
group.long (0x11700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 24 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x80000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x00000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x80000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x00000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x80000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x00000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11700+0x2C))&0x80000000)==0x80000000)
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 24 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 24 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 24 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 24 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11700+0x24))&0xF00)==0x400)
group.long (0x11700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 24 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 24 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 24 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 24 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 24 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 25"
group.long (0x11800)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 25 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 25 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 25 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 25 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11800+0x24))&0x4)==0x4)
group.long (0x11800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 25 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x80000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x00000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x80000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x00000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x80000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x00000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11800+0x2C))&0x80000000)==0x80000000)
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 25 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 25 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 25 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 25 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11800+0x24))&0xF00)==0x400)
group.long (0x11800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 25 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 25 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 25 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 25 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 25 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 26"
group.long (0x11900)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 26 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 26 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 26 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 26 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11900+0x24))&0x4)==0x4)
group.long (0x11900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 26 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x80000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x00000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x80000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x00000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x80000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x00000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11900+0x2C))&0x80000000)==0x80000000)
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 26 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 26 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 26 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 26 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11900+0x24))&0xF00)==0x400)
group.long (0x11900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 26 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 26 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 26 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 26 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 26 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 27"
group.long (0x11A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 27 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 27 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 27 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 27 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11A00+0x24))&0x4)==0x4)
group.long (0x11A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 27 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x80000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x00000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x80000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x00000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x80000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x00000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11A00+0x2C))&0x80000000)==0x80000000)
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 27 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 27 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 27 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 27 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11A00+0x24))&0xF00)==0x400)
group.long (0x11A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 27 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 27 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 27 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 27 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 27 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 28"
group.long (0x11B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 28 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 28 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 28 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 28 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11B00+0x24))&0x4)==0x4)
group.long (0x11B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 28 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x80000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x00000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x80000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x00000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x80000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x00000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11B00+0x2C))&0x80000000)==0x80000000)
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 28 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 28 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 28 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 28 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11B00+0x24))&0xF00)==0x400)
group.long (0x11B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 28 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 28 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 28 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 28 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 28 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 29"
group.long (0x11C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 29 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 29 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 29 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 29 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11C00+0x24))&0x4)==0x4)
group.long (0x11C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 29 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x80000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x00000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x80000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x00000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x80000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x00000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11C00+0x2C))&0x80000000)==0x80000000)
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 29 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 29 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 29 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 29 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11C00+0x24))&0xF00)==0x400)
group.long (0x11C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 29 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 29 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 29 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 29 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 29 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 30"
group.long (0x11D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 30 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 30 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 30 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 30 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11D00+0x24))&0x4)==0x4)
group.long (0x11D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 30 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x80000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x00000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x80000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x00000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x80000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x00000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11D00+0x2C))&0x80000000)==0x80000000)
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 30 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 30 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 30 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 30 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11D00+0x24))&0xF00)==0x400)
group.long (0x11D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 30 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 30 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 30 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 30 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 30 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 31"
group.long (0x11E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 31 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 31 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 31 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 31 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11E00+0x24))&0x4)==0x4)
group.long (0x11E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 31 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x80000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x00000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x80000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x00000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x80000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x00000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11E00+0x2C))&0x80000000)==0x80000000)
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 31 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 31 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 31 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 31 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11E00+0x24))&0xF00)==0x400)
group.long (0x11E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 31 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 31 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 31 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 31 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 31 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 32"
group.long (0x11F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 1 Channel 32 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 1 Channel 32 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x11F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 1 Channel 32 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x11F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 1 Channel 32 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x11F00+0x24))&0x4)==0x4)
group.long (0x11F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x11F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 1 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x11F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 1 Channel 32 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x80000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x00000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x80000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x00000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x80000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x11F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x00000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x11F00+0x2C))&0x80000000)==0x80000000)
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x11F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 1 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x11F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 1 Channel 32 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x11F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 1 Channel 32 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x11F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 1 Channel 32 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x11F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 1 Channel 32 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x11F00+0x24))&0xF00)==0x400)
group.long (0x11F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 1 Channel 32 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x11F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 1 Channel 32 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 1 Channel 32 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 1 Channel 32 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 1 Channel 32 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
width 0x0B
tree.end
tree "PAGE 2"
base ad:0x02930000
width 22.
tree "Channel 1"
group.long (0x20000)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 1 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 1 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 1 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 1 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20000+0x24))&0x4)==0x4)
group.long (0x20000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 1 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x80000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x00000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x80000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x00000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x80000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x00000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20000+0x2C))&0x80000000)==0x80000000)
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 1 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 1 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 1 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 1 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20000+0x24))&0xF00)==0x400)
group.long (0x20000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 1 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 1 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 1 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 1 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 1 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 2"
group.long (0x20100)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 2 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 2 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 2 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 2 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20100+0x24))&0x4)==0x4)
group.long (0x20100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 2 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x80000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x00000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x80000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x00000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x80000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x00000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20100+0x2C))&0x80000000)==0x80000000)
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 2 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 2 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 2 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 2 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20100+0x24))&0xF00)==0x400)
group.long (0x20100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 2 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 2 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 2 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 2 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 2 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 3"
group.long (0x20200)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 3 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 3 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 3 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 3 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20200+0x24))&0x4)==0x4)
group.long (0x20200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 3 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x80000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x00000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x80000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x00000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x80000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x00000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20200+0x2C))&0x80000000)==0x80000000)
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 3 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 3 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 3 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 3 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20200+0x24))&0xF00)==0x400)
group.long (0x20200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 3 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 3 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 3 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 3 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 3 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 4"
group.long (0x20300)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 4 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 4 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 4 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 4 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20300+0x24))&0x4)==0x4)
group.long (0x20300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 4 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x80000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x00000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x80000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x00000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x80000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x00000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20300+0x2C))&0x80000000)==0x80000000)
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 4 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 4 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 4 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 4 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20300+0x24))&0xF00)==0x400)
group.long (0x20300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 4 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 4 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 4 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 4 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 4 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 5"
group.long (0x20400)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 5 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 5 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 5 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 5 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20400+0x24))&0x4)==0x4)
group.long (0x20400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 5 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x80000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x00000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x80000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x00000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x80000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x00000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20400+0x2C))&0x80000000)==0x80000000)
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 5 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 5 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 5 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 5 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20400+0x24))&0xF00)==0x400)
group.long (0x20400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 5 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 5 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 5 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 5 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 5 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 6"
group.long (0x20500)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 6 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 6 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 6 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 6 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20500+0x24))&0x4)==0x4)
group.long (0x20500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 6 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x80000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x00000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x80000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x00000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x80000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x00000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20500+0x2C))&0x80000000)==0x80000000)
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 6 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 6 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 6 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 6 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20500+0x24))&0xF00)==0x400)
group.long (0x20500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 6 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 6 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 6 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 6 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 6 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 7"
group.long (0x20600)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 7 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 7 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 7 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 7 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20600+0x24))&0x4)==0x4)
group.long (0x20600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 7 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x80000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x00000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x80000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x00000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x80000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x00000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20600+0x2C))&0x80000000)==0x80000000)
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 7 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 7 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 7 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 7 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20600+0x24))&0xF00)==0x400)
group.long (0x20600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 7 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 7 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 7 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 7 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 7 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 8"
group.long (0x20700)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 8 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 8 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 8 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 8 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20700+0x24))&0x4)==0x4)
group.long (0x20700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 8 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x80000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x00000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x80000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x00000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x80000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x00000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20700+0x2C))&0x80000000)==0x80000000)
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 8 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 8 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 8 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 8 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20700+0x24))&0xF00)==0x400)
group.long (0x20700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 8 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 8 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 8 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 8 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 8 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 9"
group.long (0x20800)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 9 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 9 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 9 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 9 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20800+0x24))&0x4)==0x4)
group.long (0x20800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 9 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x80000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x00000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x80000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x00000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x80000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x00000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20800+0x2C))&0x80000000)==0x80000000)
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 9 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 9 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 9 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 9 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20800+0x24))&0xF00)==0x400)
group.long (0x20800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 9 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 9 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 9 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 9 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 9 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 10"
group.long (0x20900)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 10 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 10 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 10 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 10 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20900+0x24))&0x4)==0x4)
group.long (0x20900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 10 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x80000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x00000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x80000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x00000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x80000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x00000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20900+0x2C))&0x80000000)==0x80000000)
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 10 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 10 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 10 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 10 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20900+0x24))&0xF00)==0x400)
group.long (0x20900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 10 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 10 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 10 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 10 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 10 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 11"
group.long (0x20A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 11 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 11 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 11 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 11 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20A00+0x24))&0x4)==0x4)
group.long (0x20A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 11 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x80000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x00000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x80000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x00000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x80000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x00000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20A00+0x2C))&0x80000000)==0x80000000)
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 11 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 11 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 11 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 11 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20A00+0x24))&0xF00)==0x400)
group.long (0x20A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 11 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 11 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 11 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 11 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 11 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 12"
group.long (0x20B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 12 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 12 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 12 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 12 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20B00+0x24))&0x4)==0x4)
group.long (0x20B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 12 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x80000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x00000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x80000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x00000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x80000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x00000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20B00+0x2C))&0x80000000)==0x80000000)
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 12 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 12 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 12 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 12 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20B00+0x24))&0xF00)==0x400)
group.long (0x20B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 12 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 12 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 12 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 12 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 12 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 13"
group.long (0x20C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 13 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 13 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 13 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 13 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20C00+0x24))&0x4)==0x4)
group.long (0x20C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 13 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x80000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x00000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x80000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x00000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x80000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x00000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20C00+0x2C))&0x80000000)==0x80000000)
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 13 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 13 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 13 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 13 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20C00+0x24))&0xF00)==0x400)
group.long (0x20C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 13 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 13 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 13 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 13 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 13 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 14"
group.long (0x20D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 14 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 14 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 14 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 14 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20D00+0x24))&0x4)==0x4)
group.long (0x20D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 14 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x80000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x00000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x80000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x00000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x80000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x00000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20D00+0x2C))&0x80000000)==0x80000000)
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 14 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 14 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 14 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 14 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20D00+0x24))&0xF00)==0x400)
group.long (0x20D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 14 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 14 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 14 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 14 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 14 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 15"
group.long (0x20E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 15 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 15 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 15 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 15 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20E00+0x24))&0x4)==0x4)
group.long (0x20E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 15 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x80000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x00000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x80000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x00000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x80000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x00000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20E00+0x2C))&0x80000000)==0x80000000)
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 15 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 15 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 15 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 15 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20E00+0x24))&0xF00)==0x400)
group.long (0x20E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 15 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 15 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 15 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 15 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 15 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 16"
group.long (0x20F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 16 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 16 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x20F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 16 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x20F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 16 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x20F00+0x24))&0x4)==0x4)
group.long (0x20F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x20F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x20F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 16 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x80000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x00000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x80000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x00000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x80000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x20F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x00000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x20F00+0x2C))&0x80000000)==0x80000000)
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x20F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x20F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 16 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x20F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 16 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x20F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 16 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x20F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 16 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x20F00+0x24))&0xF00)==0x400)
group.long (0x20F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 16 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x20F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 16 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 16 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 16 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 16 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 17"
group.long (0x21000)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 17 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 17 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 17 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 17 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21000+0x24))&0x4)==0x4)
group.long (0x21000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 17 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x80000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x00000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x80000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x00000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x80000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x00000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21000+0x2C))&0x80000000)==0x80000000)
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 17 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 17 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 17 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 17 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21000+0x24))&0xF00)==0x400)
group.long (0x21000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 17 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 17 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 17 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 17 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 17 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 18"
group.long (0x21100)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 18 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 18 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 18 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 18 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21100+0x24))&0x4)==0x4)
group.long (0x21100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 18 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x80000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x00000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x80000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x00000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x80000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x00000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21100+0x2C))&0x80000000)==0x80000000)
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 18 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 18 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 18 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 18 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21100+0x24))&0xF00)==0x400)
group.long (0x21100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 18 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 18 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 18 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 18 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 18 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 19"
group.long (0x21200)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 19 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 19 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 19 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 19 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21200+0x24))&0x4)==0x4)
group.long (0x21200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 19 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x80000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x00000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x80000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x00000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x80000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x00000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21200+0x2C))&0x80000000)==0x80000000)
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 19 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 19 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 19 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 19 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21200+0x24))&0xF00)==0x400)
group.long (0x21200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 19 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 19 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 19 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 19 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 19 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 20"
group.long (0x21300)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 20 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 20 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 20 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 20 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21300+0x24))&0x4)==0x4)
group.long (0x21300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 20 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x80000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x00000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x80000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x00000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x80000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x00000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21300+0x2C))&0x80000000)==0x80000000)
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 20 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 20 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 20 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 20 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21300+0x24))&0xF00)==0x400)
group.long (0x21300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 20 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 20 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 20 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 20 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 20 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 21"
group.long (0x21400)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 21 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 21 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 21 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 21 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21400+0x24))&0x4)==0x4)
group.long (0x21400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 21 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x80000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x00000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x80000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x00000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x80000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x00000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21400+0x2C))&0x80000000)==0x80000000)
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 21 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 21 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 21 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 21 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21400+0x24))&0xF00)==0x400)
group.long (0x21400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 21 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 21 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 21 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 21 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 21 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 22"
group.long (0x21500)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 22 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 22 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 22 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 22 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21500+0x24))&0x4)==0x4)
group.long (0x21500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 22 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x80000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x00000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x80000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x00000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x80000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x00000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21500+0x2C))&0x80000000)==0x80000000)
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 22 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 22 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 22 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 22 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21500+0x24))&0xF00)==0x400)
group.long (0x21500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 22 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 22 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 22 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 22 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 22 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 23"
group.long (0x21600)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 23 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 23 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 23 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 23 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21600+0x24))&0x4)==0x4)
group.long (0x21600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 23 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x80000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x00000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x80000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x00000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x80000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x00000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21600+0x2C))&0x80000000)==0x80000000)
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 23 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 23 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 23 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 23 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21600+0x24))&0xF00)==0x400)
group.long (0x21600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 23 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 23 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 23 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 23 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 23 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 24"
group.long (0x21700)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 24 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 24 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 24 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 24 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21700+0x24))&0x4)==0x4)
group.long (0x21700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 24 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x80000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x00000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x80000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x00000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x80000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x00000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21700+0x2C))&0x80000000)==0x80000000)
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 24 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 24 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 24 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 24 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21700+0x24))&0xF00)==0x400)
group.long (0x21700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 24 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 24 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 24 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 24 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 24 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 25"
group.long (0x21800)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 25 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 25 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 25 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 25 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21800+0x24))&0x4)==0x4)
group.long (0x21800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 25 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x80000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x00000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x80000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x00000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x80000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x00000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21800+0x2C))&0x80000000)==0x80000000)
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 25 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 25 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 25 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 25 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21800+0x24))&0xF00)==0x400)
group.long (0x21800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 25 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 25 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 25 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 25 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 25 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 26"
group.long (0x21900)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 26 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 26 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 26 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 26 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21900+0x24))&0x4)==0x4)
group.long (0x21900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 26 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x80000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x00000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x80000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x00000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x80000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x00000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21900+0x2C))&0x80000000)==0x80000000)
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 26 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 26 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 26 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 26 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21900+0x24))&0xF00)==0x400)
group.long (0x21900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 26 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 26 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 26 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 26 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 26 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 27"
group.long (0x21A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 27 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 27 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 27 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 27 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21A00+0x24))&0x4)==0x4)
group.long (0x21A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 27 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x80000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x00000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x80000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x00000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x80000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x00000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21A00+0x2C))&0x80000000)==0x80000000)
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 27 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 27 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 27 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 27 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21A00+0x24))&0xF00)==0x400)
group.long (0x21A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 27 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 27 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 27 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 27 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 27 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 28"
group.long (0x21B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 28 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 28 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 28 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 28 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21B00+0x24))&0x4)==0x4)
group.long (0x21B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 28 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x80000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x00000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x80000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x00000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x80000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x00000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21B00+0x2C))&0x80000000)==0x80000000)
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 28 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 28 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 28 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 28 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21B00+0x24))&0xF00)==0x400)
group.long (0x21B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 28 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 28 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 28 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 28 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 28 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 29"
group.long (0x21C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 29 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 29 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 29 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 29 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21C00+0x24))&0x4)==0x4)
group.long (0x21C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 29 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x80000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x00000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x80000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x00000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x80000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x00000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21C00+0x2C))&0x80000000)==0x80000000)
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 29 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 29 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 29 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 29 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21C00+0x24))&0xF00)==0x400)
group.long (0x21C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 29 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 29 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 29 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 29 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 29 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 30"
group.long (0x21D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 30 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 30 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 30 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 30 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21D00+0x24))&0x4)==0x4)
group.long (0x21D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 30 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x80000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x00000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x80000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x00000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x80000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x00000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21D00+0x2C))&0x80000000)==0x80000000)
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 30 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 30 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 30 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 30 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21D00+0x24))&0xF00)==0x400)
group.long (0x21D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 30 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 30 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 30 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 30 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 30 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 31"
group.long (0x21E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 31 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 31 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 31 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 31 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21E00+0x24))&0x4)==0x4)
group.long (0x21E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 31 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x80000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x00000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x80000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x00000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x80000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x00000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21E00+0x2C))&0x80000000)==0x80000000)
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 31 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 31 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 31 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 31 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21E00+0x24))&0xF00)==0x400)
group.long (0x21E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 31 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 31 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 31 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 31 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 31 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 32"
group.long (0x21F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 2 Channel 32 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 2 Channel 32 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x21F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 2 Channel 32 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x21F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 2 Channel 32 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x21F00+0x24))&0x4)==0x4)
group.long (0x21F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x21F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 2 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x21F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 2 Channel 32 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x80000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x00000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x80000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x00000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x80000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x21F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x00000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x21F00+0x2C))&0x80000000)==0x80000000)
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x21F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 2 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x21F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 2 Channel 32 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x21F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 2 Channel 32 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x21F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 2 Channel 32 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x21F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 2 Channel 32 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x21F00+0x24))&0xF00)==0x400)
group.long (0x21F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 2 Channel 32 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x21F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 2 Channel 32 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 2 Channel 32 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 2 Channel 32 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 2 Channel 32 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
width 0x0B
tree.end
tree "PAGE 3"
base ad:0x02930000
width 22.
tree "Channel 1"
group.long (0x30000)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 1 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 1 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 1 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 1 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30000+0x24))&0x4)==0x4)
group.long (0x30000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 1 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x80000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x00000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x80000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x00000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x80000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x00000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30000+0x2C))&0x80000000)==0x80000000)
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 1 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 1 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 1 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 1 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30000+0x24))&0xF00)==0x400)
group.long (0x30000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 1 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 1 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 1 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 1 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 1 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 2"
group.long (0x30100)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 2 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 2 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 2 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 2 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30100+0x24))&0x4)==0x4)
group.long (0x30100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 2 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x80000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x00000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x80000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x00000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x80000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x00000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30100+0x2C))&0x80000000)==0x80000000)
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 2 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 2 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 2 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 2 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30100+0x24))&0xF00)==0x400)
group.long (0x30100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 2 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 2 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 2 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 2 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 2 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 3"
group.long (0x30200)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 3 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 3 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 3 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 3 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30200+0x24))&0x4)==0x4)
group.long (0x30200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 3 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x80000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x00000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x80000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x00000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x80000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x00000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30200+0x2C))&0x80000000)==0x80000000)
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 3 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 3 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 3 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 3 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30200+0x24))&0xF00)==0x400)
group.long (0x30200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 3 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 3 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 3 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 3 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 3 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 4"
group.long (0x30300)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 4 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 4 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 4 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 4 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30300+0x24))&0x4)==0x4)
group.long (0x30300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 4 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x80000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x00000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x80000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x00000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x80000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x00000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30300+0x2C))&0x80000000)==0x80000000)
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 4 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 4 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 4 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 4 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30300+0x24))&0xF00)==0x400)
group.long (0x30300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 4 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 4 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 4 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 4 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 4 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 5"
group.long (0x30400)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 5 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 5 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 5 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 5 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30400+0x24))&0x4)==0x4)
group.long (0x30400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 5 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x80000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x00000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x80000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x00000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x80000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x00000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30400+0x2C))&0x80000000)==0x80000000)
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 5 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 5 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 5 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 5 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30400+0x24))&0xF00)==0x400)
group.long (0x30400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 5 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 5 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 5 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 5 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 5 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 6"
group.long (0x30500)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 6 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 6 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 6 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 6 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30500+0x24))&0x4)==0x4)
group.long (0x30500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 6 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x80000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x00000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x80000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x00000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x80000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x00000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30500+0x2C))&0x80000000)==0x80000000)
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 6 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 6 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 6 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 6 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30500+0x24))&0xF00)==0x400)
group.long (0x30500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 6 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 6 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 6 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 6 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 6 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 7"
group.long (0x30600)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 7 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 7 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 7 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 7 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30600+0x24))&0x4)==0x4)
group.long (0x30600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 7 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x80000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x00000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x80000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x00000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x80000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x00000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30600+0x2C))&0x80000000)==0x80000000)
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 7 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 7 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 7 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 7 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30600+0x24))&0xF00)==0x400)
group.long (0x30600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 7 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 7 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 7 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 7 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 7 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 8"
group.long (0x30700)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 8 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 8 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 8 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 8 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30700+0x24))&0x4)==0x4)
group.long (0x30700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 8 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x80000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x00000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x80000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x00000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x80000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x00000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30700+0x2C))&0x80000000)==0x80000000)
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 8 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 8 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 8 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 8 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30700+0x24))&0xF00)==0x400)
group.long (0x30700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 8 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 8 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 8 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 8 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 8 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 9"
group.long (0x30800)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 9 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 9 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 9 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 9 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30800+0x24))&0x4)==0x4)
group.long (0x30800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 9 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x80000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x00000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x80000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x00000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x80000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x00000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30800+0x2C))&0x80000000)==0x80000000)
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 9 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 9 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 9 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 9 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30800+0x24))&0xF00)==0x400)
group.long (0x30800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 9 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 9 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 9 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 9 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 9 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 10"
group.long (0x30900)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 10 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 10 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 10 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 10 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30900+0x24))&0x4)==0x4)
group.long (0x30900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 10 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x80000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x00000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x80000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x00000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x80000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x00000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30900+0x2C))&0x80000000)==0x80000000)
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 10 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 10 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 10 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 10 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30900+0x24))&0xF00)==0x400)
group.long (0x30900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 10 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 10 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 10 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 10 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 10 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 11"
group.long (0x30A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 11 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 11 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 11 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 11 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30A00+0x24))&0x4)==0x4)
group.long (0x30A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 11 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x80000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x00000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x80000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x00000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x80000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x00000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30A00+0x2C))&0x80000000)==0x80000000)
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 11 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 11 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 11 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 11 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30A00+0x24))&0xF00)==0x400)
group.long (0x30A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 11 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 11 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 11 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 11 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 11 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 12"
group.long (0x30B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 12 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 12 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 12 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 12 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30B00+0x24))&0x4)==0x4)
group.long (0x30B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 12 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x80000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x00000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x80000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x00000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x80000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x00000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30B00+0x2C))&0x80000000)==0x80000000)
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 12 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 12 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 12 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 12 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30B00+0x24))&0xF00)==0x400)
group.long (0x30B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 12 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 12 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 12 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 12 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 12 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 13"
group.long (0x30C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 13 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 13 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 13 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 13 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30C00+0x24))&0x4)==0x4)
group.long (0x30C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 13 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x80000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x00000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x80000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x00000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x80000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x00000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30C00+0x2C))&0x80000000)==0x80000000)
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 13 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 13 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 13 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 13 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30C00+0x24))&0xF00)==0x400)
group.long (0x30C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 13 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 13 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 13 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 13 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 13 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 14"
group.long (0x30D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 14 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 14 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 14 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 14 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30D00+0x24))&0x4)==0x4)
group.long (0x30D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 14 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x80000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x00000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x80000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x00000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x80000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x00000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30D00+0x2C))&0x80000000)==0x80000000)
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 14 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 14 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 14 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 14 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30D00+0x24))&0xF00)==0x400)
group.long (0x30D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 14 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 14 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 14 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 14 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 14 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 15"
group.long (0x30E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 15 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 15 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 15 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 15 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30E00+0x24))&0x4)==0x4)
group.long (0x30E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 15 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x80000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x00000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x80000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x00000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x80000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x00000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30E00+0x2C))&0x80000000)==0x80000000)
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 15 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 15 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 15 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 15 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30E00+0x24))&0xF00)==0x400)
group.long (0x30E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 15 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 15 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 15 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 15 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 15 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 16"
group.long (0x30F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 16 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 16 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x30F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 16 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x30F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 16 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x30F00+0x24))&0x4)==0x4)
group.long (0x30F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x30F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x30F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 16 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x80000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x00000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x80000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x00000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x80000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x30F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x00000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x30F00+0x2C))&0x80000000)==0x80000000)
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x30F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x30F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 16 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x30F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 16 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x30F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 16 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x30F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 16 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x30F00+0x24))&0xF00)==0x400)
group.long (0x30F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 16 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x30F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 16 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 16 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 16 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 16 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 17"
group.long (0x31000)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 17 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 17 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 17 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 17 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31000+0x24))&0x4)==0x4)
group.long (0x31000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 17 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x80000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x00000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x80000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x00000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x80000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x00000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31000+0x2C))&0x80000000)==0x80000000)
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 17 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 17 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 17 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 17 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31000+0x24))&0xF00)==0x400)
group.long (0x31000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 17 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 17 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 17 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 17 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 17 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 18"
group.long (0x31100)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 18 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 18 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 18 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 18 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31100+0x24))&0x4)==0x4)
group.long (0x31100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 18 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x80000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x00000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x80000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x00000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x80000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x00000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31100+0x2C))&0x80000000)==0x80000000)
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 18 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 18 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 18 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 18 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31100+0x24))&0xF00)==0x400)
group.long (0x31100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 18 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 18 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 18 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 18 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 18 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 19"
group.long (0x31200)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 19 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 19 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 19 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 19 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31200+0x24))&0x4)==0x4)
group.long (0x31200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 19 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x80000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x00000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x80000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x00000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x80000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x00000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31200+0x2C))&0x80000000)==0x80000000)
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 19 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 19 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 19 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 19 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31200+0x24))&0xF00)==0x400)
group.long (0x31200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 19 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 19 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 19 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 19 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 19 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 20"
group.long (0x31300)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 20 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 20 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 20 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 20 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31300+0x24))&0x4)==0x4)
group.long (0x31300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 20 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x80000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x00000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x80000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x00000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x80000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x00000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31300+0x2C))&0x80000000)==0x80000000)
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 20 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 20 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 20 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 20 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31300+0x24))&0xF00)==0x400)
group.long (0x31300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 20 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 20 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 20 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 20 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 20 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 21"
group.long (0x31400)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 21 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 21 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 21 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 21 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31400+0x24))&0x4)==0x4)
group.long (0x31400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 21 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x80000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x00000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x80000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x00000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x80000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x00000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31400+0x2C))&0x80000000)==0x80000000)
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 21 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 21 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 21 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 21 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31400+0x24))&0xF00)==0x400)
group.long (0x31400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 21 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 21 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 21 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 21 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 21 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 22"
group.long (0x31500)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 22 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 22 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 22 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 22 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31500+0x24))&0x4)==0x4)
group.long (0x31500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 22 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x80000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x00000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x80000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x00000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x80000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x00000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31500+0x2C))&0x80000000)==0x80000000)
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 22 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 22 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 22 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 22 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31500+0x24))&0xF00)==0x400)
group.long (0x31500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 22 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 22 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 22 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 22 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 22 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 23"
group.long (0x31600)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 23 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 23 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 23 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 23 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31600+0x24))&0x4)==0x4)
group.long (0x31600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 23 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x80000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x00000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x80000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x00000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x80000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x00000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31600+0x2C))&0x80000000)==0x80000000)
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 23 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 23 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 23 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 23 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31600+0x24))&0xF00)==0x400)
group.long (0x31600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 23 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 23 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 23 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 23 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 23 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 24"
group.long (0x31700)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 24 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 24 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 24 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 24 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31700+0x24))&0x4)==0x4)
group.long (0x31700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 24 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x80000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x00000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x80000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x00000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x80000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x00000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31700+0x2C))&0x80000000)==0x80000000)
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 24 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 24 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 24 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 24 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31700+0x24))&0xF00)==0x400)
group.long (0x31700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 24 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 24 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 24 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 24 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 24 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 25"
group.long (0x31800)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 25 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 25 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 25 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 25 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31800+0x24))&0x4)==0x4)
group.long (0x31800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 25 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x80000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x00000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x80000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x00000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x80000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x00000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31800+0x2C))&0x80000000)==0x80000000)
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 25 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 25 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 25 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 25 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31800+0x24))&0xF00)==0x400)
group.long (0x31800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 25 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 25 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 25 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 25 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 25 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 26"
group.long (0x31900)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 26 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 26 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 26 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 26 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31900+0x24))&0x4)==0x4)
group.long (0x31900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 26 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x80000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x00000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x80000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x00000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x80000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x00000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31900+0x2C))&0x80000000)==0x80000000)
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 26 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 26 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 26 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 26 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31900+0x24))&0xF00)==0x400)
group.long (0x31900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 26 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 26 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 26 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 26 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 26 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 27"
group.long (0x31A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 27 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 27 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 27 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 27 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31A00+0x24))&0x4)==0x4)
group.long (0x31A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 27 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x80000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x00000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x80000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x00000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x80000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x00000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31A00+0x2C))&0x80000000)==0x80000000)
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 27 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 27 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 27 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 27 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31A00+0x24))&0xF00)==0x400)
group.long (0x31A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 27 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 27 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 27 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 27 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 27 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 28"
group.long (0x31B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 28 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 28 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 28 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 28 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31B00+0x24))&0x4)==0x4)
group.long (0x31B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 28 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x80000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x00000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x80000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x00000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x80000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x00000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31B00+0x2C))&0x80000000)==0x80000000)
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 28 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 28 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 28 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 28 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31B00+0x24))&0xF00)==0x400)
group.long (0x31B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 28 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 28 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 28 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 28 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 28 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 29"
group.long (0x31C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 29 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 29 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 29 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 29 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31C00+0x24))&0x4)==0x4)
group.long (0x31C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 29 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x80000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x00000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x80000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x00000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x80000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x00000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31C00+0x2C))&0x80000000)==0x80000000)
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 29 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 29 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 29 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 29 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31C00+0x24))&0xF00)==0x400)
group.long (0x31C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 29 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 29 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 29 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 29 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 29 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 30"
group.long (0x31D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 30 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 30 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 30 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 30 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31D00+0x24))&0x4)==0x4)
group.long (0x31D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 30 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x80000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x00000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x80000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x00000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x80000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x00000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31D00+0x2C))&0x80000000)==0x80000000)
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 30 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 30 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 30 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 30 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31D00+0x24))&0xF00)==0x400)
group.long (0x31D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 30 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 30 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 30 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 30 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 30 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 31"
group.long (0x31E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 31 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 31 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 31 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 31 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31E00+0x24))&0x4)==0x4)
group.long (0x31E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 31 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x80000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x00000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x80000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x00000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x80000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x00000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31E00+0x2C))&0x80000000)==0x80000000)
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 31 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 31 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 31 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 31 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31E00+0x24))&0xF00)==0x400)
group.long (0x31E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 31 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 31 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 31 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 31 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 31 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 32"
group.long (0x31F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 3 Channel 32 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 3 Channel 32 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x31F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 3 Channel 32 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x31F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 3 Channel 32 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x31F00+0x24))&0x4)==0x4)
group.long (0x31F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x31F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 3 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x31F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 3 Channel 32 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x80000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x00000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x80000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x00000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x80000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x31F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x00000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x31F00+0x2C))&0x80000000)==0x80000000)
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x31F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 3 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x31F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 3 Channel 32 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x31F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 3 Channel 32 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x31F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 3 Channel 32 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x31F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 3 Channel 32 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x31F00+0x24))&0xF00)==0x400)
group.long (0x31F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 3 Channel 32 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x31F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 3 Channel 32 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 3 Channel 32 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 3 Channel 32 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 3 Channel 32 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
width 0x0B
tree.end
tree "PAGE 4"
base ad:0x02930000
width 22.
tree "Channel 1"
group.long (0x40000)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 1 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 1 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 1 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 1 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40000+0x24))&0x4)==0x4)
group.long (0x40000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 1 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 1 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x80000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x00000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x80000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x00000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x80000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x00000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40000+0x2C))&0x80000000)==0x80000000)
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 1 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 1 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 1 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 1 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 1 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40000+0x24))&0xF00)==0x400)
group.long (0x40000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 1 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 1 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 1 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 1 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 1 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 2"
group.long (0x40100)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 2 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 2 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 2 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 2 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40100+0x24))&0x4)==0x4)
group.long (0x40100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 2 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 2 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x80000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x00000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x80000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x00000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x80000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x00000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40100+0x2C))&0x80000000)==0x80000000)
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 2 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 2 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 2 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 2 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 2 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40100+0x24))&0xF00)==0x400)
group.long (0x40100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 2 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 2 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 2 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 2 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 2 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 3"
group.long (0x40200)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 3 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 3 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 3 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 3 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40200+0x24))&0x4)==0x4)
group.long (0x40200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 3 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 3 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x80000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x00000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x80000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x00000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x80000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x00000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40200+0x2C))&0x80000000)==0x80000000)
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 3 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 3 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 3 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 3 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 3 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40200+0x24))&0xF00)==0x400)
group.long (0x40200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 3 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 3 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 3 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 3 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 3 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 4"
group.long (0x40300)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 4 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 4 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 4 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 4 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40300+0x24))&0x4)==0x4)
group.long (0x40300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 4 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 4 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x80000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x00000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x80000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x00000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x80000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x00000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40300+0x2C))&0x80000000)==0x80000000)
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 4 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 4 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 4 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 4 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 4 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40300+0x24))&0xF00)==0x400)
group.long (0x40300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 4 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 4 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 4 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 4 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 4 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 5"
group.long (0x40400)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 5 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 5 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 5 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 5 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40400+0x24))&0x4)==0x4)
group.long (0x40400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 5 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 5 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x80000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x00000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x80000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x00000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x80000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x00000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40400+0x2C))&0x80000000)==0x80000000)
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 5 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 5 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 5 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 5 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 5 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40400+0x24))&0xF00)==0x400)
group.long (0x40400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 5 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 5 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 5 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 5 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 5 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 6"
group.long (0x40500)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 6 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 6 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 6 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 6 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40500+0x24))&0x4)==0x4)
group.long (0x40500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 6 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 6 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x80000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x00000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x80000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x00000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x80000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x00000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40500+0x2C))&0x80000000)==0x80000000)
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 6 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 6 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 6 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 6 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 6 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40500+0x24))&0xF00)==0x400)
group.long (0x40500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 6 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 6 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 6 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 6 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 6 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 7"
group.long (0x40600)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 7 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 7 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 7 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 7 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40600+0x24))&0x4)==0x4)
group.long (0x40600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 7 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 7 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x80000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x00000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x80000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x00000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x80000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x00000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40600+0x2C))&0x80000000)==0x80000000)
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 7 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 7 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 7 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 7 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 7 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40600+0x24))&0xF00)==0x400)
group.long (0x40600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 7 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 7 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 7 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 7 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 7 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 8"
group.long (0x40700)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 8 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 8 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 8 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 8 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40700+0x24))&0x4)==0x4)
group.long (0x40700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 8 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 8 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x80000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x00000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x80000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x00000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x80000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x00000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40700+0x2C))&0x80000000)==0x80000000)
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 8 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 8 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 8 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 8 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 8 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40700+0x24))&0xF00)==0x400)
group.long (0x40700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 8 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 8 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 8 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 8 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 8 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 9"
group.long (0x40800)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 9 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 9 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 9 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 9 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40800+0x24))&0x4)==0x4)
group.long (0x40800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 9 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 9 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x80000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x00000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x80000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x00000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x80000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x00000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40800+0x2C))&0x80000000)==0x80000000)
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 9 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 9 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 9 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 9 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 9 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40800+0x24))&0xF00)==0x400)
group.long (0x40800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 9 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 9 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 9 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 9 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 9 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 10"
group.long (0x40900)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 10 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 10 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 10 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 10 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40900+0x24))&0x4)==0x4)
group.long (0x40900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 10 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 10 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x80000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x00000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x80000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x00000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x80000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x00000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40900+0x2C))&0x80000000)==0x80000000)
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 10 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 10 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 10 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 10 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 10 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40900+0x24))&0xF00)==0x400)
group.long (0x40900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 10 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 10 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 10 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 10 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 10 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 11"
group.long (0x40A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 11 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 11 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 11 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 11 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40A00+0x24))&0x4)==0x4)
group.long (0x40A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 11 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 11 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x80000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x00000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x80000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x00000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x80000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x00000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40A00+0x2C))&0x80000000)==0x80000000)
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 11 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 11 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 11 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 11 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 11 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40A00+0x24))&0xF00)==0x400)
group.long (0x40A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 11 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 11 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 11 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 11 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 11 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 12"
group.long (0x40B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 12 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 12 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 12 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 12 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40B00+0x24))&0x4)==0x4)
group.long (0x40B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 12 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 12 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x80000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x00000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x80000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x00000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x80000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x00000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40B00+0x2C))&0x80000000)==0x80000000)
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 12 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 12 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 12 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 12 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 12 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40B00+0x24))&0xF00)==0x400)
group.long (0x40B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 12 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 12 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 12 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 12 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 12 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 13"
group.long (0x40C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 13 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 13 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 13 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 13 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40C00+0x24))&0x4)==0x4)
group.long (0x40C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 13 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 13 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x80000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x00000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x80000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x00000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x80000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x00000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40C00+0x2C))&0x80000000)==0x80000000)
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 13 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 13 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 13 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 13 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 13 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40C00+0x24))&0xF00)==0x400)
group.long (0x40C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 13 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 13 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 13 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 13 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 13 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 14"
group.long (0x40D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 14 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 14 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 14 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 14 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40D00+0x24))&0x4)==0x4)
group.long (0x40D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 14 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 14 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x80000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x00000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x80000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x00000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x80000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x00000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40D00+0x2C))&0x80000000)==0x80000000)
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 14 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 14 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 14 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 14 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 14 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40D00+0x24))&0xF00)==0x400)
group.long (0x40D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 14 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 14 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 14 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 14 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 14 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 15"
group.long (0x40E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 15 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 15 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 15 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 15 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40E00+0x24))&0x4)==0x4)
group.long (0x40E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 15 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 15 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x80000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x00000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x80000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x00000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x80000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x00000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40E00+0x2C))&0x80000000)==0x80000000)
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 15 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 15 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 15 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 15 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 15 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40E00+0x24))&0xF00)==0x400)
group.long (0x40E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 15 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 15 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 15 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 15 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 15 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 16"
group.long (0x40F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 16 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 16 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x40F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 16 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x40F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 16 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x40F00+0x24))&0x4)==0x4)
group.long (0x40F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x40F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 16 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x40F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 16 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x80000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x00000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x80000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x00000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x80000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x40F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x00000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x40F00+0x2C))&0x80000000)==0x80000000)
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x40F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 16 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x40F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 16 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x40F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 16 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x40F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 16 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x40F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 16 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x40F00+0x24))&0xF00)==0x400)
group.long (0x40F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 16 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x40F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 16 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 16 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 16 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 16 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 17"
group.long (0x41000)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 17 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 17 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41000+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 17 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41000+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 17 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41000+0x24))&0x4)==0x4)
group.long (0x41000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41000+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 17 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41000+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 17 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x80000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x00000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x80000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x00000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x80000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41000+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x00000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41000+0x2C))&0x80000000)==0x80000000)
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41000+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 17 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41000+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 17 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41000+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 17 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41000+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 17 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41000+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 17 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41000+0x24))&0xF00)==0x400)
group.long (0x41000+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 17 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41000+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 17 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 17 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 17 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 17 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 18"
group.long (0x41100)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 18 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 18 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41100+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 18 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41100+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 18 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41100+0x24))&0x4)==0x4)
group.long (0x41100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41100+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 18 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41100+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 18 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x80000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x00000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x80000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x00000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x80000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41100+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x00000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41100+0x2C))&0x80000000)==0x80000000)
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41100+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 18 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41100+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 18 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41100+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 18 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41100+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 18 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41100+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 18 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41100+0x24))&0xF00)==0x400)
group.long (0x41100+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 18 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41100+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 18 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 18 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 18 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 18 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 19"
group.long (0x41200)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 19 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 19 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41200+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 19 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41200+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 19 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41200+0x24))&0x4)==0x4)
group.long (0x41200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41200+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 19 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41200+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 19 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x80000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x00000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x80000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x00000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x80000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41200+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x00000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41200+0x2C))&0x80000000)==0x80000000)
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41200+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 19 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41200+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 19 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41200+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 19 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41200+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 19 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41200+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 19 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41200+0x24))&0xF00)==0x400)
group.long (0x41200+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 19 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41200+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 19 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 19 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 19 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 19 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 20"
group.long (0x41300)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 20 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 20 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41300+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 20 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41300+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 20 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41300+0x24))&0x4)==0x4)
group.long (0x41300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41300+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 20 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41300+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 20 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x80000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x00000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x80000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x00000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x80000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41300+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x00000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41300+0x2C))&0x80000000)==0x80000000)
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41300+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 20 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41300+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 20 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41300+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 20 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41300+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 20 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41300+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 20 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41300+0x24))&0xF00)==0x400)
group.long (0x41300+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 20 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41300+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 20 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 20 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 20 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 20 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 21"
group.long (0x41400)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 21 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 21 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41400+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 21 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41400+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 21 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41400+0x24))&0x4)==0x4)
group.long (0x41400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41400+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 21 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41400+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 21 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x80000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x00000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x80000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x00000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x80000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41400+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x00000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41400+0x2C))&0x80000000)==0x80000000)
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41400+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 21 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41400+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 21 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41400+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 21 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41400+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 21 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41400+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 21 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41400+0x24))&0xF00)==0x400)
group.long (0x41400+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 21 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41400+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 21 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 21 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 21 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 21 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 22"
group.long (0x41500)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 22 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 22 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41500+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 22 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41500+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 22 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41500+0x24))&0x4)==0x4)
group.long (0x41500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41500+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 22 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41500+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 22 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x80000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x00000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x80000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x00000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x80000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41500+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x00000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41500+0x2C))&0x80000000)==0x80000000)
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41500+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 22 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41500+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 22 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41500+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 22 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41500+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 22 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41500+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 22 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41500+0x24))&0xF00)==0x400)
group.long (0x41500+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 22 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41500+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 22 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 22 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 22 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 22 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 23"
group.long (0x41600)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 23 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 23 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41600+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 23 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41600+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 23 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41600+0x24))&0x4)==0x4)
group.long (0x41600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41600+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 23 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41600+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 23 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x80000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x00000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x80000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x00000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x80000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41600+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x00000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41600+0x2C))&0x80000000)==0x80000000)
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41600+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 23 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41600+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 23 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41600+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 23 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41600+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 23 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41600+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 23 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41600+0x24))&0xF00)==0x400)
group.long (0x41600+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 23 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41600+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 23 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 23 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 23 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 23 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 24"
group.long (0x41700)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 24 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 24 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41700+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 24 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41700+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 24 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41700+0x24))&0x4)==0x4)
group.long (0x41700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41700+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 24 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41700+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 24 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x80000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x00000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x80000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x00000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x80000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41700+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x00000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41700+0x2C))&0x80000000)==0x80000000)
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41700+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 24 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41700+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 24 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41700+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 24 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41700+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 24 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41700+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 24 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41700+0x24))&0xF00)==0x400)
group.long (0x41700+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 24 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41700+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 24 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 24 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 24 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 24 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 25"
group.long (0x41800)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 25 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 25 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41800+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 25 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41800+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 25 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41800+0x24))&0x4)==0x4)
group.long (0x41800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41800+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 25 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41800+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 25 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x80000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x00000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x80000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x00000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x80000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41800+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x00000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41800+0x2C))&0x80000000)==0x80000000)
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41800+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 25 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41800+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 25 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41800+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 25 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41800+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 25 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41800+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 25 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41800+0x24))&0xF00)==0x400)
group.long (0x41800+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 25 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41800+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 25 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 25 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 25 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 25 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 26"
group.long (0x41900)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 26 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 26 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41900+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 26 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41900+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 26 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41900+0x24))&0x4)==0x4)
group.long (0x41900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41900+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 26 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41900+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 26 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x80000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x00000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x80000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x00000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x80000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41900+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x00000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41900+0x2C))&0x80000000)==0x80000000)
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41900+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 26 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41900+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 26 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41900+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 26 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41900+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 26 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41900+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 26 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41900+0x24))&0xF00)==0x400)
group.long (0x41900+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 26 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41900+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 26 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 26 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 26 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 26 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 27"
group.long (0x41A00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 27 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 27 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41A00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 27 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41A00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 27 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41A00+0x24))&0x4)==0x4)
group.long (0x41A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41A00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 27 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41A00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 27 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x80000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x00000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x80000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x00000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x80000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41A00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x00000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41A00+0x2C))&0x80000000)==0x80000000)
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41A00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 27 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41A00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 27 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41A00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 27 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41A00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 27 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41A00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 27 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41A00+0x24))&0xF00)==0x400)
group.long (0x41A00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 27 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41A00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 27 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 27 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 27 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 27 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 28"
group.long (0x41B00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 28 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 28 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41B00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 28 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41B00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 28 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41B00+0x24))&0x4)==0x4)
group.long (0x41B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41B00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 28 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41B00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 28 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x80000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x00000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x80000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x00000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x80000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41B00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x00000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41B00+0x2C))&0x80000000)==0x80000000)
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41B00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 28 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41B00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 28 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41B00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 28 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41B00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 28 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41B00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 28 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41B00+0x24))&0xF00)==0x400)
group.long (0x41B00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 28 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41B00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 28 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 28 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 28 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 28 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 29"
group.long (0x41C00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 29 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 29 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41C00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 29 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41C00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 29 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41C00+0x24))&0x4)==0x4)
group.long (0x41C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41C00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 29 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41C00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 29 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x80000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x00000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x80000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x00000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x80000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41C00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x00000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41C00+0x2C))&0x80000000)==0x80000000)
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41C00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 29 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41C00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 29 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41C00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 29 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41C00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 29 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41C00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 29 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41C00+0x24))&0xF00)==0x400)
group.long (0x41C00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 29 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41C00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 29 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 29 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 29 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 29 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 30"
group.long (0x41D00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 30 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 30 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41D00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 30 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41D00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 30 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41D00+0x24))&0x4)==0x4)
group.long (0x41D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41D00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 30 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41D00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 30 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x80000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x00000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x80000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x00000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x80000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41D00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x00000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41D00+0x2C))&0x80000000)==0x80000000)
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41D00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 30 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41D00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 30 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41D00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 30 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41D00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 30 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41D00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 30 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41D00+0x24))&0xF00)==0x400)
group.long (0x41D00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 30 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41D00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 30 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 30 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 30 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 30 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 31"
group.long (0x41E00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 31 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 31 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41E00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 31 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41E00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 31 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41E00+0x24))&0x4)==0x4)
group.long (0x41E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41E00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 31 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41E00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 31 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x80000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x00000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x80000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x00000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x80000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41E00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x00000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41E00+0x2C))&0x80000000)==0x80000000)
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41E00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 31 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41E00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 31 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41E00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 31 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41E00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 31 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41E00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 31 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41E00+0x24))&0xF00)==0x400)
group.long (0x41E00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 31 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41E00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 31 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 31 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 31 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 31 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
tree "Channel 32"
group.long (0x41F00)++0x07
line.long 0x00 "CMD_0,ADMA Page 4 Channel 32 Command Register"
bitfld.long 0x00 0. " TRANSFER_ENABLE              ,Enables DMA transfer" "False,True"
line.long 0x04 "SOFT_RESET_0,ADMA Page 4 Channel 32 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE                       ,Software initiated reset enable" "False,True"
rgroup.long (0x41F00+0x0C)++0x03
line.long 0x00 "STATUS_0,ADMA Page 4 Channel 32 Status Register"
bitfld.long 0x00 20.--22. " CURRENT_SOURCE_MEMORY_BUFFER ,Source memory buffer that is currently being read by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
bitfld.long 0x00 16.--18. "                    CURRENT_TARGET_MEMORY_BUFFER ,Target memory buffer that is currently being written into by ADMA" "BUFFER_1,BUFFER_2,BUFFER_3,BUFFER_4,BUFFER_5,BUFFER_6,BUFFER_7,BUFFER_8"
textline "                      "
bitfld.long 0x00 2. "          OUTSTANDING_TRANSFERS        ,Indicates if there is any DMA request pending to be completed" "False,True"
textline "                      "
bitfld.long 0x00 1. "          TRANSFER_PAUSED              ,Asserts when TRANSFER_PAUSE bit is set by software and all previously issued DMA requests are completed" "False,True"
bitfld.long 0x00 0. "                       TRANSFER_ENABLED             ,Transfer enabled" "False,True"
group.long (0x41F00+0x10)++0x03
line.long 0x00 "INT_STATUS_0_SET/CLR,ADMA Page 4 Channel 32 Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_DONE                ,Transfer done" "False,True"
if (((per.l(ad:0x02930000+0x41F00+0x24))&0x4)==0x4)
group.long (0x41F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 16.--21. "          TRIGGER_SELECT               ,Trigger select" ",CH1_TRANSFER_DONE,CH2_TRANSFER_DONE,CH3_TRANSFER_DONE,CH4_TRANSFER_DONE,CH5_TRANSFER_DONE,CH6_TRANSFER_DONE,CH7_TRANSFER_DONE,CH8_TRANSFER_DONE,CH9_TRANSFER_DONE,CH10_TRANSFER_DONE,CH11_TRANSFER_DONE,CH12_TRANSFER_DONE,CH13_TRANSFER_DONE,CH14_TRANSFER_DONE,CH15_TRANSFER_DONE,CH16_TRANSFER_DONE,CH17_TRANSFER_DONE,CH18_TRANSFER_DONE,CH19_TRANSFER_DONE,CH20_TRANSFER_DONE,CH21_TRANSFER_DONE,CH22_TRANSFER_DONE,CH23_TRANSFER_DONE,CH24_TRANSFER_DONE,CH25_TRANSFER_DONE,CH26_TRANSFER_DONE,CH27_TRANSFER_DONE,CH28_TRANSFER_DONE,CH29_TRANSFER_DONE,CH30_TRANSFER_DONE,CH31_TRANSFER_DONE,CH32_TRANSFER_DONE,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
else
group.long (0x41F00+0x24)++0x03
line.long 0x00 "CTRL_0,ADMA Page 4 Channel 32 Control Register"
bitfld.long 0x00 27.--31. " TX_REQUEST_SELECT            ,TX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 22.--26. "          TX_REQUEST_SELECT            ,RX request select" "Memory,AHUB_CH1_REQUEST,AHUB_CH2_REQUEST,AHUB_CH3_REQUEST,AHUB_CH4_REQUEST,AHUB_CH5_REQUEST,AHUB_CH6_REQUEST,AHUB_CH7_REQUEST,AHUB_CH8_REQUEST,AHUB_CH9_REQUEST,AHUB_CH10_REQUEST,AHUB_CH11_REQUEST,AHUB_CH12_REQUEST,AHUB_CH13_REQUEST,AHUB_CH14_REQUEST,AHUB_CH15_REQUEST,AHUB_CH16_REQUEST,AHUB_CH17_REQUEST,AHUB_CH18_REQUEST,AHUB_CH19_REQUEST,AHUB_CH20_REQUEST,I2C1_TXFIFO_DMA_REQUEST,I2C3_TXFIFO_DMA_REQUEST,I2C8_TXFIFO_DMA_REQUEST,VI_RXFIFO_DMA_REQUEST,?..."
textline "                      "
bitfld.long 0x00 12.--15. "          TRANSFER_DIRECTION           ,Indicates the source and destination of the DMA transfer" ",MEMORY_TO_MEMORY,AHUB_TO_MEMORY,,MEMORY_TO_AHUB,,,,AHUB_TO_AHUB,?..."
textline "                      "
bitfld.long 0x00 8.--10. "          TRANSFER_MODE                ,Transfer mode" ",Once,Continuous,,Linked list,?..."
textline "                      "
bitfld.long 0x00 4.--5. "          TIMESTAMP_CAPTURE_ENABLE     ,Timestamp capture enable" "Disabled,Memory write,Register write,?..."
textline "                      "
bitfld.long 0x00 3. "          FLOWCTRL_TYPE                ,Flow control type" "Credit based,Threshold based"
textline "                      "
bitfld.long 0x00 2. "          TRIGGER_ENABLE               ,Trigger enable" "False,True"
textline "                      "
bitfld.long 0x00 1. "          FLOWCTRL_ENABLE              ,Flow control enable" "False,True"
textline "                      "
bitfld.long 0x00 0. "          TRANSFER_PAUSE               ,Transfer pause" "False,True"
endif
group.long (0x41F00+0x28)++0x03
line.long 0x00 "CONFIG_0,ADMA Page 4 Channel 32 Config Register"
bitfld.long 0x00 28.--30. " SOURCE_MEMORY_BUFFERS        ,Source memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
bitfld.long 0x00 24.--26. "                   TARGET_MEMORY_BUFFERS        ,Target memory buffers" "BUFFER_1,BUFFERS_2,BUFFERS_3,BUFFERS_4,BUFFERS_5,BUFFERS_6,BUFFERS_7,BUFFERS_8"
textline "                      "
bitfld.long 0x00 20.--23. "          BURST_SIZE                   ,Burst size" "WORD_1,WORDS_2,WORDS_3,WORDS_4,WORDS_5,WORDS_6,WORDS_7,WORDS_8,WORDS_9,WORDS_10,WORDS_11,WORDS_12,WORDS_13,WORDS_14,WORDS_15,WORDS_16"
textline "                      "
bitfld.long 0x00 16.--19. "          SOURCE_ADDR_WRAP             ,Source address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
bitfld.long 0x00 12.--15. "           TARGET_ADDR_WRAP             ,Target address wrap" "NO_WRAP,WRAP_ON_1_WORD,WRAP_ON_2_WORDS,WRAP_ON_4_WORDS,WRAP_ON_8_WORDS,WRAP_ON_16_WORDS,WRAP_ON_32_WORDS,WRAP_ON_64_WORDS,WRAP_ON_128_WORDS,WRAP_ON_256_WORDS,WRAP_ON_512_WORDS,WRAP_ON_1K_WORDS,?..."
textline "                      "
bitfld.long 0x00 4.--7. "          OUTSTANDING_REQUESTS         ,Number of outstanding requests allowed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                          WEIGHT_FOR_WRR               ,Weight of this channel for weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x80000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x8002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x00000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x80000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x4002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x00000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 8.--13. "          TX_FIFO_SIZE                 ,TX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x80000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (((per.l(ad:0x02930000+0x41F00+0x24))&0xF002)==0x2002)&&(((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x00000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
textline "                      "
textline "                      "
textline "                      "
bitfld.long 0x00 0.--5. "          RX_FIFO_SIZE                 ,RX FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x02930000+0x41F00+0x2C))&0x80000000)==0x80000000)
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
textline "                      "
bitfld.long 0x00 24.--29. "          OVERFLOW_THRESHOLD           ,Overflow threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                      "
bitfld.long 0x00 16.--21. "          STARVATION_THRESHOLD         ,Starvation threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long (0x41F00+0x2C)++0x03
line.long 0x00 "AHUB_FIFO_CTRL_0,ADMA Page 4 Channel 32 AHUB FIFO Control Register"
bitfld.long 0x00 31. " FETCHING_POLICY              ,Fetching policy" "Burst based,Threshold based"
endif
endif
rgroup.long (0x41F00+0x30)++0x03
line.long 0x00 "TC_STATUS_0,ADMA Page 4 Channel 32 Transfer Count Status Register"
hexmask.long 0x00 2.--29. 1. " CURRENT_TRANSFER_COUNT       ,Remaining number of words to be transferred"
group.long (0x41F00+0x34)++0x03
line.long 0x00 "LOWER_SOURCE_ADDR_0,ADMA Page 4 Channel 32 Lower Source Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    ,Word aligned lower 32 bits of source address"
group.long (0x41F00+0x3C)++0x03
line.long 0x00 "LOWER_TARGET_ADDR_0,ADMA Page 4 Channel 32 Lower Target Address Register"
hexmask.long 0x00 2.--31. 0x04 " BASE_ADDR                    , Word aligned lower 32 bits of target address"
group.long (0x41F00+0x44)++0x03
line.long 0x00 "TC_0,ADMA Page 4 Channel 32 Transfer Count Register"
hexmask.long 0x00 2.--29. 1. " TRANSFER_COUNT               ,Word aligned transfer size"
if (((per.l(ad:0x02930000+0x41F00+0x24))&0xF00)==0x400)
group.long (0x41F00+0x48)++0x03
line.long 0x00 "LOWER_DESC_ADDR_0,ADMA Page 4 Channel 32 Lower Descriptor Register"
hexmask.long 0x00 2.--31. 0x04 " NEXT_DESCRIPTOR_ADDR         ,Next descriptor address"
endif
rgroup.long (0x41F00+0x54)++0x0F
line.long 0x00 "TRANSFER_STATUS_0,ADMA Page 4 Channel 32 Transfer Status Register"
hexmask.long.word 0x00 0.--15. 1. " TRANSFER_DONE_COUNT          ,Number of block/buffer transfers completed since the channel was enabled"
line.long 0x04 "TIMESTAMP_ADDR_0,ADMA Page 4 Channel 32 Timestamp Address Register"
hexmask.long 0x04 2.--31. 0x04 " BASE_ADDR                    ,Base address"
line.long 0x08 "TIMESTAMP_STATUS_0,ADMA Page 4 Channel 32 Timestamp Status Register"
line.long 0x0C "APR_0,ADMA Page 4 Channel 32 APR Register"
bitfld.long 0x0C 31. " ENABLE                       ,Enable" "False,True"
tree.end
width 0x0B
tree.end
tree.end
tree "ADMAIF"
base ad:0x0290F000
width 44.
; 0x20 - channels count
; 0x500 - registers offset
tree "Channel 1"
group.long (0x0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX1_ENABLE_0,AXBAR_RX1_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX1_SOFT_RESET_0,AXBAR_RX1_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX1_STATUS_0,AXBAR RX1 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX1_INT_STATUS_0,AXBAR RX1 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX1_INT_MASK_0,AXBAR_RX1_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX1_CIF_CTRL_0,AXBAR_RX1_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX1_FIFO_CTRL_0,AXBAR RX1 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX1_FIFO_READ_0,AXBAR RX1 FIFO READ Register"
group.long (0x0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX1_ENABLE_0,AXBAR_TX1_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX1_SOFT_RESET_0,AXBAR TX1 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX1_STATUS_0,AXBAR TX1 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX1_INT_STATUS_0,AXBAR TX1 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX1_INT_MASK_0,AXBAR TX1 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX1_CIF_CTRL_0,AXBAR TX1 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX1_FIFO_CTRL_0,AXBAR TX1 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX1_FIFO_WRITE_0,AXBAR TX1 FIFO WRITE Register"
tree.end
tree "Channel 2"
group.long (0x40+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX2_ENABLE_0,AXBAR_RX2_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX2_SOFT_RESET_0,AXBAR_RX2_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x40+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX2_STATUS_0,AXBAR RX2 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x40+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX2_INT_STATUS_0,AXBAR RX2 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX2_INT_MASK_0,AXBAR_RX2_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x40+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX2_CIF_CTRL_0,AXBAR_RX2_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x40+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX2_FIFO_CTRL_0,AXBAR RX2 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX2_FIFO_READ_0,AXBAR RX2 FIFO READ Register"
group.long (0x40+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX2_ENABLE_0,AXBAR_TX2_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX2_SOFT_RESET_0,AXBAR TX2 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x40+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX2_STATUS_0,AXBAR TX2 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x40+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX2_INT_STATUS_0,AXBAR TX2 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX2_INT_MASK_0,AXBAR TX2 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x40+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX2_CIF_CTRL_0,AXBAR TX2 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x40+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX2_FIFO_CTRL_0,AXBAR TX2 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX2_FIFO_WRITE_0,AXBAR TX2 FIFO WRITE Register"
tree.end
tree "Channel 3"
group.long (0x80+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX3_ENABLE_0,AXBAR_RX3_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX3_SOFT_RESET_0,AXBAR_RX3_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x80+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX3_STATUS_0,AXBAR RX3 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x80+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX3_INT_STATUS_0,AXBAR RX3 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX3_INT_MASK_0,AXBAR_RX3_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x80+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX3_CIF_CTRL_0,AXBAR_RX3_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x80+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX3_FIFO_CTRL_0,AXBAR RX3 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX3_FIFO_READ_0,AXBAR RX3 FIFO READ Register"
group.long (0x80+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX3_ENABLE_0,AXBAR_TX3_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX3_SOFT_RESET_0,AXBAR TX3 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x80+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX3_STATUS_0,AXBAR TX3 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x80+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX3_INT_STATUS_0,AXBAR TX3 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX3_INT_MASK_0,AXBAR TX3 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x80+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX3_CIF_CTRL_0,AXBAR TX3 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x80+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX3_FIFO_CTRL_0,AXBAR TX3 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX3_FIFO_WRITE_0,AXBAR TX3 FIFO WRITE Register"
tree.end
tree "Channel 4"
group.long (0xC0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX4_ENABLE_0,AXBAR_RX4_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX4_SOFT_RESET_0,AXBAR_RX4_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0xC0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX4_STATUS_0,AXBAR RX4 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0xC0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX4_INT_STATUS_0,AXBAR RX4 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX4_INT_MASK_0,AXBAR_RX4_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0xC0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX4_CIF_CTRL_0,AXBAR_RX4_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0xC0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX4_FIFO_CTRL_0,AXBAR RX4 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX4_FIFO_READ_0,AXBAR RX4 FIFO READ Register"
group.long (0xC0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX4_ENABLE_0,AXBAR_TX4_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX4_SOFT_RESET_0,AXBAR TX4 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0xC0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX4_STATUS_0,AXBAR TX4 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0xC0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX4_INT_STATUS_0,AXBAR TX4 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX4_INT_MASK_0,AXBAR TX4 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0xC0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX4_CIF_CTRL_0,AXBAR TX4 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0xC0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX4_FIFO_CTRL_0,AXBAR TX4 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX4_FIFO_WRITE_0,AXBAR TX4 FIFO WRITE Register"
tree.end
tree "Channel 5"
group.long (0x100+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX5_ENABLE_0,AXBAR_RX5_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX5_SOFT_RESET_0,AXBAR_RX5_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x100+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX5_STATUS_0,AXBAR RX5 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x100+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX5_INT_STATUS_0,AXBAR RX5 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX5_INT_MASK_0,AXBAR_RX5_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x100+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX5_CIF_CTRL_0,AXBAR_RX5_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x100+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX5_FIFO_CTRL_0,AXBAR RX5 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX5_FIFO_READ_0,AXBAR RX5 FIFO READ Register"
group.long (0x100+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX5_ENABLE_0,AXBAR_TX5_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX5_SOFT_RESET_0,AXBAR TX5 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x100+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX5_STATUS_0,AXBAR TX5 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x100+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX5_INT_STATUS_0,AXBAR TX5 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX5_INT_MASK_0,AXBAR TX5 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x100+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX5_CIF_CTRL_0,AXBAR TX5 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x100+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX5_FIFO_CTRL_0,AXBAR TX5 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX5_FIFO_WRITE_0,AXBAR TX5 FIFO WRITE Register"
tree.end
tree "Channel 6"
group.long (0x140+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX6_ENABLE_0,AXBAR_RX6_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX6_SOFT_RESET_0,AXBAR_RX6_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x140+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX6_STATUS_0,AXBAR RX6 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x140+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX6_INT_STATUS_0,AXBAR RX6 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX6_INT_MASK_0,AXBAR_RX6_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x140+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX6_CIF_CTRL_0,AXBAR_RX6_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x140+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX6_FIFO_CTRL_0,AXBAR RX6 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX6_FIFO_READ_0,AXBAR RX6 FIFO READ Register"
group.long (0x140+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX6_ENABLE_0,AXBAR_TX6_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX6_SOFT_RESET_0,AXBAR TX6 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x140+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX6_STATUS_0,AXBAR TX6 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x140+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX6_INT_STATUS_0,AXBAR TX6 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX6_INT_MASK_0,AXBAR TX6 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x140+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX6_CIF_CTRL_0,AXBAR TX6 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x140+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX6_FIFO_CTRL_0,AXBAR TX6 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX6_FIFO_WRITE_0,AXBAR TX6 FIFO WRITE Register"
tree.end
tree "Channel 7"
group.long (0x180+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX7_ENABLE_0,AXBAR_RX7_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX7_SOFT_RESET_0,AXBAR_RX7_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x180+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX7_STATUS_0,AXBAR RX7 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x180+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX7_INT_STATUS_0,AXBAR RX7 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX7_INT_MASK_0,AXBAR_RX7_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x180+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX7_CIF_CTRL_0,AXBAR_RX7_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x180+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX7_FIFO_CTRL_0,AXBAR RX7 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX7_FIFO_READ_0,AXBAR RX7 FIFO READ Register"
group.long (0x180+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX7_ENABLE_0,AXBAR_TX7_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX7_SOFT_RESET_0,AXBAR TX7 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x180+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX7_STATUS_0,AXBAR TX7 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x180+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX7_INT_STATUS_0,AXBAR TX7 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX7_INT_MASK_0,AXBAR TX7 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x180+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX7_CIF_CTRL_0,AXBAR TX7 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x180+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX7_FIFO_CTRL_0,AXBAR TX7 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX7_FIFO_WRITE_0,AXBAR TX7 FIFO WRITE Register"
tree.end
tree "Channel 8"
group.long (0x1C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX8_ENABLE_0,AXBAR_RX8_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX8_SOFT_RESET_0,AXBAR_RX8_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x1C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX8_STATUS_0,AXBAR RX8 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x1C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX8_INT_STATUS_0,AXBAR RX8 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX8_INT_MASK_0,AXBAR_RX8_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x1C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX8_CIF_CTRL_0,AXBAR_RX8_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x1C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX8_FIFO_CTRL_0,AXBAR RX8 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX8_FIFO_READ_0,AXBAR RX8 FIFO READ Register"
group.long (0x1C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX8_ENABLE_0,AXBAR_TX8_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX8_SOFT_RESET_0,AXBAR TX8 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x1C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX8_STATUS_0,AXBAR TX8 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x1C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX8_INT_STATUS_0,AXBAR TX8 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX8_INT_MASK_0,AXBAR TX8 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x1C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX8_CIF_CTRL_0,AXBAR TX8 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x1C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX8_FIFO_CTRL_0,AXBAR TX8 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX8_FIFO_WRITE_0,AXBAR TX8 FIFO WRITE Register"
tree.end
tree "Channel 9"
group.long (0x200+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX9_ENABLE_0,AXBAR_RX9_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX9_SOFT_RESET_0,AXBAR_RX9_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x200+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX9_STATUS_0,AXBAR RX9 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x200+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX9_INT_STATUS_0,AXBAR RX9 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX9_INT_MASK_0,AXBAR_RX9_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x200+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX9_CIF_CTRL_0,AXBAR_RX9_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x200+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX9_FIFO_CTRL_0,AXBAR RX9 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX9_FIFO_READ_0,AXBAR RX9 FIFO READ Register"
group.long (0x200+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX9_ENABLE_0,AXBAR_TX9_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX9_SOFT_RESET_0,AXBAR TX9 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x200+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX9_STATUS_0,AXBAR TX9 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x200+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX9_INT_STATUS_0,AXBAR TX9 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX9_INT_MASK_0,AXBAR TX9 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x200+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX9_CIF_CTRL_0,AXBAR TX9 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x200+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX9_FIFO_CTRL_0,AXBAR TX9 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX9_FIFO_WRITE_0,AXBAR TX9 FIFO WRITE Register"
tree.end
tree "Channel 10"
group.long (0x240+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX10_ENABLE_0,AXBAR_RX10_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX10_SOFT_RESET_0,AXBAR_RX10_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x240+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX10_STATUS_0,AXBAR RX10 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x240+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX10_INT_STATUS_0,AXBAR RX10 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX10_INT_MASK_0,AXBAR_RX10_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x240+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX10_CIF_CTRL_0,AXBAR_RX10_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x240+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX10_FIFO_CTRL_0,AXBAR RX10 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX10_FIFO_READ_0,AXBAR RX10 FIFO READ Register"
group.long (0x240+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX10_ENABLE_0,AXBAR_TX10_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX10_SOFT_RESET_0,AXBAR TX10 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x240+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX10_STATUS_0,AXBAR TX10 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x240+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX10_INT_STATUS_0,AXBAR TX10 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX10_INT_MASK_0,AXBAR TX10 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x240+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX10_CIF_CTRL_0,AXBAR TX10 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x240+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX10_FIFO_CTRL_0,AXBAR TX10 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX10_FIFO_WRITE_0,AXBAR TX10 FIFO WRITE Register"
tree.end
tree "Channel 11"
group.long (0x280+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX11_ENABLE_0,AXBAR_RX11_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX11_SOFT_RESET_0,AXBAR_RX11_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x280+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX11_STATUS_0,AXBAR RX11 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x280+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX11_INT_STATUS_0,AXBAR RX11 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX11_INT_MASK_0,AXBAR_RX11_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x280+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX11_CIF_CTRL_0,AXBAR_RX11_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x280+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX11_FIFO_CTRL_0,AXBAR RX11 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX11_FIFO_READ_0,AXBAR RX11 FIFO READ Register"
group.long (0x280+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX11_ENABLE_0,AXBAR_TX11_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX11_SOFT_RESET_0,AXBAR TX11 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x280+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX11_STATUS_0,AXBAR TX11 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x280+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX11_INT_STATUS_0,AXBAR TX11 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX11_INT_MASK_0,AXBAR TX11 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x280+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX11_CIF_CTRL_0,AXBAR TX11 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x280+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX11_FIFO_CTRL_0,AXBAR TX11 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX11_FIFO_WRITE_0,AXBAR TX11 FIFO WRITE Register"
tree.end
tree "Channel 12"
group.long (0x2C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX12_ENABLE_0,AXBAR_RX12_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX12_SOFT_RESET_0,AXBAR_RX12_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x2C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX12_STATUS_0,AXBAR RX12 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x2C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX12_INT_STATUS_0,AXBAR RX12 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX12_INT_MASK_0,AXBAR_RX12_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x2C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX12_CIF_CTRL_0,AXBAR_RX12_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x2C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX12_FIFO_CTRL_0,AXBAR RX12 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX12_FIFO_READ_0,AXBAR RX12 FIFO READ Register"
group.long (0x2C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX12_ENABLE_0,AXBAR_TX12_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX12_SOFT_RESET_0,AXBAR TX12 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x2C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX12_STATUS_0,AXBAR TX12 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x2C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX12_INT_STATUS_0,AXBAR TX12 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX12_INT_MASK_0,AXBAR TX12 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x2C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX12_CIF_CTRL_0,AXBAR TX12 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x2C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX12_FIFO_CTRL_0,AXBAR TX12 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX12_FIFO_WRITE_0,AXBAR TX12 FIFO WRITE Register"
tree.end
tree "Channel 13"
group.long (0x300+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX13_ENABLE_0,AXBAR_RX13_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX13_SOFT_RESET_0,AXBAR_RX13_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x300+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX13_STATUS_0,AXBAR RX13 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x300+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX13_INT_STATUS_0,AXBAR RX13 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX13_INT_MASK_0,AXBAR_RX13_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x300+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX13_CIF_CTRL_0,AXBAR_RX13_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x300+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX13_FIFO_CTRL_0,AXBAR RX13 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX13_FIFO_READ_0,AXBAR RX13 FIFO READ Register"
group.long (0x300+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX13_ENABLE_0,AXBAR_TX13_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX13_SOFT_RESET_0,AXBAR TX13 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x300+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX13_STATUS_0,AXBAR TX13 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x300+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX13_INT_STATUS_0,AXBAR TX13 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX13_INT_MASK_0,AXBAR TX13 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x300+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX13_CIF_CTRL_0,AXBAR TX13 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x300+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX13_FIFO_CTRL_0,AXBAR TX13 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX13_FIFO_WRITE_0,AXBAR TX13 FIFO WRITE Register"
tree.end
tree "Channel 14"
group.long (0x340+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX14_ENABLE_0,AXBAR_RX14_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX14_SOFT_RESET_0,AXBAR_RX14_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x340+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX14_STATUS_0,AXBAR RX14 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x340+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX14_INT_STATUS_0,AXBAR RX14 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX14_INT_MASK_0,AXBAR_RX14_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x340+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX14_CIF_CTRL_0,AXBAR_RX14_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x340+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX14_FIFO_CTRL_0,AXBAR RX14 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX14_FIFO_READ_0,AXBAR RX14 FIFO READ Register"
group.long (0x340+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX14_ENABLE_0,AXBAR_TX14_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX14_SOFT_RESET_0,AXBAR TX14 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x340+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX14_STATUS_0,AXBAR TX14 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x340+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX14_INT_STATUS_0,AXBAR TX14 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX14_INT_MASK_0,AXBAR TX14 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x340+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX14_CIF_CTRL_0,AXBAR TX14 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x340+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX14_FIFO_CTRL_0,AXBAR TX14 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX14_FIFO_WRITE_0,AXBAR TX14 FIFO WRITE Register"
tree.end
tree "Channel 15"
group.long (0x380+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX15_ENABLE_0,AXBAR_RX15_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX15_SOFT_RESET_0,AXBAR_RX15_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x380+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX15_STATUS_0,AXBAR RX15 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x380+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX15_INT_STATUS_0,AXBAR RX15 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX15_INT_MASK_0,AXBAR_RX15_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x380+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX15_CIF_CTRL_0,AXBAR_RX15_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x380+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX15_FIFO_CTRL_0,AXBAR RX15 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX15_FIFO_READ_0,AXBAR RX15 FIFO READ Register"
group.long (0x380+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX15_ENABLE_0,AXBAR_TX15_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX15_SOFT_RESET_0,AXBAR TX15 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x380+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX15_STATUS_0,AXBAR TX15 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x380+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX15_INT_STATUS_0,AXBAR TX15 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX15_INT_MASK_0,AXBAR TX15 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x380+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX15_CIF_CTRL_0,AXBAR TX15 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x380+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX15_FIFO_CTRL_0,AXBAR TX15 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX15_FIFO_WRITE_0,AXBAR TX15 FIFO WRITE Register"
tree.end
tree "Channel 16"
group.long (0x3C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX16_ENABLE_0,AXBAR_RX16_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX16_SOFT_RESET_0,AXBAR_RX16_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x3C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX16_STATUS_0,AXBAR RX16 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x3C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX16_INT_STATUS_0,AXBAR RX16 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX16_INT_MASK_0,AXBAR_RX16_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x3C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX16_CIF_CTRL_0,AXBAR_RX16_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x3C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX16_FIFO_CTRL_0,AXBAR RX16 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX16_FIFO_READ_0,AXBAR RX16 FIFO READ Register"
group.long (0x3C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX16_ENABLE_0,AXBAR_TX16_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX16_SOFT_RESET_0,AXBAR TX16 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x3C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX16_STATUS_0,AXBAR TX16 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x3C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX16_INT_STATUS_0,AXBAR TX16 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX16_INT_MASK_0,AXBAR TX16 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x3C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX16_CIF_CTRL_0,AXBAR TX16 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x3C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX16_FIFO_CTRL_0,AXBAR TX16 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX16_FIFO_WRITE_0,AXBAR TX16 FIFO WRITE Register"
tree.end
tree "Channel 17"
group.long (0x400+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX17_ENABLE_0,AXBAR_RX17_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX17_SOFT_RESET_0,AXBAR_RX17_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x400+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX17_STATUS_0,AXBAR RX17 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x400+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX17_INT_STATUS_0,AXBAR RX17 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX17_INT_MASK_0,AXBAR_RX17_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x400+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX17_CIF_CTRL_0,AXBAR_RX17_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x400+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX17_FIFO_CTRL_0,AXBAR RX17 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX17_FIFO_READ_0,AXBAR RX17 FIFO READ Register"
group.long (0x400+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX17_ENABLE_0,AXBAR_TX17_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX17_SOFT_RESET_0,AXBAR TX17 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x400+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX17_STATUS_0,AXBAR TX17 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x400+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX17_INT_STATUS_0,AXBAR TX17 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX17_INT_MASK_0,AXBAR TX17 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x400+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX17_CIF_CTRL_0,AXBAR TX17 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x400+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX17_FIFO_CTRL_0,AXBAR TX17 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX17_FIFO_WRITE_0,AXBAR TX17 FIFO WRITE Register"
tree.end
tree "Channel 18"
group.long (0x440+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX18_ENABLE_0,AXBAR_RX18_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX18_SOFT_RESET_0,AXBAR_RX18_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x440+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX18_STATUS_0,AXBAR RX18 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x440+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX18_INT_STATUS_0,AXBAR RX18 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX18_INT_MASK_0,AXBAR_RX18_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x440+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX18_CIF_CTRL_0,AXBAR_RX18_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x440+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX18_FIFO_CTRL_0,AXBAR RX18 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX18_FIFO_READ_0,AXBAR RX18 FIFO READ Register"
group.long (0x440+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX18_ENABLE_0,AXBAR_TX18_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX18_SOFT_RESET_0,AXBAR TX18 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x440+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX18_STATUS_0,AXBAR TX18 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x440+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX18_INT_STATUS_0,AXBAR TX18 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX18_INT_MASK_0,AXBAR TX18 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x440+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX18_CIF_CTRL_0,AXBAR TX18 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x440+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX18_FIFO_CTRL_0,AXBAR TX18 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX18_FIFO_WRITE_0,AXBAR TX18 FIFO WRITE Register"
tree.end
tree "Channel 19"
group.long (0x480+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX19_ENABLE_0,AXBAR_RX19_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX19_SOFT_RESET_0,AXBAR_RX19_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x480+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX19_STATUS_0,AXBAR RX19 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x480+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX19_INT_STATUS_0,AXBAR RX19 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX19_INT_MASK_0,AXBAR_RX19_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x480+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX19_CIF_CTRL_0,AXBAR_RX19_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x480+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX19_FIFO_CTRL_0,AXBAR RX19 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX19_FIFO_READ_0,AXBAR RX19 FIFO READ Register"
group.long (0x480+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX19_ENABLE_0,AXBAR_TX19_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX19_SOFT_RESET_0,AXBAR TX19 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x480+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX19_STATUS_0,AXBAR TX19 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x480+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX19_INT_STATUS_0,AXBAR TX19 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX19_INT_MASK_0,AXBAR TX19 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x480+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX19_CIF_CTRL_0,AXBAR TX19 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x480+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX19_FIFO_CTRL_0,AXBAR TX19 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX19_FIFO_WRITE_0,AXBAR TX19 FIFO WRITE Register"
tree.end
tree "Channel 20"
group.long (0x4C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX20_ENABLE_0,AXBAR_RX20_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX20_SOFT_RESET_0,AXBAR_RX20_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x4C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX20_STATUS_0,AXBAR RX20 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x4C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX20_INT_STATUS_0,AXBAR RX20 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX20_INT_MASK_0,AXBAR_RX20_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x4C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX20_CIF_CTRL_0,AXBAR_RX20_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x4C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX20_FIFO_CTRL_0,AXBAR RX20 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX20_FIFO_READ_0,AXBAR RX20 FIFO READ Register"
group.long (0x4C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX20_ENABLE_0,AXBAR_TX20_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX20_SOFT_RESET_0,AXBAR TX20 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x4C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX20_STATUS_0,AXBAR TX20 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x4C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX20_INT_STATUS_0,AXBAR TX20 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX20_INT_MASK_0,AXBAR TX20 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x4C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX20_CIF_CTRL_0,AXBAR TX20 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x4C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX20_FIFO_CTRL_0,AXBAR TX20 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX20_FIFO_WRITE_0,AXBAR TX20 FIFO WRITE Register"
tree.end
tree "Channel 21"
group.long (0x500+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX21_ENABLE_0,AXBAR_RX21_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX21_SOFT_RESET_0,AXBAR_RX21_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x500+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX21_STATUS_0,AXBAR RX21 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX21_INT_STATUS_0,AXBAR RX21 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX21_INT_MASK_0,AXBAR_RX21_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX21_CIF_CTRL_0,AXBAR_RX21_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX21_FIFO_CTRL_0,AXBAR RX21 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX21_FIFO_READ_0,AXBAR RX21 FIFO READ Register"
group.long (0x500+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX21_ENABLE_0,AXBAR_TX21_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX21_SOFT_RESET_0,AXBAR TX21 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x500+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX21_STATUS_0,AXBAR TX21 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x500+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX21_INT_STATUS_0,AXBAR TX21 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX21_INT_MASK_0,AXBAR TX21 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x500+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX21_CIF_CTRL_0,AXBAR TX21 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x500+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX21_FIFO_CTRL_0,AXBAR TX21 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX21_FIFO_WRITE_0,AXBAR TX21 FIFO WRITE Register"
tree.end
tree "Channel 22"
group.long (0x540+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX22_ENABLE_0,AXBAR_RX22_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX22_SOFT_RESET_0,AXBAR_RX22_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x540+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX22_STATUS_0,AXBAR RX22 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x540+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX22_INT_STATUS_0,AXBAR RX22 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX22_INT_MASK_0,AXBAR_RX22_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x540+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX22_CIF_CTRL_0,AXBAR_RX22_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x540+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX22_FIFO_CTRL_0,AXBAR RX22 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX22_FIFO_READ_0,AXBAR RX22 FIFO READ Register"
group.long (0x540+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX22_ENABLE_0,AXBAR_TX22_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX22_SOFT_RESET_0,AXBAR TX22 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x540+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX22_STATUS_0,AXBAR TX22 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x540+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX22_INT_STATUS_0,AXBAR TX22 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX22_INT_MASK_0,AXBAR TX22 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x540+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX22_CIF_CTRL_0,AXBAR TX22 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x540+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX22_FIFO_CTRL_0,AXBAR TX22 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX22_FIFO_WRITE_0,AXBAR TX22 FIFO WRITE Register"
tree.end
tree "Channel 23"
group.long (0x580+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX23_ENABLE_0,AXBAR_RX23_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX23_SOFT_RESET_0,AXBAR_RX23_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x580+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX23_STATUS_0,AXBAR RX23 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x580+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX23_INT_STATUS_0,AXBAR RX23 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX23_INT_MASK_0,AXBAR_RX23_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x580+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX23_CIF_CTRL_0,AXBAR_RX23_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x580+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX23_FIFO_CTRL_0,AXBAR RX23 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX23_FIFO_READ_0,AXBAR RX23 FIFO READ Register"
group.long (0x580+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX23_ENABLE_0,AXBAR_TX23_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX23_SOFT_RESET_0,AXBAR TX23 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x580+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX23_STATUS_0,AXBAR TX23 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x580+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX23_INT_STATUS_0,AXBAR TX23 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX23_INT_MASK_0,AXBAR TX23 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x580+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX23_CIF_CTRL_0,AXBAR TX23 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x580+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX23_FIFO_CTRL_0,AXBAR TX23 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX23_FIFO_WRITE_0,AXBAR TX23 FIFO WRITE Register"
tree.end
tree "Channel 24"
group.long (0x5C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX24_ENABLE_0,AXBAR_RX24_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX24_SOFT_RESET_0,AXBAR_RX24_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x5C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX24_STATUS_0,AXBAR RX24 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x5C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX24_INT_STATUS_0,AXBAR RX24 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX24_INT_MASK_0,AXBAR_RX24_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x5C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX24_CIF_CTRL_0,AXBAR_RX24_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x5C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX24_FIFO_CTRL_0,AXBAR RX24 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX24_FIFO_READ_0,AXBAR RX24 FIFO READ Register"
group.long (0x5C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX24_ENABLE_0,AXBAR_TX24_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX24_SOFT_RESET_0,AXBAR TX24 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x5C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX24_STATUS_0,AXBAR TX24 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x5C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX24_INT_STATUS_0,AXBAR TX24 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX24_INT_MASK_0,AXBAR TX24 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x5C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX24_CIF_CTRL_0,AXBAR TX24 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x5C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX24_FIFO_CTRL_0,AXBAR TX24 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX24_FIFO_WRITE_0,AXBAR TX24 FIFO WRITE Register"
tree.end
tree "Channel 25"
group.long (0x600+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX25_ENABLE_0,AXBAR_RX25_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX25_SOFT_RESET_0,AXBAR_RX25_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x600+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX25_STATUS_0,AXBAR RX25 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x600+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX25_INT_STATUS_0,AXBAR RX25 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX25_INT_MASK_0,AXBAR_RX25_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x600+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX25_CIF_CTRL_0,AXBAR_RX25_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x600+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX25_FIFO_CTRL_0,AXBAR RX25 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX25_FIFO_READ_0,AXBAR RX25 FIFO READ Register"
group.long (0x600+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX25_ENABLE_0,AXBAR_TX25_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX25_SOFT_RESET_0,AXBAR TX25 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x600+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX25_STATUS_0,AXBAR TX25 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x600+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX25_INT_STATUS_0,AXBAR TX25 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX25_INT_MASK_0,AXBAR TX25 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x600+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX25_CIF_CTRL_0,AXBAR TX25 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x600+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX25_FIFO_CTRL_0,AXBAR TX25 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX25_FIFO_WRITE_0,AXBAR TX25 FIFO WRITE Register"
tree.end
tree "Channel 26"
group.long (0x640+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX26_ENABLE_0,AXBAR_RX26_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX26_SOFT_RESET_0,AXBAR_RX26_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x640+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX26_STATUS_0,AXBAR RX26 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x640+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX26_INT_STATUS_0,AXBAR RX26 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX26_INT_MASK_0,AXBAR_RX26_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x640+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX26_CIF_CTRL_0,AXBAR_RX26_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x640+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX26_FIFO_CTRL_0,AXBAR RX26 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX26_FIFO_READ_0,AXBAR RX26 FIFO READ Register"
group.long (0x640+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX26_ENABLE_0,AXBAR_TX26_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX26_SOFT_RESET_0,AXBAR TX26 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x640+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX26_STATUS_0,AXBAR TX26 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x640+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX26_INT_STATUS_0,AXBAR TX26 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX26_INT_MASK_0,AXBAR TX26 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x640+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX26_CIF_CTRL_0,AXBAR TX26 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x640+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX26_FIFO_CTRL_0,AXBAR TX26 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX26_FIFO_WRITE_0,AXBAR TX26 FIFO WRITE Register"
tree.end
tree "Channel 27"
group.long (0x680+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX27_ENABLE_0,AXBAR_RX27_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX27_SOFT_RESET_0,AXBAR_RX27_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x680+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX27_STATUS_0,AXBAR RX27 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x680+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX27_INT_STATUS_0,AXBAR RX27 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX27_INT_MASK_0,AXBAR_RX27_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x680+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX27_CIF_CTRL_0,AXBAR_RX27_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x680+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX27_FIFO_CTRL_0,AXBAR RX27 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX27_FIFO_READ_0,AXBAR RX27 FIFO READ Register"
group.long (0x680+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX27_ENABLE_0,AXBAR_TX27_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX27_SOFT_RESET_0,AXBAR TX27 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x680+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX27_STATUS_0,AXBAR TX27 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x680+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX27_INT_STATUS_0,AXBAR TX27 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX27_INT_MASK_0,AXBAR TX27 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x680+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX27_CIF_CTRL_0,AXBAR TX27 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x680+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX27_FIFO_CTRL_0,AXBAR TX27 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX27_FIFO_WRITE_0,AXBAR TX27 FIFO WRITE Register"
tree.end
tree "Channel 28"
group.long (0x6C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX28_ENABLE_0,AXBAR_RX28_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX28_SOFT_RESET_0,AXBAR_RX28_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x6C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX28_STATUS_0,AXBAR RX28 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x6C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX28_INT_STATUS_0,AXBAR RX28 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX28_INT_MASK_0,AXBAR_RX28_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x6C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX28_CIF_CTRL_0,AXBAR_RX28_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x6C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX28_FIFO_CTRL_0,AXBAR RX28 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX28_FIFO_READ_0,AXBAR RX28 FIFO READ Register"
group.long (0x6C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX28_ENABLE_0,AXBAR_TX28_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX28_SOFT_RESET_0,AXBAR TX28 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x6C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX28_STATUS_0,AXBAR TX28 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x6C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX28_INT_STATUS_0,AXBAR TX28 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX28_INT_MASK_0,AXBAR TX28 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x6C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX28_CIF_CTRL_0,AXBAR TX28 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x6C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX28_FIFO_CTRL_0,AXBAR TX28 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX28_FIFO_WRITE_0,AXBAR TX28 FIFO WRITE Register"
tree.end
tree "Channel 29"
group.long (0x700+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX29_ENABLE_0,AXBAR_RX29_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX29_SOFT_RESET_0,AXBAR_RX29_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x700+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX29_STATUS_0,AXBAR RX29 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x700+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX29_INT_STATUS_0,AXBAR RX29 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX29_INT_MASK_0,AXBAR_RX29_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x700+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX29_CIF_CTRL_0,AXBAR_RX29_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x700+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX29_FIFO_CTRL_0,AXBAR RX29 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX29_FIFO_READ_0,AXBAR RX29 FIFO READ Register"
group.long (0x700+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX29_ENABLE_0,AXBAR_TX29_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX29_SOFT_RESET_0,AXBAR TX29 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x700+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX29_STATUS_0,AXBAR TX29 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x700+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX29_INT_STATUS_0,AXBAR TX29 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX29_INT_MASK_0,AXBAR TX29 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x700+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX29_CIF_CTRL_0,AXBAR TX29 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x700+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX29_FIFO_CTRL_0,AXBAR TX29 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX29_FIFO_WRITE_0,AXBAR TX29 FIFO WRITE Register"
tree.end
tree "Channel 30"
group.long (0x740+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX30_ENABLE_0,AXBAR_RX30_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX30_SOFT_RESET_0,AXBAR_RX30_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x740+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX30_STATUS_0,AXBAR RX30 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x740+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX30_INT_STATUS_0,AXBAR RX30 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX30_INT_MASK_0,AXBAR_RX30_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x740+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX30_CIF_CTRL_0,AXBAR_RX30_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x740+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX30_FIFO_CTRL_0,AXBAR RX30 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX30_FIFO_READ_0,AXBAR RX30 FIFO READ Register"
group.long (0x740+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX30_ENABLE_0,AXBAR_TX30_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX30_SOFT_RESET_0,AXBAR TX30 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x740+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX30_STATUS_0,AXBAR TX30 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x740+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX30_INT_STATUS_0,AXBAR TX30 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX30_INT_MASK_0,AXBAR TX30 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x740+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX30_CIF_CTRL_0,AXBAR TX30 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x740+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX30_FIFO_CTRL_0,AXBAR TX30 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX30_FIFO_WRITE_0,AXBAR TX30 FIFO WRITE Register"
tree.end
tree "Channel 31"
group.long (0x780+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX31_ENABLE_0,AXBAR_RX31_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX31_SOFT_RESET_0,AXBAR_RX31_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x780+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX31_STATUS_0,AXBAR RX31 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x780+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX31_INT_STATUS_0,AXBAR RX31 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX31_INT_MASK_0,AXBAR_RX31_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x780+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX31_CIF_CTRL_0,AXBAR_RX31_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x780+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX31_FIFO_CTRL_0,AXBAR RX31 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX31_FIFO_READ_0,AXBAR RX31 FIFO READ Register"
group.long (0x780+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX31_ENABLE_0,AXBAR_TX31_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX31_SOFT_RESET_0,AXBAR TX31 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x780+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX31_STATUS_0,AXBAR TX31 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x780+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX31_INT_STATUS_0,AXBAR TX31 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX31_INT_MASK_0,AXBAR TX31 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x780+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX31_CIF_CTRL_0,AXBAR TX31 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x780+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX31_FIFO_CTRL_0,AXBAR TX31 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX31_FIFO_WRITE_0,AXBAR TX31 FIFO WRITE Register"
tree.end
tree "Channel 32"
group.long (0x7C0+0x00)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX32_ENABLE_0,AXBAR_RX32_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_RX32_SOFT_RESET_0,AXBAR_RX32_SOFT_RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x7C0+0x0C)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX32_STATUS_0,AXBAR RX32 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x7C0+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX32_INT_STATUS_0,AXBAR RX32 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_OVERRUN_set/clr  ,DMA overrun" "No overrun,Overrun"
line.long 0x04 "ADMAIF_AXBAR_RX32_INT_MASK_0,AXBAR_RX32_INT_MASK Register"
bitfld.long 0x04 0. " DMA_OVERRUN          ,DMA overrun" "Not masked,Masked"
group.long (0x7C0+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_RX32_CIF_CTRL_0,AXBAR_RX32_CIF_CTRL Register"
bitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      PACK16_ENABLE       ,PACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x7C0+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_RX32_FIFO_CTRL_0,AXBAR RX32 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
bitfld.long 0x00 8.--13. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--5. 0x01 "         DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
bitfld.long 0x00 8.--12. "           DMA_FIFO_SIZE       ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "         DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_RX32_FIFO_READ_0,AXBAR RX32 FIFO READ Register"
group.long (0x7C0+0x500)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX32_ENABLE_0,AXBAR_TX32_ENABLE Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_AXBAR_TX32_SOFT_RESET_0,AXBAR TX32 SOFT RESET Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
group.long (0x7C0+0x500+0x0C)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX32_STATUS_0,AXBAR TX32 STATUS Register"
hexmask.long.word 0x00 16.--25. 1. " AVAILABLE_CREDITS    ,Available credits"
bitfld.long 0x00 7. "          DMA_FIFO_FULL       ,DMA FIFO full" "Not full,Full"
bitfld.long 0x00 6. "   DMA_FIFO_EMPTY       ,DMA FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x00 5. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 4. "      ACIF_FIFO_EMPTY     ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "  TRANSFER_ENABLED     ,Transfer enabled" "Disabled,Enabled"
group.long (0x7C0+0x500+0x10)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX32_INT_STATUS_0,AXBAR TX32 INT STATUS Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " DMA_UNDERRUN_set/clr ,DMA underrun" "No interrupt,Interrupt"
line.long 0x04 "ADMAIF_AXBAR_TX32_INT_MASK_0,AXBAR TX32 INT MASK Register"
bitfld.long 0x04 0. " DMA_UNDERRUN         ,DMA underrun" "Not masked,Masked"
group.long (0x7C0+0x500+0x20)++0x03
line.long 0x00 "ADMAIF_AXBAR_TX32_CIF_CTRL_0,AXBAR TX32 CIF CTRL Register"
bitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
bitfld.long 0x00 30. "      UNPACK16_ENABLE     ,UNPACK16 enable" "Disabled,Enabled"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--29. "   FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
textline "                                                     "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "          CLIENT_CHANNELS     ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 12.--14. "       AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                                     "
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "         EXPAND              ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "       STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                                     "
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "         MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x7C0+0x500+0x28)++0x07
line.long 0x00 "ADMAIF_AXBAR_TX32_FIFO_CTRL_0,AXBAR TX32 FIFO CTRL Register"
bitfld.long 0x00 31. " TRANSFER_MODE        ,Transfer mode" "DMA,PIO"
sif cpuis("TEGRAX2")
hexmask.long.word 0x00 20.--30. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--13. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                                     "
hexmask.long.byte 0x00 0.--5. 0x01 " DMA_FIFO_START_ADDR  ,DMA FIFO start address"
else
hexmask.long.word 0x00 20.--29. 1. "           DMA_FIFO_THRESHOLD  , DMA FIFO threshold"
bitfld.long 0x00 8.--12. "       DMA_FIFO_SIZE        ,DMA FIFO size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                                     "
bitfld.long 0x00 0.--4. " DMA_FIFO_START_ADDR  ,DMA FIFO start address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
line.long 0x04 "ADMAIF_AXBAR_TX32_FIFO_WRITE_0,AXBAR TX32 FIFO WRITE Register"
tree.end
textline "                                                     "
group.long (0x20*0x40+0x500)++0x0B
line.long 0x00 "ADMAIF_GLOBAL_ENABLE_0,GLobal Enable Register"
bitfld.long 0x00 0. " ENABLE                , Enable" "Disabled,Enabled"
line.long 0x04 "ADMAIF_GLOBAL_SOFT_RESET_0,Global Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET            , Soft reset" "No reset,Reset"
line.long 0x08 "ADMAIF_GLOBAL_CG_0,Global CG Register"
bitfld.long 0x08 1. " CHANNEL_SLCG_ENABLE   ,Second level clock gating enable, for remaining channels specific logic portions" "Disabled,Enabled"
bitfld.long 0x08 0. "     GLOBAL_SLCG_ENABLE    ,Second level clock gating enable for first 2 channels and global/common logic" "Disabled,Enabled"
rgroup.long (0x20*0x40+0x500+0x10)++0x03
line.long 0x00 "ADMAIF_GLOBAL_STATUS_0,Global Status Register"
bitfld.long 0x00 9. " CHANNEL_CLK_ENABLE    ,Channel clock enable" "Disabled,Enabled"
bitfld.long 0x00 8. "     GLOBAL_CLK_ENABLE     , Global clock enable" "Disabled,Enabled"
bitfld.long 0x00 0. "     TRANSFER_ENABLED      ,Set when at least one of the channels is enabled by software" "Disabled,Enabled"
rgroup.long (0x20*0x40+0x500+0x20)++0x2F
line.long 0x00 "ADMAIF_GLOBAL_RX_ENABLE_STATUS_0,Global RX Enable Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 19. " CH20_TRANSFER_ENABLED ,CH20 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 18. "     CH19_TRANSFER_ENABLED ,CH19 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 17. "     CH18_TRANSFER_ENABLED ,CH18 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 16. " CH17_TRANSFER_ENABLED ,CH17 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 15. "     CH16_TRANSFER_ENABLED ,CH16 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 14. "     CH15_TRANSFER_ENABLED ,CH15 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 13. " CH14_TRANSFER_ENABLED ,CH14 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 12. "     CH13_TRANSFER_ENABLED ,CH13 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 11. "     CH12_TRANSFER_ENABLED ,CH12 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 10. " CH11_TRANSFER_ENABLED ,CH11 transfer enabled" "Disabled,Enabled"
textline "                                                     "
endif
bitfld.long 0x00 9. " CH10_TRANSFER_ENABLED ,CH10 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 8. "     CH9_TRANSFER_ENABLED  ,CH9 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 7. "     CH8_TRANSFER_ENABLED  ,CH8 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 6. " CH7_TRANSFER_ENABLED  ,CH7 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "     CH6_TRANSFER_ENABLED  ,CH6 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 4. "     CH5_TRANSFER_ENABLED  ,CH5 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 3. " CH4_TRANSFER_ENABLED  ,CH4 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 2. "     CH3_TRANSFER_ENABLED  ,CH3 transfer enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "     CH2_TRANSFER_ENABLED  ,CH2 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x00 0. " CH1_TRANSFER_ENABLED  ,CH1 transfer enabled" "Disabled,Enabled"
line.long 0x04 "ADMAIF_GLOBAL_TX_ENABLE_STATUS_0,Global TX Enable Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 19. " CH20_TRANSFER_ENABLED ,CH20 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 18. "     CH19_TRANSFER_ENABLED ,CH19 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 17. "     CH18_TRANSFER_ENABLED ,CH18 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 16. " CH17_TRANSFER_ENABLED ,CH17 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 15. "     CH16_TRANSFER_ENABLED ,CH16 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 14. "     CH15_TRANSFER_ENABLED ,CH15 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 13. " CH14_TRANSFER_ENABLED ,CH14 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 12. "     CH13_TRANSFER_ENABLED ,CH13 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 11. "     CH12_TRANSFER_ENABLED ,CH12 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 10. " CH11_TRANSFER_ENABLED ,CH11 transfer enabled" "Disabled,Enabled"
textline "                                                     "
endif
bitfld.long 0x04 9. " CH10_TRANSFER_ENABLED ,CH10 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 8. "     CH9_TRANSFER_ENABLED  ,CH9 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 7. "     CH8_TRANSFER_ENABLED  ,CH8 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 6. " CH7_TRANSFER_ENABLED  ,CH7 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 5. "     CH6_TRANSFER_ENABLED  ,CH6 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 4. "     CH5_TRANSFER_ENABLED  ,CH5 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 3. " CH4_TRANSFER_ENABLED  ,CH4 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 2. "     CH3_TRANSFER_ENABLED  ,CH3 transfer enabled" "Disabled,Enabled"
bitfld.long 0x04 1. "     CH2_TRANSFER_ENABLED  ,CH2 transfer enabled" "Disabled,Enabled"
textline "                                                     "
bitfld.long 0x04 0. " CH1_TRANSFER_ENABLED  ,CH1 transfer enabled" "Disabled,Enabled"
line.long 0x08 "ADMAIF_GLOBAL_RX_DMA_FIFO_EMPTY_STATUS_0,Global RX DMA FIFO Empty Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x08 19. " CH20_FIFO_EMPTY       ,CH20 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 18. "    CH19_FIFO_EMPTY       ,CH19 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 17. "    CH18_FIFO_EMPTY       ,CH18 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 16. " CH17_FIFO_EMPTY       ,CH17 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 15. "    CH16_FIFO_EMPTY       ,CH16 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 14. "    CH15_FIFO_EMPTY       ,CH15 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 13. " CH14_FIFO_EMPTY       ,CH14 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 12. "    CH13_FIFO_EMPTY       ,CH13 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 11. "    CH12_FIFO_EMPTY       ,CH12 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 10. " CH11_FIFO_EMPTY       ,CH11 FIFO empty" "Not empty,Empty"
textline "                                                     "
endif
bitfld.long 0x08 9. " CH10_FIFO_EMPTY       ,CH10 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 8. "    CH9_FIFO_EMPTY        ,CH9 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 7. "    CH8_FIFO_EMPTY        ,CH8 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 6. " CH7_FIFO_EMPTY        ,CH7 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 5. "    CH6_FIFO_EMPTY        ,CH6 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 4. "    CH5_FIFO_EMPTY        ,CH5 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 3. " CH4_FIFO_EMPTY        ,CH4 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 2. "    CH3_FIFO_EMPTY        ,CH3 FIFO empty" "Not empty,Empty"
bitfld.long 0x08 1. "    CH2_FIFO_EMPTY        ,CH2 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x08 0. " CH1_FIFO_EMPTY        ,CH1 FIFO empty" "Not empty,Empty"
line.long 0x0C "ADMAIF_GLOBAL_RX_DMA_FIFO_FULL_STATUS_0,Global RX DMA FIFO Full Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x0C 19. " CH20_FIFO_FULL        ,CH20 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 18. "     CH19_FIFO_FULL        ,CH19 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 17. "     CH18_FIFO_FULL        ,CH18 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 16. " CH17_FIFO_FULL        ,CH17 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 15. "     CH16_FIFO_FULL        ,CH16 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 14. "     CH15_FIFO_FULL        ,CH15 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 13. " CH14_FIFO_FULL        ,CH14 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 12. "     CH13_FIFO_FULL        ,CH13 FIFO FULL" "Not full,Full"
bitfld.long 0x0C 11. "     CH12_FIFO_FULL        ,CH12 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 10. " CH11_FIFO_FULL        ,CH11 FIFO FULL" "Not full,Full"
textline "                                                     "
endif
bitfld.long 0x0C 9. " CH10_FIFO_FULL        ,CH10 FIFO full" "Not full,Full"
bitfld.long 0x0C 8. "     CH9_FIFO_FULL         ,CH9 FIFO full" "Not full,Full"
bitfld.long 0x0C 7. "     CH8_FIFO_FULL         ,CH8 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 6. " CH7_FIFO_FULL         ,CH7 FIFO full" "Not full,Full"
bitfld.long 0x0C 5. "     CH6_FIFO_FULL         ,CH6 FIFO full" "Not full,Full"
bitfld.long 0x0C 4. "     CH5_FIFO_FULL         ,CH5 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 3. " CH4_FIFO_FULL         ,CH4 FIFO full" "Not full,Full"
bitfld.long 0x0C 2. "     CH3_FIFO_FULL         ,CH3 FIFO full" "Not full,Full"
bitfld.long 0x0C 1. "     CH2_FIFO_FULL         ,CH2 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x0C 0. " CH1_FIFO_FULL         ,CH1 FIFO full" "Not full,Full"
line.long 0x10 "ADMAIF_GLOBAL_TX_DMA_FIFO_EMPTY_STATUS_0,Global TX DMA FIFO Empty Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x10 19. " CH20_FIFO_EMPTY       ,CH20 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 18. "    CH19_FIFO_EMPTY       ,CH19 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 17. "    CH18_FIFO_EMPTY       ,CH18 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 16. " CH17_FIFO_EMPTY       ,CH17 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 15. "    CH16_FIFO_EMPTY       ,CH16 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 14. "    CH15_FIFO_EMPTY       ,CH15 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 13. " CH14_FIFO_EMPTY       ,CH14 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 12. "    CH13_FIFO_EMPTY       ,CH13 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 11. "    CH12_FIFO_EMPTY       ,CH12 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 10. " CH11_FIFO_EMPTY       ,CH11 FIFO empty" "Not empty,Empty"
textline "                                                     "
endif
bitfld.long 0x10 9. " CH10_FIFO_EMPTY       ,CH10 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 8. "    CH9_FIFO_EMPTY        ,CH9 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 7. "    CH8_FIFO_EMPTY        ,CH8 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 6. " CH7_FIFO_EMPTY        ,CH7 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 5. "    CH6_FIFO_EMPTY        ,CH6 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 4. "    CH5_FIFO_EMPTY        ,CH5 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 3. " CH4_FIFO_EMPTY        ,CH4 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 2. "    CH3_FIFO_EMPTY        ,CH3 FIFO empty" "Not empty,Empty"
bitfld.long 0x10 1. "    CH2_FIFO_EMPTY        ,CH2 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x10 0. " CH1_FIFO_EMPTY        ,CH1 FIFO empty" "Not empty,Empty"
line.long 0x14 "ADMAIF_GLOBAL_TX_DMA_FIFO_FULL_STATUS_0,Global TX DMA FIFO Full Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x14 19. " CH20_FIFO_FULL        ,CH20 FIFO FULL" "Not full,Full"
bitfld.long 0x14 18. "     CH19_FIFO_FULL        ,CH19 FIFO FULL" "Not full,Full"
bitfld.long 0x14 17. "     CH18_FIFO_FULL        ,CH18 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 16. " CH17_FIFO_FULL        ,CH17 FIFO FULL" "Not full,Full"
bitfld.long 0x14 15. "     CH16_FIFO_FULL        ,CH16 FIFO FULL" "Not full,Full"
bitfld.long 0x14 14. "     CH15_FIFO_FULL        ,CH15 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 13. " CH14_FIFO_FULL        ,CH14 FIFO FULL" "Not full,Full"
bitfld.long 0x14 12. "     CH13_FIFO_FULL        ,CH13 FIFO FULL" "Not full,Full"
bitfld.long 0x14 11. "     CH12_FIFO_FULL        ,CH12 FIFO FULL" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 10. " CH11_FIFO_FULL        ,CH11 FIFO FULL" "Not full,Full"
textline "                                                     "
endif
bitfld.long 0x14 9. " CH10_FIFO_FULL        ,CH10 FIFO full" "Not full,Full"
bitfld.long 0x14 8. "     CH9_FIFO_FULL         ,CH9 FIFO full" "Not full,Full"
bitfld.long 0x14 7. "     CH8_FIFO_FULL         ,CH8 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 6. " CH7_FIFO_FULL         ,CH7 FIFO full" "Not full,Full"
bitfld.long 0x14 5. "     CH6_FIFO_FULL         ,CH6 FIFO full" "Not full,Full"
bitfld.long 0x14 4. "     CH5_FIFO_FULL         ,CH5 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 3. " CH4_FIFO_FULL         ,CH4 FIFO full" "Not full,Full"
bitfld.long 0x14 2. "     CH3_FIFO_FULL         ,CH3 FIFO full" "Not full,Full"
bitfld.long 0x14 1. "     CH2_FIFO_FULL         ,CH2 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x14 0. " CH1_FIFO_FULL         ,CH1 FIFO full" "Not full,Full"
line.long 0x18 "ADMAIF_GLOBAL_RX_ACIF_FIFO_EMPTY_STATUS_0,Global RX ACIF FIFO Empty Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x18 19. " CH20_FIFO_EMPTY       ,CH20 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 18. "    CH19_FIFO_EMPTY       ,CH19 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 17. "    CH18_FIFO_EMPTY       ,CH18 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 16. " CH17_FIFO_EMPTY       ,CH17 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 15. "    CH16_FIFO_EMPTY       ,CH16 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 14. "    CH15_FIFO_EMPTY       ,CH15 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 13. " CH14_FIFO_EMPTY       ,CH14 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 12. "    CH13_FIFO_EMPTY       ,CH13 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 11. "    CH12_FIFO_EMPTY       ,CH12 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 10. " CH11_FIFO_EMPTY       ,CH11 FIFO empty" "Not empty,Empty"
textline "                                                     "
endif
bitfld.long 0x18 9. " CH10_FIFO_EMPTY       ,CH10 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 8. "    CH9_FIFO_EMPTY        ,CH9 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 7. "    CH8_FIFO_EMPTY        ,CH8 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 6. " CH7_FIFO_EMPTY        ,CH7 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 5. "    CH6_FIFO_EMPTY        ,CH6 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 4. "    CH5_FIFO_EMPTY        ,CH5 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 3. " CH4_FIFO_EMPTY        ,CH4 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 2. "    CH3_FIFO_EMPTY        ,CH3 FIFO empty" "Not empty,Empty"
bitfld.long 0x18 1. "    CH2_FIFO_EMPTY        ,CH2 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x18 0. " CH1_FIFO_EMPTY        ,CH1 FIFO empty" "Not empty,Empty"
line.long 0x1C "ADMAIF_GLOBAL_RX_ACIF_FIFO_FULL_STATUS_0,Global RX ACIF FIFO Full Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x1C 19. " CH20_FIFO_FULL        ,CH20 FIFO full" "Not full,Full"
bitfld.long 0x1C 18. "     CH19_FIFO_FULL        ,CH19 FIFO full" "Not full,Full"
bitfld.long 0x1C 17. "     CH18_FIFO_FULL        ,CH18 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 16. " CH17_FIFO_FULL        ,CH17 FIFO full" "Not full,Full"
bitfld.long 0x1C 15. "     CH16_FIFO_FULL        ,CH16 FIFO full" "Not full,Full"
bitfld.long 0x1C 14. "     CH15_FIFO_FULL        ,CH15 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 13. " CH14_FIFO_FULL        ,CH14 FIFO full" "Not full,Full"
bitfld.long 0x1C 12. "     CH13_FIFO_FULL        ,CH13 FIFO full" "Not full,Full"
bitfld.long 0x1C 11. "     CH12_FIFO_FULL        ,CH12 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 10. " CH11_FIFO_FULL        ,CH11 FIFO full" "Not full,Full"
textline "                                                     "
endif
bitfld.long 0x1C 9. " CH10_FIFO_FULL        ,CH10 FIFO full" "Not full,Full"
bitfld.long 0x1C 8. "     CH9_FIFO_FULL         ,CH9 FIFO full" "Not full,Full"
bitfld.long 0x1C 7. "     CH8_FIFO_FULL         ,CH8 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 6. " CH7_FIFO_FULL         ,CH7 FIFO full" "Not full,Full"
bitfld.long 0x1C 5. "     CH6_FIFO_FULL         ,CH6 FIFO full" "Not full,Full"
bitfld.long 0x1C 4. "     CH5_FIFO_FULL         ,CH5 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 3. " CH4_FIFO_FULL         ,CH4 FIFO full" "Not full,Full"
bitfld.long 0x1C 2. "     CH3_FIFO_FULL         ,CH3 FIFO full" "Not full,Full"
bitfld.long 0x1C 1. "     CH2_FIFO_FULL         ,CH2 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x1C 0. " CH1_FIFO_FULL         ,CH1 FIFO full" "Not full,Full"
line.long 0x20 "ADMAIF_GLOBAL_TX_ACIF_FIFO_EMPTY_STATUS_0,Global TX ACIF FIFO Empty Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x20 19. " CH20_FIFO_EMPTY       ,CH20 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 18. "    CH19_FIFO_EMPTY       ,CH19 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 17. "    CH18_FIFO_EMPTY       ,CH18 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 16. " CH17_FIFO_EMPTY       ,CH17 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 15. "    CH16_FIFO_EMPTY       ,CH16 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 14. "    CH15_FIFO_EMPTY       ,CH15 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 13. " CH14_FIFO_EMPTY       ,CH14 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 12. "    CH13_FIFO_EMPTY       ,CH13 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 11. "    CH12_FIFO_EMPTY       ,CH12 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 10. " CH11_FIFO_EMPTY       ,CH11 FIFO empty" "Not empty,Empty"
textline "                                                     "
endif
bitfld.long 0x20 9. " CH10_FIFO_EMPTY       ,CH10 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 8. "    CH9_FIFO_EMPTY        ,CH9 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 7. "    CH8_FIFO_EMPTY        ,CH8 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 6. " CH7_FIFO_EMPTY        ,CH7 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 5. "    CH6_FIFO_EMPTY        ,CH6 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 4. "    CH5_FIFO_EMPTY        ,CH5 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 3. " CH4_FIFO_EMPTY        ,CH4 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 2. "    CH3_FIFO_EMPTY        ,CH3 FIFO empty" "Not empty,Empty"
bitfld.long 0x20 1. "    CH2_FIFO_EMPTY        ,CH2 FIFO empty" "Not empty,Empty"
textline "                                                     "
bitfld.long 0x20 0. " CH1_FIFO_EMPTY        ,CH1 FIFO empty" "Not empty,Empty"
line.long 0x24 "ADMAIF_GLOBAL_TX_ACIF_FIFO_FULL_STATUS_0,Global TX ACIF FIFO Full Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x24 19. " CH20_FIFO_FULL        ,CH20 FIFO full" "Not full,Full"
bitfld.long 0x24 18. "     CH19_FIFO_FULL        ,CH19 FIFO full" "Not full,Full"
bitfld.long 0x24 17. "     CH18_FIFO_FULL        ,CH18 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 16. " CH17_FIFO_FULL        ,CH17 FIFO full" "Not full,Full"
bitfld.long 0x24 15. "     CH16_FIFO_FULL        ,CH16 FIFO full" "Not full,Full"
bitfld.long 0x24 14. "     CH15_FIFO_FULL        ,CH15 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 13. " CH14_FIFO_FULL        ,CH14 FIFO full" "Not full,Full"
bitfld.long 0x24 12. "     CH13_FIFO_FULL        ,CH13 FIFO full" "Not full,Full"
bitfld.long 0x24 11. "     CH12_FIFO_FULL        ,CH12 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 10. " CH11_FIFO_FULL        ,CH11 FIFO full" "Not full,Full"
textline "                                                     "
endif
bitfld.long 0x24 9. " CH10_FIFO_FULL        ,CH10 FIFO full" "Not full,Full"
bitfld.long 0x24 8. "     CH9_FIFO_FULL         ,CH9 FIFO full" "Not full,Full"
bitfld.long 0x24 7. "     CH8_FIFO_FULL         ,CH8 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 6. " CH7_FIFO_FULL         ,CH7 FIFO full" "Not full,Full"
bitfld.long 0x24 5. "     CH6_FIFO_FULL         ,CH6 FIFO full" "Not full,Full"
bitfld.long 0x24 4. "     CH5_FIFO_FULL         ,CH5 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 3. " CH4_FIFO_FULL         ,CH4 FIFO full" "Not full,Full"
bitfld.long 0x24 2. "     CH3_FIFO_FULL         ,CH3 FIFO full" "Not full,Full"
bitfld.long 0x24 1. "     CH2_FIFO_FULL         ,CH2 FIFO full" "Not full,Full"
textline "                                                     "
bitfld.long 0x24 0. " CH1_FIFO_FULL         ,CH1 FIFO full" "Not full,Full"
line.long 0x28 "ADMAIF_GLOBAL_RX_DMA_OVERRUN_INT_STATUS_0,Global RX DMA Overrun Int Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x28 19. " CH20_DMA_OVERRUN      ,CH20 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 18. "   CH19_DMA_OVERRUN      ,CH19 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 17. "   CH18_DMA_OVERRUN      ,CH18 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 16. " CH17_DMA_OVERRUN      ,CH17 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 15. "   CH16_DMA_OVERRUN      ,CH16 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 14. "   CH15_DMA_OVERRUN      ,CH15 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 13. " CH14_DMA_OVERRUN      ,CH14 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 12. "   CH13_DMA_OVERRUN      ,CH13 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 11. "   CH12_DMA_OVERRUN      ,CH12 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 10. " CH11_DMA_OVERRUN      ,CH11 DMA overrun" "No overrun,Overrun"
textline "                                                     "
endif
bitfld.long 0x28 9. " CH10_DMA_OVERRUN      ,CH10 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 8. "   CH9_DMA_OVERRUN       ,CH9 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 7. "   CH8_DMA_OVERRUN       ,CH8 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 6. " CH7_DMA_OVERRUN       ,CH7 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 5. "   CH6_DMA_OVERRUN       ,CH6 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 4. "   CH5_DMA_OVERRUN       ,CH5 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 3. " CH4_DMA_OVERRUN       ,CH4 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 2. "   CH3_DMA_OVERRUN       ,CH3 DMA overrun" "No overrun,Overrun"
bitfld.long 0x28 1. "   CH2_DMA_OVERRUN       ,CH2 DMA overrun" "No overrun,Overrun"
textline "                                                     "
bitfld.long 0x28 0. " CH1_DMA_OVERRUN       ,CH1 DMA overrun" "No overrun,Overrun"
line.long 0x2C "ADMAIF_GLOBAL_TX_DMA_UNDERRUN_INT_STATUS_0,Global TX DMA Underrun Int Status Register"
sif cpuis("TEGRAX2")
bitfld.long 0x2C 19. " CH20_DMA_UNDERRUN     ,CH20 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 18. "  CH19_DMA_UNDERRUN     ,CH19 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 17. "  CH18_DMA_UNDERRUN     ,CH18 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 16. " CH17_DMA_UNDERRUN     ,CH17 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 15. "  CH16_DMA_UNDERRUN     ,CH16 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 14. "  CH15_DMA_UNDERRUN     ,CH15 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 13. " CH14_DMA_UNDERRUN     ,CH14 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 12. "  CH13_DMA_UNDERRUN     ,CH13 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 11. "  CH12_DMA_UNDERRUN     ,CH12 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 10. " CH11_DMA_UNDERRUN     ,CH11 DMA underrun" "No underrun,Underrun"
textline "                                                     "
endif
bitfld.long 0x2C 9. " CH10_DMA_UNDERRUN     ,CH10 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 8. "  CH9_DMA_UNDERRUN      ,CH9 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 7. "  CH8_DMA_UNDERRUN      ,CH8 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 6. " CH7_DMA_UNDERRUN      ,CH7 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 5. "  CH6_DMA_UNDERRUN      ,CH6 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 4. "  CH5_DMA_UNDERRUN      ,CH5 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 3. " CH4_DMA_UNDERRUN      ,CH4 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 2. "  CH3_DMA_UNDERRUN      ,CH3 DMA underrun" "No underrun,Underrun"
bitfld.long 0x2C 1. "  CH2_DMA_UNDERRUN      ,CH2 DMA underrun" "No underrun,Underrun"
textline "                                                     "
bitfld.long 0x2C 0. " CH1_DMA_UNDERRUN      ,CH1 DMA underrun" "No underrun,Underrun"
sif !(cpuis("TEGRAX2"))
group.long (0x20*0x40+0x500+0x50)++0x07
line.long 0x00 "ADMAIF_GLOBAL_CYA_0,GLOBAL_CYA Register"
line.long 0x04 "ADMAIF_GLOBAL_CYA_0,GLOBAL_CYA Register"
endif
group.long (0x20*0x40+0x500+0x58)++0x07
line.long 0x00 "ADMAIF_GLOBAL_DBG_0,GLOBAL_DBG Register"
line.long 0x04 "ADMAIF_GLOBAL_DBG_0,GLOBAL_DBG Register"
width 0x0B
tree.end
tree "AGIC"
base ad:0x02A40000
width 15.
group.long 0x1000++0x03
line.long 0x00 "CTLR,Distributor Control Register"
rgroup.long 0x1004++0x07
line.long 0x00 "TYPER,Interrupt Controller Type Register"
line.long 0x04 "IIDR,Distributor Implementer Identification Register"
group.long 0x1080++0x03
line.long 0x00 "IGROUPR0,Interrupt Group 0 Register"
group.long 0x1084++0x03
line.long 0x00 "IGROUPR1,Interrupt Group 1 Register"
group.long 0x1088++0x03
line.long 0x00 "IGROUPR2,Interrupt Group 2 Register"
group.long 0x108C++0x03
line.long 0x00 "IGROUPR3,Interrupt Group 3 Register"
group.long 0x1090++0x03
line.long 0x00 "IGROUPR4,Interrupt Group 4 Register"
group.long 0x1094++0x03
line.long 0x00 "IGROUPR5,Interrupt Group 5 Register"
group.long 0x1098++0x03
line.long 0x00 "IGROUPR6,Interrupt Group 6 Register"
group.long 0x109C++0x03
line.long 0x00 "IGROUPR7,Interrupt Group 7 Register"
group.long 0x10A0++0x03
line.long 0x00 "IGROUPR8,Interrupt Group 8 Register"
group.long 0x10A4++0x03
line.long 0x00 "IGROUPR9,Interrupt Group 9 Register"
group.long 0x10A8++0x03
line.long 0x00 "IGROUPR10,Interrupt Group 10 Register"
group.long 0x10AC++0x03
line.long 0x00 "IGROUPR11,Interrupt Group 11 Register"
group.long 0x10B0++0x03
line.long 0x00 "IGROUPR12,Interrupt Group 12 Register"
group.long 0x10B4++0x03
line.long 0x00 "IGROUPR13,Interrupt Group 13 Register"
group.long 0x10B8++0x03
line.long 0x00 "IGROUPR14,Interrupt Group 14 Register"
group.long 0x10BC++0x03
line.long 0x00 "IGROUPR15,Interrupt Group 15 Register"
group.long 0x1100++0x03
line.long 0x00 "ISENABLER0,Interrupt Set-Enable 0 Register"
group.long 0x1104++0x03
line.long 0x00 "ISENABLER1,Interrupt Set-Enable 1 Register"
group.long 0x1108++0x03
line.long 0x00 "ISENABLER2,Interrupt Set-Enable 2 Register"
group.long 0x110C++0x03
line.long 0x00 "ISENABLER3,Interrupt Set-Enable 3 Register"
group.long 0x1110++0x03
line.long 0x00 "ISENABLER4,Interrupt Set-Enable 4 Register"
group.long 0x1114++0x03
line.long 0x00 "ISENABLER5,Interrupt Set-Enable 5 Register"
group.long 0x1118++0x03
line.long 0x00 "ISENABLER6,Interrupt Set-Enable 6 Register"
group.long 0x111C++0x03
line.long 0x00 "ISENABLER7,Interrupt Set-Enable 7 Register"
group.long 0x1120++0x03
line.long 0x00 "ISENABLER8,Interrupt Set-Enable 8 Register"
group.long 0x1124++0x03
line.long 0x00 "ISENABLER9,Interrupt Set-Enable 9 Register"
group.long 0x1128++0x03
line.long 0x00 "ISENABLER10,Interrupt Set-Enable 10 Register"
group.long 0x112C++0x03
line.long 0x00 "ISENABLER11,Interrupt Set-Enable 11 Register"
group.long 0x1130++0x03
line.long 0x00 "ISENABLER12,Interrupt Set-Enable 12 Register"
group.long 0x1134++0x03
line.long 0x00 "ISENABLER13,Interrupt Set-Enable 13 Register"
group.long 0x1138++0x03
line.long 0x00 "ISENABLER14,Interrupt Set-Enable 14 Register"
group.long 0x113C++0x03
line.long 0x00 "ISENABLER15,Interrupt Set-Enable 15 Register"
group.long 0x1180++0x03
line.long 0x00 "ICENABLER0,Interrupt Clear-Enable 0 Register"
group.long 0x1184++0x03
line.long 0x00 "ICENABLER1,Interrupt Clear-Enable 1 Register"
group.long 0x1188++0x03
line.long 0x00 "ICENABLER2,Interrupt Clear-Enable 2 Register"
group.long 0x118C++0x03
line.long 0x00 "ICENABLER3,Interrupt Clear-Enable 3 Register"
group.long 0x1190++0x03
line.long 0x00 "ICENABLER4,Interrupt Clear-Enable 4 Register"
group.long 0x1194++0x03
line.long 0x00 "ICENABLER5,Interrupt Clear-Enable 5 Register"
group.long 0x1198++0x03
line.long 0x00 "ICENABLER6,Interrupt Clear-Enable 6 Register"
group.long 0x119C++0x03
line.long 0x00 "ICENABLER7,Interrupt Clear-Enable 7 Register"
group.long 0x11A0++0x03
line.long 0x00 "ICENABLER8,Interrupt Clear-Enable 8 Register"
group.long 0x11A4++0x03
line.long 0x00 "ICENABLER9,Interrupt Clear-Enable 9 Register"
group.long 0x11A8++0x03
line.long 0x00 "ICENABLER10,Interrupt Clear-Enable 10 Register"
group.long 0x11AC++0x03
line.long 0x00 "ICENABLER11,Interrupt Clear-Enable 11 Register"
group.long 0x11B0++0x03
line.long 0x00 "ICENABLER12,Interrupt Clear-Enable 12 Register"
group.long 0x11B4++0x03
line.long 0x00 "ICENABLER13,Interrupt Clear-Enable 13 Register"
group.long 0x11B8++0x03
line.long 0x00 "ICENABLER14,Interrupt Clear-Enable 14 Register"
group.long 0x11BC++0x03
line.long 0x00 "ICENABLER15,Interrupt Clear-Enable 15 Register"
group.long 0x1200++0x03
line.long 0x00 "ISPENDR0,Interrupt Set-Pending 0 Register"
group.long 0x1204++0x03
line.long 0x00 "ISPENDR1,Interrupt Set-Pending 1 Register"
group.long 0x1208++0x03
line.long 0x00 "ISPENDR2,Interrupt Set-Pending 2 Register"
group.long 0x120C++0x03
line.long 0x00 "ISPENDR3,Interrupt Set-Pending 3 Register"
group.long 0x1210++0x03
line.long 0x00 "ISPENDR4,Interrupt Set-Pending 4 Register"
group.long 0x1214++0x03
line.long 0x00 "ISPENDR5,Interrupt Set-Pending 5 Register"
group.long 0x1218++0x03
line.long 0x00 "ISPENDR6,Interrupt Set-Pending 6 Register"
group.long 0x121C++0x03
line.long 0x00 "ISPENDR7,Interrupt Set-Pending 7 Register"
group.long 0x1220++0x03
line.long 0x00 "ISPENDR8,Interrupt Set-Pending 8 Register"
group.long 0x1224++0x03
line.long 0x00 "ISPENDR9,Interrupt Set-Pending 9 Register"
group.long 0x1228++0x03
line.long 0x00 "ISPENDR10,Interrupt Set-Pending 10 Register"
group.long 0x122C++0x03
line.long 0x00 "ISPENDR11,Interrupt Set-Pending 11 Register"
group.long 0x1230++0x03
line.long 0x00 "ISPENDR12,Interrupt Set-Pending 12 Register"
group.long 0x1234++0x03
line.long 0x00 "ISPENDR13,Interrupt Set-Pending 13 Register"
group.long 0x1238++0x03
line.long 0x00 "ISPENDR14,Interrupt Set-Pending 14 Register"
group.long 0x123C++0x03
line.long 0x00 "ISPENDR15,Interrupt Set-Pending 15 Register"
group.long 0x1280++0x03
line.long 0x00 "ICPENDR0,Interrupt Clear-Pending 0 Register"
group.long 0x1284++0x03
line.long 0x00 "ICPENDR1,Interrupt Clear-Pending 1 Register"
group.long 0x1288++0x03
line.long 0x00 "ICPENDR2,Interrupt Clear-Pending 2 Register"
group.long 0x128C++0x03
line.long 0x00 "ICPENDR3,Interrupt Clear-Pending 3 Register"
group.long 0x1290++0x03
line.long 0x00 "ICPENDR4,Interrupt Clear-Pending 4 Register"
group.long 0x1294++0x03
line.long 0x00 "ICPENDR5,Interrupt Clear-Pending 5 Register"
group.long 0x1298++0x03
line.long 0x00 "ICPENDR6,Interrupt Clear-Pending 6 Register"
group.long 0x129C++0x03
line.long 0x00 "ICPENDR7,Interrupt Clear-Pending 7 Register"
group.long 0x12A0++0x03
line.long 0x00 "ICPENDR8,Interrupt Clear-Pending 8 Register"
group.long 0x12A4++0x03
line.long 0x00 "ICPENDR9,Interrupt Clear-Pending 9 Register"
group.long 0x12A8++0x03
line.long 0x00 "ICPENDR10,Interrupt Clear-Pending 10 Register"
group.long 0x12AC++0x03
line.long 0x00 "ICPENDR11,Interrupt Clear-Pending 11 Register"
group.long 0x12B0++0x03
line.long 0x00 "ICPENDR12,Interrupt Clear-Pending 12 Register"
group.long 0x12B4++0x03
line.long 0x00 "ICPENDR13,Interrupt Clear-Pending 13 Register"
group.long 0x12B8++0x03
line.long 0x00 "ICPENDR14,Interrupt Clear-Pending 14 Register"
group.long 0x12BC++0x03
line.long 0x00 "ICPENDR15,Interrupt Clear-Pending 15 Register"
group.long 0x1300++0x03
line.long 0x00 "ISACTIVER0,Interrupt Set-Active 0 Register"
group.long 0x1304++0x03
line.long 0x00 "ISACTIVER1,Interrupt Set-Active 1 Register"
group.long 0x1308++0x03
line.long 0x00 "ISACTIVER2,Interrupt Set-Active 2 Register"
group.long 0x130C++0x03
line.long 0x00 "ISACTIVER3,Interrupt Set-Active 3 Register"
group.long 0x1310++0x03
line.long 0x00 "ISACTIVER4,Interrupt Set-Active 4 Register"
group.long 0x1314++0x03
line.long 0x00 "ISACTIVER5,Interrupt Set-Active 5 Register"
group.long 0x1318++0x03
line.long 0x00 "ISACTIVER6,Interrupt Set-Active 6 Register"
group.long 0x131C++0x03
line.long 0x00 "ISACTIVER7,Interrupt Set-Active 7 Register"
group.long 0x1320++0x03
line.long 0x00 "ISACTIVER8,Interrupt Set-Active 8 Register"
group.long 0x1324++0x03
line.long 0x00 "ISACTIVER9,Interrupt Set-Active 9 Register"
group.long 0x1328++0x03
line.long 0x00 "ISACTIVER10,Interrupt Set-Active 10 Register"
group.long 0x132C++0x03
line.long 0x00 "ISACTIVER11,Interrupt Set-Active 11 Register"
group.long 0x1330++0x03
line.long 0x00 "ISACTIVER12,Interrupt Set-Active 12 Register"
group.long 0x1334++0x03
line.long 0x00 "ISACTIVER13,Interrupt Set-Active 13 Register"
group.long 0x1338++0x03
line.long 0x00 "ISACTIVER14,Interrupt Set-Active 14 Register"
group.long 0x133C++0x03
line.long 0x00 "ISACTIVER15,Interrupt Set-Active 15 Register"
group.long 0x1380++0x03
line.long 0x00 "ICACTIVER0,Interrupt Clear-Active 0 Register"
group.long 0x1384++0x03
line.long 0x00 "ICACTIVER1,Interrupt Clear-Active 1 Register"
group.long 0x1388++0x03
line.long 0x00 "ICACTIVER2,Interrupt Clear-Active 2 Register"
group.long 0x138C++0x03
line.long 0x00 "ICACTIVER3,Interrupt Clear-Active 3 Register"
group.long 0x1390++0x03
line.long 0x00 "ICACTIVER4,Interrupt Clear-Active 4 Register"
group.long 0x1394++0x03
line.long 0x00 "ICACTIVER5,Interrupt Clear-Active 5 Register"
group.long 0x1398++0x03
line.long 0x00 "ICACTIVER6,Interrupt Clear-Active 6 Register"
group.long 0x139C++0x03
line.long 0x00 "ICACTIVER7,Interrupt Clear-Active 7 Register"
group.long 0x13A0++0x03
line.long 0x00 "ICACTIVER8,Interrupt Clear-Active 8 Register"
group.long 0x13A4++0x03
line.long 0x00 "ICACTIVER9,Interrupt Clear-Active 9 Register"
group.long 0x13A8++0x03
line.long 0x00 "ICACTIVER10,Interrupt Clear-Active 10 Register"
group.long 0x13AC++0x03
line.long 0x00 "ICACTIVER11,Interrupt Clear-Active 11 Register"
group.long 0x13B0++0x03
line.long 0x00 "ICACTIVER12,Interrupt Clear-Active 12 Register"
group.long 0x13B4++0x03
line.long 0x00 "ICACTIVER13,Interrupt Clear-Active 13 Register"
group.long 0x13B8++0x03
line.long 0x00 "ICACTIVER14,Interrupt Clear-Active 14 Register"
group.long 0x13BC++0x03
line.long 0x00 "ICACTIVER15,Interrupt Clear-Active 15 Register"
group.long 0x1400++0x03
line.long 0x00 "IPRIORITYR0,Interrupt Priority 0 Register"
group.long 0x1404++0x03
line.long 0x00 "IPRIORITYR1,Interrupt Priority 1 Register"
group.long 0x1408++0x03
line.long 0x00 "IPRIORITYR2,Interrupt Priority 2 Register"
group.long 0x140C++0x03
line.long 0x00 "IPRIORITYR3,Interrupt Priority 3 Register"
group.long 0x1410++0x03
line.long 0x00 "IPRIORITYR4,Interrupt Priority 4 Register"
group.long 0x1414++0x03
line.long 0x00 "IPRIORITYR5,Interrupt Priority 5 Register"
group.long 0x1418++0x03
line.long 0x00 "IPRIORITYR6,Interrupt Priority 6 Register"
group.long 0x141C++0x03
line.long 0x00 "IPRIORITYR7,Interrupt Priority 7 Register"
group.long 0x1420++0x03
line.long 0x00 "IPRIORITYR8,Interrupt Priority 8 Register"
group.long 0x1424++0x03
line.long 0x00 "IPRIORITYR9,Interrupt Priority 9 Register"
group.long 0x1428++0x03
line.long 0x00 "IPRIORITYR10,Interrupt Priority 10 Register"
group.long 0x142C++0x03
line.long 0x00 "IPRIORITYR11,Interrupt Priority 11 Register"
group.long 0x1430++0x03
line.long 0x00 "IPRIORITYR12,Interrupt Priority 12 Register"
group.long 0x1434++0x03
line.long 0x00 "IPRIORITYR13,Interrupt Priority 13 Register"
group.long 0x1438++0x03
line.long 0x00 "IPRIORITYR14,Interrupt Priority 14 Register"
group.long 0x143C++0x03
line.long 0x00 "IPRIORITYR15,Interrupt Priority 15 Register"
group.long 0x1440++0x03
line.long 0x00 "IPRIORITYR16,Interrupt Priority 16 Register"
group.long 0x1444++0x03
line.long 0x00 "IPRIORITYR17,Interrupt Priority 17 Register"
group.long 0x1448++0x03
line.long 0x00 "IPRIORITYR18,Interrupt Priority 18 Register"
group.long 0x144C++0x03
line.long 0x00 "IPRIORITYR19,Interrupt Priority 19 Register"
group.long 0x1450++0x03
line.long 0x00 "IPRIORITYR20,Interrupt Priority 20 Register"
group.long 0x1454++0x03
line.long 0x00 "IPRIORITYR21,Interrupt Priority 21 Register"
group.long 0x1458++0x03
line.long 0x00 "IPRIORITYR22,Interrupt Priority 22 Register"
group.long 0x145C++0x03
line.long 0x00 "IPRIORITYR23,Interrupt Priority 23 Register"
group.long 0x1460++0x03
line.long 0x00 "IPRIORITYR24,Interrupt Priority 24 Register"
group.long 0x1464++0x03
line.long 0x00 "IPRIORITYR25,Interrupt Priority 25 Register"
group.long 0x1468++0x03
line.long 0x00 "IPRIORITYR26,Interrupt Priority 26 Register"
group.long 0x146C++0x03
line.long 0x00 "IPRIORITYR27,Interrupt Priority 27 Register"
group.long 0x1470++0x03
line.long 0x00 "IPRIORITYR28,Interrupt Priority 28 Register"
group.long 0x1474++0x03
line.long 0x00 "IPRIORITYR29,Interrupt Priority 29 Register"
group.long 0x1478++0x03
line.long 0x00 "IPRIORITYR30,Interrupt Priority 30 Register"
group.long 0x147C++0x03
line.long 0x00 "IPRIORITYR31,Interrupt Priority 31 Register"
group.long 0x1480++0x03
line.long 0x00 "IPRIORITYR32,Interrupt Priority 32 Register"
group.long 0x1484++0x03
line.long 0x00 "IPRIORITYR33,Interrupt Priority 33 Register"
group.long 0x1488++0x03
line.long 0x00 "IPRIORITYR34,Interrupt Priority 34 Register"
group.long 0x148C++0x03
line.long 0x00 "IPRIORITYR35,Interrupt Priority 35 Register"
group.long 0x1490++0x03
line.long 0x00 "IPRIORITYR36,Interrupt Priority 36 Register"
group.long 0x1494++0x03
line.long 0x00 "IPRIORITYR37,Interrupt Priority 37 Register"
group.long 0x1498++0x03
line.long 0x00 "IPRIORITYR38,Interrupt Priority 38 Register"
group.long 0x149C++0x03
line.long 0x00 "IPRIORITYR39,Interrupt Priority 39 Register"
group.long 0x14A0++0x03
line.long 0x00 "IPRIORITYR40,Interrupt Priority 40 Register"
group.long 0x14A4++0x03
line.long 0x00 "IPRIORITYR41,Interrupt Priority 41 Register"
group.long 0x14A8++0x03
line.long 0x00 "IPRIORITYR42,Interrupt Priority 42 Register"
group.long 0x14AC++0x03
line.long 0x00 "IPRIORITYR43,Interrupt Priority 43 Register"
group.long 0x14B0++0x03
line.long 0x00 "IPRIORITYR44,Interrupt Priority 44 Register"
group.long 0x14B4++0x03
line.long 0x00 "IPRIORITYR45,Interrupt Priority 45 Register"
group.long 0x14B8++0x03
line.long 0x00 "IPRIORITYR46,Interrupt Priority 46 Register"
group.long 0x14BC++0x03
line.long 0x00 "IPRIORITYR47,Interrupt Priority 47 Register"
group.long 0x14C0++0x03
line.long 0x00 "IPRIORITYR48,Interrupt Priority 48 Register"
group.long 0x14C4++0x03
line.long 0x00 "IPRIORITYR49,Interrupt Priority 49 Register"
group.long 0x14C8++0x03
line.long 0x00 "IPRIORITYR50,Interrupt Priority 50 Register"
group.long 0x14CC++0x03
line.long 0x00 "IPRIORITYR51,Interrupt Priority 51 Register"
group.long 0x14D0++0x03
line.long 0x00 "IPRIORITYR52,Interrupt Priority 52 Register"
group.long 0x14D4++0x03
line.long 0x00 "IPRIORITYR53,Interrupt Priority 53 Register"
group.long 0x14D8++0x03
line.long 0x00 "IPRIORITYR54,Interrupt Priority 54 Register"
group.long 0x14DC++0x03
line.long 0x00 "IPRIORITYR55,Interrupt Priority 55 Register"
group.long 0x14E0++0x03
line.long 0x00 "IPRIORITYR56,Interrupt Priority 56 Register"
group.long 0x14E4++0x03
line.long 0x00 "IPRIORITYR57,Interrupt Priority 57 Register"
group.long 0x14E8++0x03
line.long 0x00 "IPRIORITYR58,Interrupt Priority 58 Register"
group.long 0x14EC++0x03
line.long 0x00 "IPRIORITYR59,Interrupt Priority 59 Register"
group.long 0x14F0++0x03
line.long 0x00 "IPRIORITYR60,Interrupt Priority 60 Register"
group.long 0x14F4++0x03
line.long 0x00 "IPRIORITYR61,Interrupt Priority 61 Register"
group.long 0x14F8++0x03
line.long 0x00 "IPRIORITYR62,Interrupt Priority 62 Register"
group.long 0x14FC++0x03
line.long 0x00 "IPRIORITYR63,Interrupt Priority 63 Register"
group.long 0x1500++0x03
line.long 0x00 "IPRIORITYR64,Interrupt Priority 64 Register"
group.long 0x1504++0x03
line.long 0x00 "IPRIORITYR65,Interrupt Priority 65 Register"
group.long 0x1508++0x03
line.long 0x00 "IPRIORITYR66,Interrupt Priority 66 Register"
group.long 0x150C++0x03
line.long 0x00 "IPRIORITYR67,Interrupt Priority 67 Register"
group.long 0x1510++0x03
line.long 0x00 "IPRIORITYR68,Interrupt Priority 68 Register"
group.long 0x1514++0x03
line.long 0x00 "IPRIORITYR69,Interrupt Priority 69 Register"
group.long 0x1518++0x03
line.long 0x00 "IPRIORITYR70,Interrupt Priority 70 Register"
group.long 0x151C++0x03
line.long 0x00 "IPRIORITYR71,Interrupt Priority 71 Register"
group.long 0x1520++0x03
line.long 0x00 "IPRIORITYR72,Interrupt Priority 72 Register"
group.long 0x1524++0x03
line.long 0x00 "IPRIORITYR73,Interrupt Priority 73 Register"
group.long 0x1528++0x03
line.long 0x00 "IPRIORITYR74,Interrupt Priority 74 Register"
group.long 0x152C++0x03
line.long 0x00 "IPRIORITYR75,Interrupt Priority 75 Register"
group.long 0x1530++0x03
line.long 0x00 "IPRIORITYR76,Interrupt Priority 76 Register"
group.long 0x1534++0x03
line.long 0x00 "IPRIORITYR77,Interrupt Priority 77 Register"
group.long 0x1538++0x03
line.long 0x00 "IPRIORITYR78,Interrupt Priority 78 Register"
group.long 0x153C++0x03
line.long 0x00 "IPRIORITYR79,Interrupt Priority 79 Register"
group.long 0x1540++0x03
line.long 0x00 "IPRIORITYR80,Interrupt Priority 80 Register"
group.long 0x1544++0x03
line.long 0x00 "IPRIORITYR81,Interrupt Priority 81 Register"
group.long 0x1548++0x03
line.long 0x00 "IPRIORITYR82,Interrupt Priority 82 Register"
group.long 0x154C++0x03
line.long 0x00 "IPRIORITYR83,Interrupt Priority 83 Register"
group.long 0x1550++0x03
line.long 0x00 "IPRIORITYR84,Interrupt Priority 84 Register"
group.long 0x1554++0x03
line.long 0x00 "IPRIORITYR85,Interrupt Priority 85 Register"
group.long 0x1558++0x03
line.long 0x00 "IPRIORITYR86,Interrupt Priority 86 Register"
group.long 0x155C++0x03
line.long 0x00 "IPRIORITYR87,Interrupt Priority 87 Register"
group.long 0x1560++0x03
line.long 0x00 "IPRIORITYR88,Interrupt Priority 88 Register"
group.long 0x1564++0x03
line.long 0x00 "IPRIORITYR89,Interrupt Priority 89 Register"
group.long 0x1568++0x03
line.long 0x00 "IPRIORITYR90,Interrupt Priority 90 Register"
group.long 0x156C++0x03
line.long 0x00 "IPRIORITYR91,Interrupt Priority 91 Register"
group.long 0x1570++0x03
line.long 0x00 "IPRIORITYR92,Interrupt Priority 92 Register"
group.long 0x1574++0x03
line.long 0x00 "IPRIORITYR93,Interrupt Priority 93 Register"
group.long 0x1578++0x03
line.long 0x00 "IPRIORITYR94,Interrupt Priority 94 Register"
group.long 0x157C++0x03
line.long 0x00 "IPRIORITYR95,Interrupt Priority 95 Register"
group.long 0x1580++0x03
line.long 0x00 "IPRIORITYR96,Interrupt Priority 96 Register"
group.long 0x1584++0x03
line.long 0x00 "IPRIORITYR97,Interrupt Priority 97 Register"
group.long 0x1588++0x03
line.long 0x00 "IPRIORITYR98,Interrupt Priority 98 Register"
group.long 0x158C++0x03
line.long 0x00 "IPRIORITYR99,Interrupt Priority 99 Register"
group.long 0x1590++0x03
line.long 0x00 "IPRIORITYR100,Interrupt Priority 100 Register"
group.long 0x1594++0x03
line.long 0x00 "IPRIORITYR101,Interrupt Priority 101 Register"
group.long 0x1598++0x03
line.long 0x00 "IPRIORITYR102,Interrupt Priority 102 Register"
group.long 0x159C++0x03
line.long 0x00 "IPRIORITYR103,Interrupt Priority 103 Register"
group.long 0x15A0++0x03
line.long 0x00 "IPRIORITYR104,Interrupt Priority 104 Register"
group.long 0x15A4++0x03
line.long 0x00 "IPRIORITYR105,Interrupt Priority 105 Register"
group.long 0x15A8++0x03
line.long 0x00 "IPRIORITYR106,Interrupt Priority 106 Register"
group.long 0x15AC++0x03
line.long 0x00 "IPRIORITYR107,Interrupt Priority 107 Register"
group.long 0x15B0++0x03
line.long 0x00 "IPRIORITYR108,Interrupt Priority 108 Register"
group.long 0x15B4++0x03
line.long 0x00 "IPRIORITYR109,Interrupt Priority 109 Register"
group.long 0x15B8++0x03
line.long 0x00 "IPRIORITYR110,Interrupt Priority 110 Register"
group.long 0x15BC++0x03
line.long 0x00 "IPRIORITYR111,Interrupt Priority 111 Register"
group.long 0x15C0++0x03
line.long 0x00 "IPRIORITYR112,Interrupt Priority 112 Register"
group.long 0x15C4++0x03
line.long 0x00 "IPRIORITYR113,Interrupt Priority 113 Register"
group.long 0x15C8++0x03
line.long 0x00 "IPRIORITYR114,Interrupt Priority 114 Register"
group.long 0x15CC++0x03
line.long 0x00 "IPRIORITYR115,Interrupt Priority 115 Register"
group.long 0x15D0++0x03
line.long 0x00 "IPRIORITYR116,Interrupt Priority 116 Register"
group.long 0x15D4++0x03
line.long 0x00 "IPRIORITYR117,Interrupt Priority 117 Register"
group.long 0x15D8++0x03
line.long 0x00 "IPRIORITYR118,Interrupt Priority 118 Register"
group.long 0x15DC++0x03
line.long 0x00 "IPRIORITYR119,Interrupt Priority 119 Register"
group.long 0x15E0++0x03
line.long 0x00 "IPRIORITYR120,Interrupt Priority 120 Register"
group.long 0x15E4++0x03
line.long 0x00 "IPRIORITYR121,Interrupt Priority 121 Register"
group.long 0x15E8++0x03
line.long 0x00 "IPRIORITYR122,Interrupt Priority 122 Register"
group.long 0x15EC++0x03
line.long 0x00 "IPRIORITYR123,Interrupt Priority 123 Register"
group.long 0x15F0++0x03
line.long 0x00 "IPRIORITYR124,Interrupt Priority 124 Register"
group.long 0x15F4++0x03
line.long 0x00 "IPRIORITYR125,Interrupt Priority 125 Register"
group.long 0x15F8++0x03
line.long 0x00 "IPRIORITYR126,Interrupt Priority 126 Register"
group.long 0x15FC++0x03
line.long 0x00 "IPRIORITYR127,Interrupt Priority 127 Register"
rgroup.long 0x1800++0x03
line.long 0x00 "ITARGETSR0,Interrupt Processor Targets 0 Register"
rgroup.long 0x1804++0x03
line.long 0x00 "ITARGETSR1,Interrupt Processor Targets 1 Register"
rgroup.long 0x1808++0x03
line.long 0x00 "ITARGETSR2,Interrupt Processor Targets 2 Register"
rgroup.long 0x180C++0x03
line.long 0x00 "ITARGETSR3,Interrupt Processor Targets 3 Register"
rgroup.long 0x1810++0x03
line.long 0x00 "ITARGETSR4,Interrupt Processor Targets 4 Register"
rgroup.long 0x1814++0x03
line.long 0x00 "ITARGETSR5,Interrupt Processor Targets 5 Register"
rgroup.long 0x1818++0x03
line.long 0x00 "ITARGETSR6,Interrupt Processor Targets 6 Register"
rgroup.long 0x181C++0x03
line.long 0x00 "ITARGETSR7,Interrupt Processor Targets 7 Register"
rgroup.long 0x1820++0x03
line.long 0x00 "ITARGETSR8,Interrupt Processor Targets 8 Register"
rgroup.long 0x1824++0x03
line.long 0x00 "ITARGETSR9,Interrupt Processor Targets 9 Register"
rgroup.long 0x1828++0x03
line.long 0x00 "ITARGETSR10,Interrupt Processor Targets 10 Register"
rgroup.long 0x182C++0x03
line.long 0x00 "ITARGETSR11,Interrupt Processor Targets 11 Register"
rgroup.long 0x1830++0x03
line.long 0x00 "ITARGETSR12,Interrupt Processor Targets 12 Register"
rgroup.long 0x1834++0x03
line.long 0x00 "ITARGETSR13,Interrupt Processor Targets 13 Register"
rgroup.long 0x1838++0x03
line.long 0x00 "ITARGETSR14,Interrupt Processor Targets 14 Register"
rgroup.long 0x183C++0x03
line.long 0x00 "ITARGETSR15,Interrupt Processor Targets 15 Register"
rgroup.long 0x1840++0x03
line.long 0x00 "ITARGETSR16,Interrupt Processor Targets 16 Register"
rgroup.long 0x1844++0x03
line.long 0x00 "ITARGETSR17,Interrupt Processor Targets 17 Register"
rgroup.long 0x1848++0x03
line.long 0x00 "ITARGETSR18,Interrupt Processor Targets 18 Register"
rgroup.long 0x184C++0x03
line.long 0x00 "ITARGETSR19,Interrupt Processor Targets 19 Register"
rgroup.long 0x1850++0x03
line.long 0x00 "ITARGETSR20,Interrupt Processor Targets 20 Register"
rgroup.long 0x1854++0x03
line.long 0x00 "ITARGETSR21,Interrupt Processor Targets 21 Register"
rgroup.long 0x1858++0x03
line.long 0x00 "ITARGETSR22,Interrupt Processor Targets 22 Register"
rgroup.long 0x185C++0x03
line.long 0x00 "ITARGETSR23,Interrupt Processor Targets 23 Register"
rgroup.long 0x1860++0x03
line.long 0x00 "ITARGETSR24,Interrupt Processor Targets 24 Register"
rgroup.long 0x1864++0x03
line.long 0x00 "ITARGETSR25,Interrupt Processor Targets 25 Register"
rgroup.long 0x1868++0x03
line.long 0x00 "ITARGETSR26,Interrupt Processor Targets 26 Register"
rgroup.long 0x186C++0x03
line.long 0x00 "ITARGETSR27,Interrupt Processor Targets 27 Register"
rgroup.long 0x1870++0x03
line.long 0x00 "ITARGETSR28,Interrupt Processor Targets 28 Register"
rgroup.long 0x1874++0x03
line.long 0x00 "ITARGETSR29,Interrupt Processor Targets 29 Register"
rgroup.long 0x1878++0x03
line.long 0x00 "ITARGETSR30,Interrupt Processor Targets 30 Register"
rgroup.long 0x187C++0x03
line.long 0x00 "ITARGETSR31,Interrupt Processor Targets 31 Register"
rgroup.long 0x1880++0x03
line.long 0x00 "ITARGETSR32,Interrupt Processor Targets 32 Register"
rgroup.long 0x1884++0x03
line.long 0x00 "ITARGETSR33,Interrupt Processor Targets 33 Register"
rgroup.long 0x1888++0x03
line.long 0x00 "ITARGETSR34,Interrupt Processor Targets 34 Register"
rgroup.long 0x188C++0x03
line.long 0x00 "ITARGETSR35,Interrupt Processor Targets 35 Register"
rgroup.long 0x1890++0x03
line.long 0x00 "ITARGETSR36,Interrupt Processor Targets 36 Register"
rgroup.long 0x1894++0x03
line.long 0x00 "ITARGETSR37,Interrupt Processor Targets 37 Register"
rgroup.long 0x1898++0x03
line.long 0x00 "ITARGETSR38,Interrupt Processor Targets 38 Register"
rgroup.long 0x189C++0x03
line.long 0x00 "ITARGETSR39,Interrupt Processor Targets 39 Register"
rgroup.long 0x18A0++0x03
line.long 0x00 "ITARGETSR40,Interrupt Processor Targets 40 Register"
rgroup.long 0x18A4++0x03
line.long 0x00 "ITARGETSR41,Interrupt Processor Targets 41 Register"
rgroup.long 0x18A8++0x03
line.long 0x00 "ITARGETSR42,Interrupt Processor Targets 42 Register"
rgroup.long 0x18AC++0x03
line.long 0x00 "ITARGETSR43,Interrupt Processor Targets 43 Register"
rgroup.long 0x18B0++0x03
line.long 0x00 "ITARGETSR44,Interrupt Processor Targets 44 Register"
rgroup.long 0x18B4++0x03
line.long 0x00 "ITARGETSR45,Interrupt Processor Targets 45 Register"
rgroup.long 0x18B8++0x03
line.long 0x00 "ITARGETSR46,Interrupt Processor Targets 46 Register"
rgroup.long 0x18BC++0x03
line.long 0x00 "ITARGETSR47,Interrupt Processor Targets 47 Register"
rgroup.long 0x18C0++0x03
line.long 0x00 "ITARGETSR48,Interrupt Processor Targets 48 Register"
rgroup.long 0x18C4++0x03
line.long 0x00 "ITARGETSR49,Interrupt Processor Targets 49 Register"
rgroup.long 0x18C8++0x03
line.long 0x00 "ITARGETSR50,Interrupt Processor Targets 50 Register"
rgroup.long 0x18CC++0x03
line.long 0x00 "ITARGETSR51,Interrupt Processor Targets 51 Register"
rgroup.long 0x18D0++0x03
line.long 0x00 "ITARGETSR52,Interrupt Processor Targets 52 Register"
rgroup.long 0x18D4++0x03
line.long 0x00 "ITARGETSR53,Interrupt Processor Targets 53 Register"
rgroup.long 0x18D8++0x03
line.long 0x00 "ITARGETSR54,Interrupt Processor Targets 54 Register"
rgroup.long 0x18DC++0x03
line.long 0x00 "ITARGETSR55,Interrupt Processor Targets 55 Register"
rgroup.long 0x18E0++0x03
line.long 0x00 "ITARGETSR56,Interrupt Processor Targets 56 Register"
rgroup.long 0x18E4++0x03
line.long 0x00 "ITARGETSR57,Interrupt Processor Targets 57 Register"
rgroup.long 0x18E8++0x03
line.long 0x00 "ITARGETSR58,Interrupt Processor Targets 58 Register"
rgroup.long 0x18EC++0x03
line.long 0x00 "ITARGETSR59,Interrupt Processor Targets 59 Register"
rgroup.long 0x18F0++0x03
line.long 0x00 "ITARGETSR60,Interrupt Processor Targets 60 Register"
rgroup.long 0x18F4++0x03
line.long 0x00 "ITARGETSR61,Interrupt Processor Targets 61 Register"
rgroup.long 0x18F8++0x03
line.long 0x00 "ITARGETSR62,Interrupt Processor Targets 62 Register"
rgroup.long 0x18FC++0x03
line.long 0x00 "ITARGETSR63,Interrupt Processor Targets 63 Register"
rgroup.long 0x1900++0x03
line.long 0x00 "ITARGETSR64,Interrupt Processor Targets 64 Register"
rgroup.long 0x1904++0x03
line.long 0x00 "ITARGETSR65,Interrupt Processor Targets 65 Register"
rgroup.long 0x1908++0x03
line.long 0x00 "ITARGETSR66,Interrupt Processor Targets 66 Register"
rgroup.long 0x190C++0x03
line.long 0x00 "ITARGETSR67,Interrupt Processor Targets 67 Register"
rgroup.long 0x1910++0x03
line.long 0x00 "ITARGETSR68,Interrupt Processor Targets 68 Register"
rgroup.long 0x1914++0x03
line.long 0x00 "ITARGETSR69,Interrupt Processor Targets 69 Register"
rgroup.long 0x1918++0x03
line.long 0x00 "ITARGETSR70,Interrupt Processor Targets 70 Register"
rgroup.long 0x191C++0x03
line.long 0x00 "ITARGETSR71,Interrupt Processor Targets 71 Register"
rgroup.long 0x1920++0x03
line.long 0x00 "ITARGETSR72,Interrupt Processor Targets 72 Register"
rgroup.long 0x1924++0x03
line.long 0x00 "ITARGETSR73,Interrupt Processor Targets 73 Register"
rgroup.long 0x1928++0x03
line.long 0x00 "ITARGETSR74,Interrupt Processor Targets 74 Register"
rgroup.long 0x192C++0x03
line.long 0x00 "ITARGETSR75,Interrupt Processor Targets 75 Register"
rgroup.long 0x1930++0x03
line.long 0x00 "ITARGETSR76,Interrupt Processor Targets 76 Register"
rgroup.long 0x1934++0x03
line.long 0x00 "ITARGETSR77,Interrupt Processor Targets 77 Register"
rgroup.long 0x1938++0x03
line.long 0x00 "ITARGETSR78,Interrupt Processor Targets 78 Register"
rgroup.long 0x193C++0x03
line.long 0x00 "ITARGETSR79,Interrupt Processor Targets 79 Register"
rgroup.long 0x1940++0x03
line.long 0x00 "ITARGETSR80,Interrupt Processor Targets 80 Register"
rgroup.long 0x1944++0x03
line.long 0x00 "ITARGETSR81,Interrupt Processor Targets 81 Register"
rgroup.long 0x1948++0x03
line.long 0x00 "ITARGETSR82,Interrupt Processor Targets 82 Register"
rgroup.long 0x194C++0x03
line.long 0x00 "ITARGETSR83,Interrupt Processor Targets 83 Register"
rgroup.long 0x1950++0x03
line.long 0x00 "ITARGETSR84,Interrupt Processor Targets 84 Register"
rgroup.long 0x1954++0x03
line.long 0x00 "ITARGETSR85,Interrupt Processor Targets 85 Register"
rgroup.long 0x1958++0x03
line.long 0x00 "ITARGETSR86,Interrupt Processor Targets 86 Register"
rgroup.long 0x195C++0x03
line.long 0x00 "ITARGETSR87,Interrupt Processor Targets 87 Register"
rgroup.long 0x1960++0x03
line.long 0x00 "ITARGETSR88,Interrupt Processor Targets 88 Register"
rgroup.long 0x1964++0x03
line.long 0x00 "ITARGETSR89,Interrupt Processor Targets 89 Register"
rgroup.long 0x1968++0x03
line.long 0x00 "ITARGETSR90,Interrupt Processor Targets 90 Register"
rgroup.long 0x196C++0x03
line.long 0x00 "ITARGETSR91,Interrupt Processor Targets 91 Register"
rgroup.long 0x1970++0x03
line.long 0x00 "ITARGETSR92,Interrupt Processor Targets 92 Register"
rgroup.long 0x1974++0x03
line.long 0x00 "ITARGETSR93,Interrupt Processor Targets 93 Register"
rgroup.long 0x1978++0x03
line.long 0x00 "ITARGETSR94,Interrupt Processor Targets 94 Register"
rgroup.long 0x197C++0x03
line.long 0x00 "ITARGETSR95,Interrupt Processor Targets 95 Register"
rgroup.long 0x1980++0x03
line.long 0x00 "ITARGETSR96,Interrupt Processor Targets 96 Register"
rgroup.long 0x1984++0x03
line.long 0x00 "ITARGETSR97,Interrupt Processor Targets 97 Register"
rgroup.long 0x1988++0x03
line.long 0x00 "ITARGETSR98,Interrupt Processor Targets 98 Register"
rgroup.long 0x198C++0x03
line.long 0x00 "ITARGETSR99,Interrupt Processor Targets 99 Register"
rgroup.long 0x1990++0x03
line.long 0x00 "ITARGETSR100,Interrupt Processor Targets 100 Register"
rgroup.long 0x1994++0x03
line.long 0x00 "ITARGETSR101,Interrupt Processor Targets 101 Register"
rgroup.long 0x1998++0x03
line.long 0x00 "ITARGETSR102,Interrupt Processor Targets 102 Register"
rgroup.long 0x199C++0x03
line.long 0x00 "ITARGETSR103,Interrupt Processor Targets 103 Register"
rgroup.long 0x19A0++0x03
line.long 0x00 "ITARGETSR104,Interrupt Processor Targets 104 Register"
rgroup.long 0x19A4++0x03
line.long 0x00 "ITARGETSR105,Interrupt Processor Targets 105 Register"
rgroup.long 0x19A8++0x03
line.long 0x00 "ITARGETSR106,Interrupt Processor Targets 106 Register"
rgroup.long 0x19AC++0x03
line.long 0x00 "ITARGETSR107,Interrupt Processor Targets 107 Register"
rgroup.long 0x19B0++0x03
line.long 0x00 "ITARGETSR108,Interrupt Processor Targets 108 Register"
rgroup.long 0x19B4++0x03
line.long 0x00 "ITARGETSR109,Interrupt Processor Targets 109 Register"
rgroup.long 0x19B8++0x03
line.long 0x00 "ITARGETSR110,Interrupt Processor Targets 110 Register"
rgroup.long 0x19BC++0x03
line.long 0x00 "ITARGETSR111,Interrupt Processor Targets 111 Register"
rgroup.long 0x19C0++0x03
line.long 0x00 "ITARGETSR112,Interrupt Processor Targets 112 Register"
rgroup.long 0x19C4++0x03
line.long 0x00 "ITARGETSR113,Interrupt Processor Targets 113 Register"
rgroup.long 0x19C8++0x03
line.long 0x00 "ITARGETSR114,Interrupt Processor Targets 114 Register"
rgroup.long 0x19CC++0x03
line.long 0x00 "ITARGETSR115,Interrupt Processor Targets 115 Register"
rgroup.long 0x19D0++0x03
line.long 0x00 "ITARGETSR116,Interrupt Processor Targets 116 Register"
rgroup.long 0x19D4++0x03
line.long 0x00 "ITARGETSR117,Interrupt Processor Targets 117 Register"
rgroup.long 0x19D8++0x03
line.long 0x00 "ITARGETSR118,Interrupt Processor Targets 118 Register"
rgroup.long 0x19DC++0x03
line.long 0x00 "ITARGETSR119,Interrupt Processor Targets 119 Register"
rgroup.long 0x19E0++0x03
line.long 0x00 "ITARGETSR120,Interrupt Processor Targets 120 Register"
rgroup.long 0x19E4++0x03
line.long 0x00 "ITARGETSR121,Interrupt Processor Targets 121 Register"
rgroup.long 0x19E8++0x03
line.long 0x00 "ITARGETSR122,Interrupt Processor Targets 122 Register"
rgroup.long 0x19EC++0x03
line.long 0x00 "ITARGETSR123,Interrupt Processor Targets 123 Register"
rgroup.long 0x19F0++0x03
line.long 0x00 "ITARGETSR124,Interrupt Processor Targets 124 Register"
rgroup.long 0x19F4++0x03
line.long 0x00 "ITARGETSR125,Interrupt Processor Targets 125 Register"
rgroup.long 0x19F8++0x03
line.long 0x00 "ITARGETSR126,Interrupt Processor Targets 126 Register"
rgroup.long 0x19FC++0x03
line.long 0x00 "ITARGETSR127,Interrupt Processor Targets 127 Register"
rgroup.long 0x1C00++0x03
line.long 0x00 "ICFGR0,Interrupt Configuration 0 Register"
rgroup.long 0x1C04++0x03
line.long 0x00 "ICFGR1,Interrupt Configuration 1 Register"
rgroup.long 0x1C08++0x03
line.long 0x00 "ICFGR2,Interrupt Configuration 2 Register"
rgroup.long 0x1C0C++0x03
line.long 0x00 "ICFGR3,Interrupt Configuration 3 Register"
rgroup.long 0x1C10++0x03
line.long 0x00 "ICFGR4,Interrupt Configuration 4 Register"
rgroup.long 0x1C14++0x03
line.long 0x00 "ICFGR5,Interrupt Configuration 5 Register"
rgroup.long 0x1C18++0x03
line.long 0x00 "ICFGR6,Interrupt Configuration 6 Register"
rgroup.long 0x1C1C++0x03
line.long 0x00 "ICFGR7,Interrupt Configuration 7 Register"
rgroup.long 0x1C20++0x03
line.long 0x00 "ICFGR8,Interrupt Configuration 8 Register"
rgroup.long 0x1C24++0x03
line.long 0x00 "ICFGR9,Interrupt Configuration 9 Register"
rgroup.long 0x1C28++0x03
line.long 0x00 "ICFGR10,Interrupt Configuration 10 Register"
rgroup.long 0x1C2C++0x03
line.long 0x00 "ICFGR11,Interrupt Configuration 11 Register"
rgroup.long 0x1C30++0x03
line.long 0x00 "ICFGR12,Interrupt Configuration 12 Register"
rgroup.long 0x1C34++0x03
line.long 0x00 "ICFGR13,Interrupt Configuration 13 Register"
rgroup.long 0x1C38++0x03
line.long 0x00 "ICFGR14,Interrupt Configuration 14 Register"
rgroup.long 0x1C3C++0x03
line.long 0x00 "ICFGR15,Interrupt Configuration 15 Register"
rgroup.long 0x1C40++0x03
line.long 0x00 "ICFGR16,Interrupt Configuration 16 Register"
rgroup.long 0x1C44++0x03
line.long 0x00 "ICFGR17,Interrupt Configuration 17 Register"
rgroup.long 0x1C48++0x03
line.long 0x00 "ICFGR18,Interrupt Configuration 18 Register"
rgroup.long 0x1C4C++0x03
line.long 0x00 "ICFGR19,Interrupt Configuration 19 Register"
rgroup.long 0x1C50++0x03
line.long 0x00 "ICFGR20,Interrupt Configuration 20 Register"
rgroup.long 0x1C54++0x03
line.long 0x00 "ICFGR21,Interrupt Configuration 21 Register"
rgroup.long 0x1C58++0x03
line.long 0x00 "ICFGR22,Interrupt Configuration 22 Register"
rgroup.long 0x1C5C++0x03
line.long 0x00 "ICFGR23,Interrupt Configuration 23 Register"
rgroup.long 0x1C60++0x03
line.long 0x00 "ICFGR24,Interrupt Configuration 24 Register"
rgroup.long 0x1C64++0x03
line.long 0x00 "ICFGR25,Interrupt Configuration 25 Register"
rgroup.long 0x1C68++0x03
line.long 0x00 "ICFGR26,Interrupt Configuration 26 Register"
rgroup.long 0x1C6C++0x03
line.long 0x00 "ICFGR27,Interrupt Configuration 27 Register"
rgroup.long 0x1C70++0x03
line.long 0x00 "ICFGR28,Interrupt Configuration 28 Register"
rgroup.long 0x1C74++0x03
line.long 0x00 "ICFGR29,Interrupt Configuration 29 Register"
rgroup.long 0x1C78++0x03
line.long 0x00 "ICFGR30,Interrupt Configuration 30 Register"
rgroup.long 0x1C7C++0x03
line.long 0x00 "ICFGR31,Interrupt Configuration 31 Register"
rgroup.long 0x1D00++0x03
line.long 0x00 "PPISR,Private Peripheral Interrupt Status Register"
rgroup.long 0x1D04++0x03
line.long 0x00 "SPISR0,Private Peripheral Interrupt Status 0 Register"
rgroup.long 0x1D08++0x03
line.long 0x00 "SPISR1,Private Peripheral Interrupt Status 1 Register"
rgroup.long 0x1D0C++0x03
line.long 0x00 "SPISR2,Private Peripheral Interrupt Status 2 Register"
rgroup.long 0x1D10++0x03
line.long 0x00 "SPISR3,Private Peripheral Interrupt Status 3 Register"
rgroup.long 0x1D14++0x03
line.long 0x00 "SPISR4,Private Peripheral Interrupt Status 4 Register"
rgroup.long 0x1D18++0x03
line.long 0x00 "SPISR5,Private Peripheral Interrupt Status 5 Register"
rgroup.long 0x1D1C++0x03
line.long 0x00 "SPISR6,Private Peripheral Interrupt Status 6 Register"
rgroup.long 0x1D20++0x03
line.long 0x00 "SPISR7,Private Peripheral Interrupt Status 7 Register"
rgroup.long 0x1D24++0x03
line.long 0x00 "SPISR8,Private Peripheral Interrupt Status 8 Register"
rgroup.long 0x1D28++0x03
line.long 0x00 "SPISR9,Private Peripheral Interrupt Status 9 Register"
rgroup.long 0x1D2C++0x03
line.long 0x00 "SPISR10,Private Peripheral Interrupt Status 10 Register"
rgroup.long 0x1D30++0x03
line.long 0x00 "SPISR11,Private Peripheral Interrupt Status 11 Register"
rgroup.long 0x1D34++0x03
line.long 0x00 "SPISR12,Private Peripheral Interrupt Status 12 Register"
rgroup.long 0x1D38++0x03
line.long 0x00 "SPISR13,Private Peripheral Interrupt Status 13 Register"
rgroup.long 0x1D3C++0x03
line.long 0x00 "SPISR14,Private Peripheral Interrupt Status 14 Register"
group.long 0x1F00++0x03
line.long 0x00 "SGIR,Software Generated Interrupt Register"
group.long 0x1F10++0x03
line.long 0x00 "CPENDSGIR0,SGI Clear-Pending 0 Register"
group.long 0x1F14++0x03
line.long 0x00 "CPENDSGIR1,SGI Clear-Pending 1 Register"
group.long 0x1F18++0x03
line.long 0x00 "CPENDSGIR2,SGI Clear-Pending 2 Register"
group.long 0x1F1C++0x03
line.long 0x00 "CPENDSGIR3,SGI Clear-Pending 3 Register"
group.long 0x1F20++0x03
line.long 0x00 "SPENDSGIR0,SGI Set-Pending 0 Register"
group.long 0x1F24++0x03
line.long 0x00 "SPENDSGIR1,SGI Set-Pending 1 Register"
group.long 0x1F28++0x03
line.long 0x00 "SPENDSGIR2,SGI Set-Pending 2 Register"
group.long 0x1F2C++0x03
line.long 0x00 "SPENDSGIR3,SGI Set-Pending 3 Register"
rgroup.long 0x1FE0++0x03
line.long 0x00 "PIDR0,Peripheral ID0 Register"
rgroup.long 0x1FE4++0x03
line.long 0x00 "PIDR1,Peripheral ID1 Register"
rgroup.long 0x1FE8++0x03
line.long 0x00 "PIDR2,Peripheral ID2 Register"
rgroup.long 0x1FEC++0x03
line.long 0x00 "PIDR3,Peripheral ID3 Register"
rgroup.long 0x1FF0++0x03
line.long 0x00 "PIDR4,Peripheral ID4 Register"
rgroup.long 0x1FD0++0x03
line.long 0x00 "PIDR5,Peripheral ID5 Register"
rgroup.long 0x1FD4++0x03
line.long 0x00 "PIDR6,Peripheral ID6 Register"
rgroup.long 0x1FD8++0x03
line.long 0x00 "PIDR7,Peripheral ID7 Register"
rgroup.long 0x1FF0++0x03
line.long 0x00 "CIDR0,Component ID0 Register"
rgroup.long 0x1FF4++0x03
line.long 0x00 "CIDR1,Component ID1 Register"
rgroup.long 0x1FF8++0x03
line.long 0x00 "CIDR2,Component ID2 Register"
rgroup.long 0x1FFC++0x03
line.long 0x00 "CIDR3,Component ID3 Register"
textline "              "
group.long 0x2000++0x0B
line.long 0x00 "CTLR,Interface Control Register"
line.long 0x04 "PMR,Interrupt Priority Mask Register"
line.long 0x08 "BPR,Binary Point Register"
rgroup.long 0x200C++0x03
line.long 0x00 "IAR,Interrupt Acknowledge Register"
group.long 0x2010++0x03
line.long 0x00 "EOIR,End Of Interrupt Register"
rgroup.long 0x2014++0x07
line.long 0x00 "RPR,Running Priority Register"
line.long 0x04 "HPPIR,Highest Priority Pending Interrupt Register"
group.long 0x201C++0x03
line.long 0x00 "ABPR,Aliased Binary Point Register"
rgroup.long 0x2020++0x03
line.long 0x00 "AIAR,Aliased Interrupt Acknowledge Register"
group.long 0x2024++0x03
line.long 0x00 "AEOIR,Aliased End of Interrupt Register"
rgroup.long 0x2028++0x03
line.long 0x00 "AHPPIR,Aliased Highest Priority Pending Interrupt Register"
group.long 0x20D0++0x03
line.long 0x00 "APR0,Active Priority Register"
group.long 0x20E0++0x03
line.long 0x00 "NSAPR0,Non-Secure Active Priority Register"
rgroup.long 0x20FC++0x03
line.long 0x00 "IIDR,CPU Interface Identification Register"
group.long 0x3000++0x03
line.long 0x00 "DIR,Deactivate Interrupt Register"
width 0x0B
tree.end
tree "MIXER"
base ad:0x0290BB00
width 16.
tree "AXBAR"
tree "RX1"
group.long (0x0+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x0+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x0+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x0+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX2"
group.long (0x40+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x40+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x40+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x40+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX3"
group.long (0x80+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x80+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x80+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x80+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX4"
group.long (0xC0+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0xC0+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0xC0+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0xC0+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX5"
group.long (0x100+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x100+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x100+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x100+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX6"
group.long (0x140+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x140+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x140+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x140+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX7"
group.long (0x180+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x180+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x180+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x180+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX8"
group.long (0x1C0+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x1C0+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x1C0+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x1C0+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX9"
group.long (0x200+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x200+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x200+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x200+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "RX10"
group.long (0x240+0x04)++0x03
line.long 0x00 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x00 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x240+0x10)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 8. " CONFIG_BUSY          ,Config busy" "Not busy,Busy"
bitfld.long 0x00 1. "       ACIF_FIFO_FULL   ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 0. "  ACIF_FIFO_EMPTY  ,ACIF FIFO empty" "Not empty,Empty"
group.long (0x240+0x24)++0x0B
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS  ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV      ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV        ,Mono conv" "Zero,Copy"
line.long 0x04 "CTRL,Control Register"
bitfld.long 0x04 24. " SAMPLE_COUNTER_RESET ,Sample counter reset" "No reset,Reset"
bitfld.long 0x04 16.--20. "       ACT_THRESHOLD    ,ACT threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x04 0.--15. 1. "        DEACT_THRESHOLD  ,DEACT threshold"
line.long 0x08 "PEAK_CTRL,Peak Control Register"
bitfld.long 0x08 31. " PEAK_TYPE            ,Peak type" "Window based,Reset on read"
hexmask.long 0x08 0.--30. 1. "  PEAK_WIN         ,Peak win"
rgroup.long (0x240+0x30)++0x03
line.long 0x00 "SAMPLE_COUNT,Sample Count Register"
tree.end
tree "TX1"
group.long (0x0+0x280)++0x07
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x0+0x290)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 1. "       ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "    ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
group.long (0x0+0x294)++0x07
line.long 0x00 "INT_STATUS,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR      ,TX done" "Clear,Set"
line.long 0x04 "INT_MASK,Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE              ,TX done" "Unmasked,Masked"
group.long (0x0+0x2A4)++0x07
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS    ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "           AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV          ,Mono conv" "Zero,Copy"
line.long 0x04 "ADDER_CONFIG,Adder Configuration Register"
bitfld.long 0x04 9. " RX10_INPUT_ENABLE    ,RX10 input enable" "Disabled,Enabled"
bitfld.long 0x04 8. "       RX9_INPUT_ENABLE   ,RX9 input enable" "Disabled,Enabled"
bitfld.long 0x04 7. "     RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 6. " RX7_INPUT_ENABLE     ,RX7 input enable" "Disabled,Enabled"
bitfld.long 0x04 5. "       RX6_INPUT_ENABLE   ,RX6 input enable" "Disabled,Enabled"
bitfld.long 0x04 4. "     RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 3. " RX4_INPUT_ENABLE     ,RX4 input enable" "Disabled,Enabled"
bitfld.long 0x04 2. "       RX3_INPUT_ENABLE   ,RX3 input enable" "Disabled,Enabled"
bitfld.long 0x04 1. "     RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 0. " RX1_INPUT_ENABLE     ,RX1 input enable" "Disabled,Enabled"
tree.end
tree "TX2"
group.long (0x40+0x280)++0x07
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x40+0x290)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 1. "       ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "    ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
group.long (0x40+0x294)++0x07
line.long 0x00 "INT_STATUS,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR      ,TX done" "Clear,Set"
line.long 0x04 "INT_MASK,Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE              ,TX done" "Unmasked,Masked"
group.long (0x40+0x2A4)++0x07
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS    ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "           AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV          ,Mono conv" "Zero,Copy"
line.long 0x04 "ADDER_CONFIG,Adder Configuration Register"
bitfld.long 0x04 9. " RX10_INPUT_ENABLE    ,RX10 input enable" "Disabled,Enabled"
bitfld.long 0x04 8. "       RX9_INPUT_ENABLE   ,RX9 input enable" "Disabled,Enabled"
bitfld.long 0x04 7. "     RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 6. " RX7_INPUT_ENABLE     ,RX7 input enable" "Disabled,Enabled"
bitfld.long 0x04 5. "       RX6_INPUT_ENABLE   ,RX6 input enable" "Disabled,Enabled"
bitfld.long 0x04 4. "     RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 3. " RX4_INPUT_ENABLE     ,RX4 input enable" "Disabled,Enabled"
bitfld.long 0x04 2. "       RX3_INPUT_ENABLE   ,RX3 input enable" "Disabled,Enabled"
bitfld.long 0x04 1. "     RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 0. " RX1_INPUT_ENABLE     ,RX1 input enable" "Disabled,Enabled"
tree.end
tree "TX3"
group.long (0x80+0x280)++0x07
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x80+0x290)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 1. "       ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "    ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
group.long (0x80+0x294)++0x07
line.long 0x00 "INT_STATUS,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR      ,TX done" "Clear,Set"
line.long 0x04 "INT_MASK,Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE              ,TX done" "Unmasked,Masked"
group.long (0x80+0x2A4)++0x07
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS    ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "           AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV          ,Mono conv" "Zero,Copy"
line.long 0x04 "ADDER_CONFIG,Adder Configuration Register"
bitfld.long 0x04 9. " RX10_INPUT_ENABLE    ,RX10 input enable" "Disabled,Enabled"
bitfld.long 0x04 8. "       RX9_INPUT_ENABLE   ,RX9 input enable" "Disabled,Enabled"
bitfld.long 0x04 7. "     RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 6. " RX7_INPUT_ENABLE     ,RX7 input enable" "Disabled,Enabled"
bitfld.long 0x04 5. "       RX6_INPUT_ENABLE   ,RX6 input enable" "Disabled,Enabled"
bitfld.long 0x04 4. "     RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 3. " RX4_INPUT_ENABLE     ,RX4 input enable" "Disabled,Enabled"
bitfld.long 0x04 2. "       RX3_INPUT_ENABLE   ,RX3 input enable" "Disabled,Enabled"
bitfld.long 0x04 1. "     RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 0. " RX1_INPUT_ENABLE     ,RX1 input enable" "Disabled,Enabled"
tree.end
tree "TX4"
group.long (0xC0+0x280)++0x07
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0xC0+0x290)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 1. "       ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "    ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
group.long (0xC0+0x294)++0x07
line.long 0x00 "INT_STATUS,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR      ,TX done" "Clear,Set"
line.long 0x04 "INT_MASK,Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE              ,TX done" "Unmasked,Masked"
group.long (0xC0+0x2A4)++0x07
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS    ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "           AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV          ,Mono conv" "Zero,Copy"
line.long 0x04 "ADDER_CONFIG,Adder Configuration Register"
bitfld.long 0x04 9. " RX10_INPUT_ENABLE    ,RX10 input enable" "Disabled,Enabled"
bitfld.long 0x04 8. "       RX9_INPUT_ENABLE   ,RX9 input enable" "Disabled,Enabled"
bitfld.long 0x04 7. "     RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 6. " RX7_INPUT_ENABLE     ,RX7 input enable" "Disabled,Enabled"
bitfld.long 0x04 5. "       RX6_INPUT_ENABLE   ,RX6 input enable" "Disabled,Enabled"
bitfld.long 0x04 4. "     RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 3. " RX4_INPUT_ENABLE     ,RX4 input enable" "Disabled,Enabled"
bitfld.long 0x04 2. "       RX3_INPUT_ENABLE   ,RX3 input enable" "Disabled,Enabled"
bitfld.long 0x04 1. "     RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 0. " RX1_INPUT_ENABLE     ,RX1 input enable" "Disabled,Enabled"
tree.end
tree "TX5"
group.long (0x100+0x280)++0x07
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
rgroup.long (0x100+0x290)++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_FULL       ,ACIF FIFO full" "Not full,Full"
bitfld.long 0x00 1. "       ACIF_FIFO_EMPTY    ,ACIF FIFO empty" "Not empty,Empty"
bitfld.long 0x00 0. "    ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
group.long (0x100+0x294)++0x07
line.long 0x00 "INT_STATUS,Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TX_DONE_SET/CLR      ,TX done" "Clear,Set"
line.long 0x04 "INT_MASK,Interrupt Mask Register"
bitfld.long 0x04 0. " TX_DONE              ,TX done" "Unmasked,Masked"
group.long (0x100+0x2A4)++0x07
line.long 0x00 "CIF_CTRL,CIF Control Register"
sif cpuis("TEGRAX2")
rbitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
else
bitfld.long 0x00 24.--29. " FIFO_THRESHOLD       ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                         "
endif
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             CLIENT_CHANNELS    ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "           AXBAR_BITS       ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
else
bitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
textline "                         "
endif
bitfld.long 0x00 6.--7. " EXPAND               ,Expand" "Zero,One,LFSR,?..."
bitfld.long 0x00 4.--5. "           STEREO_CONV        ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
textline "                         "
endif
bitfld.long 0x00 1. " TRUNCATE             ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "          MONO_CONV          ,Mono conv" "Zero,Copy"
line.long 0x04 "ADDER_CONFIG,Adder Configuration Register"
bitfld.long 0x04 9. " RX10_INPUT_ENABLE    ,RX10 input enable" "Disabled,Enabled"
bitfld.long 0x04 8. "       RX9_INPUT_ENABLE   ,RX9 input enable" "Disabled,Enabled"
bitfld.long 0x04 7. "     RX8_INPUT_ENABLE ,RX8 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 6. " RX7_INPUT_ENABLE     ,RX7 input enable" "Disabled,Enabled"
bitfld.long 0x04 5. "       RX6_INPUT_ENABLE   ,RX6 input enable" "Disabled,Enabled"
bitfld.long 0x04 4. "     RX5_INPUT_ENABLE ,RX5 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 3. " RX4_INPUT_ENABLE     ,RX4 input enable" "Disabled,Enabled"
bitfld.long 0x04 2. "       RX3_INPUT_ENABLE   ,RX3 input enable" "Disabled,Enabled"
bitfld.long 0x04 1. "     RX2_INPUT_ENABLE ,RX2 input enable" "Disabled,Enabled"
textline "                         "
bitfld.long 0x04 0. " RX1_INPUT_ENABLE     ,RX1 input enable" "Disabled,Enabled"
tree.end
tree.end
textline "                         "
group.long 0x400++0x0B
line.long 0x00 "ENABLE,Enable Register"
bitfld.long 0x00 0. " ENABLE               ,MIXER global enable bit" "Disabled,Enabled"
line.long 0x04 "SOFT_RESET,Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "No reset,Reset"
line.long 0x08 "CG,Clock Gating Register"
bitfld.long 0x08 0. " SLCG_EN              ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x410++0x07
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 1. " SLCG_CLKEN           ,SLCG_CLKEN" "False,True"
bitfld.long 0x00 0. "            ENABLE_STATUS    ,Enable status" "Disabled,Enabled"
line.long 0x04 "INT_STATUS,Interrupt Status Register"
bitfld.long 0x04 20. " TX5_DONE             ,TX5 done" "Cleared,Set"
bitfld.long 0x04 19. "          TX4_DONE         ,TX4 done" "Cleared,Set"
bitfld.long 0x04 18. "     TX3_DONE         ,TX3 done" "Cleared,Set"
textline "                         "
bitfld.long 0x04 17. " TX2_DONE             ,TX2 done" "Cleared,Set"
bitfld.long 0x04 16. "          TX1_DONE         ,TX1 done" "Cleared,Set"
bitfld.long 0x04 0. "     MIXER_TX_DONE    ,Mixer TX done" "Cleared,Set"
textline "                         "
width 35.
group.long 0x42C++0x0F
line.long 0x00 "AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL,AHUB RAM CTL Gain Config RAM Control Register"
rbitfld.long 0x00 31. " READ_BUSY            ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "           SEQ_READ_COUNT   ,Sequential read count"
bitfld.long 0x00 14. "        RW               ,Read/write" "Read,Write"
textline "                                            "
bitfld.long 0x00 13. " ADDR_INIT_EN         ,Address initial enabled" "Disabled,Enabled"
bitfld.long 0x00 12. "       SEQ_ACCESS_EN    ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "  RAM_ADDR         ,RAM address"
line.long 0x04 "AHUBRAMCTL_GAIN_CONFIG_RAM_DATA,AHUB RAM CTL Gain Config RAM Data Register"
line.long 0x08 "AHUBRAMCTL_PEAKM_RAM_CTRL,AHUB RAM CTL Peak Metering RAM Control Register"
rbitfld.long 0x08 31. " READ_BUSY            ,Read busy" "Done,Busy"
hexmask.long.byte 0x08 16.--23. 1. "           SEQ_READ_COUNT   ,Sequential read count"
bitfld.long 0x08 14. "        RW               ,Read/write" "Read,Write"
textline "                                            "
bitfld.long 0x08 13. " ADDR_INIT_EN         ,Address initial enabled" "Disabled,Enabled"
bitfld.long 0x08 12. "       SEQ_ACCESS_EN    ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x08 0.--8. 0x01 "  RAM_ADDR         ,RAM address"
line.long 0x0C "AHUBRAMCTL_PEAKM_RAM_DATA,AHUB RAM CTL Peak Metering RAM DATA Register"
width 0x0B
tree.end
tree "MBDRC"
base ad:0x02908200
width 25.
group.long 0x08++0x03
line.long 0x00 "CG,CG Register"
bitfld.long 0x00 0. " SLCG_EN         ,Second level clock gating enable" "Disabled,Enabled"
rgroup.long 0x0C++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 0. " SLCG_CLKEN      ,Second level clock gating clock enable" "Disabled,Enabled"
group.long 0x28++0x0F
line.long 0x00 "CONFIG,Config Register"
hexmask.long.word 0x00 16.--24. 0x01 " RMS_OFFSET      ,RMS offset"
bitfld.long 0x00 15. "           BIAS_UNBIAS    ,Round to plus infinity" "Bias,Unbias"
bitfld.long 0x00 14. "      PEAK_RMS       ,Mode select for peak detection in SideChain" "RMS,PEAK"
textline "                                  "
bitfld.long 0x00 13. " FILTER_STRUC    ,Structure for BiQuad stages" "ALL pass tree,Flex"
bitfld.long 0x00 8.--12. "  SHIFT_CTRL     ,Shift control for each BiQuad stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4.--7. "          FRAME_SIZE     ,Number of samples per frame" "1,2,4,8,16,32,64,?..."
textline "                                  "
bitfld.long 0x00 0.--1. " MBDRC_MODE      ,MBDRC mode of operation filtering" "Bypass,Fullband,Dualband,Multiband"
line.long 0x04 "CHAN_MASK,Channel Mask Register"
bitfld.long 0x04 7. " CHAN_MASK_EN[7] ,Perform DRC on that channel 7" "Not masked,Masked"
bitfld.long 0x04 6. "     [6]            ,Perform DRC on channel 6" "Not masked,Masked"
bitfld.long 0x04 5. "  [5]            ,Perform DRC on channel 5" "Not masked,Masked"
bitfld.long 0x04 4. "       [4] ,Perform DRC on channel 4" "Not masked,Masked"
textline "                                  "
bitfld.long 0x04 3. "             [3] ,Perform DRC on channel 3" "Not masked,Masked"
bitfld.long 0x04 2. "     [2]            ,Perform DRC on channel 2" "Not masked,Masked"
bitfld.long 0x04 1. "  [1]            ,Perform DRC on channel 1" "Not masked,Masked"
bitfld.long 0x04 0. "       [0] ,Perform DRC on channel 0" "Not masked,Masked"
line.long 0x08 "MASTER_VOLUME,Feedback Of Volume Control To MBDRC"
line.long 0x0C "FAST_FACTOR,Fast Factor Register"
hexmask.long.word 0x0C 16.--31. 1. " FR_FACTOR       ,Fast release gain smoothing"
hexmask.long.word 0x0C 0.--15. 1. "           FA_FACTOR      ,Fast attack gain smoothing"
group.long 0x38++0x03
line.long 0x00 "IIR_CONFIG_1,IIR CONFIG 1 Register"
bitfld.long 0x00 0.--3. " NUM_STAGES      ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x3C++0x03
line.long 0x00 "IIR_CONFIG_2,IIR CONFIG 2 Register"
bitfld.long 0x00 0.--3. " NUM_STAGES      ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x40++0x03
line.long 0x00 "IIR_CONFIG_3,IIR CONFIG 3 Register"
bitfld.long 0x00 0.--3. " NUM_STAGES      ,Number of stages" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x44++0x03
line.long 0x00 "INATTACK_1,Attack Time Constant Register"
group.long 0x48++0x03
line.long 0x00 "INATTACK_2,Attack Time Constant Register"
group.long 0x4C++0x03
line.long 0x00 "INATTACK_3,Attack Time Constant Register"
group.long 0x50++0x03
line.long 0x00 "INRELEASE_1,Release Time Constant Register"
group.long 0x54++0x03
line.long 0x00 "INRELEASE_2,Release Time Constant Register"
group.long 0x58++0x03
line.long 0x00 "INRELEASE_3,Release Time Constant Register"
group.long 0x5C++0x03
line.long 0x00 "FASTATTACK_1,Fast Attack Time Constant Register"
group.long 0x60++0x03
line.long 0x00 "FASTATTACK_2,Fast Attack Time Constant Register"
group.long 0x64++0x03
line.long 0x00 "FASTATTACK_3,Fast Attack Time Constant Register"
group.long 0x68++0x03
line.long 0x00 "IN_THRESH_1,IN Threshold 1 Register"
hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH   ,Fourth Knee for the 5 gain segments which is close to 0 dB"
hexmask.long.byte 0x00 16.--23. 1. "             IN_THRESH_3RD  ,Third knee for the 5 gain segments"
hexmask.long.byte 0x00 8.--15. 1. "          IN_THRESH_2ND  ,Second knee for the 5 gain segments"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST   ,First Knee for the 5 gain segments which is close to -127.5 dB"
group.long 0x6C++0x03
line.long 0x00 "IN_THRESH_2,IN Threshold 2 Register"
hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH   ,Fourth Knee for the 5 gain segments which is close to 0 dB"
hexmask.long.byte 0x00 16.--23. 1. "             IN_THRESH_3RD  ,Third knee for the 5 gain segments"
hexmask.long.byte 0x00 8.--15. 1. "          IN_THRESH_2ND  ,Second knee for the 5 gain segments"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST   ,First Knee for the 5 gain segments which is close to -127.5 dB"
group.long 0x70++0x03
line.long 0x00 "IN_THRESH_3,IN Threshold 3 Register"
hexmask.long.byte 0x00 24.--31. 1. " IN_THRESH_4TH   ,Fourth Knee for the 5 gain segments which is close to 0 dB"
hexmask.long.byte 0x00 16.--23. 1. "             IN_THRESH_3RD  ,Third knee for the 5 gain segments"
hexmask.long.byte 0x00 8.--15. 1. "          IN_THRESH_2ND  ,Second knee for the 5 gain segments"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " IN_THRESH_1ST   ,First Knee for the 5 gain segments which is close to -127.5 dB"
group.long 0x74++0x03
line.long 0x00 "OUT_THRESH_1,OUT Threshold 1 Register"
hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH  ,Fourth output point corresponding to IN_THRESH_4TH"
hexmask.long.byte 0x00 16.--23. 1. "             OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD"
hexmask.long.byte 0x00 8.--15. 1. "          OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST  ,First output point corresponding to IN_THRESH_1ST"
group.long 0x78++0x03
line.long 0x00 "OUT_THRESH_2,OUT Threshold 2 Register"
hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH  ,Fourth output point corresponding to IN_THRESH_4TH"
hexmask.long.byte 0x00 16.--23. 1. "             OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD"
hexmask.long.byte 0x00 8.--15. 1. "          OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST  ,First output point corresponding to IN_THRESH_1ST"
group.long 0x7C++0x03
line.long 0x00 "OUT_THRESH_3,OUT Threshold 3 Register"
hexmask.long.byte 0x00 24.--31. 1. " OUT_THRESH_4TH  ,Fourth output point corresponding to IN_THRESH_4TH"
hexmask.long.byte 0x00 16.--23. 1. "             OUT_THRESH_3RD ,Third output point corresponding to IN_THRESH_3RD"
hexmask.long.byte 0x00 8.--15. 1. "          OUT_THRESH_2ND ,Second output point corresponding to IN_THRESH_2ND"
textline "                                  "
hexmask.long.byte 0x00 0.--7. 1. " OUT_THRESH_1ST  ,First output point corresponding to IN_THRESH_1ST"
group.long 0x80++0x03
line.long 0x00 "RATIO_1ST_1,Ratio First 1 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST       ,Output to input ratio for first gain segment which is close to -127.5 dB"
group.long 0x84++0x03
line.long 0x00 "RATIO_1ST_2,Ratio First 2 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST       ,Output to input ratio for first gain segment which is close to -127.5 dB"
group.long 0x88++0x03
line.long 0x00 "RATIO_1ST_3,Ratio First 3 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_1ST       ,Output to input ratio for first gain segment which is close to -127.5 dB"
group.long 0x8C++0x03
line.long 0x00 "RATIO_2ND_1,Ratio Second 1 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND       ,Output to input ratio for second gain segment"
group.long 0x90++0x03
line.long 0x00 "RATIO_2ND_2,Ratio Second 2 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND       ,Output to input ratio for second gain segment"
group.long 0x94++0x03
line.long 0x00 "RATIO_2ND_3,Ratio Second 3 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_2ND       ,Output to input ratio for second gain segment"
group.long 0x98++0x03
line.long 0x00 "RATIO_3RD_1,Ratio Third 1 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD       ,Output to input ratio for third gain segment"
group.long 0x9C++0x03
line.long 0x00 "RATIO_3RD_2,Ratio Third 2 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD       ,Output to input ratio for third gain segment"
group.long 0xA0++0x03
line.long 0x00 "RATIO_3RD_3,Ratio Third 3 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_3RD       ,Output to input ratio for third gain segment"
group.long 0xA4++0x03
line.long 0x00 "RATIO_4TH_1,Ratio Fourth 1 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH       ,Output to input ratio for fourth gain segment"
group.long 0xA8++0x03
line.long 0x00 "RATIO_4TH_2,Ratio Fourth 2 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH       ,Output to input ratio for fourth gain segment"
group.long 0xAC++0x03
line.long 0x00 "RATIO_4TH_3,Ratio Fourth 3 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_4TH       ,Output to input ratio for fourth gain segment"
group.long 0xB0++0x03
line.long 0x00 "RATIO_5TH_1,Ratio Fifth 1 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH       ,Output to input ratio for fifth gain segment which is close to 0 dB"
group.long 0xB4++0x03
line.long 0x00 "RATIO_5TH_2,Ratio Fifth 2 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH       ,Output to input ratio for fifth gain segment which is close to 0 dB"
group.long 0xB8++0x03
line.long 0x00 "RATIO_5TH_3,Ratio Fifth 3 Register"
hexmask.long.word 0x00 0.--15. 1. " RATIO_5TH       ,Output to input ratio for fifth gain segment which is close to 0 dB"
group.long 0xBC++0x03
line.long 0x00 "MAKEUP_GAIN_1,Makeup Gain 1 Register"
bitfld.long 0x00 0.--5. " MAKEUP_GAIN     ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC0++0x03
line.long 0x00 "MAKEUP_GAIN_2,Makeup Gain 2 Register"
bitfld.long 0x00 0.--5. " MAKEUP_GAIN     ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC4++0x03
line.long 0x00 "MAKEUP_GAIN_3,Makeup Gain 3 Register"
bitfld.long 0x00 0.--5. " MAKEUP_GAIN     ,Makeup gain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC8++0x03
line.long 0x00 "INITGAIN_1,Initial Gain Register"
group.long 0xCC++0x03
line.long 0x00 "INITGAIN_2,Initial Gain Register"
group.long 0xD0++0x03
line.long 0x00 "INITGAIN_3,Initial Gain Register"
group.long 0xD4++0x03
line.long 0x00 "GAINATTACK_1,Attack Time Constant 1 Register"
group.long 0xD8++0x03
line.long 0x00 "GAINATTACK_2,Attack Time Constant 2 Register"
group.long 0xDC++0x03
line.long 0x00 "GAINATTACK_3,Attack Time Constant 3 Register"
group.long 0xE0++0x03
line.long 0x00 "GAINRELEASE_1,Release Time Constant 1 Register"
group.long 0xE4++0x03
line.long 0x00 "GAINRELEASE_2,Release Time Constant 2 Register"
group.long 0xE8++0x03
line.long 0x00 "GAINRELEASE_3,Release Time Constant 3 Register"
group.long 0xEC++0x03
line.long 0x00 "FASTRELEASE_1,Fast Release Time Constant 1 Register"
group.long 0xF0++0x03
line.long 0x00 "FASTRELEASE_2,Fast Release Time Constant 2 Register"
group.long 0xF4++0x03
line.long 0x00 "FASTRELEASE_3,Fast Release Time Constant 3 Register"
group.long 0xF8++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_1,AHUB RAM CTL MBDRC Control 1 Register"
rbitfld.long 0x00 31. " READ_BUSY       ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "           SEQ_READ_COUNT ,Sequential read count"
bitfld.long 0x00 14. "          RW             ,Read/write" "Read,Write"
textline "                                  "
bitfld.long 0x00 13. " ADDR_INIT_EN    ,Address initial enabled" "Disabled,Enabled"
bitfld.long 0x00 12. "       SEQ_ACCESS_EN  ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "    RAM_ADDR       ,RAM address"
group.long 0xFC++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_2,AHUB RAM CTL MBDRC Control 2 Register"
rbitfld.long 0x00 31. " READ_BUSY       ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "           SEQ_READ_COUNT ,Sequential read count"
bitfld.long 0x00 14. "          RW             ,Read/write" "Read,Write"
textline "                                  "
bitfld.long 0x00 13. " ADDR_INIT_EN    ,Address initial enabled" "Disabled,Enabled"
bitfld.long 0x00 12. "       SEQ_ACCESS_EN  ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "    RAM_ADDR       ,RAM address"
group.long 0x100++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_CTRL_3,AHUB RAM CTL MBDRC Control 3 Register"
rbitfld.long 0x00 31. " READ_BUSY       ,Read busy" "Done,Busy"
hexmask.long.byte 0x00 16.--23. 1. "           SEQ_READ_COUNT ,Sequential read count"
bitfld.long 0x00 14. "          RW             ,Read/write" "Read,Write"
textline "                                  "
bitfld.long 0x00 13. " ADDR_INIT_EN    ,Address initial enabled" "Disabled,Enabled"
bitfld.long 0x00 12. "       SEQ_ACCESS_EN  ,Sequential access enabled" "Disabled,Enabled"
hexmask.long.word 0x00 0.--8. 0x01 "    RAM_ADDR       ,RAM address"
group.long 0x104++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_1,AHUB RAM CTL MBDRC Data 1 Register"
group.long 0x108++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_2,AHUB RAM CTL MBDRC Data 2 Register"
group.long 0x10C++0x03
line.long 0x00 "AHUBRAMCTL_MBDRC_DATA_3,AHUB RAM CTL MBDRC Data 3 Register"
width 0x0B
tree.end
tree "ADSP Peripheral"
base ad:0x00000000
width 13.
group.long 0x100++0x0B
line.long 0x00 "ICCICR,CPU Interface Control Register"
line.long 0x04 "ICCPMR,Interrupt Priority Mask Register"
line.long 0x08 "ICCBPR,Binary Point Register"
rgroup.long 0x10C++0x03
line.long 0x00 "ICCIAR,Interrupt Acknowledge Register"
group.long 0x110++0x03
line.long 0x00 "ICCEOIR,End Of Interrupt Register"
rgroup.long 0x114++0x07
line.long 0x00 "ICCRPR,Running Priority Register"
line.long 0x04 "ICCHPPIR,Highest Priority Pending Interrupt Register"
group.long 0x11C++0x03
line.long 0x00 "ICCABPR,Aliased Binary Point Register"
rgroup.long 0x1FC++0x03
line.long 0x00 "ICCIDR,CPU Interface Implementer Identification Register"
group.long 0x1000++0x03 "DISTRIBUTOR"
line.long 0x00 "ICDDCR,Distributor Control Register"
rgroup.long 0x1004++0x07
line.long 0x00 "ICDICTR,Interrupt Controller Type Register"
line.long 0x04 "ICDIIDR,Distributor Implementer Identification Register"
group.long 0x1080++0x03
line.long 0x00 "ICDISR0,Interrupt Group 0 Register"
group.long 0x1084++0x03
line.long 0x00 "ICDISR1,Interrupt Group 1 Register"
group.long 0x1088++0x03
line.long 0x00 "ICDISR2,Interrupt Group 2 Register"
group.long 0x108C++0x03
line.long 0x00 "ICDISR3,Interrupt Group 3 Register"
group.long 0x1090++0x03
line.long 0x00 "ICDISR4,Interrupt Group 4 Register"
group.long 0x1094++0x03
line.long 0x00 "ICDISR5,Interrupt Group 5 Register"
group.long 0x1098++0x03
line.long 0x00 "ICDISR6,Interrupt Group 6 Register"
group.long 0x109C++0x03
line.long 0x00 "ICDISR7,Interrupt Group 7 Register"
group.long 0x1100++0x03
line.long 0x00 "ICDISER0,Interrupt Set-Enable 0 Register"
group.long 0x1104++0x03
line.long 0x00 "ICDISER1,Interrupt Set-Enable 1 Register"
group.long 0x1108++0x03
line.long 0x00 "ICDISER2,Interrupt Set-Enable 2 Register"
group.long 0x110C++0x03
line.long 0x00 "ICDISER3,Interrupt Set-Enable 3 Register"
group.long 0x1110++0x03
line.long 0x00 "ICDISER4,Interrupt Set-Enable 4 Register"
group.long 0x1114++0x03
line.long 0x00 "ICDISER5,Interrupt Set-Enable 5 Register"
group.long 0x1118++0x03
line.long 0x00 "ICDISER6,Interrupt Set-Enable 6 Register"
group.long 0x111C++0x03
line.long 0x00 "ICDISER7,Interrupt Set-Enable 7 Register"
group.long 0x1180++0x03
line.long 0x00 "ICDICER0,Interrupt Clear-Enable 0 Register"
group.long 0x1184++0x03
line.long 0x00 "ICDICER1,Interrupt Clear-Enable 1 Register"
group.long 0x1188++0x03
line.long 0x00 "ICDICER2,Interrupt Clear-Enable 2 Register"
group.long 0x118C++0x03
line.long 0x00 "ICDICER3,Interrupt Clear-Enable 3 Register"
group.long 0x1190++0x03
line.long 0x00 "ICDICER4,Interrupt Clear-Enable 4 Register"
group.long 0x1194++0x03
line.long 0x00 "ICDICER5,Interrupt Clear-Enable 5 Register"
group.long 0x1198++0x03
line.long 0x00 "ICDICER6,Interrupt Clear-Enable 6 Register"
group.long 0x119C++0x03
line.long 0x00 "ICDICER7,Interrupt Clear-Enable 7 Register"
group.long 0x1200++0x03
line.long 0x00 "ICDISPR0,Interrupt Set-Pending 0 Register"
group.long 0x1204++0x03
line.long 0x00 "ICDISPR1,Interrupt Set-Pending 1 Register"
group.long 0x1208++0x03
line.long 0x00 "ICDISPR2,Interrupt Set-Pending 2 Register"
group.long 0x120C++0x03
line.long 0x00 "ICDISPR3,Interrupt Set-Pending 3 Register"
group.long 0x1210++0x03
line.long 0x00 "ICDISPR4,Interrupt Set-Pending 4 Register"
group.long 0x1214++0x03
line.long 0x00 "ICDISPR5,Interrupt Set-Pending 5 Register"
group.long 0x1218++0x03
line.long 0x00 "ICDISPR6,Interrupt Set-Pending 6 Register"
group.long 0x121C++0x03
line.long 0x00 "ICDISPR7,Interrupt Set-Pending 7 Register"
group.long 0x1280++0x03
line.long 0x00 "ICDICPR0,Interrupt Clear-Pending 0 Register"
group.long 0x1284++0x03
line.long 0x00 "ICDICPR1,Interrupt Clear-Pending 1 Register"
group.long 0x1288++0x03
line.long 0x00 "ICDICPR2,Interrupt Clear-Pending 2 Register"
group.long 0x128C++0x03
line.long 0x00 "ICDICPR3,Interrupt Clear-Pending 3 Register"
group.long 0x1290++0x03
line.long 0x00 "ICDICPR4,Interrupt Clear-Pending 4 Register"
group.long 0x1294++0x03
line.long 0x00 "ICDICPR5,Interrupt Clear-Pending 5 Register"
group.long 0x1298++0x03
line.long 0x00 "ICDICPR6,Interrupt Clear-Pending 6 Register"
group.long 0x129C++0x03
line.long 0x00 "ICDICPR7,Interrupt Clear-Pending 7 Register"
group.long 0x1300++0x03
line.long 0x00 "ICDABR0,Interrupt Active Bit 0 Register"
group.long 0x1304++0x03
line.long 0x00 "ICDABR1,Interrupt Active Bit 1 Register"
group.long 0x1308++0x03
line.long 0x00 "ICDABR2,Interrupt Active Bit 2 Register"
group.long 0x130C++0x03
line.long 0x00 "ICDABR3,Interrupt Active Bit 3 Register"
group.long 0x1310++0x03
line.long 0x00 "ICDABR4,Interrupt Active Bit 4 Register"
group.long 0x1314++0x03
line.long 0x00 "ICDABR5,Interrupt Active Bit 5 Register"
group.long 0x1318++0x03
line.long 0x00 "ICDABR6,Interrupt Active Bit 6 Register"
group.long 0x131C++0x03
line.long 0x00 "ICDABR7,Interrupt Active Bit 7 Register"
group.long 0x1400++0x03
line.long 0x00 "ICDIPR0,Interrupt Priority 0 Register"
group.long 0x1404++0x03
line.long 0x00 "ICDIPR1,Interrupt Priority 1 Register"
group.long 0x1408++0x03
line.long 0x00 "ICDIPR2,Interrupt Priority 2 Register"
group.long 0x140C++0x03
line.long 0x00 "ICDIPR3,Interrupt Priority 3 Register"
group.long 0x1410++0x03
line.long 0x00 "ICDIPR4,Interrupt Priority 4 Register"
group.long 0x1414++0x03
line.long 0x00 "ICDIPR5,Interrupt Priority 5 Register"
group.long 0x1418++0x03
line.long 0x00 "ICDIPR6,Interrupt Priority 6 Register"
group.long 0x141C++0x03
line.long 0x00 "ICDIPR7,Interrupt Priority 7 Register"
group.long 0x1420++0x03
line.long 0x00 "ICDIPR8,Interrupt Priority 8 Register"
group.long 0x1424++0x03
line.long 0x00 "ICDIPR9,Interrupt Priority 9 Register"
group.long 0x1428++0x03
line.long 0x00 "ICDIPR10,Interrupt Priority 10 Register"
group.long 0x142C++0x03
line.long 0x00 "ICDIPR11,Interrupt Priority 11 Register"
group.long 0x1430++0x03
line.long 0x00 "ICDIPR12,Interrupt Priority 12 Register"
group.long 0x1434++0x03
line.long 0x00 "ICDIPR13,Interrupt Priority 13 Register"
group.long 0x1438++0x03
line.long 0x00 "ICDIPR14,Interrupt Priority 14 Register"
group.long 0x143C++0x03
line.long 0x00 "ICDIPR15,Interrupt Priority 15 Register"
group.long 0x1440++0x03
line.long 0x00 "ICDIPR16,Interrupt Priority 16 Register"
group.long 0x1444++0x03
line.long 0x00 "ICDIPR17,Interrupt Priority 17 Register"
group.long 0x1448++0x03
line.long 0x00 "ICDIPR18,Interrupt Priority 18 Register"
group.long 0x144C++0x03
line.long 0x00 "ICDIPR19,Interrupt Priority 19 Register"
group.long 0x1450++0x03
line.long 0x00 "ICDIPR20,Interrupt Priority 20 Register"
group.long 0x1454++0x03
line.long 0x00 "ICDIPR21,Interrupt Priority 21 Register"
group.long 0x1458++0x03
line.long 0x00 "ICDIPR22,Interrupt Priority 22 Register"
group.long 0x145C++0x03
line.long 0x00 "ICDIPR23,Interrupt Priority 23 Register"
group.long 0x1460++0x03
line.long 0x00 "ICDIPR24,Interrupt Priority 24 Register"
group.long 0x1464++0x03
line.long 0x00 "ICDIPR25,Interrupt Priority 25 Register"
group.long 0x1468++0x03
line.long 0x00 "ICDIPR26,Interrupt Priority 26 Register"
group.long 0x146C++0x03
line.long 0x00 "ICDIPR27,Interrupt Priority 27 Register"
group.long 0x1470++0x03
line.long 0x00 "ICDIPR28,Interrupt Priority 28 Register"
group.long 0x1474++0x03
line.long 0x00 "ICDIPR29,Interrupt Priority 29 Register"
group.long 0x1478++0x03
line.long 0x00 "ICDIPR30,Interrupt Priority 30 Register"
group.long 0x147C++0x03
line.long 0x00 "ICDIPR31,Interrupt Priority 31 Register"
group.long 0x1480++0x03
line.long 0x00 "ICDIPR32,Interrupt Priority 32 Register"
group.long 0x1484++0x03
line.long 0x00 "ICDIPR33,Interrupt Priority 33 Register"
group.long 0x1488++0x03
line.long 0x00 "ICDIPR34,Interrupt Priority 34 Register"
group.long 0x148C++0x03
line.long 0x00 "ICDIPR35,Interrupt Priority 35 Register"
group.long 0x1490++0x03
line.long 0x00 "ICDIPR36,Interrupt Priority 36 Register"
group.long 0x1494++0x03
line.long 0x00 "ICDIPR37,Interrupt Priority 37 Register"
group.long 0x1498++0x03
line.long 0x00 "ICDIPR38,Interrupt Priority 38 Register"
group.long 0x149C++0x03
line.long 0x00 "ICDIPR39,Interrupt Priority 39 Register"
group.long 0x14A0++0x03
line.long 0x00 "ICDIPR40,Interrupt Priority 40 Register"
group.long 0x14A4++0x03
line.long 0x00 "ICDIPR41,Interrupt Priority 41 Register"
group.long 0x14A8++0x03
line.long 0x00 "ICDIPR42,Interrupt Priority 42 Register"
group.long 0x14AC++0x03
line.long 0x00 "ICDIPR43,Interrupt Priority 43 Register"
group.long 0x14B0++0x03
line.long 0x00 "ICDIPR44,Interrupt Priority 44 Register"
group.long 0x14B4++0x03
line.long 0x00 "ICDIPR45,Interrupt Priority 45 Register"
group.long 0x14B8++0x03
line.long 0x00 "ICDIPR46,Interrupt Priority 46 Register"
group.long 0x14BC++0x03
line.long 0x00 "ICDIPR47,Interrupt Priority 47 Register"
group.long 0x14C0++0x03
line.long 0x00 "ICDIPR48,Interrupt Priority 48 Register"
group.long 0x14C4++0x03
line.long 0x00 "ICDIPR49,Interrupt Priority 49 Register"
group.long 0x14C8++0x03
line.long 0x00 "ICDIPR50,Interrupt Priority 50 Register"
group.long 0x14CC++0x03
line.long 0x00 "ICDIPR51,Interrupt Priority 51 Register"
group.long 0x14D0++0x03
line.long 0x00 "ICDIPR52,Interrupt Priority 52 Register"
group.long 0x14D4++0x03
line.long 0x00 "ICDIPR53,Interrupt Priority 53 Register"
group.long 0x14D8++0x03
line.long 0x00 "ICDIPR54,Interrupt Priority 54 Register"
group.long 0x14DC++0x03
line.long 0x00 "ICDIPR55,Interrupt Priority 55 Register"
group.long 0x14E0++0x03
line.long 0x00 "ICDIPR56,Interrupt Priority 56 Register"
group.long 0x14E4++0x03
line.long 0x00 "ICDIPR57,Interrupt Priority 57 Register"
group.long 0x14E8++0x03
line.long 0x00 "ICDIPR58,Interrupt Priority 58 Register"
group.long 0x14EC++0x03
line.long 0x00 "ICDIPR59,Interrupt Priority 59 Register"
group.long 0x14F0++0x03
line.long 0x00 "ICDIPR60,Interrupt Priority 60 Register"
group.long 0x14F4++0x03
line.long 0x00 "ICDIPR61,Interrupt Priority 61 Register"
group.long 0x14F8++0x03
line.long 0x00 "ICDIPR62,Interrupt Priority 62 Register"
group.long 0x14FC++0x03
line.long 0x00 "ICDIPR63,Interrupt Priority 63 Register"
rgroup.long 0x1800++0x03
line.long 0x00 "ICDIPTR0,Interrupt Processor Targets 0 Register"
rgroup.long 0x1804++0x03
line.long 0x00 "ICDIPTR1,Interrupt Processor Targets 1 Register"
rgroup.long 0x1808++0x03
line.long 0x00 "ICDIPTR2,Interrupt Processor Targets 2 Register"
rgroup.long 0x180C++0x03
line.long 0x00 "ICDIPTR3,Interrupt Processor Targets 3 Register"
rgroup.long 0x1810++0x03
line.long 0x00 "ICDIPTR4,Interrupt Processor Targets 4 Register"
rgroup.long 0x1814++0x03
line.long 0x00 "ICDIPTR5,Interrupt Processor Targets 5 Register"
rgroup.long 0x1818++0x03
line.long 0x00 "ICDIPTR6,Interrupt Processor Targets 6 Register"
rgroup.long 0x181C++0x03
line.long 0x00 "ICDIPTR7,Interrupt Processor Targets 7 Register"
rgroup.long 0x1820++0x03
line.long 0x00 "ICDIPTR8,Interrupt Processor Targets 8 Register"
rgroup.long 0x1824++0x03
line.long 0x00 "ICDIPTR9,Interrupt Processor Targets 9 Register"
rgroup.long 0x1828++0x03
line.long 0x00 "ICDIPTR10,Interrupt Processor Targets 10 Register"
rgroup.long 0x182C++0x03
line.long 0x00 "ICDIPTR11,Interrupt Processor Targets 11 Register"
rgroup.long 0x1830++0x03
line.long 0x00 "ICDIPTR12,Interrupt Processor Targets 12 Register"
rgroup.long 0x1834++0x03
line.long 0x00 "ICDIPTR13,Interrupt Processor Targets 13 Register"
rgroup.long 0x1838++0x03
line.long 0x00 "ICDIPTR14,Interrupt Processor Targets 14 Register"
rgroup.long 0x183C++0x03
line.long 0x00 "ICDIPTR15,Interrupt Processor Targets 15 Register"
rgroup.long 0x1840++0x03
line.long 0x00 "ICDIPTR16,Interrupt Processor Targets 16 Register"
rgroup.long 0x1844++0x03
line.long 0x00 "ICDIPTR17,Interrupt Processor Targets 17 Register"
rgroup.long 0x1848++0x03
line.long 0x00 "ICDIPTR18,Interrupt Processor Targets 18 Register"
rgroup.long 0x184C++0x03
line.long 0x00 "ICDIPTR19,Interrupt Processor Targets 19 Register"
rgroup.long 0x1850++0x03
line.long 0x00 "ICDIPTR20,Interrupt Processor Targets 20 Register"
rgroup.long 0x1854++0x03
line.long 0x00 "ICDIPTR21,Interrupt Processor Targets 21 Register"
rgroup.long 0x1858++0x03
line.long 0x00 "ICDIPTR22,Interrupt Processor Targets 22 Register"
rgroup.long 0x185C++0x03
line.long 0x00 "ICDIPTR23,Interrupt Processor Targets 23 Register"
rgroup.long 0x1860++0x03
line.long 0x00 "ICDIPTR24,Interrupt Processor Targets 24 Register"
rgroup.long 0x1864++0x03
line.long 0x00 "ICDIPTR25,Interrupt Processor Targets 25 Register"
rgroup.long 0x1868++0x03
line.long 0x00 "ICDIPTR26,Interrupt Processor Targets 26 Register"
rgroup.long 0x186C++0x03
line.long 0x00 "ICDIPTR27,Interrupt Processor Targets 27 Register"
rgroup.long 0x1870++0x03
line.long 0x00 "ICDIPTR28,Interrupt Processor Targets 28 Register"
rgroup.long 0x1874++0x03
line.long 0x00 "ICDIPTR29,Interrupt Processor Targets 29 Register"
rgroup.long 0x1878++0x03
line.long 0x00 "ICDIPTR30,Interrupt Processor Targets 30 Register"
rgroup.long 0x187C++0x03
line.long 0x00 "ICDIPTR31,Interrupt Processor Targets 31 Register"
rgroup.long 0x1880++0x03
line.long 0x00 "ICDIPTR32,Interrupt Processor Targets 32 Register"
rgroup.long 0x1884++0x03
line.long 0x00 "ICDIPTR33,Interrupt Processor Targets 33 Register"
rgroup.long 0x1888++0x03
line.long 0x00 "ICDIPTR34,Interrupt Processor Targets 34 Register"
rgroup.long 0x188C++0x03
line.long 0x00 "ICDIPTR35,Interrupt Processor Targets 35 Register"
rgroup.long 0x1890++0x03
line.long 0x00 "ICDIPTR36,Interrupt Processor Targets 36 Register"
rgroup.long 0x1894++0x03
line.long 0x00 "ICDIPTR37,Interrupt Processor Targets 37 Register"
rgroup.long 0x1898++0x03
line.long 0x00 "ICDIPTR38,Interrupt Processor Targets 38 Register"
rgroup.long 0x189C++0x03
line.long 0x00 "ICDIPTR39,Interrupt Processor Targets 39 Register"
rgroup.long 0x18A0++0x03
line.long 0x00 "ICDIPTR40,Interrupt Processor Targets 40 Register"
rgroup.long 0x18A4++0x03
line.long 0x00 "ICDIPTR41,Interrupt Processor Targets 41 Register"
rgroup.long 0x18A8++0x03
line.long 0x00 "ICDIPTR42,Interrupt Processor Targets 42 Register"
rgroup.long 0x18AC++0x03
line.long 0x00 "ICDIPTR43,Interrupt Processor Targets 43 Register"
rgroup.long 0x18B0++0x03
line.long 0x00 "ICDIPTR44,Interrupt Processor Targets 44 Register"
rgroup.long 0x18B4++0x03
line.long 0x00 "ICDIPTR45,Interrupt Processor Targets 45 Register"
rgroup.long 0x18B8++0x03
line.long 0x00 "ICDIPTR46,Interrupt Processor Targets 46 Register"
rgroup.long 0x18BC++0x03
line.long 0x00 "ICDIPTR47,Interrupt Processor Targets 47 Register"
rgroup.long 0x18C0++0x03
line.long 0x00 "ICDIPTR48,Interrupt Processor Targets 48 Register"
rgroup.long 0x18C4++0x03
line.long 0x00 "ICDIPTR49,Interrupt Processor Targets 49 Register"
rgroup.long 0x18C8++0x03
line.long 0x00 "ICDIPTR50,Interrupt Processor Targets 50 Register"
rgroup.long 0x18CC++0x03
line.long 0x00 "ICDIPTR51,Interrupt Processor Targets 51 Register"
rgroup.long 0x18D0++0x03
line.long 0x00 "ICDIPTR52,Interrupt Processor Targets 52 Register"
rgroup.long 0x18D4++0x03
line.long 0x00 "ICDIPTR53,Interrupt Processor Targets 53 Register"
rgroup.long 0x18D8++0x03
line.long 0x00 "ICDIPTR54,Interrupt Processor Targets 54 Register"
rgroup.long 0x18DC++0x03
line.long 0x00 "ICDIPTR55,Interrupt Processor Targets 55 Register"
rgroup.long 0x18E0++0x03
line.long 0x00 "ICDIPTR56,Interrupt Processor Targets 56 Register"
rgroup.long 0x18E4++0x03
line.long 0x00 "ICDIPTR57,Interrupt Processor Targets 57 Register"
rgroup.long 0x18E8++0x03
line.long 0x00 "ICDIPTR58,Interrupt Processor Targets 58 Register"
rgroup.long 0x18EC++0x03
line.long 0x00 "ICDIPTR59,Interrupt Processor Targets 59 Register"
rgroup.long 0x18F0++0x03
line.long 0x00 "ICDIPTR60,Interrupt Processor Targets 60 Register"
rgroup.long 0x18F4++0x03
line.long 0x00 "ICDIPTR61,Interrupt Processor Targets 61 Register"
rgroup.long 0x18F8++0x03
line.long 0x00 "ICDIPTR62,Interrupt Processor Targets 62 Register"
rgroup.long 0x18FC++0x03
line.long 0x00 "ICDIPTR63,Interrupt Processor Targets 63 Register"
rgroup.long 0x1C00++0x03
line.long 0x00 "ICDICFR0,Interrupt Configuration 0 Register"
rgroup.long 0x1C04++0x03
line.long 0x00 "ICDICFR1,Interrupt Configuration 1 Register"
rgroup.long 0x1C08++0x03
line.long 0x00 "ICDICFR2,Interrupt Configuration 2 Register"
rgroup.long 0x1C0C++0x03
line.long 0x00 "ICDICFR3,Interrupt Configuration 3 Register"
rgroup.long 0x1C10++0x03
line.long 0x00 "ICDICFR4,Interrupt Configuration 4 Register"
rgroup.long 0x1C14++0x03
line.long 0x00 "ICDICFR5,Interrupt Configuration 5 Register"
rgroup.long 0x1C18++0x03
line.long 0x00 "ICDICFR6,Interrupt Configuration 6 Register"
rgroup.long 0x1C1C++0x03
line.long 0x00 "ICDICFR7,Interrupt Configuration 7 Register"
rgroup.long 0x1C20++0x03
line.long 0x00 "ICDICFR8,Interrupt Configuration 8 Register"
rgroup.long 0x1C24++0x03
line.long 0x00 "ICDICFR9,Interrupt Configuration 9 Register"
rgroup.long 0x1C28++0x03
line.long 0x00 "ICDICFR10,Interrupt Configuration 10 Register"
rgroup.long 0x1C2C++0x03
line.long 0x00 "ICDICFR11,Interrupt Configuration 11 Register"
rgroup.long 0x1C30++0x03
line.long 0x00 "ICDICFR12,Interrupt Configuration 12 Register"
rgroup.long 0x1C34++0x03
line.long 0x00 "ICDICFR13,Interrupt Configuration 13 Register"
rgroup.long 0x1C38++0x03
line.long 0x00 "ICDICFR14,Interrupt Configuration 14 Register"
rgroup.long 0x1C3C++0x03
line.long 0x00 "ICDICFR15,Interrupt Configuration 15 Register"
rgroup.long 0x1D00++0x03
line.long 0x00 "ICPPISR,Private Peripheral Interrupt Status Register"
rgroup.long 0x1D04++0x03
line.long 0x00 "ICSPISR0,Shared Peripheral Interrupt Status 0 Register"
rgroup.long 0x1D08++0x03
line.long 0x00 "ICSPISR1,Shared Peripheral Interrupt Status 1 Register"
rgroup.long 0x1D0C++0x03
line.long 0x00 "ICSPISR2,Shared Peripheral Interrupt Status 2 Register"
rgroup.long 0x1D10++0x03
line.long 0x00 "ICSPISR3,Shared Peripheral Interrupt Status 3 Register"
rgroup.long 0x1D14++0x03
line.long 0x00 "ICSPISR4,Shared Peripheral Interrupt Status 4 Register"
rgroup.long 0x1D18++0x03
line.long 0x00 "ICSPISR5,Shared Peripheral Interrupt Status 5 Register"
rgroup.long 0x1D1C++0x03
line.long 0x00 "ICSPISR6,Shared Peripheral Interrupt Status 6 Register"
group.long 0x1F00++0x03
line.long 0x00 "ICDSGIR,Software Generated Interrupt Register"
rgroup.long 0x1FD0++0x1F
line.long 0x00 "ICPIDR0,Peripheral ID4 Register"
line.long 0x04 "ICPIDR1,Peripheral ID5 Register"
line.long 0x08 "ICPIDR2,Peripheral ID6 Register"
line.long 0x0C "ICPIDR3,Peripheral ID7 Register"
line.long 0x10 "ICPIDR4,Peripheral ID0 Register"
line.long 0x14 "ICPIDR5,Peripheral ID1 Register"
line.long 0x18 "ICPIDR6,Peripheral ID2 Register"
line.long 0x1C "ICPIDR7,Peripheral ID3 Register"
rgroup.long 0x1FF0++0x03
line.long 0x00 "ICCIDR0_0,Component ID0 Register"
rgroup.long 0x1FF4++0x03
line.long 0x00 "ICCIDR0_1,Component ID1 Register"
rgroup.long 0x1FF8++0x03
line.long 0x00 "ICCIDR0_2,Component ID2 Register"
rgroup.long 0x1FFC++0x03
line.long 0x00 "ICCIDR0_3,Component ID3 Register"
width 0x0B
tree.end
tree "Audio Miscellaneous"
base ad:0x02990000
width 39.
group.long 0x00++0x13
line.long 0x00 "CONFIG,CONFIG Register"
bitfld.long 0x00 31. " DISABLE_ERROR_RESPONSE  ,Disable error on AXI bus on an invalid access" "No,Yes"
line.long 0x04 "ADSP_CONFIG,ADSP CONFIG Register"
bitfld.long 0x04 29.--31. " MAXCLKLATENCY           ,Max clock latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 23.--26. "                          CLUSTERID               ,Cluster ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 21. "        VINITHI                 ,VINITHI" "0,1"
textline "                                                "
bitfld.long 0x04 20. " CFGSDISABLE             ,CFGS disable" "No,Yes"
bitfld.long 0x04 19. "                        CP15SDISABLE            ,CP15S disable" "No,Yes"
bitfld.long 0x04 18. "       EVENTI                  ,EVENTI" "0,1"
line.long 0x08 "ADSP_PERIPHBASE,ADSP PERIPHBASE Register"
hexmask.long.tbyte 0x08 13.--31. 1. " PERIPHBASE              ,PERIPHBASE"
line.long 0x0C "ADSP_L2_CONFIG,ADSP L2 Config Register"
bitfld.long 0x0C 25.--30. " CACHEID                 ,Cache ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ADSP_L2_REGFILEBASE,ADSP L2 REGFILEBASE Register"
hexmask.long.tbyte 0x10 12.--31. 1. " REGFILEBASE             ,REGFILEBASE"
rgroup.long 0x14++0x03
line.long 0x00 "ADSP_STATUS,ADSP STATUS Register"
bitfld.long 0x00 31. " L2_IDLE                 ,L2 idle" "False,True"
bitfld.long 0x00 30. "                      L2_CLKSTOPPED           ,L2 clock stopped" "False,True"
bitfld.long 0x00 29. "     DBGNOPWRDWN             ,DBGNOPWRDWN" "0,1"
group.long 0x18++0x03
line.long 0x00 "ADSP_AGIC_CONFIG,ADSP AGIC CONFIG Register"
bitfld.long 0x00 31. " CFGSDISABLE             ,CFGS disable" "No,Yes"
sif cpuis("TEGRAX2")
bitfld.long 0x00 24.--28. "                        NS_ENABLE               ,NS enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 20.--23. "        GICD_MASK               ,GICD mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif cpuis("TEGRAX2")
group.long 0x1C++0x03
line.long 0x00 "CONFIG_LOCK,CONFIG LOCK Register"
bitfld.long 0x00 31. " ADSP                    ,ADSP" "0,1"
rgroup.long 0x4C++0x07
line.long 0x00 "TSC_LOW,TSC Low Register"
line.long 0x04 "TSC_HIGH,TSC High Register"
hexmask.long.tbyte 0x04 0.--23. 1. " TIMESTAMP               ,Timestamp"
group.long 0x54++0x07
line.long 0x00 "IDLE,Idle Register"
bitfld.long 0x00 31. " IDLE_EN                 ,Idle enable" "Disabled,Enabled"
line.long 0x04 "ACTMON,ACTMON Register"
bitfld.long 0x04 31. " CNT_ENABLE              ,CNT enable" "Disabled,Enabled"
hexmask.long.byte 0x04 23.--30. 1. "                   CNT_TARGET              ,CNT target"
rgroup.long 0x60++0x0F
line.long 0x00 "MC_STATS_READ,MC STATS READ (Acast) Register"
line.long 0x04 "MC_STATS_READ_1,MC STATS READ (Adast) Register"
line.long 0x08 "MC_STATS_WRITE,MC STATS WRITE (Acast) Register"
line.long 0x0C "MC_STATS_WRITE_1,MC STATS WRITE (Adast) Register"
group.long 0x70++0x07
line.long 0x00 "MC_STATS_CLEAR,MC STATS CLEAR Register"
bitfld.long 0x00 1. " CLEAR_WRITE_COUNT       ,Clear write count" "Not cleared,Cleared"
bitfld.long 0x00 0. "                 CLEAR_READ_COUNT        ,Clear read count" "Not cleared,Cleared"
line.long 0x04 "MC_STATS_CLEAR,MC STATS CLEAR Register"
bitfld.long 0x04 1. " CLEAR_WRITE_COUNT       ,Clear write count" "Not cleared,Cleared"
bitfld.long 0x04 0. "                 CLEAR_READ_COUNT        ,Clear read count" "Not cleared,Cleared"
group.long 0x7C++0x03
line.long 0x00 "KEYSLOT_NS,KEYSLOT NS Register"
bitfld.long 0x00 0.--3. " DISABLE                 ,Disable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x80++0x03
line.long 0x00 "KEYSLOT_KEY0_0,KEYSLOT KEY0 0 Register"
group.long 0x84++0x03
line.long 0x00 "KEYSLOT_KEY0_1,KEYSLOT KEY0 1 Register"
group.long 0x88++0x03
line.long 0x00 "KEYSLOT_KEY0_2,KEYSLOT KEY0 2 Register"
group.long 0x8C++0x03
line.long 0x00 "KEYSLOT_KEY0_3,KEYSLOT KEY0 3 Register"
group.long 0x90++0x03
line.long 0x00 "KEYSLOT_KEY1_0,KEYSLOT KEY1 0 Register"
group.long 0x94++0x03
line.long 0x00 "KEYSLOT_KEY1_1,KEYSLOT KEY1 1 Register"
group.long 0x98++0x03
line.long 0x00 "KEYSLOT_KEY1_2,KEYSLOT KEY1 2 Register"
group.long 0x9C++0x03
line.long 0x00 "KEYSLOT_KEY1_3,KEYSLOT KEY1 3 Register"
group.long 0xA0++0x03
line.long 0x00 "KEYSLOT_KEY2_0,KEYSLOT KEY2 0 Register"
group.long 0xA4++0x03
line.long 0x00 "KEYSLOT_KEY2_1,KEYSLOT KEY2 1 Register"
group.long 0xA8++0x03
line.long 0x00 "KEYSLOT_KEY2_2,KEYSLOT KEY2 2 Register"
group.long 0xAC++0x03
line.long 0x00 "KEYSLOT_KEY2_3,KEYSLOT KEY2 3 Register"
group.long 0xB0++0x03
line.long 0x00 "KEYSLOT_KEY3_0,KEYSLOT KEY3 0 Register"
group.long 0xB4++0x03
line.long 0x00 "KEYSLOT_KEY3_1,KEYSLOT KEY3 1 Register"
group.long 0xB8++0x03
line.long 0x00 "KEYSLOT_KEY3_2,KEYSLOT KEY3 2 Register"
group.long 0xBC++0x03
line.long 0x00 "KEYSLOT_KEY3_3,KEYSLOT KEY3 3 Register"
group.long 0xC0++0x0F
line.long 0x00 "APE_TSC_CTRL,APE TSC CTRL Register"
hexmask.long.word 0x00 16.--31. 1. " N_MODULO                ,Modulo value after which fractional value will be added to integer value"
hexmask.long.word 0x00 0.--15. 1. "                       N_FRACT                 ,Fractional value of the timestamp counter"
line.long 0x04 "APE_TSC_CTRL_1,APE TSC CTRL 1 Register"
hexmask.long.word 0x04 0.--15. 1. " N_INT                   ,Integer value to increment for every clock"
line.long 0x08 "APE_TSC_CTRL_2,APE TSC CTRL 2 Register"
line.long 0x0C "APE_TSC_CTRL_3,APE TSC CTRL 3 Register"
bitfld.long 0x0C 31. " ENABLE                  ,Enable signals for clock synchronization" "Disabled,Enabled"
bitfld.long 0x0C 2. "                   COPY                    ,Copy value of EAVB timestamps to APE timestamps" "Not copy,Copy"
bitfld.long 0x0C 1. "  RST                     ,Resets the APE time stamping counter logic" "No reset,Reset"
textline "                                                "
bitfld.long 0x0C 0. " TRIGGER                 ,When written 1 to this field will trigger the snapshot capture for both EAVB/APE timestamps" "Not triggered,Triggered"
rgroup.long 0xD0++0x17
line.long 0x00 "APE_RT_TSC_NS,APE RT TSC NS Register"
line.long 0x04 "APE_RT_TSC_SEC,APE RT TSC SEC Register"
line.long 0x08 "APE_SNAP_TSC_NS,APE SNAP TSC NS Register"
line.long 0x0C "APE_SNAP_TSC_SEC,APE SNAP TSC SEC Register"
line.long 0x10 "EAVB_SNAP_TSC_NS,EAVB SNAP TSC NS Register"
line.long 0x14 "EAVB_SNAP_TSC_SEC,EAVB SNAP TSC SEC Register"
group.long 0xE8++0x0B
line.long 0x00 "SPARE,SPARE Register"
line.long 0x04 "ACONNECT_CLOCK_GATING_DISABLE,ACONNECT Clock Gating Disable Register"
bitfld.long 0x04 31. " APE_GATING_DISABLE      ,APE gating disable" "No,Yes"
bitfld.long 0x04 30. "                        ADMA_GATING_DISABLE     ,ADMA gating disable" "No,Yes"
bitfld.long 0x04 29. "       ADSP_GATING_DISABLE     ,ADSP gating disable" "No,Yes"
textline "                                                "
bitfld.long 0x04 28. " AHUB_GATING_DISABLE     ,AHUB gating disable" "No,Yes"
bitfld.long 0x04 27. "                        APBP_GATING_DISABLE     ,APBP gating disable" "No,Yes"
line.long 0x08 "APE_SLCG_OVERRIDE,APE SLCG Override Register"
bitfld.long 0x08 0. " APE_CLK_OVR_ON          ,APE clock override enable" "Disabled,Enabled"
group.long 0x100++0x03
line.long 0x00 "ACTMON_INPUT_CONFIG_0,ACTMON INPUT CONFIG 0 Register"
bitfld.long 0x00 0.--2. " INPUT_SEL               ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..."
group.long 0x104++0x03
line.long 0x00 "ACTMON_INPUT_CONFIG_1,ACTMON INPUT CONFIG 1 Register"
bitfld.long 0x00 0.--2. " INPUT_SEL               ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..."
group.long 0x108++0x03
line.long 0x00 "ACTMON_INPUT_CONFIG_2,ACTMON INPUT CONFIG 2 Register"
bitfld.long 0x00 0.--2. " INPUT_SEL               ,Input select" "ADSP active,ADSP MEM stall,AST active,ADSP PMU event,ADSP PMU even 1,OUTSTANDING req threshold,?..."
group.long 0x10C++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_0,ACTMON MEM ACTIVITY_0 Register"
bitfld.long 0x00 8. " MEM_ACT_MODE            ,MEM ACT mode" "Request count,Transfer count"
bitfld.long 0x00 3. "             ADAST_WR_ACT_EN         ,ADAST WR ACT " "Disabled,Enabled"
bitfld.long 0x00 2. "  ADAST_RD_ACT_EN         ,ADAST read ACT enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 1. " ACAST_WR_ACT_EN         ,ACAST WR ACT enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   ACAST_RD_ACT_EN         ,ACAST read ACT enable" "Disabled,Enabled"
group.long 0x110++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_1,ACTMON MEM ACTIVITY_1 Register"
bitfld.long 0x00 8. " MEM_ACT_MODE            ,MEM ACT mode" "Request count,Transfer count"
bitfld.long 0x00 3. "             ADAST_WR_ACT_EN         ,ADAST WR ACT " "Disabled,Enabled"
bitfld.long 0x00 2. "  ADAST_RD_ACT_EN         ,ADAST read ACT enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 1. " ACAST_WR_ACT_EN         ,ACAST WR ACT enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   ACAST_RD_ACT_EN         ,ACAST read ACT enable" "Disabled,Enabled"
group.long 0x114++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_2,ACTMON MEM ACTIVITY_2 Register"
bitfld.long 0x00 8. " MEM_ACT_MODE            ,MEM ACT mode" "Request count,Transfer count"
bitfld.long 0x00 3. "             ADAST_WR_ACT_EN         ,ADAST WR ACT " "Disabled,Enabled"
bitfld.long 0x00 2. "  ADAST_RD_ACT_EN         ,ADAST read ACT enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 1. " ACAST_WR_ACT_EN         ,ACAST WR ACT enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   ACAST_RD_ACT_EN         ,ACAST read ACT enable" "Disabled,Enabled"
group.long 0x118++0x03
line.long 0x00 "ACTMON_ADSP_PMU_0,ACTMON ADSP PMU 0 Register"
bitfld.long 0x00 0.--1. " ADSP_STALL_SEL          ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall"
group.long 0x11C++0x03
line.long 0x00 "ACTMON_ADSP_PMU_1,ACTMON ADSP PMU 1 Register"
bitfld.long 0x00 0.--1. " ADSP_STALL_SEL          ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall"
group.long 0x120++0x03
line.long 0x00 "ACTMON_ADSP_PMU_2,ACTMON ADSP PMU 2 Register"
bitfld.long 0x00 0.--1. " ADSP_STALL_SEL          ,ADSP stall select" "Disabled,INSTR stall,Data stall,INSTR data stall"
group.long 0x124++0x03
line.long 0x00 "ACTMON_REQ_THRSHOLD_0,ACTMON Required Threshold 0 Register"
bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled"
bitfld.long 0x00 10. "                   REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled"
bitfld.long 0x00 9. "  REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   REQ_THRSHLD_LEVEL       ,Required threshold level"
group.long 0x128++0x03
line.long 0x00 "ACTMON_REQ_THRSHOLD_1,ACTMON Required Threshold 1 Register"
bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled"
bitfld.long 0x00 10. "                   REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled"
bitfld.long 0x00 9. "  REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   REQ_THRSHLD_LEVEL       ,Required threshold level"
group.long 0x12C++0x03
line.long 0x00 "ACTMON_REQ_THRSHOLD_2,ACTMON Required Threshold 2 Register"
bitfld.long 0x00 11. " REQ_THRSHLD_ADAST_RD_EN ,Required threshold ADAST read enable" "Disabled,Enabled"
bitfld.long 0x00 10. "                   REQ_THRSHLD_ADAST_WR_EN ,Required threshold ADAST write enable" "Disabled,Enabled"
bitfld.long 0x00 9. "  REQ_THRSHLD_ACAST_WR_EN ,Required threshold ACAST write enable" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 8. " REQ_THRSHLD_ACAST_RD_EN ,Required threshold ACAST read enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   REQ_THRSHLD_LEVEL       ,Required threshold level"
group.long 0x130++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_0,ACTMON MEM ACTIVITY Pulse N 0 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x134++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_1,ACTMON MEM ACTIVITY Pulse N 1 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x138++0x03
line.long 0x00 "ACTMON_MEM_ACTIVITY_PULSE_N_2,ACTMON MEM ACTIVITY Pulse N 2 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x13C++0x03
line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_0,ACTMON Common ADSP Pulse N 0 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x140++0x03
line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_1,ACTMON Common ADSP Pulse N 1 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x144++0x03
line.long 0x00 "ACTMON_COMMON_ADSP_PULSE_N_2,ACTMON Common ADSP Pulse N 2 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x140++0x03
line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_0,ACTMON Common Required Threshold Pulse N 0 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x144++0x03
line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_1,ACTMON Common Required Threshold Pulse N 1 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
group.long 0x148++0x03
line.long 0x00 "ACTMON_COMMON_REQ_THRSHOLD_PULSE_N_2,ACTMON Common Required Threshold Pulse N 2 Register"
bitfld.long 0x00 8. " ENABLE                  ,Enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                   PULSE_N                 ,PULSE N"
else
group.long 0x1C++0x03
line.long 0x00 "SHRD_SMP_STA,SHRD_SMP_STA Register"
setclrfld.long 0x00 7. 0x04 7. 0x04 7. " SHRD_SMP_STA            ,Shared semaphore status" "0,1"
setclrfld.long 0x00 6. 0x04 6. 0x04 6. "                          SHRD_SMP_STA            ,Shared semaphore status" "0,1"
setclrfld.long 0x00 5. 0x04 5. 0x04 5. "         SHRD_SMP_STA            ,Shared semaphore status" "0,1"
textline "                                                "
setclrfld.long 0x00 4. 0x04 4. 0x04 4. " SHRD_SMP_STA            ,Shared semaphore status" "0,1"
setclrfld.long 0x00 3. 0x04 3. 0x04 3. "                          SHRD_SMP_STA            ,Shared semaphore status" "0,1"
setclrfld.long 0x00 2. 0x04 2. 0x04 2. "         SHRD_SMP_STA            ,Shared semaphore status" "0,1"
textline "                                                "
setclrfld.long 0x00 1. 0x04 1. 0x04 1. " SHRD_SMP_STA            ,Shared semaphore status" "0,1"
setclrfld.long 0x00 0. 0x04 0. 0x04 0. "                          SHRD_SMP_STA            ,Shared semaphore status" "0,1"
textline "                                                "
rgroup.long 0x28++0x03
line.long 0x00 "CPU_ARBGNT_STATUS,Semaphore Granted Status Register"
bitfld.long 0x00 7. " ARBGNT_STATUS[7] ,Granted status semaphore bit [7]" "Disabled,Enabled"
bitfld.long 0x00 6. "       [6] ,Granted status semaphore bit [6]" "Disabled,Enabled"
bitfld.long 0x00 5. "       [5] ,Granted status semaphore bit [5]" "Disabled,Enabled"
bitfld.long 0x00 4. "       [4] ,Granted status semaphore bit [4]" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 3. "              [3] ,Granted status semaphore bit [3]" "Disabled,Enabled"
bitfld.long 0x00 2. "       [2] ,Granted status semaphore bit [2]" "Disabled,Enabled"
bitfld.long 0x00 1. "       [1] ,Granted status semaphore bit [1]" "Disabled,Enabled"
bitfld.long 0x00 0. "       [0] ,Granted status semaphore bit [0]" "Disabled,Enabled"
group.long 0x2C++0x07
line.long 0x00 "CPU_ARBGNT_GET,Request Arbitration Semaphore Register"
bitfld.long 0x00 7. " ARBGNT_GET[7]    ,Request semaphore bit [7]" "Not requested,Requested"
bitfld.long 0x00 6. "  [6] ,Request semaphore bit [6]" "Not requested,Requested"
bitfld.long 0x00 5. "  [5] ,Request semaphore bit [5]" "Not requested,Requested"
bitfld.long 0x00 4. "  [4] ,Request semaphore bit [4]" "Not requested,Requested"
textline "                                                "
bitfld.long 0x00 3. "           [3]    ,Request semaphore bit [3]" "Not requested,Requested"
bitfld.long 0x00 2. "  [2] ,Request semaphore bit [2]" "Not requested,Requested"
bitfld.long 0x00 1. "  [1] ,Request semaphore bit [1]" "Not requested,Requested"
bitfld.long 0x00 0. "  [0] ,Request semaphore bit [0]" "Not requested,Requested"
line.long 0x04 "CPU_ARBGNT_PUT,Arbitration Semaphore Put Request Register"
bitfld.long 0x04 7. " ARBGNT_PUT[7]    ,Clear the corresponding semaphore bit [7]" "Not cleared,Cleared"
bitfld.long 0x04 6. "    [6] ,Clear the corresponding semaphore bit [6]" "Not cleared,Cleared"
bitfld.long 0x04 5. "    [5] ,Clear the corresponding semaphore bit [5]" "Not cleared,Cleared"
bitfld.long 0x04 4. "    [4] ,Clear the corresponding semaphore bit [4]" "Not cleared,Cleared"
textline "                                                "
bitfld.long 0x04 3. "           [3]    ,Clear the corresponding semaphore bit [3]" "Not cleared,Cleared"
bitfld.long 0x04 2. "    [2] ,Clear the corresponding semaphore bit [2]" "Not cleared,Cleared"
bitfld.long 0x04 1. "    [1] ,Clear the corresponding semaphore bit [1]" "Not cleared,Cleared"
bitfld.long 0x04 0. "    [0] ,Clear the corresponding semaphore bit [0]" "Not cleared,Cleared"
rgroup.long 0x34++0x03
line.long 0x00 "ADSP_ARBGNT_STATUS,Semaphore Granted Status Register"
bitfld.long 0x00 7. " ARBGNT_STATUS[7] ,Granted status semaphore bit [7]" "Disabled,Enabled"
bitfld.long 0x00 6. "       [6] ,Granted status semaphore bit [6]" "Disabled,Enabled"
bitfld.long 0x00 5. "       [5] ,Granted status semaphore bit [5]" "Disabled,Enabled"
bitfld.long 0x00 4. "       [4] ,Granted status semaphore bit [4]" "Disabled,Enabled"
textline "                                                "
bitfld.long 0x00 3. "              [3] ,Granted status semaphore bit [3]" "Disabled,Enabled"
bitfld.long 0x00 2. "       [2] ,Granted status semaphore bit [2]" "Disabled,Enabled"
bitfld.long 0x00 1. "       [1] ,Granted status semaphore bit [1]" "Disabled,Enabled"
bitfld.long 0x00 0. "       [0] ,Granted status semaphore bit [0]" "Disabled,Enabled"
group.long 0x38++0x07
line.long 0x00 "ADSP_ARBGNT_GET,Request Arbitration Semaphore Register"
bitfld.long 0x00 7. " ARBGNT_GET[7]    ,Request semaphore bit [7]" "Not requested,Requested"
bitfld.long 0x00 6. "  [6] ,Request semaphore bit [6]" "Not requested,Requested"
bitfld.long 0x00 5. "  [5] ,Request semaphore bit [5]" "Not requested,Requested"
bitfld.long 0x00 4. "  [4] ,Request semaphore bit [4]" "Not requested,Requested"
textline "                                                "
bitfld.long 0x00 3. "           [3]    ,Request semaphore bit [3]" "Not requested,Requested"
bitfld.long 0x00 2. "  [2] ,Request semaphore bit [2]" "Not requested,Requested"
bitfld.long 0x00 1. "  [1] ,Request semaphore bit [1]" "Not requested,Requested"
bitfld.long 0x00 0. "  [0] ,Request semaphore bit [0]" "Not requested,Requested"
line.long 0x04 "ADSP_ARBGNT_PUT,Arbitration Semaphore Put Request Register"
bitfld.long 0x04 7. " ARBGNT_PUT[7]    ,Clear the corresponding semaphore bit [7]" "Not cleared,Cleared"
bitfld.long 0x04 6. "    [6] ,Clear the corresponding semaphore bit [6]" "Not cleared,Cleared"
bitfld.long 0x04 5. "    [5] ,Clear the corresponding semaphore bit [5]" "Not cleared,Cleared"
bitfld.long 0x04 4. "    [4] ,Clear the corresponding semaphore bit [4]" "Not cleared,Cleared"
textline "                                                "
bitfld.long 0x04 3. "           [3]    ,Clear the corresponding semaphore bit [3]" "Not cleared,Cleared"
bitfld.long 0x04 2. "    [2] ,Clear the corresponding semaphore bit [2]" "Not cleared,Cleared"
bitfld.long 0x04 1. "    [1] ,Clear the corresponding semaphore bit [1]" "Not cleared,Cleared"
bitfld.long 0x04 0. "    [0] ,Clear the corresponding semaphore bit [0]" "Not cleared,Cleared"
rgroup.long 0x40++0x0F
line.long 0x00 "ADSP_ARBGNT_REQ_STATUS,Arbitration Request Pending Status Register"
bitfld.long 0x00 7. " REQ_STATUS[7]    ,Request pending status from the ADSP_ARBGNT_GET register for bit [7]" "Not pending,Pending"
bitfld.long 0x00 6. "    [6] ,Request pending status from the ADSP_ARBGNT_GET register for bit [6]" "Not pending,Pending"
bitfld.long 0x00 5. "    [5] ,Request pending status from the ADSP_ARBGNT_GET register for bit [5]" "Not pending,Pending"
bitfld.long 0x00 4. "    [4] ,Request pending status from the ADSP_ARBGNT_GET register for bit [4]" "Not pending,Pending"
textline "                                                "
bitfld.long 0x00 3. "           [3]    ,Request pending status from the ADSP_ARBGNT_GET register for bit [3]" "Not pending,Pending"
bitfld.long 0x00 2. "    [2] ,Request pending status from the ADSP_ARBGNT_GET register for bit [2]" "Not pending,Pending"
bitfld.long 0x00 1. "    [1] ,Request pending status from the ADSP_ARBGNT_GET register for bit [1]" "Not pending,Pending"
bitfld.long 0x00 0. "    [0] ,Request pending status from the ADSP_ARBGNT_GET register for bit [0]" "Not pending,Pending"
line.long 0x04 "CPU_ARBGNT_REQ_STATUS,Arbitration Request Pending Status Register"
bitfld.long 0x04 7. " REQ_STATUS[7]    ,Request pending status from the CPU_ARBGNT_GET register for bit [7]" "Not pending,Pending"
bitfld.long 0x04 6. "    [6] ,Request pending status from the CPU_ARBGNT_GET register for bit [6]" "Not pending,Pending"
bitfld.long 0x04 5. "    [5] ,Request pending status from the CPU_ARBGNT_GET register for bit [5]" "Not pending,Pending"
bitfld.long 0x04 4. "    [4] ,Request pending status from the CPU_ARBGNT_GET register for bit [4]" "Not pending,Pending"
textline "                                                "
bitfld.long 0x04 3. "           [3]    ,Request pending status from the CPU_ARBGNT_GET register for bit [3]" "Not pending,Pending"
bitfld.long 0x04 2. "    [2] ,Request pending status from the CPU_ARBGNT_GET register for bit [2]" "Not pending,Pending"
bitfld.long 0x04 1. "    [1] ,Request pending status from the CPU_ARBGNT_GET register for bit [1]" "Not pending,Pending"
bitfld.long 0x04 0. "    [0] ,Request pending status from the CPU_ARBGNT_GET register for bit [0]" "Not pending,Pending"
line.long 0x08 "TSC,TSC Register"
line.long 0x0C "DEBUG,DEBUG Register"
bitfld.long 0x0C 31. " TSC_SET                 ,Read 32 bits (Upper/lower) form TSC register" "Upper,Lower"
group.long 0x50++0x07
line.long 0x00 "IDLE,IDLE Register"
bitfld.long 0x00 31. " IDLE_EN                 ,Idle enable" "Disabled,Enabled"
line.long 0x04 "ACTMON,ACTMON Register"
bitfld.long 0x04 31. " CNT_ENABLE              ,Enable the ADSP side counter" "Disabled,Enabled"
hexmask.long.byte 0x04 23.--30. 1. "                   CNT_TARGET              ,Count target minus 1 before signal to the ACTMON"
group.long 0x58++0x03
line.long 0x00 "SHRD_MBOX_0,SHRD_MBOX Register 0"
bitfld.long 0x00 31. " TAG                     ,Tag" "0,1"
hexmask.long 0x00 0.--30. 1. "                          DATA                    ,Data"
group.long 0x5C++0x03
line.long 0x00 "SHRD_MBOX_1,SHRD_MBOX Register 1"
bitfld.long 0x00 31. " TAG                     ,Tag" "0,1"
hexmask.long 0x00 0.--30. 1. "                          DATA                    ,Data"
group.long 0x60++0x03
line.long 0x00 "SHRD_MBOX_2,SHRD_MBOX Register 2"
bitfld.long 0x00 31. " TAG                     ,Tag" "0,1"
hexmask.long 0x00 0.--30. 1. "                          DATA                    ,Data"
group.long 0x64++0x03
line.long 0x00 "SHRD_MBOX_3,SHRD_MBOX Register 3"
bitfld.long 0x00 31. " TAG                     ,Tag" "0,1"
hexmask.long 0x00 0.--30. 1. "                          DATA                    ,Data"
group.long 0x68++0x03
line.long 0x00 "SPARE,SPARE Register"
endif
width 0x0B
tree.end
tree "ASRC"
base ad:0x02910000
width 29.
tree "STREAM1"
if (((per.l(ad:0x02910000+0x0))&0x01)==0x00)
group.long (0x0+0x00)++0x03
line.long 0x00 "STREAM1_CONFIG,Stream 1 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x0+0x04)++0x0B
line.long 0x00 "STREAM1_RATIO_INTEGER_PART,Stream 1 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM1_RATIO_FRAC_PART,Stream 1 Ratio Fractional Part Register"
line.long 0x08 "STREAM1_RATIO_LOCK_STATUS,Stream 1 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x0+0x00)++0x03
line.long 0x00 "STREAM1_CONFIG,Stream 1 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x0+0x04)++0x0B
line.long 0x00 "STREAM1_RATIO_INTEGER_PART,Stream 1 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM1_RATIO_FRAC_PART,Stream 1 Ratio Fractional Part Register"
line.long 0x08 "STREAM1_RATIO_LOCK_STATUS,Stream 1 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x0+0x14)++0x0B
line.long 0x00 "STREAM1_TX_THRESHOLD,Stream 1 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM1_RX_THRESHOLD,Stream 1 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM1_RATIO_COMP,Stream 1 Ratio COMP Register"
rgroup.long (0x0+0x20)++0x03
line.long 0x00 "STREAM1_RX_STATUS,Stream 1 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x0+0x24)++0x03
line.long 0x00 "STREAM1_RX_CIF_CTRL,Stream 1 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x0+0x2C)++0x03
line.long 0x00 "STREAM1_TX_STATUS,Stream 1 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x0+0x30)++0x03
line.long 0x00 "STREAM1_TX_CIF_CTRL,Stream 1 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x0+0x38)++0x07
line.long 0x00 "STREAM1_ENABLE,Stream 1 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM1_SOFT_RESET,Stream 1 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x0+0x4C)++0x03
line.long 0x00 "STREAM1_STATUS,Stream 1 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
tree "STREAM2"
if (((per.l(ad:0x02910000+0x80))&0x01)==0x00)
group.long (0x80+0x00)++0x03
line.long 0x00 "STREAM2_CONFIG,Stream 2 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x80+0x04)++0x0B
line.long 0x00 "STREAM2_RATIO_INTEGER_PART,Stream 2 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM2_RATIO_FRAC_PART,Stream 2 Ratio Fractional Part Register"
line.long 0x08 "STREAM2_RATIO_LOCK_STATUS,Stream 2 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x80+0x00)++0x03
line.long 0x00 "STREAM2_CONFIG,Stream 2 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x80+0x04)++0x0B
line.long 0x00 "STREAM2_RATIO_INTEGER_PART,Stream 2 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM2_RATIO_FRAC_PART,Stream 2 Ratio Fractional Part Register"
line.long 0x08 "STREAM2_RATIO_LOCK_STATUS,Stream 2 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x80+0x14)++0x0B
line.long 0x00 "STREAM2_TX_THRESHOLD,Stream 2 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM2_RX_THRESHOLD,Stream 2 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM2_RATIO_COMP,Stream 2 Ratio COMP Register"
rgroup.long (0x80+0x20)++0x03
line.long 0x00 "STREAM2_RX_STATUS,Stream 2 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x80+0x24)++0x03
line.long 0x00 "STREAM2_RX_CIF_CTRL,Stream 2 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x80+0x2C)++0x03
line.long 0x00 "STREAM2_TX_STATUS,Stream 2 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x80+0x30)++0x03
line.long 0x00 "STREAM2_TX_CIF_CTRL,Stream 2 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x80+0x38)++0x07
line.long 0x00 "STREAM2_ENABLE,Stream 2 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM2_SOFT_RESET,Stream 2 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x80+0x4C)++0x03
line.long 0x00 "STREAM2_STATUS,Stream 2 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
tree "STREAM3"
if (((per.l(ad:0x02910000+0x100))&0x01)==0x00)
group.long (0x100+0x00)++0x03
line.long 0x00 "STREAM3_CONFIG,Stream 3 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x100+0x04)++0x0B
line.long 0x00 "STREAM3_RATIO_INTEGER_PART,Stream 3 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM3_RATIO_FRAC_PART,Stream 3 Ratio Fractional Part Register"
line.long 0x08 "STREAM3_RATIO_LOCK_STATUS,Stream 3 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x100+0x00)++0x03
line.long 0x00 "STREAM3_CONFIG,Stream 3 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x100+0x04)++0x0B
line.long 0x00 "STREAM3_RATIO_INTEGER_PART,Stream 3 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM3_RATIO_FRAC_PART,Stream 3 Ratio Fractional Part Register"
line.long 0x08 "STREAM3_RATIO_LOCK_STATUS,Stream 3 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x100+0x14)++0x0B
line.long 0x00 "STREAM3_TX_THRESHOLD,Stream 3 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM3_RX_THRESHOLD,Stream 3 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM3_RATIO_COMP,Stream 3 Ratio COMP Register"
rgroup.long (0x100+0x20)++0x03
line.long 0x00 "STREAM3_RX_STATUS,Stream 3 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x100+0x24)++0x03
line.long 0x00 "STREAM3_RX_CIF_CTRL,Stream 3 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x100+0x2C)++0x03
line.long 0x00 "STREAM3_TX_STATUS,Stream 3 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x100+0x30)++0x03
line.long 0x00 "STREAM3_TX_CIF_CTRL,Stream 3 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x100+0x38)++0x07
line.long 0x00 "STREAM3_ENABLE,Stream 3 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM3_SOFT_RESET,Stream 3 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x100+0x4C)++0x03
line.long 0x00 "STREAM3_STATUS,Stream 3 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
tree "STREAM4"
if (((per.l(ad:0x02910000+0x180))&0x01)==0x00)
group.long (0x180+0x00)++0x03
line.long 0x00 "STREAM4_CONFIG,Stream 4 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x180+0x04)++0x0B
line.long 0x00 "STREAM4_RATIO_INTEGER_PART,Stream 4 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM4_RATIO_FRAC_PART,Stream 4 Ratio Fractional Part Register"
line.long 0x08 "STREAM4_RATIO_LOCK_STATUS,Stream 4 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x180+0x00)++0x03
line.long 0x00 "STREAM4_CONFIG,Stream 4 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x180+0x04)++0x0B
line.long 0x00 "STREAM4_RATIO_INTEGER_PART,Stream 4 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM4_RATIO_FRAC_PART,Stream 4 Ratio Fractional Part Register"
line.long 0x08 "STREAM4_RATIO_LOCK_STATUS,Stream 4 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x180+0x14)++0x0B
line.long 0x00 "STREAM4_TX_THRESHOLD,Stream 4 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM4_RX_THRESHOLD,Stream 4 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM4_RATIO_COMP,Stream 4 Ratio COMP Register"
rgroup.long (0x180+0x20)++0x03
line.long 0x00 "STREAM4_RX_STATUS,Stream 4 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x180+0x24)++0x03
line.long 0x00 "STREAM4_RX_CIF_CTRL,Stream 4 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x180+0x2C)++0x03
line.long 0x00 "STREAM4_TX_STATUS,Stream 4 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x180+0x30)++0x03
line.long 0x00 "STREAM4_TX_CIF_CTRL,Stream 4 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x180+0x38)++0x07
line.long 0x00 "STREAM4_ENABLE,Stream 4 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM4_SOFT_RESET,Stream 4 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x180+0x4C)++0x03
line.long 0x00 "STREAM4_STATUS,Stream 4 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
tree "STREAM5"
if (((per.l(ad:0x02910000+0x200))&0x01)==0x00)
group.long (0x200+0x00)++0x03
line.long 0x00 "STREAM5_CONFIG,Stream 5 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x200+0x04)++0x0B
line.long 0x00 "STREAM5_RATIO_INTEGER_PART,Stream 5 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM5_RATIO_FRAC_PART,Stream 5 Ratio Fractional Part Register"
line.long 0x08 "STREAM5_RATIO_LOCK_STATUS,Stream 5 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x200+0x00)++0x03
line.long 0x00 "STREAM5_CONFIG,Stream 5 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x200+0x04)++0x0B
line.long 0x00 "STREAM5_RATIO_INTEGER_PART,Stream 5 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM5_RATIO_FRAC_PART,Stream 5 Ratio Fractional Part Register"
line.long 0x08 "STREAM5_RATIO_LOCK_STATUS,Stream 5 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x200+0x14)++0x0B
line.long 0x00 "STREAM5_TX_THRESHOLD,Stream 5 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM5_RX_THRESHOLD,Stream 5 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM5_RATIO_COMP,Stream 5 Ratio COMP Register"
rgroup.long (0x200+0x20)++0x03
line.long 0x00 "STREAM5_RX_STATUS,Stream 5 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x200+0x24)++0x03
line.long 0x00 "STREAM5_RX_CIF_CTRL,Stream 5 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x200+0x2C)++0x03
line.long 0x00 "STREAM5_TX_STATUS,Stream 5 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x200+0x30)++0x03
line.long 0x00 "STREAM5_TX_CIF_CTRL,Stream 5 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x200+0x38)++0x07
line.long 0x00 "STREAM5_ENABLE,Stream 5 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM5_SOFT_RESET,Stream 5 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x200+0x4C)++0x03
line.long 0x00 "STREAM5_STATUS,Stream 5 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
tree "STREAM6"
if (((per.l(ad:0x02910000+0x280))&0x01)==0x00)
group.long (0x280+0x00)++0x03
line.long 0x00 "STREAM6_CONFIG,Stream 6 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "  LANE_ID                     ,Lane ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "        RATIO_TYPE          ,Ratio type" "ARAD,Software"
rgroup.long (0x280+0x04)++0x0B
line.long 0x00 "STREAM6_RATIO_INTEGER_PART,Stream 6 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM6_RATIO_FRAC_PART,Stream 6 Ratio Fractional Part Register"
line.long 0x08 "STREAM6_RATIO_LOCK_STATUS,Stream 6 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlocked,Locked"
else
group.long (0x280+0x00)++0x03
line.long 0x00 "STREAM6_CONFIG,Stream 6 Config Register"
bitfld.long 0x00 31. " ENABLE_HW_RATIO_COMP ,Enables hardware to handle the overflow/underflow issues caused by the long term ARAD ratio estimation errors" "Disabled,Enabled"
bitfld.long 0x00 0. "  RATIO_TYPE                  ,Ratio type" "ARAD,Software"
group.long (0x280+0x04)++0x0B
line.long 0x00 "STREAM6_RATIO_INTEGER_PART,Stream 6 Ratio Integer Part Register"
bitfld.long 0x00 0.--4. " RATIO                ,Ratio" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STREAM6_RATIO_FRAC_PART,Stream 6 Ratio Fractional Part Register"
line.long 0x08 "STREAM6_RATIO_LOCK_STATUS,Stream 6 Ratio Lock Status Register"
bitfld.long 0x08 0. " LOCK                 ,Lock" "Unlock,Lock"
endif
group.long (0x280+0x14)++0x0B
line.long 0x00 "STREAM6_TX_THRESHOLD,Stream 6 TX Threshold Register"
bitfld.long 0x00 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 12.--15. "         LOWER_WMARK                 ,Lower watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x00 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x04 "STREAM6_RX_THRESHOLD,Stream 6 RX Threshold Register"
bitfld.long 0x04 20.--23. " NORMAL_WMARK         ,Normal watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 12.--15. "         UPPER_WMARK                 ,Upper watermark" "0,1,2,3,4,5,6,7,8,?..."
bitfld.long 0x04 0.--1. "         WORD_CNT            ,Initial threshold" "0,1,2,3"
line.long 0x08 "STREAM6_RATIO_COMP,Stream 6 Ratio COMP Register"
rgroup.long (0x280+0x20)++0x03
line.long 0x00 "STREAM6_RX_STATUS,Stream 6 RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x280+0x24)++0x03
line.long 0x00 "STREAM6_RX_CIF_CTRL,Stream 6 RX CIF Control Register"
rbitfld.long 0x00 31. " PACK8_ENABLE         ,PACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  PACK16_ENABLE               ,PACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long (0x280+0x2C)++0x03
line.long 0x00 "STREAM6_TX_STATUS,Stream 6 TX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
group.long (0x280+0x30)++0x03
line.long 0x00 "STREAM6_TX_CIF_CTRL,Stream 6 TX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
rbitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
rbitfld.long 0x00 6.--7. "     EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
group.long (0x280+0x38)++0x07
line.long 0x00 "STREAM6_ENABLE,Stream 6 Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enables the stream for processing" "False,True"
line.long 0x04 "STREAM6_SOFT_RESET,Stream 6 Soft Reset Register"
bitfld.long 0x04 0. " ENABLE               ,Enable soft reset" "False,True"
rgroup.long (0x280+0x4C)++0x03
line.long 0x00 "STREAM6_STATUS,Stream 6 Status Register"
bitfld.long 0x00 31. " CONFIG_ERROR         ,Software may check this field to make sure there are no programming errors" "False,True"
bitfld.long 0x00 0. "     ENABLE_STATUS               ,Software may check this to make sure stream number is not used" "False,True"
tree.end
textline "                                      "
group.long 0x2F4++0x0B
line.long 0x00 "GLOBAL_ENB,Global Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Set to enabling the processing of streams" "False,True"
line.long 0x04 "GLOBAL_SOFT_RESET,Global Soft Reset Register"
eventfld.long 0x04 0. " ENABLE               ,Self clearing soft reset" "False,True"
line.long 0x08 "GLOBAL_CG,Global Clock Gating Register"
bitfld.long 0x08 0. " SLCG_ENABLE          ,Second level clock gating enable for ASRC" "False,True"
group.long 0x304++0x03
line.long 0x00 "GLOBAL_SCRATCH_ADDR,Global Scratch Address Register"
group.long 0x30C++0x03
line.long 0x00 "RATIO_UPD_RX_CIF_CTRL,Ratio UPD RX CIF Control Register"
rbitfld.long 0x00 31. " UNPACK8_ENABLE       ,UNPACK8 enable" "Disabled,Enabled"
rbitfld.long 0x00 30. "  UNPACK16_ENABLE             ,UNPACK16 enable" "Disabled,Enabled"
rbitfld.long 0x00 24.--29. "  FIFO_THRESHOLD      ,FIFO threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x00 20.--23. " AXBAR_CHANNELS       ,AXBAR channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
rbitfld.long 0x00 16.--19. "        CLIENT_CHANNELS             ,Client channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 12.--14. "        AXBAR_BITS          ,AXBAR bits" ",8,12,16,20,24,28,32"
textline "                                      "
rbitfld.long 0x00 8.--10. " CLIENT_BITS          ,Client bits" ",8,12,16,20,24,28,32"
rbitfld.long 0x00 6.--7. "        EXPAND                      ,Expand" "Zero,One,LFSR,?..."
rbitfld.long 0x00 4.--5. "      STEREO_CONV         ,Stereo conv" "CH0,CH1,AVG,?..."
textline "                                      "
rbitfld.long 0x00 2. " REPLICATE            ,Replicate" "False,True"
rbitfld.long 0x00 1. "     TRUNCATE                    ,Truncate" "Round,Chop"
rbitfld.long 0x00 0. "     MONO_CONV           ,Mono conv" "Zero,Copy"
rgroup.long 0x310++0x0B
line.long 0x00 "RATIO_UPD_RX_STATUS,Ratio UPD RX Status Register"
bitfld.long 0x00 1. " ACIF_FIFO_FUL        ,Indicates if the CIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     ACIF_FIFO_EMPTY             ,Indicates if the CIF FIFO is empty" "False,True"
line.long 0x04 "GLOBAL_STATUS,Global Status Register"
bitfld.long 0x04 17. " GLOBAL_ENABLED       ,Set to FALSE/TRUE once the hardware has finished disable/enable process" "False,True"
bitfld.long 0x04 4.--7. "     CURRENT_PROCESSING_STREAMID ,Indicates the stream which is currently under processing" ",1,2,3,4,5,6,?..."
bitfld.long 0x04 0. "         SLCG_CLKEN          ,Indicates whether SLCG is currently engaged or not" "False,True"
line.long 0x08 "GLOBAL_STREAM_ENABLE_STATUS,Global Stream Enable Status Register"
bitfld.long 0x08 5. " STREAM6_ENABLED      ,Stream 6 enabled" "False,True"
bitfld.long 0x08 4. "     STREAM5_ENABLED             ,Stream 5 enabled" "False,True"
bitfld.long 0x08 3. "     STREAM4_ENABLED     ,Stream 4 enabled" "False,True"
textline "                                      "
bitfld.long 0x08 2. " STREAM3_ENABLED      ,Stream 3 enabled" "False,True"
bitfld.long 0x08 1. "     STREAM2_ENABLED             ,Stream 2 enabled" "False,True"
bitfld.long 0x08 0. "     STREAM1_ENABLED     ,Stream 1 enabled" "False,True"
group.long 0x324++0x03
line.long 0x00 "GLOBAL_INT_STATUS_SET/CLR,Global Interrupt Status Register"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. " TRANSFER_ERROR       ,When set, indicates that a transfer error has happened at the memory-access interface" "False,True"
group.long 0x328++0x03
line.long 0x00 "GLOBAL_INT_MASK,Global Interrupt Mask Register"
bitfld.long 0x00 0. " TRANSFER_ERROR       ,Enable/disable the interrupt" "False,True"
group.long 0x1000++0x17
line.long 0x00 "GLOBAL_APR_CTRL,Global APR Control Register"
bitfld.long 0x00 2.--3. " AST_REGION_ID        ,AST region ID" "0,1,2,3"
bitfld.long 0x00 0. "         APR_EN                      ,Software can set the APR_EN field to secure the intermediate buffer access" "Disabled,Enabled"
line.long 0x04 "GLOBAL_APR_CTRL_ACCESS_CTRL,Global APT Control Access Control Register"
bitfld.long 0x04 0. " DIS_ACCESS           ,Sticky bit to disable access to APR_CTRL register for non-secure processes" "False,True"
line.long 0x08 "GLOBAL_DISARM_APR,Global Disarm APR Register"
bitfld.long 0x08 5. " DISARM_STREAM_6_APR  ,Disarm stream 6 APR" "False,True"
bitfld.long 0x08 4. "     DISARM_STREAM_5_APR         ,Disarm stream 5 APR" "False,True"
bitfld.long 0x08 3. "     DISARM_STREAM_4_APR ,Disarm stream 4 APR" "False,True"
textline "                                      "
bitfld.long 0x08 2. " DISARM_STREAM_3_APR  ,Disarm stream 3 APR" "False,True"
bitfld.long 0x08 1. "     DISARM_STREAM_2_APR         ,Disarm stream 2 APR" "False,True"
bitfld.long 0x08 0. "     DISARM_STREAM_1_APR ,Disarm stream 1 APR" "False,True"
line.long 0x0C "GLOBAL_DISARM_APR_ACCESS_CTRL,Global Disarm APR Access Control Register"
bitfld.long 0x0C 0. " DIS_ACCESS           ,Disable access to GLOBAL_DISARM_APR register for non-secure processes" "False,True"
line.long 0x10 "GLOBAL_RATIO_WR_ACCESS,Global Ratio Write Access Register"
bitfld.long 0x10 5. " STREAM_6_WR_DIS      ,Stream 6 write disable" "False,True"
bitfld.long 0x10 4. "     STREAM_5_WR_DIS             ,Stream 5 write disable" "False,True"
bitfld.long 0x10 3. "     STREAM_4_WR_DIS     ,Stream 4 write disable" "False,True"
textline "                                      "
bitfld.long 0x10 2. " STREAM_3_WR_DIS      ,Stream 3 write disable" "False,True"
bitfld.long 0x10 1. "     STREAM_2_WR_DIS             ,Stream 2 write disable" "False,True"
bitfld.long 0x10 0. "     STREAM_1_WR_DIS     ,Stream 1 write disable" "False,True"
line.long 0x14 "GLOBAL_RATIO_WR_ACCESS_CTRL,Global Ratio Write Access Control Register"
bitfld.long 0x14 0. " DIS_ACCESS           ,Disable write access to GLOBAL_RATIO_WR_ACCESS for non-secure processes" "False,True"
width 0x0B
tree.end
tree "ARAD"
base ad:0x0290E400
width 37.
group.long 0x00++0x03
line.long 0x00 "LANE_ENABLE,Lane Enable Register"
bitfld.long 0x00 5. " LANE6_ENABLE        ,Lane 6 enable" "False,True"
bitfld.long 0x00 4. "     LANE5_ENABLE        ,Lane 5 enable" "False,True"
bitfld.long 0x00 3. "     LANE4_ENABLE        ,Lane 4 enable" "False,True"
textline "                                              "
bitfld.long 0x00 2. " LANE3_ENABLE        ,Lane 3 enable" "False,True"
bitfld.long 0x00 1. "     LANE2_ENABLE        ,Lane 2 enable" "False,True"
bitfld.long 0x00 0. "     LANE1_ENABLE        ,Lane 1 enable" "False,True"
rgroup.long 0x04++0x03
line.long 0x00 "LANE_STATUS,Lane Status Register"
bitfld.long 0x00 21. " LANE6_LOCK_STATE    ,Lane 6 lock state" "Unlocked,Locked"
bitfld.long 0x00 20. "  LANE5_LOCK_STATE    ,Lane 5 lock state" "Unlocked,Locked"
bitfld.long 0x00 19. "  LANE4_LOCK_STATE    ,Lane 4 lock state" "Unlocked,Locked"
textline "                                              "
bitfld.long 0x00 18. " LANE3_LOCK_STATE    ,Lane 3 lock state" "Unlocked,Locked"
bitfld.long 0x00 17. "  LANE2_LOCK_STATE    ,Lane 2 lock state" "Unlocked,Locked"
bitfld.long 0x00 16. "  LANE1_LOCK_STATE    ,Lane 1 lock state" "Unlocked,Locked"
textline "                                              "
bitfld.long 0x00 5. " LANE6_ENABLED       ,Lane 6 enabled" "False,True"
bitfld.long 0x00 4. "     LANE5_ENABLED       ,Lane 5 enabled" "False,True"
bitfld.long 0x00 3. "     LANE4_ENABLED       ,Lane 4 enabled" "False,True"
textline "                                              "
bitfld.long 0x00 2. " LANE3_ENABLED       ,Lane 3 enabled" "False,True"
bitfld.long 0x00 1. "     LANE2_ENABLED       ,Lane 2 enabled" "False,True"
bitfld.long 0x00 0. "     LANE1_ENABLED       ,Lane 1 enabled" "False,True"
group.long 0x08++0x0B
line.long 0x00 "LANE_SOFT_RESET,Lane Soft Reset Register"
bitfld.long 0x00 5. " LANE6_SOFT_RESET    ,Lane 6 soft reset" "False,True"
bitfld.long 0x00 4. "     LANE5_SOFT_RESET    ,Lane 5 soft reset" "False,True"
bitfld.long 0x00 3. "     LANE4_SOFT_RESET    ,Lane 4 soft reset" "False,True"
textline "                                              "
bitfld.long 0x00 2. " LANE3_SOFT_RESET    ,Lane 3 soft reset" "False,True"
bitfld.long 0x00 1. "     LANE2_SOFT_RESET    ,Lane 2 soft reset" "False,True"
bitfld.long 0x00 0. "     LANE1_SOFT_RESET    ,Lane 1 soft reset" "False,True"
line.long 0x04 "LANE_INT_SET/CLR,Lane Interrupt Register"
setclrfld.long 0x04 21. 0x0C 21. 0x10 21. " LANE6_RATIO_CHANGED ,Lane 6 ratio changed" "False,True"
setclrfld.long 0x04 20. 0x0C 20. 0x10 20. "     LANE5_RATIO_CHANGED ,Lane 5 ratio changed" "False,True"
setclrfld.long 0x04 19. 0x0C 19. 0x10 19. "     LANE4_RATIO_CHANGED ,Lane 4 ratio changed" "False,True"
textline "                                              "
setclrfld.long 0x04 18. 0x0C 18. 0x10 18. " LANE3_RATIO_CHANGED ,Lane 3 ratio changed" "False,True"
setclrfld.long 0x04 17. 0x0C 17. 0x10 17. "     LANE2_RATIO_CHANGED ,Lane 2 ratio changed" "False,True"
setclrfld.long 0x04 16. 0x0C 16. 0x10 16. "     LANE1_RATIO_CHANGED ,Lane 1 ratio changed" "False,True"
textline "                                              "
setclrfld.long 0x04 5. 0x0C 5. 0x10 5. " LANE6_UNLOCKED      ,Lane 6 unlocked" "False,True"
setclrfld.long 0x04 4. 0x0C 4. 0x10 4. "     LANE5_UNLOCKED      ,Lane 5 unlocked" "False,True"
setclrfld.long 0x04 3. 0x0C 3. 0x10 3. "     LANE4_UNLOCKED      ,Lane 4 unlocked" "False,True"
textline "                                              "
setclrfld.long 0x04 2. 0x0C 2. 0x10 2. " LANE3_UNLOCKED      ,Lane 3 unlocked" "False,True"
setclrfld.long 0x04 1. 0x0C 1. 0x10 1. "     LANE2_UNLOCKED      ,Lane 2 unlocked" "False,True"
setclrfld.long 0x04 0. 0x0C 0. 0x10 0. "     LANE1_UNLOCKED      ,Lane 1 unlocked" "False,True"
line.long 0x08 "LANE_INT_MASK,Lane Interrupt Mask Register"
bitfld.long 0x08 21. " LANE6_RATIO_CHANGED ,Lane 6 ratio changed" "False,True"
bitfld.long 0x08 20. "     LANE5_RATIO_CHANGED ,Lane 5 ratio changed" "False,True"
bitfld.long 0x08 19. "     LANE4_RATIO_CHANGED ,Lane 4 ratio changed" "False,True"
textline "                                              "
bitfld.long 0x08 18. " LANE3_RATIO_CHANGED ,Lane 3 ratio changed" "False,True"
bitfld.long 0x08 17. "     LANE2_RATIO_CHANGED ,Lane 2 ratio changed" "False,True"
bitfld.long 0x08 16. "     LANE1_RATIO_CHANGED ,Lane 1 ratio changed" "False,True"
textline "                                              "
bitfld.long 0x08 5. " LANE6_UNLOCKED      ,Lane 6 unlocked" "False,True"
bitfld.long 0x08 4. "     LANE5_UNLOCKED      ,Lane 5 unlocked" "False,True"
bitfld.long 0x08 3. "     LANE4_UNLOCKED      ,Lane 4 unlocked" "False,True"
textline "                                              "
bitfld.long 0x08 2. " LANE3_UNLOCKED      ,Lane 3 unlocked" "False,True"
bitfld.long 0x08 1. "     LANE2_UNLOCKED      ,Lane 2 unlocked" "False,True"
bitfld.long 0x08 0. "     LANE1_UNLOCKED      ,Lane 1 unlocked" "False,True"
group.long 0x1C++0x07
line.long 0x00 "GLOBAL_SOFT_RESET,Global Soft Reset Register"
bitfld.long 0x00 0. " SOFTRESET           ,Soft reset" "False,True"
line.long 0x04 "CG,Clock Gating Register"
bitfld.long 0x04 0. " SLCG_ENABLE         ,SLCG enable" "False,True"
rgroup.long 0x24++0x03
line.long 0x00 "STATUS,Status Register"
bitfld.long 0x00 2. " ACIF_FIFO_EMPTY     ,Indicates if the ACIF FIFO is empty" "False,True"
bitfld.long 0x00 1. "     ACIF_FIFO_FULL      ,Indicates if the ACIF FIFO is full" "False,True"
bitfld.long 0x00 0. "     SLCG_ENABLED        ,SLCG enabled" "False,True"
group.long 0x28++0x03
line.long 0x00 "SEND_RATIO,Send Ratio Register"
bitfld.long 0x00 0. " SEND                ,Send" "False,True"
tree "LANE1"
group.long 0x40++0x0F
line.long 0x00 "LANE1_NUMERATOR_MUX_SEL,Lane 1 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE1_NUMERATOR_PRESCALAR,Lane 1 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE1_DENOMINATOR_MUX_SEL,Lane 1 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE1_DENOMINATOR_PRESCALAR,Lane 1 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0x40+0x10)++0x07
line.long 0x00 "LANE1_RATIO_INTEGER_PART,Lane 1 Ratio Integer Part Register"
line.long 0x04 "LANE1_RATIO_FRACTIONAL_PART,Lane 1 Ratio Fractional Part Register"
tree.end
tree "LANE2"
group.long 0x88++0x0F
line.long 0x00 "LANE2_NUMERATOR_MUX_SEL,Lane 2 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE2_NUMERATOR_PRESCALAR,Lane 2 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE2_DENOMINATOR_MUX_SEL,Lane 2 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE2_DENOMINATOR_PRESCALAR,Lane 2 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0x88+0x10)++0x07
line.long 0x00 "LANE2_RATIO_INTEGER_PART,Lane 2 Ratio Integer Part Register"
line.long 0x04 "LANE2_RATIO_FRACTIONAL_PART,Lane 2 Ratio Fractional Part Register"
tree.end
tree "LANE3"
group.long 0xD0++0x0F
line.long 0x00 "LANE3_NUMERATOR_MUX_SEL,Lane 3 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE3_NUMERATOR_PRESCALAR,Lane 3 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE3_DENOMINATOR_MUX_SEL,Lane 3 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE3_DENOMINATOR_PRESCALAR,Lane 3 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0xD0+0x10)++0x07
line.long 0x00 "LANE3_RATIO_INTEGER_PART,Lane 3 Ratio Integer Part Register"
line.long 0x04 "LANE3_RATIO_FRACTIONAL_PART,Lane 3 Ratio Fractional Part Register"
tree.end
tree "LANE4"
group.long 0x118++0x0F
line.long 0x00 "LANE4_NUMERATOR_MUX_SEL,Lane 4 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE4_NUMERATOR_PRESCALAR,Lane 4 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE4_DENOMINATOR_MUX_SEL,Lane 4 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE4_DENOMINATOR_PRESCALAR,Lane 4 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0x118+0x10)++0x07
line.long 0x00 "LANE4_RATIO_INTEGER_PART,Lane 4 Ratio Integer Part Register"
line.long 0x04 "LANE4_RATIO_FRACTIONAL_PART,Lane 4 Ratio Fractional Part Register"
tree.end
tree "LANE5"
group.long 0x160++0x0F
line.long 0x00 "LANE5_NUMERATOR_MUX_SEL,Lane 5 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE5_NUMERATOR_PRESCALAR,Lane 5 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE5_DENOMINATOR_MUX_SEL,Lane 5 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE5_DENOMINATOR_PRESCALAR,Lane 5 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0x160+0x10)++0x07
line.long 0x00 "LANE5_RATIO_INTEGER_PART,Lane 5 Ratio Integer Part Register"
line.long 0x04 "LANE5_RATIO_FRACTIONAL_PART,Lane 5 Ratio Fractional Part Register"
tree.end
tree "LANE6"
group.long 0x1A8++0x0F
line.long 0x00 "LANE6_NUMERATOR_MUX_SEL,Lane 6 Numerator MUX Select Register"
bitfld.long 0x00 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x00 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x00 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x00 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x00 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x00 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x00 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x00 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x00 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x00 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x00 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x00 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x00 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x00 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x00 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x00 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x04 "LANE6_NUMERATOR_PRESCALAR,Lane 6 Numerator Prescalar Register"
hexmask.long.word 0x04 0.--15. 1. " PRESCALAR           ,Prescalar"
line.long 0x08 "LANE6_DENOMINATOR_MUX_SEL,Lane 6 Denominator MUX Select Register"
bitfld.long 0x08 31. " SPDIF1_TX2_SEL      ,SPDIF1 TX2 select" "False,True"
bitfld.long 0x08 30. "     SPDIF1_TX1_SEL      ,SPDIF1 TX1 select" "False,True"
bitfld.long 0x08 29. "     SPDIF1_RX2_SEL      ,SPDIF1 RX2 select" "False,True"
textline "                                              "
bitfld.long 0x08 28. " SPDIF1_RX1_SEL      ,SPDIF1 RX1 select" "False,True"
bitfld.long 0x08 25. "     DSPK2_SEL           ,DSPK2 select" "False,True"
bitfld.long 0x08 24. "     DSPK1_SEL           ,DSPK1 select" "False,True"
textline "                                              "
bitfld.long 0x08 15. " DMIC4_SEL           ,DMIC4 select" "False,True"
bitfld.long 0x08 14. "     DMIC3_SEL           ,DMIC3 select" "False,True"
bitfld.long 0x08 13. "     DMIC2_SEL           ,DMIC2 select" "False,True"
textline "                                              "
bitfld.long 0x08 12. " DMIC1_SEL           ,DMIC1 select" "False,True"
bitfld.long 0x08 5. "     I2S6_SEL            ,I2S6 select" "False,True"
bitfld.long 0x08 4. "     I2S5_SEL            ,I2S5 select" "False,True"
textline "                                              "
bitfld.long 0x08 3. " I2S4_SEL            ,I2S4 select" "False,True"
bitfld.long 0x08 2. "     I2S3_SEL            ,I2S3 select" "False,True"
bitfld.long 0x08 1. "     I2S2_SEL            ,I2S2 select" "False,True"
textline "                                              "
bitfld.long 0x08 0. " I2S1_SEL            ,I2S1 select" "False,True"
line.long 0x0C "LANE6_DENOMINATOR_PRESCALAR,Lane 6 Denominator Prescalar Register"
hexmask.long.word 0x0C 0.--15. 1. " PRESCALAR           ,Prescalar"
rgroup.long (0x1A8+0x10)++0x07
line.long 0x00 "LANE6_RATIO_INTEGER_PART,Lane 6 Ratio Integer Part Register"
line.long 0x04 "LANE6_RATIO_FRACTIONAL_PART,Lane 6 Ratio Fractional Part Register"
tree.end
width 0x0B
tree.end
tree "DSPK"
tree "DSPK1"
base ad:0x02905000
width 24.
rgroup.long 0x0C++0x03
line.long 0x00 "DSPK_AXBAR_RX_STATUS,DSPK AXBAR Rx Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL      ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY    ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "       RX_ENABLED        ,Rx enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "DSPK_AXBAR_RX_INT,DSPK AXBAR RX Interrupt Register"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. " RX_LOWER_WATERMARK   ,Rx lower watermark" "False,True"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. "       RX_NORMAL_WATERMARK ,Rx normal watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       CODEC_CONFIG_DONE ,Codec config done" "False,True"
textline "                                 "
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "False,True"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "       RX_DONE             ,Rx done" "False,True"
line.long 0x04 "DSPK_AXBAR_RX_INT_MASK,DSPK AXBAR Rx Interrupt Mask Register"
bitfld.long 0x04 4. " RX_LOWER_WATERMARK   ,Rx lower watermark" "Unmasked,Masked"
bitfld.long 0x04 3. "    RX_NORMAL_WATERMARK ,Rx normal watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    CODEC_CONFIG_DONE ,Codec config done" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "Unmasked,Masked"
bitfld.long 0x04 0. "    RX_DONE             ,Rx done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DSPK_AXBAR_RX_CIF_CTRL,DSPK AXBAR RX CIF Control Register"
hexmask.long.byte 0x00 24.--29. 1. " FIFO_THRESHOLD       ,FIFO threshold"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "        CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                 "
bitfld.long 0x00 12.--14. " AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "       EXPAND            ,Expand" "Zero,One,LFSR,?..."
textline "                                 "
bitfld.long 0x00 4.--5. " STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 1. "         TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "       MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DSPK_ENABLE,DSPK Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "False,True"
line.long 0x04 "DSPK_SOFT_RESET,DSPK Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "Disabled,Enabled"
line.long 0x08 "DSPK_CG,DSPK Clock Gating Register"
bitfld.long 0x08 0. " SLCG_ENABLE          ,SLCG enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DSPK_STATUS,DSPK Status Register"
bitfld.long 0x00 14. " CODEC_CONFIG_DONE    ,Codec config done" "False,True"
bitfld.long 0x00 12. "       SLCG_CLKEN          ,SLCG CKLEN" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL   ,RXCIF FIFO full" "False,True"
textline "                                 "
bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY     ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 8. "       RX_ENABLED          ,Rx enabled" "False,True"
line.long 0x04 "DSPK_INT_STATUS,DSPK Interrupt Status Register"
bitfld.long 0x04 14. " RX_LOWER_WATERMARK   ,Rx lower watermark" "False,True"
bitfld.long 0x04 13. "       RX_NORMAL_WATERMARK ,Rx normal watermark" "False,True"
bitfld.long 0x04 12. "       CODEC_CONFIG_DONE ,Codec config done" "False,True"
textline "                                 "
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE             ,Rx done" "False,True"
group.long 0x60++0x3B
line.long 0x00 "DSPK_CORE_CTRL,DSPK Core Control Register"
bitfld.long 0x00 28.--30. " STAGE1_GAIN          ,Stage-1 gain" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "           STAGE2_GAIN         ,Stage-2 gain" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "           STAGE3_GAIN       ,Stage-3 gain" "0,1,2,3,4,5,6,7"
textline "                                 "
bitfld.long 0x00 16. " LOWDELAY_FILTER_MODE ,Low delay filter mode" "Normal,Low delay"
bitfld.long 0x00 8.--9. "   CHANNEL_SELECT      ,Channel select" "No channel,Mono left,Mono right,Stereo"
bitfld.long 0x00 4.--5. "  OSR               ,Oversampling ratio" "32,64,128,256"
textline "                                 "
bitfld.long 0x00 0. " LRSEL_POLARITY       ,LRSEL polarity" "Left,Right"
line.long 0x04 "DSPK_CODEC_CTRL,DSPK Codec Control Register"
bitfld.long 0x04 24.--25. " CHANNEL_SELECT       ,Channel select" "No channel,Mono left,Mono right,Stereo"
bitfld.long 0x04 16. "  BIT_ORDER           ,Bit order" "LSB,MSB"
bitfld.long 0x04 12. "         CODEC_CONFIG_MODE ,Codec config mode" "Disabled,Enabled"
textline "                                 "
hexmask.long.word 0x04 0.--8. 1. " CNFG_REP_NUM         ,Codec control word repetition number"
line.long 0x08 "DSPK_CODEC_DATA,DSPK Codec Data Register"
hexmask.long.byte 0x08 8.--15. 1. " CH1_CONTROL_WORD     ,CH0 codec control word data"
hexmask.long.byte 0x08 0.--7. 1. "          CH0_CONTROL_WORD    ,CH1 codec control word data"
line.long 0x0C "DSPK_CODEC_ENABLE,DSPK Codec Enable Register"
bitfld.long 0x0C 0. " CONFIG_START         ,DSPK codec config start bit" "Disabled,Enabled"
line.long 0x10 "DSPK_CODEC_ENABLE,DSPK Clock Trim Register"
bitfld.long 0x10 0.--4. " TRIMMER_SEL          ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "DSPK_SDM_COEF_A_2,DSPK SDM Coefficients A 2 Register"
hexmask.long.word 0x14 0.--15. 1. " COEF_A_2             ,Coefficient A 2"
line.long 0x18 "DSPK_SDM_COEF_A_3,DSPK SDM Coefficients A 3 Register"
hexmask.long.word 0x18 0.--15. 1. " COEF_A_3             ,Coefficient A 3"
line.long 0x1C "DSPK_SDM_COEF_A_4,DSPK SDM Coefficients A 4 Register"
hexmask.long.word 0x1C 0.--15. 1. " COEF_A_4             ,Coefficient A 4"
line.long 0x20 "DSPK_SDM_COEF_A_5,DSPK SDM Coefficients A 5 Register"
hexmask.long.word 0x20 0.--15. 1. " COEF_A_5             ,Coefficient A 5"
line.long 0x24 "DSPK_SDM_COEF_C_1,DSPK SDM Coefficients C 1 Register"
hexmask.long.word 0x24 0.--15. 1. " COEF_C_1             ,Coefficient C 1"
line.long 0x28 "DSPK_SDM_COEF_C_2,DSPK SDM Coefficients C 2 Register"
hexmask.long.word 0x28 0.--15. 1. " COEF_C_2             ,Coefficient C 2"
line.long 0x2C "DSPK_SDM_COEF_C_3,DSPK SDM Coefficients C 3 Register"
hexmask.long.word 0x2C 0.--15. 1. " COEF_C_3             ,Coefficient C 3"
line.long 0x30 "DSPK_SDM_COEF_C_4,DSPK SDM Coefficients C 4 Register"
hexmask.long.word 0x30 0.--15. 1. " COEF_C_4             ,Coefficient C 4"
line.long 0x34 "DSPK_SDM_COEF_G_1,DSPK SDM Coefficients G 1 Register"
hexmask.long.word 0x34 0.--15. 1. " COEF_G_1             ,Coefficient G 1"
line.long 0x38 "DSPK_SDM_COEF_G_2,DSPK SDM Coefficients G 2 Register"
hexmask.long.word 0x38 0.--15. 1. " COEF_G_2             ,Coefficient G 2"
width 0x0B
tree.end
tree "DSPK2"
base ad:0x02905100
width 24.
rgroup.long 0x0C++0x03
line.long 0x00 "DSPK_AXBAR_RX_STATUS,DSPK AXBAR Rx Status Register"
bitfld.long 0x00 2. " RXCIF_FIFO_FULL      ,RXCIF FIFO full" "False,True"
bitfld.long 0x00 1. "       RXCIF_FIFO_EMPTY    ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 0. "       RX_ENABLED        ,Rx enabled" "False,True"
group.long 0x10++0x07
line.long 0x00 "DSPK_AXBAR_RX_INT,DSPK AXBAR RX Interrupt Register"
setclrfld.long 0x00 4. 0x08 4. 0x0C 4. " RX_LOWER_WATERMARK   ,Rx lower watermark" "False,True"
setclrfld.long 0x00 3. 0x08 3. 0x0C 3. "       RX_NORMAL_WATERMARK ,Rx normal watermark" "False,True"
setclrfld.long 0x00 2. 0x08 2. 0x0C 2. "       CODEC_CONFIG_DONE ,Codec config done" "False,True"
textline "                                 "
setclrfld.long 0x00 1. 0x08 1. 0x0C 1. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "False,True"
setclrfld.long 0x00 0. 0x08 0. 0x0C 0. "       RX_DONE             ,Rx done" "False,True"
line.long 0x04 "DSPK_AXBAR_RX_INT_MASK,DSPK AXBAR Rx Interrupt Mask Register"
bitfld.long 0x04 4. " RX_LOWER_WATERMARK   ,Rx lower watermark" "Unmasked,Masked"
bitfld.long 0x04 3. "    RX_NORMAL_WATERMARK ,Rx normal watermark" "Unmasked,Masked"
bitfld.long 0x04 2. "    CODEC_CONFIG_DONE ,Codec config done" "Unmasked,Masked"
textline "                                 "
bitfld.long 0x04 1. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "Unmasked,Masked"
bitfld.long 0x04 0. "    RX_DONE             ,Rx done" "Unmasked,Masked"
group.long 0x20++0x03
line.long 0x00 "DSPK_AXBAR_RX_CIF_CTRL,DSPK AXBAR RX CIF Control Register"
hexmask.long.byte 0x00 24.--29. 1. " FIFO_THRESHOLD       ,FIFO threshold"
bitfld.long 0x00 20.--23. "          AXBAR_CHANNELS      ,AXBAR channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
bitfld.long 0x00 16.--19. "        CLIENT_CHANNELS   ,Client channels" "CH1,CH2,CH3,CH4,CH5,CH6,CH7,CH8,CH9,CH10,CH11,CH12,CH13,CH14,CH15,CH16"
textline "                                 "
bitfld.long 0x00 12.--14. " AXBAR_BITS           ,AXBAR bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 8.--10. "       CLIENT_BITS         ,Client bits" ",BIT8,BIT12,BIT16,BIT20,BIT24,BIT28,BIT32"
bitfld.long 0x00 6.--7. "       EXPAND            ,Expand" "Zero,One,LFSR,?..."
textline "                                 "
bitfld.long 0x00 4.--5. " STEREO_CONV          ,Stereo conv" "CH0,CH1,AVG,?..."
bitfld.long 0x00 1. "         TRUNCATE            ,Truncate" "Round,Chop"
bitfld.long 0x00 0. "       MONO_CONV         ,Mono conv" "Zero,Copy"
group.long 0x40++0x0B
line.long 0x00 "DSPK_ENABLE,DSPK Enable Register"
bitfld.long 0x00 0. " ENABLE               ,Enable" "False,True"
line.long 0x04 "DSPK_SOFT_RESET,DSPK Soft Reset Register"
bitfld.long 0x04 0. " SOFT_RESET           ,Soft reset" "Disabled,Enabled"
line.long 0x08 "DSPK_CG,DSPK Clock Gating Register"
bitfld.long 0x08 0. " SLCG_ENABLE          ,SLCG enable" "False,True"
rgroup.long 0x4C++0x07
line.long 0x00 "DSPK_STATUS,DSPK Status Register"
bitfld.long 0x00 14. " CODEC_CONFIG_DONE    ,Codec config done" "False,True"
bitfld.long 0x00 12. "       SLCG_CLKEN          ,SLCG CKLEN" "False,True"
bitfld.long 0x00 10. "       RXCIF_FIFO_FULL   ,RXCIF FIFO full" "False,True"
textline "                                 "
bitfld.long 0x00 9. " RXCIF_FIFO_EMPTY     ,RXCIF FIFO empty" "False,True"
bitfld.long 0x00 8. "       RX_ENABLED          ,Rx enabled" "False,True"
line.long 0x04 "DSPK_INT_STATUS,DSPK Interrupt Status Register"
bitfld.long 0x04 14. " RX_LOWER_WATERMARK   ,Rx lower watermark" "False,True"
bitfld.long 0x04 13. "       RX_NORMAL_WATERMARK ,Rx normal watermark" "False,True"
bitfld.long 0x04 12. "       CODEC_CONFIG_DONE ,Codec config done" "False,True"
textline "                                 "
bitfld.long 0x04 9. " RXCIF_FIFO_UNDERRUN  ,RXCIF FIFO underrun" "False,True"
bitfld.long 0x04 8. "       RX_DONE             ,Rx done" "False,True"
group.long 0x60++0x3B
line.long 0x00 "DSPK_CORE_CTRL,DSPK Core Control Register"
bitfld.long 0x00 28.--30. " STAGE1_GAIN          ,Stage-1 gain" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. "           STAGE2_GAIN         ,Stage-2 gain" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20.--22. "           STAGE3_GAIN       ,Stage-3 gain" "0,1,2,3,4,5,6,7"
textline "                                 "
bitfld.long 0x00 16. " LOWDELAY_FILTER_MODE ,Low delay filter mode" "Normal,Low delay"
bitfld.long 0x00 8.--9. "   CHANNEL_SELECT      ,Channel select" "No channel,Mono left,Mono right,Stereo"
bitfld.long 0x00 4.--5. "  OSR               ,Oversampling ratio" "32,64,128,256"
textline "                                 "
bitfld.long 0x00 0. " LRSEL_POLARITY       ,LRSEL polarity" "Left,Right"
line.long 0x04 "DSPK_CODEC_CTRL,DSPK Codec Control Register"
bitfld.long 0x04 24.--25. " CHANNEL_SELECT       ,Channel select" "No channel,Mono left,Mono right,Stereo"
bitfld.long 0x04 16. "  BIT_ORDER           ,Bit order" "LSB,MSB"
bitfld.long 0x04 12. "         CODEC_CONFIG_MODE ,Codec config mode" "Disabled,Enabled"
textline "                                 "
hexmask.long.word 0x04 0.--8. 1. " CNFG_REP_NUM         ,Codec control word repetition number"
line.long 0x08 "DSPK_CODEC_DATA,DSPK Codec Data Register"
hexmask.long.byte 0x08 8.--15. 1. " CH1_CONTROL_WORD     ,CH0 codec control word data"
hexmask.long.byte 0x08 0.--7. 1. "          CH0_CONTROL_WORD    ,CH1 codec control word data"
line.long 0x0C "DSPK_CODEC_ENABLE,DSPK Codec Enable Register"
bitfld.long 0x0C 0. " CONFIG_START         ,DSPK codec config start bit" "Disabled,Enabled"
line.long 0x10 "DSPK_CODEC_ENABLE,DSPK Clock Trim Register"
bitfld.long 0x10 0.--4. " TRIMMER_SEL          ,Clock trimmer for master mode I2S clock output to pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "DSPK_SDM_COEF_A_2,DSPK SDM Coefficients A 2 Register"
hexmask.long.word 0x14 0.--15. 1. " COEF_A_2             ,Coefficient A 2"
line.long 0x18 "DSPK_SDM_COEF_A_3,DSPK SDM Coefficients A 3 Register"
hexmask.long.word 0x18 0.--15. 1. " COEF_A_3             ,Coefficient A 3"
line.long 0x1C "DSPK_SDM_COEF_A_4,DSPK SDM Coefficients A 4 Register"
hexmask.long.word 0x1C 0.--15. 1. " COEF_A_4             ,Coefficient A 4"
line.long 0x20 "DSPK_SDM_COEF_A_5,DSPK SDM Coefficients A 5 Register"
hexmask.long.word 0x20 0.--15. 1. " COEF_A_5             ,Coefficient A 5"
line.long 0x24 "DSPK_SDM_COEF_C_1,DSPK SDM Coefficients C 1 Register"
hexmask.long.word 0x24 0.--15. 1. " COEF_C_1             ,Coefficient C 1"
line.long 0x28 "DSPK_SDM_COEF_C_2,DSPK SDM Coefficients C 2 Register"
hexmask.long.word 0x28 0.--15. 1. " COEF_C_2             ,Coefficient C 2"
line.long 0x2C "DSPK_SDM_COEF_C_3,DSPK SDM Coefficients C 3 Register"
hexmask.long.word 0x2C 0.--15. 1. " COEF_C_3             ,Coefficient C 3"
line.long 0x30 "DSPK_SDM_COEF_C_4,DSPK SDM Coefficients C 4 Register"
hexmask.long.word 0x30 0.--15. 1. " COEF_C_4             ,Coefficient C 4"
line.long 0x34 "DSPK_SDM_COEF_G_1,DSPK SDM Coefficients G 1 Register"
hexmask.long.word 0x34 0.--15. 1. " COEF_G_1             ,Coefficient G 1"
line.long 0x38 "DSPK_SDM_COEF_G_2,DSPK SDM Coefficients G 2 Register"
hexmask.long.word 0x38 0.--15. 1. " COEF_G_2             ,Coefficient G 2"
width 0x0B
tree.end
tree.end
tree.end
tree "USB COMPLEX"
tree "PADCTL Registers"
base ad:0x03520000
width 17.
group.long 0x00++0x17
line.long 0x00 "BOOT_MEDIA_0,XUSB PADCTL BOOT MEDIA"
bitfld.long 0x00 1.--4. " BOOT_PORT           ,BOOT PORT" "OTG0,OTG1,OTG2,OTG3,OTG4,OTG5,OTG6,,,HSIC0,HSIC1,?..."
bitfld.long 0x00 0. "               BOOT_MEDIA_ENABLE  ,BOOT MEDIA enable" "Disabled,Enabled"
line.long 0x04 "USB2_PAD_MUX_0,XUSB PADCTL USB2 PAD MUX 0"
bitfld.long 0x04 21. " HSIC_PORT1_CONFIG   ,HSIC PORT1 CONFIG" "HSIC,HSIC_PLUS"
bitfld.long 0x04 20. "           HSIC_PORT0_CONFIG  ,HSIC PORT0 CONFIG" "HSIC,HSIC_PLUS"
textline "                          "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x04 18.--19. " USB2_BIAS_PAD       ,USB2 BIAS PAD" "SNPS,XUSB,UART,?..."
bitfld.long 0x04 16.--17. "                HSIC_PAD_TRK       ,HSIC PAD TRK" "SNPS,XUSB,UART,?..."
bitfld.long 0x04 15. "                USB2_HSIC_PAD_PORT1 ,USB2 HSIC PAD PORT1" "SNPS,XUSB"
textline "                          "
bitfld.long 0x04 14. " USB2_HSIC_PAD_PORT0 ,USB2 HSIC PAD PORT0" "SNPS,XUSB"
bitfld.long 0x04 6.--7. "                USB2_OTG_PAD_PORT3 ,USB2 OTG PAD PORT3" "SNPS,XUSB,UART,?..."
textline "                          "
endif
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 4.--5. " USB2_OTG_PAD_PORT2  ,USB2 OTG PAD PORT2" ",XUSB,UART,?..."
bitfld.long 0x04 2.--3. "                USB2_OTG_PAD_PORT1 ,USB2 OTG PAD PORT1" ",XUSB,UART,?..."
textline "                          "
bitfld.long 0x04 0.--1. " USB2_OTG_PAD_PORT0  ,USB2 OTG PAD PORT0" ",XUSB,UART,?..."
else
bitfld.long 0x04 4.--5. " USB2_OTG_PAD_PORT2  ,USB2 OTG PAD PORT2" "SNPS,XUSB,UART,?..."
bitfld.long 0x04 2.--3. "                USB2_OTG_PAD_PORT1 ,USB2 OTG PAD PORT1" "SNPS,XUSB,UART,"
textline "                          "
bitfld.long 0x04 0.--1. " USB2_OTG_PAD_PORT0  ,USB2 OTG PAD PORT0" "SNPS,XUSB,UART,?..."
endif
line.long 0x08 "USB2_PORT_CAP_0,XUSB PADCTL USB2 PORT CAP 0"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x08 15. " PORT3_REVERSE_ID    ,PORT3 REVERSE ID" "No,Yes"
bitfld.long 0x08 14. "                 PORT3_INTERNAL     ,PORT3 INTERNAL" "No,Yes"
bitfld.long 0x08 12.--13. "                 PORT3_CAP           ,PORT3 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
textline "                          "
endif
bitfld.long 0x08 11. " PORT2_REVERSE_ID    ,PORT2 REVERSE ID" "No,Yes"
bitfld.long 0x08 10. "                 PORT2_INTERNAL     ,PORT2 INTERNAL" "No,Yes"
bitfld.long 0x08 8.--9. "                 PORT2_CAP           ,PORT2 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
textline "                          "
bitfld.long 0x08 7. " PORT1_REVERSE_ID    ,PORT1 REVERSE ID" "No,Yes"
bitfld.long 0x08 6. "                 PORT1_INTERNAL     ,PORT1 INTERNAL" "No,Yes"
bitfld.long 0x08 4.--5. "                 PORT1_CAP           ,PORT1 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
textline "                          "
bitfld.long 0x08 3. " PORT0_REVERSE_ID    ,PORT0 REVERSE ID" "No,Yes"
bitfld.long 0x08 2. "                 PORT0_INTERNAL     ,PORT0 INTERNAL" "No,Yes"
bitfld.long 0x08 0.--1. "                 PORT0_CAP           ,PORT0 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
sif (!cpuis("TEGRAX2"))
group.long 0x0C++0x03
line.long 0x00 "SNPS_OC_MAP_0,XUSB PADCTL SNPS OC MAP"
bitfld.long 0x00 0.--3. " CONTROLLER1_OC_PIN  ,CONTROLLER1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
else
group.long 0x0C++0x03
line.long 0x00 "SS_PORT_CAP_0,SS_PORT_CAP_0"
bitfld.long 0x00 11. " PORT2_REVERSE_ID    ,PORT2 REVERSE ID" "No,Yes"
bitfld.long 0x00 10. "                 PORT2_INTERNAL     ,PORT2 INTERNAL" "No,Yes"
bitfld.long 0x00 8.--9. "                 PORT2_CAP           ,PORT2 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
textline "                          "
bitfld.long 0x00 7. " PORT1_REVERSE_ID    ,PORT1 REVERSE ID" "No,Yes"
bitfld.long 0x00 6. "                 PORT1_INTERNAL     ,PORT1 INTERNAL" "No,Yes"
bitfld.long 0x00 4.--5. "                 PORT1_CAP           ,PORT1 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
textline "                          "
bitfld.long 0x00 3. " PORT0_REVERSE_ID    ,PORT0 REVERSE ID" "No,Yes"
bitfld.long 0x00 2. "                 PORT0_INTERNAL     ,PORT0 INTERNAL" "No,Yes"
bitfld.long 0x00 0.--1. "                 PORT0_CAP           ,PORT0 CAP" "Disabled,HOST_ONLY,DEVICE_ONLY,OTG_CAP"
endif
group.long 0x10++0x03
line.long 0x00 "USB2_OC_MAP_0,USB2 OC MAP Register"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x00 12.--15. " PORT3_OC_PIN        ,PORT3 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
textline "                          "
endif
bitfld.long 0x00 8.--11. " PORT2_OC_PIN        ,PORT2 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 4.--7. "  PORT1_OC_PIN       ,PORT1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
textline "                          "
bitfld.long 0x00 0.--3. " PORT0_OC_PIN        ,PORT0 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
sif (!cpuis("TEGRAX2"))
group.long 0x14++0x03
line.long 0x00 "SS_PORT_MAP_0,XUSB PADCTL SS PORT MAP 0"
bitfld.long 0x00 19. " PORT3_INTERNAL      ,PORT3 INTERNAL" "No,Yes"
bitfld.long 0x00 15.--18. "                 PORT3_MAP          ,PORT3 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..."
bitfld.long 0x00 14. "       PORT2_INTERNAL      ,PORT2 INTERNAL" "No,Yes"
textline "                          "
bitfld.long 0x00 10.--13. " PORT2_MAP           ,PORT2 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..."
bitfld.long 0x00 9. "       PORT1_INTERNAL     ,PORT1 INTERNAL" "No,Yes"
bitfld.long 0x00 5.--8. "                 PORT1_MAP           ,PORT1 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..."
textline "                          "
bitfld.long 0x00 4. " PORT0_INTERNAL      ,PORT0 INTERNAL" "No,Yes"
bitfld.long 0x00 0.--3. "                 PORT0_MAP          ,PORT0 MAP" "USB2_PORT0,USB2_PORT1,USB2_PORT2,USB2_PORT3,,,,INIT_DISABLED,?..."
else
group.long 0x14++0x03
line.long 0x00 "SS_OC_MAP_0,SS OC MAP Register"
bitfld.long 0x00 8.--11. " PORT2_OC_PIN        ,PORT2 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 4.--7. "  PORT1_OC_PIN       ,PORT1 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
textline "                          "
bitfld.long 0x00 0.--3. " PORT0_OC_PIN        ,PORT0 OC PIN" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
endif
width 28.
textline "                                     "
group.long 0x18++0x1F
line.long 0x00 "VBUS_OC_MAP_0,VBUS OC MAP 0"
bitfld.long 0x00 16.--19. " VBUS_ENABLE3_OC_MAP                   ,VBUS ENABLE3 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 15. "  VBUS_ENABLE3                          ,VBUS ENABLE3" "No,Yes"
textline "                                     "
bitfld.long 0x00 11.--14. " VBUS_ENABLE2_OC_MAP                   ,VBUS ENABLE2 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 10. "  VBUS_ENABLE2                          ,VBUS ENABLE2" "No,Yes"
textline "                                     "
bitfld.long 0x00 6.--9. " VBUS_ENABLE1_OC_MAP                   ,VBUS ENABLE1 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 5. "  VBUS_ENABLE1                          ,VBUS ENABLE1" "No,Yes"
textline "                                     "
bitfld.long 0x00 1.--4. " VBUS_ENABLE0_OC_MAP                   ,VBUS ENABLE0 OC MAP" "DETECTED0,DETECTED1,DETECTED2,DETECTED3,DETECTED_VBUS_PAD0,DETECTED_VBUS_PAD1,DETECTED_VBUS_PAD2,DETECTED_VBUS_PAD3,,,,,,,,Disabled"
bitfld.long 0x00 0. "  VBUS_ENABLE0                          ,VBUS ENABLE0" "No,Yes"
line.long 0x04 "OC_DET_0,XOC DET 0"
bitfld.long 0x04 27. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD3 ,OC DETECTED INTERRUPT ENABLE VBUSPAD3" "No,Yes"
bitfld.long 0x04 26. "                 OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD2 ,OC DETECTED INTERRUPT ENABLE VBUSPAD2" "No,Yes"
textline "                                     "
bitfld.long 0x04 25. " OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD1 ,OC DETECTED INTERRUPT ENABLE VBUSPAD1" "No,Yes"
bitfld.long 0x04 24. "                 OC_DETECTED_INTERRUPT_ENABLE_VBUSPAD0 ,OC DETECTED INTERRUPT ENABLE VBUSPAD0" "No,Yes"
textline "                                     "
bitfld.long 0x04 23. " OC_DETECTED_INTERRUPT_ENABLE3         ,OC DETECTED INTERRUPT ENABLE3" "No,Yes"
bitfld.long 0x04 22. "                 OC_DETECTED_INTERRUPT_ENABLE2         ,OC DETECTED INTERRUPT ENABLE2" "No,Yes"
textline "                                     "
bitfld.long 0x04 21. " OC_DETECTED_INTERRUPT_ENABLE1         ,OC DETECTED INTERRUPT ENABLE1" "No,Yes"
bitfld.long 0x04 20. "                 OC_DETECTED_INTERRUPT_ENABLE0         ,OC DETECTED INTERRUPT ENABLE0" "No,Yes"
textline "                                     "
bitfld.long 0x04 15. " OC_DETECTED_VBUS_PAD3                 ,OC DETECTED VBUS PAD3" "No,Yes"
bitfld.long 0x04 14. "                 OC_DETECTED_VBUS_PAD2                 ,OC DETECTED VBUS PAD2" "No,Yes"
textline "                                     "
bitfld.long 0x04 13. " OC_DETECTED_VBUS_PAD1                 ,OC DETECTED VBUS PAD1" "No,Yes"
bitfld.long 0x04 12. "                 OC_DETECTED_VBUS_PAD0                 ,OC DETECTED VBUS PAD0" "No,Yes"
textline "                                     "
bitfld.long 0x04 11. " OC_DETECTED3                          ,OC DETECTED3" "No,Yes"
bitfld.long 0x04 10. "                 OC_DETECTED2                          ,OC DETECTED2" "No,Yes"
textline "                                     "
bitfld.long 0x04 9. " OC_DETECTED1                          ,OC DETECTED1" "No,Yes"
bitfld.long 0x04 8. "                 OC_DETECTED0                          ,OC DETECTED0" "No,Yes"
textline "                                     "
bitfld.long 0x04 3. " SET_OC_DETECTED3                      ,SET OC DETECTED3" "No,Yes"
bitfld.long 0x04 2. "                 SET_OC_DETECTED2                      ,SET OC DETECTED2" "No,Yes"
textline "                                     "
bitfld.long 0x04 1. " SET_OC_DETECTED1                      ,SET OC DETECTED1" "No,Yes"
bitfld.long 0x04 0. "                 SET_OC_DETECTED0                      ,SET OC DETECTED0" "No,Yes"
line.long 0x08 "ELPG_PROGRAM_0_0,ELPG PROGRAM 0 0"
bitfld.long 0x08 31. " USB2_HSIC_PORT1_WAKEUP_EVENT          ,USB2 HSIC PORT1 WAKEUP EVENT" "No,Yes"
bitfld.long 0x08 30. "                 USB2_HSIC_PORT0_WAKEUP_EVENT          ,USB2 HSIC PORT0 WAKEUP EVENT" "No,Yes"
textline "                                     "
bitfld.long 0x08 29. " USB2_HSIC_PORT1_WAKE_INTERRUPT_ENABLE ,USB2 HSIC PORT1 WAKE INTERRUPT ENABLE" "No,Yes"
bitfld.long 0x08 28. "                 USB2_HSIC_PORT0_WAKE_INTERRUPT_ENABLE ,USB2 HSIC PORT0 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x08 24. " SS_PORT3_WAKEUP_EVENT                 ,SS PORT3 WAKEUP EVENT" "No,Yes"
textline "                                     "
endif
bitfld.long 0x08 23. " SS_PORT2_WAKEUP_EVENT                 ,SS PORT2 WAKEUP EVENT" "No,Yes"
textline "                                     "
bitfld.long 0x08 22. " SS_PORT1_WAKEUP_EVENT                 ,SS PORT1 WAKEUP EVENT" "No,Yes"
bitfld.long 0x08 21. "                 SS_PORT0_WAKEUP_EVENT                 ,SS PORT0 WAKEUP EVENT" "No,Yes"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x08 17. " SS_PORT3_WAKE_INTERRUPT_ENABLE        ,SS PORT3 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
endif
bitfld.long 0x08 16. " SS_PORT2_WAKE_INTERRUPT_ENABLE        ,SS PORT2 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
bitfld.long 0x08 15. " SS_PORT1_WAKE_INTERRUPT_ENABLE        ,SS PORT1 WAKE INTERRUPT ENABLE" "No,Yes"
bitfld.long 0x08 14. "                 SS_PORT0_WAKE_INTERRUPT_ENABLE        ,SS PORT0 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x08 10. " USB2_PORT3_WAKEUP_EVENT               ,USB2 PORT3 WAKEUP EVENT" "No,Yes"
textline "                                     "
endif
bitfld.long 0x08 9. " USB2_PORT2_WAKEUP_EVENT               ,USB2 PORT2 WAKEUP EVENT" "No,Yes"
textline "                                     "
bitfld.long 0x08 8. " USB2_PORT1_WAKEUP_EVENT               ,USB2 PORT1 WAKEUP EVENT" "No,Yes"
bitfld.long 0x08 7. "                 USB2_PORT0_WAKEUP_EVENT               ,USB2 PORT0 WAKEUP EVENT" "No,Yes"
textline "                                     "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x08 3. " USB2_PORT3_WAKE_INTERRUPT_ENABLE      ,USB2 PORT3 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
endif
bitfld.long 0x08 2. " USB2_PORT2_WAKE_INTERRUPT_ENABLE      ,USB2 PORT2 WAKE INTERRUPT ENABLE" "No,Yes"
textline "                                     "
bitfld.long 0x08 1. " USB2_PORT1_WAKE_INTERRUPT_ENABLE      ,USB2 PORT1 WAKE INTERRUPT ENABLE" "No,Yes"
bitfld.long 0x08 0. "                 USB2_PORT0_WAKE_INTERRUPT_ENABLE      ,USB2 PORT0 WAKE INTERRUPT ENABLE" "No,Yes"
line.long 0x0C "ELPG_PROGRAM_1_0,ELPG PROGRAM 1 0"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 31. " AUX_MUX_LP0_VCORE_DOWN                ,AUX MUX LP0 VCORE DOWN" "No,Yes"
bitfld.long 0x0C 30. "                 AUX_MUX_LP0_CLAMP_EN_EARLY            ,AUX MUX LP0 CLAMP EN EARLY" "No,Yes"
textline "                                     "
bitfld.long 0x0C 29. " AUX_MUX_LP0_CLAMP_EN                  ,AUX MUX LP0 CLAMP EN" "No,Yes"
textline "                                     "
endif
bitfld.long 0x0C 11. " SSP3_ELPG_VCORE_DOWN                  ,SSP3 ELPG VCORE DOWN" "No,Yes"
textline "                                     "
bitfld.long 0x0C 10. " SSP3_ELPG_CLAMP_EN_EARLY              ,SSP3 ELPG CLAMP EN EARLY" "No,Yes"
bitfld.long 0x0C 9. "                 SSP3_ELPG_CLAMP_EN                    ,SSP3 ELPG CLAMP EN" "No,Yes"
textline "                                     "
bitfld.long 0x0C 8. " SSP2_ELPG_VCORE_DOWN                  ,SSP2 ELPG VCORE DOWN" "No,Yes"
bitfld.long 0x0C 7. "                 SSP2_ELPG_CLAMP_EN_EARLY              ,SSP2 ELPG CLAMP EN EARLY" "No,Yes"
textline "                                     "
bitfld.long 0x0C 6. " SSP2_ELPG_CLAMP_EN                    ,SSP2 ELPG CLAMP EN" "No,Yes"
bitfld.long 0x0C 5. "                 SSP1_ELPG_VCORE_DOWN                  ,SSP1 ELPG VCORE DOWN" "No,Yes"
textline "                                     "
bitfld.long 0x0C 4. " SSP1_ELPG_CLAMP_EN_EARLY              ,SSP1 ELPG CLAMP EN EARLY" "No,Yes"
bitfld.long 0x0C 3. "                 SSP1_ELPG_CLAMP_EN                    ,SSP1 ELPG CLAMP EN" "No,Yes"
textline "                                     "
bitfld.long 0x0C 2. " SSP0_ELPG_VCORE_DOWN                  ,SSP0 ELPG VCORE DOWN" "No,Yes"
bitfld.long 0x0C 1. "                 SSP0_ELPG_CLAMP_EN_EARLY              ,SSP0 ELPG CLAMP EN EARLY" "No,Yes"
textline "                                     "
bitfld.long 0x0C 0. " SSP0_ELPG_CLAMP_EN                    ,SSP0 ELPG CLAMP EN" "No,Yes"
sif (!cpuis("TEGRAX2"))
group.long 0x28++0x0F
line.long 0x00 "USB3_PAD_MUX_0,USB3 PAD MUX 0"
bitfld.long 0x00 30.--31. " SATA_PAD_LANE0                        ,SATA PAD LANE0" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
bitfld.long 0x00 24.--25. "             PCIE_PAD_LANE6                        ,PCIE PAD LANE6" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
textline "                                     "
bitfld.long 0x00 22.--23. " PCIE_PAD_LANE5                        ,PCIE PAD LANE5" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
bitfld.long 0x00 20.--21. "             PCIE_PAD_LANE4                        ,PCIE PAD LANE4" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
textline "                                     "
bitfld.long 0x00 18.--19. " PCIE_PAD_LANE3                        ,PCIE PAD LANE3" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
bitfld.long 0x00 16.--17. "             PCIE_PAD_LANE2                        ,PCIE PAD LANE2" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
textline "                                     "
bitfld.long 0x00 14.--15. " PCIE_PAD_LANE1                        ,PCIE PAD LANE1" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
bitfld.long 0x00 12.--13. "             PCIE_PAD_LANE0                        ,PCIE PAD LANE0" "PCIE_X1,USB3_SS,SATA,PCIE_X4"
textline "                                     "
bitfld.long 0x00 8. " FORCE_SATA_PAD_IDDQ_DISABLE_MASK0     ,FORCE SATA PAD IDDQ DISABLE MASK0" "Disabled,Enabled"
bitfld.long 0x00 7. "            FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6     ,FORCE PCIE PAD IDDQ DISABLE MASK6" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 6. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5     ,FORCE PCIE PAD IDDQ DISABLE MASK5" "Disabled,Enabled"
bitfld.long 0x00 5. "            FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4     ,FORCE PCIE PAD IDDQ DISABLE MASK4" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3     ,FORCE PCIE PAD IDDQ DISABLE MASK3" "Disabled,Enabled"
bitfld.long 0x00 3. "            FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2     ,FORCE PCIE PAD IDDQ DISABLE MASK2" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 2. " FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1     ,FORCE PCIE PAD IDDQ DISABLE MASK1" "Disabled,Enabled"
bitfld.long 0x00 1. "            FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0     ,FORCE PCIE PAD IDDQ DISABLE MASK0" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 0. " FORCE_PCIE_PAD_IDDQ_DISABLE           ,FORCE PCIE PAD IDDQ DISABLE" "Disabled,Enabled"
line.long 0x04 "WAKE_CTRL_0,Wake logic AUX RDET CLK FORCE ON"
bitfld.long 0x04 7. " LANE_S0_FORCE_TX_RDET_CLK_ENABLE      ,LANE S0 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
bitfld.long 0x04 6. "            LANE_P6_FORCE_TX_RDET_CLK_ENABLE      ,LANE P6 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 5. " LANE_P5_FORCE_TX_RDET_CLK_ENABLE      ,LANE P5 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
bitfld.long 0x04 4. "            LANE_P4_FORCE_TX_RDET_CLK_ENABLE      ,LANE P4 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 3. " LANE_P3_FORCE_TX_RDET_CLK_ENABLE      ,LANE P3 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
bitfld.long 0x04 2. "            LANE_P2_FORCE_TX_RDET_CLK_ENABLE      ,LANE P2 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " LANE_P1_FORCE_TX_RDET_CLK_ENABLE      ,LANE P1 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
bitfld.long 0x04 0. "            LANE_P0_FORCE_TX_RDET_CLK_ENABLE      ,LANE P0 FORCE TX RDET CLK ENABLE" "Disabled,Enabled"
line.long 0x08 "XUSB_PADCTL_PM_SPARE_0,PAD MACRO SPARE BITS"
bitfld.long 0x08 11. " HSIC_PM_SPARE_BIT3                    ,HSIC PM SPARE BIT3" "0,1"
bitfld.long 0x08 10. "                   HSIC_PM_SPARE_BIT2                    ,HSIC PM SPARE BIT2" "0,1"
textline "                                     "
bitfld.long 0x08 9. " HSIC_PM_SPARE_BIT1                    ,HSIC PM SPARE BIT1" "0,1"
bitfld.long 0x08 8. "                   HSIC_PM_SPARE_BIT0                    ,HSIC PM SPARE BIT0" "0,1"
textline "                                     "
bitfld.long 0x08 3. " OTG_PM_SPARE_BIT3                     ,OTG PM SPARE BIT3" "0,1"
bitfld.long 0x08 2. "                   OTG_PM_SPARE_BIT2                     ,OTG PM SPARE BIT2" "0,1"
textline "                                     "
bitfld.long 0x08 1. " OTG_PM_SPARE_BIT1                     ,OTG PM SPARE BIT1" "0,1"
bitfld.long 0x08 0. "                   OTG_PM_SPARE_BIT0                     ,OTG PM SPARE BIT0" "0,1"
line.long 0x0C "XUSB_PADCTL_UPHY_CFG_STB_0,XUSB PADCTL UPHY CFG STB 0"
bitfld.long 0x0C 6.--11. " ASSERT_DLY                            ,ASSERT DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                  PULSE_WIDTH                           ,PULSE WIDTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.long 0x28++0x03
line.long 0x00 "PM_SPARE_0,PM SPARE 0"
bitfld.long 0x00 11. " HSIC_PM_SPARE_BIT3                    ,HSIC PM SPARE BIT3" "0,1"
bitfld.long 0x00 10. "                   HSIC_PM_SPARE_BIT2                    ,HSIC PM SPARE BIT2" "0,1"
textline "                                     "
bitfld.long 0x00 9. " HSIC_PM_SPARE_BIT1                    ,HSIC PM SPARE BIT1" "0,1"
bitfld.long 0x00 8. "                   HSIC_PM_SPARE_BIT0                    ,HSIC PM SPARE BIT0" "0,1"
textline "                                     "
bitfld.long 0x00 3. " OTG_PM_SPARE_BIT3                     ,OTG PM SPARE BIT3" "0,1"
bitfld.long 0x00 2. "                   OTG_PM_SPARE_BIT2                     ,OTG PM SPARE BIT2" "0,1"
textline "                                     "
bitfld.long 0x00 1. " OTG_PM_SPARE_BIT1                     ,OTG PM SPARE BIT1" "0,1"
bitfld.long 0x00 0. "                   OTG_PM_SPARE_BIT0                     ,OTG PM SPARE BIT0" "0,1"
endif
width 32.
tree "USB2 Registers"
group.long 0x80++0x0F
line.long 0x00 "BATTERY_CHRG_OTGPAD0_CTL0_0,BATTERY CHRG OTGPAD0 CTL0 0"
bitfld.long 0x00 31. " GENERATE_SRP          ,GENERATE SRP" "No,Yes"
bitfld.long 0x00 30. "          SRP_INTR_EN           ,SRP INTR EN" "No,Yes"
bitfld.long 0x00 29. "   SRP_DETECTED         ,SRP DETECTED" "No,Yes"
bitfld.long 0x00 28. "           SRP_DETECT_EN       ,SRP DETECT EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 27. " DCD_INTR_EN           ,DCD INTR EN" "No,Yes"
bitfld.long 0x00 26. "          DCD_DETECTED          ,DCD DETECTED" "No,Yes"
bitfld.long 0x00 25. "   ZIN_FILTER_EN        ,ZIN FILTER EN" "No,Yes"
bitfld.long 0x00 24. "           ZIN_CHNG_INTR_EN    ,ZIN CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " ZIN_ST_CHNG           ,ZIN ST CHNG" "No,Yes"
rbitfld.long 0x00 22. "          ZIN                   ,ZIN" "No,Yes"
bitfld.long 0x00 21. "   ZIP_FILTER_EN        ,ZIP FILTER EN" "No,Yes"
bitfld.long 0x00 20. "           ZIP_CHNG_INTR_EN    ,ZIP CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " ZIP_ST_CHNG           ,ZIP ST CHNG" "No,Yes"
rbitfld.long 0x00 18. "          ZIP                   ,ZIP" "No,Yes"
bitfld.long 0x00 13. "   OP_I_SRC_EN          ,OP I SRC EN" "No,Yes"
bitfld.long 0x00 12. "           ON_SRC_EN           ,ON SRC EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 11. " ON_SINK_EN            ,ON SINK EN" "No,Yes"
bitfld.long 0x00 10. "          OP_SRC_EN             ,OP SRC EN" "No,Yes"
bitfld.long 0x00 9. "   OP_SINK_EN           ,OP SINK EN" "No,Yes"
bitfld.long 0x00 8. "           VDAT_DET_FILTER_EN  ,VDAT DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 6. "          VDAT_DET_ST_CHNG      ,VDAT DET ST CHNG" "No,Yes"
rbitfld.long 0x00 5. "   VDAT_DET             ,VDAT DET" "No,Yes"
bitfld.long 0x00 4. "           VDCD_DET_FILTER_EN  ,VDCD DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 2. "          VDCD_DET_ST_CHNG      ,VDCD DET ST CHNG" "No,Yes"
rbitfld.long 0x00 1. "   VDCD_DET             ,VDCD DET" "No,Yes"
bitfld.long 0x00 0. "           PD_CHG              ,PD CHG" "No,Yes"
line.long 0x04 "BATTERY_CHRG_OTGPAD0_CTL1_0,BATTERY CHRG OTGPAD0 CTL1 0"
bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL    ,USBON RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 22. "          USBON_RPU_OVRD        ,USBON RPU OVRD" "No,Yes"
bitfld.long 0x04 21. "   USBON_RPD_OVRD_VAL   ,USBON RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 20. "           USBON_RPD_OVRD      ,USBON RPD OVRD" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL    ,USBOP RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 18. "          USBOP_RPU_OVRD        ,USBOP RPU OVRD" "No,Yes"
bitfld.long 0x04 17. "   USBOP_RPD_OVRD_VAL   ,USBOP RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 16. "           USBOP_RPD_OVRD      ,USBOP RPD OVRD" "No,Yes"
textline "                                         "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11.--12. " VREG_DIR              ,VREG DIR" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 9.--10. " VREG_DYN_DLY          ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x04 7.--8. "            VREG_LEV              ,VREG LEV" "0,1,2,3"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 6. "     PD_VREG              ,PD VREG" "0,1"
else
bitfld.long 0x04 6. "     VREG_FIX18           ,VREG FIX18" "0,1"
endif
bitfld.long 0x04 4. "             DIV_DET_EN          ,DIV DET EN" "No,Yes"
textline "                                         "
rbitfld.long 0x04 3. " VOP_DIV2P7_DET        ,VOP DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 2. "          VOP_DIV2P0_DET        ,VOP DIV2P0 DET" "No,Yes"
rbitfld.long 0x04 1. "   VON_DIV2P7_DET       ,VON DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 0. "           VON_DIV2P0_DET      ,VON DIV2P0 DET" "No,Yes"
line.long 0x08 "OTG_PAD0_CTL_0_0,OTG PAD0 CTL0 Static Settings"
bitfld.long 0x08 29. " PD_ZI                 ,PD ZI" "0,1"
bitfld.long 0x08 28. "            PD2_OVRD_EN           ,PD2 OVRD EN" "0,1"
bitfld.long 0x08 27. "     PD2                  ,PD2" "0,1"
bitfld.long 0x08 26. "             PD                  ,PD" "0,1"
textline "                                         "
bitfld.long 0x08 25. " TERM_SEL              ,TERM SEL" "0,1"
bitfld.long 0x08 21.--24. "            LS_FSLEW              ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17.--20. "    LS_RSLEW             ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--16. "            FS_FSLEW            ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x08 9.--12. " FS_RSLEW              ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 6.--8. "           HS_SLEW               ,HS SLEW" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--5. "     HS_CURR_LEVEL        ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "OTG_PAD0_CTL_1_0,OTG PAD0 CTL1 Static Settings"
bitfld.long 0x0C 26.--30. " RPD_CTRL              ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x0C 25. "           RPU_STATUS_HIGH       ,RPU STATUS HIGH" "0,1"
bitfld.long 0x0C 24. "     RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x0C 23. "             RPU_SWITCH_OVRD     ,RPU SWITCH OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL  ,HS LOOPBACK OVRD VAL" "0,1"
bitfld.long 0x0C 21. "            HS_LOOPBACK_OVRD_EN   ,HS LOOPBACK OVRD EN" "0,1"
bitfld.long 0x0C 17.--20. "     PTERM_RANGE_ADJ      ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16. "            PD_DISC_OVRD_VAL    ,PD DISC OVRD VAL" "0,1"
textline "                                         "
bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL      ,PD CHRP OVRD VAL" "0,1"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 13.--14. "            RPU_RANGE_ADJ         ,RPU RANGE ADJ" "0,1,2,3"
bitfld.long 0x0C 11.--12. "     HS_COUP_EN           ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "             SPARE               ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x0C 11.--12. "            HS_COUP_EN            ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "     SPARE                ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
textline "                                         "
bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ        ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 2. "           PD_DR                 ,PD DR" "0,1"
bitfld.long 0x0C 1. "     PD_DISC_OVRD         ,PD DISC OVRD" "0,1"
bitfld.long 0x0C 0. "             PD_CHRP_OVRD        ,PD CHRP OVRD" "0,1"
sif (cpuis("TEGRAX2"))
group.long (0x80+0x10)++0x07
line.long 0x00 "USB2_OTG_PAD0_CTL_2_0,USB2 OTG PAD0 CTL 2 0"
bitfld.long 0x00 28.--31. " SPARE_AO              ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "           TCTRL_SW              ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 17. "    TCTRL_TRK_OVRD       ,TCTRL TRK OVRD" "No override,Override"
bitfld.long 0x00 16. "   PCTRL_TRK_OVRD      ,PCTRL TRK OVRD" "No override,Override"
textline "                                         "
bitfld.long 0x00 10.--15. " TCTRL_TRK             ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--9. "           PCTRL_TRK             ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 1. "    RPU_HIGH_FIXED       ,RPU HIGH FIXED" "Not fixed,Fixed"
bitfld.long 0x00 0. "     RPU_AUTO_SWITCH_EN  ,RPU AUTO SWITCH EN" "Disabled,Enabled"
line.long 0x04 "USB2_OTG_PAD0_CTL_3_0,USB2 OTG PAD0 CTL 3 0"
bitfld.long 0x04 6.--8. " HS_RXEQ               ,HS RXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--3. "            HS_TXEQ               ,HS TXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "     HS_DIN_DLY_SEL       ,HS DIN DLY SEL" "Not selected,Selected"
endif
group.long 0xC0++0x0F
line.long 0x00 "BATTERY_CHRG_OTGPAD1_CTL0_0,BATTERY CHRG OTGPAD1 CTL0 0"
bitfld.long 0x00 31. " GENERATE_SRP          ,GENERATE SRP" "No,Yes"
bitfld.long 0x00 30. "          SRP_INTR_EN           ,SRP INTR EN" "No,Yes"
bitfld.long 0x00 29. "   SRP_DETECTED         ,SRP DETECTED" "No,Yes"
bitfld.long 0x00 28. "           SRP_DETECT_EN       ,SRP DETECT EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 27. " DCD_INTR_EN           ,DCD INTR EN" "No,Yes"
bitfld.long 0x00 26. "          DCD_DETECTED          ,DCD DETECTED" "No,Yes"
bitfld.long 0x00 25. "   ZIN_FILTER_EN        ,ZIN FILTER EN" "No,Yes"
bitfld.long 0x00 24. "           ZIN_CHNG_INTR_EN    ,ZIN CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " ZIN_ST_CHNG           ,ZIN ST CHNG" "No,Yes"
rbitfld.long 0x00 22. "          ZIN                   ,ZIN" "No,Yes"
bitfld.long 0x00 21. "   ZIP_FILTER_EN        ,ZIP FILTER EN" "No,Yes"
bitfld.long 0x00 20. "           ZIP_CHNG_INTR_EN    ,ZIP CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " ZIP_ST_CHNG           ,ZIP ST CHNG" "No,Yes"
rbitfld.long 0x00 18. "          ZIP                   ,ZIP" "No,Yes"
bitfld.long 0x00 13. "   OP_I_SRC_EN          ,OP I SRC EN" "No,Yes"
bitfld.long 0x00 12. "           ON_SRC_EN           ,ON SRC EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 11. " ON_SINK_EN            ,ON SINK EN" "No,Yes"
bitfld.long 0x00 10. "          OP_SRC_EN             ,OP SRC EN" "No,Yes"
bitfld.long 0x00 9. "   OP_SINK_EN           ,OP SINK EN" "No,Yes"
bitfld.long 0x00 8. "           VDAT_DET_FILTER_EN  ,VDAT DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 6. "          VDAT_DET_ST_CHNG      ,VDAT DET ST CHNG" "No,Yes"
rbitfld.long 0x00 5. "   VDAT_DET             ,VDAT DET" "No,Yes"
bitfld.long 0x00 4. "           VDCD_DET_FILTER_EN  ,VDCD DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 2. "          VDCD_DET_ST_CHNG      ,VDCD DET ST CHNG" "No,Yes"
rbitfld.long 0x00 1. "   VDCD_DET             ,VDCD DET" "No,Yes"
bitfld.long 0x00 0. "           PD_CHG              ,PD CHG" "No,Yes"
line.long 0x04 "BATTERY_CHRG_OTGPAD1_CTL1_0,BATTERY CHRG OTGPAD1 CTL1 0"
bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL    ,USBON RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 22. "          USBON_RPU_OVRD        ,USBON RPU OVRD" "No,Yes"
bitfld.long 0x04 21. "   USBON_RPD_OVRD_VAL   ,USBON RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 20. "           USBON_RPD_OVRD      ,USBON RPD OVRD" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL    ,USBOP RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 18. "          USBOP_RPU_OVRD        ,USBOP RPU OVRD" "No,Yes"
bitfld.long 0x04 17. "   USBOP_RPD_OVRD_VAL   ,USBOP RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 16. "           USBOP_RPD_OVRD      ,USBOP RPD OVRD" "No,Yes"
textline "                                         "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11.--12. " VREG_DIR              ,VREG DIR" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 9.--10. " VREG_DYN_DLY          ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x04 7.--8. "            VREG_LEV              ,VREG LEV" "0,1,2,3"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 6. "     PD_VREG              ,PD VREG" "0,1"
else
bitfld.long 0x04 6. "     VREG_FIX18           ,VREG FIX18" "0,1"
endif
bitfld.long 0x04 4. "             DIV_DET_EN          ,DIV DET EN" "No,Yes"
textline "                                         "
rbitfld.long 0x04 3. " VOP_DIV2P7_DET        ,VOP DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 2. "          VOP_DIV2P0_DET        ,VOP DIV2P0 DET" "No,Yes"
rbitfld.long 0x04 1. "   VON_DIV2P7_DET       ,VON DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 0. "           VON_DIV2P0_DET      ,VON DIV2P0 DET" "No,Yes"
line.long 0x08 "OTG_PAD1_CTL_0_0,OTG PAD1 CTL0 Static Settings"
bitfld.long 0x08 29. " PD_ZI                 ,PD ZI" "0,1"
bitfld.long 0x08 28. "            PD2_OVRD_EN           ,PD2 OVRD EN" "0,1"
bitfld.long 0x08 27. "     PD2                  ,PD2" "0,1"
bitfld.long 0x08 26. "             PD                  ,PD" "0,1"
textline "                                         "
bitfld.long 0x08 25. " TERM_SEL              ,TERM SEL" "0,1"
bitfld.long 0x08 21.--24. "            LS_FSLEW              ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17.--20. "    LS_RSLEW             ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--16. "            FS_FSLEW            ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x08 9.--12. " FS_RSLEW              ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 6.--8. "           HS_SLEW               ,HS SLEW" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--5. "     HS_CURR_LEVEL        ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "OTG_PAD1_CTL_1_0,OTG PAD1 CTL1 Static Settings"
bitfld.long 0x0C 26.--30. " RPD_CTRL              ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x0C 25. "           RPU_STATUS_HIGH       ,RPU STATUS HIGH" "0,1"
bitfld.long 0x0C 24. "     RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x0C 23. "             RPU_SWITCH_OVRD     ,RPU SWITCH OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL  ,HS LOOPBACK OVRD VAL" "0,1"
bitfld.long 0x0C 21. "            HS_LOOPBACK_OVRD_EN   ,HS LOOPBACK OVRD EN" "0,1"
bitfld.long 0x0C 17.--20. "     PTERM_RANGE_ADJ      ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16. "            PD_DISC_OVRD_VAL    ,PD DISC OVRD VAL" "0,1"
textline "                                         "
bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL      ,PD CHRP OVRD VAL" "0,1"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 13.--14. "            RPU_RANGE_ADJ         ,RPU RANGE ADJ" "0,1,2,3"
bitfld.long 0x0C 11.--12. "     HS_COUP_EN           ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "             SPARE               ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x0C 11.--12. "            HS_COUP_EN            ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "     SPARE                ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
textline "                                         "
bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ        ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 2. "           PD_DR                 ,PD DR" "0,1"
bitfld.long 0x0C 1. "     PD_DISC_OVRD         ,PD DISC OVRD" "0,1"
bitfld.long 0x0C 0. "             PD_CHRP_OVRD        ,PD CHRP OVRD" "0,1"
sif (cpuis("TEGRAX2"))
group.long (0xC0+0x10)++0x07
line.long 0x00 "USB2_OTG_PAD1_CTL_2_0,USB2 OTG PAD1 CTL 2 0"
bitfld.long 0x00 28.--31. " SPARE_AO              ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "           TCTRL_SW              ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 17. "    TCTRL_TRK_OVRD       ,TCTRL TRK OVRD" "No override,Override"
bitfld.long 0x00 16. "   PCTRL_TRK_OVRD      ,PCTRL TRK OVRD" "No override,Override"
textline "                                         "
bitfld.long 0x00 10.--15. " TCTRL_TRK             ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--9. "           PCTRL_TRK             ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 1. "    RPU_HIGH_FIXED       ,RPU HIGH FIXED" "Not fixed,Fixed"
bitfld.long 0x00 0. "     RPU_AUTO_SWITCH_EN  ,RPU AUTO SWITCH EN" "Disabled,Enabled"
line.long 0x04 "USB2_OTG_PAD1_CTL_3_0,USB2 OTG PAD1 CTL 3 0"
bitfld.long 0x04 6.--8. " HS_RXEQ               ,HS RXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--3. "            HS_TXEQ               ,HS TXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "     HS_DIN_DLY_SEL       ,HS DIN DLY SEL" "Not selected,Selected"
endif
group.long 0x100++0x0F
line.long 0x00 "BATTERY_CHRG_OTGPAD2_CTL0_0,BATTERY CHRG OTGPAD2 CTL0 0"
bitfld.long 0x00 31. " GENERATE_SRP          ,GENERATE SRP" "No,Yes"
bitfld.long 0x00 30. "          SRP_INTR_EN           ,SRP INTR EN" "No,Yes"
bitfld.long 0x00 29. "   SRP_DETECTED         ,SRP DETECTED" "No,Yes"
bitfld.long 0x00 28. "           SRP_DETECT_EN       ,SRP DETECT EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 27. " DCD_INTR_EN           ,DCD INTR EN" "No,Yes"
bitfld.long 0x00 26. "          DCD_DETECTED          ,DCD DETECTED" "No,Yes"
bitfld.long 0x00 25. "   ZIN_FILTER_EN        ,ZIN FILTER EN" "No,Yes"
bitfld.long 0x00 24. "           ZIN_CHNG_INTR_EN    ,ZIN CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " ZIN_ST_CHNG           ,ZIN ST CHNG" "No,Yes"
rbitfld.long 0x00 22. "          ZIN                   ,ZIN" "No,Yes"
bitfld.long 0x00 21. "   ZIP_FILTER_EN        ,ZIP FILTER EN" "No,Yes"
bitfld.long 0x00 20. "           ZIP_CHNG_INTR_EN    ,ZIP CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " ZIP_ST_CHNG           ,ZIP ST CHNG" "No,Yes"
rbitfld.long 0x00 18. "          ZIP                   ,ZIP" "No,Yes"
bitfld.long 0x00 13. "   OP_I_SRC_EN          ,OP I SRC EN" "No,Yes"
bitfld.long 0x00 12. "           ON_SRC_EN           ,ON SRC EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 11. " ON_SINK_EN            ,ON SINK EN" "No,Yes"
bitfld.long 0x00 10. "          OP_SRC_EN             ,OP SRC EN" "No,Yes"
bitfld.long 0x00 9. "   OP_SINK_EN           ,OP SINK EN" "No,Yes"
bitfld.long 0x00 8. "           VDAT_DET_FILTER_EN  ,VDAT DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 6. "          VDAT_DET_ST_CHNG      ,VDAT DET ST CHNG" "No,Yes"
rbitfld.long 0x00 5. "   VDAT_DET             ,VDAT DET" "No,Yes"
bitfld.long 0x00 4. "           VDCD_DET_FILTER_EN  ,VDCD DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 2. "          VDCD_DET_ST_CHNG      ,VDCD DET ST CHNG" "No,Yes"
rbitfld.long 0x00 1. "   VDCD_DET             ,VDCD DET" "No,Yes"
bitfld.long 0x00 0. "           PD_CHG              ,PD CHG" "No,Yes"
line.long 0x04 "BATTERY_CHRG_OTGPAD2_CTL1_0,BATTERY CHRG OTGPAD2 CTL1 0"
bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL    ,USBON RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 22. "          USBON_RPU_OVRD        ,USBON RPU OVRD" "No,Yes"
bitfld.long 0x04 21. "   USBON_RPD_OVRD_VAL   ,USBON RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 20. "           USBON_RPD_OVRD      ,USBON RPD OVRD" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL    ,USBOP RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 18. "          USBOP_RPU_OVRD        ,USBOP RPU OVRD" "No,Yes"
bitfld.long 0x04 17. "   USBOP_RPD_OVRD_VAL   ,USBOP RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 16. "           USBOP_RPD_OVRD      ,USBOP RPD OVRD" "No,Yes"
textline "                                         "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11.--12. " VREG_DIR              ,VREG DIR" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 9.--10. " VREG_DYN_DLY          ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x04 7.--8. "            VREG_LEV              ,VREG LEV" "0,1,2,3"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 6. "     PD_VREG              ,PD VREG" "0,1"
else
bitfld.long 0x04 6. "     VREG_FIX18           ,VREG FIX18" "0,1"
endif
bitfld.long 0x04 4. "             DIV_DET_EN          ,DIV DET EN" "No,Yes"
textline "                                         "
rbitfld.long 0x04 3. " VOP_DIV2P7_DET        ,VOP DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 2. "          VOP_DIV2P0_DET        ,VOP DIV2P0 DET" "No,Yes"
rbitfld.long 0x04 1. "   VON_DIV2P7_DET       ,VON DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 0. "           VON_DIV2P0_DET      ,VON DIV2P0 DET" "No,Yes"
line.long 0x08 "OTG_PAD2_CTL_0_0,OTG PAD2 CTL0 Static Settings"
bitfld.long 0x08 29. " PD_ZI                 ,PD ZI" "0,1"
bitfld.long 0x08 28. "            PD2_OVRD_EN           ,PD2 OVRD EN" "0,1"
bitfld.long 0x08 27. "     PD2                  ,PD2" "0,1"
bitfld.long 0x08 26. "             PD                  ,PD" "0,1"
textline "                                         "
bitfld.long 0x08 25. " TERM_SEL              ,TERM SEL" "0,1"
bitfld.long 0x08 21.--24. "            LS_FSLEW              ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17.--20. "    LS_RSLEW             ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--16. "            FS_FSLEW            ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x08 9.--12. " FS_RSLEW              ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 6.--8. "           HS_SLEW               ,HS SLEW" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--5. "     HS_CURR_LEVEL        ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "OTG_PAD2_CTL_1_0,OTG PAD2 CTL1 Static Settings"
bitfld.long 0x0C 26.--30. " RPD_CTRL              ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x0C 25. "           RPU_STATUS_HIGH       ,RPU STATUS HIGH" "0,1"
bitfld.long 0x0C 24. "     RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x0C 23. "             RPU_SWITCH_OVRD     ,RPU SWITCH OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL  ,HS LOOPBACK OVRD VAL" "0,1"
bitfld.long 0x0C 21. "            HS_LOOPBACK_OVRD_EN   ,HS LOOPBACK OVRD EN" "0,1"
bitfld.long 0x0C 17.--20. "     PTERM_RANGE_ADJ      ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16. "            PD_DISC_OVRD_VAL    ,PD DISC OVRD VAL" "0,1"
textline "                                         "
bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL      ,PD CHRP OVRD VAL" "0,1"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 13.--14. "            RPU_RANGE_ADJ         ,RPU RANGE ADJ" "0,1,2,3"
bitfld.long 0x0C 11.--12. "     HS_COUP_EN           ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "             SPARE               ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x0C 11.--12. "            HS_COUP_EN            ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "     SPARE                ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
textline "                                         "
bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ        ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 2. "           PD_DR                 ,PD DR" "0,1"
bitfld.long 0x0C 1. "     PD_DISC_OVRD         ,PD DISC OVRD" "0,1"
bitfld.long 0x0C 0. "             PD_CHRP_OVRD        ,PD CHRP OVRD" "0,1"
sif (cpuis("TEGRAX2"))
group.long (0x100+0x10)++0x07
line.long 0x00 "USB2_OTG_PAD2_CTL_2_0,USB2 OTG PAD2 CTL 2 0"
bitfld.long 0x00 28.--31. " SPARE_AO              ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "           TCTRL_SW              ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 17. "    TCTRL_TRK_OVRD       ,TCTRL TRK OVRD" "No override,Override"
bitfld.long 0x00 16. "   PCTRL_TRK_OVRD      ,PCTRL TRK OVRD" "No override,Override"
textline "                                         "
bitfld.long 0x00 10.--15. " TCTRL_TRK             ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--9. "           PCTRL_TRK             ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 1. "    RPU_HIGH_FIXED       ,RPU HIGH FIXED" "Not fixed,Fixed"
bitfld.long 0x00 0. "     RPU_AUTO_SWITCH_EN  ,RPU AUTO SWITCH EN" "Disabled,Enabled"
line.long 0x04 "USB2_OTG_PAD2_CTL_3_0,USB2 OTG PAD2 CTL 3 0"
bitfld.long 0x04 6.--8. " HS_RXEQ               ,HS RXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--3. "            HS_TXEQ               ,HS TXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "     HS_DIN_DLY_SEL       ,HS DIN DLY SEL" "Not selected,Selected"
endif
group.long 0x140++0x0F
line.long 0x00 "BATTERY_CHRG_OTGPAD3_CTL0_0,BATTERY CHRG OTGPAD3 CTL0 0"
bitfld.long 0x00 31. " GENERATE_SRP          ,GENERATE SRP" "No,Yes"
bitfld.long 0x00 30. "          SRP_INTR_EN           ,SRP INTR EN" "No,Yes"
bitfld.long 0x00 29. "   SRP_DETECTED         ,SRP DETECTED" "No,Yes"
bitfld.long 0x00 28. "           SRP_DETECT_EN       ,SRP DETECT EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 27. " DCD_INTR_EN           ,DCD INTR EN" "No,Yes"
bitfld.long 0x00 26. "          DCD_DETECTED          ,DCD DETECTED" "No,Yes"
bitfld.long 0x00 25. "   ZIN_FILTER_EN        ,ZIN FILTER EN" "No,Yes"
bitfld.long 0x00 24. "           ZIN_CHNG_INTR_EN    ,ZIN CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 23. " ZIN_ST_CHNG           ,ZIN ST CHNG" "No,Yes"
rbitfld.long 0x00 22. "          ZIN                   ,ZIN" "No,Yes"
bitfld.long 0x00 21. "   ZIP_FILTER_EN        ,ZIP FILTER EN" "No,Yes"
bitfld.long 0x00 20. "           ZIP_CHNG_INTR_EN    ,ZIP CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 19. " ZIP_ST_CHNG           ,ZIP ST CHNG" "No,Yes"
rbitfld.long 0x00 18. "          ZIP                   ,ZIP" "No,Yes"
bitfld.long 0x00 13. "   OP_I_SRC_EN          ,OP I SRC EN" "No,Yes"
bitfld.long 0x00 12. "           ON_SRC_EN           ,ON SRC EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 11. " ON_SINK_EN            ,ON SINK EN" "No,Yes"
bitfld.long 0x00 10. "          OP_SRC_EN             ,OP SRC EN" "No,Yes"
bitfld.long 0x00 9. "   OP_SINK_EN           ,OP SINK EN" "No,Yes"
bitfld.long 0x00 8. "           VDAT_DET_FILTER_EN  ,VDAT DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 7. " VDAT_DET_CHNG_INTR_EN ,VDAT DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 6. "          VDAT_DET_ST_CHNG      ,VDAT DET ST CHNG" "No,Yes"
rbitfld.long 0x00 5. "   VDAT_DET             ,VDAT DET" "No,Yes"
bitfld.long 0x00 4. "           VDCD_DET_FILTER_EN  ,VDCD DET FILTER EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 3. " VDCD_DET_CHNG_INTR_EN ,VDCD DET CHNG INTR EN" "No,Yes"
bitfld.long 0x00 2. "          VDCD_DET_ST_CHNG      ,VDCD DET ST CHNG" "No,Yes"
rbitfld.long 0x00 1. "   VDCD_DET             ,VDCD DET" "No,Yes"
bitfld.long 0x00 0. "           PD_CHG              ,PD CHG" "No,Yes"
line.long 0x04 "BATTERY_CHRG_OTGPAD3_CTL1_0,BATTERY CHRG OTGPAD3 CTL1 0"
bitfld.long 0x04 23. " USBON_RPU_OVRD_VAL    ,USBON RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 22. "          USBON_RPU_OVRD        ,USBON RPU OVRD" "No,Yes"
bitfld.long 0x04 21. "   USBON_RPD_OVRD_VAL   ,USBON RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 20. "           USBON_RPD_OVRD      ,USBON RPD OVRD" "No,Yes"
textline "                                         "
bitfld.long 0x04 19. " USBOP_RPU_OVRD_VAL    ,USBOP RPU OVRD VAL" "No,Yes"
bitfld.long 0x04 18. "          USBOP_RPU_OVRD        ,USBOP RPU OVRD" "No,Yes"
bitfld.long 0x04 17. "   USBOP_RPD_OVRD_VAL   ,USBOP RPD OVRD VAL" "No,Yes"
bitfld.long 0x04 16. "           USBOP_RPD_OVRD      ,USBOP RPD OVRD" "No,Yes"
textline "                                         "
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 11.--12. " VREG_DIR              ,VREG DIR" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 9.--10. " VREG_DYN_DLY          ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x04 7.--8. "            VREG_LEV              ,VREG LEV" "0,1,2,3"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 6. "     PD_VREG              ,PD VREG" "0,1"
else
bitfld.long 0x04 6. "     VREG_FIX18           ,VREG FIX18" "0,1"
endif
bitfld.long 0x04 4. "             DIV_DET_EN          ,DIV DET EN" "No,Yes"
textline "                                         "
rbitfld.long 0x04 3. " VOP_DIV2P7_DET        ,VOP DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 2. "          VOP_DIV2P0_DET        ,VOP DIV2P0 DET" "No,Yes"
rbitfld.long 0x04 1. "   VON_DIV2P7_DET       ,VON DIV2P7 DET" "No,Yes"
rbitfld.long 0x04 0. "           VON_DIV2P0_DET      ,VON DIV2P0 DET" "No,Yes"
line.long 0x08 "OTG_PAD3_CTL_0_0,OTG PAD3 CTL0 Static Settings"
bitfld.long 0x08 29. " PD_ZI                 ,PD ZI" "0,1"
bitfld.long 0x08 28. "            PD2_OVRD_EN           ,PD2 OVRD EN" "0,1"
bitfld.long 0x08 27. "     PD2                  ,PD2" "0,1"
bitfld.long 0x08 26. "             PD                  ,PD" "0,1"
textline "                                         "
bitfld.long 0x08 25. " TERM_SEL              ,TERM SEL" "0,1"
bitfld.long 0x08 21.--24. "            LS_FSLEW              ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 17.--20. "    LS_RSLEW             ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 13.--16. "            FS_FSLEW            ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x08 9.--12. " FS_RSLEW              ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 6.--8. "           HS_SLEW               ,HS SLEW" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--5. "     HS_CURR_LEVEL        ,HS CURR LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "OTG_PAD3_CTL_1_0,OTG PAD3 CTL1 Static Settings"
bitfld.long 0x0C 26.--30. " RPD_CTRL              ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x0C 25. "           RPU_STATUS_HIGH       ,RPU STATUS HIGH" "0,1"
bitfld.long 0x0C 24. "     RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x0C 23. "             RPU_SWITCH_OVRD     ,RPU SWITCH OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 22. " HS_LOOPBACK_OVRD_VAL  ,HS LOOPBACK OVRD VAL" "0,1"
bitfld.long 0x0C 21. "            HS_LOOPBACK_OVRD_EN   ,HS LOOPBACK OVRD EN" "0,1"
bitfld.long 0x0C 17.--20. "     PTERM_RANGE_ADJ      ,PTERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16. "            PD_DISC_OVRD_VAL    ,PD DISC OVRD VAL" "0,1"
textline "                                         "
bitfld.long 0x0C 15. " PD_CHRP_OVRD_VAL      ,PD CHRP OVRD VAL" "0,1"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x0C 13.--14. "            RPU_RANGE_ADJ         ,RPU RANGE ADJ" "0,1,2,3"
bitfld.long 0x0C 11.--12. "     HS_COUP_EN           ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "             SPARE               ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x0C 11.--12. "            HS_COUP_EN            ,HS COUP EN" "0,1,2,3"
bitfld.long 0x0C 7.--10. "     SPARE                ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
textline "                                         "
bitfld.long 0x0C 3.--6. " TERM_RANGE_ADJ        ,TERM RANGE ADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 2. "           PD_DR                 ,PD DR" "0,1"
bitfld.long 0x0C 1. "     PD_DISC_OVRD         ,PD DISC OVRD" "0,1"
bitfld.long 0x0C 0. "             PD_CHRP_OVRD        ,PD CHRP OVRD" "0,1"
sif (cpuis("TEGRAX2"))
group.long (0x140+0x10)++0x07
line.long 0x00 "USB2_OTG_PAD3_CTL_2_0,USB2 OTG PAD3 CTL 2 0"
bitfld.long 0x00 28.--31. " SPARE_AO              ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "           TCTRL_SW              ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 17. "    TCTRL_TRK_OVRD       ,TCTRL TRK OVRD" "No override,Override"
bitfld.long 0x00 16. "   PCTRL_TRK_OVRD      ,PCTRL TRK OVRD" "No override,Override"
textline "                                         "
bitfld.long 0x00 10.--15. " TCTRL_TRK             ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 4.--9. "           PCTRL_TRK             ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 1. "    RPU_HIGH_FIXED       ,RPU HIGH FIXED" "Not fixed,Fixed"
bitfld.long 0x00 0. "     RPU_AUTO_SWITCH_EN  ,RPU AUTO SWITCH EN" "Disabled,Enabled"
line.long 0x04 "USB2_OTG_PAD3_CTL_3_0,USB2 OTG PAD3 CTL 3 0"
bitfld.long 0x04 6.--8. " HS_RXEQ               ,HS RXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 1.--3. "            HS_TXEQ               ,HS TXEQ" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0. "     HS_DIN_DLY_SEL       ,HS DIN DLY SEL" "Not selected,Selected"
endif
group.long 0x280++0x0B
line.long 0x00 "BATTERY_CHRG_TDCD_DBNC_TIMER_0,BATTERY CHRG TDCD DBNC TIMER 0"
bitfld.long 0x00 11.--16. " IDDIG_DBNC            ,IDDIG DBNC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.word 0x00 0.--10. 1. "           TDCD_DBNC             ,TDCD DBNC"
line.long 0x04 "BIAS_PAD_CTL_0_0,BIAS PAD CTL0 Static Settings"
sif (!cpuis("TEGRAX2"))
bitfld.long 0x04 29. " TRK_PWR_ENA           ,TRK PWR ENA" "0,1"
textline "                                         "
endif
bitfld.long 0x04 25.--28. " SPARE                 ,SPARE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 21.--24. "           CHG_DIV               ,CHG DIV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 18.--20. " TEMP_COEF             ,TEMP COEF" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 15.--17. "            VREF_CTRL             ,VREF CTRL" "0,1,2,3,4,5,6,7"
textline "                                         "
sif (!cpuis("TEGRAX2"))
bitfld.long 0x04 12.--14. " ADJRPU                ,ADJRPU" "0,1,2,3,4,5,6,7"
textline "                                         "
endif
bitfld.long 0x04 11. " PD                    ,PD" "0,1"
textline "                                         "
bitfld.long 0x04 8.--10. " TERM_OFFSET           ,TERM OFFSET" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 6.--7. "            HS_CHIRP_LEVEL        ,HS CHIRP LEVEL" "0,1,2,3"
bitfld.long 0x04 3.--5. "     HS_DISCON_LEVEL      ,HS DISCON LEVEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "             HS_SQUELCH_LEVEL    ,HS SQUELCH LEVEL" "0,1,2,3,4,5,6,7"
line.long 0x08 "BIAS_PAD_CTL_1_0,BIASPAD CTL1 Static Settings"
bitfld.long 0x08 30. " FORCE_TRK_CLK_EN      ,FORCE TRK CLK EN" "0,1"
bitfld.long 0x08 29. "            TRK_SW_OVRD           ,TRK SW OVRD" "0,1"
rbitfld.long 0x08 28. "     TRK_DONE             ,TRK DONE" "0,1"
bitfld.long 0x08 27. "             TRK_START           ,TRK START" "0,1"
textline "                                         "
bitfld.long 0x08 26. " PD_TRK                ,PD TRK" "0,1"
hexmask.long.byte 0x08 19.--25. 1. "            TRK_DONE_RESET_TIMER  ,TRK DONE RESET TIMER"
hexmask.long.byte 0x08 12.--18. 1. "    TRK_START_TIMER      ,TRK START TIMER"
rbitfld.long 0x08 6.--11. "            PCTRL               ,PCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                         "
rbitfld.long 0x08 0.--5. " TCTRL                 ,TCTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
tree.end
tree "HSIC Registers"
group.long 0x300++0x0B
line.long 0x00 "PAD0_CTL_0_0,HSIC PAD0 CTL0"
bitfld.long 0x00 18. " RPU_STROBE            ,RPU STROBE" "0,1"
bitfld.long 0x00 17. "            RPU_DATA1             ,RPU DATA1" "0,1"
bitfld.long 0x00 16. "     RPU_DATA0            ,RPU DATA0" "0,1"
bitfld.long 0x00 15. "             RPD_STROBE          ,RPD STROBE" "0,1"
textline "                                         "
bitfld.long 0x00 14. " RPD_DATA1             ,RPD DATA1" "0,1"
bitfld.long 0x00 13. "            RPD_DATA0             ,RPD DATA0" "0,1"
bitfld.long 0x00 12. "     LPBK_STROBE          ,LPBK STROBE" "0,1"
bitfld.long 0x00 11. "             LPBK_DATA1          ,LPBK DATA1" "0,1"
textline "                                         "
bitfld.long 0x00 10. " LPBK_DATA0            ,LPBK DATA0" "0,1"
bitfld.long 0x00 9. "            PD_ZI_STROBE          ,PD ZI STROBE" "0,1"
bitfld.long 0x00 8. "     PD_ZI_DATA1          ,PD ZI DATA1" "0,1"
bitfld.long 0x00 7. "             PD_ZI_DATA0         ,PD ZI DATA0" "0,1"
textline "                                         "
bitfld.long 0x00 6. " PD_RX_STROBE          ,PD RX STROBE" "0,1"
bitfld.long 0x00 5. "            PD_RX_DATA1           ,PD RX DATA1" "0,1"
bitfld.long 0x00 4. "     PD_RX_DATA0          ,PD RX DATA0" "0,1"
bitfld.long 0x00 3. "             PD_TX_STROBE        ,PD TX STROBE" "0,1"
textline "                                         "
bitfld.long 0x00 2. " PD_TX_DATA1           ,PD TX DATA1" "0,1"
bitfld.long 0x00 1. "            PD_TX_DATA0           ,PD TX DATA0" "0,1"
bitfld.long 0x00 0. "     IDDQ                 ,IDDQ" "0,1"
line.long 0x04 "PAD0_CTL_1_0,HSIC PAD0 CTL1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 25.--26. " HSIC_AO_OPT           ,HSIC AO OPT" "0,1,2,3"
bitfld.long 0x04 23. "            RX_REC_SEL            ,RX REC SEL" "0,1"
bitfld.long 0x04 20.--21. "     TRACK_RES_SEL        ,TRACK RES SEL" "0,1,2,3"
bitfld.long 0x04 17.--18. "             BUS_KEEPER_RES_SEL  ,BUS KEEPER RES SEL" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 12.--16. " RTERM                 ,RTERM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 8.--11. "           HSIC_OPT              ,HSIC OPT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "    TX_SLEW              ,TX SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            TX_RTUNEP           ,TX RTUNEP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PAD0_CTL_2_0,HSIC PAD0 CTL2"
bitfld.long 0x08 8.--11. " RX_STROBE_TRIM        ,RX STROBE TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "           RX_DATA1_TRIM         ,RX DATA1 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "    RX_DATA0_TRIM        ,RX DATA0 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x320++0x0B
line.long 0x00 "PAD1_CTL_0_0,HSIC PAD1 CTL0"
bitfld.long 0x00 18. " RPU_STROBE            ,RPU STROBE" "0,1"
bitfld.long 0x00 17. "            RPU_DATA1             ,RPU DATA1" "0,1"
bitfld.long 0x00 16. "     RPU_DATA0            ,RPU DATA0" "0,1"
bitfld.long 0x00 15. "             RPD_STROBE          ,RPD STROBE" "0,1"
textline "                                         "
bitfld.long 0x00 14. " RPD_DATA1             ,RPD DATA1" "0,1"
bitfld.long 0x00 13. "            RPD_DATA0             ,RPD DATA0" "0,1"
bitfld.long 0x00 12. "     LPBK_STROBE          ,LPBK STROBE" "0,1"
bitfld.long 0x00 11. "             LPBK_DATA1          ,LPBK DATA1" "0,1"
textline "                                         "
bitfld.long 0x00 10. " LPBK_DATA0            ,LPBK DATA0" "0,1"
bitfld.long 0x00 9. "            PD_ZI_STROBE          ,PD ZI STROBE" "0,1"
bitfld.long 0x00 8. "     PD_ZI_DATA1          ,PD ZI DATA1" "0,1"
bitfld.long 0x00 7. "             PD_ZI_DATA0         ,PD ZI DATA0" "0,1"
textline "                                         "
bitfld.long 0x00 6. " PD_RX_STROBE          ,PD RX STROBE" "0,1"
bitfld.long 0x00 5. "            PD_RX_DATA1           ,PD RX DATA1" "0,1"
bitfld.long 0x00 4. "     PD_RX_DATA0          ,PD RX DATA0" "0,1"
bitfld.long 0x00 3. "             PD_TX_STROBE        ,PD TX STROBE" "0,1"
textline "                                         "
bitfld.long 0x00 2. " PD_TX_DATA1           ,PD TX DATA1" "0,1"
bitfld.long 0x00 1. "            PD_TX_DATA0           ,PD TX DATA0" "0,1"
bitfld.long 0x00 0. "     IDDQ                 ,IDDQ" "0,1"
line.long 0x04 "PAD1_CTL_1_0,HSIC PAD1 CTL1"
sif (cpuis("TEGRAX2"))
bitfld.long 0x04 25.--26. " HSIC_AO_OPT           ,HSIC AO OPT" "0,1,2,3"
bitfld.long 0x04 23. "            RX_REC_SEL            ,RX REC SEL" "0,1"
bitfld.long 0x04 20.--21. "     TRACK_RES_SEL        ,TRACK RES SEL" "0,1,2,3"
bitfld.long 0x04 17.--18. "             BUS_KEEPER_RES_SEL  ,BUS KEEPER RES SEL" "0,1,2,3"
textline "                                         "
endif
bitfld.long 0x04 12.--16. " RTERM                 ,RTERM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 8.--11. "           HSIC_OPT              ,HSIC OPT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "    TX_SLEW              ,TX SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            TX_RTUNEP           ,TX RTUNEP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PAD1_CTL_2_0,HSIC PAD1 CTL2"
bitfld.long 0x08 8.--11. " RX_STROBE_TRIM        ,RX STROBE TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "           RX_DATA1_TRIM         ,RX DATA1 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "    RX_DATA0_TRIM        ,RX DATA0 TRIM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x340++0x07
line.long 0x00 "PAD_TRK_CTL_0,PAD TRK CTL 0"
bitfld.long 0x00 24. " AUTO_RTERM_EN         ,AUTO RTERM EN" "0,1"
bitfld.long 0x00 23. "            FORCE_TRK_CLK_EN      ,FORCE TRK CLK EN" "0,1"
bitfld.long 0x00 22. "     TRK_SW_OVRD          ,TRK SW OVRD" "0,1"
rbitfld.long 0x00 21. "             TRK_DONE            ,TRK DONE" "0,1"
textline "                                         "
bitfld.long 0x00 20. " TRK_START             ,TRK START" "0,1"
bitfld.long 0x00 19. "            PD_TRK                ,PD TRK" "0,1"
hexmask.long.byte 0x00 12.--18. 1. "     TRK_DONE_RESET_TIMER ,TRK DONE RESET TIMER"
hexmask.long.byte 0x00 5.--11. 1. "            TRK_START_TIMER     ,TRK START TIMER"
textline "                                         "
rbitfld.long 0x00 0.--4. " RTERM_OUT             ,RTERM OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "STRB_TRIM_CONTROL_0,HSIC STROBE Trimmer Control"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x04 0.--6. 1. " STRB_TRIM_VAL         ,STRB TRIM VAL"
else
bitfld.long 0x04 0.--5. " STRB_TRIM_VAL         ,STRB TRIM VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
tree.end
sif (!cpuis("TEGRAX2"))
tree "UPHY_PLL registers"
group.long 0x360++0x2B
line.long 0x00 "P0_CTL_1_0,P0 CTL 1 0"
bitfld.long 0x00 28.--29. " PLL0_FREQ_PSDIV       ,PLL0 FREQ PSDIV" "0,1,2,3"
hexmask.long.byte 0x00 20.--27. 1. "            PLL0_FREQ_NDIV        ,PLL0 FREQ NDIV"
bitfld.long 0x00 16.--17. "    PLL0_FREQ_MDIV       ,PLL0 FREQ MDIV" "0,1,2,3"
rbitfld.long 0x00 15. "             PLL0_LOCKDET_STATUS ,PLL0 LOCKDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 8.--9. " PLL0_MODE             ,PLL0 MODE" "0,1,2,3"
bitfld.long 0x00 7. "            PLL0_BYPASS_EN        ,PLL0 BYPASS EN" "0,1"
bitfld.long 0x00 6. "     PLL0_FREERUN_EN      ,PLL0 FREERUN EN" "0,1"
bitfld.long 0x00 4. "             PLL0_PWR_OVRD       ,PLL0 PWR OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 3. " PLL0_ENABLE           ,PLL0 ENABLE" "0,1"
bitfld.long 0x00 1.--2. "            PLL0_SLEEP            ,PLL0 SLEEP" "0,1,2,3"
bitfld.long 0x00 0. "     PLL0_IDDQ            ,PLL0 IDDQ" "0,1"
line.long 0x04 "P0_CTL_2_0,P0 CTL 2 0"
hexmask.long.tbyte 0x04 4.--27. 1. " PLL0_CAL_CTRL         ,PLL0 CAL CTRL"
bitfld.long 0x04 3. "       PLL0_CAL_RESET        ,PLL0 CAL RESET" "0,1"
bitfld.long 0x04 2. "     PLL0_CAL_OVRD        ,PLL0 CAL OVRD" "0,1"
bitfld.long 0x04 1. "             PLL0_CAL_DONE       ,PLL0 CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x04 0. " PLL0_CAL_EN           ,PLL0 CAL EN" "0,1"
line.long 0x08 "P0_CTL_3_0,P0 CTL 3 0"
hexmask.long.tbyte 0x08 4.--27. 1. " PLL0_LOCKDET_CTRL     ,PLL0 LOCKDET CTRL"
bitfld.long 0x08 0. "       PLL0_LOCKDET_RESET    ,PLL0 LOCKDET RESET" "0,1"
line.long 0x0C "P0_CTL_4_0,P0 CTL 4 0"
bitfld.long 0x0C 28. " PLL0_TCLKOUT_EN       ,PLL0 TCLKOUT EN" "0,1"
bitfld.long 0x0C 20.--23. "            PLL0_CLKDIST_CTRL     ,PLL0 CLKDIST CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 19. "    PLL0_XDIGCLK_EN      ,PLL0 XDIGCLK EN" "0,1"
bitfld.long 0x0C 16.--18. "             PLL0_XDIGCLK_SEL    ,PLL0 XDIGCLK SEL" "0,1,2,3,4,5,6,7"
textline "                                         "
bitfld.long 0x0C 15. " PLL0_TXCLKREF_EN      ,PLL0 TXCLKREF EN" "0,1"
bitfld.long 0x0C 12.--13. "            PLL0_TXCLKREF_SEL     ,PLL0 TXCLKREF SEL" "0,1,2,3"
bitfld.long 0x0C 9. "     PLL0_FBCLKBUF_EN     ,PLL0 FBCLKBUF EN" "0,1"
bitfld.long 0x0C 8. "             PLL0_REFCLKBUF_EN   ,PLL0 REFCLKBUF EN" "0,1"
textline "                                         "
bitfld.long 0x0C 4.--7. " PLL0_REFCLK_SEL       ,PLL0 REFCLK SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0. "           PLL0_REFCLK_TERM100   ,PLL0 REFCLK TERM100" "0,1"
line.long 0x10 "P0_CTL_5_0,P0 CTL 5 0"
hexmask.long.byte 0x10 16.--23. 1. " PLL0_DCO_CTRL         ,PLL0 DCO CTRL"
hexmask.long.byte 0x10 8.--15. 1. "           PLL0_LPF_CTRL         ,PLL0 LPF CTRL"
bitfld.long 0x10 4.--7. "    PLL0_CP_CTRL         ,PLL0 CP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 0.--1. "            PLL0_PFD_CTRL       ,PLL0 PFD CTRL" "0,1,2,3"
line.long 0x14 "P0_CTL_6_0,P0 CTL 6 0"
bitfld.long 0x14 31. " PLL0_FSEL_LOAD        ,PLL0 FSEL LOAD" "0,1"
bitfld.long 0x14 29. "            PLL0_FSEL_COARSE_OVRD ,PLL0 FSEL COARSE OVRD" "0,1"
bitfld.long 0x14 28. "     PLL0_FSEL_FINE_OVRD  ,PLL0 FSEL FINE OVRD" "0,1"
hexmask.long.byte 0x14 20.--26. 1. "             PLL0_FSEL_COARSE    ,PLL0 FSEL COARSE"
textline "                                         "
hexmask.long.tbyte 0x14 0.--19. 1. " PLL0_FSEL_FINE        ,PLL0 FSEL FINE"
line.long 0x18 "P0_CTL_7_0,P0 CTL 7 0"
hexmask.long.tbyte 0x18 0.--23. 1. " PLL0_VREG_CTRL        ,PLL0 VREG CTRL"
line.long 0x1C "P0_CTL_8_0,P0 CTL 8 0"
rbitfld.long 0x1C 31. " PLL0_RCAL_DONE        ,PLL0 RCAL DONE" "0,1"
rbitfld.long 0x1C 24.--28. "            PLL0_RCAL_VAL         ,PLL0 RCAL VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 23. "    PLL0_RCAL_BYP_EN     ,PLL0 RCAL BYP EN" "0,1"
bitfld.long 0x1C 16.--20. "             PLL0_RCAL_BYP_CODE  ,PLL0 RCAL BYP CODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x1C 15. " PLL0_RCAL_OVRD        ,PLL0 RCAL OVRD" "0,1"
bitfld.long 0x1C 13. "            PLL0_RCAL_CLK_EN      ,PLL0 RCAL CLK EN" "0,1"
bitfld.long 0x1C 12. "     PLL0_RCAL_EN         ,PLL0 RCAL EN" "0,1"
hexmask.long.word 0x1C 0.--11. 1. "             PLL0_BGAP_CTRL      ,PLL0 BGAP CTRL"
line.long 0x20 "P0_CTL_9_0,P0 CTL 9 0"
hexmask.long.word 0x20 16.--31. 1. " PLL0_MISC_OUT         ,PLL0 MISC OUT"
hexmask.long.word 0x20 0.--15. 1. "         PLL0_MISC_CTRL        ,PLL0 MISC CTRL"
line.long 0x24 "P0_CTL_10_0,P0 CTL 10 0"
bitfld.long 0x24 27. " PLL0_CFG_RESET        ,PLL0 CFG RESET" "0,1"
bitfld.long 0x24 25. "            PLL0_CFG_RS           ,PLL0 CFG RS" "0,1"
bitfld.long 0x24 24. "     PLL0_CFG_WS          ,PLL0 CFG WS" "0,1"
hexmask.long.byte 0x24 16.--23. 0x01 "             PLL0_CFG_ADDR       ,PLL0 CFG ADDR"
textline "                                         "
hexmask.long.word 0x24 0.--15. 1. " PLL0_CFG_WDATA        ,PLL0 CFG WDATA"
line.long 0x28 "P0_CTL_11_0,P0 CTL 11 0"
hexmask.long.word 0x28 0.--15. 1. " PLL0_CFG_RDATA        ,PLL0 CFG RDATA"
tree.end
tree "UPHY_MISC registers"
group.long 0x460++0x23
line.long 0x00 "PAD_P0_CTL_1_0,PAD P0 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P0_CTL_2_0,PAD P0 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P0_CTL_3_0,PAD P0 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P0_CTL_4_0,PAD P0 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P0_CTL_5_0,PAD P0 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P0_CTL_6_0,PAD P0 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P0_CTL_7_0,PAD P0 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P0_CTL_8_0,PAD P0 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P0_CTL_9_0,PAD P0 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x4A0++0x23
line.long 0x00 "PAD_P1_CTL_1_0,PAD P1 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P1_CTL_2_0,PAD P1 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P1_CTL_3_0,PAD P1 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P1_CTL_4_0,PAD P1 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P1_CTL_5_0,PAD P1 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P1_CTL_6_0,PAD P1 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P1_CTL_7_0,PAD P1 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P1_CTL_8_0,PAD P1 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P1_CTL_9_0,PAD P1 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x4E0++0x23
line.long 0x00 "PAD_P2_CTL_1_0,PAD P2 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P2_CTL_2_0,PAD P2 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P2_CTL_3_0,PAD P2 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P2_CTL_4_0,PAD P2 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P2_CTL_5_0,PAD P2 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P2_CTL_6_0,PAD P2 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P2_CTL_7_0,PAD P2 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P2_CTL_8_0,PAD P2 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P2_CTL_9_0,PAD P2 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x520++0x23
line.long 0x00 "PAD_P3_CTL_1_0,PAD P3 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P3_CTL_2_0,PAD P3 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P3_CTL_3_0,PAD P3 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P3_CTL_4_0,PAD P3 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P3_CTL_5_0,PAD P3 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P3_CTL_6_0,PAD P3 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P3_CTL_7_0,PAD P3 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P3_CTL_8_0,PAD P3 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P3_CTL_9_0,PAD P3 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x560++0x23
line.long 0x00 "PAD_P4_CTL_1_0,PAD P4 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P4_CTL_2_0,PAD P4 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P4_CTL_3_0,PAD P4 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P4_CTL_4_0,PAD P4 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P4_CTL_5_0,PAD P4 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P4_CTL_6_0,PAD P4 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P4_CTL_7_0,PAD P4 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P4_CTL_8_0,PAD P4 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P4_CTL_9_0,PAD P4 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x5A0++0x23
line.long 0x00 "PAD_P5_CTL_1_0,PAD P5 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P5_CTL_2_0,PAD P5 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P5_CTL_3_0,PAD P5 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P5_CTL_4_0,PAD P5 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P5_CTL_5_0,PAD P5 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P5_CTL_6_0,PAD P5 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P5_CTL_7_0,PAD P5 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P5_CTL_8_0,PAD P5 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P5_CTL_9_0,PAD P5 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
group.long 0x5E0++0x23
line.long 0x00 "PAD_P6_CTL_1_0,PAD P6 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_P6_CTL_2_0,PAD P6 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_P6_CTL_3_0,PAD P6 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_P6_CTL_4_0,PAD P6 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_P6_CTL_5_0,PAD P6 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_P6_CTL_6_0,PAD P6 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_P6_CTL_7_0,PAD P6 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_P6_CTL_8_0,PAD P6 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_P6_CTL_9_0,PAD P6 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
tree.end
tree "UPHY_PLL registers"
group.long 0x860++0x2B
line.long 0x00 "S0_CTL_1_0,S0 CTL 1 0"
bitfld.long 0x00 28.--29. " PLL0_FREQ_PSDIV       ,PLL0 FREQ PSDIV" "0,1,2,3"
hexmask.long.byte 0x00 20.--27. 1. "            PLL0_FREQ_NDIV        ,PLL0 FREQ NDIV"
bitfld.long 0x00 16.--17. "    PLL0_FREQ_MDIV       ,PLL0 FREQ MDIV" "0,1,2,3"
rbitfld.long 0x00 15. "             PLL0_LOCKDET_STATUS ,PLL0 LOCKDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 8.--9. " PLL0_MODE             ,PLL0 MODE" "0,1,2,3"
bitfld.long 0x00 7. "            PLL0_BYPASS_EN        ,PLL0 BYPASS EN" "0,1"
bitfld.long 0x00 6. "     PLL0_FREERUN_EN      ,PLL0 FREERUN EN" "0,1"
bitfld.long 0x00 4. "             PLL0_PWR_OVRD       ,PLL0 PWR OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 3. " PLL0_ENABLE           ,PLL0 ENABLE" "0,1"
bitfld.long 0x00 1.--2. "            PLL0_SLEEP            ,PLL0 SLEEP" "0,1,2,3"
bitfld.long 0x00 0. "     PLL0_IDDQ            ,PLL0 IDDQ" "0,1"
line.long 0x04 "S0_CTL_2_0,S0 CTL 2 0"
hexmask.long.tbyte 0x04 4.--27. 1. " PLL0_CAL_CTRL         ,PLL0 CAL CTRL"
bitfld.long 0x04 3. "       PLL0_CAL_RESET        ,PLL0 CAL RESET" "0,1"
bitfld.long 0x04 2. "     PLL0_CAL_OVRD        ,PLL0 CAL OVRD" "0,1"
bitfld.long 0x04 1. "             PLL0_CAL_DONE       ,PLL0 CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x04 0. " PLL0_CAL_EN           ,PLL0 CAL EN" "0,1"
line.long 0x08 "S0_CTL_3_0,S0 CTL 3 0"
hexmask.long.tbyte 0x08 4.--27. 1. " PLL0_LOCKDET_CTRL     ,PLL0 LOCKDET CTRL"
bitfld.long 0x08 0. "       PLL0_LOCKDET_RESET    ,PLL0 LOCKDET RESET" "0,1"
line.long 0x0C "S0_CTL_4_0,S0 CTL 4 0"
bitfld.long 0x0C 28. " PLL0_TCLKOUT_EN       ,PLL0 TCLKOUT EN" "0,1"
bitfld.long 0x0C 20.--23. "            PLL0_CLKDIST_CTRL     ,PLL0 CLKDIST CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 19. "    PLL0_XDIGCLK_EN      ,PLL0 XDIGCLK EN" "0,1"
bitfld.long 0x0C 16.--18. "             PLL0_XDIGCLK_SEL    ,PLL0 XDIGCLK SEL" "0,1,2,3,4,5,6,7"
textline "                                         "
bitfld.long 0x0C 15. " PLL0_TXCLKREF_EN      ,PLL0 TXCLKREF EN" "0,1"
bitfld.long 0x0C 12.--13. "            PLL0_TXCLKREF_SEL     ,PLL0 TXCLKREF SEL" "0,1,2,3"
bitfld.long 0x0C 9. "     PLL0_FBCLKBUF_EN     ,PLL0 FBCLKBUF EN" "0,1"
bitfld.long 0x0C 8. "             PLL0_REFCLKBUF_EN   ,PLL0 REFCLKBUF EN" "0,1"
textline "                                         "
bitfld.long 0x0C 4.--7. " PLL0_REFCLK_SEL       ,PLL0 REFCLK SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0. "           PLL0_REFCLK_TERM100   ,PLL0 REFCLK TERM100" "0,1"
line.long 0x10 "S0_CTL_5_0,S0 CTL 5 0"
hexmask.long.byte 0x10 16.--23. 1. " PLL0_DCO_CTRL         ,PLL0 DCO CTRL"
hexmask.long.byte 0x10 8.--15. 1. "           PLL0_LPF_CTRL         ,PLL0 LPF CTRL"
bitfld.long 0x10 4.--7. "    PLL0_CP_CTRL         ,PLL0 CP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 0.--1. "            PLL0_PFD_CTRL       ,PLL0 PFD CTRL" "0,1,2,3"
line.long 0x14 "S0_CTL_6_0,S0 CTL 6 0"
bitfld.long 0x14 31. " PLL0_FSEL_LOAD        ,PLL0 FSEL LOAD" "0,1"
bitfld.long 0x14 29. "            PLL0_FSEL_COARSE_OVRD ,PLL0 FSEL COARSE OVRD" "0,1"
bitfld.long 0x14 28. "     PLL0_FSEL_FINE_OVRD  ,PLL0 FSEL FINE OVRD" "0,1"
hexmask.long.byte 0x14 20.--26. 1. "             PLL0_FSEL_COARSE    ,PLL0 FSEL COARSE"
textline "                                         "
hexmask.long.tbyte 0x14 0.--19. 1. " PLL0_FSEL_FINE        ,PLL0 FSEL FINE"
line.long 0x18 "S0_CTL_7_0,S0 CTL 7 0"
hexmask.long.tbyte 0x18 0.--23. 1. " PLL0_VREG_CTRL        ,PLL0 VREG CTRL"
line.long 0x1C "S0_CTL_8_0,S0 CTL 8 0"
bitfld.long 0x1C 31. " PLL0_RCAL_DONE        ,PLL0 RCAL DONE" "0,1"
bitfld.long 0x1C 24.--28. "            PLL0_RCAL_VAL         ,PLL0 RCAL VAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x1C 23. "    PLL0_RCAL_BYP_EN     ,PLL0 RCAL BYP EN" "0,1"
bitfld.long 0x1C 16.--20. "             PLL0_RCAL_BYP_CODE  ,PLL0 RCAL BYP CODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.long 0x1C 15. " PLL0_RCAL_OVRD        ,PLL0 RCAL OVRD" "0,1"
bitfld.long 0x1C 13. "            PLL0_RCAL_CLK_EN      ,PLL0 RCAL CLK EN" "0,1"
bitfld.long 0x1C 12. "     PLL0_RCAL_EN         ,PLL0 RCAL EN" "0,1"
hexmask.long.word 0x1C 0.--11. 1. "             PLL0_BGAP_CTRL      ,PLL0 BGAP CTRL"
line.long 0x20 "S0_CTL_9_0,S0 CTL 9 0"
hexmask.long.word 0x20 16.--31. 1. " PLL0_MISC_OUT         ,PLL0 MISC OUT"
hexmask.long.word 0x20 0.--15. 1. "         PLL0_MISC_CTRL        ,PLL0 MISC CTRL"
line.long 0x24 "S0_CTL_10_0,S0 CTL 10 0"
bitfld.long 0x24 27. " PLL0_CFG_RESET        ,PLL0 CFG RESET" "0,1"
bitfld.long 0x24 25. "            PLL0_CFG_RS           ,PLL0 CFG RS" "0,1"
bitfld.long 0x24 24. "     PLL0_CFG_WS          ,PLL0 CFG WS" "0,1"
hexmask.long.byte 0x24 16.--23. 0x01 "             PLL0_CFG_ADDR       ,PLL0 CFG ADDR"
textline "                                         "
hexmask.long.word 0x24 0.--15. 1. " PLL0_CFG_WDATA        ,PLL0 CFG WDATA"
line.long 0x28 "S0_CTL_11_0,S0 CTL 11 0"
hexmask.long.word 0x28 0.--15. 1. " PLL0_CFG_RDATA        ,PLL0 CFG RDATA"
tree.end
tree "UPHY_MISC registers"
group.long 0x960++0x23
line.long 0x00 "PAD_S0_CTL_1_0,PAD S0 CTL 1 0"
rbitfld.long 0x00 28.--29. " AUX_RX_STAT_IDLE      ,AUX RX STAT IDLE" "0,1,2,3"
bitfld.long 0x00 26. "            AUX_RX_IDLE_BYP       ,AUX RX IDLE BYP" "0,1"
bitfld.long 0x00 24.--25. "     AUX_RX_IDLE_TH       ,AUX RX IDLE TH" "0,1,2,3"
bitfld.long 0x00 22. "             AUX_RX_IDLE_EN      ,AUX RX IDLE EN" "0,1"
textline "                                         "
bitfld.long 0x00 20.--21. " AUX_RX_IDLE_MODE      ,AUX RX IDLE MODE" "0,1,2,3"
bitfld.long 0x00 19. "            AUX_RX_TERM_MODE      ,AUX RX TERM MODE" "0,1"
bitfld.long 0x00 18. "     AUX_RX_TERM_EN       ,AUX RX TERM EN" "0,1"
bitfld.long 0x00 17. "             AUX_RX_IDDQ_OVRD    ,AUX RX IDDQ OVRD" "0,1"
textline "                                         "
bitfld.long 0x00 16. " AUX_RX_IDDQ           ,AUX RX IDDQ" "0,1"
bitfld.long 0x00 13. "            AUX_RX_MODE_OVRD      ,AUX RX MODE OVRD" "0,1"
bitfld.long 0x00 12. "     AUX_TX_MODE_OVRD     ,AUX TX MODE OVRD" "0,1"
rbitfld.long 0x00 7. "             AUX_TX_RDET_STATUS  ,AUX TX RDET STATUS" "0,1"
textline "                                         "
bitfld.long 0x00 6. " AUX_TX_RDET_CLK_EN    ,AUX TX RDET CLK EN" "0,1"
bitfld.long 0x00 5. "            AUX_TX_RDET_BYP       ,AUX TX RDET BYP" "0,1"
bitfld.long 0x00 4. "     AUX_TX_RDET_EN       ,AUX TX RDET EN" "0,1"
bitfld.long 0x00 2. "             AUX_TX_TERM_EN      ,AUX TX TERM EN" "0,1"
textline "                                         "
bitfld.long 0x00 1. " AUX_TX_IDDQ_OVRD      ,AUX TX IDDQ OVRD" "0,1"
bitfld.long 0x00 0. "            AUX_TX_IDDQ           ,AUX TX IDDQ" "0,1"
line.long 0x04 "PAD_S0_CTL_2_0,PAD S0 CTL 2 0"
bitfld.long 0x04 31. " RX_RATE_PLL_OVRD      ,RX RATE PLL OVRD" "0,1"
bitfld.long 0x04 30. "            TX_RATE_PLL_OVRD      ,TX RATE PLL OVRD" "0,1"
bitfld.long 0x04 29. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x04 28. "             TX_RATE_PLL         ,TX RATE PLL" "0,1"
textline "                                         "
bitfld.long 0x04 25. " RX_PWR_OVRD           ,RX PWR OVRD" "0,1"
bitfld.long 0x04 24. "            TX_PWR_OVRD           ,TX PWR OVRD" "0,1"
bitfld.long 0x04 22.--23. "     RX_RATE_PDIV         ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x04 20.--21. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 18.--19. " RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 16.--17. "            TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x04 15. "     RX_DATA_EN           ,RX DATA EN" "0,1"
bitfld.long 0x04 12.--13. "             RX_SLEEP            ,RX SLEEP" "0,1,2,3"
textline "                                         "
bitfld.long 0x04 9. " RX_IDDQ_OVRD          ,RX IDDQ OVRD" "0,1"
bitfld.long 0x04 8. "            RX_IDDQ               ,RX IDDQ" "0,1"
bitfld.long 0x04 7. "     TX_DATA_EN           ,TX DATA EN" "0,1"
bitfld.long 0x04 6. "             TX_DATA_READY       ,TX DATA READY" "0,1"
textline "                                         "
bitfld.long 0x04 4.--5. " TX_SLEEP              ,TX SLEEP" "0,1,2,3"
bitfld.long 0x04 1. "            TX_IDDQ_OVRD          ,TX IDDQ OVRD" "0,1"
bitfld.long 0x04 0. "     TX_IDDQ              ,TX IDDQ" "0,1"
line.long 0x08 "PAD_S0_CTL_3_0,PAD S0 CTL 3 0"
bitfld.long 0x08 16.--19. " RX_BYP_CTRL           ,RX BYP CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 15. "           RX_BYP_OVRD           ,RX BYP OVRD" "0,1"
bitfld.long 0x08 14. "     RX_BYP_EN            ,RX BYP EN" "0,1"
bitfld.long 0x08 12.--13. "             RX_BYP_MODE         ,RX BYP MODE" "0,1,2,3"
textline "                                         "
bitfld.long 0x08 11. " RX_BYP_REFCLK_EN      ,RX BYP REFCLK EN" "0,1"
rbitfld.long 0x08 8.--9. "            RX_BYP_DATA           ,RX BYP DATA" "0,1,2,3"
bitfld.long 0x08 7. "     TX_BYP_OVRD          ,TX BYP OVRD" "0,1"
bitfld.long 0x08 6. "             TX_BYP_EN           ,TX BYP EN" "0,1"
textline "                                         "
bitfld.long 0x08 4.--5. " TX_BYP_MODE           ,TX BYP MODE" "0,1,2,3"
bitfld.long 0x08 0.--1. "            TX_BYP_DATA           ,TX BYP DATA" "0,1,2,3"
line.long 0x0C "PAD_S0_CTL_4_0,PAD S0 CTL 4 0"
bitfld.long 0x0C 23. " RX_TERM_OVRD          ,RX TERM OVRD" "0,1"
bitfld.long 0x0C 21. "            RX_TERM_EN            ,RX TERM EN" "0,1"
bitfld.long 0x0C 20. "     RX_TERM_MODE         ,RX TERM MODE" "0,1"
bitfld.long 0x0C 19. "             TX_TERM_OVRD        ,TX TERM OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 16. " TX_TERM_MODE          ,TX TERM MODE" "0,1"
bitfld.long 0x0C 11. "            RX_CDR_RESET_OVRD     ,RX CDR RESET OVRD" "0,1"
bitfld.long 0x0C 10. "     RX_CDR_RESET         ,RX CDR RESET" "0,1"
bitfld.long 0x0C 9. "             TX_SYNC_OVRD        ,TX SYNC OVRD" "0,1"
textline "                                         "
bitfld.long 0x0C 8. " TX_SYNC               ,TX SYNC" "0,1"
bitfld.long 0x0C 4. "            TX_SYNC_MODE          ,TX SYNC MODE" "0,1"
bitfld.long 0x0C 0.--3. "     TX_SYNC_DLY          ,TX SYNC DLY" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "PAD_S0_CTL_5_0,PAD S0 CTL 5 0"
hexmask.long.word 0x10 16.--31. 1. " RX_EOM_STATUS         ,RX EOM STATUS"
bitfld.long 0x10 15. "         RX_CEE_OVRD           ,RX CEE OVRD" "0,1"
rbitfld.long 0x10 9. "     RX_EOM_DONE          ,RX EOM DONE" "0,1"
bitfld.long 0x10 8. "             RX_EOM_EN           ,RX EOM EN" "0,1"
textline "                                         "
bitfld.long 0x10 7. " RX_EQ_RESET           ,RX EQ RESET" "0,1"
rbitfld.long 0x10 5. "            RX_EQ_TRAIN_DONE      ,RX EQ TRAIN DONE" "0,1"
bitfld.long 0x10 4. "     RX_EQ_TRAIN_EN       ,RX EQ TRAIN EN" "0,1"
rbitfld.long 0x10 1. "             RX_CAL_DONE         ,RX CAL DONE" "0,1"
textline "                                         "
bitfld.long 0x10 0. " RX_CAL_EN             ,RX CAL EN" "0,1"
line.long 0x14 "PAD_S0_CTL_6_0,PAD S0 CTL 6 0"
bitfld.long 0x14 15. " LOOP_FED_EN           ,LOOP FED EN" "0,1"
bitfld.long 0x14 14. "            LOOP_FEA_EN           ,LOOP FEA EN" "0,1"
bitfld.long 0x14 13. "     LOOP_NEA_EN          ,LOOP NEA EN" "0,1"
bitfld.long 0x14 12. "             LOOP_NED_EN         ,LOOP NED EN" "0,1"
textline "                                         "
bitfld.long 0x14 8.--9. " LOOP_FED_MODE         ,LOOP FED MODE" "0,1,2,3"
bitfld.long 0x14 4.--7. "            LOOP_FEA_MODE         ,LOOP FEA MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--1. "    LOOP_NED_MODE        ,LOOP NED MODE" "0,1,2,3"
line.long 0x18 "PAD_S0_CTL_7_0,PAD S0 CTL 7 0"
hexmask.long.byte 0x18 16.--23. 1. " MISC_OUT              ,MISC OUT"
hexmask.long.byte 0x18 0.--7. 1. "           MISC_CTRL             ,MISC CTRL"
line.long 0x1C "PAD_S0_CTL_8_0,PAD S0 CTL 8 0"
bitfld.long 0x1C 27. " CFG_RESET             ,CFG RESET" "0,1"
bitfld.long 0x1C 25. "            CFG_RS                ,CFG RS" "0,1"
bitfld.long 0x1C 24. "     CFG_WS               ,CFG WS" "0,1"
hexmask.long.byte 0x1C 16.--23. 0x01 "             CFG_ADDR            ,CFG ADDR"
textline "                                         "
hexmask.long.word 0x1C 0.--15. 1. " CFG_WDATA             ,CFG WDATA"
line.long 0x20 "PAD_S0_CTL_9_0,PAD S0 CTL 9 0"
hexmask.long.word 0x20 0.--15. 1. " CFG_RDATA             ,CFG RDATA"
tree.end
tree "UPHY_US3 registers"
group.long 0xA60++0x1B
line.long 0x00 "PAD0_ECTL_1_0,PAD0 ECTL 1 0"
bitfld.long 0x00 24.--27. " RX_FELS               ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "           RX_TERM_CTRL          ,RX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 16.--17. "     TX_TERM_CTRL         ,TX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 12.--15. "             TX_DRV_CTRL         ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 8.--11. " TX_DRV_SLEW           ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "           TX_DRV_AMP            ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "PAD0_ECTL_2_0,PAD0 ECTL 2 0"
bitfld.long 0x04 16.--19. " RX_IQ_CTRL            ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--15. 1. "           RX_CTLE               ,RX CTLE"
line.long 0x08 "PAD0_ECTL_3_0,PAD0 ECTL 3 0"
line.long 0x0C "PAD0_ECTL_4_0,PAD0 ECTL 4 0"
hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL           ,RX CDR CTRL"
hexmask.long.byte 0x0C 0.--7. 1. "         RX_PI_CTRL            ,RX PI CTRL"
line.long 0x10 "PAD0_ECTL_5_0,PAD0 ECTL 5 0"
line.long 0x14 "PAD0_ECTL_6_0,PAD0 ECTL 6 0"
line.long 0x18 "PAD0_CTL_0_0,PAD0 CTL 0 0"
bitfld.long 0x18 11.--12. " RX_RATE_PDIV          ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x18 9.--10. "            RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 8. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x18 3.--4. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x18 1.--2. " TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 0. "            TX_RATE_PLL           ,TX RATE PLL" "0,1"
group.long 0xAA0++0x1B
line.long 0x00 "PAD1_ECTL_1_0,PAD1 ECTL 1 0"
bitfld.long 0x00 24.--27. " RX_FELS               ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "           RX_TERM_CTRL          ,RX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 16.--17. "     TX_TERM_CTRL         ,TX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 12.--15. "             TX_DRV_CTRL         ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 8.--11. " TX_DRV_SLEW           ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "           TX_DRV_AMP            ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "PAD1_ECTL_2_0,PAD1 ECTL 2 0"
bitfld.long 0x04 16.--19. " RX_IQ_CTRL            ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--15. 1. "           RX_CTLE               ,RX CTLE"
line.long 0x08 "PAD1_ECTL_3_0,PAD1 ECTL 3 0"
line.long 0x0C "PAD1_ECTL_4_0,PAD1 ECTL 4 0"
hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL           ,RX CDR CTRL"
hexmask.long.byte 0x0C 0.--7. 1. "         RX_PI_CTRL            ,RX PI CTRL"
line.long 0x10 "PAD1_ECTL_5_0,PAD1 ECTL 5 0"
line.long 0x14 "PAD1_ECTL_6_0,PAD1 ECTL 6 0"
line.long 0x18 "PAD1_CTL_0_0,PAD1 CTL 0 0"
bitfld.long 0x18 11.--12. " RX_RATE_PDIV          ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x18 9.--10. "            RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 8. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x18 3.--4. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x18 1.--2. " TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 0. "            TX_RATE_PLL           ,TX RATE PLL" "0,1"
group.long 0xAE0++0x1B
line.long 0x00 "PAD2_ECTL_1_0,PAD2 ECTL 1 0"
bitfld.long 0x00 24.--27. " RX_FELS               ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "           RX_TERM_CTRL          ,RX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 16.--17. "     TX_TERM_CTRL         ,TX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 12.--15. "             TX_DRV_CTRL         ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 8.--11. " TX_DRV_SLEW           ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "           TX_DRV_AMP            ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "PAD2_ECTL_2_0,PAD2 ECTL 2 0"
bitfld.long 0x04 16.--19. " RX_IQ_CTRL            ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--15. 1. "           RX_CTLE               ,RX CTLE"
line.long 0x08 "PAD2_ECTL_3_0,PAD2 ECTL 3 0"
line.long 0x0C "PAD2_ECTL_4_0,PAD2 ECTL 4 0"
hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL           ,RX CDR CTRL"
hexmask.long.byte 0x0C 0.--7. 1. "         RX_PI_CTRL            ,RX PI CTRL"
line.long 0x10 "PAD2_ECTL_5_0,PAD2 ECTL 5 0"
line.long 0x14 "PAD2_ECTL_6_0,PAD2 ECTL 6 0"
line.long 0x18 "PAD2_CTL_0_0,PAD2 CTL 0 0"
bitfld.long 0x18 11.--12. " RX_RATE_PDIV          ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x18 9.--10. "            RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 8. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x18 3.--4. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x18 1.--2. " TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 0. "            TX_RATE_PLL           ,TX RATE PLL" "0,1"
group.long 0xB20++0x1B
line.long 0x00 "PAD3_ECTL_1_0,PAD3 ECTL 1 0"
bitfld.long 0x00 24.--27. " RX_FELS               ,RX FELS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "           RX_TERM_CTRL          ,RX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 16.--17. "     TX_TERM_CTRL         ,TX TERM CTRL" "0,1,2,3"
bitfld.long 0x00 12.--15. "             TX_DRV_CTRL         ,TX DRV CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 8.--11. " TX_DRV_SLEW           ,TX DRV SLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "           TX_DRV_AMP            ,TX DRV AMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "PAD3_ECTL_2_0,PAD3 ECTL 2 0"
bitfld.long 0x04 16.--19. " RX_IQ_CTRL            ,RX IQ CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x04 0.--15. 1. "           RX_CTLE               ,RX CTLE"
line.long 0x08 "PAD3_ECTL_3_0,PAD3 ECTL 3 0"
line.long 0x0C "PAD3_ECTL_4_0,PAD3 ECTL 4 0"
hexmask.long.word 0x0C 16.--31. 1. " RX_CDR_CTRL           ,RX CDR CTRL"
hexmask.long.byte 0x0C 0.--7. 1. "         RX_PI_CTRL            ,RX PI CTRL"
line.long 0x10 "PAD3_ECTL_5_0,PAD3 ECTL 5 0"
line.long 0x14 "PAD3_ECTL_6_0,PAD3 ECTL 6 0"
line.long 0x18 "PAD3_CTL_0_0,PAD3 CTL 0 0"
bitfld.long 0x18 11.--12. " RX_RATE_PDIV          ,RX RATE PDIV" "0,1,2,3"
bitfld.long 0x18 9.--10. "            RX_RATE_SDIV          ,RX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 8. "     RX_RATE_PLL          ,RX RATE PLL" "0,1"
bitfld.long 0x18 3.--4. "             TX_RATE_PDIV        ,TX RATE PDIV" "0,1,2,3"
textline "                                         "
bitfld.long 0x18 1.--2. " TX_RATE_SDIV          ,TX RATE SDIV" "0,1,2,3"
bitfld.long 0x18 0. "            TX_RATE_PLL           ,TX RATE PLL" "0,1"
tree.end
else
textline " "
group.long 0x360++0x03
line.long 0x00 "USB2_VBUS_ID_0,USB2 VBUS ID 0"
bitfld.long 0x00 24. " VBUS_WAKEUP_CHNG_INTR_EN  ,VBUS WAKEUP CHNG INTR EN" "No,Yes"
bitfld.long 0x00 23. "          VBUS_WAKEUP_ST_CHNG            ,VBUS WAKEUP ST CHNG" "No,Yes"
textline "                                         "
rbitfld.long 0x00 22. " VBUS_WAKEUP               ,VBUS WAKEUP" "No,Yes"
bitfld.long 0x00 18.--21. "          ID_OVERRIDE                    ,ID OVERRIDE" "ID_GND,ID_C,ID_B,,ID_A,,,,ID_FLOAT,?..."
textline "                                         "
bitfld.long 0x00 16.--17. " ID_SOURCE_SELECT          ,ID SOURCE SELECT" "VGPIO,ID_OVERRIDE,?..."
bitfld.long 0x00 15. "  VBUS_WAKEUP_OVERRIDE           ,VBUS WAKEUP OVERRIDE" "No,Yes"
textline "                                         "
bitfld.long 0x00 14. " VBUS_OVERRIDE             ,VBUS OVERRIDE" "No,Yes"
bitfld.long 0x00 12.--13. "          VBUS_SOURCE_SELECT             ,VBUS SOURCE SELECT" "VGPIO,VBUS_OVERRIDE,?..."
textline "                                         "
bitfld.long 0x00 11. " IDDIG_CHNG_INTR_EN        ,IDDIG CHNG INTR EN" "No,Yes"
bitfld.long 0x00 10. "          IDDIG_ST_CHNG                  ,IDDIG ST CHNG" "No,Yes"
textline "                                         "
rbitfld.long 0x00 9. " IDDIG_C                   ,IDDIG C" "No,Yes"
rbitfld.long 0x00 8. "          IDDIG_B                        ,IDDIG B" "No,Yes"
textline "                                         "
rbitfld.long 0x00 7. " IDDIG                     ,IDDIG" "No,Yes"
rbitfld.long 0x00 6. "          IDDIG                          ,IDDIG" "No,Yes"
textline "                                         "
bitfld.long 0x00 5. " VBUS_VALID_CHNG_INTR_EN   ,VBUS VALID CHNG INTR EN" "No,Yes"
bitfld.long 0x00 4. "          VBUS_VALID_ST_CHNG             ,VBUS VALID ST CHNG" "No,Yes"
textline "                                         "
rbitfld.long 0x00 3. " VBUS_VALID                ,VBUS VALID" "No,Yes"
bitfld.long 0x00 2. "          OTG_VBUS_SESS_VLD_CHNG_INTR_EN ,OTG VBUS SESS VLD CHNG INTR EN" "No,Yes"
textline "                                         "
bitfld.long 0x00 1. " OTG_VBUS_SESS_VLD_ST_CHNG ,OTG VBUS SESS VLD ST CHNG" "No,Yes"
rbitfld.long 0x00 0. "          OTG_VBUS_SESS_VLD              ,OTG VBUS SESS VLD" "No,Yes"
group.long 0x1364++0x07
line.long 0x00 "HOST_AXI_SEC0_0,HOST AXI SEC0 0"
bitfld.long 0x00 4. " AWPROT1                   ,AWPROT1" "0,1"
bitfld.long 0x00 0. "            ARPROT1                        ,ARPROT1" "0,1"
line.long 0x04 "HOST_AXI_SEC2_0,HOST AXI SEC2 Register"
bitfld.long 0x04 12. " AWCACHE_OVRD              ,AWCACHE OVRD" "No override,Override"
bitfld.long 0x04 8.--11. "  AWCACHE                        ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 4. " ARCACHE_OVRD              ,ARCACHE OVRD" "No override,Override"
bitfld.long 0x04 0.--3. "  ARCACHE                        ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x137C++0x07
line.long 0x00 "DEV_AXI_SEC0_0,DEV AXI SEC0 Register"
bitfld.long 0x00 4. " AWPROT1                   ,AWPROT1" "0,1"
bitfld.long 0x00 0. "            ARPROT1                        ,ARPROT1" "0,1"
line.long 0x04 "DEV_AXI_SEC2_0,DEV AXI SEC2 Register"
bitfld.long 0x04 12. " AWCACHE_OVRD              ,AWCACHE OVRD" "No override,Override"
bitfld.long 0x04 8.--11. "  AWCACHE                        ,AWCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x04 4. " ARCACHE_OVRD              ,ARCACHE OVRD" "No override,Override"
bitfld.long 0x04 0.--3. "  ARCACHE                        ,ARCACHE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
textline "                                         "
width 16.
sif (!cpuis("TEGRAX2"))
group.long 0xC60++0x03
line.long 0x00 "USB2_VBUS_ID_0,USB2 VBUS ID 0"
bitfld.long 0x00 24. " VBUS_WAKEUP_CHNG_INTR_EN  ,VBUS WAKEUP CHNG INTR EN" "No,Yes"
bitfld.long 0x00 23. "          VBUS_WAKEUP_ST_CHNG            ,VBUS WAKEUP ST CHNG" "No,Yes"
textline "                         "
rbitfld.long 0x00 22. " VBUS_WAKEUP               ,VBUS WAKEUP" "No,Yes"
bitfld.long 0x00 18.--21. "          ID_OVERRIDE                    ,ID OVERRIDE" "ID_GND,ID_C,ID_B,,ID_A,,,,ID_FLOAT,?..."
textline "                         "
bitfld.long 0x00 16.--17. " ID_SOURCE_SELECT          ,ID SOURCE SELECT" "VGPIO,ID_OVERRIDE,?..."
bitfld.long 0x00 15. "  VBUS_WAKEUP_OVERRIDE           ,VBUS WAKEUP OVERRIDE" "No,Yes"
textline "                         "
bitfld.long 0x00 14. " VBUS_OVERRIDE             ,VBUS OVERRIDE" "No,Yes"
bitfld.long 0x00 12.--13. "          VBUS_SOURCE_SELECT             ,VBUS SOURCE SELECT" "VGPIO,VBUS_OVERRIDE,?..."
textline "                         "
bitfld.long 0x00 11. " IDDIG_CHNG_INTR_EN        ,IDDIG CHNG INTR EN" "No,Yes"
bitfld.long 0x00 10. "          IDDIG_ST_CHNG                  ,IDDIG ST CHNG" "No,Yes"
textline "                         "
rbitfld.long 0x00 9. " IDDIG_C                   ,IDDIG C" "No,Yes"
rbitfld.long 0x00 8. "          IDDIG_B                        ,IDDIG B" "No,Yes"
textline "                         "
rbitfld.long 0x00 7. " IDDIG                     ,IDDIG" "No,Yes"
rbitfld.long 0x00 6. "          IDDIG                          ,IDDIG" "No,Yes"
textline "                         "
bitfld.long 0x00 5. " VBUS_VALID_CHNG_INTR_EN   ,VBUS VALID CHNG INTR EN" "No,Yes"
bitfld.long 0x00 4. "          VBUS_VALID_ST_CHNG             ,VBUS VALID ST CHNG" "No,Yes"
textline "                         "
rbitfld.long 0x00 3. " VBUS_VALID                ,VBUS VALID" "No,Yes"
bitfld.long 0x00 2. "          OTG_VBUS_SESS_VLD_CHNG_INTR_EN ,OTG VBUS SESS VLD CHNG INTR EN" "No,Yes"
textline "                         "
bitfld.long 0x00 1. " OTG_VBUS_SESS_VLD_ST_CHNG ,OTG VBUS SESS VLD ST CHNG" "No,Yes"
rbitfld.long 0x00 0. "          OTG_VBUS_SESS_VLD              ,OTG VBUS SESS VLD" "No,Yes"
endif
width 0x0B
tree.end
tree "HOST PCI Config Registers"
base ad:0x03538000
width 8.
tree "XUSB PCI Config Registers"
rgroup.long 0x00++0x03
line.long 0x00 "CFG_0,XUSB Configuration Register 0"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT   ,DEVICE ID UNIT"
hexmask.long.word 0x00 0.--15. 1. "           VENDOR_ID           ,VENDOR ID"
group.long 0x04++0x03
line.long 0x00 "CFG_1,XUSB Configuration Register 1"
rbitfld.long 0x00 31. " DETECTED_PERR    ,T_XUSB_CFG_1 DETECTED PERR" "Not active,Active"
rbitfld.long 0x00 30. "     SIGNALED_SERR       ,T_XUSB_CFG_1 SIGNALED SERR" "Not active,Active"
rbitfld.long 0x00 29. "     RECEIVED_MASTER  ,T_XUSB_CFG_1 RECEIVED MASTER" "Not aborted,Aborted"
rbitfld.long 0x00 28. "       RECEIVED_TARGET ,T_XUSB_CFG_1 RECEIVED TARGET" "Not aborted,Aborted"
textline "                 "
rbitfld.long 0x00 27. " SIGNALED_TARGET  ,T_XUSB_CFG_1 SIGNALED TARGET" "Not aborted,Aborted"
rbitfld.long 0x00 25.--26. "    DEVSEL_TIMING       ,T_XUSB_CFG_1 DEVSEL TIMING" "Fast,Medium,Slow,?..."
rbitfld.long 0x00 24. "         MASTER_DATA_PERR ,T_XUSB_CFG_1 MASTER DATA PERR" "Inactive,Active"
rbitfld.long 0x00 23. "          FAST_BACK2BACK  ,T_XUSB_CFG_1 FAST BACK2BACK" "Incapable,Capable"
textline "                 "
rbitfld.long 0x00 21. " 66MHZ            ,T_XUSB_CFG_1 66MHZ" "Incapable,Capable"
rbitfld.long 0x00 20. "      CAPLIST             ,T_XUSB_CFG_1 CAPLIST" "Not present,Present"
rbitfld.long 0x00 19. "    INTR_STATUS      ,T_XUSB_CFG_1 INTR STATUS" "0,1"
bitfld.long 0x00 10. "                 INTR_DISABLE    ,T_XUSB_CFG_1 INTR DISABLE" "On,Off"
textline "                 "
rbitfld.long 0x00 9. " BACK2BACK        ,T_XUSB_CFG_1 BACK2BACK" "Disabled,Enabled"
rbitfld.long 0x00 8. "       SERR                ,T_XUSB_CFG_1 SERR" "Disabled,Enabled"
rbitfld.long 0x00 7. "       STEP             ,T_XUSB_CFG_1 STEP" "Disabled,Enabled"
rbitfld.long 0x00 6. "          PERR            ,T_XUSB_CFG_1 PERR" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 5. " PALETTE_SNOOP    ,T_XUSB_CFG_1 PALETTE SNOOP" "Disabled,Enabled"
rbitfld.long 0x00 4. "       WRITE_AND_INVAL     ,T_XUSB_CFG_1 WRITE AND INVAL" "Disabled,Enabled"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
textline "                 "
rbitfld.long 0x00 3. " SPECIAL_CYCLE    ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled"
else
textline "                 "
bitfld.long 0x00 3. " SPECIAL_CYCLE    ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled"
endif
textline "                 "
bitfld.long 0x00 2. " BUS_MASTER       ,T_XUSB_CFG_1 BUS MASTER" "Disabled,Enabled"
bitfld.long 0x00 1. "       MEMORY_SPACE        ,T_XUSB_CFG_1 MEMORY SPACE" "Disabled,Enabled"
bitfld.long 0x00 0. "       IO_SPACE         ,T_XUSB_CFG_1 IO SPACE" "Disabled,Enabled"
rgroup.long 0x08++0x07
line.long 0x00 "CFG_2,PCI Revision ID And Class Code Register 2"
hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS       ,T_XUSB_CFG_2 BASE CLASS"
hexmask.long.byte 0x00 16.--23. 1. "             SUB_CLASS           ,T_XUSB_CFG 2 SUB CLASS"
hexmask.long.byte 0x00 8.--15. 1. "             PROG_IF          ,T_XUSB_CFG 2 PROG IF"
hexmask.long.byte 0x00 0.--7. 1. "                REVISION_ID     ,T_XUSB_CFG_2 REVISION ID"
line.long 0x04 "CFG_3,PCI Configuration Register 3"
bitfld.long 0x04 23. " HEADER_TYPE_FUNC ,Identify whenever device contains single or multiple functions" "Single,Multi"
hexmask.long.byte 0x04 16.--22. 1. "         HEADER_TYPE_DEVICE  ,Header type - identify the layout of the bytes (0x10--0x3f) in configuration space"
bitfld.long 0x04 11.--15. "             LATENCY_TIMER    ,The value of the latency timer for this PCI bus master (In units of PCI bus clocks)" "0 clocks,8 clocks,16 clocks,24 clocks,32 clocks,40 clocks,48 clocks,56 clocks,64 clocks,72 clocks,80 clocks,88 clocks,96 clocks,104 clocks,112 clocks,120 clocks,128 clocks,136 clocks,144 clocks,152 clocks,160 clocks,168 clocks,176 clocks,184 clocks,192 clocks,200 clocks,208 clocks,216 clocks,224 clocks,232 clocks,240 clocks,248 clocks"
hexmask.long.byte 0x04 0.--7. 1. "        CACHE_LINE_SIZE ,T_XUSB_CFG_3 CACHE LINE SIZE"
group.long 0x10++0x07
line.long 0x00 "CFG_4,PCI Configuration Register 4"
hexmask.long.tbyte 0x00 15.--31. 0x80 " BASE_ADDRESS     ,Base address of the device"
hexmask.long.word 0x00 4.--14. 1. "         BAR_SIZE_32KB       ,T_XUSB_CFG_4 BAR SIZE 32KB"
rbitfld.long 0x00 3. "           PREFETCHABLE     ,T_XUSB_CFG_4 PREFETCHABLE" "Not prefetchable,Prefetchable"
rbitfld.long 0x00 1.--2. "  ADDRESS_TYPE    ,The ADDRESS_TYPE bits contain the type of the base address" "32,,64,?..."
textline "                 "
rbitfld.long 0x00 0. " SPACE_TYPE       ,The SPACE_TYPE bit indicates whether the register maps into memory or I/O space" "Memory,IO"
line.long 0x04 "CFG_5,XUSB Configuration Register 5"
rgroup.long 0x2C++0x03
line.long 0x00 "CFG_11,PCI Configuration Register 11"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID     ,T_XUSB_CFG_11 SUBSYSTEM ID"
hexmask.long.word 0x00 0.--15. 1. "           SUBSYSTEM_VENDOR_ID ,T_XUSB_CFG_11 SUBSYSTEM VENDOR ID"
rgroup.long 0x34++0x03
line.long 0x00 "CFG_13,PCI Configuration Register 13"
hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR          ,CAP pointer"
group.long 0x3C++0x07
line.long 0x00 "CFG_15,PCI Configuration Register 15"
hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT          ,Maximum time the device requires to gain access to the CPI bus"
hexmask.long.byte 0x00 16.--23. 1. "             MIN_GNT             ,Length of the burst period a device needs assuming a clock rate of 33 mhz"
hexmask.long.byte 0x00 8.--15. 1. "             INTR_PIN         ,Interrupt pin the device uses"
hexmask.long.byte 0x00 0.--7. 1. "                INTR_LINE       ,Interrupt routing information"
line.long 0x04 "CFG_16,PCI Configuration Register 16"
hexmask.long.word 0x04 16.--31. 1. " SUBSYSTEM_ID     ,SUBSYSTEM ID"
hexmask.long.word 0x04 0.--15. 1. "           SUBSYSTEM_VENDOR_ID ,SUBSYSTEM VENDOR ID"
rgroup.long 0x44++0x03
line.long 0x00 "CFG_17,PCI Configuration Register 17"
bitfld.long 0x00 31. " D3CPME_SUPPORT   ,T_XUSB_CFG_17 D3CPME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 30. "  D3HPME_SUPPORT      ,T_XUSB_CFG_17 D3HPME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 29. "  D2PME_SUPPORT    ,T_XUSB_CFG_17 D2PME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 28. "     D1PME_SUPPORT   ,T_XUSB_CFG_17 D1PME SUPPORT" "Not supported,Supported"
textline "                 "
bitfld.long 0x00 27. " D0PME_SUPPORT    ,T_XUSB_CFG_17 D0PME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 26. "  D2_SUPPORT          ,T_XUSB_CFG_17 D2 SUPPORT" "Not supported,Supported"
bitfld.long 0x00 25. "  D1_SUPPORT       ,T_XUSB_CFG_17 D1 SUPPORT" "Not supported,Supported"
bitfld.long 0x00 22.--24. "     AUXCUR          ,T_XUSB_CFG_17 AUXCUR" "Self,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA"
textline "                 "
bitfld.long 0x00 21. " DSI              ,T_XUSB_CFG_17 DSI" "Not needed,Needed"
bitfld.long 0x00 19. "     PMECLK              ,T_XUSB_CFG_17 PMECLK" "Not required,Required"
bitfld.long 0x00 16.--18. "   VER              ,T_XUSB_CFG_17 VER" ",,,VER_1P2,?..."
hexmask.long.byte 0x00 8.--15. 1. "           NEXT_PTR        ,T_XUSB_CFG_17 NEXT PTR"
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " CAP              ,T_XUSB_CFG_17 CAP"
group.long 0x48++0x03
line.long 0x00 "CFG_18,T_XUSB_CFG_18 PMCSR"
eventfld.long 0x00 15. " PMCSR_PMESTATUS  ,T_XUSB_CFG_18 PMCSR PMESTATUS" "Not pending,Pending"
rbitfld.long 0x00 13.--14. "    PMCSR_DSCALE        ,T_XUSB_CFG_18 PMCSR DSCALE" "DSCALE_INIT,?..."
rbitfld.long 0x00 9.--12. "    PMCSR_DSEL       ,T_XUSB_CFG_18 PMCSR DSEL" "DSEL_INIT,?..."
bitfld.long 0x00 8. "         PMCSR_PME       ,T_XUSB_CFG_18 PMCSR PME" "Enabled,Disabled"
textline "                 "
rbitfld.long 0x00 3. " PMCSR_NSR        ,T_XUSB_CFG_18 PMCSR NSR" "No reset,Reset"
bitfld.long 0x00 0.--1. "       PMCSR_PWRSTATE      ,PMCSR_PWRSTATE" "D0,D1,D2,D3H"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
group.long 0x60++0x03
line.long 0x00 "CFG_24,XUSB XHCI Configuration Control"
bitfld.long 0x00 8.--13. " FLADJ            ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--7. 1. "             SBRN                ,Serial bus release number register"
else
group.long 0x4C++0x03
line.long 0x00 "CFG_24,XUSB XHCI Configuration Control"
bitfld.long 0x00 8.--13. " FLADJ            ,Frame length adjustment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
hexmask.long.byte 0x00 0.--7. 1. "             SBRN                ,Serial bus release number register"
endif
textline "                 "
width 11.
group.long 0xC0++0x0F
line.long 0x00 "MSI_CTRL,MSI Message Control And Capability Register"
rbitfld.long 0x00 24. " VECTOR_MASK_CAP ,MSI-per-vector masking support" "Not supported,Supported"
rbitfld.long 0x00 23. "  64_ADDR_CAP ,Generating a 64-bit message address capability" "Not capable,Capable"
bitfld.long 0x00 20.--22. "  MULT_MSG_ENABLE ,System software writes to this field to indicate the number of allocated vectors" "1,2,4,8,16,32,?..."
rbitfld.long 0x00 17.--19. "  MULT_MSG_CAP ,Number of requested vectors" "1,2,4,8,16,32,?..."
textline "                    "
bitfld.long 0x00 16. " MSI_ENABLE      ,Enables the MSI capability" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "       NEXT_PTR    ,Next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "           CAP_ID          ,Capability block as the MSI capability block"
line.long 0x04 "MSI_ADDR1,MSI Message Address Register"
hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR        ,System-specified message address"
line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA        ,System-specified message data"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
group.long 0xD0++0x07
line.long 0x00 "MSI_MASK,MSI Message Data Register"
bitfld.long 0x00 0. " BIT             ,T_XUSB_MSI_MASK_BIT" "0,1"
line.long 0x04 "MSI_PEND,MSI Pending Bits Register"
hexmask.long.word 0x04 0.--15. 1. " BIT             ,T_XUSB_MSI_PEND_BIT"
endif
tree.end
width 18.
tree "XUSB Mailbox"
group.long 0xE0++0x13
line.long 0x00 "MAILBOX_CAP,CFG ARU MAILBOX CAP"
hexmask.long.byte 0x00 16.--23. 1. " LENGTH ,CFG ARU MAILBOX CAP LENGTH"
hexmask.long.byte 0x00 8.--15. 1. "        NEXTPTR   ,CFG ARU MAILBOX CAP NEXTPTR"
hexmask.long.byte 0x00 0.--7. 1. "           ID       ,CFG ARU MAILBOX CAP ID"
line.long 0x04 "MAILBOX_CMD,CFG ARU MAILBOX CMD"
bitfld.long 0x04 31. " INT_EN ,CFG ARU MAILBOX CMD INT EN" "Disabled,Enabled"
bitfld.long 0x04 30. "  DEST_XHCI ,CFG ARU MAILBOX CMD DEST XHCI" "Initialized,Completed"
bitfld.long 0x04 29. "  DEST_SMI ,CFG ARU MAILBOX CMD DEST SMI" "Initialized,Completed"
bitfld.long 0x04 28. "  DEST_PME ,CFG ARU MAILBOX CMD DEST PME" "Initialized,Completed"
bitfld.long 0x04 27. "  DEST_FALCON ,CFG ARU MAILBOX CMD DEST FALCON" "Initialized,Completed"
line.long 0x08 "MAILBOX_DATA_IN,CFG ARU MAILBOX DATA IN"
line.long 0x0C "MAILBOX_DATA_OUT,CFG ARU MAILBOX DATA OUT"
line.long 0x10 "MAILBOX_OWNER,CFG ARU MAILBOX OWNER"
hexmask.long.byte 0x10 0.--7. 1. " ID     ,CFG ARU MAILBOX OWNER ID"
tree.end
sif (cpu()=="TEGRAX1")
base ad:0x70090000
width 21.
tree "XUSB XHCI Registers"
rgroup.long 0x00++0x1B
line.long 0x00 "CAP_REG0,CAP REG0"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
else
hexmask.long.tbyte 0x00 15.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
endif
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH  ,CAP REG0 CAPLENGTH"
line.long 0x04 "CAP_HCSPARAMS1,CAP HCSPARAMS1"
hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS   ,CAP HCSPARAMS1 MAXPORTS"
hexmask.long.word 0x04 8.--18. 1. "           MAXINTRS   ,CAP HCSPARAMS1 MAXINTRS"
hexmask.long.byte 0x04 0.--7. 1. "         MAXSLOTS ,CAP HCSPARAMS1 MAXSLOTS"
line.long 0x08 "CAP_HCSPARAMS2,CAP HCSPARAMS2"
bitfld.long 0x08 27.--31. " MAXSPBLO   ,CAP HCSPARAMS2 MAXSPBLO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 26. "           SPR        ,CAP HCSPARAMS2 SPR" "False,True"
bitfld.long 0x08 21.--25. "        MAXSPBHI ,CAP HCSPARAMS2 MAXSPBHI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 4.--7. "           ERST_MAX ,CAP HCSPARAMS2 ERST MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                              "
bitfld.long 0x08 0.--3. " IST        ,CAP HCSPARAMS2 IST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CAP_HCSPARAMS3,CAP HCSPARAMS3"
hexmask.long.word 0x0C 16.--31. 1. " U2LAT      ,CAP HCSPARAMS3 U2LAT"
hexmask.long.byte 0x0C 0.--7. 1. "         U1LAT      ,CAP HCSPARAMS3 U1LAT"
line.long 0x10 "CAP_HCCPARAMS,CAP HCCPARAMS"
hexmask.long.word 0x10 16.--31. 1. " XECP       ,CAP HCCPARAMS XECP"
bitfld.long 0x10 12.--15. "         MAXPSASIZE ,CAP HCCPARAMS MAXPSASIZE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8. "           PAE      ,CAP HCCPARAMS PAE" "False,True"
bitfld.long 0x10 7. "        NSS      ,CAP HCCPARAMS NSS" "False,True"
textline "                              "
bitfld.long 0x10 6. " LTC        ,CAP HCCPARAMS LTC" "False,True"
bitfld.long 0x10 5. "        LHRC       ,CAP HCCPARAMS LHRC" "False,True"
bitfld.long 0x10 4. "        PIND     ,CAP HCCPARAMS PIND" "False,True"
bitfld.long 0x10 3. "        PPC      ,CAP HCCPARAMS PPC" "False,True"
textline "                              "
bitfld.long 0x10 2. " CSZ        ,CAP HCCPARAMS CSZ" "32B,64B"
bitfld.long 0x10 1. "          BNC        ,CAP HCCPARAMS BNC" "False,True"
bitfld.long 0x10 0. "        AC64     ,CAP HCCPARAMS AC64" "False,True"
line.long 0x14 "CAP_DBOFF,CAP DBOFF"
hexmask.long 0x14 2.--31. 0x04 " OFFSET     ,CAP DBOFF OFFSET"
line.long 0x18 "CAP_RTSOFF,CAP RTSOFF"
hexmask.long 0x18 5.--31. 0x20 " OFFSET     ,CAP RTSOFF OFFSET"
group.long 0x20++0x07
line.long 0x00 "OP_USBCMD,OP USBCMD"
bitfld.long 0x00 11. " EU3S       ,OP USBCMD EU3S" "Disabled,Enabled"
bitfld.long 0x00 10. "     EWE        ,OP USBCMD EWE" "Disabled,Enabled"
eventfld.long 0x00 9. "     CRS      ,OP USBCMD CRS" "Initialized,Start"
eventfld.long 0x00 8. "  CSS      ,OP USBCMD CSS" "Initialized,Start"
textline "                              "
bitfld.long 0x00 7. " LHCRST     ,OP USBCMD LHCRST" "Not pending,Pending"
bitfld.long 0x00 3. "  HSEE       ,OP USBCMD HSEE" "Disabled,Enabled"
bitfld.long 0x00 2. "     INTE     ,OP USBCMD INTE" "Disabled,Enabled"
bitfld.long 0x00 1. "     HCRST    ,OP USBCMD HCRST" "Not pending,Pending"
textline "                              "
bitfld.long 0x00 0. " RS         ,OP USBCMD RS" "Stopped,Running"
line.long 0x04 "OP_USBSTS,OP USBSTS"
rbitfld.long 0x04 12. " HCE        ,OP USBSTS HCE" "No error,Error"
rbitfld.long 0x04 11. "     CNR        ,OP USBSTS CNR" "Not ready,Ready"
eventfld.long 0x04 10. "    SRE      ,OP USBSTS SRE" "Not pending,Pending"
rbitfld.long 0x04 9. "  RSS      ,OP USBSTS RSS" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 8. " SSS        ,OP USBSTS SSS" "Not pending,Pending"
eventfld.long 0x04 4. "  PCD        ,OP USBSTS PCD" "Not pending,Pending"
eventfld.long 0x04 3. "  EINT     ,OP USBSTS EINT" "Not pending,Pending"
eventfld.long 0x04 2. "  HSE      ,OP USBSTS HSE" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 0. " HCH        ,HCH" "Halted,Running"
rgroup.long 0x28++0x03
line.long 0x00 "OP_PGSZ,OP PGSZ"
hexmask.long.word 0x00 0.--15. 1. " PAGESIZE   ,OP PGSZ PAGESIZE"
group.long 0x34++0x0B
line.long 0x00 "OP_DNCTRL,OP DNCTRL"
bitfld.long 0x00 15. " N15        ,OP DNCTRL N15" "Disabled,Enabled"
bitfld.long 0x00 14. "     N14        ,OP DNCTRL N14" "Disabled,Enabled"
bitfld.long 0x00 13. "     N13      ,OP DNCTRL N13" "Disabled,Enabled"
bitfld.long 0x00 12. "     N12      ,OP DNCTRL N12" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 11. " N11        ,OP DNCTRL N11" "Disabled,Enabled"
bitfld.long 0x00 10. "     N10        ,OP DNCTRL N10" "Disabled,Enabled"
bitfld.long 0x00 9. "     N9       ,OP DNCTRL N9" "Disabled,Enabled"
bitfld.long 0x00 8. "     N8       ,OP DNCTRL N8" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 7. " N7         ,OP DNCTRL N7" "Disabled,Enabled"
bitfld.long 0x00 6. "     N6         ,OP DNCTRL N6" "Disabled,Enabled"
bitfld.long 0x00 5. "     N5       ,OP DNCTRL N5" "Disabled,Enabled"
bitfld.long 0x00 4. "     N4       ,OP DNCTRL N4" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 3. " N3         ,OP DNCTRL N3" "Disabled,Enabled"
bitfld.long 0x00 2. "     N2         ,OP DNCTRL N2" "Disabled,Enabled"
bitfld.long 0x00 1. "     N1       ,OP DNCTRL N1" "Disabled,Enabled"
bitfld.long 0x00 0. "     N0       ,OP DNCTRL N0" "Disabled,Enabled"
line.long 0x04 "OP_CRCR0,OP CRCR0"
hexmask.long 0x04 6.--31. 1. " CRPLO      ,OP CRCR0 CRPLO"
textline "                              "
rbitfld.long 0x04 3. " CRR        ,OP CRCR0 CRR" "Stopped,Running"
eventfld.long 0x04 2. "      CA         ,OP CRCR0 CA" "Initialized,Aborted"
textline "                              "
eventfld.long 0x04 1. " CS         ,OP CRCR0 CS" "Initialized,Stop"
eventfld.long 0x04 0. "  RCS        ,OP CRCR0 RCS" "0,1"
line.long 0x08 "OP_CRCR1,OP CRCR1"
group.long 0x50++0x0B
line.long 0x00 "OP_DCBAAP0,OP DCBAAP0"
hexmask.long 0x00 6.--31. 1. " DCBAAPLO   ,OP DCBAAP0 DCBAAPLO"
line.long 0x04 "OP_DCBAAP1,OP DCBAAP1"
line.long 0x08 "OP_CONFIG,OP CONFIG"
hexmask.long.byte 0x08 0.--7. 1. " MAXSLOTSEN ,OP CONFIG MAXSLOTSEN"
textline "                              "
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
width 23.
group.long 0x420++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x420+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x420+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x430++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x430+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x430+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x440++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x440+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x440+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x450++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x450+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x450+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x460++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x460+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x470++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x470+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x480++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x480+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x490++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x490+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4A0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4A0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4B0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4B0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4C0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4C0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4D0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4D0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4E0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4E0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4F0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4F0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x500++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x500+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x510++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x510+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
endif
textline "                                "
width 24.
group.long 0x600++0x07
line.long 0x00 "EC_USBLEGSUP,EC USBLEGSUP"
bitfld.long 0x00 24. " OSSEM    ,EC USBLEGSUP OSSEM" "0,1"
bitfld.long 0x00 16. "              BIOSSEM  ,T XUSB EC USBLEGSUP BIOSSEM" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            NEXT    ,EC USBLEGSUP NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC USBLEGSUP CAPID"
line.long 0x04 "HCI_EC_USBLEGCTLSTS,HCI_EC_USBLEGCTLSTS"
eventfld.long 0x04 31. " BAR      ,EC USBLEGCTLSTS BAR" "Not pending,Pending"
eventfld.long 0x04 30. "    PCIC     ,EC USBLEGCTLSTS PCIC" "Not pending,Pending"
eventfld.long 0x04 29. "  OSOC    ,EC USBLEGCTLSTS OSOC" "Not pending,Pending"
rbitfld.long 0x04 20. "  HSE   ,EC USBLEGCTLSTS HSE" "Not pending,Pending"
textline "                                 "
rbitfld.long 0x04 16. " EVI      ,EC USBLEGCTLSTS EVI" "Not pending,Pending"
bitfld.long 0x04 15. "    BAREN    ,EC USBLEGCTLSTS BAR enable" "Disabled,Enabled"
bitfld.long 0x04 14. "     PCIEN   ,EC USBLEGCTLSTS PCI enable" "Disabled,Enabled"
bitfld.long 0x04 13. "     OSOEN ,EC USBLEGCTLSTS OSO enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x04 4. " HSEEN    ,EC USBLEGCTLSTS HSE enable" "Disabled,Enabled"
bitfld.long 0x04 0. "       SMIEN    ,EC USBLEGCTLSTS SMI enable" "Disabled,Enabled"
rgroup.long 0x610++0x23
line.long 0x00 "EC_SUPPROT_USB3_0,EC SUPPROT USB3 0"
hexmask.long.byte 0x00 24.--31. 1. " MAJORREV ,EC SUPPROT USB3 0 MAJORREV"
hexmask.long.byte 0x00 16.--23. 1. "             MINORREV ,EC SUPPROT USB3 0 MINORREV"
hexmask.long.byte 0x00 8.--15. 1. "           NEXT    ,EC SUPPROT USB3 0 NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC SUPPROT USB3 0 CAPID"
line.long 0x04 "EC_SUPPROT_USB3_1,EC SUPPROT USB3 1"
line.long 0x08 "EC_SUPPROT_USB3_2,EC SUPPROT USB3 2"
hexmask.long.byte 0x08 8.--15. 1. " PORTCNT  ,EC SUPPROT USB3 2 PORTCNT"
hexmask.long.byte 0x08 0.--7. 1. "             PORTOFS  ,EC SUPPROT USB3 2 PORTOFS"
line.long 0x0C "EC_SUPPROT_USB3_3,EC SUPPROT USB3 3"
line.long 0x10 "EC_SUPPROT_USB2_0,EC SUPPROT USB2 0"
hexmask.long.byte 0x10 24.--31. 1. " MAJORREV ,EC SUPPROT USB2 0 MAJORREV"
hexmask.long.byte 0x10 16.--23. 1. "             MINORREV ,EC SUPPROT USB2 0 MINORREV"
hexmask.long.byte 0x10 8.--15. 1. "           XNEXT   ,EC SUPPROT USB2 0 NEXT"
hexmask.long.byte 0x10 0.--7. 1. "           CAPID ,EC SUPPROT USB2 0 CAPID"
line.long 0x14 "EC_SUPPROT_USB2_1,EC SUPPROT USB2 1"
line.long 0x18 "EC_SUPPROT_USB2_2,EC SUPPROT USB2 2"
bitfld.long 0x18 25.--27. " MHD      ,EC SUPPROT USB2 2 MHD" "MHD,?..."
bitfld.long 0x18 20. "            BLC      ,EC_SUPPROT_USB2_2_BLC" "False,True"
bitfld.long 0x18 19. "        HLC     ,EC_SUPPROT_USB2_2_HLC" "False,True"
bitfld.long 0x18 18. "        IHI   ,EC_SUPPROT_USB2_2_IHI" "True,False"
textline "                                 "
bitfld.long 0x18 17. " HSO      ,EC_SUPPROT_USB2_2_HSO" "True,False"
hexmask.long.byte 0x18 8.--15. 1. "          PORTCNT  ,EC SUPPROT USB2 2 PORTCNT"
hexmask.long.byte 0x18 0.--7. 1. "           PORTOFS ,EC SUPPROT USB2 2 PORTOFS"
line.long 0x1C "EC_SUPPROT_USB2_3,EC SUPPROT USB2 3"
line.long 0x20 "EC_DBCAP_DCID,EC_DBCAP_DCID"
bitfld.long 0x20 16.--20. " DCERSTM  ,EC_DBCAP_DCID_DCERSTM" ",DCERSTM_VALUE,?..."
hexmask.long.byte 0x20 8.--15. 1. "  NEXT     ,EC DBCAP DCID NEXT"
hexmask.long.byte 0x20 0.--7. 1. "           CAPID   ,EC DBCAP DCID CAPID"
wgroup.long 0x634++0x03
line.long 0x00 "EC_DBCAP_DCDB,EC DBCAP DCDB"
hexmask.long.byte 0x00 8.--15. 1. " DBTARGET ,EC DBCAP DCDB DBTARGET"
group.long 0x638++0x03
line.long 0x00 "EC_DBCAP_DCERSTSZ,EC DBCAP DCERSTSZ"
hexmask.long.word 0x00 0.--15. 1. " ERSTSZ   ,EC DBCAP DCERSTSZ ERSTSZ"
textline "                                 "
width 26.
group.long 0x640++0x13
line.long 0x00 "EC_DBCAP_DCERSTBALO,EC DBCAP DCERSTBALO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCERSTBALO"
line.long 0x04 "EC_DBCAP_DCERSTBAHI,EC DBCAP DCERSTBAHI"
line.long 0x08 "EC_DBCAP_DCERDPLO,EC DBCAP DCERDPLO"
hexmask.long 0x08 4.--31. 1. " ADDRLO   ,EC DBCAP DCERDPLO ADDRLO"
bitfld.long 0x08 0.--2. "     DESI      ,EC DBCAP DCERDPLO DESI" "Initialized,?..."
line.long 0x0C "EC_DBCAP_DCERDPHI,EC DBCAP DCERDPHI ADDRHI"
line.long 0x10 "EC_DBCAP_DCCTRL,EC DBCAP DCCTRL"
bitfld.long 0x10 31. " DCE      ,EC DBCAP DCCTRL DCE" "Disabled,Enabled"
hexmask.long.byte 0x10 24.--30. 1. "     DEVADR    ,EC DBCAP DCCTRL DEVADR"
hexmask.long.byte 0x10 16.--23. 1. "           MAXBURST ,EC DBCAP DCCTRL MAXBURST"
eventfld.long 0x10 4. "           DRC ,EC DBCAP DCCTRL DRC" "Initialized,Clear"
textline "                                   "
bitfld.long 0x10 3. " HIT      ,EC DBCAP DCCTRL HIT" "False,True"
bitfld.long 0x10 2. "        HOT       ,EC DBCAP DCCTRL HOT" "False,True"
bitfld.long 0x10 1. "        LSE      ,EC DBCAP DCCTRL LSE" "Disabled,Enabled"
rbitfld.long 0x10 0. "     DCR ,EC DBCAP DCCTRL DCR" "Stop,Run"
rgroup.long 0x654++0x03
line.long 0x00 "EC_DBCAP_DCST,EC DBCAP DCST"
hexmask.long.byte 0x00 24.--31. 1. " DPN      ,EC DBCAP DCST DPN"
bitfld.long 0x00 0. "           ER        ,EC DBCAP DCST ER" "Empty,Not empty"
group.long 0x658++0x03
line.long 0x00 "EC_DBCAP_DCPORTSC,EC DBCAP DCPORTSC"
eventfld.long 0x00 23. " CEC      ,EC DBCAP DCPORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC       ,EC DBCAP DCPORTSC PLC" "Not pending,Pending"
eventfld.long 0x00 21. "  PRC      ,EC DBCAP DCPORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 17. "  CSC ,EC DBCAP DCPORTSC CSC" "Not pending,Pending"
textline "                                   "
rbitfld.long 0x00 10.--13. " PS       ,EC DBCAP DCPORTSC PS" "Undefined,,,,SS,?..."
rbitfld.long 0x00 5.--8. "    PLS       ,EC DBCAP DCPORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detect,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
rbitfld.long 0x00 4. "   PR       ,EC DBCAP DCPORTSC PR" "No reset,Reset"
bitfld.long 0x00 1. "     PED ,HCI EC DBCAP DCPORTSC PED" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 0. " CCS      ,EC DBCAP DCPORTSC CCS" "No CON,CON"
group.long 0x660++0x0F
line.long 0x00 "EC_DBCAP_DCECPLO,EC DBCAP DCECPLO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCECPLO ADDRLO"
line.long 0x04 "EC_DBCAP_DCECPHI,EC DBCAP DCECPHI ADDRHI"
line.long 0x08 "EC_DBCAP_INFO0,EC DBCAP INFO0"
hexmask.long.word 0x08 16.--31. 1. " VENDORID ,EC DBCAP INFO0 VENDORID"
hexmask.long.byte 0x08 0.--7. 1. "         PROTOCOL  ,EC DBCAP INFO0 PROTOCOL"
line.long 0x0C "EC_DBCAP_INFO1,EC_DBCAP_INFO1"
hexmask.long.word 0x0C 16.--31. 1. " DEV_REV  ,EC DBCAP INFO1 DEV REV"
hexmask.long.word 0x0C 0.--15. 1. "         PRODUCTID ,EC DBCAP INFO1 PRODUCTID"
rgroup.long 0x800++0x03
line.long 0x00 "RT_MFINDEX,RT MFINDEX"
hexmask.long.word 0x00 0.--13. 1. " MFINDEX  ,RT MFINDEX MFINDEX"
group.long 0x820++0x03
line.long 0x00 "RT_IMAN,RT IMAN"
bitfld.long 0x00 1. " IE       ,RT IMAN IE" "Disabled,Enabled"
eventfld.long 0x00 0. "     IP        ,RT IMAN IP" "Not pending,Pending"
group.long 0x824++0x07
line.long 0x00 "RT_IMOD,RT IMOD"
hexmask.long.word 0x00 16.--31. 1. " IMODC    ,RT IMOD IMODC"
hexmask.long.word 0x00 0.--15. 1. "         IMODI     ,RT IMOD IMODI"
line.long 0x04 "RT_ERSTSZ,RT ERSTSZ"
hexmask.long.word 0x04 0.--15. 1. " SZ       ,RT ERSTSZ SZ"
group.long 0x830++0x0F
line.long 0x00 "RT_ERSTBA0,RT ERSTBA0"
hexmask.long 0x00 4.--31. 1. " ERSTBLO  ,RT ERSTBA0 ERSTBLO"
line.long 0x04 "RT_ERSTBA1,RT ERSTBA1"
line.long 0x08 "RT_ERDP0,RT ERDP0"
hexmask.long 0x08 4.--31. 1. " DQPTRLO  ,RT ERDP0 DQPTRLO"
bitfld.long 0x08 0.--2. "     DESI      ,RT ERDP0 DESI" "Initialized,?..."
line.long 0x0C "RT_ERDP1,RT ERDP1"
wgroup.long 0xC00++0x03
line.long 0x00 "DB,DB"
button "BGR" "d (0xC00)--(0xFFC) /long"
tree.end
width 0x0B
elif (cpu()=="TEGRAX2")
base ad:0x03530000
width 21.
tree "XUSB XHCI Registers"
rgroup.long 0x00++0x1B
line.long 0x00 "CAP_REG0,CAP REG0"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
else
hexmask.long.tbyte 0x00 15.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
endif
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH  ,CAP REG0 CAPLENGTH"
line.long 0x04 "CAP_HCSPARAMS1,CAP HCSPARAMS1"
hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS   ,CAP HCSPARAMS1 MAXPORTS"
hexmask.long.word 0x04 8.--18. 1. "           MAXINTRS   ,CAP HCSPARAMS1 MAXINTRS"
hexmask.long.byte 0x04 0.--7. 1. "         MAXSLOTS ,CAP HCSPARAMS1 MAXSLOTS"
line.long 0x08 "CAP_HCSPARAMS2,CAP HCSPARAMS2"
bitfld.long 0x08 27.--31. " MAXSPBLO   ,CAP HCSPARAMS2 MAXSPBLO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 26. "           SPR        ,CAP HCSPARAMS2 SPR" "False,True"
bitfld.long 0x08 21.--25. "        MAXSPBHI ,CAP HCSPARAMS2 MAXSPBHI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 4.--7. "           ERST_MAX ,CAP HCSPARAMS2 ERST MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                              "
bitfld.long 0x08 0.--3. " IST        ,CAP HCSPARAMS2 IST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CAP_HCSPARAMS3,CAP HCSPARAMS3"
hexmask.long.word 0x0C 16.--31. 1. " U2LAT      ,CAP HCSPARAMS3 U2LAT"
hexmask.long.byte 0x0C 0.--7. 1. "         U1LAT      ,CAP HCSPARAMS3 U1LAT"
line.long 0x10 "CAP_HCCPARAMS,CAP HCCPARAMS"
hexmask.long.word 0x10 16.--31. 1. " XECP       ,CAP HCCPARAMS XECP"
bitfld.long 0x10 12.--15. "         MAXPSASIZE ,CAP HCCPARAMS MAXPSASIZE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8. "           PAE      ,CAP HCCPARAMS PAE" "False,True"
bitfld.long 0x10 7. "        NSS      ,CAP HCCPARAMS NSS" "False,True"
textline "                              "
bitfld.long 0x10 6. " LTC        ,CAP HCCPARAMS LTC" "False,True"
bitfld.long 0x10 5. "        LHRC       ,CAP HCCPARAMS LHRC" "False,True"
bitfld.long 0x10 4. "        PIND     ,CAP HCCPARAMS PIND" "False,True"
bitfld.long 0x10 3. "        PPC      ,CAP HCCPARAMS PPC" "False,True"
textline "                              "
bitfld.long 0x10 2. " CSZ        ,CAP HCCPARAMS CSZ" "32B,64B"
bitfld.long 0x10 1. "          BNC        ,CAP HCCPARAMS BNC" "False,True"
bitfld.long 0x10 0. "        AC64     ,CAP HCCPARAMS AC64" "False,True"
line.long 0x14 "CAP_DBOFF,CAP DBOFF"
hexmask.long 0x14 2.--31. 0x04 " OFFSET     ,CAP DBOFF OFFSET"
line.long 0x18 "CAP_RTSOFF,CAP RTSOFF"
hexmask.long 0x18 5.--31. 0x20 " OFFSET     ,CAP RTSOFF OFFSET"
group.long 0x20++0x07
line.long 0x00 "OP_USBCMD,OP USBCMD"
bitfld.long 0x00 11. " EU3S       ,OP USBCMD EU3S" "Disabled,Enabled"
bitfld.long 0x00 10. "     EWE        ,OP USBCMD EWE" "Disabled,Enabled"
eventfld.long 0x00 9. "     CRS      ,OP USBCMD CRS" "Initialized,Start"
eventfld.long 0x00 8. "  CSS      ,OP USBCMD CSS" "Initialized,Start"
textline "                              "
bitfld.long 0x00 7. " LHCRST     ,OP USBCMD LHCRST" "Not pending,Pending"
bitfld.long 0x00 3. "  HSEE       ,OP USBCMD HSEE" "Disabled,Enabled"
bitfld.long 0x00 2. "     INTE     ,OP USBCMD INTE" "Disabled,Enabled"
bitfld.long 0x00 1. "     HCRST    ,OP USBCMD HCRST" "Not pending,Pending"
textline "                              "
bitfld.long 0x00 0. " RS         ,OP USBCMD RS" "Stopped,Running"
line.long 0x04 "OP_USBSTS,OP USBSTS"
rbitfld.long 0x04 12. " HCE        ,OP USBSTS HCE" "No error,Error"
rbitfld.long 0x04 11. "     CNR        ,OP USBSTS CNR" "Not ready,Ready"
eventfld.long 0x04 10. "    SRE      ,OP USBSTS SRE" "Not pending,Pending"
rbitfld.long 0x04 9. "  RSS      ,OP USBSTS RSS" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 8. " SSS        ,OP USBSTS SSS" "Not pending,Pending"
eventfld.long 0x04 4. "  PCD        ,OP USBSTS PCD" "Not pending,Pending"
eventfld.long 0x04 3. "  EINT     ,OP USBSTS EINT" "Not pending,Pending"
eventfld.long 0x04 2. "  HSE      ,OP USBSTS HSE" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 0. " HCH        ,HCH" "Halted,Running"
rgroup.long 0x28++0x03
line.long 0x00 "OP_PGSZ,OP PGSZ"
hexmask.long.word 0x00 0.--15. 1. " PAGESIZE   ,OP PGSZ PAGESIZE"
group.long 0x34++0x0B
line.long 0x00 "OP_DNCTRL,OP DNCTRL"
bitfld.long 0x00 15. " N15        ,OP DNCTRL N15" "Disabled,Enabled"
bitfld.long 0x00 14. "     N14        ,OP DNCTRL N14" "Disabled,Enabled"
bitfld.long 0x00 13. "     N13      ,OP DNCTRL N13" "Disabled,Enabled"
bitfld.long 0x00 12. "     N12      ,OP DNCTRL N12" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 11. " N11        ,OP DNCTRL N11" "Disabled,Enabled"
bitfld.long 0x00 10. "     N10        ,OP DNCTRL N10" "Disabled,Enabled"
bitfld.long 0x00 9. "     N9       ,OP DNCTRL N9" "Disabled,Enabled"
bitfld.long 0x00 8. "     N8       ,OP DNCTRL N8" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 7. " N7         ,OP DNCTRL N7" "Disabled,Enabled"
bitfld.long 0x00 6. "     N6         ,OP DNCTRL N6" "Disabled,Enabled"
bitfld.long 0x00 5. "     N5       ,OP DNCTRL N5" "Disabled,Enabled"
bitfld.long 0x00 4. "     N4       ,OP DNCTRL N4" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 3. " N3         ,OP DNCTRL N3" "Disabled,Enabled"
bitfld.long 0x00 2. "     N2         ,OP DNCTRL N2" "Disabled,Enabled"
bitfld.long 0x00 1. "     N1       ,OP DNCTRL N1" "Disabled,Enabled"
bitfld.long 0x00 0. "     N0       ,OP DNCTRL N0" "Disabled,Enabled"
line.long 0x04 "OP_CRCR0,OP CRCR0"
hexmask.long 0x04 6.--31. 1. " CRPLO      ,OP CRCR0 CRPLO"
textline "                              "
rbitfld.long 0x04 3. " CRR        ,OP CRCR0 CRR" "Stopped,Running"
eventfld.long 0x04 2. "      CA         ,OP CRCR0 CA" "Initialized,Aborted"
textline "                              "
eventfld.long 0x04 1. " CS         ,OP CRCR0 CS" "Initialized,Stop"
eventfld.long 0x04 0. "  RCS        ,OP CRCR0 RCS" "0,1"
line.long 0x08 "OP_CRCR1,OP CRCR1"
group.long 0x50++0x0B
line.long 0x00 "OP_DCBAAP0,OP DCBAAP0"
hexmask.long 0x00 6.--31. 1. " DCBAAPLO   ,OP DCBAAP0 DCBAAPLO"
line.long 0x04 "OP_DCBAAP1,OP DCBAAP1"
line.long 0x08 "OP_CONFIG,OP CONFIG"
hexmask.long.byte 0x08 0.--7. 1. " MAXSLOTSEN ,OP CONFIG MAXSLOTSEN"
textline "                              "
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
width 23.
group.long 0x420++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x420+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x420+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x430++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x430+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x430+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x440++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x440+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x440+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x450++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x450+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x450+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x460++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x460+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x470++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x470+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x480++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x480+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x490++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x490+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4A0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4A0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4B0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4B0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4C0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4C0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4D0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4D0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4E0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4E0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4F0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4F0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x500++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x500+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x510++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x510+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
endif
textline "                                "
width 24.
group.long 0x600++0x07
line.long 0x00 "EC_USBLEGSUP,EC USBLEGSUP"
bitfld.long 0x00 24. " OSSEM    ,EC USBLEGSUP OSSEM" "0,1"
bitfld.long 0x00 16. "              BIOSSEM  ,T XUSB EC USBLEGSUP BIOSSEM" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            NEXT    ,EC USBLEGSUP NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC USBLEGSUP CAPID"
line.long 0x04 "HCI_EC_USBLEGCTLSTS,HCI_EC_USBLEGCTLSTS"
eventfld.long 0x04 31. " BAR      ,EC USBLEGCTLSTS BAR" "Not pending,Pending"
eventfld.long 0x04 30. "    PCIC     ,EC USBLEGCTLSTS PCIC" "Not pending,Pending"
eventfld.long 0x04 29. "  OSOC    ,EC USBLEGCTLSTS OSOC" "Not pending,Pending"
rbitfld.long 0x04 20. "  HSE   ,EC USBLEGCTLSTS HSE" "Not pending,Pending"
textline "                                 "
rbitfld.long 0x04 16. " EVI      ,EC USBLEGCTLSTS EVI" "Not pending,Pending"
bitfld.long 0x04 15. "    BAREN    ,EC USBLEGCTLSTS BAR enable" "Disabled,Enabled"
bitfld.long 0x04 14. "     PCIEN   ,EC USBLEGCTLSTS PCI enable" "Disabled,Enabled"
bitfld.long 0x04 13. "     OSOEN ,EC USBLEGCTLSTS OSO enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x04 4. " HSEEN    ,EC USBLEGCTLSTS HSE enable" "Disabled,Enabled"
bitfld.long 0x04 0. "       SMIEN    ,EC USBLEGCTLSTS SMI enable" "Disabled,Enabled"
rgroup.long 0x610++0x23
line.long 0x00 "EC_SUPPROT_USB3_0,EC SUPPROT USB3 0"
hexmask.long.byte 0x00 24.--31. 1. " MAJORREV ,EC SUPPROT USB3 0 MAJORREV"
hexmask.long.byte 0x00 16.--23. 1. "             MINORREV ,EC SUPPROT USB3 0 MINORREV"
hexmask.long.byte 0x00 8.--15. 1. "           NEXT    ,EC SUPPROT USB3 0 NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC SUPPROT USB3 0 CAPID"
line.long 0x04 "EC_SUPPROT_USB3_1,EC SUPPROT USB3 1"
line.long 0x08 "EC_SUPPROT_USB3_2,EC SUPPROT USB3 2"
hexmask.long.byte 0x08 8.--15. 1. " PORTCNT  ,EC SUPPROT USB3 2 PORTCNT"
hexmask.long.byte 0x08 0.--7. 1. "             PORTOFS  ,EC SUPPROT USB3 2 PORTOFS"
line.long 0x0C "EC_SUPPROT_USB3_3,EC SUPPROT USB3 3"
line.long 0x10 "EC_SUPPROT_USB2_0,EC SUPPROT USB2 0"
hexmask.long.byte 0x10 24.--31. 1. " MAJORREV ,EC SUPPROT USB2 0 MAJORREV"
hexmask.long.byte 0x10 16.--23. 1. "             MINORREV ,EC SUPPROT USB2 0 MINORREV"
hexmask.long.byte 0x10 8.--15. 1. "           XNEXT   ,EC SUPPROT USB2 0 NEXT"
hexmask.long.byte 0x10 0.--7. 1. "           CAPID ,EC SUPPROT USB2 0 CAPID"
line.long 0x14 "EC_SUPPROT_USB2_1,EC SUPPROT USB2 1"
line.long 0x18 "EC_SUPPROT_USB2_2,EC SUPPROT USB2 2"
bitfld.long 0x18 25.--27. " MHD      ,EC SUPPROT USB2 2 MHD" "MHD,?..."
bitfld.long 0x18 20. "            BLC      ,EC_SUPPROT_USB2_2_BLC" "False,True"
bitfld.long 0x18 19. "        HLC     ,EC_SUPPROT_USB2_2_HLC" "False,True"
bitfld.long 0x18 18. "        IHI   ,EC_SUPPROT_USB2_2_IHI" "True,False"
textline "                                 "
bitfld.long 0x18 17. " HSO      ,EC_SUPPROT_USB2_2_HSO" "True,False"
hexmask.long.byte 0x18 8.--15. 1. "          PORTCNT  ,EC SUPPROT USB2 2 PORTCNT"
hexmask.long.byte 0x18 0.--7. 1. "           PORTOFS ,EC SUPPROT USB2 2 PORTOFS"
line.long 0x1C "EC_SUPPROT_USB2_3,EC SUPPROT USB2 3"
line.long 0x20 "EC_DBCAP_DCID,EC_DBCAP_DCID"
bitfld.long 0x20 16.--20. " DCERSTM  ,EC_DBCAP_DCID_DCERSTM" ",DCERSTM_VALUE,?..."
hexmask.long.byte 0x20 8.--15. 1. "  NEXT     ,EC DBCAP DCID NEXT"
hexmask.long.byte 0x20 0.--7. 1. "           CAPID   ,EC DBCAP DCID CAPID"
wgroup.long 0x634++0x03
line.long 0x00 "EC_DBCAP_DCDB,EC DBCAP DCDB"
hexmask.long.byte 0x00 8.--15. 1. " DBTARGET ,EC DBCAP DCDB DBTARGET"
group.long 0x638++0x03
line.long 0x00 "EC_DBCAP_DCERSTSZ,EC DBCAP DCERSTSZ"
hexmask.long.word 0x00 0.--15. 1. " ERSTSZ   ,EC DBCAP DCERSTSZ ERSTSZ"
textline "                                 "
width 26.
group.long 0x640++0x13
line.long 0x00 "EC_DBCAP_DCERSTBALO,EC DBCAP DCERSTBALO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCERSTBALO"
line.long 0x04 "EC_DBCAP_DCERSTBAHI,EC DBCAP DCERSTBAHI"
line.long 0x08 "EC_DBCAP_DCERDPLO,EC DBCAP DCERDPLO"
hexmask.long 0x08 4.--31. 1. " ADDRLO   ,EC DBCAP DCERDPLO ADDRLO"
bitfld.long 0x08 0.--2. "     DESI      ,EC DBCAP DCERDPLO DESI" "Initialized,?..."
line.long 0x0C "EC_DBCAP_DCERDPHI,EC DBCAP DCERDPHI ADDRHI"
line.long 0x10 "EC_DBCAP_DCCTRL,EC DBCAP DCCTRL"
bitfld.long 0x10 31. " DCE      ,EC DBCAP DCCTRL DCE" "Disabled,Enabled"
hexmask.long.byte 0x10 24.--30. 1. "     DEVADR    ,EC DBCAP DCCTRL DEVADR"
hexmask.long.byte 0x10 16.--23. 1. "           MAXBURST ,EC DBCAP DCCTRL MAXBURST"
eventfld.long 0x10 4. "           DRC ,EC DBCAP DCCTRL DRC" "Initialized,Clear"
textline "                                   "
bitfld.long 0x10 3. " HIT      ,EC DBCAP DCCTRL HIT" "False,True"
bitfld.long 0x10 2. "        HOT       ,EC DBCAP DCCTRL HOT" "False,True"
bitfld.long 0x10 1. "        LSE      ,EC DBCAP DCCTRL LSE" "Disabled,Enabled"
rbitfld.long 0x10 0. "     DCR ,EC DBCAP DCCTRL DCR" "Stop,Run"
rgroup.long 0x654++0x03
line.long 0x00 "EC_DBCAP_DCST,EC DBCAP DCST"
hexmask.long.byte 0x00 24.--31. 1. " DPN      ,EC DBCAP DCST DPN"
bitfld.long 0x00 0. "           ER        ,EC DBCAP DCST ER" "Empty,Not empty"
group.long 0x658++0x03
line.long 0x00 "EC_DBCAP_DCPORTSC,EC DBCAP DCPORTSC"
eventfld.long 0x00 23. " CEC      ,EC DBCAP DCPORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC       ,EC DBCAP DCPORTSC PLC" "Not pending,Pending"
eventfld.long 0x00 21. "  PRC      ,EC DBCAP DCPORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 17. "  CSC ,EC DBCAP DCPORTSC CSC" "Not pending,Pending"
textline "                                   "
rbitfld.long 0x00 10.--13. " PS       ,EC DBCAP DCPORTSC PS" "Undefined,,,,SS,?..."
rbitfld.long 0x00 5.--8. "    PLS       ,EC DBCAP DCPORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detect,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
rbitfld.long 0x00 4. "   PR       ,EC DBCAP DCPORTSC PR" "No reset,Reset"
bitfld.long 0x00 1. "     PED ,HCI EC DBCAP DCPORTSC PED" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 0. " CCS      ,EC DBCAP DCPORTSC CCS" "No CON,CON"
group.long 0x660++0x0F
line.long 0x00 "EC_DBCAP_DCECPLO,EC DBCAP DCECPLO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCECPLO ADDRLO"
line.long 0x04 "EC_DBCAP_DCECPHI,EC DBCAP DCECPHI ADDRHI"
line.long 0x08 "EC_DBCAP_INFO0,EC DBCAP INFO0"
hexmask.long.word 0x08 16.--31. 1. " VENDORID ,EC DBCAP INFO0 VENDORID"
hexmask.long.byte 0x08 0.--7. 1. "         PROTOCOL  ,EC DBCAP INFO0 PROTOCOL"
line.long 0x0C "EC_DBCAP_INFO1,EC_DBCAP_INFO1"
hexmask.long.word 0x0C 16.--31. 1. " DEV_REV  ,EC DBCAP INFO1 DEV REV"
hexmask.long.word 0x0C 0.--15. 1. "         PRODUCTID ,EC DBCAP INFO1 PRODUCTID"
rgroup.long 0x800++0x03
line.long 0x00 "RT_MFINDEX,RT MFINDEX"
hexmask.long.word 0x00 0.--13. 1. " MFINDEX  ,RT MFINDEX MFINDEX"
group.long 0x820++0x03
line.long 0x00 "RT_IMAN,RT IMAN"
bitfld.long 0x00 1. " IE       ,RT IMAN IE" "Disabled,Enabled"
eventfld.long 0x00 0. "     IP        ,RT IMAN IP" "Not pending,Pending"
group.long 0x824++0x07
line.long 0x00 "RT_IMOD,RT IMOD"
hexmask.long.word 0x00 16.--31. 1. " IMODC    ,RT IMOD IMODC"
hexmask.long.word 0x00 0.--15. 1. "         IMODI     ,RT IMOD IMODI"
line.long 0x04 "RT_ERSTSZ,RT ERSTSZ"
hexmask.long.word 0x04 0.--15. 1. " SZ       ,RT ERSTSZ SZ"
group.long 0x830++0x0F
line.long 0x00 "RT_ERSTBA0,RT ERSTBA0"
hexmask.long 0x00 4.--31. 1. " ERSTBLO  ,RT ERSTBA0 ERSTBLO"
line.long 0x04 "RT_ERSTBA1,RT ERSTBA1"
line.long 0x08 "RT_ERDP0,RT ERDP0"
hexmask.long 0x08 4.--31. 1. " DQPTRLO  ,RT ERDP0 DQPTRLO"
bitfld.long 0x08 0.--2. "     DESI      ,RT ERDP0 DESI" "Initialized,?..."
line.long 0x0C "RT_ERDP1,RT ERDP1"
wgroup.long 0xC00++0x03
line.long 0x00 "DB,DB"
button "BGR" "d (0xC00)--(0xFFC) /long"
tree.end
width 0x0B
endif
width 25.
tree "XUSB CSB Registers"
group.long 0x101A00++0x03
line.long 0x00 "MEMPOOL_ILOAD_ATTR_0,L2IMEMOP Static Configuration Register"
bitfld.long 0x00 31. " TC        ,TC" "0,1"
bitfld.long 0x00 30. "     NS         ,NS" "0,1"
bitfld.long 0x00 29. "     RO   ,RO" "0,1"
textline "                                  "
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
bitfld.long 0x00 28. " RDPASSPW  ,RDPASSPW" "0,1"
textline "                                  "
endif
hexmask.long.word 0x00 8.--19. 1. " SIZE      ,SIZE"
rgroup.long 0x101A04++0x03
line.long 0x00 "MEMPOOL_ILOAD_BASE_LO_0,L2IMEMOP Static Configuration Register"
hexmask.long.byte 0x00 0.--7. 1. " SRC_ADDR  ,SRC_ADDR"
group.long 0x101A08++0x03
line.long 0x00 "MEMPOOL_ILOAD_BASE_HI_0,L2IMEMOP Static Configuration Register"
hexmask.long.byte 0x00 0.--7. 1. " SRC_ADDR  ,SRC_ADDR"
group.long 0x101A10++0x07
line.long 0x00 "MEMPOOL_L2IMEMOP_SIZE_0,MEMPOOL L2IMEMOP SIZE 0 - Operational Register"
hexmask.long.byte 0x00 24.--31. 1. " SRC_COUNT ,SRC_COUNT"
hexmask.long.word 0x00 8.--19. 1. "    SRC_OFFSET ,SRC_OFFSET"
line.long 0x04 "MEMPOOL_L2IMEMOP_TRIG_0,L2IMEMOP Operational Register"
hexmask.long.byte 0x04 24.--31. 1. " ACTION    ,ACTION"
hexmask.long.word 0x04 8.--17. 1. "    DEST_INDEX ,DEST_INDEX"
group.long 0x10181C++0x03
line.long 0x00 "MEMPOOL_APMAP_0,Aperture Programming Register"
bitfld.long 0x00 31. " BOOTPATH  ,BOOTPATH" "0,1"
bitfld.long 0x00 24. "     XREQ_READ  ,XREQ_READ" "0,1"
bitfld.long 0x00 8.--9. "     XMAP ,XMAP" "A,B,C,?..."
bitfld.long 0x00 0.--2. "  FDDMA ,FDDMA" "A,B,C,D,E,?..."
tree.end
width 14.
tree "XUSB Falcon Register"
group.long 0x100++0x07
line.long 0x00 "CPUCTL_0,FALCON CPUCTL 0"
rbitfld.long 0x00 5. " STOPPED     ,Indicates whether the CPU is currently in the stopped state" "Not stopped,Stopped"
rbitfld.long 0x00 4. "    HALTED         ,Indicates whether the CPU is currently in the halted state" "Not halted,Halted"
bitfld.long 0x00 3. "  HRESET         ,Apply a hard reset" "No reset,Reset"
bitfld.long 0x00 2. "  SRESET ,Apply a soft reset" "No reset,Reset"
textline "                       "
bitfld.long 0x00 1. " STARTCPU    ,Request to start CPU execution while in a HALTED state" "Not requested,Requested"
bitfld.long 0x00 0. "  IINVAL         ,Mark all blocks in IMEM except block 0 as INVALID" "No effect,Invalidate"
line.long 0x04 "BOOTVEC_0,FALCON BOOTVEC 0"
group.long 0x10C++0x03
line.long 0x00 "DMACTL_0,FALCON DMACTL 0"
sif (cpu()!="TEGRAX1"&&cpu()!="TEGRAX2")
rbitfld.long 0x00 7. " SECURE_STAT ,SECURE STAT" "0,1"
textline "                       "
endif
rbitfld.long 0x00 3.--6. " DMAQ_NUM    ,Valid request number at the DMA request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 2. "             IMEM_SCRUBBING ,IMEM scrubbing state" "Done,Pending"
rbitfld.long 0x00 1. "     DMEM_SCRUBBING ,DMEM scrubbing state" "Done,Pending"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
textline "                       "
bitfld.long 0x00 0. " REQUIRE_CTX ,Valid context must be loaded before any DMA request can be serviced" "False,True"
else
textline "                       "
rbitfld.long 0x00 0. " REQUIRE_CTX ,Valid context must be loaded before any DMA request can be serviced" "False,True"
endif
group.long 0x154++0x07
line.long 0x00 "IMFILLRNG1_0,IMFILLRNG1 Indicates Tag Values For The Low And High End Of The PC Range To Be auto-filled"
hexmask.long.word 0x00 16.--31. 1. " TAG_HI      ,TAG HI"
hexmask.long.word 0x00 0.--15. 1. "           TAG_LO         ,TAG LO"
line.long 0x04 "IMFILLCTL_0,FALCON IMFILLCTL 0"
hexmask.long.byte 0x04 0.--7. 1. " NBLOCKS     ,NBLOCKS"
tree.end
width 0x0B
tree.end
tree "HOST XHCI Registers"
base ad:0x03530000
width 21.
tree "XUSB XHCI Registers"
rgroup.long 0x00++0x1B
line.long 0x00 "CAP_REG0,CAP REG0"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
else
hexmask.long.tbyte 0x00 15.--31. 1. " HCIVERSION ,CAP REG0 HCIVERSION"
textline "                              "
endif
hexmask.long.byte 0x00 0.--7. 1. " CAPLENGTH  ,CAP REG0 CAPLENGTH"
line.long 0x04 "CAP_HCSPARAMS1,CAP HCSPARAMS1"
hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS   ,CAP HCSPARAMS1 MAXPORTS"
hexmask.long.word 0x04 8.--18. 1. "           MAXINTRS   ,CAP HCSPARAMS1 MAXINTRS"
hexmask.long.byte 0x04 0.--7. 1. "         MAXSLOTS ,CAP HCSPARAMS1 MAXSLOTS"
line.long 0x08 "CAP_HCSPARAMS2,CAP HCSPARAMS2"
bitfld.long 0x08 27.--31. " MAXSPBLO   ,CAP HCSPARAMS2 MAXSPBLO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 26. "           SPR        ,CAP HCSPARAMS2 SPR" "False,True"
bitfld.long 0x08 21.--25. "        MAXSPBHI ,CAP HCSPARAMS2 MAXSPBHI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 4.--7. "           ERST_MAX ,CAP HCSPARAMS2 ERST MAX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                              "
bitfld.long 0x08 0.--3. " IST        ,CAP HCSPARAMS2 IST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CAP_HCSPARAMS3,CAP HCSPARAMS3"
hexmask.long.word 0x0C 16.--31. 1. " U2LAT      ,CAP HCSPARAMS3 U2LAT"
hexmask.long.byte 0x0C 0.--7. 1. "         U1LAT      ,CAP HCSPARAMS3 U1LAT"
line.long 0x10 "CAP_HCCPARAMS,CAP HCCPARAMS"
hexmask.long.word 0x10 16.--31. 1. " XECP       ,CAP HCCPARAMS XECP"
bitfld.long 0x10 12.--15. "         MAXPSASIZE ,CAP HCCPARAMS MAXPSASIZE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8. "           PAE      ,CAP HCCPARAMS PAE" "False,True"
bitfld.long 0x10 7. "        NSS      ,CAP HCCPARAMS NSS" "False,True"
textline "                              "
bitfld.long 0x10 6. " LTC        ,CAP HCCPARAMS LTC" "False,True"
bitfld.long 0x10 5. "        LHRC       ,CAP HCCPARAMS LHRC" "False,True"
bitfld.long 0x10 4. "        PIND     ,CAP HCCPARAMS PIND" "False,True"
bitfld.long 0x10 3. "        PPC      ,CAP HCCPARAMS PPC" "False,True"
textline "                              "
bitfld.long 0x10 2. " CSZ        ,CAP HCCPARAMS CSZ" "32B,64B"
bitfld.long 0x10 1. "          BNC        ,CAP HCCPARAMS BNC" "False,True"
bitfld.long 0x10 0. "        AC64     ,CAP HCCPARAMS AC64" "False,True"
line.long 0x14 "CAP_DBOFF,CAP DBOFF"
hexmask.long 0x14 2.--31. 0x04 " OFFSET     ,CAP DBOFF OFFSET"
line.long 0x18 "CAP_RTSOFF,CAP RTSOFF"
hexmask.long 0x18 5.--31. 0x20 " OFFSET     ,CAP RTSOFF OFFSET"
group.long 0x20++0x07
line.long 0x00 "OP_USBCMD,OP USBCMD"
bitfld.long 0x00 11. " EU3S       ,OP USBCMD EU3S" "Disabled,Enabled"
bitfld.long 0x00 10. "     EWE        ,OP USBCMD EWE" "Disabled,Enabled"
eventfld.long 0x00 9. "     CRS      ,OP USBCMD CRS" "Initialized,Start"
eventfld.long 0x00 8. "  CSS      ,OP USBCMD CSS" "Initialized,Start"
textline "                              "
bitfld.long 0x00 7. " LHCRST     ,OP USBCMD LHCRST" "Not pending,Pending"
bitfld.long 0x00 3. "  HSEE       ,OP USBCMD HSEE" "Disabled,Enabled"
bitfld.long 0x00 2. "     INTE     ,OP USBCMD INTE" "Disabled,Enabled"
bitfld.long 0x00 1. "     HCRST    ,OP USBCMD HCRST" "Not pending,Pending"
textline "                              "
bitfld.long 0x00 0. " RS         ,OP USBCMD RS" "Stopped,Running"
line.long 0x04 "OP_USBSTS,OP USBSTS"
rbitfld.long 0x04 12. " HCE        ,OP USBSTS HCE" "No error,Error"
rbitfld.long 0x04 11. "     CNR        ,OP USBSTS CNR" "Not ready,Ready"
eventfld.long 0x04 10. "    SRE      ,OP USBSTS SRE" "Not pending,Pending"
rbitfld.long 0x04 9. "  RSS      ,OP USBSTS RSS" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 8. " SSS        ,OP USBSTS SSS" "Not pending,Pending"
eventfld.long 0x04 4. "  PCD        ,OP USBSTS PCD" "Not pending,Pending"
eventfld.long 0x04 3. "  EINT     ,OP USBSTS EINT" "Not pending,Pending"
eventfld.long 0x04 2. "  HSE      ,OP USBSTS HSE" "Not pending,Pending"
textline "                              "
rbitfld.long 0x04 0. " HCH        ,HCH" "Halted,Running"
rgroup.long 0x28++0x03
line.long 0x00 "OP_PGSZ,OP PGSZ"
hexmask.long.word 0x00 0.--15. 1. " PAGESIZE   ,OP PGSZ PAGESIZE"
group.long 0x34++0x0B
line.long 0x00 "OP_DNCTRL,OP DNCTRL"
bitfld.long 0x00 15. " N15        ,OP DNCTRL N15" "Disabled,Enabled"
bitfld.long 0x00 14. "     N14        ,OP DNCTRL N14" "Disabled,Enabled"
bitfld.long 0x00 13. "     N13      ,OP DNCTRL N13" "Disabled,Enabled"
bitfld.long 0x00 12. "     N12      ,OP DNCTRL N12" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 11. " N11        ,OP DNCTRL N11" "Disabled,Enabled"
bitfld.long 0x00 10. "     N10        ,OP DNCTRL N10" "Disabled,Enabled"
bitfld.long 0x00 9. "     N9       ,OP DNCTRL N9" "Disabled,Enabled"
bitfld.long 0x00 8. "     N8       ,OP DNCTRL N8" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 7. " N7         ,OP DNCTRL N7" "Disabled,Enabled"
bitfld.long 0x00 6. "     N6         ,OP DNCTRL N6" "Disabled,Enabled"
bitfld.long 0x00 5. "     N5       ,OP DNCTRL N5" "Disabled,Enabled"
bitfld.long 0x00 4. "     N4       ,OP DNCTRL N4" "Disabled,Enabled"
textline "                              "
bitfld.long 0x00 3. " N3         ,OP DNCTRL N3" "Disabled,Enabled"
bitfld.long 0x00 2. "     N2         ,OP DNCTRL N2" "Disabled,Enabled"
bitfld.long 0x00 1. "     N1       ,OP DNCTRL N1" "Disabled,Enabled"
bitfld.long 0x00 0. "     N0       ,OP DNCTRL N0" "Disabled,Enabled"
line.long 0x04 "OP_CRCR0,OP CRCR0"
hexmask.long 0x04 6.--31. 1. " CRPLO      ,OP CRCR0 CRPLO"
textline "                              "
rbitfld.long 0x04 3. " CRR        ,OP CRCR0 CRR" "Stopped,Running"
eventfld.long 0x04 2. "      CA         ,OP CRCR0 CA" "Initialized,Aborted"
textline "                              "
eventfld.long 0x04 1. " CS         ,OP CRCR0 CS" "Initialized,Stop"
eventfld.long 0x04 0. "  RCS        ,OP CRCR0 RCS" "0,1"
line.long 0x08 "OP_CRCR1,OP CRCR1"
group.long 0x50++0x0B
line.long 0x00 "OP_DCBAAP0,OP DCBAAP0"
hexmask.long 0x00 6.--31. 1. " DCBAAPLO   ,OP DCBAAP0 DCBAAPLO"
line.long 0x04 "OP_DCBAAP1,OP DCBAAP1"
line.long 0x08 "OP_CONFIG,OP CONFIG"
hexmask.long.byte 0x08 0.--7. 1. " MAXSLOTSEN ,OP CONFIG MAXSLOTSEN"
textline "                              "
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
width 23.
group.long 0x420++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x420+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x420+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x420+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x430++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x430+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x430+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x430+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x440++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x440+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x440+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x440+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x450++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x450+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x450+0x08)++0x03
line.long 0x00 "OP_PORTLISC,OP PORTLISC"
hexmask.long.word 0x00 0.--15. 1. " LEC   ,T XUSB OP PORTLISC LEC"
rgroup.long (0x450+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x460++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x460+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x460+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x470++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x470+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x470+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x480++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x480+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x480+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x490++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x490+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x490+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4A0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4A0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4A0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4B0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4B0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4B0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4C0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4C0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4C0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4D0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4D0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4D0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4E0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4E0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4E0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x4F0++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x4F0+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x4F0+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x500++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x500+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x500+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
group.long 0x510++0x07
line.long 0x00 "OP PORTSC,OP PORTSC"
rbitfld.long 0x00 31. " WPR   ,OP PORTSC WPR" "Not pending,Pending"
rbitfld.long 0x00 30. "  DR         ,T XUSB OP PORTSC DR" "False,True"
bitfld.long 0x00 27. "        WOE       ,T XUSB OP PORTSC WOE" "Disabled,Enabled"
bitfld.long 0x00 26. "     WDE  ,T XUSB OP PORTSC WDE" "Disabled,Enabled"
textline "                                "
bitfld.long 0x00 25. " WCE   ,T XUSB OP PORTSC WCE" "Disabled,Enabled"
rbitfld.long 0x00 24. "     CAS        ,T XUSB OP PORTSC CAS" "Initialized,?..."
eventfld.long 0x00 23. "  CEC       ,T XUSB OP PORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC  ,T XUSB OP PORTSC PLC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 21. " PRC   ,T XUSB OP PORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 20. "  OCC        ,T XUSB OP PORTSC OCC" "Not pending,Pending"
eventfld.long 0x00 19. "  WRC       ,T XUSB OP PORTSC WRC" "Not pending,Pending"
eventfld.long 0x00 18. "  PEC  ,T XUSB OP PORTSC PEC" "Not pending,Pending"
textline "                                "
eventfld.long 0x00 17. " CSC   ,T XUSB OP PORTSC CSC" "Not pending,Pending"
eventfld.long 0x00 16. "  LWS        ,T XUSB OP PORTSC LWS" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "     PIC       ,T XUSB OP PORTSC PIC" "Off,Amber,Green,Undefined"
rbitfld.long 0x00 10.--13. "    PSPD ,T XUSB OP PORTSC PSPD" "UNDEFINED,FS,LS,HS,SS,,,,,,,,,,,Unknown"
textline "                                "
bitfld.long 0x00 9. " PP    ,T XUSB OP PORTSC PP" "Off,On"
bitfld.long 0x00 5.--8. "          PLS        ,T XUSB OP PORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detected,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
bitfld.long 0x00 4. "  PR        ,T XUSB OP PORTSC PR" "Not pending,Pending"
rbitfld.long 0x00 3. "  OCA  ,T XUSB OP PORTSC OCA" "False,True"
textline "                                "
eventfld.long 0x00 1. " PED   ,T XUSB OP PORTSC PED" "Disabled,Enabled"
rbitfld.long 0x00 0. "     CCS        ,T XUSB OP PORTSC CCS" "No dev,Dev"
sif (cpu()=="TEGRAX2")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/SS,OP PORTPMSCSS/SS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
elif (cpu()=="TEGRAX1")
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS,OP PORTPMSCSS"
bitfld.long 0x00 16. " FLA   ,OP PORTPMSCSS FLA" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT  ,OP PORTPMSCSS U2TIMEOUT"
hexmask.long.byte 0x00 0.--7. 1. "           U1TIMEOUT ,OP PORTPMSCSS U1TIMEOUT"
else
group.long (0x510+0x04)++0x07
line.long 0x00 "OP_PORTPMSCSS/HS,OP PORTPMSCSS/HS"
endif
rgroup.long (0x510+0x0C)++0x03
line.long 0x00 "OP PORTHLPMC,OP PORTHLPMC"
bitfld.long 0x00 10.--13. " BESLD ,T XUSB OP PORTHLPMC BESLD" "Initialized,?..."
hexmask.long.byte 0x00 2.--9. 1. "  L1_TIMEOUT ,T XUSB OP PORTHLPMC L1 TIMEOUT"
bitfld.long 0x00 0.--1. "           HIRDM     ,T XUSB OP PORTHLPMC HIRDM" "Initialized,?..."
endif
textline "                                "
width 24.
group.long 0x600++0x07
line.long 0x00 "EC_USBLEGSUP,EC USBLEGSUP"
bitfld.long 0x00 24. " OSSEM    ,EC USBLEGSUP OSSEM" "0,1"
bitfld.long 0x00 16. "              BIOSSEM  ,T XUSB EC USBLEGSUP BIOSSEM" "0,1"
hexmask.long.byte 0x00 8.--15. 1. "            NEXT    ,EC USBLEGSUP NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC USBLEGSUP CAPID"
line.long 0x04 "HCI_EC_USBLEGCTLSTS,HCI_EC_USBLEGCTLSTS"
eventfld.long 0x04 31. " BAR      ,EC USBLEGCTLSTS BAR" "Not pending,Pending"
eventfld.long 0x04 30. "    PCIC     ,EC USBLEGCTLSTS PCIC" "Not pending,Pending"
eventfld.long 0x04 29. "  OSOC    ,EC USBLEGCTLSTS OSOC" "Not pending,Pending"
rbitfld.long 0x04 20. "  HSE   ,EC USBLEGCTLSTS HSE" "Not pending,Pending"
textline "                                 "
rbitfld.long 0x04 16. " EVI      ,EC USBLEGCTLSTS EVI" "Not pending,Pending"
bitfld.long 0x04 15. "    BAREN    ,EC USBLEGCTLSTS BAR enable" "Disabled,Enabled"
bitfld.long 0x04 14. "     PCIEN   ,EC USBLEGCTLSTS PCI enable" "Disabled,Enabled"
bitfld.long 0x04 13. "     OSOEN ,EC USBLEGCTLSTS OSO enable" "Disabled,Enabled"
textline "                                 "
bitfld.long 0x04 4. " HSEEN    ,EC USBLEGCTLSTS HSE enable" "Disabled,Enabled"
bitfld.long 0x04 0. "       SMIEN    ,EC USBLEGCTLSTS SMI enable" "Disabled,Enabled"
rgroup.long 0x610++0x23
line.long 0x00 "EC_SUPPROT_USB3_0,EC SUPPROT USB3 0"
hexmask.long.byte 0x00 24.--31. 1. " MAJORREV ,EC SUPPROT USB3 0 MAJORREV"
hexmask.long.byte 0x00 16.--23. 1. "             MINORREV ,EC SUPPROT USB3 0 MINORREV"
hexmask.long.byte 0x00 8.--15. 1. "           NEXT    ,EC SUPPROT USB3 0 NEXT"
hexmask.long.byte 0x00 0.--7. 1. "           CAPID ,EC SUPPROT USB3 0 CAPID"
line.long 0x04 "EC_SUPPROT_USB3_1,EC SUPPROT USB3 1"
line.long 0x08 "EC_SUPPROT_USB3_2,EC SUPPROT USB3 2"
hexmask.long.byte 0x08 8.--15. 1. " PORTCNT  ,EC SUPPROT USB3 2 PORTCNT"
hexmask.long.byte 0x08 0.--7. 1. "             PORTOFS  ,EC SUPPROT USB3 2 PORTOFS"
line.long 0x0C "EC_SUPPROT_USB3_3,EC SUPPROT USB3 3"
line.long 0x10 "EC_SUPPROT_USB2_0,EC SUPPROT USB2 0"
hexmask.long.byte 0x10 24.--31. 1. " MAJORREV ,EC SUPPROT USB2 0 MAJORREV"
hexmask.long.byte 0x10 16.--23. 1. "             MINORREV ,EC SUPPROT USB2 0 MINORREV"
hexmask.long.byte 0x10 8.--15. 1. "           XNEXT   ,EC SUPPROT USB2 0 NEXT"
hexmask.long.byte 0x10 0.--7. 1. "           CAPID ,EC SUPPROT USB2 0 CAPID"
line.long 0x14 "EC_SUPPROT_USB2_1,EC SUPPROT USB2 1"
line.long 0x18 "EC_SUPPROT_USB2_2,EC SUPPROT USB2 2"
bitfld.long 0x18 25.--27. " MHD      ,EC SUPPROT USB2 2 MHD" "MHD,?..."
bitfld.long 0x18 20. "            BLC      ,EC_SUPPROT_USB2_2_BLC" "False,True"
bitfld.long 0x18 19. "        HLC     ,EC_SUPPROT_USB2_2_HLC" "False,True"
bitfld.long 0x18 18. "        IHI   ,EC_SUPPROT_USB2_2_IHI" "True,False"
textline "                                 "
bitfld.long 0x18 17. " HSO      ,EC_SUPPROT_USB2_2_HSO" "True,False"
hexmask.long.byte 0x18 8.--15. 1. "          PORTCNT  ,EC SUPPROT USB2 2 PORTCNT"
hexmask.long.byte 0x18 0.--7. 1. "           PORTOFS ,EC SUPPROT USB2 2 PORTOFS"
line.long 0x1C "EC_SUPPROT_USB2_3,EC SUPPROT USB2 3"
line.long 0x20 "EC_DBCAP_DCID,EC_DBCAP_DCID"
bitfld.long 0x20 16.--20. " DCERSTM  ,EC_DBCAP_DCID_DCERSTM" ",DCERSTM_VALUE,?..."
hexmask.long.byte 0x20 8.--15. 1. "  NEXT     ,EC DBCAP DCID NEXT"
hexmask.long.byte 0x20 0.--7. 1. "           CAPID   ,EC DBCAP DCID CAPID"
wgroup.long 0x634++0x03
line.long 0x00 "EC_DBCAP_DCDB,EC DBCAP DCDB"
hexmask.long.byte 0x00 8.--15. 1. " DBTARGET ,EC DBCAP DCDB DBTARGET"
group.long 0x638++0x03
line.long 0x00 "EC_DBCAP_DCERSTSZ,EC DBCAP DCERSTSZ"
hexmask.long.word 0x00 0.--15. 1. " ERSTSZ   ,EC DBCAP DCERSTSZ ERSTSZ"
textline "                                 "
width 26.
group.long 0x640++0x13
line.long 0x00 "EC_DBCAP_DCERSTBALO,EC DBCAP DCERSTBALO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCERSTBALO"
line.long 0x04 "EC_DBCAP_DCERSTBAHI,EC DBCAP DCERSTBAHI"
line.long 0x08 "EC_DBCAP_DCERDPLO,EC DBCAP DCERDPLO"
hexmask.long 0x08 4.--31. 1. " ADDRLO   ,EC DBCAP DCERDPLO ADDRLO"
bitfld.long 0x08 0.--2. "     DESI      ,EC DBCAP DCERDPLO DESI" "Initialized,?..."
line.long 0x0C "EC_DBCAP_DCERDPHI,EC DBCAP DCERDPHI ADDRHI"
line.long 0x10 "EC_DBCAP_DCCTRL,EC DBCAP DCCTRL"
bitfld.long 0x10 31. " DCE      ,EC DBCAP DCCTRL DCE" "Disabled,Enabled"
hexmask.long.byte 0x10 24.--30. 1. "     DEVADR    ,EC DBCAP DCCTRL DEVADR"
hexmask.long.byte 0x10 16.--23. 1. "           MAXBURST ,EC DBCAP DCCTRL MAXBURST"
eventfld.long 0x10 4. "           DRC ,EC DBCAP DCCTRL DRC" "Initialized,Clear"
textline "                                   "
bitfld.long 0x10 3. " HIT      ,EC DBCAP DCCTRL HIT" "False,True"
bitfld.long 0x10 2. "        HOT       ,EC DBCAP DCCTRL HOT" "False,True"
bitfld.long 0x10 1. "        LSE      ,EC DBCAP DCCTRL LSE" "Disabled,Enabled"
rbitfld.long 0x10 0. "     DCR ,EC DBCAP DCCTRL DCR" "Stop,Run"
rgroup.long 0x654++0x03
line.long 0x00 "EC_DBCAP_DCST,EC DBCAP DCST"
hexmask.long.byte 0x00 24.--31. 1. " DPN      ,EC DBCAP DCST DPN"
bitfld.long 0x00 0. "           ER        ,EC DBCAP DCST ER" "Empty,Not empty"
group.long 0x658++0x03
line.long 0x00 "EC_DBCAP_DCPORTSC,EC DBCAP DCPORTSC"
eventfld.long 0x00 23. " CEC      ,EC DBCAP DCPORTSC CEC" "Not pending,Pending"
eventfld.long 0x00 22. "  PLC       ,EC DBCAP DCPORTSC PLC" "Not pending,Pending"
eventfld.long 0x00 21. "  PRC      ,EC DBCAP DCPORTSC PRC" "Not pending,Pending"
eventfld.long 0x00 17. "  CSC ,EC DBCAP DCPORTSC CSC" "Not pending,Pending"
textline "                                   "
rbitfld.long 0x00 10.--13. " PS       ,EC DBCAP DCPORTSC PS" "Undefined,,,,SS,?..."
rbitfld.long 0x00 5.--8. "    PLS       ,EC DBCAP DCPORTSC PLS" "U0,U1,U2,U3,Disabled,Rx detect,Inactive,Polling,Recovery,Hot reset,Compliance,Loopback,,,,Resumed"
rbitfld.long 0x00 4. "   PR       ,EC DBCAP DCPORTSC PR" "No reset,Reset"
bitfld.long 0x00 1. "     PED ,HCI EC DBCAP DCPORTSC PED" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 0. " CCS      ,EC DBCAP DCPORTSC CCS" "No CON,CON"
group.long 0x660++0x0F
line.long 0x00 "EC_DBCAP_DCECPLO,EC DBCAP DCECPLO"
hexmask.long 0x00 4.--31. 1. " ADDRLO   ,EC DBCAP DCECPLO ADDRLO"
line.long 0x04 "EC_DBCAP_DCECPHI,EC DBCAP DCECPHI ADDRHI"
line.long 0x08 "EC_DBCAP_INFO0,EC DBCAP INFO0"
hexmask.long.word 0x08 16.--31. 1. " VENDORID ,EC DBCAP INFO0 VENDORID"
hexmask.long.byte 0x08 0.--7. 1. "         PROTOCOL  ,EC DBCAP INFO0 PROTOCOL"
line.long 0x0C "EC_DBCAP_INFO1,EC_DBCAP_INFO1"
hexmask.long.word 0x0C 16.--31. 1. " DEV_REV  ,EC DBCAP INFO1 DEV REV"
hexmask.long.word 0x0C 0.--15. 1. "         PRODUCTID ,EC DBCAP INFO1 PRODUCTID"
rgroup.long 0x800++0x03
line.long 0x00 "RT_MFINDEX,RT MFINDEX"
hexmask.long.word 0x00 0.--13. 1. " MFINDEX  ,RT MFINDEX MFINDEX"
group.long 0x820++0x03
line.long 0x00 "RT_IMAN,RT IMAN"
bitfld.long 0x00 1. " IE       ,RT IMAN IE" "Disabled,Enabled"
eventfld.long 0x00 0. "     IP        ,RT IMAN IP" "Not pending,Pending"
group.long 0x824++0x07
line.long 0x00 "RT_IMOD,RT IMOD"
hexmask.long.word 0x00 16.--31. 1. " IMODC    ,RT IMOD IMODC"
hexmask.long.word 0x00 0.--15. 1. "         IMODI     ,RT IMOD IMODI"
line.long 0x04 "RT_ERSTSZ,RT ERSTSZ"
hexmask.long.word 0x04 0.--15. 1. " SZ       ,RT ERSTSZ SZ"
group.long 0x830++0x0F
line.long 0x00 "RT_ERSTBA0,RT ERSTBA0"
hexmask.long 0x00 4.--31. 1. " ERSTBLO  ,RT ERSTBA0 ERSTBLO"
line.long 0x04 "RT_ERSTBA1,RT ERSTBA1"
line.long 0x08 "RT_ERDP0,RT ERDP0"
hexmask.long 0x08 4.--31. 1. " DQPTRLO  ,RT ERDP0 DQPTRLO"
bitfld.long 0x08 0.--2. "     DESI      ,RT ERDP0 DESI" "Initialized,?..."
line.long 0x0C "RT_ERDP1,RT ERDP1"
wgroup.long 0xC00++0x03
line.long 0x00 "DB,DB"
button "BGR" "d (0xC00)--(0xFFC) /long"
tree.end
width 0x0B
tree.end
tree "Device PCI Config Registers"
base ad:0x03558000
width 8.
tree "XUSB PCI Config Registers"
rgroup.long 0x00++0x03
line.long 0x00 "CFG_0,XUSB Configuration Register 0"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT   ,DEVICE ID UNIT"
hexmask.long.word 0x00 0.--15. 1. "           VENDOR_ID           ,VENDOR ID"
group.long 0x04++0x03
line.long 0x00 "CFG_1,XUSB Configuration Register 1"
rbitfld.long 0x00 31. " DETECTED_PERR    ,T_XUSB_CFG_1 DETECTED PERR" "Not active,Active"
rbitfld.long 0x00 30. "     SIGNALED_SERR       ,T_XUSB_CFG_1 SIGNALED SERR" "Not active,Active"
rbitfld.long 0x00 29. "     RECEIVED_MASTER  ,T_XUSB_CFG_1 RECEIVED MASTER" "Not aborted,Aborted"
rbitfld.long 0x00 28. "       RECEIVED_TARGET ,T_XUSB_CFG_1 RECEIVED TARGET" "Not aborted,Aborted"
textline "                 "
rbitfld.long 0x00 27. " SIGNALED_TARGET  ,T_XUSB_CFG_1 SIGNALED TARGET" "Not aborted,Aborted"
rbitfld.long 0x00 25.--26. "    DEVSEL_TIMING       ,T_XUSB_CFG_1 DEVSEL TIMING" "Fast,Medium,Slow,?..."
rbitfld.long 0x00 24. "         MASTER_DATA_PERR ,T_XUSB_CFG_1 MASTER DATA PERR" "Inactive,Active"
rbitfld.long 0x00 23. "          FAST_BACK2BACK  ,T_XUSB_CFG_1 FAST BACK2BACK" "Incapable,Capable"
textline "                 "
rbitfld.long 0x00 21. " 66MHZ            ,T_XUSB_CFG_1 66MHZ" "Incapable,Capable"
rbitfld.long 0x00 20. "      CAPLIST             ,T_XUSB_CFG_1 CAPLIST" "Not present,Present"
rbitfld.long 0x00 19. "    INTR_STATUS      ,T_XUSB_CFG_1 INTR STATUS" "0,1"
bitfld.long 0x00 10. "                 INTR_DISABLE    ,T_XUSB_CFG_1 INTR DISABLE" "On,Off"
textline "                 "
rbitfld.long 0x00 9. " BACK2BACK        ,T_XUSB_CFG_1 BACK2BACK" "Disabled,Enabled"
rbitfld.long 0x00 8. "       SERR                ,T_XUSB_CFG_1 SERR" "Disabled,Enabled"
rbitfld.long 0x00 7. "       STEP             ,T_XUSB_CFG_1 STEP" "Disabled,Enabled"
rbitfld.long 0x00 6. "          PERR            ,T_XUSB_CFG_1 PERR" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 5. " PALETTE_SNOOP    ,T_XUSB_CFG_1 PALETTE SNOOP" "Disabled,Enabled"
rbitfld.long 0x00 4. "       WRITE_AND_INVAL     ,T_XUSB_CFG_1 WRITE AND INVAL" "Disabled,Enabled"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
textline "                 "
rbitfld.long 0x00 3. " SPECIAL_CYCLE    ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled"
else
textline "                 "
bitfld.long 0x00 3. " SPECIAL_CYCLE    ,T_XUSB_CFG_1 SPECIAL CYCLE" "Disabled,Enabled"
endif
textline "                 "
bitfld.long 0x00 2. " BUS_MASTER       ,T_XUSB_CFG_1 BUS MASTER" "Disabled,Enabled"
bitfld.long 0x00 1. "       MEMORY_SPACE        ,T_XUSB_CFG_1 MEMORY SPACE" "Disabled,Enabled"
bitfld.long 0x00 0. "       IO_SPACE         ,T_XUSB_CFG_1 IO SPACE" "Disabled,Enabled"
rgroup.long 0x08++0x07
line.long 0x00 "CFG_2,PCI Revision ID And Class Code Register 2"
hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS       ,T_XUSB_CFG_2 BASE CLASS"
hexmask.long.byte 0x00 16.--23. 1. "             SUB_CLASS           ,T_XUSB_CFG 2 SUB CLASS"
hexmask.long.byte 0x00 8.--15. 1. "             PROG_IF          ,T_XUSB_CFG 2 PROG IF"
hexmask.long.byte 0x00 0.--7. 1. "                REVISION_ID     ,T_XUSB_CFG_2 REVISION ID"
line.long 0x04 "CFG_3,PCI Configuration Register 3"
bitfld.long 0x04 23. " HEADER_TYPE_FUNC ,Identify whenever device contains single or multiple functions" "Single,Multi"
hexmask.long.byte 0x04 16.--22. 1. "         HEADER_TYPE_DEVICE  ,Header type - identify the layout of the bytes (0x10--0x3f) in configuration space"
bitfld.long 0x04 11.--15. "             LATENCY_TIMER    ,The value of the latency timer for this PCI bus master (In units of PCI bus clocks)" "0 clocks,8 clocks,16 clocks,24 clocks,32 clocks,40 clocks,48 clocks,56 clocks,64 clocks,72 clocks,80 clocks,88 clocks,96 clocks,104 clocks,112 clocks,120 clocks,128 clocks,136 clocks,144 clocks,152 clocks,160 clocks,168 clocks,176 clocks,184 clocks,192 clocks,200 clocks,208 clocks,216 clocks,224 clocks,232 clocks,240 clocks,248 clocks"
hexmask.long.byte 0x04 0.--7. 1. "        CACHE_LINE_SIZE ,T_XUSB_CFG_3 CACHE LINE SIZE"
group.long 0x10++0x07
line.long 0x00 "CFG_4,PCI Configuration Register 4"
hexmask.long.tbyte 0x00 15.--31. 0x80 " BASE_ADDRESS     ,Base address of the device"
hexmask.long.word 0x00 4.--14. 1. "         BAR_SIZE_32KB       ,T_XUSB_CFG_4 BAR SIZE 32KB"
rbitfld.long 0x00 3. "           PREFETCHABLE     ,T_XUSB_CFG_4 PREFETCHABLE" "Not prefetchable,Prefetchable"
rbitfld.long 0x00 1.--2. "  ADDRESS_TYPE    ,The ADDRESS_TYPE bits contain the type of the base address" "32,,64,?..."
textline "                 "
rbitfld.long 0x00 0. " SPACE_TYPE       ,The SPACE_TYPE bit indicates whether the register maps into memory or I/O space" "Memory,IO"
line.long 0x04 "CFG_5,XUSB Configuration Register 5"
rgroup.long 0x2C++0x03
line.long 0x00 "CFG_11,PCI Configuration Register 11"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID     ,T_XUSB_CFG_11 SUBSYSTEM ID"
hexmask.long.word 0x00 0.--15. 1. "           SUBSYSTEM_VENDOR_ID ,T_XUSB_CFG_11 SUBSYSTEM VENDOR ID"
rgroup.long 0x34++0x03
line.long 0x00 "CFG_13,PCI Configuration Register 13"
hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR          ,CAP pointer"
group.long 0x3C++0x07
line.long 0x00 "CFG_15,PCI Configuration Register 15"
hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT          ,Maximum time the device requires to gain access to the CPI bus"
hexmask.long.byte 0x00 16.--23. 1. "             MIN_GNT             ,Length of the burst period a device needs assuming a clock rate of 33 mhz"
hexmask.long.byte 0x00 8.--15. 1. "             INTR_PIN         ,Interrupt pin the device uses"
hexmask.long.byte 0x00 0.--7. 1. "                INTR_LINE       ,Interrupt routing information"
line.long 0x04 "CFG_16,PCI Configuration Register 16"
hexmask.long.word 0x04 16.--31. 1. " SUBSYSTEM_ID     ,SUBSYSTEM ID"
hexmask.long.word 0x04 0.--15. 1. "           SUBSYSTEM_VENDOR_ID ,SUBSYSTEM VENDOR ID"
rgroup.long 0x44++0x03
line.long 0x00 "CFG_17,PCI Configuration Register 17"
bitfld.long 0x00 31. " D3CPME_SUPPORT   ,T_XUSB_CFG_17 D3CPME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 30. "  D3HPME_SUPPORT      ,T_XUSB_CFG_17 D3HPME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 29. "  D2PME_SUPPORT    ,T_XUSB_CFG_17 D2PME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 28. "     D1PME_SUPPORT   ,T_XUSB_CFG_17 D1PME SUPPORT" "Not supported,Supported"
textline "                 "
bitfld.long 0x00 27. " D0PME_SUPPORT    ,T_XUSB_CFG_17 D0PME SUPPORT" "Not supported,Supported"
bitfld.long 0x00 26. "  D2_SUPPORT          ,T_XUSB_CFG_17 D2 SUPPORT" "Not supported,Supported"
bitfld.long 0x00 25. "  D1_SUPPORT       ,T_XUSB_CFG_17 D1 SUPPORT" "Not supported,Supported"
bitfld.long 0x00 22.--24. "     AUXCUR          ,T_XUSB_CFG_17 AUXCUR" "Self,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA"
textline "                 "
bitfld.long 0x00 21. " DSI              ,T_XUSB_CFG_17 DSI" "Not needed,Needed"
bitfld.long 0x00 19. "     PMECLK              ,T_XUSB_CFG_17 PMECLK" "Not required,Required"
bitfld.long 0x00 16.--18. "   VER              ,T_XUSB_CFG_17 VER" ",,,VER_1P2,?..."
hexmask.long.byte 0x00 8.--15. 1. "           NEXT_PTR        ,T_XUSB_CFG_17 NEXT PTR"
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " CAP              ,T_XUSB_CFG_17 CAP"
group.long 0x48++0x03
line.long 0x00 "CFG_18,T_XUSB_CFG_18 PMCSR"
eventfld.long 0x00 15. " PMCSR_PMESTATUS  ,T_XUSB_CFG_18 PMCSR PMESTATUS" "Not pending,Pending"
rbitfld.long 0x00 13.--14. "    PMCSR_DSCALE        ,T_XUSB_CFG_18 PMCSR DSCALE" "DSCALE_INIT,?..."
rbitfld.long 0x00 9.--12. "    PMCSR_DSEL       ,T_XUSB_CFG_18 PMCSR DSEL" "DSEL_INIT,?..."
bitfld.long 0x00 8. "         PMCSR_PME       ,T_XUSB_CFG_18 PMCSR PME" "Enabled,Disabled"
textline "                 "
rbitfld.long 0x00 3. " PMCSR_NSR        ,T_XUSB_CFG_18 PMCSR NSR" "No reset,Reset"
bitfld.long 0x00 0.--1. "       PMCSR_PWRSTATE      ,PMCSR_PWRSTATE" "D0,D1,D2,D3H"
textline "                 "
width 11.
group.long 0xC0++0x0F
line.long 0x00 "MSI_CTRL,MSI Message Control And Capability Register"
rbitfld.long 0x00 24. " VECTOR_MASK_CAP ,MSI-per-vector masking support" "Not supported,Supported"
rbitfld.long 0x00 23. "  64_ADDR_CAP ,Generating a 64-bit message address capability" "Not capable,Capable"
bitfld.long 0x00 20.--22. "  MULT_MSG_ENABLE ,System software writes to this field to indicate the number of allocated vectors" "1,2,4,8,16,32,?..."
rbitfld.long 0x00 17.--19. "  MULT_MSG_CAP ,Number of requested vectors" "1,2,4,8,16,32,?..."
textline "                    "
bitfld.long 0x00 16. " MSI_ENABLE      ,Enables the MSI capability" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "       NEXT_PTR    ,Next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "           CAP_ID          ,Capability block as the MSI capability block"
line.long 0x04 "MSI_ADDR1,MSI Message Address Register"
hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR        ,System-specified message address"
line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA        ,System-specified message data"
sif (cpu()=="TEGRAX1"||cpu()=="TEGRAX2")
group.long 0xD0++0x07
line.long 0x00 "MSI_MASK,MSI Message Data Register"
bitfld.long 0x00 0. " BIT             ,T_XUSB_MSI_MASK_BIT" "0,1"
line.long 0x04 "MSI_PEND,MSI Pending Bits Register"
hexmask.long.word 0x04 0.--15. 1. " BIT             ,T_XUSB_MSI_PEND_BIT"
endif
tree.end
width 0x0B
tree.end
tree "Device Controller Registers"
base ad:0x03550000
width 18.
rgroup.long 0x00++0x03
line.long 0x00 "SPARAM,ID Register"
bitfld.long 0x00 16.--20. " ERSTMAX                  ,Event ring segment table max" ",,SPARAM_ERSTMAX_VALUE,?..."
wgroup.long 0x04++0x03
line.long 0x00 "DB,Doorbell Register"
hexmask.long.word 0x00 16.--31. 1. " STREAMID                 ,Stream ID"
hexmask.long.byte 0x00 8.--15. 1. "          TARGET              ,The target field represents the Endpoint ID to which the doorbell is targeted"
group.long 0x08++0x03
line.long 0x00 "ERSTSZ,Event Ring Segment Table Size Register"
hexmask.long.word 0x00 16.--31. 1. " ERST1SZ                  ,Event ring segment table 1 size"
hexmask.long.word 0x00 0.--15. 1. "          ERST0SZ             ,Event ring segment table 0 size"
group.long 0x10++0x37
line.long 0x00 "ERST0BALO,Event Ring Segment 0 Base Low Address Register"
hexmask.long 0x00 4.--31. 0x10 " ADDRLO                   ,Low Address"
line.long 0x04 "ERST0BAHI,Event Ring Segment 0 Base High Address Register"
line.long 0x08 "ERST1BALO,Event Ring Segment 1 Base  Low Address Register"
hexmask.long 0x08 4.--31. 0x10 " ADDRLO                   ,Low Address"
line.long 0x0C "ERST1BAHI,Event Ring Segment 1 Base High Address Register"
line.long 0x10 "ERDPLO,Event Ring Dequeue Pointer Register"
hexmask.long 0x10 4.--31. 0x10 " ADDRLO                   ,Low Address"
eventfld.long 0x10 3. "      EHB                 ,Event Ring Dequeue Pointer EHB" "Init,Clear"
line.long 0x14 "ERDPHI,Event Ring Dequeue Pointer Register"
line.long 0x18 "EREPLO,Event Ring Enqueue Pointer"
hexmask.long 0x18 4.--31. 0x10 " ADDRLO                   ,Low Address"
bitfld.long 0x18 1. "      SEGI                ,SEGI" "Init,Max"
bitfld.long 0x18 0. "         ECS           ,ECS" "Init,?..."
line.long 0x1C "EREPHI,Event Ring Enqueue Pointer"
line.long 0x20 "CTRL,Control Register"
bitfld.long 0x20 31. " ENABLE                   ,Enable Device Mode operation" "Disabled,Enabled"
hexmask.long.byte 0x20 24.--30. 1. "      DEVADR              ,Address assigned to the device DUT"
bitfld.long 0x20 7. "           EWE           ,Enable event for MFINDEX rollover from 3FFF to 0" "False,True"
bitfld.long 0x20 6. "        SMI_DSE   ,Enable SMI interrupt for device system errors" "False,True"
textline "                           "
bitfld.long 0x20 5. " SMI_EVT                  ,Control SMI event" "False,True"
bitfld.long 0x20 4. "         IE                  ,Enable legacy/smi interrupt for pending events" "False,True"
bitfld.long 0x20 1. "        LSE           ,Generate Event on PORTSC change" "Disabled,Enabled"
bitfld.long 0x20 0. "     RUN       ,Device mode run/stop bit" "Stop,Run"
line.long 0x24 "ST,Status Register"
eventfld.long 0x24 5. " ST_DSE                   ,DSE interrupt status" "Pending,Clear"
eventfld.long 0x24 4. "       ST_IP               ,IP interrupt status" "Pending,Clear"
eventfld.long 0x24 0. "      ST_RC         ,RC interrupt status" "Pending,Clear"
line.long 0x28 "RT_IMOD,T XUSB DEV XHCI RT IMOD"
hexmask.long.word 0x28 16.--31. 1. " IMODC                    ,T XUSB DEV XHCI RT IMOD IMODC"
hexmask.long.word 0x28 0.--15. 1. "          IMODI               ,T XUSB DEV XHCI RT IMOD IMODI"
line.long 0x2C "PORTSC,T XUSB DEV XHCI PORTSC"
rbitfld.long 0x2C 30. " WPR                      ,T XUSB DEV XHCI PORTSC WPR" "Not reset,Reset"
eventfld.long 0x2C 23. "     CEC                 ,T XUSB DEV XHCI PORTSC CEC" "Not pending,Pending"
eventfld.long 0x2C 22. "  PLC           ,T XUSB DEV XHCI PORTSC PLC" "Not pending,Pending"
textline "                           "
eventfld.long 0x2C 21. " PRC                      ,T XUSB DEV XHCI PORTSC PRC" "Not pending,Pending"
eventfld.long 0x2C 19. "   WRC                 ,T XUSB DEV XHCI PORTSC WRC" "Not pending,Pending"
eventfld.long 0x2C 17. "  CSC           ,T XUSB DEV XHCI PORTSC CSC" "Not pending,Pending"
bitfld.long 0x2C 16. "  LWS       ,T XUSB DEV XHCI PORTSC LWS" "Init,Set"
textline "                           "
rbitfld.long 0x2C 10.--13. " PS                       ,T XUSB DEV XHCI PORTSC PS" "UNDEFINED,FS,LS,HS,SS,?..."
rbitfld.long 0x2C 9. "     LANE_POLARITY_VALUE ,Lane polarity value" "0,1"
bitfld.long 0x2C 5.--8. "            PLS           ,T XUSB DEV XHCI PORTSC PLS" "U0,U1,U2,U3,DISABLED,RXDETECT,INACTIVE,POLLING,RECOVERY,HOTRESET,COMPLIANCE,LOOPBACK,,,,RESUME"
rbitfld.long 0x2C 4. "   PR        ,T XUSB DEV XHCI PORTSC PR" "Not reset,Reset"
textline "                           "
bitfld.long 0x2C 3. " LANE_POLARITY_OVRD_VALUE ,T USB DEV XHCI PORTSC LANE POLARITY OVRD VALUE" "Init,?..."
bitfld.long 0x2C 2. "          LANE_POLARITY_OVRD  ,T XUSB DEV XHCI PORTSC LANE POLARITY OVRD" "Init,?..."
bitfld.long 0x2C 1. "         PED           ,T XUSB DEV XHCI PORTSC PED" "Disabled,Enabled"
bitfld.long 0x2C 0. "     CCS       ,T XUSB DEV XHCI PORTSC CCS" "CS_NOCON,CCS_CON"
line.long 0x30 "ECPLO,T XUSB DEV XHCI ECPLO"
hexmask.long 0x30 6.--31. 0x40 " ADDRLO                   ,T XUSB DEV XHCI ECPLO ADDRLO"
line.long 0x34 "ECPHI,T XUSB DEV XHCI ECPHI"
rgroup.long 0x48++0x03
line.long 0x00 "MFINDEX,T XUSB DEV XHCI MFINDEX"
hexmask.long.word 0x00 3.--13. 1. " FRAME                    ,T XUSB DEV XHCI MFINDEX FRAME"
bitfld.long 0x00 0.--2. "          UFRAME              ,T XUSB DEV XHCI MFINDEX UFRAME" "0,1,2,3,4,5,6,7"
group.long 0x4C++0x03
line.long 0x00 "PORTPM,Port PM Status And Control Register"
bitfld.long 0x00 31. " PNG_CYA                  ,T XUSB DEV XHCI PORTPM PNG CYA" "Init,?..."
bitfld.long 0x00 30. "          FRWE                ,T XUSB DEV XHCI PORTPM FRWE" "Init,?..."
bitfld.long 0x00 29. "         U2E           ,T XUSB DEV XHCI PORTPM U2E" "Init,?..."
bitfld.long 0x00 28. "         U1E       ,T XUSB DEV XHCI PORTPM U1E" "Init,?..."
textline "                           "
bitfld.long 0x00 27. " WOD                      ,T XUSB DEV XHCI PORTPM WOD" "Init,?..."
bitfld.long 0x00 26. "          WOC                 ,T XUSB DEV XHCI PORTPM WOC" "Init,?..."
rbitfld.long 0x00 25. "         VBA           ,T XUSB DEV XHCI PORTPM VBA" "Init,?..."
bitfld.long 0x00 24. "         FLA       ,T XUSB DEV XHCI PORTPM FLA" "Init,?..."
textline "                           "
hexmask.long.byte 0x00 16.--23. 1. " U1TIMEOUT                ,T XUSB DEV XHCI PORTPM U1TIMEOUT"
hexmask.long.byte 0x00 8.--15. 1. "            U2TIMEOUT           ,T XUSB DEV XHCI PORTPM U2TIMEOUT"
bitfld.long 0x00 4.--7. "           HIRD          ,T XUSB DEV XHCI PORTPM HIRD" "Init,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "         RWE       ,T XUSB DEV XHCI PORTPM RWE" "Disabled,Enabled"
textline "                           "
bitfld.long 0x00 0.--1. " L1S                      ,T XUSB DEV XHCI PORTPM L1S" "DROP,ACCEPT,NYET,STALL"
rgroup.long 0x50++0x0B
line.long 0x00 "EP_HALT,T XUSB DEV XHCI EP HALT"
bitfld.long 0x00 31. " EP_HALT_DCI[31]          ,T XUSB DEV XHCI EP HALT DCI 31" "No,Yes"
bitfld.long 0x00 30. "           [30]                ,T XUSB DEV XHCI EP HALT DCI 30" "No,Yes"
bitfld.long 0x00 29. "          [29]          ,T XUSB DEV XHCI EP HALT DCI 29" "No,Yes"
bitfld.long 0x00 28. "          [28]      ,T XUSB DEV XHCI EP HALT DCI 28" "No,Yes"
textline "                           "
bitfld.long 0x00 27. " [27]                     ,T XUSB DEV XHCI EP HALT DCI 27" "No,Yes"
bitfld.long 0x00 26. "           [26]                ,T XUSB DEV XHCI EP HALT DCI 26" "No,Yes"
bitfld.long 0x00 25. "          [25]          ,T XUSB DEV XHCI EP HALT DCI 25" "No,Yes"
bitfld.long 0x00 24. "          [24]      ,T XUSB DEV XHCI EP HALT DCI 24" "No,Yes"
textline "                           "
bitfld.long 0x00 23. " [23]                     ,T XUSB DEV XHCI EP HALT DCI 23" "No,Yes"
bitfld.long 0x00 22. "           [22]                ,T XUSB DEV XHCI EP HALT DCI 22" "No,Yes"
bitfld.long 0x00 21. "          [21]          ,T XUSB DEV XHCI EP HALT DCI 21" "No,Yes"
bitfld.long 0x00 20. "          [20]      ,T XUSB DEV XHCI EP HALT DCI 20" "No,Yes"
textline "                           "
bitfld.long 0x00 19. " [19]                     ,T XUSB DEV XHCI EP HALT DCI 19" "No,Yes"
bitfld.long 0x00 18. "           [18]                ,T XUSB DEV XHCI EP HALT DCI 18" "No,Yes"
bitfld.long 0x00 17. "          [17]          ,T XUSB DEV XHCI EP HALT DCI 17" "No,Yes"
bitfld.long 0x00 16. "          [16]      ,T XUSB DEV XHCI EP HALT DCI 16" "No,Yes"
textline "                           "
bitfld.long 0x00 15. " [15]                     ,T XUSB DEV XHCI EP HALT DCI 15" "No,Yes"
bitfld.long 0x00 14. "           [14]                ,T XUSB DEV XHCI EP HALT DCI 14" "No,Yes"
bitfld.long 0x00 13. "          [13]          ,T XUSB DEV XHCI EP HALT DCI 13" "No,Yes"
bitfld.long 0x00 12. "          [12]      ,T XUSB DEV XHCI EP HALT DCI 12" "No,Yes"
textline "                           "
bitfld.long 0x00 11. " [11]                     ,T XUSB DEV XHCI EP HALT DCI 11" "No,Yes"
bitfld.long 0x00 10. "           [10]                ,T XUSB DEV XHCI EP HALT DCI 10" "No,Yes"
bitfld.long 0x00 9. "          [9]           ,T XUSB DEV XHCI EP HALT DCI 9" "No,Yes"
bitfld.long 0x00 8. "          [8]       ,T XUSB DEV XHCI EP HALT DCI 8" "No,Yes"
textline "                           "
bitfld.long 0x00 7. " [7]                      ,T XUSB DEV XHCI EP HALT DCI 7" "No,Yes"
bitfld.long 0x00 6. "           [6]                 ,T XUSB DEV XHCI EP HALT DCI 6" "No,Yes"
bitfld.long 0x00 5. "          [5]           ,T XUSB DEV XHCI EP HALT DCI 5" "No,Yes"
bitfld.long 0x00 4. "          [4]       ,T XUSB DEV XHCI EP HALT DCI 4" "No,Yes"
textline "                           "
bitfld.long 0x00 3. " [3]                      ,T XUSB DEV XHCI EP HALT DCI 3" "No,Yes"
bitfld.long 0x00 2. "           [2]                 ,T XUSB DEV XHCI EP HALT DCI 2" "No,Yes"
bitfld.long 0x00 1. "          [1]           ,T XUSB DEV XHCI EP HALT DCI 1" "No,Yes"
bitfld.long 0x00 0. "          [0]       ,T XUSB DEV XHCI EP HALT DCI 0" "No,Yes"
line.long 0x04 "EP_PAUSE,T XUSB DEV XHCI EP PAUSE"
bitfld.long 0x04 31. " EP_PAUSE_DCI[31]         ,T XUSB DEV XHCI EP PAUSE DCI 31" "No,Yes"
bitfld.long 0x04 30. "           [30]                ,T XUSB DEV XHCI EP PAUSE DCI 30" "No,Yes"
bitfld.long 0x04 29. "          [29]          ,T XUSB DEV XHCI EP PAUSE DCI 29" "No,Yes"
bitfld.long 0x04 28. "          [28]      ,T XUSB DEV XHCI EP PAUSE DCI 28" "No,Yes"
textline "                           "
bitfld.long 0x04 27. " [27]                     ,T XUSB DEV XHCI EP PAUSE DCI 27" "No,Yes"
bitfld.long 0x04 26. "           [26]                ,T XUSB DEV XHCI EP PAUSE DCI 26" "No,Yes"
bitfld.long 0x04 25. "          [25]          ,T XUSB DEV XHCI EP PAUSE DCI 25" "No,Yes"
bitfld.long 0x04 24. "          [24]      ,T XUSB DEV XHCI EP PAUSE DCI 24" "No,Yes"
textline "                           "
bitfld.long 0x04 23. " [23]                     ,T XUSB DEV XHCI EP PAUSE DCI 23" "No,Yes"
bitfld.long 0x04 22. "           [22]                ,T XUSB DEV XHCI EP PAUSE DCI 22" "No,Yes"
bitfld.long 0x04 21. "          [21]          ,T XUSB DEV XHCI EP PAUSE DCI 21" "No,Yes"
bitfld.long 0x04 20. "          [20]      ,T XUSB DEV XHCI EP PAUSE DCI 20" "No,Yes"
textline "                           "
bitfld.long 0x04 19. " [19]                     ,T XUSB DEV XHCI EP PAUSE DCI 19" "No,Yes"
bitfld.long 0x04 18. "           [18]                ,T XUSB DEV XHCI EP PAUSE DCI 18" "No,Yes"
bitfld.long 0x04 17. "          [17]          ,T XUSB DEV XHCI EP PAUSE DCI 17" "No,Yes"
bitfld.long 0x04 16. "          [16]      ,T XUSB DEV XHCI EP PAUSE DCI 16" "No,Yes"
textline "                           "
bitfld.long 0x04 15. " [15]                     ,T XUSB DEV XHCI EP PAUSE DCI 15" "No,Yes"
bitfld.long 0x04 14. "           [14]                ,T XUSB DEV XHCI EP PAUSE DCI 14" "No,Yes"
bitfld.long 0x04 13. "          [13]          ,T XUSB DEV XHCI EP PAUSE DCI 13" "No,Yes"
bitfld.long 0x04 12. "          [12]      ,T XUSB DEV XHCI EP PAUSE DCI 12" "No,Yes"
textline "                           "
bitfld.long 0x04 11. " [11]                     ,T XUSB DEV XHCI EP PAUSE DCI 11" "No,Yes"
bitfld.long 0x04 10. "           [10]                ,T XUSB DEV XHCI EP PAUSE DCI 10" "No,Yes"
bitfld.long 0x04 9. "          [9]           ,T XUSB DEV XHCI EP PAUSE DCI 9" "No,Yes"
bitfld.long 0x04 8. "          [8]       ,T XUSB DEV XHCI EP PAUSE DCI 8" "No,Yes"
textline "                           "
bitfld.long 0x04 7. " [7]                      ,T XUSB DEV XHCI EP PAUSE DCI 7" "No,Yes"
bitfld.long 0x04 6. "           [6]                 ,T XUSB DEV XHCI EP PAUSE DCI 6" "No,Yes"
bitfld.long 0x04 5. "          [5]           ,T XUSB DEV XHCI EP PAUSE DCI 5" "No,Yes"
bitfld.long 0x04 4. "          [4]       ,T XUSB DEV XHCI EP PAUSE DCI 4" "No,Yes"
textline "                           "
bitfld.long 0x04 3. " [3]                      ,T XUSB DEV XHCI EP PAUSE DCI 3" "No,Yes"
bitfld.long 0x04 2. "           [2]                 ,T XUSB DEV XHCI EP PAUSE DCI 2" "No,Yes"
bitfld.long 0x04 1. "          [1]           ,T XUSB DEV XHCI EP PAUSE DCI 1" "No,Yes"
bitfld.long 0x04 0. "          [0]       ,T XUSB DEV XHCI EP PAUSE DCI 0" "No,Yes"
line.long 0x08 "EP_RELOAD,T XUSB DEV XHCI EP RELOAD"
bitfld.long 0x08 31. " EP_RELOAD[31]            ,T XUSB DEV XHCI EP RELOAD 31" "No,Yes"
bitfld.long 0x08 30. "           [30]                ,T XUSB DEV XHCI EP RELOAD 30" "No,Yes"
bitfld.long 0x08 29. "          [29]          ,T XUSB DEV XHCI EP RELOAD 29" "No,Yes"
bitfld.long 0x08 28. "          [28]      ,T XUSB DEV XHCI EP RELOAD 28" "No,Yes"
textline "                           "
bitfld.long 0x08 27. " [27]                     ,T XUSB DEV XHCI EP RELOAD 27" "No,Yes"
bitfld.long 0x08 26. "           [26]                ,T XUSB DEV XHCI EP RELOAD 26" "No,Yes"
bitfld.long 0x08 25. "          [25]          ,T XUSB DEV XHCI EP RELOAD 25" "No,Yes"
bitfld.long 0x08 24. "          [24]      ,T XUSB DEV XHCI EP RELOAD 24" "No,Yes"
textline "                           "
bitfld.long 0x08 23. " [23]                     ,T XUSB DEV XHCI EP RELOAD 23" "No,Yes"
bitfld.long 0x08 22. "           [22]                ,T XUSB DEV XHCI EP RELOAD 22" "No,Yes"
bitfld.long 0x08 21. "          [21]          ,T XUSB DEV XHCI EP RELOAD 21" "No,Yes"
bitfld.long 0x08 20. "          [20]      ,T XUSB DEV XHCI EP RELOAD 20" "No,Yes"
textline "                           "
bitfld.long 0x08 19. " [19]                     ,T XUSB DEV XHCI EP RELOAD 19" "No,Yes"
bitfld.long 0x08 18. "           [18]                ,T XUSB DEV XHCI EP RELOAD 18" "No,Yes"
bitfld.long 0x08 17. "          [17]          ,T XUSB DEV XHCI EP RELOAD 17" "No,Yes"
bitfld.long 0x08 16. "          [16]      ,T XUSB DEV XHCI EP RELOAD 16" "No,Yes"
textline "                           "
bitfld.long 0x08 15. " [15]                     ,T XUSB DEV XHCI EP RELOAD 15" "No,Yes"
bitfld.long 0x08 14. "           [14]                ,T XUSB DEV XHCI EP RELOAD 14" "No,Yes"
bitfld.long 0x08 13. "          [13]          ,T XUSB DEV XHCI EP RELOAD 13" "No,Yes"
bitfld.long 0x08 12. "          [12]      ,T XUSB DEV XHCI EP RELOAD 12" "No,Yes"
textline "                           "
bitfld.long 0x08 11. " [11]                     ,T XUSB DEV XHCI EP RELOAD 11" "No,Yes"
bitfld.long 0x08 10. "           [10]                ,T XUSB DEV XHCI EP RELOAD 10" "No,Yes"
bitfld.long 0x08 9. "          [9]           ,T XUSB DEV XHCI EP RELOAD 9" "No,Yes"
bitfld.long 0x08 8. "          [8]       ,T XUSB DEV XHCI EP RELOAD 8" "No,Yes"
textline "                           "
bitfld.long 0x08 7. " [7]                      ,T XUSB DEV XHCI EP RELOAD 7" "No,Yes"
bitfld.long 0x08 6. "           [6]                 ,T XUSB DEV XHCI EP RELOAD 6" "No,Yes"
bitfld.long 0x08 5. "          [5]           ,T XUSB DEV XHCI EP RELOAD 5" "No,Yes"
bitfld.long 0x08 4. "          [4]       ,T XUSB DEV XHCI EP RELOAD 4" "No,Yes"
textline "                           "
bitfld.long 0x08 3. " [3]                      ,T XUSB DEV XHCI EP RELOAD 3" "No,Yes"
bitfld.long 0x08 2. "           [2]                 ,T XUSB DEV XHCI EP RELOAD 2" "No,Yes"
bitfld.long 0x08 1. "          [1]           ,T XUSB DEV XHCI EP RELOAD 1" "No,Yes"
bitfld.long 0x08 0. "          [0]       ,T XUSB DEV XHCI EP RELOAD 0" "No,Yes"
group.long 0x5C++0x17
line.long 0x00 "EP_STCHG,T XUSB DEV XHCI EP STCHG"
eventfld.long 0x00 31. " IN15                     ,T XUSB DEV XHCI EP STCHG IN15" "No,Yes"
eventfld.long 0x00 30. "           OUT15               ,T XUSB DEV XHCI EP STCHG OUT15" "No,Yes"
eventfld.long 0x00 29. "          IN14          ,T XUSB DEV XHCI EP STCHG IN14" "No,Yes"
eventfld.long 0x00 28. "          OUT14     ,T XUSB DEV XHCI EP STCHG OUT14" "No,Yes"
textline "                           "
eventfld.long 0x00 27. " IN13                     ,T XUSB DEV XHCI EP STCHG IN13" "No,Yes"
eventfld.long 0x00 26. "           OUT13               ,T XUSB DEV XHCI EP STCHG OUT13" "No,Yes"
eventfld.long 0x00 25. "          IN12          ,T XUSB DEV XHCI EP STCHG IN12" "No,Yes"
eventfld.long 0x00 24. "          OUT12     ,T XUSB DEV XHCI EP STCHG OUT12" "No,Yes"
textline "                           "
eventfld.long 0x00 23. " IN11                     ,T XUSB DEV XHCI EP STCHG IN11" "No,Yes"
eventfld.long 0x00 22. "           OUT11               ,T XUSB DEV XHCI EP STCHG OUT11" "No,Yes"
eventfld.long 0x00 21. "          IN10          ,T XUSB DEV XHCI EP STCHG IN10" "No,Yes"
eventfld.long 0x00 20. "          OUT10     ,T XUSB DEV XHCI EP STCHG OUT10" "No,Yes"
textline "                           "
eventfld.long 0x00 19. " IN9                      ,T XUSB DEV XHCI EP STCHG IN9" "No,Yes"
eventfld.long 0x00 18. "           OUT9                ,T XUSB DEV XHCI EP STCHG OUT9" "No,Yes"
eventfld.long 0x00 17. "          IN8           ,T XUSB DEV XHCI EP STCHG IN8" "No,Yes"
eventfld.long 0x00 16. "          OUT8      ,T XUSB DEV XHCI EP STCHG OUT8" "No,Yes"
textline "                           "
eventfld.long 0x00 15. " IN7                      ,T XUSB DEV XHCI EP STCHG IN7" "No,Yes"
eventfld.long 0x00 14. "           OUT7                ,T XUSB DEV XHCI EP STCHG OUT7" "No,Yes"
eventfld.long 0x00 13. "          IN6           ,T XUSB DEV XHCI EP STCHG IN6" "No,Yes"
eventfld.long 0x00 12. "          OUT6      ,T XUSB DEV XHCI EP STCHG OUT6" "No,Yes"
textline "                           "
eventfld.long 0x00 11. " IN5                      ,T XUSB DEV XHCI EP STCHG IN5" "No,Yes"
eventfld.long 0x00 10. "           OUT5                ,T XUSB DEV XHCI EP STCHG OUT5" "No,Yes"
eventfld.long 0x00 9. "          IN4           ,T XUSB DEV XHCI EP STCHG IN4" "No,Yes"
eventfld.long 0x00 8. "          OUT4      ,T XUSB DEV XHCI EP  STCHG OUT4" "No,Yes"
textline "                           "
eventfld.long 0x00 7. " IN3                      ,T XUSB DEV XHCI EP STCHG IN3" "No,Yes"
eventfld.long 0x00 6. "           OUT3                ,T XUSB DEV XHCI EP STCHG OUT3" "No,Yes"
eventfld.long 0x00 5. "          IN2           ,T XUSB DEV XHCI EP STCHG IN2" "No,Yes"
eventfld.long 0x00 4. "          OUT2      ,T XUSB DEV XHCI EP STCHG OUT2" "No,Yes"
textline "                           "
eventfld.long 0x00 3. " IN1                      ,T XUSB DEV XHCI EP STCHG IN1" "No,Yes"
eventfld.long 0x00 2. "           OUT1                ,T XUSB DEV XHCI EP STCHG OUT1" "No,Yes"
eventfld.long 0x00 1. "          IN0           ,T XUSB DEV XHCI EP STCHG IN0" "No,Yes"
eventfld.long 0x00 0. "          OUT0      ,T XUSB DEV XHCI EP STCHG OUT0" "No,Yes"
line.long 0x04 "FLOWCNTRL,Flow Control Threshold Values For HSFS NAK"
hexmask.long.byte 0x04 16.--23. 1. " IDLE_MITS                ,T XUSB DEV XHCI FLOWCNTRL IDLE MITS"
bitfld.long 0x04 15. "            OUT_EN              ,XUSB DEV XHCI FLOWCNTRL OUT EN" "Init,?..."
hexmask.long.byte 0x04 8.--14. 1. "         OUT_THRESH    ,XUSB DEV XHCI FLOWCNTRL OUT THRESH"
bitfld.long 0x04 7. "           IN_EN     ,XUSB DEV XHCI FLOWCNTRL IN EN" "Init,?..."
textline "                           "
hexmask.long.byte 0x04 0.--6. 1. " IN_THRESH                ,T XUSB DEV XHCI FLOWCNTRL IN THRESH"
line.long 0x08 "DEVNOTIF_LO,Device Notification Register"
hexmask.long.tbyte 0x08 8.--31. 1. " LO_DATA                  ,T XUSB DEV XHCI DEVNOTIF LO DATA"
bitfld.long 0x08 4.--7. "        LO_TYPE             ,T XUSB DEV XHCI DEVNOTIF LO TYPE" "Init,?..."
bitfld.long 0x08 0. "         LO            ,T XUSB DEV XHCI DEVNOTIF LO" "Init,Set"
line.long 0x0C "DEVNOTIF_HI,Device Notification Register"
line.long 0x10 "PORTHALT,T XUSB DEV XHCI PORTHALT"
bitfld.long 0x10 26. " STCHG_REQ                ,T XUSB DEV XHCI PORTHALT STCHG REQ" "Init,?..."
bitfld.long 0x10 25. "          STCHG_PME_EN        ,T XUSB DEV XHCI PORTHALT STCHG PME EN" "Init,?..."
bitfld.long 0x10 24. "         STCHG_INTR_EN ,T XUSB DEV XHCI PORTHALT STCHG INTR EN" "Init,?..."
eventfld.long 0x10 20. "         STCHG_REQ ,T XUSB DEV XHCI PORTHALT STCHG REQ" "Not pending,Pending"
textline "                           "
rbitfld.long 0x10 16.--19. " STCHG_STATE              ,T XUSB DEV XHCI PORTHALT STCHG STATE" "STATE_U0,?..."
eventfld.long 0x10 1. "      HALT_REJECT         ,T XUSB DEV XHCI PORTHALT HALT REJECT" "False,True"
bitfld.long 0x10 0. "        HALT_LTSSM    ,T XUSB DEV XHCI PORTHALT HALT LTSSM" "Init,?..."
line.long 0x14 "PORT_TM,T XUSB DEV XHCI PORT TM"
bitfld.long 0x14 0.--3. " CTRL                     ,T XUSB DEV XHCI PORT TM CTRL" "Disabled,TESTJ,TESTK,SE0_NAK,TEST_PKT,TEST_FORCEEN,?..."
rgroup.long 0x74++0x03
line.long 0x00 "EP_THREAD_ACTIVE,Per EP Bit To Indicate Whether EP Is Loaded/Active In BI"
bitfld.long 0x00 31. " EP_THREAD_ACTIVE[31]     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [31]" "No,Yes"
bitfld.long 0x00 30. "           [30]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [30]" "No,Yes"
bitfld.long 0x00 29. "          [29]          ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [29]" "No,Yes"
bitfld.long 0x00 28. "          [28]      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [28]" "No,Yes"
textline "                           "
bitfld.long 0x00 27. " [27]                     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [27]" "No,Yes"
bitfld.long 0x00 26. "           [26]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [26]" "No,Yes"
bitfld.long 0x00 25. "          [25]          ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [25]" "No,Yes"
bitfld.long 0x00 24. "          [24]      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [24]" "No,Yes"
textline "                           "
bitfld.long 0x00 23. " [23]                     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [23]" "No,Yes"
bitfld.long 0x00 22. "           [22]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [22]" "No,Yes"
bitfld.long 0x00 21. "          [21]          ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [21]" "No,Yes"
bitfld.long 0x00 20. "          [20]      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [20]" "No,Yes"
textline "                           "
bitfld.long 0x00 19. " [19]                     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [19]" "No,Yes"
bitfld.long 0x00 18. "           [18]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [18]" "No,Yes"
bitfld.long 0x00 17. "          [17]          ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [17]" "No,Yes"
bitfld.long 0x00 16. "          [16]      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [16]" "No,Yes"
textline "                           "
bitfld.long 0x00 15. " [15]                     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [15]" "No,Yes"
bitfld.long 0x00 14. "           [14]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [14]" "No,Yes"
bitfld.long 0x00 13. "          [13]          ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [13]" "No,Yes"
bitfld.long 0x00 12. "          [12]      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [12]" "No,Yes"
textline "                           "
bitfld.long 0x00 11. " [11]                     ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [11]" "No,Yes"
bitfld.long 0x00 10. "           [10]                ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [10]" "No,Yes"
bitfld.long 0x00 9. "          [9]           ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [9]" "No,Yes"
bitfld.long 0x00 8. "          [8]       ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [8]" "No,Yes"
textline "                           "
bitfld.long 0x00 7. " [7]                      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [7]" "No,Yes"
bitfld.long 0x00 6. "           [6]                 ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [6]" "No,Yes"
bitfld.long 0x00 5. "          [5]           ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [5]" "No,Yes"
bitfld.long 0x00 4. "          [4]       ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [4]" "No,Yes"
textline "                           "
bitfld.long 0x00 3. " [3]                      ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [3]" "No,Yes"
bitfld.long 0x00 2. "           [2]                 ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [2]" "No,Yes"
bitfld.long 0x00 1. "          [1]           ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [1]" "No,Yes"
bitfld.long 0x00 0. "          [0]       ,T XUSB DEV XHCI EP THREAD ACTIVE DCI [0]" "No,Yes"
group.long 0x78++0x07
line.long 0x00 "EP_STOPPED,EP_STOPPED Register"
eventfld.long 0x00 31. " IN15                     ,T XUSB DEV XHCI EP STOPPED IN15" "No,Yes"
eventfld.long 0x00 30. "           OUT15               ,T XUSB DEV XHCI EP STOPPED OUT15" "No,Yes"
eventfld.long 0x00 29. "          IN14          ,T XUSB DEV XHCI EP STOPPED IN14" "No,Yes"
eventfld.long 0x00 28. "          OUT14     ,T XUSB DEV XHCI EP STOPPED OUT14" "No,Yes"
textline "                           "
eventfld.long 0x00 27. " IN13                     ,T XUSB DEV XHCI EP STOPPED IN13" "No,Yes"
eventfld.long 0x00 26. "           OUT13               ,T XUSB DEV XHCI EP STOPPED OUT13" "No,Yes"
eventfld.long 0x00 25. "          IN12          ,T XUSB DEV XHCI EP STOPPED IN12" "No,Yes"
eventfld.long 0x00 24. "          OUT12     ,T XUSB DEV XHCI EP STOPPED OUT12" "No,Yes"
textline "                           "
eventfld.long 0x00 23. " IN11                     ,T XUSB DEV XHCI EP STOPPED IN11" "No,Yes"
eventfld.long 0x00 22. "           OUT11               ,T XUSB DEV XHCI EP TOPPED OUT11" "No,Yes"
eventfld.long 0x00 21. "          IN10          ,T XUSB DEV XHCI EP STOPPED IN10" "No,Yes"
eventfld.long 0x00 20. "          OUT10     ,T XUSB DEV XHCI EP STOPPED OUT10" "No,Yes"
textline "                           "
eventfld.long 0x00 19. " IN9                      ,T XUSB DEV XHCI EP STOPPED IN9" "No,Yes"
eventfld.long 0x00 18. "           OUT9                ,T XUSB DEV XHCI EP STOPPED OUT9" "No,Yes"
eventfld.long 0x00 17. "          IN8           ,T XUSB DEV XHCI EP STOPPED IN8" "No,Yes"
eventfld.long 0x00 16. "          OUT8      ,T XUSB DEV XHCI EP STOPPED OUT8" "No,Yes"
textline "                           "
eventfld.long 0x00 15. " IN7                      ,T XUSB DEV XHCI EP STOPPED IN7" "No,Yes"
eventfld.long 0x00 14. "           OUT7                ,T XUSB DEV XHCI EP STOPPED OUT7" "No,Yes"
eventfld.long 0x00 13. "          IN6           ,T XUSB DEV XHCI EP STOPPED IN6" "No,Yes"
eventfld.long 0x00 12. "          OUT6      ,T XUSB DEV XHCI EP STOPPED OUT6" "No,Yes"
textline "                           "
eventfld.long 0x00 11. " IN5                      ,T XUSB DEV XHCI EP STOPPED IN5" "No,Yes"
eventfld.long 0x00 10. "           OUT5                ,T XUSB DEV XHCI EP STOPPED OUT5" "No,Yes"
eventfld.long 0x00 9. "          IN4           ,T XUSB DEV XHCI EP STOPPED IN4" "No,Yes"
eventfld.long 0x00 8. "          OUT4      ,T XUSB DEV XHCI EP STOPPED OUT4" "No,Yes"
textline "                           "
eventfld.long 0x00 7. " IN3                      ,T XUSB DEV XHCI EP STOPPED IN3" "No,Yes"
eventfld.long 0x00 6. "           OUT3                ,T XUSB DEV XHCI EP STOPPED OUT3" "No,Yes"
eventfld.long 0x00 5. "          IN2           ,T XUSB DEV XHCI EP STOPPED IN2" "No,Yes"
eventfld.long 0x00 4. "          OUT2      ,T XUSB DEV XHCI EP STOPPED OUT2" "No,Yes"
textline "                           "
eventfld.long 0x00 3. " IN1                      ,T XUSB DEV XHCI EP STOPPED IN1" "No,Yes"
eventfld.long 0x00 2. "           OUT1                ,T XUSB DEV XHCI EP STOPPED OUT1" "No,Yes"
eventfld.long 0x00 1. "          IN0           ,T XUSB DEV XHCI EP STOPPED IN0" "No,Yes"
eventfld.long 0x00 0. "          OUT0      ,T XUSB DEV XHCI EP STOPPED OUT0" "No,Yes"
line.long 0x04 "STREAMID_CFG,T XUSB DEV XHCI STREAMID CFG"
hexmask.long.word 0x04 16.--31. 1. " STREAMID                 ,T XUSB DEV XHCI STREAMID CFG STREAMID"
bitfld.long 0x04 8.--12. "          DCI                 ,T XUSB DEV XHCI STREAMID CFG DCI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0. "           TRIGGER       ,T XUSB DEV XHCI STREAMID CFG TRIGGER" "Not pending,Pending"
group.long 0x84++0x03
line.long 0x00 "DEV_SOFTRST,SOFTRST Signal For Device Mode"
hexmask.long.byte 0x00 8.--15. 1. " RSTCNT                   ,T XUSB DEV XHCI DEV SOFTRST RSTCNT"
bitfld.long 0x00 1. "            CYA_DMAIDLE         ,T XUSB DEV XHCI DEV SOFTRST CYA DMAIDLE" "Init,?..."
bitfld.long 0x00 0. "         RESET         ,T XUSB DEV XHCI DEV SOFTRST RESET" "Not pending,Pending"
tree "HSFSPI registers"
width 20.
group.long 0x100++0x3F
line.long 0x00 "COUNT0,T XUSB DEV XHCI HSFSPI COUNT0"
hexmask.long 0x00 0.--29. 1. " FS_RESET_MIN             ,T XUSB DEV XHCI HSFSPI COUNT0 FS RESET MIN"
line.long 0x04 "COUNT1,T XUSB DEV XHCI HSFSPI COUNT1"
hexmask.long 0x04 0.--29. 1. " HS_RESET_MIN             ,XHCI HSFSPI COUNT0 HS RESET MIN"
line.long 0x08 "COUNT2,T XUSB DEV XHCI HSFSPI COUNT2"
hexmask.long 0x08 0.--29. 1. " HS_RESET_ST_RESET_MIN    ,T XUSB DEV XHCI HSFSPI COUNT2 HS RESET ST RESET MIN"
line.long 0x0C "COUNT3,T_XUSB_DEV_XHCI_HSFSPI_COUNT3"
hexmask.long 0x0C 0.--29. 1. " TX_CHIRP_MID             ,T XUSB DEV XHCI HSFSPI COUNT3 TX CHIRP MID"
line.long 0x10 "COUNT4,T XUSB DEV XHCI HSFSPI COUNT4"
hexmask.long 0x10 0.--29. 1. " CHIRP_MIN                ,T XUSB DEV XHCI HSFSPI COUNT4 CHIRP MIN"
line.long 0x14 "COUNT5,T XUSB DEV XHCI HSFSPI COUNT5"
hexmask.long 0x14 0.--29. 1. " CHIRP_MAX                ,T XUSB DEV XHCI HSFSPI COUNT5 CHIRP MAX"
line.long 0x18 "COUNT6,T XUSB DEV XHCI HSFSPI COUNT6"
hexmask.long 0x18 0.--29. 1. " INACTIVITY_TIMEOUT       ,T XUSB DEV XHCI HSFSPI COUNT6 INACTIVITY TIMEOUT"
line.long 0x1C "COUNT7,T XUSB DEV XHCI HSFSPI COUNT7"
hexmask.long 0x1C 0.--29. 1. " HS_FSM_TIMEOUT           ,T XUSB DEV XHCI HSFSPI COUNT7 HS FSM TIMEOUT"
line.long 0x20 "COUNT8,T XUSB DEV XHCI HSFSPI COUNT8"
hexmask.long 0x20 0.--29. 1. " FS_FSM_TIMEOUT           ,T XUSB DEV XHCI HSFSPI COUNT8 FS FSM TIMEOUT"
line.long 0x24 "COUNT9,T XUSB DEV XHCI HSFSPI COUNT9"
hexmask.long 0x24 0.--29. 1. " U3_RESUME_K_DURATION     ,T XUSB DEV XHCI HSFSPI COUNT9 U3 RESUME K DURATION"
line.long 0x28 "COUNT10,T XUSB DEV XHCI HSFSPI COUNT10"
hexmask.long 0x28 0.--29. 1. " U3_ENTRY_DELAY           ,T XUSB DEV XHCI HSFSPI COUNT10 U3 ENTRY DELAY"
line.long 0x2C "COUNT11,T XUSB DEV XHCI HSFSPI COUNT11"
hexmask.long 0x2C 0.--29. 1. " FS_RESET_ST_RESET_MIN    ,T XUSB DEV XHCI HSFSPI COUNT11 FS RESET ST RESET MIN"
line.long 0x30 "COUNT12,T XUSB DEV XHCI HSFSPI COUNT12"
hexmask.long 0x30 0.--29. 1. " U2_ENTRY_DELAY           ,T XUSB DEV XHCI HSFSPI COUNT12 U2 ENTRY DELAY"
line.long 0x34 "COUNT13,T XUSB DEV XHCI HSFSPI COUNT13"
hexmask.long 0x34 0.--29. 1. " U2_RESUME_K_DURATION     ,T XUSB DEV XHCI HSFSPI COUNT13 U2 RESUME K DURATION"
line.long 0x38 "CTRL,T XUSB DEV XHCI HSFSPI CTRL"
bitfld.long 0x38 26.--30. " HS_IDLE_BIT_TIME         ,T XUSB DEV XHCI HSFSPI CTRL HS IDLE BIT TIME" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,Init"
bitfld.long 0x38 22.--25. "      FS_SE0_WIDTH             ,T XUSB DEV XHCI HSFSPI CTRL FS SE0 WIDTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 21. "           BITSTUFF_DISABLE         ,T XUSB DEV XHCI HSFSPI CTRL BITSTUFF DISABLE" "Init,?..."
textline "                             "
bitfld.long 0x38 20. " NRZI_DISABLE             ,T XUSB DEV XHCI HSFSPI CTRL NRZI DISABLE" "Init,?..."
hexmask.long.word 0x38 10.--19. 1. "      FS_INTERPKT_DELAY        ,T XUSB DEV XHCI HSFSPI CTRL FS INTERPKT DELAY"
hexmask.long.word 0x38 0.--9. 1. "         HS_INTERPKT_DELAY        ,T XUSB DEV XHCI HSFSPI CTRL HS INTERPKT DELAY"
line.long 0x3C "TESTMODE_CTRL,T XUSB DEV XHCI HSFSPI TESTMODE CTRL"
bitfld.long 0x3C 1. " CYA_ADDR_MATCH           ,T XUSB DEV XHCI HSFSPI TESTMODE CTRL CYA ADDR MATCH" "Init,?..."
bitfld.long 0x3C 0. "      PATTERN_SELECT           ,T XUSB DEV XHCI HSFSPI TESTMODE CTRL PATTERN SELECT" "Init,?..."
group.long 0x140++0x03
line.long 0x00 "TESTMODE_PATTERN0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN0 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN0 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN0 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN0 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN0  BYTE0"
group.long 0x144++0x03
line.long 0x00 "TESTMODE_PATTERN1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN1 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN1 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN1 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN1 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN1  BYTE0"
group.long 0x148++0x03
line.long 0x00 "TESTMODE_PATTERN2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN2 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN2 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN2 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN2 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN2  BYTE0"
group.long 0x14C++0x03
line.long 0x00 "TESTMODE_PATTERN3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN3 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN3 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN3 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN3 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN3  BYTE0"
group.long 0x150++0x03
line.long 0x00 "TESTMODE_PATTERN4 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN4 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN4 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN4 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN4 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN4  BYTE0"
group.long 0x154++0x03
line.long 0x00 "TESTMODE_PATTERN5 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN5 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN5 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN5 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN5 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN5  BYTE0"
group.long 0x158++0x03
line.long 0x00 "TESTMODE_PATTERN6 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN6 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN6 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN6 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN6 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN6  BYTE0"
group.long 0x15C++0x03
line.long 0x00 "TESTMODE_PATTERN7 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN7 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN7 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN7 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN7 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN7  BYTE0"
group.long 0x160++0x03
line.long 0x00 "TESTMODE_PATTERN8 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN8 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN8 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN8 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN8 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN8  BYTE0"
group.long 0x164++0x03
line.long 0x00 "TESTMODE_PATTERN9 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9 "
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN9 _BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9  BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN9 _BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9  BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN9 _BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9  BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN9 _BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN9  BYTE0"
group.long 0x168++0x03
line.long 0x00 "TESTMODE_PATTERN10,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN10_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN10_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN10_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN10_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN10 BYTE0"
group.long 0x16C++0x03
line.long 0x00 "TESTMODE_PATTERN11,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN11_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN11_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN11_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN11_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN11 BYTE0"
group.long 0x170++0x03
line.long 0x00 "TESTMODE_PATTERN12,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN12_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN12_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN12_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN12_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN12 BYTE0"
group.long 0x174++0x03
line.long 0x00 "TESTMODE_PATTERN13,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN13_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN13_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN13_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN13_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN13 BYTE0"
group.long 0x178++0x03
line.long 0x00 "TESTMODE_PATTERN14,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN14_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN14_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN14_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN14_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN14 BYTE0"
group.long 0x17C++0x03
line.long 0x00 "TESTMODE_PATTERN15,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15"
hexmask.long.byte 0x00 24.--31. 1. " TESTMODE_PATTERN15_BYTE3 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE3"
hexmask.long.byte 0x00 16.--23. 1. "        TESTMODE_PATTERN15_BYTE2 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE2"
hexmask.long.byte 0x00 8.--15. 1. "           TESTMODE_PATTERN15_BYTE1 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE1"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TESTMODE_PATTERN15_BYTE0 ,T XUSB DEV XHCI HSFSPI TESTMODE PATTERN15 BYTE0"
group.long 0x180++0x03
line.long 0x00 "PVTPORTDBG_CTRL,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL"
bitfld.long 0x00 20.--23. " END_MINOR                ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL END MINOR" "Init,?..."
bitfld.long 0x00 16.--19. "      END_MAJOR                ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL END MAJOR" "Init,?..."
bitfld.long 0x00 12.--15. "         START_MINOR              ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL START MINOR" "Init,?..."
textline "                             "
bitfld.long 0x00 8.--11. " START_MAJOR              ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL START MAJOR" "Init,?..."
bitfld.long 0x00 1. "      CLEAR                    ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL CLEAR" "Not pending,Pending"
bitfld.long 0x00 0. "  RUN                      ,T XUSB DEV XHCI HSFSPI PVTPORTDBG CTRL RUN" "Stop,Run"
rgroup.long 0x184++0x03
line.long 0x00 "PVTPORTDBG_STS,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS"
bitfld.long 0x00 19. " TESTMODE_HS_PKT          ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS PKT" "0,1"
bitfld.long 0x00 18. "         TESTMODE_HS_NAK          ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS NAK" "0,1"
bitfld.long 0x00 17. "            TESTMODE_HS_KSTATE       ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HS KSTATE" "0,1"
textline "                             "
bitfld.long 0x00 16. " TESTMODE_HS_JSTATE       ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS TESTMODE HSJSTATE" "0,1"
bitfld.long 0x00 15. "         ENABLED_FS_RESUME        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS RESUME" "0,1"
bitfld.long 0x00 14. "            ENABLED_FS_U3            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U3" "0,1"
textline "                             "
bitfld.long 0x00 13. " ENABLED_FS_U2            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U2" "0,1"
bitfld.long 0x00 12. "         ENABLED_FS_U0            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED FS U0" "0,1"
bitfld.long 0x00 11. "            ENABLED_HS_RESUME        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS RESUME" "0,1"
textline "                             "
bitfld.long 0x00 10. " ENABLED_HS_U3            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U3" "0,1"
bitfld.long 0x00 9. "         ENABLED_HS_U2            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U2" "0,1"
bitfld.long 0x00 8. "            ENABLED_HS_U0            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS ENABLED HS U0" "0,1"
textline "                             "
bitfld.long 0x00 7. " RESET_HS_PROLOG          ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS PROLOG" "0,1"
bitfld.long 0x00 6. "         RESET_FS                 ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET FS" "0,1"
bitfld.long 0x00 5. "            RESET_HS_RXCHIRPJ        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS RXCHIRPJ" "0,1"
textline "                             "
bitfld.long 0x00 4. " RESET_HS_RXCHIRPK        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS RXCHIRPK" "0,1"
bitfld.long 0x00 3. "         RESET_HS_TXCHIRPK        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS RESET HS TXCHIRPK" "0,1"
bitfld.long 0x00 2. "            DISABLED_NONE            ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS DISABLED NONE" "0,1"
textline "                             "
bitfld.long 0x00 1. " DISCONNECTED_NONE        ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS DISCONNECTED NONE" "0,1"
bitfld.long 0x00 0. "         START_NONE               ,T XUSB DEV XHCI HSFSPI PVTPORTDBG STS START NONE" "0,1"
tree.end
textline "                             "
width 30.
group.long 0x600++0x03
line.long 0x00 "SSPI_HOSTCFG_START,T XUSB DEV XHCI SSPI HOSTCFG START"
group.long 0x7FC++0x03
line.long 0x00 "SSPI_HOSTCFG_END,T XUSB DEV XHCI SSPI HOSTCFG END"
tree "PERFMON registers"
group.long 0x800++0x2F
line.long 0x00 "READ_CUMLATENCY_REG0,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0"
bitfld.long 0x00 31. " EN                     ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 EN" "Init,"
hexmask.long.word 0x00 16.--30. 1. "  PKTS                   ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 PKTS"
hexmask.long.word 0x00 0.--15. 1. "    CYCLESHI ,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG0 CYCLESHI"
line.long 0x04 "READ_CUMLATENCY_REG1,T XUSB DEV XHCI PERFMON READ CUMLATENCY REG1"
line.long 0x08 "READ_LATENCY,T XUSB DEV XHCI PERFMON READ LATENCY"
hexmask.long.word 0x08 16.--31. 1. " READ_LATENCY_MINCYCLES ,T XUSB DEV XHCI PERFMON READ LATENCY MINCYCLES"
hexmask.long.word 0x08 0.--15. 1. "  READ_LATENCY_MAXCYCLES ,T XUSB DEV XHCI PERFMON READ LATENCY MAXCYCLES"
line.long 0x0C "READ_HISTOGRAM_BOUNDARY_REG0,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0"
hexmask.long.word 0x0C 16.--31. 1. " B                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0 B"
hexmask.long.word 0x0C 0.--15. 1. "  A                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG0 A"
line.long 0x10 "READ_HISTOGRAM_BOUNDARY_REG1,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1"
hexmask.long.word 0x10 16.--31. 1. " D                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1 D"
hexmask.long.word 0x10 0.--15. 1. "  C                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BOUNDARY REG1 C"
line.long 0x14 "READ_HISTOGRAM_BUCKET_REG0,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0"
hexmask.long.word 0x14 16.--31. 1. " 1                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0 1"
hexmask.long.word 0x14 0.--15. 1. "  0                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG0 0"
line.long 0x18 "READ_HISTOGRAM_BUCKET_REG1,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1"
hexmask.long.word 0x18 16.--31. 1. " 3                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1 3"
hexmask.long.word 0x18 0.--15. 1. "  2                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG1 2"
line.long 0x1C "READ_HISTOGRAM_BUCKET_REG2,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG2"
hexmask.long.word 0x1C 0.--15. 1. " 4                      ,T XUSB DEV XHCI PERFMON READ HISTOGRAM BUCKET REG2 4"
line.long 0x20 "BI_CTRL,T XUSB DEV XHCI PERFMON BI CTRL"
bitfld.long 0x20 31. " EN                     ,T XUSB DEV XHCI PERFMON BI CTRL EN" "Init,?..."
line.long 0x24 "BI_EPTRB,T XUSB DEV XHCI PERFMON BI EPTRB"
hexmask.long.word 0x24 16.--24. 1. " TRB                    ,T XUSB DEV XHCI PERFMON BI EPTRB TRB"
hexmask.long.byte 0x24 8.--15. 1. "  EPSYSMEM               ,T XUSB DEV XHCI PERFMON BI EPTRB EPSYSMEM"
line.long 0x28 "BI_DATA_OUT,T XUSB DEV XHCI PERFMON BI DATA OUT"
hexmask.long.byte 0x28 24.--31. 1. " REQCOUNT               ,T XUSB DEV XHCI PERFMON BI DATA OUT REQCOUNT"
hexmask.long.tbyte 0x28 0.--23. 1. "    SIZE                   ,T XUSB DEV XHCI PERFMON BI DATA OUT SIZE"
line.long 0x2C "BI_DATA_IN,T XUSB DEV XHCI PERFMON BI DATA IN"
hexmask.long.byte 0x2C 24.--31. 1. " REQCOUNT               ,T XUSB DEV XHCI PERFMON BI DATA IN REQCOUNT"
hexmask.long.tbyte 0x2C 0.--23. 1. "    SIZE                   ,T XUSB DEV XHCI PERFMON BI DATA IN SIZE"
tree.end
textline "                                       "
group.long 0x840++0x03
line.long 0x00 "BLCG,T XUSB DEV XHCI BLCG"
bitfld.long 0x00 30. " OVRD_SS_PI_500M        ,T XUSB DEV XHCI BLCG OVRD SS PI 500M" "Disabled,Enabled"
bitfld.long 0x00 29. "  OVRD_SS_PI             ,T XUSB DEV XHCI BLCG OVRD SS PI" "Disabled,Enabled"
bitfld.long 0x00 28. "  OVRD_IOPLL_3_PWRDN       ,T XUSB DEV XHCI BLCG OVRD IOPLL 3 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 27. " OVRD_IOPLL_2_PWRDN     ,T XUSB DEV XHCI BLCG OVRD IOPLL 2 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 26. "  OVRD_IOPLL_1_PWRDN     ,T XUSB DEV XHCI BLCG OVRD IOPLL 1 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 25. "  OVRD_IOPLL_0_PWRDN       ,T XUSB DEV XHCI BLCG OVRD IOPLL 0 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 24. " OVRD_COREPLL_PWRDN     ,T XUSB DEV XHCI BLCG OVRD COREPLL PWRDN" "Disabled,Enabled"
bitfld.long 0x00 23. "  OVRD_NVWRAP_48M        ,T XUSB DEV XHCI BLCG OVRD NVWRAP 48M" "Disabled,Enabled"
bitfld.long 0x00 22. "  OVRD_NVWRAP_480M         ,T XUSB DEV XHCI BLCG OVRD NVWRAP 480M" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 21. " OVRD_HSFS_PI           ,T XUSB DEV XHCI BLCG OVRD HSFS PI" "Disabled,Enabled"
bitfld.long 0x00 20. "  OVRD_PICLK_BI          ,T XUSB DEV XHCI BLCG OVRD PICLK BI" "Disabled,Enabled"
bitfld.long 0x00 19. "  OVRD_CORE_BI             ,T XUSB DEV XHCI BLCG OVRD CORE BI" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 18. " OVRD_FE                ,T XUSB DEV XHCI BLCG OVRD FE" "Disabled,Enabled"
bitfld.long 0x00 17. "  OVRD_UFPCI             ,T XUSB DEV XHCI BLCG OVRD UFPCI" "Disabled,Enabled"
bitfld.long 0x00 16. "  OVRD_DFPCI               ,T XUSB DEV XHCI BLCG OVRD DFPCI" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 14. " SS_PI_500M             ,T XUSB DEV XHCI BLCG SS PI 500M" "Disabled,Enabled"
bitfld.long 0x00 13. "  SS_PI                  ,T XUSB DEV XHCI BLCG SS PI" "Disabled,Enabled"
bitfld.long 0x00 12. "  IOPLL_3_PWRDN            ,T XUSB DEV XHCI BLCG IOPLL 3 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " IOPLL_2_PWRDN          ,T XUSB DEV XHCI BLCG IOPLL 2 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 10. "  IOPLL_1_PWRDN          ,T XUSB DEV XHCI BLCG IOPLL 1 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 9. "  IOPLL_0_PWRDN            ,T XUSB DEV XHCI BLCG IOPLL 0 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " COREPLL_PWRDN          ,T XUSB DEV XHCI BLCG COREPLL PWRDN" "Disabled,Enabled"
bitfld.long 0x00 7. "  NVWRAP_48M             ,T XUSB DEV XHCI BLCG NVWRAP 48M" "Disabled,Enabled"
bitfld.long 0x00 6. "  NVWRAP_480M              ,T XUSB DEV XHCI BLCG NVWRAP 480M" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " HSFS_PI                ,T XUSB DEV XHCI BLCG HSFS PI" "Disabled,Enabled"
bitfld.long 0x00 4. "  PICLK_BI               ,T XUSB DEV XHCI BLCG PICLK BI" "Disabled,Enabled"
bitfld.long 0x00 3. "  CORE_BI                  ,T XUSB DEV XHCI BLCG CORE BI" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 2. " FE                     ,T XUSB DEV XHCI BLCG FE" "Disabled,Enabled"
bitfld.long 0x00 1. "  UFPCI                  ,T XUSB DEV XHCI BLCG UFPCI" "Disabled,Enabled"
bitfld.long 0x00 0. "  DFPCI                    ,T XUSB DEV XHCI BLCG DFPCI" "Disabled,Enabled"
rgroup.long 0x844++0x03
line.long 0x00 "BLCG_STS,T XUSB DEV XHCI BLCG STS"
bitfld.long 0x00 14. " SS_PI_500M             ,T XUSB DEV XHCI BLCG STS SS PI 500M" "Disabled,Enabled"
bitfld.long 0x00 13. "  SS_PI                  ,T XUSB DEV XHCI BLCG STS SS PI" "Disabled,Enabled"
bitfld.long 0x00 12. "  IOPLL_3_PWRDN            ,T XUSB DEV XHCI BLCG STS IOPLL 3 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " IOPLL_2_PWRDN          ,T XUSB DEV XHCI BLCG STS IOPLL 2 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 10. "  IOPLL_1_PWRDN          ,T XUSB DEV XHCI BLCG STS IOPLL 1 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 9. "  IOPLL_0_PWRDN            ,T XUSB DEV XHCI BLCG STS IOPLL 0 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " COREPLL_PWRDN          ,T XUSB DEV XHCI BLCG STS COREPLL PWRDN" "Disabled,Enabled"
bitfld.long 0x00 7. "  NVWRAP_48M             ,T XUSB DEV XHCI BLCG STS NVWRAP 48M" "Disabled,Enabled"
bitfld.long 0x00 6. "  NVWRAP_480M              ,T XUSB DEV XHCI BLCG STS NVWRAP 480M" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " HSFS_PI                ,T XUSB DEV XHCI BLCG STS HSFS PI" "Disabled,Enabled"
bitfld.long 0x00 4. "  PICLK_BI               ,T XUSB DEV XHCI BLCG STS PICLK BI" "Disabled,Enabled"
bitfld.long 0x00 3. "  CORE_BI                  ,T XUSB DEV XHCI BLCG STS CORE BI" "Disabled,Enabled"
group.long 0x848++0x03
line.long 0x00 "BLCG_INTR,T XUSB DEV XHCI BLCG INTR"
bitfld.long 0x00 28. " IOPLL_3_PWRDN          ,T XUSB DEV XHCI BLCG INTR STS IOPLL 3 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 27. "  IOPLL_2_PWRDN          ,T XUSB DEV XHCI BLCG INTR STS IOPLL 2 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 26. "  IOPLL_1_PWRDN            ,T XUSB DEV XHCI BLCG INTR STS IOPLL 1 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 25. " IOPLL_0_PWRDN          ,T XUSB DEV XHCI BLCG INTR STS IOPLL 0 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 24. "  COREPLL_PWRDN          ,T XUSB DEV XHCI BLCG INTR STS COREPLL PWRDN" "Disabled,Enabled"
bitfld.long 0x00 12. "  IOPLL_3_PWRDN            ,T XUSB DEV XHCI BLCG INTR IOPLL 3 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " IOPLL_2_PWRDN          ,T XUSB DEV XHCI BLCG INTR IOPLL 2 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 10. "  IOPLL_1_PWRDN          ,T XUSB DEV XHCI BLCG INTR IOPLL 1 PWRDN" "Disabled,Enabled"
bitfld.long 0x00 9. "  IOPLL_0_PWRDN            ,T XUSB DEV XHCI BLCG INTR IOPLL 0 PWRDN" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 8. " COREPLL_PWRDN          ,T XUSB DEV XHCI BLCG INTR COREPLL PWRDN" "Disabled,Enabled"
bitfld.long 0x00 0. "  TGT                    ,T XUSB DEV XHCI BLCG INTR TGT" "SMI,PME"
group.long 0x850++0x0F
line.long 0x00 "CFG_DEVBI,T XUSB DEV XHCI CFG DEVBI"
bitfld.long 0x00 29. " ISOCH_SKIP_SIA         ,T XUSB DEV XHCI CFG DEVBI ISOCH SKIP SIA" ",Init"
bitfld.long 0x00 24.--28. "      DMA_RD_MAX_ALOM        ,T XUSB DEV XHCI CFG DEVBI DMA RD MAX ALOM" ",,,,,,,,,,Init,?..."
hexmask.long.byte 0x00 16.--23. 1. "      CNT_250NS                ,T XUSB DEV XHCI CFG DEVBI CNT 250NS"
textline "                                       "
bitfld.long 0x00 14. " TRBFETCH_RDPASSPW      ,T XUSB DEV XHCI CFG DEVBI TRBFETCH RDPASSPW" "Init,?..."
bitfld.long 0x00 13. "      ASYNC_EP_IDLE          ,T XUSB DEV XHCI CFG DEVBI ASYNC EP IDLE" ",Init"
bitfld.long 0x00 12. "      LOCAL_ROTATE             ,T XUSB DEV XHCI CFG DEVBI LOCAL ROTATE" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 11. " TRBFETCH_RINGEND_CHK   ,T XUSB DEV XHCI CFG DEVBI TRBFETCH RINGEND CHK" ",Enabled"
bitfld.long 0x00 9.--10. "   TRBFETCH_NUMSKIP       ,T XUSB DEV XHCI CFG DEVBI TRBFETCH NUMSKIP" ",Init,?..."
bitfld.long 0x00 8. "      TRBFETCH_IDT_IN          ,T XUSB DEV XHCI CFG DEVBI TRBFETCH IDT IN" "Init,?..."
textline "                                       "
bitfld.long 0x00 7. " DMA_WR_UPSTREAM_RO     ,T XUSB DEV XHCI CFG DEVBI DMA WR UPSTREAM RO" ",Init"
bitfld.long 0x00 6. "      DMA_RD_UPSTREAM_RO     ,T XUSB DEV XHCI CFG DEVBI DMA RD UPSTREAM RO" ",Init"
bitfld.long 0x00 5. "      DMA_RD_UPSTREAM_RDPASSPW ,T XUSB DEV XHCI CFG DEVBI DMA RD UPSTREAM RDPASSPW" "Init,?..."
textline "                                       "
bitfld.long 0x00 0.--4. " DMA_WR_MAX_ALOM        ,T XUSB DEV XHCI CFG DEVBI DMA WR MAX ALOM" ",,,Init,?..."
line.long 0x04 "CFG_DEVBI_UPSTREAM,T XUSB DEV XHCI CFG DEVBI UPSTREAM"
hexmask.long.byte 0x04 16.--23. 1. " DMA_RD_LIMIT           ,T XUSB DEV XHCI CFG DEVBI UPSTREAM DMA RD LIMIT"
bitfld.long 0x04 11. "        EPLOGIC_RDPASSPW       ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC RDPASSPW" "Init,?..."
bitfld.long 0x04 10. "      EPLOGIC_RO               ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC RO" "Init,?..."
textline "                                       "
bitfld.long 0x04 9. " EPLOGIC_NS             ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC NS" "Init,?..."
bitfld.long 0x04 8. "      EPLOGIC_TC             ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EPLOGIC TC" "Init,?..."
bitfld.long 0x04 2. "      EVENTQ_RO                ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ RO" "Init,?..."
textline "                                       "
bitfld.long 0x04 1. " EVENTQ_NS              ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ NS" "Init,?..."
bitfld.long 0x04 0. "      EVENTQ_TC              ,T XUSB DEV XHCI CFG DEVBI UPSTREAM EVENTQ TC" "Init,?..."
line.long 0x08 "CFG_DEV_SSPI_XFER,T XUSB DEV XHCI CFG DEV SSPI XFER"
line.long 0x0C "CFG_DEV_FE,T XUSB DEV XHCI CFG DEV FE"
bitfld.long 0x0C 29. " INFINITE_SS_RETRY      ,T XUSB DEV XHCI CFG DEV FE INFINITE SS RETRY" "Disabled,Enabled"
bitfld.long 0x0C 28. "  EN_PRIME_EVENT         ,T XUSB DEV XHCI CFG DEV FE EN PRIME EVENT" ",Init"
bitfld.long 0x0C 27. "      FEATURE_LPM              ,T XUSB DEV XHCI CFG DEV FE FEATURE LPM" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x0C 26. " EN_STALL_EVENT         ,T XUSB DEV XHCI CFG DEV FE EN STALL EVENT" "Init,?..."
bitfld.long 0x0C 25. "      PORTDISCON_RST_HW      ,T XUSB DEV XHCI CFG DEV FE PORTDISCON RST HW" ",Init"
bitfld.long 0x0C 24. "      CTX_RESTORE              ,T XUSB DEV XHCI CFG DEV FE CTX RESTORE" "Init,?..."
textline "                                       "
hexmask.long.tbyte 0x0C 4.--23. 1. " MFCOUNT_MIN            ,T XUSB DEV XHCI CFG DEV FE MFCOUNT MIN"
bitfld.long 0x0C 3. "    PORTRST_HW             ,T XUSB DEV XHCI CFG DEV FE PORTRST HW" ",Init"
bitfld.long 0x0C 2. "      SEQNUM_INIT              ,T XUSB DEV XHCI CFG DEV FE SEQNUM INIT" ",Init"
textline "                                       "
bitfld.long 0x0C 0.--1. " PORTREGSEL             ,T XUSB DEV XHCI CFG DEV FE PORTREGSEL" "Init,SS,HSFS,?..."
rgroup.long 0x860++0x03
line.long 0x00 "CFG_IDLE,T XUSB DEV XHCI CFG IDLE"
bitfld.long 0x00 4. " DEV_SS_PI              ,T XUSB DEV XHCI CFG IDLE DEV SS PI" "0,1"
bitfld.long 0x00 3. "         DEV_FS_NVWRAP          ,T XUSB DEV XHCI CFG IDLE DEV FS NVWRAP" "0,1"
bitfld.long 0x00 2. "         DEV_HS_NVWRAP            ,T XUSB DEV XHCI CFG IDLE DEV HS NVWRAP" "0,1"
textline "                                       "
bitfld.long 0x00 1. " DEV_HSFS_PI            ,T XUSB DEV XHCI CFG IDLE DEV HSFS PI" "0,1"
bitfld.long 0x00 0. "         DEV_BI                 ,T XUSB DEV XHCI CFG IDLE DEV BI" "0,1"
group.long 0x864++0x0F
line.long 0x00 "CFG_SSXFER,T XUSB DEV XHCI CFG SSXFER"
line.long 0x04 "CFG_SSXFER1,T XUSB DEV XHCI CFG SSXFER1"
hexmask.long.word 0x04 0.--15. 1. " PINGTIMER              ,T XUSB DEV XHCI CFG SSXFER1 PINGTIMER"
line.long 0x08 "CFG_SPARE0,T XUSB DEV XHCI CFG SPARE0"
line.long 0x0C "CFG_SPARE1,T XUSB DEV XHCI CFG SPARE1"
width 0x0B
tree.end
tree "AO Registers"
base ad:0x03540000
width 26.
group.long 0x00++0x07
line.long 0x00 "GATE_0,XUSB AO GATE 0"
bitfld.long 0x00 1. " DBNS                 ,DBNS" "Off,On"
bitfld.long 0x00 0. "           WAKE                 ,WAKE" "Off,On"
line.long 0x04 "USB_DEBOUNCE_DEL_0,XUSB AO USB DEBOUNCE DEL 0"
bitfld.long 0x04 4.--7. " UHSIC_LINE_DEB_CNT   ,Number of 32kHz debounce cycles for UHSIC port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            UTMIP_LINE_DEB_CNT   ,Number of 32kHz debounce cycles for UTMIP port 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x40++0x0B
line.long 0x00 "UTMIP_TRIGGERS_0,XUSB AO UTMIP TRIGGERS 0"
bitfld.long 0x00 3. " CLR_WAKE_ALARM       ,Clear wake event" "Null,Trigger"
bitfld.long 0x00 2. "       FORCE_WALK           ,Force pointer walk" "Null,Trigger"
bitfld.long 0x00 1. "       CAP_CFG            ,Capture pad configuration" "Null,Trigger"
textline "                                   "
bitfld.long 0x00 0. " CLR_WALK_PTR         ,Clear sleep walk pointer" "Null,Trigger"
line.long 0x04 "UTMIP_TRIGGERS_1,XUSB AO UTMIP TRIGGERS 1"
bitfld.long 0x04 3. " CLR_WAKE_ALARM       ,Clear wake event" "Null,Trigger"
bitfld.long 0x04 2. "       FORCE_WALK           ,Force pointer walk" "Null,Trigger"
bitfld.long 0x04 1. "       CAP_CFG            ,Capture pad configuration" "Null,Trigger"
textline "                                   "
bitfld.long 0x04 0. " CLR_WALK_PTR         ,Clear sleep walk pointer" "Null,Trigger"
line.long 0x08 "UTMIP_TRIGGERS_2,XUSB AO UTMIP TRIGGERS 2"
bitfld.long 0x08 3. " CLR_WAKE_ALARM       ,Clear wake event" "Null,Trigger"
bitfld.long 0x08 2. "       FORCE_WALK           ,Force pointer walk" "Null,Trigger"
bitfld.long 0x08 1. "       CAP_CFG            ,Capture pad configuration" "Null,Trigger"
textline "                                   "
bitfld.long 0x08 0. " CLR_WALK_PTR         ,Clear sleep walk pointer" "Null,Trigger"
group.long 0x60++0x03
line.long 0x00 "UHSIC_TRIGGERS_0,Triggers For HSIC Ports"
bitfld.long 0x00 4. " CAP_CFG              ,Capture pad configuration" "Null,Trigger"
bitfld.long 0x00 3. "       CLR_WAKE_ALARM       ,Clear wake event" "Null,Trigger"
bitfld.long 0x00 2. "       FORCE_WALK         ,Force pointer walk" "Null,Trigger"
textline "                                   "
bitfld.long 0x00 0. " CLR_WALK_PTR         ,Clear sleep walk pointer" "Null,Trigger"
group.long 0x70++0x0B
line.long 0x00 "UTMIP_SAVED_STATE_0,XUSB AO UTMIP SAVED STATE 0"
bitfld.long 0x00 7. " WAKE_EX              ,Wakeup on anything Anything except a Particular Line Value" "Off,On"
bitfld.long 0x00 6. "           IGNORE_MASTER_CFG    ,IGNORE MASTER CFG" "Not ignored,Ignored"
bitfld.long 0x00 2.--5. "   SCRATCH            ,SCRATCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 0.--1. " SPEED                ,UTMIP Speed prior to DPD" "HS,FS,LS,RST"
line.long 0x04 "UTMIP_SAVED_STATE_1,XUSB AO UTMIP SAVED STATE 1"
bitfld.long 0x04 7. " WAKE_EX              ,Wakeup on anything except a Particular Line Value" "Off,On"
bitfld.long 0x04 6. "           IGNORE_MASTER_CFG    ,IGNORE MASTER CFG" "Not ignored,Ignored"
bitfld.long 0x04 2.--5. "   SCRATCH            ,SCRATCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 0.--1. " SPEED                ,UTMIP Speed prior to DPD" "HS,FS,LS,RST"
line.long 0x08 "UTMIP_SAVED_STATE_2,XUSB AO UTMIP SAVED STATE 2"
bitfld.long 0x08 7. " WAKE_EX              ,Wakeup on anything Anything except a Particular Line Value" "Off,On"
bitfld.long 0x08 6. "           IGNORE_MASTER_CFG    ,IGNORE MASTER CFG" "Not ignored,Ignored"
bitfld.long 0x08 2.--5. "   SCRATCH            ,SCRATCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x08 0.--1. " SPEED                ,UTMIP Speed prior to DPD" "HS,FS,LS,RST"
group.long 0x90++0x03
line.long 0x00 "UHSIC_SAVED_STATE_0,XUSB AO UHSIC SAVED STATE 0"
bitfld.long 0x00 7. " WAKE_EX              ,Wakeup on anything Anything except a Particular Line Value" "Off,On"
bitfld.long 0x00 6. "           IGNORE_MASTER_CFG    ,IGNORE_MASTER_CFG" "Not ignored,Ignored"
bitfld.long 0x00 1.--5. "   SCRATCH            ,SCRATCH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x00 0. " MODE                 ,UHSIC Speed prior to DPD" "HS,RST"
rgroup.long 0xA0++0x0B
line.long 0x00 "UTMIP_SLEEPWALK_STATUS_0,XUSB AO UTMIP SLEEPWALK STATUS 0"
bitfld.long 0x00 4. " WAKE_ALARM           ,A wake event occurred on UTMIP port 0" "Not occurred,Occurred"
bitfld.long 0x00 3. "  USBON_VAL            ,Value of D- line detector for UTMIP port 0" "0,1"
bitfld.long 0x00 2. "             USBOP_VAL          ,Value of D+ line detector for UTMIP port 0" "0,1"
textline "                                   "
bitfld.long 0x00 0.--1. " WALK_PTR             ,Walk pointer for UMTIP port 0" "0,1,2,3"
line.long 0x04 "UTMIP_SLEEPWALK_STATUS_1,XUSB AO UTMIP SLEEPWALK STATUS 1"
bitfld.long 0x04 4. " WAKE_ALARM           ,A wake event occurred on UTMIP port 0" "Not occurred,Occurred"
bitfld.long 0x04 3. "  USBON_VAL            ,Value of D- line detector for UTMIP port 0" "0,1"
bitfld.long 0x04 2. "             USBOP_VAL          ,Value of D+ line detector for UTMIP port 0" "0,1"
textline "                                   "
bitfld.long 0x04 0.--1. " WALK_PTR             ,Walk pointer for UMTIP port 0" "0,1,2,3"
line.long 0x08 "UTMIP_SLEEPWALK_STATUS_2,XUSB AO UTMIP SLEEPWALK STATUS 2"
bitfld.long 0x08 4. " WAKE_ALARM           ,A wake event occurred on UTMIP port 0" "Not occurred,Occurred"
bitfld.long 0x08 3. "  USBON_VAL            ,Value of D- line detector for UTMIP port 0" "0,1"
bitfld.long 0x08 2. "             USBOP_VAL          ,Value of D+ line detector for UTMIP port 0" "0,1"
textline "                                   "
bitfld.long 0x08 0.--1. " WALK_PTR             ,Walk pointer for UMTIP port 0" "0,1,2,3"
rgroup.long 0xC0++0x03
line.long 0x00 "UHSIC_SLEEPWALK_STATUS_0,XUSB AO UHSIC SLEEPWALK STATUS 0"
bitfld.long 0x00 4. " WAKE_ALARM           ,A wake event occurred on UHSIC port" "Not occurred,Occurred"
bitfld.long 0x00 3. "  DATA0_VAL            ,Value of DATA0 line detector for UHSIC port" "0,1"
bitfld.long 0x00 2. "             STROBE_VAL         ,Value of STROBE line detector for UHSIC port" "0,1"
textline "                                   "
bitfld.long 0x00 0.--1. " WALK_PTR             ,Walk pointer for UHSIC port" "0,1,2,3"
group.long 0xD0++0x0B
line.long 0x00 "UTMIP_SLEEPWALK_CFG_0,XUSB AO UTMIP SLEEPWALK CFG 0"
bitfld.long 0x00 22. " MASTER_CFG_SEL       ,Enables low power mode" "Disabled,Enabled"
bitfld.long 0x00 21. "      LINE_WAKEUP_EN       ,Enables latching line wakeup event" "Disabled,Enabled"
bitfld.long 0x00 17.--20. "      WAKE_VAL           ,Line value Wake Up condition on UTMIP" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,NONE,DMEDGE,DPEDGE,ANY"
textline "                                   "
bitfld.long 0x00 16. " LINEVAL_WALK_EN      ,Perform Walk on USB line value wake up for UTMIP" "Disabled,Enabled"
bitfld.long 0x00 15. "      MASTER_ENABLE        ,Enable use of master pins on UTMIP" "Disabled,Enabled"
bitfld.long 0x00 14. "      WAKE_WALK_EN       ,Perform Walk on any chip wake up event for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 13. " GPIO_WALK_EN         ,Perform Walk on associated event for UTMIP" "Disabled,Enabled"
bitfld.long 0x00 8.--12. "      DESIGNATED_GPIO      ,GPIO Number associated with UTMIP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 3. "            FAKE_USBON_EN      ,Enable the fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " FAKE_USBOP_EN        ,Enable the fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x00 1. "      FAKE_USBON_VAL       ,Fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x00 0. "      FAKE_USBOP_VAL     ,Fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
line.long 0x04 "UTMIP_SLEEPWALK_CFG_1,XUSB AO UTMIP SLEEPWALK CFG 1"
bitfld.long 0x04 22. " MASTER_CFG_SEL       ,Enables low power mode" "Disabled,Enabled"
bitfld.long 0x04 21. "      LINE_WAKEUP_EN       ,Enables latching line wakeup event" "Disabled,Enabled"
bitfld.long 0x04 17.--20. "      WAKE_VAL           ,Line value Wake Up condition on UTMIP" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,NONE,DMEDGE,DPEDGE,ANY"
textline "                                   "
bitfld.long 0x04 16. " LINEVAL_WALK_EN      ,Perform Walk on USB line value wake up for UTMIP" "Disabled,Enabled"
bitfld.long 0x04 15. "      MASTER_ENABLE        ,Enable use of master pins on UTMIP" "Disabled,Enabled"
bitfld.long 0x04 14. "      WAKE_WALK_EN       ,Perform Walk on any chip wake up event for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 13. " GPIO_WALK_EN         ,Perform Walk on associated event for UTMIP" "Disabled,Enabled"
bitfld.long 0x04 8.--12. "      DESIGNATED_GPIO      ,GPIO Number associated with UTMIP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 3. "            FAKE_USBON_EN      ,Enable the fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 2. " FAKE_USBOP_EN        ,Enable the fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x04 1. "      FAKE_USBON_VAL       ,Fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x04 0. "      FAKE_USBOP_VAL     ,Fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
line.long 0x08 "UTMIP_SLEEPWALK_CFG_2,XUSB AO UTMIP SLEEPWALK CFG 2"
bitfld.long 0x08 22. " MASTER_CFG_SEL       ,Enables low power mode" "Disabled,Enabled"
bitfld.long 0x08 21. "      LINE_WAKEUP_EN       ,Enables latching line wakeup event" "Disabled,Enabled"
bitfld.long 0x08 17.--20. "      WAKE_VAL           ,Line value Wake Up condition on UTMIP" "SE0,FSK,FSJ,SE1,DM0,DM1,,,DP0,,DP1,,NONE,DMEDGE,DPEDGE,ANY"
textline "                                   "
bitfld.long 0x08 16. " LINEVAL_WALK_EN      ,Perform Walk on USB line value wake up for UTMIP" "Disabled,Enabled"
bitfld.long 0x08 15. "      MASTER_ENABLE        ,Enable use of master pins on UTMIP" "Disabled,Enabled"
bitfld.long 0x08 14. "      WAKE_WALK_EN       ,Perform Walk on any chip wake up event for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x08 13. " GPIO_WALK_EN         ,Perform Walk on associated GPIO event for UTMIP" "Disabled,Enabled"
bitfld.long 0x08 8.--12. "      DESIGNATED_GPIO      ,GPIO Number associated with UTMIP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 3. "            FAKE_USBON_EN      ,Enable the fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x08 2. " FAKE_USBOP_EN        ,Enable the fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x08 1. "      FAKE_USBON_VAL       ,Fake line value for D- for the PMC pad macro for UTMIP" "Disabled,Enabled"
bitfld.long 0x08 0. "      FAKE_USBOP_VAL     ,Fake line value for D+ for the PMC pad macro for UTMIP" "Disabled,Enabled"
group.long 0xF0++0x03
line.long 0x00 "UHSIC_SLEEPWALK_CFG_0,XUSB AO UHSIC SLEEPWALK CFG 0"
bitfld.long 0x00 22. " MASTER_CFG_SEL       ,Enables low power mode" "Disabled,Enabled"
bitfld.long 0x00 21. "      LINE_WAKEUP_EN       ,Enables latching line wakeup event" "Disabled,Enabled"
bitfld.long 0x00 17.--20. "      WAKE_VAL           ,Line value Wake Up condition on UHSIC P1" "DS00,DS01,DS10,DS11,S0,D1,,,D0,,S1,,NONE,DEDGE,SEDGE,ANY"
textline "                                   "
bitfld.long 0x00 16. " LINEVAL_WALK_EN      ,Perform Walk on USB line value wake up for UHSIC P1" "Disabled,Enabled"
bitfld.long 0x00 15. "      MASTER_ENABLE        ,Enable use of master pins on UTMIP P2" "Disabled,Enabled"
bitfld.long 0x00 14. "      WAKE_WALK_EN       ,Perform Walk on any chip wake up event for UHSIC P1" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 13. " GPIO_WALK_EN         ,Perform Walk on associated GPIO event for UHSIC P1" "Disabled,Enabled"
bitfld.long 0x00 8.--12. "      DESIGNATED_GPIO      ,GPIO Number associated with UHSIC P1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 3. "            FAKE_DATA_EN       ,Enable the fake line value for DATA for the PMC pad macro for UHSIC P0" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " FAKE_STROBE_EN       ,Enable the fake line value for STROBE for the PMC pad macro for UHSIC P0" "Disabled,Enabled"
bitfld.long 0x00 1. "      FAKE_DATA_VAL        ,Fake line value for DATA for the PMC pad macro for UHSIC P0" "Disabled,Enabled"
bitfld.long 0x00 0. "      FAKE_STROBE_VAL    ,Fake line value for STROBE for the PMC pad macro for UHSIC P0" "Disabled,Enabled"
group.long 0x100++0x0B
line.long 0x00 "UTMIP_SLEEPWALK_0,XUSB AO UTMIP SLEEPWALK 0"
bitfld.long 0x00 30. " HIGHZ_D              ,Phase D enable single ended drivers" "Disabled,Enabled"
bitfld.long 0x00 29. "      AN_D                 ,Phase D drive single ended value on D- line" "0,1"
bitfld.long 0x00 28. "             AP_D               ,Phase D drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x00 27. " USBON_RPU_D          ,Phase D 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x00 26. "             USBOP_RPU_D          ,Phase D 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x00 25. "             USBON_RPD_D        ,Phase D 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x00 24. " USBOP_RPD_D          ,Phase D 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x00 22. "             HIGHZ_C              ,Phase C enable single ended drivers" "0,1"
bitfld.long 0x00 21. "             AN_C               ,Phase C drive single ended value on D- line" "0,1"
textline "                                   "
bitfld.long 0x00 20. " AP_C                 ,Phase C drive single ended value on D+ line" "0,1"
bitfld.long 0x00 19. "             USBON_RPU_C          ,Phase C 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x00 18. "             USBOP_RPU_C        ,Phase C 1.5kOhm pull up on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x00 17. " USBON_RPD_C          ,Phase C 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x00 16. "             USBOP_RPD_C          ,Phase C 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x00 14. "             HIGHZ_B            ,Phase B enable single ended drivers" "0,1"
textline "                                   "
bitfld.long 0x00 13. " AN_B                 ,Phase B drive single ended value on D- line" "0,1"
bitfld.long 0x00 12. "             AP_B                 ,Phase B drive single ended value on D+ line" "0,1"
bitfld.long 0x00 11. "             USBON_RPU_B        ,Phase B 1.5kOhm pull up on D- Line" "0,1"
textline "                                   "
bitfld.long 0x00 10. " USBOP_RPU_B          ,Phase B 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x00 9. "             USBON_RPD_B          ,Phase B 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x00 8. "             USBOP_RPD_B        ,Phase B 15kOhm pull down on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x00 6. " HIGHZ_A              ,Phase A enable single ended drivers" "0,1"
bitfld.long 0x00 5. "             AN_A                 ,Phase A drive single ended value on D- line" "0,1"
bitfld.long 0x00 4. "             AP_A               ,Phase A drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x00 3. " USBON_RPU_A          ,Phase A 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x00 2. "             USBOP_RPU_A          ,Phase A 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x00 1. "             USBON_RPD_A        ,Phase A 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x00 0. " USBOP_RPD_A          ,Phase A 15kOhm pull down on D+ Line" "0,1"
line.long 0x04 "UTMIP_SLEEPWALK_4,XUSB AO UTMIP SLEEPWALK 4"
bitfld.long 0x04 30. " HIGHZ_D              ,Phase D enable single ended drivers" "Disabled,Enabled"
bitfld.long 0x04 29. "      AN_D                 ,Phase D drive single ended value on D- line" "0,1"
bitfld.long 0x04 28. "             AP_D               ,Phase D drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x04 27. " USBON_RPU_D          ,Phase D 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x04 26. "             USBOP_RPU_D          ,Phase D 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x04 25. "             USBON_RPD_D        ,Phase D 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x04 24. " USBOP_RPD_D          ,Phase D 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x04 22. "             HIGHZ_C              ,Phase C enable single ended drivers" "0,1"
bitfld.long 0x04 21. "             AN_C               ,Phase C drive single ended value on D- line" "0,1"
textline "                                   "
bitfld.long 0x04 20. " AP_C                 ,Phase C drive single ended value on D+ line" "0,1"
bitfld.long 0x04 19. "             USBON_RPU_C          ,Phase C 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x04 18. "             USBOP_RPU_C        ,Phase C 1.5kOhm pull up on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x04 17. " USBON_RPD_C          ,Phase C 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x04 16. "             USBOP_RPD_C          ,Phase C 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x04 14. "             HIGHZ_B            ,Phase B enable single ended drivers" "0,1"
textline "                                   "
bitfld.long 0x04 13. " AN_B                 ,Phase B drive single ended value on D- line" "0,1"
bitfld.long 0x04 12. "             AP_B                 ,Phase B drive single ended value on D+ line" "0,1"
bitfld.long 0x04 11. "             USBON_RPU_B        ,Phase B 1.5kOhm pull up on D- Line" "0,1"
textline "                                   "
bitfld.long 0x04 10. " USBOP_RPU_B          ,Phase B 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x04 9. "             USBON_RPD_B          ,Phase B 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x04 8. "             USBOP_RPD_B        ,Phase B 15kOhm pull down on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x04 6. " HIGHZ_A              ,Phase A enable single ended drivers" "0,1"
bitfld.long 0x04 5. "             AN_A                 ,Phase A drive single ended value on D- line" "0,1"
bitfld.long 0x04 4. "             AP_A               ,Phase A drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x04 3. " USBON_RPU_A          ,Phase A 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x04 2. "             USBOP_RPU_A          ,Phase A 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x04 1. "             USBON_RPD_A        ,Phase A 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x04 0. " USBOP_RPD_A          ,Phase A 15kOhm pull down on D+ Line" "0,1"
line.long 0x08 "UTMIP_SLEEPWALK_2,XUSB AO UTMIP SLEEPWALK 2"
bitfld.long 0x08 30. " HIGHZ_D              ,Phase D enable single ended drivers" "Disabled,Enabled"
bitfld.long 0x08 29. "      AN_D                 ,Phase D drive single ended value on D- line" "0,1"
bitfld.long 0x08 28. "             AP_D               ,Phase D drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x08 27. " USBON_RPU_D          ,Phase D 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x08 26. "             USBOP_RPU_D          ,Phase D 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x08 25. "             USBON_RPD_D        ,Phase D 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x08 24. " USBOP_RPD_D          ,Phase D 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x08 22. "             HIGHZ_C              ,Phase C enable single ended drivers" "0,1"
bitfld.long 0x08 21. "             AN_C               ,Phase C drive single ended value on D- line" "0,1"
textline "                                   "
bitfld.long 0x08 20. " AP_C                 ,Phase C drive single ended value on D+ line" "0,1"
bitfld.long 0x08 19. "             USBON_RPU_C          ,Phase C 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x08 18. "             USBOP_RPU_C        ,Phase C 1.5kOhm pull up on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x08 17. " USBON_RPD_C          ,Phase C 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x08 16. "             USBOP_RPD_C          ,Phase C 15kOhm pull down on D+ Line" "0,1"
bitfld.long 0x08 14. "             HIGHZ_B            ,Phase B enable single ended drivers" "0,1"
textline "                                   "
bitfld.long 0x08 13. " AN_B                 ,Phase B drive single ended value on D- line" "0,1"
bitfld.long 0x08 12. "             AP_B                 ,Phase B drive single ended value on D+ line" "0,1"
bitfld.long 0x08 11. "             USBON_RPU_B        ,Phase B 1.5kOhm pull up on D- Line" "0,1"
textline "                                   "
bitfld.long 0x08 10. " USBOP_RPU_B          ,Phase B 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x08 9. "             USBON_RPD_B          ,Phase B 15kOhm pull down on D- Line" "0,1"
bitfld.long 0x08 8. "             USBOP_RPD_B        ,Phase B 15kOhm pull down on D+ Line" "0,1"
textline "                                   "
bitfld.long 0x08 6. " HIGHZ_A              ,Phase A enable single ended drivers" "0,1"
bitfld.long 0x08 5. "             AN_A                 ,Phase A drive single ended value on D- line" "0,1"
bitfld.long 0x08 4. "             AP_A               ,Phase A drive single ended value on D+ line" "0,1"
textline "                                   "
bitfld.long 0x08 3. " USBON_RPU_A          ,Phase A 1.5kOhm pull up on D- Line" "0,1"
bitfld.long 0x08 2. "             USBOP_RPU_A          ,Phase A 1.5kOhm pull up on D+ Line" "0,1"
bitfld.long 0x08 1. "             USBON_RPD_A        ,Phase A 15kOhm pull down on D- Line" "0,1"
textline "                                   "
bitfld.long 0x08 0. " USBOP_RPD_A          ,Phase A 15kOhm pull down on D+ Line" "0,1"
group.long 0x120++0x03
line.long 0x00 "UHSIC_SLEEPWALK_0,Signaling Sequence For UHSIC Port Wakeup"
bitfld.long 0x00 27. " UHSIC_RPU_DATA0_D    ,Phase D pull up on DATA0 line" "0,1"
bitfld.long 0x00 26. "             UHSIC_RPU_STROBE_D   ,Phase D pull up on STROBE line" "0,1"
bitfld.long 0x00 25. "             UHSIC_RPD_DATA0_D  ,Phase D pull down on DATA0 line" "0,1"
textline "                                   "
bitfld.long 0x00 24. " UHSIC_RPD_STROBE_D   ,Phase D pull down on STROBE line" "0,1"
bitfld.long 0x00 19. "             UHSIC_RPU_DATA0_C    ,Phase C pull up on DATA0 line" "0,1"
bitfld.long 0x00 18. "             UHSIC_RPU_STROBE_C ,Phase C pull up on STROBE line" "0,1"
textline "                                   "
bitfld.long 0x00 17. " UHSIC_RPD_DATA0_C    ,Phase C pull down on DATA0 line" "0,1"
bitfld.long 0x00 16. "             UHSIC_RPD_STROBE_C   ,Phase C pull down on STROBE line" "0,1"
bitfld.long 0x00 11. "             UHSIC_RPU_DATA0_B  ,Phase B Pull up on DATA0 Line" "0,1"
textline "                                   "
bitfld.long 0x00 10. " UHSIC_RPU_STROBE_B   ,Phase B pull up on STROBE line" "0,1"
bitfld.long 0x00 9. "             UHSIC_RPD_DATA0_B    ,Phase B pull down on DATA0 line" "0,1"
bitfld.long 0x00 8. "             UHSIC_RPD_STROBE_B ,Phase B pull down on STROBE line" "0,1"
textline "                                   "
bitfld.long 0x00 3. " UHSIC_RPU_DATA0_A    ,Phase A pull up on DATA0 line" "0,1"
bitfld.long 0x00 2. "             UHSIC_RPU_STROBE_A   ,Phase A pull Up on STROBE line" "0,1"
bitfld.long 0x00 1. "             UHSIC_RPD_DATA0_A  ,Phase A pull Down on DATA0 line" "0,1"
textline "                                   "
bitfld.long 0x00 0. " UHSIC_RPD_STROBE_A   ,Phase A pull down on STROBE line" "0,1"
group.long 0x130++0x0B
line.long 0x00 "UTMIP_PAD_CFG_0,XUSB AO UTMIP PAD CFG 0"
bitfld.long 0x00 11. " E_DPD_OVRD_VAL       ,E DPD OVRD VAL" "0,1"
bitfld.long 0x00 10. "             E_DPD_OVRD_EN        ,E DPD OVRD enable" "Disabled,Enabled"
bitfld.long 0x00 9. "      USBON_VAL_PD       ,Power Down D- USBOP_VAL receiver" "0,1"
textline "                                   "
bitfld.long 0x00 8. " USBOP_VAL_PD         ,Power Down D+ USBOP_VAL receiver" "0,1"
bitfld.long 0x00 7. "             VREG_USE_XUSB_AO     ,Use XUSB_AO Saved values for VREG pad inputs" "0,1"
bitfld.long 0x00 6. "             RPU_USE_XUSB_AO    ,Use XUSB_AO Saved RPU* pad input controls" "0,1"
textline "                                   "
bitfld.long 0x00 5. " RPD_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for RPD_CTRL" "0,1"
bitfld.long 0x00 4. "             TRK_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for TRK control inputs" "0,1"
bitfld.long 0x00 3. "             FSLS_USE_XUSB_AO   ,Use XUSB_AO Saved values for slew controls and spare" "0,1"
textline "                                   "
bitfld.long 0x00 2. " WEAKPD_ANYTIME       ,WEAKPD ANYTIME" "0,1"
bitfld.long 0x00 1. "             DP_WEAKPD_CFG        ,DP WEAKPD CFG" "0,1"
bitfld.long 0x00 0. "             DM_WEAKPD_CFG      ,DM WEAKPD CFG" "0,1"
line.long 0x04 "UTMIP_PAD_CFG_1,XUSB AO UTMIP PAD CFG 1"
bitfld.long 0x04 11. " E_DPD_OVRD_VAL       ,E DPD OVRD VAL" "0,1"
bitfld.long 0x04 10. "             E_DPD_OVRD_EN        ,E DPD OVRD enable" "Disabled,Enabled"
bitfld.long 0x04 9. "      USBON_VAL_PD       ,Power Down D- USBOP_VAL receiver" "0,1"
textline "                                   "
bitfld.long 0x04 8. " USBOP_VAL_PD         ,Power Down D+ USBOP_VAL receiver" "0,1"
bitfld.long 0x04 7. "             VREG_USE_XUSB_AO     ,Use XUSB_AO Saved values for VREG pad inputs" "0,1"
bitfld.long 0x04 6. "             RPU_USE_XUSB_AO    ,Use XUSB_AO Saved RPU* pad input controls" "0,1"
textline "                                   "
bitfld.long 0x04 5. " RPD_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for RPD_CTRL" "0,1"
bitfld.long 0x04 4. "             TRK_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for TRK control inputs" "0,1"
bitfld.long 0x04 3. "             FSLS_USE_XUSB_AO   ,Use XUSB_AO Saved values for slew controls and spare" "0,1"
textline "                                   "
bitfld.long 0x04 2. " WEAKPD_ANYTIME       ,WEAKPD ANYTIME" "0,1"
bitfld.long 0x04 1. "             DP_WEAKPD_CFG        ,DP WEAKPD CFG" "0,1"
bitfld.long 0x04 0. "             DM_WEAKPD_CFG      ,DM WEAKPD CFG" "0,1"
line.long 0x08 "UTMIP_PAD_CFG_2,XUSB AO UTMIP PAD CFG 2"
bitfld.long 0x08 11. " E_DPD_OVRD_VAL       ,E DPD OVRD VAL" "0,1"
bitfld.long 0x08 10. "             E_DPD_OVRD_EN        ,E DPD OVRD enable" "Disabled,Enabled"
bitfld.long 0x08 9. "      USBON_VAL_PD       ,Power Down D- USBOP_VAL receiver" "0,1"
textline "                                   "
bitfld.long 0x08 8. " USBOP_VAL_PD         ,Power Down D+ USBOP_VAL receiver" "0,1"
bitfld.long 0x08 7. "             VREG_USE_XUSB_AO     ,Use XUSB_AO Saved values for VREG pad inputs" "0,1"
bitfld.long 0x08 6. "             RPU_USE_XUSB_AO    ,Use XUSB_AO Saved RPU* pad input controls" "0,1"
textline "                                   "
bitfld.long 0x08 5. " RPD_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for RPD_CTRL" "0,1"
bitfld.long 0x08 4. "             TRK_CTRL_USE_XUSB_AO ,Use XUSB_AO Saved values for TRK control inputs" "0,1"
bitfld.long 0x08 3. "             FSLS_USE_XUSB_AO   ,Use XUSB_AO Saved values for slew controls and spare" "0,1"
textline "                                   "
bitfld.long 0x08 2. " WEAKPD_ANYTIME       ,WEAKPD ANYTIME" "0,1"
bitfld.long 0x08 1. "             DP_WEAKPD_CFG        ,DP WEAKPD CFG" "0,1"
bitfld.long 0x08 0. "             DM_WEAKPD_CFG      ,DM WEAKPD CFG" "0,1"
group.long 0x150++0x03
line.long 0x00 "UHSIC_PAD_CFG_0,XUSB AO UHSIC PAD CFG 0"
bitfld.long 0x00 6. " E_DPD_OVRD_VAL       ,E DPD OVRD VAL" "0,1"
bitfld.long 0x00 5. "             E_DPD_OVRD_EN        ,E DPD OVRD enable" "Disabled,Enabled"
bitfld.long 0x00 4. "      USE_XUSB_AO        ,Use XUSB AO saved values for RPU/RPD" "0,1"
textline "                                   "
bitfld.long 0x00 1. " DATA0_VAL_PD         ,Power Down DATA0_VAL receiver" "0,1"
bitfld.long 0x00 0. "             STROBE_VAL_PD        ,Power Down STROBE_VAL receiver" "0,1"
rgroup.long 0x160++0x0B
line.long 0x00 "UTMIP_PAD_STS_SAVED0_0,XUSB_AO_UTMIP_PAD_STS_SAVED0_0"
bitfld.long 0x00 29.--30. " VREG_DIR             ,VREG DIR" "0,1,2,3"
bitfld.long 0x00 28. "             PD_VREG              ,PD VREG" "0,1"
bitfld.long 0x00 27. "             RPU_HIGH_FIXED     ,RPU HIGH FIXED" "0,1"
textline "                                   "
bitfld.long 0x00 26. " RPU_AUTO_SWITCH_EN   ,RPU AUTO SWITCH enable" "Disabled,Enabled"
bitfld.long 0x00 25. "      RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x00 20.--24. "             RPD_CTRL           ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x00 16.--19. " SPARE_AO             ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "            LS_FSLEW             ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            LS_RSLEW           ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x00 4.--7. " FS_FSLEW             ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "            FS_RSLEW             ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "UTMIP_PAD_STS_SAVED0_1,XUSB AO UTMIP PAD STS SAVED0 1"
bitfld.long 0x04 29.--30. " VREG_DIR             ,VREG DIR" "0,1,2,3"
bitfld.long 0x04 28. "             PD_VREG              ,PD VREG" "0,1"
bitfld.long 0x04 27. "             RPU_HIGH_FIXED     ,RPU HIGH FIXED" "0,1"
textline "                                   "
bitfld.long 0x04 26. " RPU_AUTO_SWITCH_EN   ,RPU AUTO SWITCH enable" "Disabled,Enabled"
bitfld.long 0x04 25. "      RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x04 20.--24. "             RPD_CTRL           ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x04 16.--19. " SPARE_AO             ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "            LS_FSLEW             ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            LS_RSLEW           ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x04 4.--7. " FS_FSLEW             ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            FS_RSLEW             ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "UTMIP_PAD_STS_SAVED0_2,XUSB AO UTMIP PAD STS SAVED0 2"
bitfld.long 0x08 29.--30. " VREG_DIR             ,VREG DIR" "0,1,2,3"
bitfld.long 0x08 28. "             PD_VREG              ,PD VREG" "0,1"
bitfld.long 0x08 27. "             RPU_HIGH_FIXED     ,RPU HIGH FIXED" "0,1"
textline "                                   "
bitfld.long 0x08 26. " RPU_AUTO_SWITCH_EN   ,RPU AUTO SWITCH enable" "Disabled,Enabled"
bitfld.long 0x08 25. "      RPU_SWITCH_LOW       ,RPU SWITCH LOW" "0,1"
bitfld.long 0x08 20.--24. "             RPD_CTRL           ,RPD CTRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x08 16.--19. " SPARE_AO             ,SPARE AO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 12.--15. "            LS_FSLEW             ,LS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 8.--11. "            LS_RSLEW           ,LS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.long 0x08 4.--7. " FS_FSLEW             ,FS FSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            FS_RSLEW             ,FS RSLEW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x180++0x0B
line.long 0x00 "UTMIP_PAD_STS_SAVED1_0,XUSB AO UTMIP PAD STS SAVED1 0"
bitfld.long 0x00 17.--22. " TCTRL_SW             ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16. "            TERM_SEL             ,TERM SEL" "Not selected,Selected"
bitfld.long 0x00 10.--15. "  TCTRL_TRK          ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                   "
bitfld.long 0x00 4.--9. " PCTRL_TRK            ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 2.--3. "            VREG_DYN_DLY         ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x00 0.--1. "             VREG_LEV           ,VREG LEV" "0,1,2,3"
line.long 0x04 "UTMIP_PAD_STS_SAVED1_1,XUSB AO UTMIP PAD STS SAVED1 1"
bitfld.long 0x04 17.--22. " TCTRL_SW             ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16. "            TERM_SEL             ,TERM SEL" "Not selected,Selected"
bitfld.long 0x04 10.--15. "  TCTRL_TRK          ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                   "
bitfld.long 0x04 4.--9. " PCTRL_TRK            ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 2.--3. "            VREG_DYN_DLY         ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x04 0.--1. "             VREG_LEV           ,VREG LEV" "0,1,2,3"
line.long 0x08 "UTMIP_PAD_STS_SAVED1_2,XUSB AO UTMIP PAD STS SAVED1 2"
bitfld.long 0x08 17.--22. " TCTRL_SW             ,TCTRL SW" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16. "            TERM_SEL             ,TERM SEL" "Not selected,Selected"
bitfld.long 0x08 10.--15. "  TCTRL_TRK          ,TCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                   "
bitfld.long 0x08 4.--9. " PCTRL_TRK            ,PCTRL TRK" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 2.--3. "            VREG_DYN_DLY         ,VREG DYN DLY" "0,1,2,3"
bitfld.long 0x08 0.--1. "             VREG_LEV           ,VREG LEV" "0,1,2,3"
rgroup.long 0x1A0++0x03
line.long 0x00 "UHSIC_PAD_STS_SAVED_0,XUSB AO UHSIC PAD STS SAVED 0"
bitfld.long 0x00 4.--5. " HSIC_AO_OPT          ,HSIC AO OPT" "0,1,2,3"
bitfld.long 0x00 3. "             RPD_DATA             ,RPD DATA" "0,1"
bitfld.long 0x00 2. "             RPU_DATA           ,RPU DATA" "0,1"
textline "                                   "
bitfld.long 0x00 1. " RPD_STROBE           ,RPD STROBE" "0,1"
bitfld.long 0x00 0. "             RPU_STROBE           ,RPU STROBE" "0,1"
group.long 0x1B0++0x03
line.long 0x00 "BIAS_PAD_CFG_0,XUSB AO BIAS PAD CFG 0"
bitfld.long 0x00 5. " E_DPD_OVRD_VAL       ,E DPD OVRD VAL" "0,1"
bitfld.long 0x00 4. "             E_DPD_OVRD_EN        ,E DPD OVRD enable" "Disabled,Enabled"
bitfld.long 0x00 0.--3. "      SPARE_AO           ,Spare bits for BIAS pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 0x0B
tree.end
tree.end
tree "SATA Controller"
tree "IPFS registers"
base ad:0x03500000
width 19.
tree "Vectors"
group.long 0x0++0x03
line.long 0x00 "AXI_BAR0_SZ_0,The Size Of The Address Range Associated With BAR0"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE      ,The size of the address range associated with BAR0 in 4K increments"
group.long 0x4++0x03
line.long 0x00 "AXI_BAR1_SZ_0,The Size Of The Address Range Associated With BAR1"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE      ,The size of the address range associated with BAR1 in 4K increments"
group.long 0x8++0x03
line.long 0x00 "AXI_BAR2_SZ_0,The Size Of The Address Range Associated With BAR2"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE      ,The size of the address range associated with BAR2 in 4K increments"
group.long 0xC++0x03
line.long 0x00 "AXI_BAR3_SZ_0,The Size Of The Address Range Associated With BAR3"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE      ,The size of the address range associated with BAR3 in 4K increments"
group.long 0x10++0x03
line.long 0x00 "AXI_BAR4_SZ_0,The Size Of The Address Range Associated With BAR4"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR4_SIZE      ,The size of the address range associated with BAR4 in 4K increments"
group.long 0x14++0x03
line.long 0x00 "AXI_BAR5_SZ_0,The Size Of The Address Range Associated With BAR5"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR5_SIZE      ,The size of the address range associated with BAR5 in 4K increments"
group.long 0x18++0x03
line.long 0x00 "AXI_BAR6_SZ_0,The Size Of The Address Range Associated With BAR6"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR6_SIZE      ,The size of the address range associated with BAR6 in 4K increments"
group.long 0x1C++0x03
line.long 0x00 "AXI_BAR7_SZ_0,The Size Of The Address Range Associated With BAR7"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR7_SIZE      ,The size of the address range associated with BAR7 in 4K increments"
group.long 0x40++0x03
line.long 0x00 "AXI_BAR0_START_0,The Start Of AXI Address Space For BAR0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR0_START     ,The start of the AXI address space for BAR0"
group.long 0x44++0x03
line.long 0x00 "AXI_BAR1_START_0,The Start Of AXI Address Space For BAR1"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR1_START     ,The start of the AXI address space for BAR1"
group.long 0x48++0x03
line.long 0x00 "AXI_BAR2_START_0,The Start Of AXI Address Space For BAR2"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR2_START     ,The start of the AXI address space for BAR2"
group.long 0x4C++0x03
line.long 0x00 "AXI_BAR3_START_0,The Start Of AXI Address Space For BAR3"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR3_START     ,The start of the AXI address space for BAR3"
group.long 0x50++0x03
line.long 0x00 "AXI_BAR4_START_0,The Start Of AXI Address Space For BAR4"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR4_START     ,The start of the AXI address space for BAR4"
group.long 0x54++0x03
line.long 0x00 "AXI_BAR5_START_0,The Start Of AXI Address Space For BAR5"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR5_START     ,The start of the AXI address space for BAR5"
group.long 0x58++0x03
line.long 0x00 "AXI_BAR6_START_0,The Start Of AXI Address Space For BAR6"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR6_START     ,The start of the AXI address space for BAR6"
group.long 0x5C++0x03
line.long 0x00 "AXI_BAR7_START_0,The Start Of AXI Address Space For BAR7"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR7_START     ,The start of the AXI address space for BAR7"
group.long 0x80++0x03
line.long 0x00 "FPCI_BAR0_0,FPCI BAR0"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR0_START    ,The start of FPCI address space mapped into the BAR0 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR0_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x84++0x03
line.long 0x00 "FPCI_BAR1_0,FPCI BAR1"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR1_START    ,The start of FPCI address space mapped into the BAR1 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR1_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x88++0x03
line.long 0x00 "FPCI_BAR2_0,FPCI BAR2"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR2_START    ,The start of FPCI address space mapped into the BAR2 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR2_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x8C++0x03
line.long 0x00 "FPCI_BAR3_0,FPCI BAR3"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR3_START    ,The start of FPCI address space mapped into the BAR3 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR3_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x90++0x03
line.long 0x00 "FPCI_BAR4_0,FPCI BAR4"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR4_START    ,The start of FPCI address space mapped into the BAR4 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR4_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x94++0x03
line.long 0x00 "FPCI_BAR5_0,FPCI BAR5"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR5_START    ,The start of FPCI address space mapped into the BAR5 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR5_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x98++0x03
line.long 0x00 "FPCI_BAR6_0,FPCI BAR6"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR6_START    ,The start of FPCI address space mapped into the BAR6 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR6_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0x9C++0x03
line.long 0x00 "FPCI_BAR7_0,FPCI BAR7"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR7_START    ,The start of FPCI address space mapped into the BAR7 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR7_ACCESS_TYPE ,Address region access type" "Memory-mapped,I/O or config"
group.long 0xC0++0x0B
line.long 0x00 "MSI_BAR_SZ_0,MSI BAR Size"
hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE       ,The size of the address range associated with MSI BAR is in 4K increments"
line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR Start"
hexmask.long.tbyte 0x04 12.--31. 0x10 " MSI_AXI_BAR_START  ,The start of the upstream AXI address space for MSI BAR"
line.long 0x08 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR Start"
hexmask.long 0x08 4.--31. 0x10 " MSI_FPCI_BAR_START ,The start of the upstream FPCI address space for MSI BAR"
tree.end
width 12.
tree "MSI Vector registers"
width 12.
group.long 0x100++0x1F
line.long 0x00 "MSI_VEC0_0,SATA MSI Vector Register 0"
eventfld.long 0x00 31. " MSI_VECTOR[31]  ,MSI vector 31" "No MSI,MSI sent"
eventfld.long 0x00 30. "  [30]  ,MSI vector 30" "No MSI,MSI sent"
eventfld.long 0x00 29. "  [29]  ,MSI vector 29" "No MSI,MSI sent"
eventfld.long 0x00 28. "  [28]  ,MSI vector 28" "No MSI,MSI sent"
eventfld.long 0x00 27. "  [27]  ,MSI vector 27" "No MSI,MSI sent"
eventfld.long 0x00 26. " [26]  ,MSI vector 26" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x00 25. " [25]  ,MSI vector 25" "No MSI,MSI sent"
eventfld.long 0x00 24. "  [24]  ,MSI vector 24" "No MSI,MSI sent"
eventfld.long 0x00 23. "  [23]  ,MSI vector 23" "No MSI,MSI sent"
eventfld.long 0x00 22. "  [22]  ,MSI vector 22" "No MSI,MSI sent"
eventfld.long 0x00 21. "  [21]  ,MSI vector 21" "No MSI,MSI sent"
eventfld.long 0x00 20. " [20]  ,MSI vector 20" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x00 19. " [19]  ,MSI vector 19" "No MSI,MSI sent"
eventfld.long 0x00 18. "  [18]  ,MSI vector 18" "No MSI,MSI sent"
eventfld.long 0x00 17. "  [17]  ,MSI vector 17" "No MSI,MSI sent"
eventfld.long 0x00 16. "  [16]  ,MSI vector 16" "No MSI,MSI sent"
eventfld.long 0x00 15. "  [15]  ,MSI vector 15" "No MSI,MSI sent"
eventfld.long 0x00 14. " [14]  ,MSI vector 14" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x00 13. " [13]  ,MSI vector 13" "No MSI,MSI sent"
eventfld.long 0x00 12. "  [12]  ,MSI vector 12" "No MSI,MSI sent"
eventfld.long 0x00 11. "  [11]  ,MSI vector 11" "No MSI,MSI sent"
eventfld.long 0x00 10. "  [10]  ,MSI vector 10" "No MSI,MSI sent"
eventfld.long 0x00 9. "  [9]   ,MSI vector 9" "No MSI,MSI sent"
eventfld.long 0x00 8. " [8]   ,MSI vector 8" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x00 7. " [7]   ,MSI vector 7" "No MSI,MSI sent"
eventfld.long 0x00 6. "  [6]   ,MSI vector 6" "No MSI,MSI sent"
eventfld.long 0x00 5. "  [5]   ,MSI vector 5" "No MSI,MSI sent"
eventfld.long 0x00 4. "  [4]   ,MSI vector 4" "No MSI,MSI sent"
eventfld.long 0x00 3. "  [3]   ,MSI vector 3" "No MSI,MSI sent"
eventfld.long 0x00 2. " [2]   ,MSI vector 2" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x00 1. " [1]   ,MSI vector 1" "No MSI,MSI sent"
eventfld.long 0x00 0. "  [0]   ,MSI vector 0" "No MSI,MSI sent"
line.long 0x04 "MSI_VEC1_0,SATA MSI Vector Register 1"
eventfld.long 0x04 31. " MSI_VECTOR[63]  ,MSI vector 63" "No MSI,MSI sent"
eventfld.long 0x04 30. "  [62]  ,MSI vector 62" "No MSI,MSI sent"
eventfld.long 0x04 29. "  [61]  ,MSI vector 61" "No MSI,MSI sent"
eventfld.long 0x04 28. "  [60]  ,MSI vector 60" "No MSI,MSI sent"
eventfld.long 0x04 27. "  [59]  ,MSI vector 59" "No MSI,MSI sent"
eventfld.long 0x04 26. " [58]  ,MSI vector 58" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x04 25. " [57]  ,MSI vector 57" "No MSI,MSI sent"
eventfld.long 0x04 24. "  [56]  ,MSI vector 56" "No MSI,MSI sent"
eventfld.long 0x04 23. "  [55]  ,MSI vector 55" "No MSI,MSI sent"
eventfld.long 0x04 22. "  [54]  ,MSI vector 54" "No MSI,MSI sent"
eventfld.long 0x04 21. "  [53]  ,MSI vector 53" "No MSI,MSI sent"
eventfld.long 0x04 20. " [52]  ,MSI vector 52" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x04 19. " [51]  ,MSI vector 51" "No MSI,MSI sent"
eventfld.long 0x04 18. "  [50]  ,MSI vector 50" "No MSI,MSI sent"
eventfld.long 0x04 17. "  [49]  ,MSI vector 49" "No MSI,MSI sent"
eventfld.long 0x04 16. "  [48]  ,MSI vector 48" "No MSI,MSI sent"
eventfld.long 0x04 15. "  [47]  ,MSI vector 47" "No MSI,MSI sent"
eventfld.long 0x04 14. " [46]  ,MSI vector 46" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x04 13. " [45]  ,MSI vector 45" "No MSI,MSI sent"
eventfld.long 0x04 12. "  [44]  ,MSI vector 44" "No MSI,MSI sent"
eventfld.long 0x04 11. "  [43]  ,MSI vector 43" "No MSI,MSI sent"
eventfld.long 0x04 10. "  [42]  ,MSI vector 42" "No MSI,MSI sent"
eventfld.long 0x04 9. "  [41]  ,MSI vector 41" "No MSI,MSI sent"
eventfld.long 0x04 8. " [40]  ,MSI vector 40" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x04 7. " [39]  ,MSI vector 39" "No MSI,MSI sent"
eventfld.long 0x04 6. "  [38]  ,MSI vector 38" "No MSI,MSI sent"
eventfld.long 0x04 5. "  [37]  ,MSI vector 37" "No MSI,MSI sent"
eventfld.long 0x04 4. "  [36]  ,MSI vector 36" "No MSI,MSI sent"
eventfld.long 0x04 3. "  [35]  ,MSI vector 35" "No MSI,MSI sent"
eventfld.long 0x04 2. " [34]  ,MSI vector 34" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x04 1. " [33]  ,MSI vector 33" "No MSI,MSI sent"
eventfld.long 0x04 0. "  [32]  ,MSI vector 32" "No MSI,MSI sent"
line.long 0x08 "MSI_VEC2_0,SATA MSI Vector Register 2"
eventfld.long 0x08 31. " MSI_VECTOR[95]  ,MSI vector 95" "No MSI,MSI sent"
eventfld.long 0x08 30. "  [94]  ,MSI vector 94" "No MSI,MSI sent"
eventfld.long 0x08 29. "  [93]  ,MSI vector 93" "No MSI,MSI sent"
eventfld.long 0x08 28. "  [92]  ,MSI vector 92" "No MSI,MSI sent"
eventfld.long 0x08 27. "  [91]  ,MSI vector 91" "No MSI,MSI sent"
eventfld.long 0x08 26. " [90]  ,MSI vector 90" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x08 25. " [89]  ,MSI vector 89" "No MSI,MSI sent"
eventfld.long 0x08 24. "  [88]  ,MSI vector 88" "No MSI,MSI sent"
eventfld.long 0x08 23. "  [87]  ,MSI vector 87" "No MSI,MSI sent"
eventfld.long 0x08 22. "  [86]  ,MSI vector 86" "No MSI,MSI sent"
eventfld.long 0x08 21. "  [85]  ,MSI vector 85" "No MSI,MSI sent"
eventfld.long 0x08 20. " [84]  ,MSI vector 84" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x08 19. " [83]  ,MSI vector 83" "No MSI,MSI sent"
eventfld.long 0x08 18. "  [82]  ,MSI vector 82" "No MSI,MSI sent"
eventfld.long 0x08 17. "  [81]  ,MSI vector 81" "No MSI,MSI sent"
eventfld.long 0x08 16. "  [80]  ,MSI vector 80" "No MSI,MSI sent"
eventfld.long 0x08 15. "  [79]  ,MSI vector 79" "No MSI,MSI sent"
eventfld.long 0x08 14. " [78]  ,MSI vector 78" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x08 13. " [77]  ,MSI vector 77" "No MSI,MSI sent"
eventfld.long 0x08 12. "  [76]  ,MSI vector 76" "No MSI,MSI sent"
eventfld.long 0x08 11. "  [75]  ,MSI vector 75" "No MSI,MSI sent"
eventfld.long 0x08 10. "  [74]  ,MSI vector 74" "No MSI,MSI sent"
eventfld.long 0x08 9. "  [73]  ,MSI vector 73" "No MSI,MSI sent"
eventfld.long 0x08 8. " [72]  ,MSI vector 72" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x08 7. " [71]  ,MSI vector 71" "No MSI,MSI sent"
eventfld.long 0x08 6. "  [70]  ,MSI vector 70" "No MSI,MSI sent"
eventfld.long 0x08 5. "  [69]  ,MSI vector 69" "No MSI,MSI sent"
eventfld.long 0x08 4. "  [68]  ,MSI vector 68" "No MSI,MSI sent"
eventfld.long 0x08 3. "  [67]  ,MSI vector 67" "No MSI,MSI sent"
eventfld.long 0x08 2. " [66]  ,MSI vector 66" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x08 1. " [65]  ,MSI vector 65" "No MSI,MSI sent"
eventfld.long 0x08 0. "  [64]  ,MSI vector 64" "No MSI,MSI sent"
line.long 0x0C "MSI_VEC3_0,SATA MSI Vector Register 3"
eventfld.long 0x0C 31. " MSI_VECTOR[127] ,MSI vector 127" "No MSI,MSI sent"
eventfld.long 0x0C 30. "  [126] ,MSI vector 126" "No MSI,MSI sent"
eventfld.long 0x0C 29. "  [125] ,MSI vector 125" "No MSI,MSI sent"
eventfld.long 0x0C 28. "  [124] ,MSI vector 124" "No MSI,MSI sent"
eventfld.long 0x0C 27. "  [123] ,MSI vector 123" "No MSI,MSI sent"
eventfld.long 0x0C 26. " [122] ,MSI vector 122" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x0C 25. " [121] ,MSI vector 121" "No MSI,MSI sent"
eventfld.long 0x0C 24. "  [120] ,MSI vector 120" "No MSI,MSI sent"
eventfld.long 0x0C 23. "  [119] ,MSI vector 119" "No MSI,MSI sent"
eventfld.long 0x0C 22. "  [118] ,MSI vector 118" "No MSI,MSI sent"
eventfld.long 0x0C 21. "  [117] ,MSI vector 117" "No MSI,MSI sent"
eventfld.long 0x0C 20. " [116] ,MSI vector 116" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x0C 19. " [115] ,MSI vector 115" "No MSI,MSI sent"
eventfld.long 0x0C 18. "  [114] ,MSI vector 114" "No MSI,MSI sent"
eventfld.long 0x0C 17. "  [113] ,MSI vector 113" "No MSI,MSI sent"
eventfld.long 0x0C 16. "  [112] ,MSI vector 112" "No MSI,MSI sent"
eventfld.long 0x0C 15. "  [111] ,MSI vector 111" "No MSI,MSI sent"
eventfld.long 0x0C 14. " [110] ,MSI vector 110" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x0C 13. " [109] ,MSI vector 109" "No MSI,MSI sent"
eventfld.long 0x0C 12. "  [108] ,MSI vector 108" "No MSI,MSI sent"
eventfld.long 0x0C 11. "  [107] ,MSI vector 107" "No MSI,MSI sent"
eventfld.long 0x0C 10. "  [106] ,MSI vector 106" "No MSI,MSI sent"
eventfld.long 0x0C 9. "  [105] ,MSI vector 105" "No MSI,MSI sent"
eventfld.long 0x0C 8. " [104] ,MSI vector 104" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x0C 7. " [103] ,MSI vector 103" "No MSI,MSI sent"
eventfld.long 0x0C 6. "  [102] ,MSI vector 102" "No MSI,MSI sent"
eventfld.long 0x0C 5. "  [101] ,MSI vector 101" "No MSI,MSI sent"
eventfld.long 0x0C 4. "  [100] ,MSI vector 100" "No MSI,MSI sent"
eventfld.long 0x0C 3. "  [99]  ,MSI vector 99" "No MSI,MSI sent"
eventfld.long 0x0C 2. " [98]  ,MSI vector 98" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x0C 1. " [97]  ,MSI vector 97" "No MSI,MSI sent"
eventfld.long 0x0C 0. "  [96]  ,MSI vector 96" "No MSI,MSI sent"
line.long 0x10 "MSI_VEC4_0,SATA MSI Vector Register 4"
eventfld.long 0x10 31. " MSI_VECTOR[159] ,MSI vector 159" "No MSI,MSI sent"
eventfld.long 0x10 30. "  [158] ,MSI vector 158" "No MSI,MSI sent"
eventfld.long 0x10 29. "  [157] ,MSI vector 157" "No MSI,MSI sent"
eventfld.long 0x10 28. "  [156] ,MSI vector 156" "No MSI,MSI sent"
eventfld.long 0x10 27. "  [155] ,MSI vector 155" "No MSI,MSI sent"
eventfld.long 0x10 26. " [154] ,MSI vector 154" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x10 25. " [153] ,MSI vector 153" "No MSI,MSI sent"
eventfld.long 0x10 24. "  [152] ,MSI vector 152" "No MSI,MSI sent"
eventfld.long 0x10 23. "  [151] ,MSI vector 151" "No MSI,MSI sent"
eventfld.long 0x10 22. "  [150] ,MSI vector 150" "No MSI,MSI sent"
eventfld.long 0x10 21. "  [149] ,MSI vector 149" "No MSI,MSI sent"
eventfld.long 0x10 20. " [148] ,MSI vector 148" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x10 19. " [147] ,MSI vector 147" "No MSI,MSI sent"
eventfld.long 0x10 18. "  [146] ,MSI vector 146" "No MSI,MSI sent"
eventfld.long 0x10 17. "  [145] ,MSI vector 145" "No MSI,MSI sent"
eventfld.long 0x10 16. "  [144] ,MSI vector 144" "No MSI,MSI sent"
eventfld.long 0x10 15. "  [143] ,MSI vector 143" "No MSI,MSI sent"
eventfld.long 0x10 14. " [142] ,MSI vector 142" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x10 13. " [141] ,MSI vector 141" "No MSI,MSI sent"
eventfld.long 0x10 12. "  [140] ,MSI vector 140" "No MSI,MSI sent"
eventfld.long 0x10 11. "  [139] ,MSI vector 139" "No MSI,MSI sent"
eventfld.long 0x10 10. "  [138] ,MSI vector 138" "No MSI,MSI sent"
eventfld.long 0x10 9. "  [137] ,MSI vector 137" "No MSI,MSI sent"
eventfld.long 0x10 8. " [136] ,MSI vector 136" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x10 7. " [135] ,MSI vector 135" "No MSI,MSI sent"
eventfld.long 0x10 6. "  [134] ,MSI vector 134" "No MSI,MSI sent"
eventfld.long 0x10 5. "  [133] ,MSI vector 133" "No MSI,MSI sent"
eventfld.long 0x10 4. "  [132] ,MSI vector 132" "No MSI,MSI sent"
eventfld.long 0x10 3. "  [131] ,MSI vector 131" "No MSI,MSI sent"
eventfld.long 0x10 2. " [130] ,MSI vector 130" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x10 1. " [129] ,MSI vector 129" "No MSI,MSI sent"
eventfld.long 0x10 0. "  [128] ,MSI vector 128" "No MSI,MSI sent"
line.long 0x14 "MSI_VEC5_0,SATA MSI Vector Register 5"
eventfld.long 0x14 31. " MSI_VECTOR[191] ,MSI vector 191" "No MSI,MSI sent"
eventfld.long 0x14 30. "  [190] ,MSI vector 190" "No MSI,MSI sent"
eventfld.long 0x14 29. "  [189] ,MSI vector 189" "No MSI,MSI sent"
eventfld.long 0x14 28. "  [188] ,MSI vector 188" "No MSI,MSI sent"
eventfld.long 0x14 27. "  [187] ,MSI vector 187" "No MSI,MSI sent"
eventfld.long 0x14 26. " [186] ,MSI vector 186" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x14 25. " [185] ,MSI vector 185" "No MSI,MSI sent"
eventfld.long 0x14 24. "  [184] ,MSI vector 184" "No MSI,MSI sent"
eventfld.long 0x14 23. "  [183] ,MSI vector 183" "No MSI,MSI sent"
eventfld.long 0x14 22. "  [182] ,MSI vector 182" "No MSI,MSI sent"
eventfld.long 0x14 21. "  [181] ,MSI vector 181" "No MSI,MSI sent"
eventfld.long 0x14 20. " [180] ,MSI vector 180" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x14 19. " [179] ,MSI vector 179" "No MSI,MSI sent"
eventfld.long 0x14 18. "  [178] ,MSI vector 178" "No MSI,MSI sent"
eventfld.long 0x14 17. "  [177] ,MSI vector 177" "No MSI,MSI sent"
eventfld.long 0x14 16. "  [176] ,MSI vector 176" "No MSI,MSI sent"
eventfld.long 0x14 15. "  [175] ,MSI vector 175" "No MSI,MSI sent"
eventfld.long 0x14 14. " [174] ,MSI vector 174" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x14 13. " [173] ,MSI vector 173" "No MSI,MSI sent"
eventfld.long 0x14 12. "  [172] ,MSI vector 172" "No MSI,MSI sent"
eventfld.long 0x14 11. "  [171] ,MSI vector 171" "No MSI,MSI sent"
eventfld.long 0x14 10. "  [170] ,MSI vector 170" "No MSI,MSI sent"
eventfld.long 0x14 9. "  [169] ,MSI vector 169" "No MSI,MSI sent"
eventfld.long 0x14 8. " [168] ,MSI vector 168" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x14 7. " [167] ,MSI vector 167" "No MSI,MSI sent"
eventfld.long 0x14 6. "  [166] ,MSI vector 166" "No MSI,MSI sent"
eventfld.long 0x14 5. "  [165] ,MSI vector 165" "No MSI,MSI sent"
eventfld.long 0x14 4. "  [164] ,MSI vector 164" "No MSI,MSI sent"
eventfld.long 0x14 3. "  [163] ,MSI vector 163" "No MSI,MSI sent"
eventfld.long 0x14 2. " [162] ,MSI vector 162" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x14 1. " [161] ,MSI vector 161" "No MSI,MSI sent"
eventfld.long 0x14 0. "  [160] ,MSI vector 160" "No MSI,MSI sent"
line.long 0x18 "MSI_VEC6_0,SATA MSI Vector Register 6"
eventfld.long 0x18 31. " MSI_VECTOR[223] ,MSI vector 223" "No MSI,MSI sent"
eventfld.long 0x18 30. "  [222] ,MSI vector 222" "No MSI,MSI sent"
eventfld.long 0x18 29. "  [221] ,MSI vector 221" "No MSI,MSI sent"
eventfld.long 0x18 28. "  [220] ,MSI vector 220" "No MSI,MSI sent"
eventfld.long 0x18 27. "  [219] ,MSI vector 219" "No MSI,MSI sent"
eventfld.long 0x18 26. " [218] ,MSI vector 218" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x18 25. " [217] ,MSI vector 217" "No MSI,MSI sent"
eventfld.long 0x18 24. "  [216] ,MSI vector 216" "No MSI,MSI sent"
eventfld.long 0x18 23. "  [215] ,MSI vector 215" "No MSI,MSI sent"
eventfld.long 0x18 22. "  [214] ,MSI vector 214" "No MSI,MSI sent"
eventfld.long 0x18 21. "  [213] ,MSI vector 213" "No MSI,MSI sent"
eventfld.long 0x18 20. " [212] ,MSI vector 212" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x18 19. " [211] ,MSI vector 211" "No MSI,MSI sent"
eventfld.long 0x18 18. "  [210] ,MSI vector 210" "No MSI,MSI sent"
eventfld.long 0x18 17. "  [209] ,MSI vector 209" "No MSI,MSI sent"
eventfld.long 0x18 16. "  [208] ,MSI vector 208" "No MSI,MSI sent"
eventfld.long 0x18 15. "  [207] ,MSI vector 207" "No MSI,MSI sent"
eventfld.long 0x18 14. " [206] ,MSI vector 206" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x18 13. " [205] ,MSI vector 205" "No MSI,MSI sent"
eventfld.long 0x18 12. "  [204] ,MSI vector 204" "No MSI,MSI sent"
eventfld.long 0x18 11. "  [203] ,MSI vector 203" "No MSI,MSI sent"
eventfld.long 0x18 10. "  [202] ,MSI vector 202" "No MSI,MSI sent"
eventfld.long 0x18 9. "  [201] ,MSI vector 201" "No MSI,MSI sent"
eventfld.long 0x18 8. " [200] ,MSI vector 200" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x18 7. " [199] ,MSI vector 199" "No MSI,MSI sent"
eventfld.long 0x18 6. "  [198] ,MSI vector 198" "No MSI,MSI sent"
eventfld.long 0x18 5. "  [197] ,MSI vector 197" "No MSI,MSI sent"
eventfld.long 0x18 4. "  [196] ,MSI vector 196" "No MSI,MSI sent"
eventfld.long 0x18 3. "  [195] ,MSI vector 195" "No MSI,MSI sent"
eventfld.long 0x18 2. " [194] ,MSI vector 194" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x18 1. " [193] ,MSI vector 193" "No MSI,MSI sent"
eventfld.long 0x18 0. "  [192] ,MSI vector 192" "No MSI,MSI sent"
line.long 0x1C "MSI_VEC7_0,SATA MSI Vector Register 7"
eventfld.long 0x1C 31. " MSI_VECTOR[255] ,MSI vector 255" "No MSI,MSI sent"
eventfld.long 0x1C 30. "  [254] ,MSI vector 254" "No MSI,MSI sent"
eventfld.long 0x1C 29. "  [253] ,MSI vector 253" "No MSI,MSI sent"
eventfld.long 0x1C 28. "  [252] ,MSI vector 252" "No MSI,MSI sent"
eventfld.long 0x1C 27. "  [251] ,MSI vector 251" "No MSI,MSI sent"
eventfld.long 0x1C 26. " [250] ,MSI vector 250" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x1C 25. " [249] ,MSI vector 249" "No MSI,MSI sent"
eventfld.long 0x1C 24. "  [248] ,MSI vector 248" "No MSI,MSI sent"
eventfld.long 0x1C 23. "  [247] ,MSI vector 247" "No MSI,MSI sent"
eventfld.long 0x1C 22. "  [246] ,MSI vector 246" "No MSI,MSI sent"
eventfld.long 0x1C 21. "  [245] ,MSI vector 245" "No MSI,MSI sent"
eventfld.long 0x1C 20. " [244] ,MSI vector 244" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x1C 19. " [243] ,MSI vector 243" "No MSI,MSI sent"
eventfld.long 0x1C 18. "  [242] ,MSI vector 242" "No MSI,MSI sent"
eventfld.long 0x1C 17. "  [241] ,MSI vector 241" "No MSI,MSI sent"
eventfld.long 0x1C 16. "  [240] ,MSI vector 240" "No MSI,MSI sent"
eventfld.long 0x1C 15. "  [239] ,MSI vector 239" "No MSI,MSI sent"
eventfld.long 0x1C 14. " [238] ,MSI vector 238" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x1C 13. " [237] ,MSI vector 237" "No MSI,MSI sent"
eventfld.long 0x1C 12. "  [236] ,MSI vector 236" "No MSI,MSI sent"
eventfld.long 0x1C 11. "  [235] ,MSI vector 235" "No MSI,MSI sent"
eventfld.long 0x1C 10. "  [234] ,MSI vector 234" "No MSI,MSI sent"
eventfld.long 0x1C 9. "  [233] ,MSI vector 233" "No MSI,MSI sent"
eventfld.long 0x1C 8. " [232] ,MSI vector 232" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x1C 7. " [231] ,MSI vector 231" "No MSI,MSI sent"
eventfld.long 0x1C 6. "  [230] ,MSI vector 230" "No MSI,MSI sent"
eventfld.long 0x1C 5. "  [229] ,MSI vector 229" "No MSI,MSI sent"
eventfld.long 0x1C 4. "  [228] ,MSI vector 228" "No MSI,MSI sent"
eventfld.long 0x1C 3. "  [227] ,MSI vector 227" "No MSI,MSI sent"
eventfld.long 0x1C 2. " [226] ,MSI vector 226" "No MSI,MSI sent"
textline "                               "
eventfld.long 0x1C 1. " [225] ,MSI vector 225" "No MSI,MSI sent"
eventfld.long 0x1C 0. "  [224] ,MSI vector 224" "No MSI,MSI sent"
textline "                         "
width 15.
group.long 0x140++0x1F
line.long 0x00 "MSI_EN_VEC0_0,SATA MSI Vector Enable Register 0"
bitfld.long 0x00 31. " MSI_ENABLE_VECTOR[31]  ,MSI vector enable 31" "Disabled,Enabled"
bitfld.long 0x00 30. "  [30]  ,MSI vector enable 30" "Disabled,Enabled"
bitfld.long 0x00 29. "  [29]  ,MSI vector enable 29" "Disabled,Enabled"
bitfld.long 0x00 28. "  [28]  ,MSI vector enable 28" "Disabled,Enabled"
bitfld.long 0x00 27. "  [27]  ,MSI vector enable 27" "Disabled,Enabled"
bitfld.long 0x00 26. "  [26]  ,MSI vector enable 26" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 25. " [25]  ,MSI vector enable 25" "Disabled,Enabled"
bitfld.long 0x00 24. "  [24]  ,MSI vector enable 24" "Disabled,Enabled"
bitfld.long 0x00 23. "  [23]  ,MSI vector enable 23" "Disabled,Enabled"
bitfld.long 0x00 22. "  [22]  ,MSI vector enable 22" "Disabled,Enabled"
bitfld.long 0x00 21. "  [21]  ,MSI vector enable 21" "Disabled,Enabled"
bitfld.long 0x00 20. "  [20]  ,MSI vector enable 20" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 19. " [19]  ,MSI vector enable 19" "Disabled,Enabled"
bitfld.long 0x00 18. "  [18]  ,MSI vector enable 18" "Disabled,Enabled"
bitfld.long 0x00 17. "  [17]  ,MSI vector enable 17" "Disabled,Enabled"
bitfld.long 0x00 16. "  [16]  ,MSI vector enable 16" "Disabled,Enabled"
bitfld.long 0x00 15. "  [15]  ,MSI vector enable 15" "Disabled,Enabled"
bitfld.long 0x00 14. "  [14]  ,MSI vector enable 14" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 13. " [13]  ,MSI vector enable 13" "Disabled,Enabled"
bitfld.long 0x00 12. "  [12]  ,MSI vector enable 12" "Disabled,Enabled"
bitfld.long 0x00 11. "  [11]  ,MSI vector enable 11" "Disabled,Enabled"
bitfld.long 0x00 10. "  [10]  ,MSI vector enable 10" "Disabled,Enabled"
bitfld.long 0x00 9. "  [9]   ,MSI vector enable 9" "Disabled,Enabled"
bitfld.long 0x00 8. "  [8]   ,MSI vector enable 8" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 7. " [7]   ,MSI vector enable 7" "Disabled,Enabled"
bitfld.long 0x00 6. "  [6]   ,MSI vector enable 6" "Disabled,Enabled"
bitfld.long 0x00 5. "  [5]   ,MSI vector enable 5" "Disabled,Enabled"
bitfld.long 0x00 4. "  [4]   ,MSI vector enable 4" "Disabled,Enabled"
bitfld.long 0x00 3. "  [3]   ,MSI vector enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "  [2]   ,MSI vector enable 2" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x00 1. " [1]   ,MSI vector enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "  [0]   ,MSI vector enable 0" "Disabled,Enabled"
line.long 0x04 "MSI_EN_VEC1_0,SATA MSI Vector Enable Register 1"
bitfld.long 0x04 31. " MSI_ENABLE_VECTOR[63]  ,MSI vector enable 63" "Disabled,Enabled"
bitfld.long 0x04 30. "  [62]  ,MSI vector enable 62" "Disabled,Enabled"
bitfld.long 0x04 29. "  [61]  ,MSI vector enable 61" "Disabled,Enabled"
bitfld.long 0x04 28. "  [60]  ,MSI vector enable 60" "Disabled,Enabled"
bitfld.long 0x04 27. "  [59]  ,MSI vector enable 59" "Disabled,Enabled"
bitfld.long 0x04 26. "  [58]  ,MSI vector enable 58" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 25. " [57]  ,MSI vector enable 57" "Disabled,Enabled"
bitfld.long 0x04 24. "  [56]  ,MSI vector enable 56" "Disabled,Enabled"
bitfld.long 0x04 23. "  [55]  ,MSI vector enable 55" "Disabled,Enabled"
bitfld.long 0x04 22. "  [54]  ,MSI vector enable 54" "Disabled,Enabled"
bitfld.long 0x04 21. "  [53]  ,MSI vector enable 53" "Disabled,Enabled"
bitfld.long 0x04 20. "  [52]  ,MSI vector enable 52" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 19. " [51]  ,MSI vector enable 51" "Disabled,Enabled"
bitfld.long 0x04 18. "  [50]  ,MSI vector enable 50" "Disabled,Enabled"
bitfld.long 0x04 17. "  [49]  ,MSI vector enable 49" "Disabled,Enabled"
bitfld.long 0x04 16. "  [48]  ,MSI vector enable 48" "Disabled,Enabled"
bitfld.long 0x04 15. "  [47]  ,MSI vector enable 47" "Disabled,Enabled"
bitfld.long 0x04 14. "  [46]  ,MSI vector enable 46" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 13. " [45]  ,MSI vector enable 45" "Disabled,Enabled"
bitfld.long 0x04 12. "  [44]  ,MSI vector enable 44" "Disabled,Enabled"
bitfld.long 0x04 11. "  [43]  ,MSI vector enable 43" "Disabled,Enabled"
bitfld.long 0x04 10. "  [42]  ,MSI vector enable 42" "Disabled,Enabled"
bitfld.long 0x04 9. "  [41]  ,MSI vector enable 41" "Disabled,Enabled"
bitfld.long 0x04 8. "  [40]  ,MSI vector enable 40" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 7. " [39]  ,MSI vector enable 39" "Disabled,Enabled"
bitfld.long 0x04 6. "  [38]  ,MSI vector enable 38" "Disabled,Enabled"
bitfld.long 0x04 5. "  [37]  ,MSI vector enable 37" "Disabled,Enabled"
bitfld.long 0x04 4. "  [36]  ,MSI vector enable 36" "Disabled,Enabled"
bitfld.long 0x04 3. "  [35]  ,MSI vector enable 35" "Disabled,Enabled"
bitfld.long 0x04 2. "  [34]  ,MSI vector enable 34" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x04 1. " [33]  ,MSI vector enable 33" "Disabled,Enabled"
bitfld.long 0x04 0. "  [32]  ,MSI vector enable 32" "Disabled,Enabled"
line.long 0x08 "MSI_EN_VEC2_0,SATA MSI Vector Enable Register 2"
bitfld.long 0x08 31. " MSI_ENABLE_VECTOR[95]  ,MSI vector enable 95" "Disabled,Enabled"
bitfld.long 0x08 30. "  [94]  ,MSI vector enable 94" "Disabled,Enabled"
bitfld.long 0x08 29. "  [93]  ,MSI vector enable 93" "Disabled,Enabled"
bitfld.long 0x08 28. "  [92]  ,MSI vector enable 92" "Disabled,Enabled"
bitfld.long 0x08 27. "  [91]  ,MSI vector enable 91" "Disabled,Enabled"
bitfld.long 0x08 26. "  [90]  ,MSI vector enable 90" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 25. " [89]  ,MSI vector enable 89" "Disabled,Enabled"
bitfld.long 0x08 24. "  [88]  ,MSI vector enable 88" "Disabled,Enabled"
bitfld.long 0x08 23. "  [87]  ,MSI vector enable 87" "Disabled,Enabled"
bitfld.long 0x08 22. "  [86]  ,MSI vector enable 86" "Disabled,Enabled"
bitfld.long 0x08 21. "  [85]  ,MSI vector enable 85" "Disabled,Enabled"
bitfld.long 0x08 20. "  [84]  ,MSI vector enable 84" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 19. " [83]  ,MSI vector enable 83" "Disabled,Enabled"
bitfld.long 0x08 18. "  [82]  ,MSI vector enable 82" "Disabled,Enabled"
bitfld.long 0x08 17. "  [81]  ,MSI vector enable 81" "Disabled,Enabled"
bitfld.long 0x08 16. "  [80]  ,MSI vector enable 80" "Disabled,Enabled"
bitfld.long 0x08 15. "  [79]  ,MSI vector enable 79" "Disabled,Enabled"
bitfld.long 0x08 14. "  [78]  ,MSI vector enable 78" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 13. " [77]  ,MSI vector enable 77" "Disabled,Enabled"
bitfld.long 0x08 12. "  [76]  ,MSI vector enable 76" "Disabled,Enabled"
bitfld.long 0x08 11. "  [75]  ,MSI vector enable 75" "Disabled,Enabled"
bitfld.long 0x08 10. "  [74]  ,MSI vector enable 74" "Disabled,Enabled"
bitfld.long 0x08 9. "  [73]  ,MSI vector enable 73" "Disabled,Enabled"
bitfld.long 0x08 8. "  [72]  ,MSI vector enable 72" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 7. " [71]  ,MSI vector enable 71" "Disabled,Enabled"
bitfld.long 0x08 6. "  [70]  ,MSI vector enable 70" "Disabled,Enabled"
bitfld.long 0x08 5. "  [69]  ,MSI vector enable 69" "Disabled,Enabled"
bitfld.long 0x08 4. "  [68]  ,MSI vector enable 68" "Disabled,Enabled"
bitfld.long 0x08 3. "  [67]  ,MSI vector enable 67" "Disabled,Enabled"
bitfld.long 0x08 2. "  [66]  ,MSI vector enable 66" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x08 1. " [65]  ,MSI vector enable 65" "Disabled,Enabled"
bitfld.long 0x08 0. "  [64]  ,MSI vector enable 64" "Disabled,Enabled"
line.long 0x0C "MSI_EN_VEC3_0,SATA MSI Vector Enable Register 3"
bitfld.long 0x0C 31. " MSI_ENABLE_VECTOR[127] ,MSI vector enable 127" "Disabled,Enabled"
bitfld.long 0x0C 30. "  [126] ,MSI vector enable 126" "Disabled,Enabled"
bitfld.long 0x0C 29. "  [125] ,MSI vector enable 125" "Disabled,Enabled"
bitfld.long 0x0C 28. "  [124] ,MSI vector enable 124" "Disabled,Enabled"
bitfld.long 0x0C 27. "  [123] ,MSI vector enable 123" "Disabled,Enabled"
bitfld.long 0x0C 26. "  [122] ,MSI vector enable 122" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 25. " [121] ,MSI vector enable 121" "Disabled,Enabled"
bitfld.long 0x0C 24. "  [120] ,MSI vector enable 120" "Disabled,Enabled"
bitfld.long 0x0C 23. "  [119] ,MSI vector enable 119" "Disabled,Enabled"
bitfld.long 0x0C 22. "  [118] ,MSI vector enable 118" "Disabled,Enabled"
bitfld.long 0x0C 21. "  [117] ,MSI vector enable 117" "Disabled,Enabled"
bitfld.long 0x0C 20. "  [116] ,MSI vector enable 116" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 19. " [115] ,MSI vector enable 115" "Disabled,Enabled"
bitfld.long 0x0C 18. "  [114] ,MSI vector enable 114" "Disabled,Enabled"
bitfld.long 0x0C 17. "  [113] ,MSI vector enable 113" "Disabled,Enabled"
bitfld.long 0x0C 16. "  [112] ,MSI vector enable 112" "Disabled,Enabled"
bitfld.long 0x0C 15. "  [111] ,MSI vector enable 111" "Disabled,Enabled"
bitfld.long 0x0C 14. "  [110] ,MSI vector enable 110" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 13. " [109] ,MSI vector enable 109" "Disabled,Enabled"
bitfld.long 0x0C 12. "  [108] ,MSI vector enable 108" "Disabled,Enabled"
bitfld.long 0x0C 11. "  [107] ,MSI vector enable 107" "Disabled,Enabled"
bitfld.long 0x0C 10. "  [106] ,MSI vector enable 106" "Disabled,Enabled"
bitfld.long 0x0C 9. "  [105] ,MSI vector enable 105" "Disabled,Enabled"
bitfld.long 0x0C 8. "  [104] ,MSI vector enable 104" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 7. " [103] ,MSI vector enable 103" "Disabled,Enabled"
bitfld.long 0x0C 6. "  [102] ,MSI vector enable 102" "Disabled,Enabled"
bitfld.long 0x0C 5. "  [101] ,MSI vector enable 101" "Disabled,Enabled"
bitfld.long 0x0C 4. "  [100] ,MSI vector enable 100" "Disabled,Enabled"
bitfld.long 0x0C 3. "  [99]  ,MSI vector enable 99" "Disabled,Enabled"
bitfld.long 0x0C 2. "  [98]  ,MSI vector enable 98" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x0C 1. " [97]  ,MSI vector enable 97" "Disabled,Enabled"
bitfld.long 0x0C 0. "  [96]  ,MSI vector enable 96" "Disabled,Enabled"
line.long 0x10 "MSI_EN_VEC4_0,SATA MSI Vector Enable Register 4"
bitfld.long 0x10 31. " MSI_ENABLE_VECTOR[159] ,MSI vector enable 159" "Disabled,Enabled"
bitfld.long 0x10 30. "  [158] ,MSI vector enable 158" "Disabled,Enabled"
bitfld.long 0x10 29. "  [157] ,MSI vector enable 157" "Disabled,Enabled"
bitfld.long 0x10 28. "  [156] ,MSI vector enable 156" "Disabled,Enabled"
bitfld.long 0x10 27. "  [155] ,MSI vector enable 155" "Disabled,Enabled"
bitfld.long 0x10 26. "  [154] ,MSI vector enable 154" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x10 25. " [153] ,MSI vector enable 153" "Disabled,Enabled"
bitfld.long 0x10 24. "  [152] ,MSI vector enable 152" "Disabled,Enabled"
bitfld.long 0x10 23. "  [151] ,MSI vector enable 151" "Disabled,Enabled"
bitfld.long 0x10 22. "  [150] ,MSI vector enable 150" "Disabled,Enabled"
bitfld.long 0x10 21. "  [149] ,MSI vector enable 149" "Disabled,Enabled"
bitfld.long 0x10 20. "  [148] ,MSI vector enable 148" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x10 19. " [147] ,MSI vector enable 147" "Disabled,Enabled"
bitfld.long 0x10 18. "  [146] ,MSI vector enable 146" "Disabled,Enabled"
bitfld.long 0x10 17. "  [145] ,MSI vector enable 145" "Disabled,Enabled"
bitfld.long 0x10 16. "  [144] ,MSI vector enable 144" "Disabled,Enabled"
bitfld.long 0x10 15. "  [143] ,MSI vector enable 143" "Disabled,Enabled"
bitfld.long 0x10 14. "  [142] ,MSI vector enable 142" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x10 13. " [141] ,MSI vector enable 141" "Disabled,Enabled"
bitfld.long 0x10 12. "  [140] ,MSI vector enable 140" "Disabled,Enabled"
bitfld.long 0x10 11. "  [139] ,MSI vector enable 139" "Disabled,Enabled"
bitfld.long 0x10 10. "  [138] ,MSI vector enable 138" "Disabled,Enabled"
bitfld.long 0x10 9. "  [137] ,MSI vector enable 137" "Disabled,Enabled"
bitfld.long 0x10 8. "  [136] ,MSI vector enable 136" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x10 7. " [135] ,MSI vector enable 135" "Disabled,Enabled"
bitfld.long 0x10 6. "  [134] ,MSI vector enable 134" "Disabled,Enabled"
bitfld.long 0x10 5. "  [133] ,MSI vector enable 133" "Disabled,Enabled"
bitfld.long 0x10 4. "  [132] ,MSI vector enable 132" "Disabled,Enabled"
bitfld.long 0x10 3. "  [131] ,MSI vector enable 131" "Disabled,Enabled"
bitfld.long 0x10 2. "  [130] ,MSI vector enable 130" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x10 1. " [129] ,MSI vector enable 129" "Disabled,Enabled"
bitfld.long 0x10 0. "  [128] ,MSI vector enable 128" "Disabled,Enabled"
line.long 0x14 "MSI_EN_VEC5_0,SATA MSI Vector Enable Register 5"
bitfld.long 0x14 31. " MSI_ENABLE_VECTOR[191] ,MSI vector enable 191" "Disabled,Enabled"
bitfld.long 0x14 30. "  [190] ,MSI vector enable 190" "Disabled,Enabled"
bitfld.long 0x14 29. "  [189] ,MSI vector enable 189" "Disabled,Enabled"
bitfld.long 0x14 28. "  [188] ,MSI vector enable 188" "Disabled,Enabled"
bitfld.long 0x14 27. "  [187] ,MSI vector enable 187" "Disabled,Enabled"
bitfld.long 0x14 26. "  [186] ,MSI vector enable 186" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 25. " [185] ,MSI vector enable 185" "Disabled,Enabled"
bitfld.long 0x14 24. "  [184] ,MSI vector enable 184" "Disabled,Enabled"
bitfld.long 0x14 23. "  [183] ,MSI vector enable 183" "Disabled,Enabled"
bitfld.long 0x14 22. "  [182] ,MSI vector enable 182" "Disabled,Enabled"
bitfld.long 0x14 21. "  [181] ,MSI vector enable 181" "Disabled,Enabled"
bitfld.long 0x14 20. "  [180] ,MSI vector enable 180" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 19. " [179] ,MSI vector enable 179" "Disabled,Enabled"
bitfld.long 0x14 18. "  [178] ,MSI vector enable 178" "Disabled,Enabled"
bitfld.long 0x14 17. "  [177] ,MSI vector enable 177" "Disabled,Enabled"
bitfld.long 0x14 16. "  [176] ,MSI vector enable 176" "Disabled,Enabled"
bitfld.long 0x14 15. "  [175] ,MSI vector enable 175" "Disabled,Enabled"
bitfld.long 0x14 14. "  [174] ,MSI vector enable 174" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 13. " [173] ,MSI vector enable 173" "Disabled,Enabled"
bitfld.long 0x14 12. "  [172] ,MSI vector enable 172" "Disabled,Enabled"
bitfld.long 0x14 11. "  [171] ,MSI vector enable 171" "Disabled,Enabled"
bitfld.long 0x14 10. "  [170] ,MSI vector enable 170" "Disabled,Enabled"
bitfld.long 0x14 9. "  [169] ,MSI vector enable 169" "Disabled,Enabled"
bitfld.long 0x14 8. "  [168] ,MSI vector enable 168" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 7. " [167] ,MSI vector enable 167" "Disabled,Enabled"
bitfld.long 0x14 6. "  [166] ,MSI vector enable 166" "Disabled,Enabled"
bitfld.long 0x14 5. "  [165] ,MSI vector enable 165" "Disabled,Enabled"
bitfld.long 0x14 4. "  [164] ,MSI vector enable 164" "Disabled,Enabled"
bitfld.long 0x14 3. "  [163] ,MSI vector enable 163" "Disabled,Enabled"
bitfld.long 0x14 2. "  [162] ,MSI vector enable 162" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x14 1. " [161] ,MSI vector enable 161" "Disabled,Enabled"
bitfld.long 0x14 0. "  [160] ,MSI vector enable 160" "Disabled,Enabled"
line.long 0x18 "MSI_EN_VEC6_0,SATA MSI Vector Enable Register 6"
bitfld.long 0x18 31. " MSI_ENABLE_VECTOR[223] ,MSI vector enable 223" "Disabled,Enabled"
bitfld.long 0x18 30. "  [222] ,MSI vector enable 222" "Disabled,Enabled"
bitfld.long 0x18 29. "  [221] ,MSI vector enable 221" "Disabled,Enabled"
bitfld.long 0x18 28. "  [220] ,MSI vector enable 220" "Disabled,Enabled"
bitfld.long 0x18 27. "  [219] ,MSI vector enable 219" "Disabled,Enabled"
bitfld.long 0x18 26. "  [218] ,MSI vector enable 218" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 25. " [217] ,MSI vector enable 217" "Disabled,Enabled"
bitfld.long 0x18 24. "  [216] ,MSI vector enable 216" "Disabled,Enabled"
bitfld.long 0x18 23. "  [215] ,MSI vector enable 215" "Disabled,Enabled"
bitfld.long 0x18 22. "  [214] ,MSI vector enable 214" "Disabled,Enabled"
bitfld.long 0x18 21. "  [213] ,MSI vector enable 213" "Disabled,Enabled"
bitfld.long 0x18 20. "  [212] ,MSI vector enable 212" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 19. " [211] ,MSI vector enable 211" "Disabled,Enabled"
bitfld.long 0x18 18. "  [210] ,MSI vector enable 210" "Disabled,Enabled"
bitfld.long 0x18 17. "  [209] ,MSI vector enable 209" "Disabled,Enabled"
bitfld.long 0x18 16. "  [208] ,MSI vector enable 208" "Disabled,Enabled"
bitfld.long 0x18 15. "  [207] ,MSI vector enable 207" "Disabled,Enabled"
bitfld.long 0x18 14. "  [206] ,MSI vector enable 206" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 13. " [205] ,MSI vector enable 205" "Disabled,Enabled"
bitfld.long 0x18 12. "  [204] ,MSI vector enable 204" "Disabled,Enabled"
bitfld.long 0x18 11. "  [203] ,MSI vector enable 203" "Disabled,Enabled"
bitfld.long 0x18 10. "  [202] ,MSI vector enable 202" "Disabled,Enabled"
bitfld.long 0x18 9. "  [201] ,MSI vector enable 201" "Disabled,Enabled"
bitfld.long 0x18 8. "  [200] ,MSI vector enable 200" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 7. " [199] ,MSI vector enable 199" "Disabled,Enabled"
bitfld.long 0x18 6. "  [198] ,MSI vector enable 198" "Disabled,Enabled"
bitfld.long 0x18 5. "  [197] ,MSI vector enable 197" "Disabled,Enabled"
bitfld.long 0x18 4. "  [196] ,MSI vector enable 196" "Disabled,Enabled"
bitfld.long 0x18 3. "  [195] ,MSI vector enable 195" "Disabled,Enabled"
bitfld.long 0x18 2. "  [194] ,MSI vector enable 194" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x18 1. " [193] ,MSI vector enable 193" "Disabled,Enabled"
bitfld.long 0x18 0. "  [192] ,MSI vector enable 192" "Disabled,Enabled"
line.long 0x1C "MSI_EN_VEC7_0,SATA MSI Vector Enable Register 7"
bitfld.long 0x1C 31. " MSI_ENABLE_VECTOR[255] ,MSI vector enable 255" "Disabled,Enabled"
bitfld.long 0x1C 30. "  [254] ,MSI vector enable 254" "Disabled,Enabled"
bitfld.long 0x1C 29. "  [253] ,MSI vector enable 253" "Disabled,Enabled"
bitfld.long 0x1C 28. "  [252] ,MSI vector enable 252" "Disabled,Enabled"
bitfld.long 0x1C 27. "  [251] ,MSI vector enable 251" "Disabled,Enabled"
bitfld.long 0x1C 26. "  [250] ,MSI vector enable 250" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x1C 25. " [249] ,MSI vector enable 249" "Disabled,Enabled"
bitfld.long 0x1C 24. "  [248] ,MSI vector enable 248" "Disabled,Enabled"
bitfld.long 0x1C 23. "  [247] ,MSI vector enable 247" "Disabled,Enabled"
bitfld.long 0x1C 22. "  [246] ,MSI vector enable 246" "Disabled,Enabled"
bitfld.long 0x1C 21. "  [245] ,MSI vector enable 245" "Disabled,Enabled"
bitfld.long 0x1C 20. "  [244] ,MSI vector enable 244" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x1C 19. " [243] ,MSI vector enable 243" "Disabled,Enabled"
bitfld.long 0x1C 18. "  [242] ,MSI vector enable 242" "Disabled,Enabled"
bitfld.long 0x1C 17. "  [241] ,MSI vector enable 241" "Disabled,Enabled"
bitfld.long 0x1C 16. "  [240] ,MSI vector enable 240" "Disabled,Enabled"
bitfld.long 0x1C 15. "  [239] ,MSI vector enable 239" "Disabled,Enabled"
bitfld.long 0x1C 14. "  [238] ,MSI vector enable 238" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x1C 13. " [237] ,MSI vector enable 237" "Disabled,Enabled"
bitfld.long 0x1C 12. "  [236] ,MSI vector enable 236" "Disabled,Enabled"
bitfld.long 0x1C 11. "  [235] ,MSI vector enable 235" "Disabled,Enabled"
bitfld.long 0x1C 10. "  [234] ,MSI vector enable 234" "Disabled,Enabled"
bitfld.long 0x1C 9. "  [233] ,MSI vector enable 233" "Disabled,Enabled"
bitfld.long 0x1C 8. "  [232] ,MSI vector enable 232" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x1C 7. " [231] ,MSI vector enable 231" "Disabled,Enabled"
bitfld.long 0x1C 6. "  [230] ,MSI vector enable 230" "Disabled,Enabled"
bitfld.long 0x1C 5. "  [229] ,MSI vector enable 229" "Disabled,Enabled"
bitfld.long 0x1C 4. "  [228] ,MSI vector enable 228" "Disabled,Enabled"
bitfld.long 0x1C 3. "  [227] ,MSI vector enable 227" "Disabled,Enabled"
bitfld.long 0x1C 2. "  [226] ,MSI vector enable 226" "Disabled,Enabled"
textline "                                         "
bitfld.long 0x1C 1. " [225] ,MSI vector enable 225" "Disabled,Enabled"
bitfld.long 0x1C 0. "  [224] ,MSI vector enable 224" "Disabled,Enabled"
width 0x0B
tree.end
width 20.
tree "Configuration registers"
group.long 0x180++0x1F
line.long 0x00 "CONFIGURATION_0,Configuration"
bitfld.long 0x00 31. " CLKEN_OVERRIDE             ,Override the clock enable in case of a malfunction" "Disabled,Enabled"
sif cpuis("TEGRAX1")
else
bitfld.long 0x00 19. "                  PW_NO_DEVSEL_ERR_CYA    ,Disable detection of DECERR due to no DEVSEL" "No,Yes"
endif
textline "                             "
rbitfld.long 0x00 18. " INITIATOR_READ_IDLE        ,AFI upstream read status" "Busy,Idle"
rbitfld.long 0x00 17. "                      INITIATOR_WRITE_IDLE    ,AFI upstream write status" "Busy,Idle"
textline "                             "
bitfld.long 0x00 15. " WDATA_LEAD_CYA             ,Enable the handling of write data ahead of requests on IPFS AXI" "Disabled,Enabled"
bitfld.long 0x00 14. "                  WR_INTRLV_CYA           ,Disable the handling of interleaved write requests on IPFS AXI" "Disabled,Enabled"
textline "                             "
rbitfld.long 0x00 11. " TARGET_READ_IDLE           ,IPFS target read status" "Busy,Idle"
rbitfld.long 0x00 10. "                      TARGET_WRITE_IDLE       ,IPFS target write status" "Busy,Idle"
textline "                             "
rbitfld.long 0x00 9. " MSI_VEC_EMPTY              ,MSI Vector registers status" "No empty,Empty"
bitfld.long 0x00 7. "                  UFPCI_MSIAW             ,MSI After Write ordering rule" "Default behavior (MSIAW ordering),Interrupt whenever MSI is ready"
textline "                             "
bitfld.long 0x00 6. " UFPCI_PWPASSPW             ,Send input to the upstream FPCI" "Whenever write is ready,Only when PW has retired"
bitfld.long 0x00 5. "  UFPCI_PASSPW            ,Allows the upstream FPCI reads to pass writes" "Not allowed,Allowed"
textline "                             "
bitfld.long 0x00 4. " UFPCI_PWPASSNPW            ,Allows the upstream FPCI PWs to pass NPW" "Not allowed,Allowed"
bitfld.long 0x00 3. "               DFPCI_PWPASSNPW         ,Allows the downstream FPCI PWs to pass NPW" "Not allowed,Allowed"
textline "                             "
bitfld.long 0x00 2. " DFPCI_RSPPASSPW            ,Allows the downstream FPCI responses to pass writes" "Not allowed,Allowed"
bitfld.long 0x00 1. "               DFPCI_PASSPW            ,Allow the downstream FPCI reads to pass writes" "Not allowed,Allowed"
textline "                             "
bitfld.long 0x00 0. " EN_FPCI                    ,Enable FPCI" "Disabled,Enabled"
line.long 0x04 "FPCI_ERROR_MASKS_0,SATAFPCI Error Masks"
bitfld.long 0x04 2. " MASK_FPCI_MASTER_ABORT     ,Allows an FPCI error response indicates a Master Abort" "Return AXI OK,Forward error"
bitfld.long 0x04 1. "             MASK_FPCI_DATA_ERROR    ,Allows an FPCI error response indicates a Data Error" "Return AXI OK,Forward error"
bitfld.long 0x04 0. "  MASK_FPCI_TARGET_ABORT      ,Allows an FPCI error response indicates a Target Abort" "Return AXI OK,Forward error"
line.long 0x08 "INTR_MASK_0,Interrupt Masks"
bitfld.long 0x08 16. " IP_INT_MASK                ,IP interrupt to the CPU complex gated by the mask" "0,1"
bitfld.long 0x08 8. "                         MSI_MASK                ,MSI to the CPU complex gated by the mask" "0,1"
bitfld.long 0x08 0. "              INT_MASK                    ,Interrupt to the CPU complex gated by the mask" "0,1"
line.long 0x0C "INTR_CODE_0,Interrupt Control"
bitfld.long 0x0C 0.--4. " INT_CODE                   ,Eight interrupt codes" "CLEAR,INI_SLVERR,INI_DECERR,TGT_SLVERR,TGT_DECERR,TGT_WRERR,,DFPCI_DECERR,AXI_DECERR,TIMEOUT,,,,,,SM_FATAL_ERROR,SM_NON_FATAL_ERROR,?..."
line.long 0x10 "INTR_SIGNATURE_0,Interrupt Signature"
hexmask.long 0x10 2.--31. 0x4 " INT_INFO                   ,Interrupt info (Address bits for interrupt codes)"
bitfld.long 0x10 0. "                  DIR                     ,Direction of the AXI/FPCI transaction" "Write,Read"
line.long 0x14 "UPPER_FPCI_ADDR_0,Upper FPCI Address"
hexmask.long.byte 0x14 0.--7. 0x01 " INT_INFO_UPPER             ,Upper byte of the captured FPCI address (for interrupt code: 3, 4 or 7)"
line.long 0x18 "IPFS_INTR_ENABLE_0,IPFS Interrupt Enable"
bitfld.long 0x18 13. " EN_SM_NON_FATAL_ERROR      ,Enable bit for interrupt code 15" "Disabled,Enabled"
bitfld.long 0x18 12. "                  EN_SM_FATAL_ERROR       ,Enable bit for interrupt code 14" "Disabled,Enabled"
bitfld.long 0x18 7. "       EN_FPCI_TIMEOUT             ,Enable bit for interrupt code 9" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 6. " EN_AXI_DECERR              ,Enable bit for interrupt code 8" "Disabled,Enabled"
bitfld.long 0x18 5. "                  EN_DFPCI_DECERR         ,Enable bit for interrupt code 7" "Disabled,Enabled"
bitfld.long 0x18 4. "       EN_TGT_WRERR                ,Enable bit for interrupt code 5" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 3. " EN_TGT_DECERR              ,Enable bit for interrupt code 4" "Disabled,Enabled"
bitfld.long 0x18 2. "                  EN_TGT_SLVERR           ,Enable bit for interrupt code 3" "Disabled,Enabled"
bitfld.long 0x18 1. "       EN_INI_DECERR               ,Enable bit for interrupt code 2" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 0. " EN_INI_SLVERR              ,Enable bit for interrupt code 1" "Disabled,Enabled"
line.long 0x1C "UFPCI_CONFIG_0,Upstream FPCI Configuration"
bitfld.long 0x1C 0.--4. " UNITID_T0C0                ,Upstream FPCI Unit ID for controller 0. HyperTransport (Upstream FPCI request)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x1A0++0x0B
line.long 0x00 "CFG_REVID_0,CFG_REVID Register"
rbitfld.long 0x00 19. " DEV2SM_NONISO_REQUEST_PEND ,There is a non-ISO request pending" "Not pending,Pending"
rbitfld.long 0x00 18. "               DEV2SM_ISO_REQUEST_PEND ,There is an ISO request pending" "Not pending,Pending"
bitfld.long 0x00 12.--13. "    STRAP_CPU_MODE              ,MCP: Mode to send MSI" "NB_INTEL,NB_AMD,AMD,TMTA"
textline "                             "
bitfld.long 0x00 11. " CFG_REVID_WRITE_ENABLE     ,Enable to override the rev ID" "Clear,Set"
bitfld.long 0x00 10. "                     CFG_REVID_OVERRIDE      ,Provides a way to override the current revision ID" "Disabled,Enabled"
rbitfld.long 0x00 4. "       DEV2LEG_NONCOH_REQUEST_PEND ,Tells the leg block that a non-coherent request is pending" "Not pending,Pending"
textline "                             "
rbitfld.long 0x00 3. " DEV2LEG_COH_REQUEST_PEND   ,Tells the leg block that a coherent request is pending" "Not pending,Pending"
bitfld.long 0x00 2. "               SM2DEV_FPCI_TIMEOUT_EN  ,FPCI timeout enable bit for Controller" "Disabled,Enabled"
line.long 0x04 "FPCI_TIMEOUT_0,FPCI_TIMEOUT Register"
hexmask.long.tbyte 0x04 0.--19. 1. " SM2ALL_FPCI_TIMEOUT_THRESH ,Timeout threshold value for the FPCI bus"
line.long 0x08 "TOM_0,Top Of Memory Limit"
hexmask.long.word 0x08 16.--29. 1. " LEG2ALL_TOM2               ,Top of Memory Limit 2"
hexmask.long.word 0x08 0.--11. 1. "                      LEG2ALL_TOM1            ,Top of Memory Limit 1"
textline "                                          "
width 33.
rgroup.long 0x1AC++0x0B
line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending"
hexmask.long.byte 0x00 0.--7. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND  ,Number of pending initiator ISO PW responses"
line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending"
hexmask.long.byte 0x04 0.--7. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND ,Number of pending initiator NISO PW responses"
line.long 0x08 "INTR_STATUS_0,IPFS Interrupt Status"
bitfld.long 0x08 2. " IP_INTR_STATUS                  ,Status of IP interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 1. "  MSI_INTR_STATUS ,Status of MSI interrupt" "No interrupt,Interrupt"
bitfld.long 0x08 0. "  IPFS_INTR_STATUS ,Status of IPFS interrupt" "No interrupt,Interrupt"
textline "                               "
width 22.
group.long 0x1B8++0x07
line.long 0x00 "DFPCI_BEN_0,Downstream FPCI Byte Enables"
bitfld.long 0x00 31. " EN_DFPCI_BEN      ,Enable bit for BEN" "Disabled,Enabled"
bitfld.long 0x00 0.--3. "     DFPCI_BYTE_ENABLE_N ,Active low byte enables" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CLKGATE_HYSTERESIS_0,CLKGATE HYSTERESIS 0"
hexmask.long.byte 0x04 0.--7. 1. " CLK_DISABLE_CNT   ,Number of IPFS clock cycles to wait after clock gating criteria is met to disable IPFS/FPCI clocks"
sif !cpuis("TEGRAX2")
group.long 0x1DC++0x03
line.long 0x00 "MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control Register"
bitfld.long 0x00 20. " RCLK_OVR_MODE     ,RCLK OVR MODE" "Legacy,On"
bitfld.long 0x00 19. "       WCLK_OVR_MODE       ,RCLK OVR MODE" "Legacy,On"
bitfld.long 0x00 18. "       CCLK_OVERRIDE     ,CCLK OVERRIDE" "No override,Override"
textline "                               "
bitfld.long 0x00 17. " RCLK_OVERRIDE     ,RCLK OVERRIDE" "No override,Override"
bitfld.long 0x00 16. "  WCLK_OVERRIDE       ,WCLK OVERRIDE" "No override,Override"
bitfld.long 0x00 3. "  MCCIF_RDCL_RDFAST ,MCCIF RDCL RDFAST" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 2. " MCCIF_WRMC_CLLE2X ,MCCIF WRMC CLLE2X" "Disabled,Enabled"
bitfld.long 0x00 1. "     MCCIF_RDMC_RDFAST   ,MCCIF RDMC RDFAST" "Disabled,Enabled"
bitfld.long 0x00 0. "     MCCIF_WRCL_MCLE2X ,MCCIF WRCL MCLE2X" "Disabled,Enabled"
endif
textline "                           "
width 18.
group.long 0x1E0++0x0B
line.long 0x00 "ORDERING_RULES_0,ORDERING RULES"
sif cpuis("TEGRAX1")
bitfld.long 0x00 3. " UPSTREAM_MSIAW                ,Modified Upstream MSIAW ordering" "Tegra X1,Tegra 3"
bitfld.long 0x00 2. "  UPSTREAM_RESPAW                     ,Modified RespAW ordering." "Tegra X1,Tegra 3"
bitfld.long 0x00 1. "     UPSTREAM_RAW                      ,Modified RAW ordering" "Tegra X1,Tegra 3"
elif cpuis("TEGRAX2")
bitfld.long 0x00 3. " UPSTREAM_MSIAW                ,Modified Upstream MSIAW ordering" "Parker,Parker 3"
bitfld.long 0x00 2. "  UPSTREAM_RESPAW                     ,Modified RespAW ordering." "Parker,Parker 3"
bitfld.long 0x00 1. "     UPSTREAM_RAW                      ,Modified RAW ordering" "Parker,Parker 3"
else
bitfld.long 0x00 3. " UPSTREAM_MSIAW                ,Modified Upstream MSIAW ordering" "Tegra K1,Tegra 3"
bitfld.long 0x00 2. "  UPSTREAM_RESPAW                     ,Modified RespAW ordering." "Tegra K1,Tegra 3"
bitfld.long 0x00 1. "     UPSTREAM_RAW                      ,Modified RAW ordering" "Tegra K1,Tegra 3"
endif
line.long 0x04 "A2F_UFPCI_CFG0_0,A2F UFPCI CFG0"
hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR         ,Static wait idle control"
bitfld.long 0x04 16.--18. "        STATIC_UFPCI_UFA_STARVE_CNTR_PRI1   ,Static UFPCI UFA starve Control PRI1" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--15. "            STATIC_UFPCI_UFA_STARVE_CNTR_PRI0 ,Static UFPCI UFA starve control PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                           "
bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,Static UFPCI RR burst SZ PRI1" "0,1,2,3"
bitfld.long 0x04 8.--9. "         STATIC_UFPCI_RR_BURST_SZ_PRI0       ,Static UFPCI RR burst SZ PRI0" "0,1,2,3"
bitfld.long 0x04 7. "            STATIC_WAIT_CLAMP_EN              ,Static wait clamp enable" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,Static UFPCI UFA DYN block enable" "Disabled,Enabled"
bitfld.long 0x04 5. "  STATIC_UFPCI_UFA_BLK_COHERENT       ,Static UFPCI UFA BLK coherent" "No coherent,Coherent"
bitfld.long 0x04 2.--4. "  STATIC_UFPCI_BLOCK_CMD_THRESHOLD  ,Static UFPCI block CMD threshold" "0,1,2,3,4,5,6,7"
textline "                           "
bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB            ,Static CYA UFA ARB" "0,1"
bitfld.long 0x04 0. "         STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,Static CYA back to back upstream block" "0,1"
line.long 0x08 "A2F_UFPCI_CFG1_0,A2F UFPCI CFG1"
hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR      ,Static wait unclamp control"
tree.end
width 0x0B
tree.end
tree "SATA0 Configuration space"
base ad:0x70021000
tree "PCI Configuration Registers"
width 8.
rgroup.long 0x00++0x03
line.long 0x00 "CFG_0,PCI Vendor and Device ID Register"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT         ,Identify the particular device"
hexmask.long.word 0x00 0.--15. 1. "         VENDOR_ID          ,Identify the manufacturer of the device"
group.long 0x04++0x03
line.long 0x00 "CFG_1,PCI Device Control Register"
rbitfld.long 0x00 31. " DETECTED_PERR          ,Indicates that the device has detected a parity error" "Not active,Active"
eventfld.long 0x00 30. "   SIGNALED_SERR      ,Indicates that the device has asserted SERR#" "Not active,Active"
eventfld.long 0x00 29. "     RECEIVED_MASTER ,Indicates that a master device's transaction (except for Special Cycle) was terminated with a master-abort" "Not aborted,Aborted"
textline "                 "
eventfld.long 0x00 28. " RECEIVED_TARGET        ,Indicates that a master device's transaction was terminated with a target-abort" "Not aborted,Aborted"
rbitfld.long 0x00 27. "  SIGNALED_TARGET    ,Indicates that the device has terminated a transaction with target-abort" "Not aborted,Aborted"
rbitfld.long 0x00 25.--26. "    DEVSEL_TIMING   ,The timing of DEVSEL#" "Fast,Medium,Slow,?..."
textline "                 "
rbitfld.long 0x00 24. " CFG_1_MASTER_DATA_PERR ,MASTER_DATA_PERR" "NOT_ACTIVE,?..."
rbitfld.long 0x00 23. "   FAST_BACK2BACK     ,Back-to-back transfers handling capability" "Not supported,Supported"
rbitfld.long 0x00 21. "  66MHZ           ,66 MHz PCI Bus operation capability" "Not supported,Supported"
textline "                 "
rbitfld.long 0x00 20. " CAPLIST                ,Capabilities list presence" "Not present,Present"
rbitfld.long 0x00 19. "  INTR_STATUS        ,State of the interrupt in the device/function" "0,1"
bitfld.long 0x00 10. "              INTR_DISABLE    ,Disables the assertion of INTx# signal" "No,Yes"
textline "                 "
rbitfld.long 0x00 9. " BACK2BACK              ,BACK2BACK Enable" "Disabled,Enabled"
bitfld.long 0x00 8. "     SERR               ,SERR Enable" "Disabled,Enabled"
rbitfld.long 0x00 7. "       STEP            ,STEP Enable" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 6. " PERR                   ,PERR Enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "     PALETTE_SNOOP      ,Special palette snooping behaviour enable" "Disabled,Enabled"
rbitfld.long 0x00 4. "       WRITE_AND_INVAL ,Memory Write and Invalidate command usage enable" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 3. " SPECIAL_CYCLE          ,SPECIAL_CYCLE Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     BUS_MASTER         ,Bus master behaviour Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       MEMORY_SPACE    ,Memory space addresses Enable" "Disabled,Enabled"
textline "                 "
bitfld.long 0x00 0. " IO_SPACE               ,IO Space addresses Enable" "Disabled,Enabled"
rgroup.long 0x08++0x07
line.long 0x00 "CFG_2,PCI Revision ID and Class Code Register"
hexmask.long.word 0x00 16.--31. 1. " CLASS_CODE             ,Identifies generic function of the device"
bitfld.long 0x00 15. "         BUS_MASTER         ,Bus mastering capability" ",YES"
bitfld.long 0x00 11. "            SEC_PROG_IND    ,Secondary Programmable Indicator" "No,?..."
textline "                 "
bitfld.long 0x00 10. " SEC_OP_MODE            ,Secondary Operating Mode" "COMP,?..."
bitfld.long 0x00 9. "         PRI_PROG_IND       ,Primary Programmable Indicator" "NO,?..."
bitfld.long 0x00 8. "             PRI_OP_MODE     ,Primary Operating Mode" "COMP,NTV"
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID            ,Device specific revision identifier"
line.long 0x04 "CFG_3,PCI Configuration Register"
bitfld.long 0x04 23. " HEADER_TYPE_FUNC       ,CFG_3_HEADER_TYPE_FUNC" "Single,Multi"
hexmask.long.byte 0x04 16.--22. 1. "       HEADER_TYPE_DEVICE ,Layout of the bytes [3F:10] in configuration space and single/multiple function capability identification"
bitfld.long 0x04 11.--15. "             LATENCY_TIMER   ,Latency Timer value" "0_CLOCKS,8_CLOCKS,16_CLOCKS,24_CLOCKS,32_CLOCKS,40_CLOCKS,48_CLOCKS,56_CLOCKS,64_CLOCKS,72_CLOCKS,80_CLOCKS,88_CLOCKS,96_CLOCKS,104_CLOCKS,112_CLOCKS,120_CLOCKS,128_CLOCKS,136_CLOCKS,144_CLOCKS,152_CLOCKS,160_CLOCKS,168_CLOCKS,176_CLOCKS,184_CLOCKS,192_CLOCKS,200_CLOCKS,208_CLOCKS,216_CLOCKS,224_CLOCKS,232_CLOCKS,240_CLOCKS,248_CLOCKS"
textline "                 "
hexmask.long.byte 0x04 0.--7. 1. " CACHE_LINE_SIZE        ,CFG_3_CACHE_LINE_SIZE"
group.long 0x10++0x17
line.long 0x00 "CFG_4,PCI Configuration Register"
hexmask.long 0x00 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x00 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x04 "CFG_5,PCI Configuration Register"
hexmask.long 0x04 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x04 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x08 "CFG_6,PCI Configuration Register"
hexmask.long 0x08 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x08 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x0C "CFG_7,PCI Configuration Register"
hexmask.long 0x0C 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x0C 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x10 "CFG_8,PCI Configuration Register"
hexmask.long 0x10 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x10 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x14 "CFG_9,PCI Memory BAR for AHCI Register"
hexmask.long 0x14 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x14 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
rgroup.long 0x2C++0x03
line.long 0x00 "CFG_11,PCI Subsystem Vendor ID and Subsystem ID Register"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID           ,SUBSYSTEM ID"
hexmask.long.word 0x00 0.--15. 1. "         VENDOR_ID          ,VENDOR ID"
rgroup.long 0x34++0x03
line.long 0x00 "CFG_13,PCI Capability Pointer Register"
hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR                ,Offset into configuration space where the capabilities list begins"
group.long 0x3C++0x03
line.long 0x00 "CFG_15,PCI Configuration Register"
hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT                ,Maximum time required to gain access to the PCI"
hexmask.long.byte 0x00 16.--23. 1. "           MIN_GNT            ,Burst period assuming 33MHz CLK rate"
hexmask.long.byte 0x00 8.--15. 1. "             INTR_PIN        ,Interrupt pin used by the device"
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE              ,Interrupt routing information"
tree.end
tree "Device Specific Configuration Registers"
width 15.
group.long 0x40++0x03
line.long 0x00 "CFG_16,Write Subsystem Vendor ID and Subsystem ID Register"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID            ,Subsystem ID"
hexmask.long.word 0x00 0.--15. 1. "        VENDOR_ID             ,Vendor ID"
sif !CPUIS("TEGRAX2")
rgroup.long 0x44++0x03
line.long 0x00 "CFG_17,PCI Power Management Capabilities Register"
bitfld.long 0x00 31. " PME_SUPPORT_D3C         ,PME_SUPPORT_D3C" "NO,YES"
bitfld.long 0x00 30. "         PME_SUPPORT_D3H       ,PME_SUPPORT_D3H" "NO,YES"
bitfld.long 0x00 29. "       PME_SUPPORT_D2        ,PME_SUPPORT_D2" "NO,YES"
textline "                        "
bitfld.long 0x00 28. " PME_SUPPORT_D1          ,PME_SUPPORT_D1" "NO,YES"
bitfld.long 0x00 27. "         PME_SUPPORT_D0        ,PME_SUPPORT_D0" "NO,YES"
bitfld.long 0x00 26. "       D2_SUPPORT            ,D2_SUPPORT" "NO,YES"
textline "                        "
bitfld.long 0x00 25. " D1_SUPPORT              ,D1_SUPPORT" "NO,YES"
bitfld.long 0x00 22.--24. "         AUX_CURRENT           ,AUX_CURRENT" "0,55MA,100MA,160MA,220MA,270MA,320MA,375MA"
bitfld.long 0x00 21. "     DEV_SPEC_INIT         ,DEV_SPEC_INIT" "NOT_NEEDED,NEEDED"
textline "                        "
bitfld.long 0x00 19. " PME_CLOCK               ,PME_CLOCK" "NOT_NEEDED,NEEDED"
bitfld.long 0x00 16.--18. "  PCIPM_REV             ,PCIPM_REV" ",,11,?..."
hexmask.long.byte 0x00 8.--15. 1. "        NEXT_PTR              ,NEXT_PTR"
textline "                        "
hexmask.long.byte 0x00 0.--7. 1. " CAP_ID                  ,CAP_ID"
group.long 0x48++0x03
line.long 0x00 "CFG_18,PCI Power Management Control/Status Register"
rbitfld.long 0x00 15. " PME_STATUS              ,PME Status" "NOT_ACTIVE,?..."
rbitfld.long 0x00 8. "  PME                   ,PME Enable" "Disabled,?..."
bitfld.long 0x00 0.--1. "  PM_STATE              ,Current power state" "D0,D1,D2,D3hot"
endif
group.long 0x54++0x03
line.long 0x00 "FPCI_SW,FPCI_SW"
bitfld.long 0x00 8. " WAKEUP_PLL              ,WAKEUP_PLL" "0,1"
bitfld.long 0x00 0. "           IDDQ_PG               ,IDDQ_PG" "0,1"
sif !CPUIS("TEGRAX2")
rgroup.long 0x8C++0x07
line.long 0x00 "ATACAP0,Serial ATA Capability Register 0"
bitfld.long 0x00 20.--23. " MAJREV                  ,MAJREV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "          MINREV                ,MINREV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "        CID                   ,CID_SATA"
line.long 0x04 "ATACAP1,Serial ATA Capability Register 1"
hexmask.long.word 0x04 4.--15. 1. " BAROFST                 ,BAROFST"
bitfld.long 0x04 0.--3. "        BARLOC                ,BARLOC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x94++0x03
line.long 0x00 "CFG_35,Serial ATA IDP Index"
hexmask.long.word 0x00 2.--12. 1. " IDP_INDEX               ,IDP_INDEX"
group.long 0x98++0x03
line.long 0x00 "AHCI_IDP1,Serial ATA IDP DATA"
group.long 0xB0++0x0F
line.long 0x00 "MSI_CTRL,MSI Message Control and Capability Register"
rbitfld.long 0x00 24. " VECTOR_MASK_CAP         ,MSI-per-vector masking support" "DIS,EN"
rbitfld.long 0x00 23. "         64_ADDR_CAP           ,64-bit message address generation capability" "DIS,EN"
bitfld.long 0x00 20.--22. "       MULT_MSG_ENABLE       ,Number of allocated vectors" "1,2,3,4,16,32,?..."
textline "                        "
rbitfld.long 0x00 17.--19. " MULT_MSG_CAP            ,Number of requested vectors" "1,2,4,8,16,32,?..."
bitfld.long 0x00 16. "          MSI_ENABLE            ,MSI capability enable" "OFF,ON"
hexmask.long.byte 0x00 8.--15. 1. "       NEXT_PTR              ,Identifies the next item in the capabilities list"
textline "                        "
hexmask.long.byte 0x00 0.--7. 1. " CAP_ID                  ,MSI capability block"
line.long 0x04 "MSI_ADDR1,MSI Message Address Register"
hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR                ,System-specified message address"
line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA                ,System-specified message"
endif
group.long 0xC0++0x03
line.long 0x00 "MSI_QUEUE,MSI Message Queue Configuration Register"
bitfld.long 0x00 3. " MSI_QUEUE3              ,MSI message to VC queue 3 send enable" "Disabled,Enabled"
bitfld.long 0x00 2. "    MSI_QUEUE2            ,MSI message to VC queue 2 send enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  MSI_QUEUE1            ,MSI message to VC queue 1 send enable" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0. " MSI_QUEUE0              ,MSI message to VC queue 0 send enable" "Disabled,Enabled"
sif !CPUIS("TEGRAX2")
group.long 0xEC++0x03
line.long 0x00 "MSI_MAP,MSI Mapping Capability Register"
rbitfld.long 0x00 27.--31. " CAP_TYPE                , MSI Mapping Capability" ",,,,,,,,,,,,,,,Default,?..."
rbitfld.long 0x00 17. "     FIXD                  ,Indicates that the next 2 dwords for programmable address are present in the capability" "OFF,ON"
bitfld.long 0x00 16. "       EN                    ,Mapping activity" "OFF,ON"
textline "                        "
hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR                ,NEXT_PTR field points to the next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "          CAP_ID                ,HT capability list item identification"
endif
group.long 0xF0++0x0F
line.long 0x00 "INDIRECT_IDP0,IDP pair to access 257-4K address space - Address register"
hexmask.long.word 0x00 2.--11. 1. " IDP_INDEX               ,IDP_INDEX"
line.long 0x04 "INDIRECT_IDP1,IDP pair to access 257-4K address space - DATA register"
line.long 0x08 "FPCICFG,FPCI Debug register"
bitfld.long 0x08 28.--31. " DEVID_OVERRIDE_ID       ,DEVID_OVERRIDE_ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 27. "          DEVID_OVERRIDE_ENABLE ,DEVID_OVERRIDE_ENABLE: Indicates a Linux system when set" "OFF,ON"
bitfld.long 0x08 26. "       DROP_ON_TA_ERR_ENABLE ,DROP_ON_TA_ERR_ENABLE" "OFF,ON"
textline "                        "
bitfld.long 0x08 25. " DROP_ON_MA_ERR_ENABLE   ,DROP_ON_MA_ERR_ENABLE" "OFF,ON"
bitfld.long 0x08 24. "         DROP_ON_ERR_ENABLE    ,DROP_ON_ERR_ENABLE" "OFF,ON"
bitfld.long 0x08 23. "       FIX_DEADLOCK_ENABLE   ,FIX_DEADLOCK_ENABLE" "OFF,ON"
textline "                        "
bitfld.long 0x08 22. " PASSIVE_UID_CLMP_ENABLE ,PASSIVE_UID_CLMP_ENABLE" "OFF,ON"
rbitfld.long 0x08 21. "         PASSIVE_UID_CLMP      ,PASSIVE_UID_CLMP" "NOT_SUPP,SUPP"
bitfld.long 0x08 16.--20. "  NONISO_READ_CREDITS   ,NONISO_READ_CREDITS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                        "
bitfld.long 0x08 15. " ERR_SEVERITY            , ERR_SEVERITY" "NONFATAL,FATAL"
bitfld.long 0x08 14. "    TGTDONE_PASSPW        ,TGTDONE_PASSPW" "CLR,SET"
bitfld.long 0x08 8. "       CREDIT_SYS_ENABLE     ,Read credit system enable" "OFF,ON"
textline "                        "
bitfld.long 0x08 6.--7. " COHCMD                  ,COHCMD" "TOY,COH,NONCOH,?..."
bitfld.long 0x08 4.--5. "      RSPPASSPW             ,Issue of non-posted commands" "TOY,PASS,NOPASS,?..."
bitfld.long 0x08 2.--3. "    PASSPW                ,Issue of non-broadcast commands" "TOY,PASS,NOPASS,?..."
textline "                        "
bitfld.long 0x08 0.--1. " ISOCMD                  ,Issue of ISO/NONISO-counterparts influenced commands issue" "TOY,ISO,NONISO,?..."
line.long 0x0C "SCRATCH_1,General purpose scratch register used for communication between the storage SW and the SBIOS"
textline "                        "
width 16.
group.long 0x114++0x0F
line.long 0x00 "NVOOB,Serial ATA internal PHY control register used in nvoob"
bitfld.long 0x00 31. " RETIMED_FAREND_LOOPBACK_EN   ,SATA controller farend retimed loopback mode enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "  COMMA_CNT                     ,The number of comma characters seen for the phy_rdy to go high after going through OOB signalling" "0,16,32,48,64,80,96,112"
textline "                         "
bitfld.long 0x00 26.--27. " SQUELCH_FILTER_LENGTH        ,Amount of glitch duration that are filtered out" "6.66ns,13.32ns,19.98ns,26.64ns"
bitfld.long 0x00 24.--25. "   SQUELCH_FILTER_MODE           ,Squelch signal filtering mode selection" "NONE,LOW,HIGH,?..."
line.long 0x04 "CROSS_BAR,SATA CROSS BAR: contains the phy_select"
line.long 0x08 "PMUCTL,SATA PHY Control Register"
rbitfld.long 0x08 24.--27. " CORE_STS                     ,Current core_act_sts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 16.--23. 1. "        DEV_STS_HOLD                  ,Number of txclk cycles to hold the dev_act_tog and dev_act_sts"
textline "                         "
bitfld.long 0x08 8. " HOLD_SEND_ALIGN_DIS          ,HOLD_SEND_ALIGN_DIS" "NO,YES"
bitfld.long 0x08 2. "       FORCE_CORE_CLAMP              ,Core clock clamp enable" "DIS,EN"
line.long 0x0C "CFG_PHY_0,CFG_PHY_0"
bitfld.long 0x0C 31. " HOLD_RX_STAT_IDLE_IN_BIST    ,HOLD_RX_STAT_IDLE_IN_BIST" "0,1"
bitfld.long 0x0C 30. "         RESET_SREGS_EVERY_COMRESET    ,RESET_SREGS_EVERY_COMRESET" "0,1"
textline "                         "
bitfld.long 0x0C 29. " ASSERT_PHYRDY_IN_NVOOB_SM    ,ASSERT_PHYRDY_IN_NVOOB_SM" "NO,YES"
bitfld.long 0x0C 28. "       USE_STORED_COMWAKE            ,USE_STORED_COMWAKE" "0,1"
textline "                         "
bitfld.long 0x0C 27. " RX_STAT_IDLE                 ,RX_STAT_IDLE" "0,1"
bitfld.long 0x0C 26. "         ASSERT_PHYRDY_EVEN_NOT_HRRDY  ,ASSERT_PHYRDY_EVEN_NOT_HRRDY" "NO,YES"
textline "                         "
bitfld.long 0x0C 25. " ASSERT_PHYRDY_FOR_BIST       ,ASSERT_PHYRDY_FOR_BIST" "NO,YES"
bitfld.long 0x0C 24. "       MASK_SQUELCH                  ,MASK_SQUELCH" "NO,YES"
textline "                         "
bitfld.long 0x0C 22.--23. " RX_SLEEP_ACTIVE              ,RX_SLEEP_ACTIVE" "0,1,2,3"
bitfld.long 0x0C 20.--21. "         RX_SLEEP_PARTIAL              ,RX_SLEEP_PARTIAL" "0,1,2,3"
textline "                         "
bitfld.long 0x0C 18.--19. " RX_SLEEP_SLUMBER             ,RX_SLEEP_SLUMBER" "0,1,2,3"
bitfld.long 0x0C 16.--17. "         TX_SLEEP_ACTIVE               ,TX_SLEEP_ACTIVE" "0,1,2,3"
textline "                         "
bitfld.long 0x0C 14.--15. " TX_SLEEP_PARTIAL             ,TX_SLEEP_PARTIAL" "0,1,2,3"
bitfld.long 0x0C 12.--13. "         TX_SLEEP_SLUMBER              ,TX_SLEEP_SLUMBER" "0,1,2,3"
textline "                         "
bitfld.long 0x0C 11. " USE_7BIT_ALIGN_DET_FOR_SPD   ,USE_7BIT_ALIGN_DET_FOR_SPD" "NO,YES"
bitfld.long 0x0C 10. "       OOB_COMINIT_UNMASK            ,OOB_COMINIT_UNMASK" "NO,YES"
textline "                         "
bitfld.long 0x0C 9. " SEND_COMRESET_ON_WARMRESET   ,SEND_COMRESET_ON_WARMRESET: Indicates that COMRESET will not be sent on a WARM_RESET" "NO,YES"
bitfld.long 0x0C 8. "       DONT_INSERT_ALIGNS_IN_BIST_L  ,DONT_INSERT_ALIGNS_IN_BIST_L: Indicates that Aligns will not be inserted when in BIST_L mode to avoid overflow" "NO,YES"
textline "                         "
bitfld.long 0x0C 7. " SSTS_DET_1_IN_PART_SLUMBER   ,SSTS_DET_1_IN_PART_SLUMBER: Indicates that ssts_det will be made one when we go to PARTIAL/ SLUMBER" "NO,YES"
textline "                         "
bitfld.long 0x0C 6. " PLL_IDDQ_OVERRIDE_VAL        ,PLL_IDDQ_OVERRIDE_VAL" "NO,YES"
bitfld.long 0x0C 5. "       PLL_IDDQ_OVERRIDE             ,PLL_IDDQ_OVERRIDE" "NO,YES"
textline "                         "
bitfld.long 0x0C 0.--4. " RBC_RESET_DELAY              ,Number of tx_clk ticks (300MHz) between the deassertion of sata2phy_ch{1,2}_cdr_reset and the release of ch{1,2}_rbc_reset_" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x124++0x07
line.long 0x00 "CFG_PHY_POWER,CFG_PHY_POWER"
hexmask.long.byte 0x00 24.--31. 1. " COUNT_FOR_1_US               ,COUNT_FOR_1_US"
hexmask.long.word 0x00 10.--23. 1. "        COUNT_FOR_100_US              ,COUNT_FOR_100_US"
textline "                         "
hexmask.long.word 0x00 0.--9. 1. " TIME_WAIT_IN_PARTIAL         ,Time in ms up to which the PHY SM would wait in PARTIAL before going to SLUMBER"
line.long 0x04 "CFG_PHY_POWER_1,CFG_PHY_POWER_1"
hexmask.long.word 0x04 20.--31. 1. " COUNTER_FOR_PADS             ,COUNTER_FOR_PADS"
hexmask.long.tbyte 0x04 0.--19. 1. "      COUNT_FOR_1_MS                ,Number of clock cycles for one ms at 150 MHz"
group.long 0x12C++0x0F
line.long 0x00 "CFG_PHY_1,CFG_PHY_1"
bitfld.long 0x00 26. " DONT_CHK_PHY_RESET           ,DONT_CHK_PHY_RESET" "0,1"
bitfld.long 0x00 25. "         COMWAKE_GLOBAL                ,COMWAKE_GLOBAL" "0,1"
textline "                         "
bitfld.long 0x00 24. " PLL_PD_NO_CMDS               ,PLL_PD_NO_CMDS" "0,1"
bitfld.long 0x00 23. "         PADS_IDDQ_EN                  ,PADS_IDDQ_EN" "0,1"
textline "                         "
bitfld.long 0x00 22. " PAD_PLL_IDDQ_EN              ,PAD_PLL_IDDQ_EN" "0,1"
bitfld.long 0x00 21. "         SEND_OOB_DATA_IN_LOW_POWER    ,SEND_OOB_DATA_IN_LOW_POWER" "0,1"
textline "                         "
bitfld.long 0x00 20. " NO_OVERRIDE_STAT_IDLE_PHYRDY ,NO_OVERRIDE_STAT_IDLE_PHYRDY" "0,1"
bitfld.long 0x00 16.--19. "         NUMBER_OF_COMMA_WINDOWS       ,NUMBER_OF_COMMA_WINDOWS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
hexmask.long.word 0x00 4.--15. 1. " COUNT_FOR_COMMA_WAIT         ,COUNT_FOR_COMMA_WAIT"
bitfld.long 0x00 3. "      DONT_USE_COMMA_FOR_PHYRDY_LOW ,DONT_USE_COMMA_FOR_PHYRDY_LOW" "0,1"
textline "                         "
bitfld.long 0x00 2. " EN_ASYNC_REC_ARC_IN_HRRDY    ,EN_ASYNC_REC_ARC_IN_HRRDY" "0,1"
bitfld.long 0x00 1. "         HOLD_RBC_RESET_IN_BIST        ,HOLD_RBC_RESET_IN_BIST" "0,1"
textline "                         "
bitfld.long 0x00 0. " ASSERT_PHYRDY_FOR_ALL_BIST   ,ASSERT_PHYRDY_FOR_ALL_BIST" "0,1"
line.long 0x04 "CFG2NVOOB_1,CFG2NVOOB_1"
hexmask.long.word 0x04 18.--26. 1. " COMINIT_IDLE_CNT_HIGH        ,COMINIT_IDLE_CNT_HIGH"
hexmask.long.word 0x04 9.--17. 1. "      ACTIVE_CNT_LOW                ,ACTIVE_CNT_LOW"
textline "                         "
hexmask.long.word 0x04 0.--8. 1. " ACTIVE_CNT_HIGH              ,ACTIVE_CNT_HIGH"
line.long 0x08 "CFG2NVOOB_2,CFG2NVOOB_2"
hexmask.long.word 0x08 18.--26. 1. " COMINIT_IDLE_CNT_LOW         ,COMINIT_IDLE_CNT_LOW"
hexmask.long.word 0x08 9.--17. 1. "      ACTIVE_CNT_HIGH               ,ACTIVE_CNT_HIGH"
textline "                         "
hexmask.long.word 0x08 0.--8. 1. " ACTIVE_CNT_LOW               ,ACTIVE_CNT_LOW"
line.long 0x0C "CFG_PHY_ACTIVE,CFG_PHY_ACTIVE"
hexmask.long.tbyte 0x0C 10.--31. 1. " FROM_SLUMBER                 ,Time to be in SLUMEBR state after we receive a COMWAKE from the device or the Link Layer lowers the slumber flag"
hexmask.long.word 0x0C 0.--9. 1. "    FROM_PARTIAL                  ,Time to be in PARTIAL state after we receive a COMWAKE from the device or the Link Layer lowers the partial flag"
group.long 0x170++0x13
line.long 0x00 "FIFO,FIFO"
bitfld.long 0x00 16.--19. " P2L_FIFO_DEPTH               ,Effective depth of p2l FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "        L2P_FIFO_DEPTH                ,Effective depth of l2p FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CFG_LINK_0,CFG_LINK_0"
bitfld.long 0x04 24. " USE_POSEDGE_SCTL_DET         ,USE_POSEDGE_SCTL_DET" "0,1"
bitfld.long 0x04 23. "         USE_DET_OR_PSM2LL_RESET       ,USE_DET_OR_PSM2LL_RESET" "0,1"
textline "                         "
bitfld.long 0x04 22. " HARDCODE_DISPARITY_ON_WAKE   ,HARDCODE_DISPARITY_ON_WAKE" "NO,YES"
bitfld.long 0x04 21. "       USE_IS_PRIM_FOR_BIST          ,USE_IS_PRIM_FOR_BIST" "0,1"
textline "                         "
bitfld.long 0x04 20. " WAIT_FOR_PSM_FOR_PMOFF       ,WAIT_FOR_PSM_FOR_PMOFF" "0,1"
bitfld.long 0x04 19. "         USE_AHCI_MODE_FOR_COMRESET    ,USE_AHCI_MODE_FOR_COMRESET" "NO,YES"
textline "                         "
bitfld.long 0x04 18. " GOTO_WAKE_UP4                ,GOTO_WAKE_UP4" "NO,YES"
bitfld.long 0x04 17. "       DONT_CHK_PHYRDY_IN_NO_COMM    ,DONT_CHK_PHYRDY_IN_NO_COMM" "NO,YES"
textline "                         "
bitfld.long 0x04 16. " SEND_NEG_RD_ALIGNS           ,SEND_NEG_RD_ALIGNS" "NO,YES"
bitfld.long 0x04 15. "       OLD_BEHAVIOUR_SEND_ALIGNS     ,OLD_BEHAVIOUR_SEND_ALIGNS" "NO,YES"
textline "                         "
bitfld.long 0x04 10.--14. " PM_OFF_COUNT                 ,PM_OFF_COUNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 9. "        SEND_RAW_DATA_IN_BIST_L       ,Sending raw data in BIST_L mode without encoding/decoding" "NO,YES"
textline "                         "
bitfld.long 0x04 8. " BE_IN_BIST_ON_PHYRDY_LOW     ,BE_IN_BIST_ON_PHYRDY_LOW" "NO,YES"
bitfld.long 0x04 7. "       GOTO_SEND_SYNC_P              ,Sending Link SM to L_SEND_SYNC_P in BIST" "NO,YES"
textline "                         "
bitfld.long 0x04 6. " AUTO_REPEAT_PRIMS            ,AUTO_REPEAT_PRIMS" "NO,YES"
bitfld.long 0x04 5. "       DEBOUNCE_PHYRDY_PERIOD        ,Hysteresis period" "SHORT,LONG"
textline "                         "
bitfld.long 0x04 4. " DEBOUNCE_PHYRDY              ,Phyrdy debounce behaviour" "NO,YES"
bitfld.long 0x04 3. "       DELAY_HOTPLUG_INTR            ,Generation of hotplug interrupts when we get PHYRDY" "NO,YES"
textline "                         "
bitfld.long 0x04 2. " SET_BSY_BIT_MTHD             ,SET_BSY_BIT_MTHD" "COMINIT,PHYRDY"
bitfld.long 0x04 0.--1. "   LED_MIN_ON_TIME               ,LED blinking" "OFF,20MS,40MS,80MS"
line.long 0x08 "CFG_LINK_1,CFG_LINK_1"
hexmask.long.word 0x08 16.--31. 1. " GEN3_DWRD_WAIT_CNT           ,Number of generation3 ALIGN dwords the controller sends to drive while waiting for gen3 align from drive"
hexmask.long.word 0x08 0.--15. 1. "      GEN2_DWRD_WAIT_CNT            ,Number of generation2 ALIGN dwords the controller sends to drive while waiting for gen2 align from drive"
line.long 0x0C "CFG_LINK_2,CFG_LINK_2"
bitfld.long 0x0C 12.--15. " PHYRDY_USE_ITH_BIT           ,PHYRDY_USE_ITH_BIT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "        USE_BIT_FOR_DEBOUNCE          ,USE_BIT_FOR_DEBOUNCE" "0,1"
textline "                         "
hexmask.long.word 0x0C 0.--10. 1. " PHYRDY_DBNC_MUX              ,Debounced version of PHYRDY which has two options: 10 ms and 10 us"
group.long 0x1D0++0x03
line.long 0x00 "CFG_TRANS_0,CFG_TRANS_0"
bitfld.long 0x00 1. " USE_RISE_EDGE_STATUS_RESET   ,USE_RISE_EDGE_STATUS_RESET" "0,1"
bitfld.long 0x00 0. "         F2I_FIFO_FLUSH_FIX            ,F2I_FIFO_FLUSH_FIX" "0,1"
textline "                         "
width 19.
group.long 0x238++0x0B
line.long 0x00 "ALPM_CTRL,ALPM Controls"
hexmask.long.word 0x00 16.--31. 1. " THRESHOLD           ,Time that HBA should wait before going to Partial or Slumber power down states"
line.long 0x04 "FBS_CONFIG_0,Settings for FIS based switching implementation"
bitfld.long 0x04 14.--15. " PRD_PROCESS_FIX     ,PRD_PROCESS_FIX" "0,1,2,3"
bitfld.long 0x04 13. "      POST_1ST_REGFIS  ,POST_1ST_REGFIS" "0,1"
bitfld.long 0x04 12. "         CTL_02                    ,CTL_02" "0,1"
textline "                            "
bitfld.long 0x04 8.--11. " BKDR_ADO            ,BKDR_ADO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "     CONTROL_PORT     ,CONTROL_PORT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 3. "        CONTROL_PORT_HAS_PRIORITY ,CONTROL_PORT_HAS_PRIORITY" "0,1"
textline "                            "
bitfld.long 0x04 1. " CTL_01              ,CTL_01" "0,1"
bitfld.long 0x04 0. "      CTL_00           ,CTL_00" "0,1"
line.long 0x08 "CHX_FBS_CONFIG_1,Settings for FIS based switching implementation"
bitfld.long 0x08 0. " PORT_BKDR_FBSCP     ,PORT_BKDR_FBSCP" "0,1"
group.long 0x300++0x07
line.long 0x00 "AHCI_HBA_CAP_BKDR,Provides Back-door field for every bit described in the AHCI 1.2 specification"
bitfld.long 0x00 31. " S64A                ,S64A" "FALSE,TRUE"
bitfld.long 0x00 30. "  SNCQ             ,SNCQ" "FALSE,TRUE"
bitfld.long 0x00 29. "     SSNTF                     ,SSNTF" "FALSE,TRUE"
textline "                            "
bitfld.long 0x00 28. " SMPS                ,Back-door field to Mechanical Presence Switch Support" "FALSE,TRUE"
bitfld.long 0x00 27. "  SUPP_STG_SPUP    ,Back-door field to advertise staggered spin up" "CLEARED,SET"
bitfld.long 0x00 26. "   SALP                      ,Back-door field to Aggressive Link Power Management support" "FALSE,TRUE"
textline "                            "
bitfld.long 0x00 25. " SAL                 ,Back-door field to Activity LED Support" "FALSE,TRUE"
bitfld.long 0x00 24. "  SUPP_CLO         ,Back-door field to Command List Override Support" "FALSE,TRUE"
bitfld.long 0x00 20.--23. "     SPD_SUPP                  ,Back-door field to Interface Supported Speed" ",GEN1,GEN1_2,GEN3,?..."
textline "                            "
bitfld.long 0x00 19. " SUPP_NONZERO_OFFSET ,Back-door field to Non-Zero DMA Offsets support" "FALSE,TRUE"
bitfld.long 0x00 18. "  SUPP_AHCI_ONLY   ,Back-door field to AHCI mode only support" "FALSE,TRUE"
bitfld.long 0x00 17. "     SUPP_PM                   ,Back-door field to Port Multiplier support" "FALSE,TRUE"
textline "                            "
bitfld.long 0x00 16. " FIS_SWITCHING       ,Back-door field to FIS Based Switching Support" "FALSE,TRUE"
bitfld.long 0x00 15. "  PIO_MULT_DRQ_BLK ,Back-door field to PIO Multiple DRQ Block" "NOT_SUPP,SUPP"
bitfld.long 0x00 14. "  SLUMBER_ST_CAP            ,Back-door field to Slumber state capability" "FALSE,TRUE"
textline "                            "
bitfld.long 0x00 13. " PARTIAL_ST_CAP      ,Back-door field to Partial state capability" "FALSE,TRUE"
bitfld.long 0x00 8.--12. "  NUM_CMD_SLOTS    ,Back-door field to Number of Command Slots" "1,,,,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32"
bitfld.long 0x00 7. "        CMD_CMPL_COALESING        ,Back-door field to Command Completion Coalescing Support" "FALSE,TRUE"
textline "                            "
bitfld.long 0x00 6. " ENCL_MGMT_SUPP      ,Back-door field to Enclosure Management Support" "FALSE,TRUE"
bitfld.long 0x00 5. "  EXT_SATA         ,Back-door field to External SATA Support" "FALSE,TRUE"
bitfld.long 0x00 0.--4. "     NUM_PORTS                 ,Back-door field to Number of ports" "1,2,3,4,?..."
line.long 0x04 "AHCI_HBA_HOLD_GEN,AHCI_HBA_HOLD_GEN"
hexmask.long.byte 0x04 24.--31. 1. " SHARED_DFIFO_AVAIL  ,Number of lines of the FIFO depending on depth of shared DATA FIFO"
hexmask.long.word 0x04 8.--23. 1. "     PRD_SIZE         ,Minimum value of PRDBC for the last PRD cached below which Port should send a HOLD to drive"
hexmask.long.byte 0x04 0.--7. 1. "      T2P_FIFO_AVAIL            ,Number of lines of the FIFO depending on depth of T2P FIFO"
textline "                            "
width 16.
group.long 0x30C++0x03
line.long 0x00 "AHCI_HBA_CTL_0,AHCI_HBA_CTL_0"
bitfld.long 0x00 31. " USE_PXCMD_ICC_IF_LINK_IN_IDLE  ,USE_PXCMD_ICC_IF_LINK_IN_IDLE" "NO,YES"
bitfld.long 0x00 30. "       USE_AHCI_MODE_IN_FIS_PROCESS  ,USE_AHCI_MODE_IN_FIS_PROCESS" "NO,YES"
textline "                         "
bitfld.long 0x00 28.--29. " BKDR_VS_MINOR_9_8              , BKDR_VS_MINOR_9_8" "0,1,2,3"
bitfld.long 0x00 27. "         TRANSPRT_IGNORE_DMAT          ,TRANSPRT_IGNORE_DMAT" "FALSE,TRUE"
textline "                         "
bitfld.long 0x00 26. " PSM2LL_DENY_PMREQ              ,PSM2LL_DENY_PMREQ" "FALSE,TRUE"
bitfld.long 0x00 25. "     SUD_OLD_LOGIC                 ,SUD_OLD_LOGIC" "FALSE,TRUE"
textline "                         "
bitfld.long 0x00 20.--23. " ACCEL_SYNC_ESC_TIMEOUT         ,ACCEL_SYNC_ESC_TIMEOUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 19. "        RST_AE_WITHOUT_COMRESET       ,RST_AE_WITHOUT_COMRESET" "0,1"
textline "                         "
bitfld.long 0x00 18. " RST_AE_ON_HR                   ,RST_AE_ON_HR" "0,1"
bitfld.long 0x00 17. "         HBFS_ON_PRD_ADR_EXCEED_40B    ,HBFS_ON_PRD_ADR_EXCEED_40B" "0,1"
textline "                         "
bitfld.long 0x00 16. " HBFS_ON_BME_RESET_WHILE_ACTIVE ,HBFS_ON_BME_RESET_WHILE_ACTIVE" "0,1"
bitfld.long 0x00 7. "         ACCEL_WAIT_FOR_BSY0           ,ACCEL_WAIT_FOR_BSY0" "DISABLED,ENABLED"
textline "                         "
bitfld.long 0x00 6. " NO_DHRS_AT_UNLOAD              ,NO_DHRS_AT_UNLOAD" "DISABLED,ENABLED"
bitfld.long 0x00 5. "  MPIS_SET_AT_ACCEL             ,MPIS_SET_AT_ACCEL" "DISABLED,ENABLED"
textline "                         "
bitfld.long 0x00 4. " DIS_CCC_TIMEOUT_INT            ,DIS_CCC_TIMEOUT_INT_AT_ZERO_OUTSTD_CMD" "CLEARED,SET"
bitfld.long 0x00 3. "   BKDR_PRDBC_UPDATE             ,PRDBC Update" "AT_EACH_DATA_FIS,AT_REG_FIS"
textline "                         "
bitfld.long 0x00 2. " PORTX_NONNCQ_TX_RX_UNDERFLOW   ,PORTX_NONNCQ_TX_RX_UNDERFLOW" "DISABLED,ENABLED"
bitfld.long 0x00 1. "  PORTX_PRD_UNDERFLOW_IFS_ATAPI ,PORTX_PRD_UNDERFLOW_IFS_ATAPI" "DISABLED,ENABLED"
textline "                         "
bitfld.long 0x00 0. " PORTX_OFS_IN_ATAPI             ,PORTX_OFS_IN_ATAPI" "DISABLED,ENABLED"
textline "                         "
width 28.
group.long 0x318++0x1B
line.long 0x00 "AHCI_HBA_BIST_OVERRIDE_CTL,overrides for various BIST modes available according to the specification"
hexmask.long.byte 0x00 24.--31. 1. " PORTS                        ,PORTS"
bitfld.long 0x00 10. "        DISABLE_ASYNC_RECOVERY       ,DISABLE_ASYNC_RECOVERY" "NO,YES"
bitfld.long 0x00 9. "     USE_BIST_F_MODE          ,USE_BIST_F_MODE" "NO,YES"
textline "                                     "
bitfld.long 0x00 8. " F                            ,F" "0,1"
bitfld.long 0x00 7. "         BIST_DWORD                   ,BIST_DWORD" "0,1"
bitfld.long 0x00 6. "       BIST_L_RDY               ,BIST_L_RDY" "0,1"
textline "                                     "
bitfld.long 0x00 5. " BIST_T_RDY                   ,BIST_T_RDY" "0,1"
bitfld.long 0x00 4. "         P                            ,P" "0,1"
bitfld.long 0x00 3. "       S                        ,S" "0,1"
textline "                                     "
bitfld.long 0x00 2. " T                            ,T" "0,1"
bitfld.long 0x00 1. "         A                            ,A" "0,1"
bitfld.long 0x00 0. "       CLR                      ,CLR" "0,1"
line.long 0x04 "AHCI_HBA_BIST_DWORD,DWORD that is used in the second and third DWORD of BIST FIS."
line.long 0x08 "AHCI_HBA_SPARE_1,T_SATA0_AHCI_HBA Spare register"
hexmask.long.tbyte 0x08 0.--23. 1. " MS_TIMER_CNT                 ,The count of fpci_clk for counting to millisecond"
line.long 0x0C "AHCI_HBA_SPARE_2,T_SATA0_AHCI_HBA Spare register"
bitfld.long 0x0C 15. " LINK_IN_PROCESS_OF_LOW_POWER ,LINK_IN_PROCESS_OF_LOW_POWER" "0,1"
bitfld.long 0x0C 14. "         DONT_USE_LD_IN_COUNTER       ,DONT_USE_LD_IN_COUNTER" "0,1"
textline "                                     "
bitfld.long 0x0C 13. " SW_COMWAKE_CONTINUOUS        ,SW_COMWAKE_CONTINUOUS" "DISABLED,ENABLED"
bitfld.long 0x0C 12. "  ASYNC_RECOVERY_ENABLE        ,ASYNC_RECOVERY_ENABLE" "FALSE,TRUE"
bitfld.long 0x0C 8.--11. "   ASYNC_RECOVERY_TIMER_SEL ,ASYNC_RECOVERY_TIMER_SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "AHCI_HBA_DYN_CLK_CLAMP,AHCI_HBA_DYN_CLK_CLAMP"
hexmask.long.byte 0x10 24.--31. 1. " TIMER_PSM                    ,TIMER_PSM"
hexmask.long.byte 0x10 16.--23. 1. "        SPARE_1                      ,SPARE_1"
hexmask.long.byte 0x10 8.--15. 1. "      CLAMP_TIMER              ,Used to wait for some time after the transactions on FPCI and CSM are done to shut down the devclk"
textline "                                     "
bitfld.long 0x10 3.--7. " SPARE_0                      ,SPARE_0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 0.--2. "        SPARE_0_2                    ,SPARE_0_2" "0,1,2,3,4,5,6,7"
textline "                                     "
width 30.
group.long 0x32C++0x07
line.long 0x00 "AHCI_CFG_ERR_CTRL,Settings For Controlling Behaviour Of AHCI Sm During Error Conditions"
bitfld.long 0x00 5. " ENABLE_PXIS_IFS_DATA_FIS_CRC_ERROR ,ENABLE_PXIS_IFS_DATA_FIS_CRC_ERROR" "0,1"
bitfld.long 0x00 4. "         ENABLE_PXIS_IFS_D2H_SYNC_ESCAPE ,ENABLE_PXIS_IFS_D2H_SYNC_ESCAPE" "0,1"
textline "                                       "
bitfld.long 0x00 3. " CLR_TX_BUFFER_ON_FATAL_ERROR       ,Clear TX_BUFFER on FATAL_ERROR" "0,1"
bitfld.long 0x00 2. "         CLR_T2P_FIFO_ON_FATAL_ERROR     ,Clear T2P_FIFO on FATAL_ERROR" "0,1"
textline "                                       "
bitfld.long 0x00 1. " CLR_P2T_FIFO_ON_FATAL_ERROR        ,Clear P2T_FIFO on FATAL_ERROR" "0,1"
bitfld.long 0x00 0. "         CLR_CMD_FIFO_ON_FATAL_ERROR     ,Clear CMD_FIFO on  FATAL_ERROR" "0,1"
line.long 0x04 "AHCI_HBA_CAP2_BKDR,Provides backdoor fields for CAP2 register according to the AHCI 1.3 specification"
bitfld.long 0x04 5. " DEVSLP_ENTRY_FROM_SLUMBER_ONLY     ,DEVSLP assertion only when interface is in Slumber" "FALSE,TRUE"
bitfld.long 0x04 4. "     SUPPORTS_AGGR_DEVSLP            ,DEVSLP assertion after the idle timeout expiration" "FALSE,TRUE"
textline "                                       "
bitfld.long 0x04 3. " SUPPORTS_DEVSLP                    ,Device Sleep feature support" "FALSE,TRUE"
bitfld.long 0x04 2. "     AUTO_PARTIAL_TO_SLUMBER         ,Automatic Partial to Slumber Transitions support" "FALSE,TRUE"
textline "                                       "
bitfld.long 0x04 0. " BOH                                ,BIOS/OS handoff mechanism support" "FALSE,TRUE"
group.long 0x338++0x0B
line.long 0x00 "AHCI_HBA_CTL_1,AHCI_HBA_CTL_1"
bitfld.long 0x00 31. " UNCLAMP_HBA_CTRLR                  ,UNCLAMP_HBA_CTRLR" "0,1"
bitfld.long 0x00 30. "         INVALIDATE_PRDS_AT_FETCH        ,INVALIDATE_PRDS_AT_FETCH" "0,1"
textline "                                       "
bitfld.long 0x00 29. " PREFETCH_TX_DATA_NO_DELAY          ,PREFETCH_TX_DATA_NO_DELAY" "0,1"
bitfld.long 0x00 28. "         CHK_L_IDLE_IN_WAKE_LINK         ,CHK_L_IDLE_IN_WAKE_LINK" "0,1"
textline "                                       "
bitfld.long 0x00 27. " CHK_L_IDLE_IN_LOW_POWER            ,CHK_L_IDLE_IN_LOW_POWER" "0,1"
bitfld.long 0x00 26. "         SKIP_SCTL_DET_WR_COMRESET       ,SKIP_SCTL_DET_WR_COMRESET" "0,1"
textline "                                       "
bitfld.long 0x00 25. " ALWAYS_DENY_PMREQ                  ,ALWAYS_DENY_PMREQ" "0,1"
bitfld.long 0x00 24. "         SKIP_SCTL_DET_WR_OFFLINE        ,SKIP_SCTL_DET_WR_OFFLINE" "0,1"
textline "                                       "
bitfld.long 0x00 22.--23. " FETCH_REQ_TAKEN                    ,FETCH_REQ_TAKEN" "0,1,2,3"
bitfld.long 0x00 21. "         NON_NCQ_IFS_TEMP_OFF            ,NON_NCQ_IFS_TEMP_OFF" "0,1"
textline "                                       "
bitfld.long 0x00 20. " BM_HOLD_ACTV_TILL_INTR             ,BM_HOLD_ACTV_TILL_INTR" "0,1"
bitfld.long 0x00 19. "         PRD_SM_RXDATA_PREMATURE_END     ,PRD_SM_RXDATA_PREMATURE_END" "0,1"
textline "                                       "
bitfld.long 0x00 18. " GOTO_PM_AGGR_FROM_P_IDLE           ,GOTO_PM_AGGR_FROM_P_IDLE" "NO,YES"
bitfld.long 0x00 17. "       SEND_DATA_HDR_EARLY             ,SEND_DATA_HDR_EARLY" "0,1"
textline "                                       "
bitfld.long 0x00 16. " FIS_SM_USE_RISEDGE_EOF             ,FIS_SM_USE_RISEDGE_EOF" "0,1"
bitfld.long 0x00 15. "         DETECT_B2B_NCQ_TAG_REPEAT       ,DETECT_B2B_NCQ_TAG_REPEAT" "0,1"
textline "                                       "
bitfld.long 0x00 14. " NO_PRDBC_UPDATE                    ,NO_PRDBC_UPDATE" "0,1"
bitfld.long 0x00 12.--13. "         ARB_PARK_MODE                   ,ARB_PARK_MODE" "PORT0,LAST_GNTED,?..."
textline "                                       "
bitfld.long 0x00 11. " ARB_GNT_CFG                        ,ARB_GNT_CFG" "0,1"
bitfld.long 0x00 10. "         WAR_NDR_ACCEPT_ARC1_ISSUE       ,WAR_NDR_ACCEPT_ARC1_ISSUE" "0,1"
textline "                                       "
bitfld.long 0x00 9. " DISABLE_BKGD_CMD_PREFETCH_2        ,DISABLE_BKGD_CMD_PREFETCH_2" "0,1"
bitfld.long 0x00 8. "         ISSUE_ORDER_CMD_SEL_IN_CBS      ,ISSUE_ORDER_CMD_SEL_IN_CBS" "0,1"
textline "                                       "
bitfld.long 0x00 7. " INTR_PENDING_ON_CH_SEL             ,INTR_PENDING_ON_CH_SEL" "0,1"
bitfld.long 0x00 6. "         READ_OUT_BM_START               ,READ_OUT_BM_START" "0,1"
textline "                                       "
bitfld.long 0x00 5. " SYNC_ESC_IN_ALPM                   ,SYNC_ESC_IN_ALPM" "0,1"
bitfld.long 0x00 4. "         ENABLE_PRD_SPLIT_IN_CBS         ,ENABLE_PRD_SPLIT_IN_CBS" "0,1"
textline "                                       "
bitfld.long 0x00 3. " DISABLE_BKGD_ACMD_PREFETCH         ,DISABLE_BKGD_ACMD_PREFETCH" "0,1"
bitfld.long 0x00 2. "         DISABLE_BKGD_DATA_PREFETCH      ,DISABLE_BKGD_DATA_PREFETCH" "0,1"
textline "                                       "
bitfld.long 0x00 1. " DISABLE_BKGD_PRD_PREFETCH          ,DISABLE_BKGD_PRD_PREFETCH" "0,1"
bitfld.long 0x00 0. "         DISABLE_BKGD_CMD_PREFETCH_1     ,DISABLE_BKGD_CMD_PREFETCH_1" "0,1"
line.long 0x04 "AHCI_HBA_PI_BKDR,Host Bus Adaptor Ports Implemented Backdoor Register"
hexmask.long.byte 0x04 0.--7. 1. " PORTS_IMPL                         ,Ports Implemented"
line.long 0x08 "AHCI_HBA_PRE_STAGING_CONTROL,AHCI_HBA_PRE_STAGING_CONTROL"
hexmask.long.byte 0x08 24.--31. 1. " SPARE                              ,SPARE bits"
rbitfld.long 0x08 20.--23. "        ENGAGED                         ,ENGAGED" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x08 12.--17. " DMA_XFER_CNT                       ,DMA_XFER_CNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 8.--11. "        FIFO_LEVEL                      , FIFO_LEVEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                       "
bitfld.long 0x08 7. " ENABLE                             ,Pre-staging control Enable" "Disabled,Enabled"
bitfld.long 0x08 6. "  ATAPI_EN                        ,ATAPI Enable" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x08 0.--5. " PRDBC                              ,PRDBC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                       "
width 16.
group.long 0x370++0x03
line.long 0x00 "CFG,Config"
hexmask.long.byte 0x00 24.--31. 1. " CTRL_TICKS_FOR_MASTER_TO        ,Control ticks used in Master-slave emulation"
bitfld.long 0x00 23. "           WR_ALLOWED_SHAD_REG                  ,Shadow register write allowance (even when BSY/ DRQ is one)" "0,1"
textline "                         "
bitfld.long 0x00 22. " HOT_RESET_ON_BM_START_ALONE     ,HOT_RESET_ON_BM_START_ALONE" "0,1"
bitfld.long 0x00 21. "            HOT_RESET_OLD_BEHAVIOUR              ,HOT_RESET_OLD_BEHAVIOUR" "0,1"
textline "                         "
bitfld.long 0x00 20. " RESET_SREGS_ON_OOB_COMRESET     ,RESET_SREGS_ON_OOB_COMRESET" "FALSE,TRUE"
group.long 0x378++0x03
line.long 0x00 "CTL_SHADOW,CTL_SHADOW"
bitfld.long 0x00 31. " PIO_DATA_READ_RETRY             ,PIO_DATA_READ_RETRY" "OLD,NEW"
bitfld.long 0x00 30. "          ALLOW_CTRL_WR_WHEN_DRIVE_NOT_PRESENT ,ALLOW_CTRL_WR_WHEN_DRIVE_NOT_PRESENT" "NO,YES"
textline "                         "
bitfld.long 0x00 29. " RET_ERROR_7F_WHEN_MASTER_ABSENT ,RET_ERROR_7F_WHEN_MASTER_ABSENT" "NO,TRUE"
bitfld.long 0x00 28. "         FIX_SRST_WHEN_ONE_DEVICE_NOT_PRESENT ,FIX_SRST_WHEN_ONE_DEVICE_NOT_PRESENT" "0,1"
textline "                         "
bitfld.long 0x00 27. " USE_ELONGATED_FIFO_HOT_RESET    ,USE_ELONGATED_FIFO_HOT_RESET" "0,1"
group.long 0x430++0x03
line.long 0x00 "CFG_FPCI_0,CFG_FPCI_0"
bitfld.long 0x00 31. " AHCI_MODE_DEP_ON_EN             ,AHCI_MODE_DEP_ON_EN" "NO,YES"
bitfld.long 0x00 30. "          SEND_MSG_ON_NEW_INTR                 ,Sending New Message when a new bit is written in pxis (Used in case of multiple MSI)" "0,1"
textline "                         "
bitfld.long 0x00 29. " SEND_NEW_MSG_IS_NOT_ZERO        ,MSI Send New Message request (Used if software clears some bits of IS but not all)" "0,1"
group.long 0x490++0x03
line.long 0x00 "IDE1,OLD IDE TIMING"
group.long 0x494++0x03
line.long 0x00 "CFG_ESATA_CTRL,Settings for controlling behavior of the AHCI SM during error conditions"
hexmask.long.byte 0x00 8.--15. 1. " TX_PEAK_LIMIT                   ,TX_PEAK_LIMIT"
hexmask.long.byte 0x00 0.--7. 1. "           TX_AMP_LIMIT                         ,TX_AMP_LIMIT"
rgroup.long 0x498++0x03
line.long 0x00 "FEATURE,Feature Register"
bitfld.long 0x00 18.--23. " FEATURE_AHCI_ESATA_DIS          ,FEATURE_AHCI_ESATA_DIS" "NO,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,YES"
bitfld.long 0x00 10.--12. "          RAID_FUNCTION_DIS                    ,RAID_FUNCTION_DIS" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PORTS_2_3_DIS                   ,PORTS_2_3_DIS" "NO,YES"
bitfld.long 0x00 8. "          PORTS_0_1_DIS                        ,PORTS_0_1_DIS" "NO,YES"
textline "                         "
bitfld.long 0x00 4. " AHCI_POWER_DIS                  ,AHCI_POWER_DIS" "NO,YES"
bitfld.long 0x00 3. "          FBS_DIS                              ,FBS_DIS" "NO,YES"
textline "                         "
bitfld.long 0x00 2. " GEN3_EN                         ,GEN3_EN" "NO,YES"
bitfld.long 0x00 1. "          GEN2_EN                              ,GEN2_EN" "NO,YES"
group.long 0x4A0++0x0B
line.long 0x00 "CTL1,Miscellaneous CTL1"
bitfld.long 0x00 9. " BLK_NONPIO_IDP                  ,NONPIO read in the case of IDP read suppression (second read block)" "Not blocked,Blocked"
bitfld.long 0x00 0. "  SATA_ADNVCD_SPD_NEGO                 ,Advanced way of detecting SATA speeds" "NO,YES"
line.long 0x04 "BKDOOR_CC,Backdoor update of the programming interface field and class code of the CFG2[15:8] register"
hexmask.long.word 0x04 16.--31. 1. " CLASS_CODE                      ,CLASS_CODE"
hexmask.long.byte 0x04 8.--15. 1. "         PROG_IF                              ,PROG_IF"
line.long 0x08 "CFG_CTRL_1,CFG_CTRL_1"
bitfld.long 0x08 1. " SATA_CAP                        ,SATA capability enable" "Disabled,Enabled"
bitfld.long 0x08 0. "     48BIT_ADDRESS_DISABLE                ,48-bit addressing mode disable" "Not disabled,Disabled"
textline "                         "
group.long 0x4AC++0x07
line.long 0x00 "CFG_POWER_GATE,CFG_POWER_GATE"
bitfld.long 0x00 23. " SSTS_RESTORED                               ,SSTS_RESTORED" "NO,YES"
rbitfld.long 0x00 22. "          PHY_NOT_IN_SLUMBER                   ,PHY_NOT_IN_SLUMBER" "0,1"
textline "                         "
bitfld.long 0x00 21. " STOP_INTERRUPTS                             ,STOP_INTERRUPTS" "0,1"
rbitfld.long 0x00 20. "            COUNT_FOR_PADS_DONE                  ,COUNT_FOR_PADS_DONE" "0,1"
textline "                         "
bitfld.long 0x00 19. " PADS_POWER_DOWN                             ,PADS_POWER_DOWN" "0,1"
bitfld.long 0x00 18. "            HW_WAKEUP_SUPPORT                    ,HW_WAKEUP_SUPPORT" "NO,YES"
textline "                         "
hexmask.long.word 0x00 2.--17. 1. " SM2SATA_PG_INFO                             ,Indicates the data stored in SM unit - for now it has nothing"
bitfld.long 0x00 1. "         POWER_UNGATE_COMP                    ,POWER_UNGATE_COMP" "NO,YES"
textline "                         "
bitfld.long 0x00 0. " GATE_ENTER_PG                               ,GATE_ENTER_PG" "NO,YES"
line.long 0x04 "CFG_CTL_GLUE,CFG_CTL_GLUE"
bitfld.long 0x04 8. " T_SATA_CFG_CTL_GLUE_ODD_DWORD_ALIGNMENT_FIX ,T_SATA_CFG_CTL_GLUE_ODD_DWORD_ALIGNMENT_FIX" "0,1"
textline "                         "
bitfld.long 0x04 7. " DEVSLP_WITH_GHC_HR_PXCMD_ST                 ,DEVSLP_WITH_GHC_HR_PXCMD_ST" "0,1"
bitfld.long 0x04 6. "            RESET_COMMA_DETECTION_CNTR           ,RESET_COMMA_DETECTION_CNTR" "0,1"
textline "                         "
bitfld.long 0x04 5. " HOLD_REQ_DEVCLK_CLAMP_2                     ,HOLD_REQ_DEVCLK_CLAMP_2" "0,1"
bitfld.long 0x04 4. "            HOLD_REQ_DEVCLK_CLAMP_1              ,HOLD_REQ_DEVCLK_CLAMP_1" "0,1"
textline "                         "
bitfld.long 0x04 3. " LOCKDET_OVR_LOGIC_FIX                       ,LOCKDET_OVR_LOGIC_FIX" "0,1"
bitfld.long 0x04 2. "            OVERRIDE_LOCKDET_FOR_NVA             ,OVERRIDE_LOCKDET_FOR_NVA" "0,1"
textline "                         "
bitfld.long 0x04 1. " USE_OVERRIDE_LOCKDET                        ,USE_OVERRIDE_LOCKDET" "NO,YES"
bitfld.long 0x04 0. "          GLUE_FIX_FPCI_WRDAT                  ,Adds a clock delay which is necessary for correct operation" "NO,YES"
group.long 0x4BC++0x03
line.long 0x00 "CFG_CTL_FA,CFG_CTL_FA"
bitfld.long 0x00 3.--7. " CFG_EATER                                   ,CFG_EATER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 2. "           USE_CFG_EATER                        ,USE_CFG_EATER" "NO,YES"
textline "                         "
bitfld.long 0x00 1. " EAT_CLK                                     ,EAT_CLK" "NO,YES"
bitfld.long 0x00 0. "          FPCI_CLK_IS_128MHZ                   ,FPCI_CLK_IS_128MHZ" "NO,YES"
textline "                         "
width 18.
group.long 0x4F0++0x07
line.long 0x00 "PERF0,SATA implementation options"
bitfld.long 0x00 28. " DONT_DELAY_ROK         ,Optimization feature on DMA reads" "FALSE,TRUE"
bitfld.long 0x00 25.--26. "              SATA_PLL_POWERDOWN       ,SATA_PLL_POWERDOWN" "NO,YES,?..."
bitfld.long 0x00 7.--11. "         MIN_FPCI_CLK_FREQ       ,Minimum frequency at which the fpci_clk should run in increments of 1/16th" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "PERF1,SATA implementation options"
hexmask.long.byte 0x04 24.--31. 1. " MAX_WATER_MARK         ,Maximum occupancy of the two i2f_fifos"
hexmask.long.byte 0x04 8.--15. 1. "                 HIGH_WATER_MARK_PIO      ,PIO reads high water mark"
hexmask.long.byte 0x04 0.--7. 1. "          HIGH_WATER_MARK         ,Configures the read FIFO limit at which point the host starts sending HOLD primitives to back-off the data transfer from device"
group.long 0x528++0x0F
line.long 0x00 "SPARE2,Spare register on cold reset with one as the default value"
bitfld.long 0x00 6. " SPLIT_D2H_REG_FIS      ,SPLIT_D2H_REG_FIS" "0,1"
bitfld.long 0x00 5. "                  LATCH_PXCMD_FRE          ,LATCH_PXCMD_FRE" "0,1"
textline "                           "
bitfld.long 0x00 4. " SET_PXCMD_FR_ON_FRE    ,SET_PXCMD_FR_ON_FRE" "0,1"
bitfld.long 0x00 3. "                  ERR_CLEANUP_WAIT_P_IDLE  ,ERR_CLEANUP_WAIT_P_IDLE" "0,1"
bitfld.long 0x00 2. "           FIS_PRO_WAIT_P_IDLE     ,FIS_PRO_WAIT_P_IDLE" "0,1"
textline "                           "
bitfld.long 0x00 1. " WAIT_DATA_DFIFO_POP    ,WAIT_DATA_DFIFO_POP" "0,1"
bitfld.long 0x00 0. "                  REM_TWO_ALIGNS_IN_BIST_L ,REM_TWO_ALIGNS_IN_BIST_L" "0,1"
line.long 0x04 "SPARE3,Spare register on warm reset with one as the default value"
hexmask.long.tbyte 0x04 0.--18. 1. " COUNT_FOR_1_MS         ,COUNT_FOR_1_MS"
group.long 0x530++0x07
line.long 0x00 "CHXCFG1,CHXCFG1"
bitfld.long 0x00 12.--15. " PHY_CHX_RX_CTL         ,PHY_CHX_RX_CTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                 PHY_CHX_TX_CTL           ,PHY_CHX_TX_CTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. "          CHX_NEAR_LOOP_BACK      ,CHX_NEAR_LOOP_BACK" "INACTIVE,ACTIVE"
textline "                           "
bitfld.long 0x00 0. " CHX_RESET              ,CHX_RESET" "INACTIVE,ACTIVE"
line.long 0x04 "PHY_CTRL,PHY_CTRL"
bitfld.long 0x04 3.--4. " PLL_SLEEP              ,Power setting of SATA2 internal PHY" "ACTIVE,3G_DISABLED,ALL_CLKS_DISABLED,PLL_DISABLED"
bitfld.long 0x04 0. "  SLUMBER_DURING_D3        ,Slumber During D3 Enable" "Disabled,Enabled"
group.long 0x53C++0x07
line.long 0x00 "LDT,LDT Unit ID Register"
bitfld.long 0x00 8.--12. " NON_ISO_UNIT_ID        ,Non-ISO Unit ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                 ISO_UNIT_ID              ,ISO Unit ID. Hard-wired to 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "CTRL,CTRL"
bitfld.long 0x04 30. " ENABLE_CH2_CH4_INTR    ,ENABLE_CH2_CH4_INTR" "NO,YES"
bitfld.long 0x04 29. "                ENABLE_CH1_CH3_INTR      ,ENABLE_CH1_CH3_INTR" "NO,YES"
bitfld.long 0x04 27. "         NP_RSP_ERROR_INTR       ,NP_RSP_ERROR_INTR" "NO,YES"
textline "                           "
bitfld.long 0x04 26. " PW_CMD_ERROR_INTR      ,PW_CMD_ERROR_INTR" "NO,YES"
bitfld.long 0x04 25. "                NP_RSP_ERROR_INTR_EN     ,NP_RSP_ERROR_INTR_EN" "NO,YES"
bitfld.long 0x04 24. "         PW_CMD_ERROR_INTR_EN    ,PW_CMD_ERROR_INTR_EN" "NO,YES"
textline "                           "
bitfld.long 0x04 21. " CH4_EN                 ,CH4_EN" "NO,YES"
bitfld.long 0x04 20. "                CH3_EN                   ,CH3_EN" "NO,YES"
bitfld.long 0x04 3. "         INTF_ERR_HANDLING_EN    ,SATA interface errors advanced error handling feature enable" "NO,YES"
textline "                           "
bitfld.long 0x04 2. " BAR5_SPACE_EN          ,BAR5 space usage enable" "NO,YES"
bitfld.long 0x04 1. "                PRI_CHANNEL_EN           ,Primary SATA channel enable" "NO,YES"
bitfld.long 0x04 0. "         SEC_CHANNEL_EN          ,Secondary SATA channel enable" "NO,YES"
group.long 0x54C++0x0F
line.long 0x00 "CFG_SATA,CFG_SATA"
bitfld.long 0x00 16. " FORCE_NATIVE           ,FORCE_NATIVE Enable" "DISABLED,ENABLED"
bitfld.long 0x00 15. "           CTRL_ALT_UID_SCHEME      ,CTRL_ALT_UID_SCHEME" "0,1"
rbitfld.long 0x00 14. "           CTRL_SATA_GEN3_CAPABLE  ,CTRL_SATA_GEN3_CAPABLE" "NO,YES"
textline "                           "
rbitfld.long 0x00 13. " CTRL_SATA_GEN2_CAPABLE ,CTRL_SATA_GEN2_CAPABLE" "NO,YES"
bitfld.long 0x00 12. "                BACKDOOR_PROG_IF_EN      ,BACKDOOR_PROG_IF_EN" "NO,YES"
bitfld.long 0x00 7.--11. "         PORT2UNITID_MAPPING     ,PORT2UNITID_MAPPING" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                           "
bitfld.long 0x00 6. " MSI_CAP_DISABLE        , MSI_CAP_DISABLE" "NO,YES"
bitfld.long 0x00 5. "                MSIX_CAP_DISABLE         ,MSIX_CAP_DISABLE" "NO,YES"
bitfld.long 0x00 4. "         USE_40B_ADDR            ,NVIDIA style 40b addressing while DMAing data" "NO,YES"
textline "                           "
bitfld.long 0x00 3. " ERROR_HANDLING         ,ERROR_HANDLING" "NO,YES"
bitfld.long 0x00 2. "                CTRL_RAID_MODE_CTRL      ,RAID Controller mode" "OEM,CHANNEL"
bitfld.long 0x00 1. "     CTRL_STORAGE_FEATURE    ,General purpose bit that SW can use to distinguish between Advanced and Basic storage controller modes" "ADVANCED,BASIC"
line.long 0x04 "CFG_MISC,CFG_MISC"
bitfld.long 0x04 10. " PHY_RESET_USAGE_MODE2  ,LOCKDET or CFG bit select for pi_reset" "0,1"
bitfld.long 0x04 9. "                  PHY_RESET_USAGE_MODE1    ,ATA status register quick update during PIO writes enable" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 8. " PHY_RESET_USAGE_MODE0  ,LOCKDET use as PHY reset" "0,1"
bitfld.long 0x04 7. "                  CFG_MISC_LINK_SM_MODE3   ,L_IDLE features" "Disabled,Enabled"
bitfld.long 0x04 6. "    CFG_MISC_LINK_SM_MODE2  ,L_IDLE features" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 4. " CFG_MISC_LINK_SM_MODE0 ,Hold a bypass enable" "Disabled,Enabled"
bitfld.long 0x04 1. "           PHY_OOB_SEQ_MODE1        ,COMRESET behavior control" "Send 1 on scontrol_det[0] write,Send while scontrol_det active"
textline "                           "
bitfld.long 0x04 0. " PHY_OOB_SEQ_MODE0      ,COMWAKE send back off on COMWAKE received from drive" "0,1"
line.long 0x08 "LOWPOWER_COUNT ,LOWPOWER_COUNT"
bitfld.long 0x08 4.--7. " LOWPOWER_COUNT_SLUMBER ,LOWPOWER_COUNT_SLUMBER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                 LOWPOWER_COUNT_PARTIAL   ,LOWPOWER_COUNT_PARTIAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "DEVSLP_CTRL0,DEVSLP_CTRL0"
rbitfld.long 0x0C 0. " PARTIAL_OR_SLUMBER     ,PORT0_INTFC_IN_PARTIAL_OR_SLUMBER" "0,1"
group.long 0x680++0x07
line.long 0x00 "INDEX,Index Mask Register"
bitfld.long 0x00 3. " CH04                   ,CH04" "UNSELECTED,SELECTED"
bitfld.long 0x00 2. "         CH03                     ,CH03" "UNSELECTED,SELECTED"
bitfld.long 0x00 1. "  CH02                    ,CH02" "UNSELECTED,SELECTED"
textline "                           "
bitfld.long 0x00 0. " CH01                   ,CH01" "UNSELECTED,SELECTED"
line.long 0x04 "CHX_MISC ,SATA Miscellaneous Control Register"
bitfld.long 0x04 0. " LED_DISABLE            ,LED_DISABLE" "0,1"
textline "                           "
width 20.
group.long 0x690++0x0F
line.long 0x00 "CHX_PHY_CTRL1_GEN1,SATA PHY Control Register (GEN1)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 16.--19. "          TX_CMADJ                ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
hexmask.long.byte 0x00 8.--15. 1. " TX_PEAK              ,PEAK values for GEN1"
hexmask.long.byte 0x00 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN1"
line.long 0x04 "CHX_PHY_CTRL1_GEN2,SATA PHY Control Register (GEN2)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x04 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
hexmask.long.byte 0x04 12.--19. 1. "          TX_PEAK                 ,PEAK values for GEN2"
textline "                             "
bitfld.long 0x04 8.--11. " TX_CMADJ             ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN2"
line.long 0x08 "CHX_PHY_CTRL1_GEN3,SATA PHY Control Register (GEN3)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x08 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x08 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
hexmask.long.byte 0x08 12.--19. 1. "          TX_PEAK                 ,PEAK values for GEN3"
textline "                             "
bitfld.long 0x08 8.--11. " TX_CMADJ             ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN3"
line.long 0x0C "CHX_PHY_CTRL2,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
hexmask.long.word 0x0C 16.--31. 1. " CDR_CNTL_GEN2        ,CDR_CNTL_GEN2"
hexmask.long.word 0x0C 0.--15. 1. "               CDR_CNTL_GEN1            ,CDR_CNTL_GEN1"
else
hexmask.long.byte 0x0C 16.--23. 1. " CDR_CNTL_GEN3        ,CDR_CNTL_GEN3"
hexmask.long.byte 0x0C 8.--15. 1. "                 CDR_CNTL_GEN2            ,CDR_CNTL_GEN2"
hexmask.long.byte 0x0C 0.--7. 1. "          CDR_CNTL_GEN1           ,CDR_CNTL_GEN1"
endif
textline "                           "
width 18.
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x6A0++0x0B
line.long 0x00 "CHX_PHY_CTRL24,SATA PHY Control Register"
hexmask.long.word 0x00 0.--15. 1. " CDR_CNTL_GEN3          ,CDR_CNTL_GEN3"
line.long 0x04 "CHX_PHY_CTRL25,SATA PHY Control Register"
line.long 0x08 "CHX_PHY_CTRL25,SATA PHY Control Register"
endif
group.long 0x6B0++0x2F
line.long 0x00 "CHX_PHY_CTRL3,SATA PHY Control Register"
rbitfld.long 0x00 29. " STATUS_RX_STAT_IDLE    ,STATUS_RX_STAT_IDLE" "0,1"
rbitfld.long 0x00 28. "                  STATUS_TX_STAT_PRESENT   ,STATUS_TX_STAT_PRESENT" "0,1"
rbitfld.long 0x00 26.--27. "           STATUS_RX_RATE          ,STATUS_RX_RATE" "GEN1,GEN2,GEN3,?..."
textline "                           "
rbitfld.long 0x00 24.--25. " STATUS_TX_RATE         ,STATUS_TX_RATE" "GEN1,GEN2,GEN3,?..."
bitfld.long 0x00 23. "               RX_RATE_OVERRIDE         ,RX_RATE_OVERRIDE" "DISABLED,ENABLED"
bitfld.long 0x00 20.--21. "    RX_RATE                 ,RX_RATE" "GEN1,GEN2,GEN3,?..."
textline "                           "
bitfld.long 0x00 19. " TX_RATE_OVERRIDE       ,TX_RATE_OVERRIDE" "DISABLED,ENABLED"
bitfld.long 0x00 16.--17. "           TX_RATE                  ,TX_RATE" "GEN1,GEN2,GEN3,?..."
bitfld.long 0x00 15. "        RX_DATA_READY           ,RX_DATA_READY" "NO,YES"
textline "                           "
bitfld.long 0x00 14. " RX_DATA_EN             ,RX_DATA_EN" "0,1"
bitfld.long 0x00 13. "                  TX_DATA_EN_OVERRIDE      ,TX_DATA_EN_OVERRIDE" "NO,YES"
bitfld.long 0x00 12. "         TX_DATA_EN              ,TX_DATA Enable (manually)" "NO,YES"
textline "                           "
bitfld.long 0x00 11. " RX_SLEEP_OVERRIDE      ,RX_SLEEP_OVERRIDE" "NO,YES"
bitfld.long 0x00 10. "                TX_DATA_READY            ,TX_DATA_READY" "NO,YES"
bitfld.long 0x00 8.--9. "         RX_SLEEP                ,Sleep mode on the SATA port selection (used for debug of the sleep modes)" "Active,Partial,Slumber,Disabled"
textline "                           "
bitfld.long 0x00 7. " TX_SLEEP_OVERRIDE      ,Enable a forced sleep mode on the SATA port" "NO,YES"
bitfld.long 0x00 4.--5. "                TX_SLEEP                 ,Sleep mode on the SATA port selection (used for debug of the sleep modes)" "Active,Partial,Slumber,Disabled"
bitfld.long 0x00 3. "    CKBUFPD_OVRD            ,CKBUFPD_OVRD" "0,1"
textline "                           "
bitfld.long 0x00 2. " CKBUFPD                ,CKBUFPD" "0,1"
bitfld.long 0x00 0. "                  IDDQ                     ,IDDQ" "0,1"
line.long 0x04 "CHX_PHY_CTRL4,SATA PHY Control Register"
bitfld.long 0x04 30.--31. " SPARE_OUT              ,SPARE_OUT" "0,1,2,3"
bitfld.long 0x04 28.--29. "                  SPARE_IN                 ,SPARE_IN" "0,1,2,3"
bitfld.long 0x04 27. "           PRBS_CHK_EN             ,PRBS_CHK_EN" "0,1"
textline "                           "
bitfld.long 0x04 26. " TEST_EN                ,TEST_EN" "0,1"
bitfld.long 0x04 24. "                  RATE_MODE                ,RATE_MODE" "0,1"
bitfld.long 0x04 20.--21. "           RX_DIV                  ,RX_DIV" "0,1,2,3"
textline "                           "
bitfld.long 0x04 16.--17. " TX_DIV                 ,TX_DIV" "0,1,2,3"
bitfld.long 0x04 13. "                  RX_CDR_RESET             ,RX_CDR_RESET" "0,1"
bitfld.long 0x04 12. "           TX_SYNC                 ,TX_SYNC" "IDLE,NOW"
textline "                           "
bitfld.long 0x04 11. " FED_LOOP               ,FED_LOOP" "0,1"
bitfld.long 0x04 8.--10. "                  TX_DATA_MODE             ,TX_DATA_MODE" "NORMAL,PRBS_2_7,0101010101,1100110011,0000011111,0101111100,?..."
bitfld.long 0x04 7. "  FEA_LOOP                ,FEA_LOOP" "0,1"
textline "                           "
bitfld.long 0x04 4.--6. " FEA_MODE               ,FEA_MODE" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 3. "                  NEA_LOOP                 ,NEA_LOOP" "0,1"
bitfld.long 0x04 2. "           NED_LOOP                ,NED_LOOP" "0,1"
textline "                           "
bitfld.long 0x04 0.--1. " NED_MODE               ,NED_MODE" "0,1,2,3"
line.long 0x08 "CHX_PHY_CTRL5,SATA PHY Control Register"
bitfld.long 0x08 24.--27. " CDR_MODE               ,CDR_MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 19. "                 TX_RDET                  ,TX_RDET" "IDLE,START"
bitfld.long 0x08 18. "       RX_IDLE_MODE            ,RX_IDLE_MODE" "0,1"
textline "                           "
bitfld.long 0x08 17. " RX_IDLE_BYP            ,RX_IDLE_BYP" "DISABLED,ENABLED"
bitfld.long 0x08 16. "           TX_RDET_BYP              ,TX_RDET_BYP" "DISABLED,ENABLED"
bitfld.long 0x08 14.--15. "    RX_IDLE_T               ,RX_IDLE_T" "0,1,2,3"
textline "                           "
bitfld.long 0x08 12.--13. " TX_RDET_T              ,TX_RDET_T" "0,1,2,3"
bitfld.long 0x08 8.--11. "                  TX_SEL_LOAD              ,TX_SEL_LOAD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "          MISC_CNTL               ,MISC_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CHX_PHY_CTRL6,SATA PHY Control Register"
sif cpuis("TEGAX1")||cpuis("TEGRAX2")
rbitfld.long 0x0C 27.--28. " RX_BYP_DATA            ,RX_BYP_DATA" "0,1,2,3"
bitfld.long 0x0C 26. "                  RX_TERM_MODE             ,RX_TERM_MODE" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 25. " RX_TERM_EN             ,RX_TERM_EN" "FALSE,TRUE"
bitfld.long 0x0C 24. "              TX_TERM_MODE             ,TX_TERM_MODE" "FALSE,TRUE"
textline "                           "
endif
hexmask.long.byte 0x0C 16.--23. 1. " MISC_OUT               ,MISC_OUT"
rbitfld.long 0x0C 14. "                 RX_BYP_IN                ,RX_BYP_IN" "0,1"
rbitfld.long 0x0C 12. "           TX_BYP_IN               ,TX_BYP_IN" "0,1"
textline "                           "
bitfld.long 0x0C 10. " RX_BYP_MODE            ,RX_BYP_MODE" "FALSE,TRUE"
bitfld.long 0x0C 7. "              RX_BYP_EN                ,RX_BYP_EN" "FALSE,TRUE"
bitfld.long 0x0C 6. "       RX_BYP_DIR              ,RX_BYP_DIR" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 4. " RX_BYP_OUT             ,RX_BYP_OUT" "FALSE,TRUE"
bitfld.long 0x0C 3. "              TX_BYP_EN                ,TX_BYP_EN" "FALSE,TRUE"
bitfld.long 0x0C 2. "       TX_BYP_DIR              ,TX_BYP_DIR" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 0. " TX_BYP_OUT             ,TX_BYP_OUT" "FALSE,TRUE"
line.long 0x10 "CHX_PHY_CTRL7,SATA PHY Control Register"
bitfld.long 0x10 20.--23. " RX_WANDER_GEN3         ,RX_WANDER_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 18.--19. "                 RX_TERM_CNTL_GEN3        ,RX_TERM_CNTL_GEN3" "0,1,2,3"
bitfld.long 0x10 16.--17. "           TX_TERM_CNTL_GEN3       ,TX_TERM_CNTL_GEN3" "0,1,2,3"
textline "                           "
bitfld.long 0x10 12.--15. " RX_WANDER_GEN2         ,RX_WANDER_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 10.--11. "                 RX_TERM_CNTL_GEN2        ,RX_TERM_CNTL_GEN2" "0,1,2,3"
bitfld.long 0x10 8.--9. "           TX_TERM_CNTL_GEN2       ,TX_TERM_CNTL_GEN2" "0,1,2,3"
textline "                           "
bitfld.long 0x10 4.--7. " RX_WANDER_GEN1         ,RX_WANDER_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 2.--3. "                 RX_TERM_CNTL_GEN1        ,RX_TERM_CNTL_GEN1" "0,1,2,3"
bitfld.long 0x10 0.--1. "           TX_TERM_CNTL_GEN1       ,TX_TERM_CNTL_GEN1" "0,1,2,3"
line.long 0x14 "CHX_PHY_CTRL8,SATA PHY Control Register"
rbitfld.long 0x14 16.--21. " RX_QEYE_OUT            ,RX_QEYE_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x14 8. "                 RX_QEYE_EN_GEN3          ,RX_QEYE_EN_GEN3" "0,1"
bitfld.long 0x14 4. "           RX_QEYE_EN_GEN2         ,RX_QEYE_EN_GEN2" "0,1"
textline "                           "
bitfld.long 0x14 0. " RX_QEYE_EN_GEN1        ,RX_QEYE_EN_GEN1" "0,1"
line.long 0x18 "CHX_PHY_CTRL9,SATA PHY Control Register"
hexmask.long.word 0x18 16.--31. 1. " MISC_TEST              ,MISC_TEST"
hexmask.long.byte 0x18 8.--15. 1. "               MISC_OUT_SEL             ,MISC_OUT_SEL"
bitfld.long 0x18 2. "          DFE_RESET               ,DFE_RESET" "0,1"
textline "                           "
rbitfld.long 0x18 1. " DFE_TRAIN_DONE         ,DFE_TRAIN_DONE" "0,1"
bitfld.long 0x18 0. "                  DFE_TRAIN_EN             ,DFE_TRAIN_EN" "0,1"
line.long 0x1C "CHX_PHY_CTRL10,SATA PHY Control Register"
hexmask.long.word 0x1C 16.--31. 1. " EOM_CNTL               ,EOM_CNTL"
bitfld.long 0x1C 2. "               EOM_EN                   ,EOM_EN" "0,1"
rbitfld.long 0x1C 1. "           EOM_TRAIN_DONE          ,EOM_TRAIN_DONE" "0,1"
textline "                           "
bitfld.long 0x1C 0. " EOM_TRAIN_EN           ,EOM_TRAIN_EN" "0,1"
line.long 0x20 "CHX_PHY_CTRL11,SATA PHY Control Register"
hexmask.long.word 0x20 16.--31. 1. " GEN2_RX_EQ             ,GEN2_RX_EQ"
hexmask.long.word 0x20 0.--15. 1. "               GEN1_RX_EQ               ,GEN1_RX_EQ"
line.long 0x24 "CHX_PHY_CTRL12,SATA PHY Control Register"
hexmask.long.word 0x24 0.--15. 1. " GEN3_RX_EQ             ,GEN3_RX_EQ"
line.long 0x28 "CHX_PHY_CTRL13,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x28 20.--23. " RX_IQ_CTRL_GEN3        ,RX_IQ_CTRL_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 16.--19. "                 RX_IQ_CTRL_GEN2          ,RX_IQ_CTRL_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 12.--15. "          RX_IQ_CTRL_GEN1         ,RX_IQ_CTRL_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                           "
endif
hexmask.long.word 0x28 0.--11. 1. " CDR_TEST               ,CDR_TEST"
line.long 0x2C "CHX_PHY_CTRL14,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x700++0x1F
line.long 0x00 "CHX_PHY_CTRL15,SATA PHY Control Register"
bitfld.long 0x00 20.--23. " RX_FELS_GEN3           ,RX_FELS_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "                 RX_FELS_GEN2             ,RX_FELS_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "          RX_FELS_GEN1            ,RX_FELS_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                           "
bitfld.long 0x00 8.--11. " DRV_SLEW_GEN3          ,DRV_SLEW_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 DRV_SLEW_GEN2            ,DRV_SLEW_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "          DRV_SLEW_GEN1           ,DRV_SLEW_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CHX_PHY_CTRL16,SATA PHY Control Register"
hexmask.long.byte 0x04 16.--23. 1. " RX_PI_CTRL_GEN3        ,RX_PI_CTRL_GEN3"
hexmask.long.byte 0x04 8.--15. 1. "                 RX_PI_CTRL_GEN2          ,RX_PI_CTRL_GEN2"
hexmask.long.byte 0x04 0.--7. 1. "          RX_PI_CTRL_GEN1         ,RX_PI_CTRL_GEN1"
line.long 0x08 "CHX_PHY_CTRL17,SATA PHY Control Register"
line.long 0x0C "CHX_PHY_CTRL18,SATA PHY Control Register"
line.long 0x10 "CHX_PHY_CTRL19,SATA PHY Control Register"
line.long 0x14 "CHX_PHY_CTRL20,SATA PHY Control Register"
line.long 0x18 "CHX_PHY_CTRL21,SATA PHY Control Register"
line.long 0x1C "CHX_PHY_CTRL22,SATA PHY Control Register"
endif
group.long 0x700++0x07
line.long 0x00 "CHXCFG3,Serial ATA Control Register"
hexmask.long.word 0x00 16.--31. 1. " CHX_PRBS_ERROR_CNT     ,CHX_PRBS_ERROR_CNT"
hexmask.long.byte 0x00 8.--15. 1. "               CHX_BIST_CODE            ,CHX_BIST_CODE"
rbitfld.long 0x00 1. "          CHX_BIST_STAT           ,CHX_BIST_STAT" "NOT_BUSY,BUSY"
textline "                           "
eventfld.long 0x00 0. " CHX_BIST_SEND          ,CHX_BIST_SEND" "INIT,NOW"
line.long 0x04 "CHXCFG4_CHX,CHXCFG4_CHX"
bitfld.long 0x04 12. " CHX_SW_COMWAKE_PI      ,CHX_SW_COMWAKE_PI" "0,1"
bitfld.long 0x04 8.--11. "                  CHX_PHY_ALIGN_NUM_CNT    ,Number of ALIGN primitive pairs that are inserted by the PHY interface block into the output stream" "1 pair,2 pairs,3 pairs,4 pairs,5 pairs,6 pairs,7 pairs,8 pairs,9 pairs,10 pairs,11 pairs,12 pairs,13 pairs,14 pairs,15 pairs,16 pairs"
hexmask.long.byte 0x04 0.--7. 1. "    CHX_PHY_ALIGN_DWORD_CNT ,Number of DWORDs sent before the required align pairs"
group.long 0x714++0x03
line.long 0x00 "PRBS_CHX,Control bits for the IOBIST PRBS generator and checker"
hexmask.long.word 0x00 16.--31. 1. " ERROR_COUNT            ,ERROR_COUNT"
rbitfld.long 0x00 15. "               LOCKED                   ,LOCKED" "0,1"
rbitfld.long 0x00 14. "           ERROR                   ,ERROR" "0,1"
textline "                           "
bitfld.long 0x00 12. " HOT_RESET              ,HOT_RESET" "0,1"
bitfld.long 0x00 10. "                  PI_LOOPBACK              ,PI_LOOPBACK" "0,1"
hexmask.long.word 0x00 0.--9. 1. "           SEED                    ,SEED"
sif cpuis("TEGRAX1")||cpuis("TEGRAX1")
group.long 0x718++0x03
line.long 0x00 "CHX_PHY_CTRL23,SATA PHY Control Register"
bitfld.long 0x00 16. " RX_EOM_DONE              ,RX_EOM_DONE" "0,1"
hexmask.long.word 0x00 0.--15. 1. " RX_EOM_STATUS            ,RX_EOM_STATUS"
endif
group.long 0x750++0x03
line.long 0x00 "CHX_LINK0,CHX_LINK0"
bitfld.long 0x00 2. " IDDQ_ON_OFFLINE        ,IDDQ_ON_OFFLINE" "NO,YES"
bitfld.long 0x00 1. "                CONT_DISABLE             ,CONT primitive in the SATA TX: Disable" "NO,YES"
bitfld.long 0x00 0. "         SCRAM_DIS               ,Data scrambling in the SATA Link layer: Disable" "NO,YES"
textline "                           "
width 27.
group.long 0x790++0x0B
line.long 0x00 "CHX_AHCI_PORT_PXTFD_BKDR,Backdoor register for PXTFD of the PSM registers"
hexmask.long.byte 0x00 8.--15. 1. " ERR                ,ERR"
bitfld.long 0x00 7. "           STS_BSY                      ,STS_BSY" "CLEARED,SET"
bitfld.long 0x00 6. "      STS_DRDY              ,STS_DRDY" "CLEARED,SET"
textline "                                    "
bitfld.long 0x00 5. " STS_DF             ,STS_DF" "CLEARED,SET"
bitfld.long 0x00 4. "      STS_CS                       ,STS_CS" "CLEARED,SET"
bitfld.long 0x00 3. "      STS_DRQ               ,STS_DRQ" "CLEARED,SET"
textline "                                    "
bitfld.long 0x00 1.--2. " STS_2_1            ,STS_2_1" "0,1,2,3"
bitfld.long 0x00 0. "            STS_ERR                      ,STS_ERR" "CLEARED,SET"
line.long 0x04 "CHX_AHCI_PORT_PXSIG_BKDR,Backdoor register for PXSIG of the PSM registers"
hexmask.long.byte 0x04 24.--31. 1. " LBA_HIGH           ,LBA_HIGH"
hexmask.long.byte 0x04 16.--23. 1. "           LBA_MID                      ,LBA_MID"
hexmask.long.byte 0x04 8.--15. 1. "           LBA_LOW               ,LBA_LOW"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " SECTOR_CNT         ,SECTOR_CNT"
line.long 0x08 "CHX_AHCI_PORT_PXSSTS_BKDR,Backdoor register for PXSSTS_SPD of the PSM registers"
bitfld.long 0x08 8.--11. " IPM                ,IPM" "NO_DEV,,,,,,SLUMBER,,DEVSLEEP,?..."
bitfld.long 0x08 4.--7. "     SPD                          ,SPD" "NO_DEV,GEN1,GEN2,GEN3,?..."
bitfld.long 0x08 0.--3. "       DET                   ,DET" "NO_DEV,?..."
group.long 0x7F0++0x03
line.long 0x00 "CHX_GLUE,CHX_GLUE"
bitfld.long 0x00 0. " ATAPI_BLINK_EN     ,LED_ACTIVE signal qualifier" "0,1"
rgroup.long 0xAC0++0x03
line.long 0x00 "INTR,Serial ATA Reserved Register"
bitfld.long 0x00 31. " SEC_INTR           ,Secondary Interrupt pending status" "NOT_PENDING,PENDING"
bitfld.long 0x00 30. "  PRI_INTR                     ,Primary Interrupt pending status" "NOT_PENDING,PENDING"
group.long 0xC00++0x07
line.long 0x00 "EMU1,Serial ATA Control Register"
bitfld.long 0x00 28.--31. " PHY_UART_TIMEOUT   ,PHY_UART_TIMEOUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 26. "           PHY_USE_RBC1                 ,PHY_USE_RBC1" "NO,YES"
bitfld.long 0x00 25. "          PHY_ABSORB_ALIGN_PRIM ,PHY_ABSORB_ALIGN_PRIM" "NO,YES"
textline "                                    "
bitfld.long 0x00 24. " PHY_BYPASS_EN      ,PHY_BYPASS_EN" "NO,YES"
hexmask.long.byte 0x00 16.--23. 1. "          PHY_UART_SAMPLE              ,PHY_UART_SAMPLE"
hexmask.long.byte 0x00 8.--15. 1. "           PHY_UART_DIV          ,PHY_UART_DIV"
textline "                                    "
bitfld.long 0x00 6. " PHY_PM_EN          ,PHY_PM_EN" "NO,YES"
bitfld.long 0x00 5. "          PHY_TXCLK_EARLY              ,PHY_TXCLK_EARLY" "NO,YES"
bitfld.long 0x00 4. "          PHY_DATA_EARLY        ,PHY_DATA_EARLY" "NO,YES"
textline "                                    "
rbitfld.long 0x00 1.--3. " PHY_SEL            ,PHY_SEL" "NOTHING,MARVELL,SI,NVDA_EXT,NVDA_INT,?..."
bitfld.long 0x00 0. "     RESET_ON_COMRESET            ,RESET_ON_COMRESET" "NO,YES"
line.long 0x04 "EMU2,Serial ATA Backdoor Class Code Register"
bitfld.long 0x04 31. " RETRY_CTL_FIS_SRST ,RETRY_CTL_FIS_SRST" "0,1"
bitfld.long 0x04 24.--26. "            AHCI_DEBUG_PORT_SEL          ,AHCI_DEBUG_PORT_SEL" "ZERO,ONE,TWO,THREE,?..."
tree.end
width 0x0B
tree.end
tree "SATA Configuration space"
base ad:0x03501000
tree "PCI Configuration Registers"
width 8.
rgroup.long 0x00++0x03
line.long 0x00 "CFG_0,PCI Vendor and Device ID Register"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID_UNIT         ,Identify the particular device"
hexmask.long.word 0x00 0.--15. 1. "         VENDOR_ID          ,Identify the manufacturer of the device"
group.long 0x04++0x03
line.long 0x00 "CFG_1,PCI Device Control Register"
rbitfld.long 0x00 31. " DETECTED_PERR          ,Indicates that the device has detected a parity error" "Not active,Active"
eventfld.long 0x00 30. "   SIGNALED_SERR      ,Indicates that the device has asserted SERR#" "Not active,Active"
eventfld.long 0x00 29. "     RECEIVED_MASTER ,Indicates that a master device's transaction (except for Special Cycle) was terminated with a master-abort" "Not aborted,Aborted"
textline "                 "
eventfld.long 0x00 28. " RECEIVED_TARGET        ,Indicates that a master device's transaction was terminated with a target-abort" "Not aborted,Aborted"
rbitfld.long 0x00 27. "  SIGNALED_TARGET    ,Indicates that the device has terminated a transaction with target-abort" "Not aborted,Aborted"
rbitfld.long 0x00 25.--26. "    DEVSEL_TIMING   ,The timing of DEVSEL#" "Fast,Medium,Slow,?..."
textline "                 "
rbitfld.long 0x00 24. " CFG_1_MASTER_DATA_PERR ,MASTER_DATA_PERR" "NOT_ACTIVE,?..."
rbitfld.long 0x00 23. "   FAST_BACK2BACK     ,Back-to-back transfers handling capability" "Not supported,Supported"
rbitfld.long 0x00 21. "  66MHZ           ,66 MHz PCI Bus operation capability" "Not supported,Supported"
textline "                 "
rbitfld.long 0x00 20. " CAPLIST                ,Capabilities list presence" "Not present,Present"
rbitfld.long 0x00 19. "  INTR_STATUS        ,State of the interrupt in the device/function" "0,1"
bitfld.long 0x00 10. "              INTR_DISABLE    ,Disables the assertion of INTx# signal" "No,Yes"
textline "                 "
rbitfld.long 0x00 9. " BACK2BACK              ,BACK2BACK Enable" "Disabled,Enabled"
bitfld.long 0x00 8. "     SERR               ,SERR Enable" "Disabled,Enabled"
rbitfld.long 0x00 7. "       STEP            ,STEP Enable" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 6. " PERR                   ,PERR Enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "     PALETTE_SNOOP      ,Special palette snooping behaviour enable" "Disabled,Enabled"
rbitfld.long 0x00 4. "       WRITE_AND_INVAL ,Memory Write and Invalidate command usage enable" "Disabled,Enabled"
textline "                 "
rbitfld.long 0x00 3. " SPECIAL_CYCLE          ,SPECIAL_CYCLE Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "     BUS_MASTER         ,Bus master behaviour Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       MEMORY_SPACE    ,Memory space addresses Enable" "Disabled,Enabled"
textline "                 "
bitfld.long 0x00 0. " IO_SPACE               ,IO Space addresses Enable" "Disabled,Enabled"
rgroup.long 0x08++0x07
line.long 0x00 "CFG_2,PCI Revision ID and Class Code Register"
hexmask.long.word 0x00 16.--31. 1. " CLASS_CODE             ,Identifies generic function of the device"
bitfld.long 0x00 15. "         BUS_MASTER         ,Bus mastering capability" ",YES"
textline "                 "
bitfld.long 0x00 10. " SEC_OP_MODE            ,Secondary Operating Mode" "COMP,NTV"
bitfld.long 0x00 8. "         PRI_OP_MODE        ,Primary Operating Mode" "COMP,?..."
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID            ,Device specific revision identifier"
line.long 0x04 "CFG_3,PCI Configuration Register"
bitfld.long 0x04 23. " HEADER_TYPE_FUNC       ,CFG_3_HEADER_TYPE_FUNC" "Single,Multi"
hexmask.long.byte 0x04 16.--22. 1. "       HEADER_TYPE_DEVICE ,Layout of the bytes [3F:10] in configuration space and single/multiple function capability identification"
bitfld.long 0x04 11.--15. "             LATENCY_TIMER   ,Latency Timer value" "0_CLOCKS,8_CLOCKS,16_CLOCKS,24_CLOCKS,32_CLOCKS,40_CLOCKS,48_CLOCKS,56_CLOCKS,64_CLOCKS,72_CLOCKS,80_CLOCKS,88_CLOCKS,96_CLOCKS,104_CLOCKS,112_CLOCKS,120_CLOCKS,128_CLOCKS,136_CLOCKS,144_CLOCKS,152_CLOCKS,160_CLOCKS,168_CLOCKS,176_CLOCKS,184_CLOCKS,192_CLOCKS,200_CLOCKS,208_CLOCKS,216_CLOCKS,224_CLOCKS,232_CLOCKS,240_CLOCKS,248_CLOCKS"
textline "                 "
hexmask.long.byte 0x04 0.--7. 1. " CACHE_LINE_SIZE        ,CFG_3_CACHE_LINE_SIZE"
group.long 0x10++0x17
line.long 0x00 "CFG_4,PCI Configuration Register"
hexmask.long 0x00 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
line.long 0x04 "CFG_5,PCI Configuration Register"
hexmask.long 0x04 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
line.long 0x08 "CFG_6,PCI Configuration Register"
hexmask.long 0x08 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
line.long 0x0C "CFG_7,PCI Configuration Register"
hexmask.long 0x0C 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
line.long 0x10 "CFG_8,PCI Configuration Register"
hexmask.long 0x10 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x10 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
line.long 0x14 "CFG_9,PCI Memory BAR for AHCI Register"
hexmask.long 0x14 3.--31. 0x08 " BASE_ADDRESS           ,Base Address"
rbitfld.long 0x14 0. "     SPACE_TYPE         ,Space Type" "Memory,IO"
rgroup.long 0x2C++0x03
line.long 0x00 "CFG_11,PCI Subsystem Vendor ID and Subsystem ID Register"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID           ,SUBSYSTEM ID"
hexmask.long.word 0x00 0.--15. 1. "         VENDOR_ID          ,VENDOR ID"
rgroup.long 0x34++0x03
line.long 0x00 "CFG_13,PCI Capability Pointer Register"
hexmask.long.byte 0x00 0.--7. 1. " CAP_PTR                ,Offset into configuration space where the capabilities list begins"
group.long 0x3C++0x03
line.long 0x00 "CFG_15,PCI Configuration Register"
hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT                ,Maximum time required to gain access to the PCI"
hexmask.long.byte 0x00 16.--23. 1. "           MIN_GNT            ,Burst period assuming 33MHz CLK rate"
textline "                 "
hexmask.long.byte 0x00 0.--7. 1. " INTR_LINE              ,Interrupt routing information"
tree.end
tree "Device Specific Configuration Registers"
width 15.
group.long 0x40++0x03
line.long 0x00 "CFG_16,Write Subsystem Vendor ID and Subsystem ID Register"
hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID            ,Subsystem ID"
hexmask.long.word 0x00 0.--15. 1. "        VENDOR_ID             ,Vendor ID"
sif !CPUIS("TEGRAX2")
rgroup.long 0x44++0x03
line.long 0x00 "CFG_17,PCI Power Management Capabilities Register"
bitfld.long 0x00 31. " PME_SUPPORT_D3C         ,PME_SUPPORT_D3C" "NO,YES"
bitfld.long 0x00 30. "         PME_SUPPORT_D3H       ,PME_SUPPORT_D3H" "NO,YES"
bitfld.long 0x00 29. "       PME_SUPPORT_D2        ,PME_SUPPORT_D2" "NO,YES"
textline "                        "
bitfld.long 0x00 28. " PME_SUPPORT_D1          ,PME_SUPPORT_D1" "NO,YES"
bitfld.long 0x00 27. "         PME_SUPPORT_D0        ,PME_SUPPORT_D0" "NO,YES"
bitfld.long 0x00 26. "       D2_SUPPORT            ,D2_SUPPORT" "NO,YES"
textline "                        "
bitfld.long 0x00 25. " D1_SUPPORT              ,D1_SUPPORT" "NO,YES"
bitfld.long 0x00 22.--24. "         AUX_CURRENT           ,AUX_CURRENT" "0,55MA,100MA,160MA,220MA,270MA,320MA,375MA"
bitfld.long 0x00 21. "     DEV_SPEC_INIT         ,DEV_SPEC_INIT" "NOT_NEEDED,NEEDED"
textline "                        "
bitfld.long 0x00 19. " PME_CLOCK               ,PME_CLOCK" "NOT_NEEDED,NEEDED"
bitfld.long 0x00 16.--18. "  PCIPM_REV             ,PCIPM_REV" ",,11,?..."
hexmask.long.byte 0x00 8.--15. 1. "        NEXT_PTR              ,NEXT_PTR"
textline "                        "
hexmask.long.byte 0x00 0.--7. 1. " CAP_ID                  ,CAP_ID"
group.long 0x48++0x03
line.long 0x00 "CFG_18,PCI Power Management Control/Status Register"
rbitfld.long 0x00 15. " PME_STATUS              ,PME Status" "NOT_ACTIVE,?..."
rbitfld.long 0x00 8. "  PME                   ,PME Enable" "Disabled,?..."
bitfld.long 0x00 0.--1. "  PM_STATE              ,Current power state" "D0,D1,D2,D3hot"
endif
group.long 0x54++0x03
line.long 0x00 "FPCI_SW,FPCI_SW"
bitfld.long 0x00 8. " WAKEUP_PLL              ,WAKEUP_PLL" "0,1"
bitfld.long 0x00 0. "           IDDQ_PG               ,IDDQ_PG" "0,1"
sif !CPUIS("TEGRAX2")
rgroup.long 0x8C++0x07
line.long 0x00 "ATACAP0,Serial ATA Capability Register 0"
bitfld.long 0x00 20.--23. " MAJREV                  ,MAJREV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "          MINREV                ,MINREV" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "        CID                   ,CID_SATA"
line.long 0x04 "ATACAP1,Serial ATA Capability Register 1"
hexmask.long.word 0x04 4.--15. 1. " BAROFST                 ,BAROFST"
bitfld.long 0x04 0.--3. "        BARLOC                ,BARLOC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x94++0x03
line.long 0x00 "CFG_35,Serial ATA IDP Index"
hexmask.long.word 0x00 2.--12. 1. " IDP_INDEX               ,IDP_INDEX"
group.long 0xB0++0x0F
line.long 0x00 "MSI_CTRL,MSI Message Control and Capability Register"
rbitfld.long 0x00 24. " VECTOR_MASK_CAP         ,MSI-per-vector masking support" "DIS,EN"
rbitfld.long 0x00 23. "         64_ADDR_CAP           ,64-bit message address generation capability" "DIS,EN"
bitfld.long 0x00 20.--22. "       MULT_MSG_ENABLE       ,Number of allocated vectors" "1,2,3,4,16,32,?..."
textline "                        "
rbitfld.long 0x00 17.--19. " MULT_MSG_CAP            ,Number of requested vectors" "1,2,4,8,16,32,?..."
bitfld.long 0x00 16. "          MSI_ENABLE            ,MSI capability enable" "OFF,ON"
hexmask.long.byte 0x00 8.--15. 1. "       NEXT_PTR              ,Identifies the next item in the capabilities list"
textline "                        "
hexmask.long.byte 0x00 0.--7. 1. " CAP_ID                  ,MSI capability block"
line.long 0x04 "MSI_ADDR1,MSI Message Address Register"
hexmask.long 0x04 2.--31. 0x04 " MSG_ADDR                ,System-specified message address"
line.long 0x08 "MSI_ADDR2,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " MSG_DATA                ,System-specified message"
endif
group.long 0xC0++0x03
line.long 0x00 "MSI_QUEUE,MSI Message Queue Configuration Register"
bitfld.long 0x00 3. " MSI_QUEUE3              ,MSI message to VC queue 3 send enable" "Disabled,Enabled"
bitfld.long 0x00 2. "    MSI_QUEUE2            ,MSI message to VC queue 2 send enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  MSI_QUEUE1            ,MSI message to VC queue 1 send enable" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 0. " MSI_QUEUE0              ,MSI message to VC queue 0 send enable" "Disabled,Enabled"
sif !CPUIS("TEGRAX2")
group.long 0xEC++0x03
line.long 0x00 "MSI_MAP,MSI Mapping Capability Register"
rbitfld.long 0x00 27.--31. " CAP_TYPE                , MSI Mapping Capability" ",,,,,,,,,,,,,,,Default,?..."
rbitfld.long 0x00 17. "     FIXD                  ,Indicates that the next 2 dwords for programmable address are present in the capability" "OFF,ON"
bitfld.long 0x00 16. "       EN                    ,Mapping activity" "OFF,ON"
textline "                        "
hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR                ,NEXT_PTR field points to the next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "          CAP_ID                ,HT capability list item identification"
endif
group.long 0xF0++0x0F
line.long 0x00 "INDIRECT_IDP0,IDP pair to access 257-4K address space - Address register"
hexmask.long.word 0x00 2.--11. 1. " IDP_INDEX               ,IDP_INDEX"
line.long 0x04 "INDIRECT_IDP1,IDP pair to access 257-4K address space - DATA register"
line.long 0x08 "FPCICFG,FPCI Debug register"
bitfld.long 0x08 28.--31. " DEVID_OVERRIDE_ID       ,DEVID_OVERRIDE_ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 27. "          DEVID_OVERRIDE_ENABLE ,DEVID_OVERRIDE_ENABLE: Indicates a Linux system when set" "OFF,ON"
bitfld.long 0x08 26. "       DROP_ON_TA_ERR_ENABLE ,DROP_ON_TA_ERR_ENABLE" "OFF,ON"
textline "                        "
bitfld.long 0x08 25. " DROP_ON_MA_ERR_ENABLE   ,DROP_ON_MA_ERR_ENABLE" "OFF,ON"
bitfld.long 0x08 24. "         DROP_ON_ERR_ENABLE    ,DROP_ON_ERR_ENABLE" "OFF,ON"
bitfld.long 0x08 23. "       FIX_DEADLOCK_ENABLE   ,FIX_DEADLOCK_ENABLE" "OFF,ON"
textline "                        "
bitfld.long 0x08 22. " PASSIVE_UID_CLMP_ENABLE ,PASSIVE_UID_CLMP_ENABLE" "OFF,ON"
rbitfld.long 0x08 21. "         PASSIVE_UID_CLMP      ,PASSIVE_UID_CLMP" "NOT_SUPP,SUPP"
bitfld.long 0x08 16.--20. "  NONISO_READ_CREDITS   ,NONISO_READ_CREDITS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                        "
bitfld.long 0x08 15. " ERR_SEVERITY            , ERR_SEVERITY" "NONFATAL,FATAL"
bitfld.long 0x08 14. "    TGTDONE_PASSPW        ,TGTDONE_PASSPW" "CLR,SET"
bitfld.long 0x08 8. "       CREDIT_SYS_ENABLE     ,Read credit system enable" "OFF,ON"
textline "                        "
bitfld.long 0x08 6.--7. " COHCMD                  ,COHCMD" "TOY,COH,NONCOH,?..."
bitfld.long 0x08 4.--5. "      RSPPASSPW             ,Issue of non-posted commands" "TOY,PASS,NOPASS,?..."
bitfld.long 0x08 2.--3. "    PASSPW                ,Issue of non-broadcast commands" "TOY,PASS,NOPASS,?..."
textline "                        "
bitfld.long 0x08 0.--1. " ISOCMD                  ,Issue of ISO/NONISO-counterparts influenced commands issue" "TOY,ISO,NONISO,?..."
line.long 0x0C "SCRATCH_1,General purpose scratch register used for communication between the storage SW and the SBIOS"
textline "                        "
width 16.
group.long 0x114++0x0F
line.long 0x00 "NVOOB,Serial ATA internal PHY control register used in nvoob"
bitfld.long 0x00 31. " RETIMED_FAREND_LOOPBACK_EN   ,SATA controller farend retimed loopback mode enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "  COMMA_CNT                     ,The number of comma characters seen for the phy_rdy to go high after going through OOB signalling" "0,16,32,48,64,80,96,112"
textline "                         "
bitfld.long 0x00 26.--27. " SQUELCH_FILTER_LENGTH        ,Amount of glitch duration that are filtered out" "6.66ns,13.32ns,19.98ns,26.64ns"
bitfld.long 0x00 24.--25. "   SQUELCH_FILTER_MODE           ,Squelch signal filtering mode selection" "NONE,LOW,HIGH,?..."
line.long 0x04 "CROSS_BAR,SATA CROSS BAR: contains the phy_select"
line.long 0x08 "PMUCTL,SATA PHY Control Register"
rbitfld.long 0x08 24.--27. " CORE_STS                     ,Current core_act_sts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 16.--23. 1. "        DEV_STS_HOLD                  ,Number of txclk cycles to hold the dev_act_tog and dev_act_sts"
textline "                         "
bitfld.long 0x08 8. " HOLD_SEND_ALIGN_DIS          ,HOLD_SEND_ALIGN_DIS" "NO,YES"
bitfld.long 0x08 2. "       FORCE_CORE_CLAMP              ,Core clock clamp enable" "DIS,EN"
line.long 0x0C "CFG_PHY_0,CFG_PHY_0"
bitfld.long 0x0C 6. " PLL_IDDQ_OVERRIDE_VAL        ,PLL_IDDQ_OVERRIDE_VAL" "NO,YES"
bitfld.long 0x0C 5. "       PLL_IDDQ_OVERRIDE             ,PLL_IDDQ_OVERRIDE" "NO,YES"
textline "                         "
bitfld.long 0x0C 0.--4. " RBC_RESET_DELAY              ,Number of tx_clk ticks (300MHz) between the deassertion of sata2phy_ch{1,2}_cdr_reset and the release of ch{1,2}_rbc_reset_" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x12C++0x0F
line.long 0x00 "CFG_PHY_1,CFG_PHY_1"
bitfld.long 0x00 26. " DONT_CHK_PHY_RESET           ,DONT_CHK_PHY_RESET" "0,1"
bitfld.long 0x00 25. "         COMWAKE_GLOBAL                ,COMWAKE_GLOBAL" "0,1"
textline "                         "
bitfld.long 0x00 24. " PLL_PD_NO_CMDS               ,PLL_PD_NO_CMDS" "0,1"
bitfld.long 0x00 23. "         PADS_IDDQ_EN                  ,PADS_IDDQ_EN" "0,1"
textline "                         "
bitfld.long 0x00 22. " PAD_PLL_IDDQ_EN              ,PAD_PLL_IDDQ_EN" "0,1"
bitfld.long 0x00 21. "         SEND_OOB_DATA_IN_LOW_POWER    ,SEND_OOB_DATA_IN_LOW_POWER" "0,1"
textline "                         "
bitfld.long 0x00 20. " NO_OVERRIDE_STAT_IDLE_PHYRDY ,NO_OVERRIDE_STAT_IDLE_PHYRDY" "0,1"
bitfld.long 0x00 16.--19. "         NUMBER_OF_COMMA_WINDOWS       ,NUMBER_OF_COMMA_WINDOWS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                         "
hexmask.long.word 0x00 4.--15. 1. " COUNT_FOR_COMMA_WAIT         ,COUNT_FOR_COMMA_WAIT"
bitfld.long 0x00 3. "      DONT_USE_COMMA_FOR_PHYRDY_LOW ,DONT_USE_COMMA_FOR_PHYRDY_LOW" "0,1"
textline "                         "
bitfld.long 0x00 2. " EN_ASYNC_REC_ARC_IN_HRRDY    ,EN_ASYNC_REC_ARC_IN_HRRDY" "0,1"
bitfld.long 0x00 1. "         HOLD_RBC_RESET_IN_BIST        ,HOLD_RBC_RESET_IN_BIST" "0,1"
textline "                         "
bitfld.long 0x00 0. " ASSERT_PHYRDY_FOR_ALL_BIST   ,ASSERT_PHYRDY_FOR_ALL_BIST" "0,1"
line.long 0x04 "CFG2NVOOB_1,CFG2NVOOB_1"
hexmask.long.word 0x04 18.--26. 1. " COMINIT_IDLE_CNT_HIGH        ,COMINIT_IDLE_CNT_HIGH"
hexmask.long.word 0x04 9.--17. 1. "      ACTIVE_CNT_LOW                ,ACTIVE_CNT_LOW"
textline "                         "
hexmask.long.word 0x04 0.--8. 1. " ACTIVE_CNT_HIGH              ,ACTIVE_CNT_HIGH"
line.long 0x08 "CFG2NVOOB_2,CFG2NVOOB_2"
hexmask.long.word 0x08 18.--26. 1. " COMINIT_IDLE_CNT_LOW         ,COMINIT_IDLE_CNT_LOW"
hexmask.long.word 0x08 9.--17. 1. "      ACTIVE_CNT_HIGH               ,ACTIVE_CNT_HIGH"
textline "                         "
hexmask.long.word 0x08 0.--8. 1. " ACTIVE_CNT_LOW               ,ACTIVE_CNT_LOW"
line.long 0x0C "CFG_PHY_ACTIVE,CFG_PHY_ACTIVE"
hexmask.long.tbyte 0x0C 10.--31. 1. " FROM_SLUMBER                 ,Time to be in SLUMEBR state after we receive a COMWAKE from the device or the Link Layer lowers the slumber flag"
hexmask.long.word 0x0C 0.--9. 1. "    FROM_PARTIAL                  ,Time to be in PARTIAL state after we receive a COMWAKE from the device or the Link Layer lowers the partial flag"
group.long 0x170++0x13
line.long 0x00 "FIFO,FIFO"
bitfld.long 0x00 16.--19. " P2L_FIFO_DEPTH               ,Effective depth of p2l FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "        L2P_FIFO_DEPTH                ,Effective depth of l2p FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CFG_LINK_0,CFG_LINK_0"
bitfld.long 0x04 7. " GOTO_SEND_SYNC_P             ,Sending Link SM to L_SEND_SYNC_P in BIST" "NO,YES"
bitfld.long 0x04 6. "       AUTO_REPEAT_PRIMS             ,AUTO_REPEAT_PRIMS" "NO,YES"
textline "                         "
bitfld.long 0x04 5. " DEBOUNCE_PHYRDY_PERIOD       ,Hysteresis period" "SHORT,LONG"
bitfld.long 0x04 4. "     DEBOUNCE_PHYRDY               ,Phyrdy debounce behaviour" "NO,YES"
textline "                         "
bitfld.long 0x04 3. " DELAY_HOTPLUG_INTR           ,Generation of hotplug interrupts when we get PHYRDY" "NO,YES"
bitfld.long 0x04 2. "       SET_BSY_BIT_MTHD              ,SET_BSY_BIT_MTHD" "COMINIT,PHYRDY"
textline "                         "
bitfld.long 0x04 0.--1. " LED_MIN_ON_TIME              ,LED blinking" "OFF,20MS,40MS,80MS"
line.long 0x08 "CFG_LINK_1,CFG_LINK_1"
hexmask.long.word 0x08 16.--31. 1. " GEN3_DWRD_WAIT_CNT           ,Number of generation3 ALIGN dwords the controller sends to drive while waiting for gen3 align from drive"
hexmask.long.word 0x08 0.--15. 1. "      GEN2_DWRD_WAIT_CNT            ,Number of generation2 ALIGN dwords the controller sends to drive while waiting for gen2 align from drive"
line.long 0x0C "CFG_LINK_2,CFG_LINK_2"
bitfld.long 0x0C 12.--15. " PHYRDY_USE_ITH_BIT           ,PHYRDY_USE_ITH_BIT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "        USE_BIT_FOR_DEBOUNCE          ,USE_BIT_FOR_DEBOUNCE" "0,1"
textline "                         "
hexmask.long.word 0x0C 0.--10. 1. " PHYRDY_DBNC_MUX              ,Debounced version of PHYRDY which has two options: 10 ms and 10 us"
group.long 0x1D0++0x03
line.long 0x00 "CFG_TRANS_0,CFG_TRANS_0"
bitfld.long 0x00 1. " USE_RISE_EDGE_STATUS_RESET   ,USE_RISE_EDGE_STATUS_RESET" "0,1"
bitfld.long 0x00 0. "         F2I_FIFO_FLUSH_FIX            ,F2I_FIFO_FLUSH_FIX" "0,1"
textline "                         "
width 19.
width 16.
group.long 0x370++0x03
line.long 0x00 "CFG,Config"
hexmask.long.byte 0x00 24.--31. 1. " CTRL_TICKS_FOR_MASTER_TO        ,Control ticks used in Master-slave emulation"
group.long 0x490++0x03
line.long 0x00 "IDE1,OLD IDE TIMING"
rgroup.long 0x498++0x03
line.long 0x00 "FEATURE,Feature Register"
bitfld.long 0x00 18.--23. " FEATURE_AHCI_ESATA_DIS          ,FEATURE_AHCI_ESATA_DIS" "NO,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,YES"
bitfld.long 0x00 10.--12. "          RAID_FUNCTION_DIS                    ,RAID_FUNCTION_DIS" "0,1,2,3,4,5,6,7"
textline "                         "
bitfld.long 0x00 9. " PORTS_2_3_DIS                   ,PORTS_2_3_DIS" "NO,YES"
bitfld.long 0x00 8. "          PORTS_0_1_DIS                        ,PORTS_0_1_DIS" "NO,YES"
textline "                         "
bitfld.long 0x00 4. " AHCI_POWER_DIS                  ,AHCI_POWER_DIS" "NO,YES"
bitfld.long 0x00 3. "          FBS_DIS                              ,FBS_DIS" "NO,YES"
textline "                         "
bitfld.long 0x00 2. " GEN3_EN                         ,GEN3_EN" "NO,YES"
bitfld.long 0x00 1. "          GEN2_EN                              ,GEN2_EN" "NO,YES"
group.long 0x4A0++0x0B
line.long 0x00 "CTL1,Miscellaneous CTL1"
bitfld.long 0x00 9. " BLK_NONPIO_IDP                  ,NONPIO read in the case of IDP read suppression (second read block)" "Not blocked,Blocked"
bitfld.long 0x00 0. "  SATA_ADNVCD_SPD_NEGO                 ,Advanced way of detecting SATA speeds" "NO,YES"
line.long 0x04 "BKDOOR_CC,Backdoor update of the programming interface field and class code of the CFG2[15:8] register"
hexmask.long.word 0x04 16.--31. 1. " CLASS_CODE                      ,CLASS_CODE"
hexmask.long.byte 0x04 8.--15. 1. "         PROG_IF                              ,PROG_IF"
line.long 0x08 "CFG_CTRL_1,CFG_CTRL_1"
bitfld.long 0x08 1. " SATA_CAP                        ,SATA capability enable" "Disabled,Enabled"
bitfld.long 0x08 0. "     48BIT_ADDRESS_DISABLE                ,48-bit addressing mode disable" "Not disabled,Disabled"
textline "                         "
width 18.
group.long 0x4F0++0x07
line.long 0x00 "PERF0,SATA implementation options"
bitfld.long 0x00 28. " DONT_DELAY_ROK         ,Optimization feature on DMA reads" "FALSE,TRUE"
bitfld.long 0x00 25.--26. "              SATA_PLL_POWERDOWN       ,SATA_PLL_POWERDOWN" "NO,YES,?..."
bitfld.long 0x00 7.--11. "         MIN_FPCI_CLK_FREQ       ,Minimum frequency at which the fpci_clk should run in increments of 1/16th" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "PERF1,SATA implementation options"
hexmask.long.byte 0x04 24.--31. 1. " MAX_WATER_MARK         ,Maximum occupancy of the two i2f_fifos"
hexmask.long.byte 0x04 8.--15. 1. "                 HIGH_WATER_MARK_PIO      ,PIO reads high water mark"
hexmask.long.byte 0x04 0.--7. 1. "          HIGH_WATER_MARK         ,Configures the read FIFO limit at which point the host starts sending HOLD primitives to back-off the data transfer from device"
group.long 0x530++0x07
line.long 0x00 "CHXCFG1,CHXCFG1"
bitfld.long 0x00 12.--15. " PHY_CHX_RX_CTL         ,PHY_CHX_RX_CTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                 PHY_CHX_TX_CTL           ,PHY_CHX_TX_CTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1. "          CHX_NEAR_LOOP_BACK      ,CHX_NEAR_LOOP_BACK" "INACTIVE,ACTIVE"
textline "                           "
bitfld.long 0x00 0. " CHX_RESET              ,CHX_RESET" "INACTIVE,ACTIVE"
line.long 0x04 "PHY_CTRL,PHY_CTRL"
bitfld.long 0x04 3.--4. " PLL_SLEEP              ,Power setting of SATA2 internal PHY" "ACTIVE,3G_DISABLED,ALL_CLKS_DISABLED,PLL_DISABLED"
bitfld.long 0x04 0. "  SLUMBER_DURING_D3        ,Slumber During D3 Enable" "Disabled,Enabled"
group.long 0x53C++0x07
line.long 0x00 "LDT,LDT Unit ID Register"
bitfld.long 0x00 8.--12. " NON_ISO_UNIT_ID        ,Non-ISO Unit ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "                 ISO_UNIT_ID              ,ISO Unit ID. Hard-wired to 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "CTRL,CTRL"
bitfld.long 0x04 30. " ENABLE_CH2_CH4_INTR    ,ENABLE_CH2_CH4_INTR" "NO,YES"
bitfld.long 0x04 29. "                ENABLE_CH1_CH3_INTR      ,ENABLE_CH1_CH3_INTR" "NO,YES"
bitfld.long 0x04 27. "         NP_RSP_ERROR_INTR       ,NP_RSP_ERROR_INTR" "NO,YES"
textline "                           "
bitfld.long 0x04 26. " PW_CMD_ERROR_INTR      ,PW_CMD_ERROR_INTR" "NO,YES"
bitfld.long 0x04 25. "                NP_RSP_ERROR_INTR_EN     ,NP_RSP_ERROR_INTR_EN" "NO,YES"
bitfld.long 0x04 24. "         PW_CMD_ERROR_INTR_EN    ,PW_CMD_ERROR_INTR_EN" "NO,YES"
textline "                           "
bitfld.long 0x04 21. " CH4_EN                 ,CH4_EN" "NO,YES"
bitfld.long 0x04 20. "                CH3_EN                   ,CH3_EN" "NO,YES"
bitfld.long 0x04 3. "         INTF_ERR_HANDLING_EN    ,SATA interface errors advanced error handling feature enable" "NO,YES"
textline "                           "
bitfld.long 0x04 2. " BAR5_SPACE_EN          ,BAR5 space usage enable" "NO,YES"
bitfld.long 0x04 1. "                PRI_CHANNEL_EN           ,Primary SATA channel enable" "NO,YES"
bitfld.long 0x04 0. "         SEC_CHANNEL_EN          ,Secondary SATA channel enable" "NO,YES"
group.long 0x54C++0x0F
line.long 0x00 "CFG_SATA,CFG_SATA"
bitfld.long 0x00 16. " FORCE_NATIVE           ,FORCE_NATIVE Enable" "DISABLED,ENABLED"
bitfld.long 0x00 15. "           CTRL_ALT_UID_SCHEME      ,CTRL_ALT_UID_SCHEME" "0,1"
rbitfld.long 0x00 14. "           CTRL_SATA_GEN3_CAPABLE  ,CTRL_SATA_GEN3_CAPABLE" "NO,YES"
textline "                           "
rbitfld.long 0x00 13. " CTRL_SATA_GEN2_CAPABLE ,CTRL_SATA_GEN2_CAPABLE" "NO,YES"
bitfld.long 0x00 12. "                BACKDOOR_PROG_IF_EN      ,BACKDOOR_PROG_IF_EN" "NO,YES"
bitfld.long 0x00 7.--11. "         PORT2UNITID_MAPPING     ,PORT2UNITID_MAPPING" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                           "
bitfld.long 0x00 6. " MSI_CAP_DISABLE        , MSI_CAP_DISABLE" "NO,YES"
bitfld.long 0x00 5. "                MSIX_CAP_DISABLE         ,MSIX_CAP_DISABLE" "NO,YES"
bitfld.long 0x00 4. "         USE_40B_ADDR            ,NVIDIA style 40b addressing while DMAing data" "NO,YES"
textline "                           "
bitfld.long 0x00 3. " ERROR_HANDLING         ,ERROR_HANDLING" "NO,YES"
bitfld.long 0x00 2. "                CTRL_RAID_MODE_CTRL      ,RAID Controller mode" "OEM,CHANNEL"
bitfld.long 0x00 1. "     CTRL_STORAGE_FEATURE    ,General purpose bit that SW can use to distinguish between Advanced and Basic storage controller modes" "ADVANCED,BASIC"
line.long 0x04 "CFG_MISC,CFG_MISC"
bitfld.long 0x04 10. " PHY_RESET_USAGE_MODE2  ,LOCKDET or CFG bit select for pi_reset" "0,1"
bitfld.long 0x04 9. "                  PHY_RESET_USAGE_MODE1    ,ATA status register quick update during PIO writes enable" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 8. " PHY_RESET_USAGE_MODE0  ,LOCKDET use as PHY reset" "0,1"
bitfld.long 0x04 7. "                  CFG_MISC_LINK_SM_MODE3   ,L_IDLE features" "Disabled,Enabled"
bitfld.long 0x04 6. "    CFG_MISC_LINK_SM_MODE2  ,L_IDLE features" "Disabled,Enabled"
textline "                           "
bitfld.long 0x04 4. " CFG_MISC_LINK_SM_MODE0 ,Hold a bypass enable" "Disabled,Enabled"
bitfld.long 0x04 1. "           PHY_OOB_SEQ_MODE1        ,COMRESET behavior control" "Send 1 on scontrol_det[0] write,Send while scontrol_det active"
textline "                           "
bitfld.long 0x04 0. " PHY_OOB_SEQ_MODE0      ,COMWAKE send back off on COMWAKE received from drive" "0,1"
line.long 0x08 "LOWPOWER_COUNT ,LOWPOWER_COUNT"
bitfld.long 0x08 4.--7. " LOWPOWER_COUNT_SLUMBER ,LOWPOWER_COUNT_SLUMBER" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                 LOWPOWER_COUNT_PARTIAL   ,LOWPOWER_COUNT_PARTIAL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "DEVSLP_CTRL0,DEVSLP_CTRL0"
rbitfld.long 0x0C 0. " PARTIAL_OR_SLUMBER     ,PORT0_INTFC_IN_PARTIAL_OR_SLUMBER" "0,1"
group.long 0x680++0x07
line.long 0x00 "INDEX,Index Mask Register"
bitfld.long 0x00 3. " CH04                   ,CH04" "UNSELECTED,SELECTED"
bitfld.long 0x00 2. "         CH03                     ,CH03" "UNSELECTED,SELECTED"
bitfld.long 0x00 1. "  CH02                    ,CH02" "UNSELECTED,SELECTED"
textline "                           "
bitfld.long 0x00 0. " CH01                   ,CH01" "UNSELECTED,SELECTED"
line.long 0x04 "CHX_MISC ,SATA Miscellaneous Control Register"
bitfld.long 0x04 0. " LED_DISABLE            ,LED_DISABLE" "0,1"
textline "                           "
width 20.
group.long 0x690++0x0F
line.long 0x00 "CHX_PHY_CTRL1_GEN1,SATA PHY Control Register (GEN1)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x00 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 16.--19. "          TX_CMADJ                ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
hexmask.long.byte 0x00 8.--15. 1. " TX_PEAK              ,PEAK values for GEN1"
hexmask.long.byte 0x00 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN1"
line.long 0x04 "CHX_PHY_CTRL1_GEN2,SATA PHY Control Register (GEN2)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x04 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
hexmask.long.byte 0x04 12.--19. 1. "          TX_PEAK                 ,PEAK values for GEN2"
textline "                             "
bitfld.long 0x04 8.--11. " TX_CMADJ             ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x04 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN2"
line.long 0x08 "CHX_PHY_CTRL1_GEN3,SATA PHY Control Register (GEN3)"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x08 26.--29. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 20.--25. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
bitfld.long 0x08 24.--27. " TX_DRV_CNTL          ,TX_DRV_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 20.--23. "                 TX_PEAK_PRE              ,TX_PEAK_PRE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
hexmask.long.byte 0x08 12.--19. 1. "          TX_PEAK                 ,PEAK values for GEN3"
textline "                             "
bitfld.long 0x08 8.--11. " TX_CMADJ             ,TX_CMADJ" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 0.--7. 1. "                 TX_AMP                   ,AMP values for GEN3"
line.long 0x0C "CHX_PHY_CTRL2,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
hexmask.long.word 0x0C 16.--31. 1. " CDR_CNTL_GEN2        ,CDR_CNTL_GEN2"
hexmask.long.word 0x0C 0.--15. 1. "               CDR_CNTL_GEN1            ,CDR_CNTL_GEN1"
else
hexmask.long.byte 0x0C 16.--23. 1. " CDR_CNTL_GEN3        ,CDR_CNTL_GEN3"
hexmask.long.byte 0x0C 8.--15. 1. "                 CDR_CNTL_GEN2            ,CDR_CNTL_GEN2"
hexmask.long.byte 0x0C 0.--7. 1. "          CDR_CNTL_GEN1           ,CDR_CNTL_GEN1"
endif
textline "                           "
width 18.
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x6A0++0x0B
line.long 0x00 "CHX_PHY_CTRL24,SATA PHY Control Register"
hexmask.long.word 0x00 0.--15. 1. " CDR_CNTL_GEN3          ,CDR_CNTL_GEN3"
line.long 0x04 "CHX_PHY_CTRL25,SATA PHY Control Register"
line.long 0x08 "CHX_PHY_CTRL25,SATA PHY Control Register"
endif
group.long 0x6B0++0x2F
line.long 0x00 "CHX_PHY_CTRL3,SATA PHY Control Register"
rbitfld.long 0x00 29. " STATUS_RX_STAT_IDLE    ,STATUS_RX_STAT_IDLE" "0,1"
rbitfld.long 0x00 28. "                  STATUS_TX_STAT_PRESENT   ,STATUS_TX_STAT_PRESENT" "0,1"
rbitfld.long 0x00 26.--27. "           STATUS_RX_RATE          ,STATUS_RX_RATE" "GEN1,GEN2,GEN3,?..."
textline "                           "
rbitfld.long 0x00 24.--25. " STATUS_TX_RATE         ,STATUS_TX_RATE" "GEN1,GEN2,GEN3,?..."
bitfld.long 0x00 23. "               RX_RATE_OVERRIDE         ,RX_RATE_OVERRIDE" "DISABLED,ENABLED"
bitfld.long 0x00 20.--21. "    RX_RATE                 ,RX_RATE" "GEN1,GEN2,GEN3,?..."
textline "                           "
bitfld.long 0x00 19. " TX_RATE_OVERRIDE       ,TX_RATE_OVERRIDE" "DISABLED,ENABLED"
bitfld.long 0x00 16.--17. "           TX_RATE                  ,TX_RATE" "GEN1,GEN2,GEN3,?..."
bitfld.long 0x00 15. "        RX_DATA_READY           ,RX_DATA_READY" "NO,YES"
textline "                           "
bitfld.long 0x00 14. " RX_DATA_EN             ,RX_DATA_EN" "0,1"
bitfld.long 0x00 13. "                  TX_DATA_EN_OVERRIDE      ,TX_DATA_EN_OVERRIDE" "NO,YES"
bitfld.long 0x00 12. "         TX_DATA_EN              ,TX_DATA Enable (manually)" "NO,YES"
textline "                           "
bitfld.long 0x00 11. " RX_SLEEP_OVERRIDE      ,RX_SLEEP_OVERRIDE" "NO,YES"
bitfld.long 0x00 10. "                TX_DATA_READY            ,TX_DATA_READY" "NO,YES"
bitfld.long 0x00 8.--9. "         RX_SLEEP                ,Sleep mode on the SATA port selection (used for debug of the sleep modes)" "Active,Partial,Slumber,Disabled"
textline "                           "
bitfld.long 0x00 7. " TX_SLEEP_OVERRIDE      ,Enable a forced sleep mode on the SATA port" "NO,YES"
bitfld.long 0x00 4.--5. "                TX_SLEEP                 ,Sleep mode on the SATA port selection (used for debug of the sleep modes)" "Active,Partial,Slumber,Disabled"
bitfld.long 0x00 3. "    CKBUFPD_OVRD            ,CKBUFPD_OVRD" "0,1"
textline "                           "
bitfld.long 0x00 2. " CKBUFPD                ,CKBUFPD" "0,1"
bitfld.long 0x00 0. "                  IDDQ                     ,IDDQ" "0,1"
line.long 0x04 "CHX_PHY_CTRL4,SATA PHY Control Register"
bitfld.long 0x04 30.--31. " SPARE_OUT              ,SPARE_OUT" "0,1,2,3"
bitfld.long 0x04 28.--29. "                  SPARE_IN                 ,SPARE_IN" "0,1,2,3"
bitfld.long 0x04 27. "           PRBS_CHK_EN             ,PRBS_CHK_EN" "0,1"
textline "                           "
bitfld.long 0x04 26. " TEST_EN                ,TEST_EN" "0,1"
bitfld.long 0x04 24. "                  RATE_MODE                ,RATE_MODE" "0,1"
bitfld.long 0x04 20.--21. "           RX_DIV                  ,RX_DIV" "0,1,2,3"
textline "                           "
bitfld.long 0x04 16.--17. " TX_DIV                 ,TX_DIV" "0,1,2,3"
bitfld.long 0x04 13. "                  RX_CDR_RESET             ,RX_CDR_RESET" "0,1"
bitfld.long 0x04 12. "           TX_SYNC                 ,TX_SYNC" "IDLE,NOW"
textline "                           "
bitfld.long 0x04 11. " FED_LOOP               ,FED_LOOP" "0,1"
bitfld.long 0x04 8.--10. "                  TX_DATA_MODE             ,TX_DATA_MODE" "NORMAL,PRBS_2_7,0101010101,1100110011,0000011111,0101111100,?..."
bitfld.long 0x04 7. "  FEA_LOOP                ,FEA_LOOP" "0,1"
textline "                           "
bitfld.long 0x04 4.--6. " FEA_MODE               ,FEA_MODE" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 3. "                  NEA_LOOP                 ,NEA_LOOP" "0,1"
bitfld.long 0x04 2. "           NED_LOOP                ,NED_LOOP" "0,1"
textline "                           "
bitfld.long 0x04 0.--1. " NED_MODE               ,NED_MODE" "0,1,2,3"
line.long 0x08 "CHX_PHY_CTRL5,SATA PHY Control Register"
bitfld.long 0x08 24.--27. " CDR_MODE               ,CDR_MODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 19. "                 TX_RDET                  ,TX_RDET" "IDLE,START"
bitfld.long 0x08 18. "       RX_IDLE_MODE            ,RX_IDLE_MODE" "0,1"
textline "                           "
bitfld.long 0x08 17. " RX_IDLE_BYP            ,RX_IDLE_BYP" "DISABLED,ENABLED"
bitfld.long 0x08 16. "           TX_RDET_BYP              ,TX_RDET_BYP" "DISABLED,ENABLED"
bitfld.long 0x08 14.--15. "    RX_IDLE_T               ,RX_IDLE_T" "0,1,2,3"
textline "                           "
bitfld.long 0x08 12.--13. " TX_RDET_T              ,TX_RDET_T" "0,1,2,3"
bitfld.long 0x08 8.--11. "                  TX_SEL_LOAD              ,TX_SEL_LOAD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "          MISC_CNTL               ,MISC_CNTL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CHX_PHY_CTRL6,SATA PHY Control Register"
sif cpuis("TEGAX1")||cpuis("TEGRAX2")
rbitfld.long 0x0C 27.--28. " RX_BYP_DATA            ,RX_BYP_DATA" "0,1,2,3"
bitfld.long 0x0C 26. "                  RX_TERM_MODE             ,RX_TERM_MODE" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 25. " RX_TERM_EN             ,RX_TERM_EN" "FALSE,TRUE"
bitfld.long 0x0C 24. "              TX_TERM_MODE             ,TX_TERM_MODE" "FALSE,TRUE"
textline "                           "
endif
hexmask.long.byte 0x0C 16.--23. 1. " MISC_OUT               ,MISC_OUT"
rbitfld.long 0x0C 14. "                 RX_BYP_IN                ,RX_BYP_IN" "0,1"
rbitfld.long 0x0C 12. "           TX_BYP_IN               ,TX_BYP_IN" "0,1"
textline "                           "
bitfld.long 0x0C 10. " RX_BYP_MODE            ,RX_BYP_MODE" "FALSE,TRUE"
bitfld.long 0x0C 7. "              RX_BYP_EN                ,RX_BYP_EN" "FALSE,TRUE"
bitfld.long 0x0C 6. "       RX_BYP_DIR              ,RX_BYP_DIR" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 4. " RX_BYP_OUT             ,RX_BYP_OUT" "FALSE,TRUE"
bitfld.long 0x0C 3. "              TX_BYP_EN                ,TX_BYP_EN" "FALSE,TRUE"
bitfld.long 0x0C 2. "       TX_BYP_DIR              ,TX_BYP_DIR" "FALSE,TRUE"
textline "                           "
bitfld.long 0x0C 0. " TX_BYP_OUT             ,TX_BYP_OUT" "FALSE,TRUE"
line.long 0x10 "CHX_PHY_CTRL7,SATA PHY Control Register"
bitfld.long 0x10 20.--23. " RX_WANDER_GEN3         ,RX_WANDER_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 18.--19. "                 RX_TERM_CNTL_GEN3        ,RX_TERM_CNTL_GEN3" "0,1,2,3"
bitfld.long 0x10 16.--17. "           TX_TERM_CNTL_GEN3       ,TX_TERM_CNTL_GEN3" "0,1,2,3"
textline "                           "
bitfld.long 0x10 12.--15. " RX_WANDER_GEN2         ,RX_WANDER_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 10.--11. "                 RX_TERM_CNTL_GEN2        ,RX_TERM_CNTL_GEN2" "0,1,2,3"
bitfld.long 0x10 8.--9. "           TX_TERM_CNTL_GEN2       ,TX_TERM_CNTL_GEN2" "0,1,2,3"
textline "                           "
bitfld.long 0x10 4.--7. " RX_WANDER_GEN1         ,RX_WANDER_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 2.--3. "                 RX_TERM_CNTL_GEN1        ,RX_TERM_CNTL_GEN1" "0,1,2,3"
bitfld.long 0x10 0.--1. "           TX_TERM_CNTL_GEN1       ,TX_TERM_CNTL_GEN1" "0,1,2,3"
line.long 0x14 "CHX_PHY_CTRL8,SATA PHY Control Register"
rbitfld.long 0x14 16.--21. " RX_QEYE_OUT            ,RX_QEYE_OUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x14 8. "                 RX_QEYE_EN_GEN3          ,RX_QEYE_EN_GEN3" "0,1"
bitfld.long 0x14 4. "           RX_QEYE_EN_GEN2         ,RX_QEYE_EN_GEN2" "0,1"
textline "                           "
bitfld.long 0x14 0. " RX_QEYE_EN_GEN1        ,RX_QEYE_EN_GEN1" "0,1"
line.long 0x18 "CHX_PHY_CTRL9,SATA PHY Control Register"
hexmask.long.word 0x18 16.--31. 1. " MISC_TEST              ,MISC_TEST"
hexmask.long.byte 0x18 8.--15. 1. "               MISC_OUT_SEL             ,MISC_OUT_SEL"
bitfld.long 0x18 2. "          DFE_RESET               ,DFE_RESET" "0,1"
textline "                           "
rbitfld.long 0x18 1. " DFE_TRAIN_DONE         ,DFE_TRAIN_DONE" "0,1"
bitfld.long 0x18 0. "                  DFE_TRAIN_EN             ,DFE_TRAIN_EN" "0,1"
line.long 0x1C "CHX_PHY_CTRL10,SATA PHY Control Register"
hexmask.long.word 0x1C 16.--31. 1. " EOM_CNTL               ,EOM_CNTL"
bitfld.long 0x1C 2. "               EOM_EN                   ,EOM_EN" "0,1"
rbitfld.long 0x1C 1. "           EOM_TRAIN_DONE          ,EOM_TRAIN_DONE" "0,1"
textline "                           "
bitfld.long 0x1C 0. " EOM_TRAIN_EN           ,EOM_TRAIN_EN" "0,1"
line.long 0x20 "CHX_PHY_CTRL11,SATA PHY Control Register"
hexmask.long.word 0x20 16.--31. 1. " GEN2_RX_EQ             ,GEN2_RX_EQ"
hexmask.long.word 0x20 0.--15. 1. "               GEN1_RX_EQ               ,GEN1_RX_EQ"
line.long 0x24 "CHX_PHY_CTRL12,SATA PHY Control Register"
hexmask.long.word 0x24 0.--15. 1. " GEN3_RX_EQ             ,GEN3_RX_EQ"
line.long 0x28 "CHX_PHY_CTRL13,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x28 20.--23. " RX_IQ_CTRL_GEN3        ,RX_IQ_CTRL_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 16.--19. "                 RX_IQ_CTRL_GEN2          ,RX_IQ_CTRL_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x28 12.--15. "          RX_IQ_CTRL_GEN1         ,RX_IQ_CTRL_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                           "
endif
hexmask.long.word 0x28 0.--11. 1. " CDR_TEST               ,CDR_TEST"
line.long 0x2C "CHX_PHY_CTRL14,SATA PHY Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x700++0x1F
line.long 0x00 "CHX_PHY_CTRL15,SATA PHY Control Register"
bitfld.long 0x00 20.--23. " RX_FELS_GEN3           ,RX_FELS_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "                 RX_FELS_GEN2             ,RX_FELS_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "          RX_FELS_GEN1            ,RX_FELS_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                           "
bitfld.long 0x00 8.--11. " DRV_SLEW_GEN3          ,DRV_SLEW_GEN3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                 DRV_SLEW_GEN2            ,DRV_SLEW_GEN2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "          DRV_SLEW_GEN1           ,DRV_SLEW_GEN1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CHX_PHY_CTRL16,SATA PHY Control Register"
hexmask.long.byte 0x04 16.--23. 1. " RX_PI_CTRL_GEN3        ,RX_PI_CTRL_GEN3"
hexmask.long.byte 0x04 8.--15. 1. "                 RX_PI_CTRL_GEN2          ,RX_PI_CTRL_GEN2"
hexmask.long.byte 0x04 0.--7. 1. "          RX_PI_CTRL_GEN1         ,RX_PI_CTRL_GEN1"
line.long 0x08 "CHX_PHY_CTRL17,SATA PHY Control Register"
line.long 0x0C "CHX_PHY_CTRL18,SATA PHY Control Register"
line.long 0x10 "CHX_PHY_CTRL19,SATA PHY Control Register"
line.long 0x14 "CHX_PHY_CTRL20,SATA PHY Control Register"
line.long 0x18 "CHX_PHY_CTRL21,SATA PHY Control Register"
line.long 0x1C "CHX_PHY_CTRL22,SATA PHY Control Register"
endif
group.long 0x700++0x07
line.long 0x00 "CHXCFG3,Serial ATA Control Register"
hexmask.long.word 0x00 16.--31. 1. " CHX_PRBS_ERROR_CNT     ,CHX_PRBS_ERROR_CNT"
hexmask.long.byte 0x00 8.--15. 1. "               CHX_BIST_CODE            ,CHX_BIST_CODE"
rbitfld.long 0x00 1. "          CHX_BIST_STAT           ,CHX_BIST_STAT" "NOT_BUSY,BUSY"
textline "                           "
eventfld.long 0x00 0. " CHX_BIST_SEND          ,CHX_BIST_SEND" "INIT,NOW"
line.long 0x04 "CHXCFG4_CHX,CHXCFG4_CHX"
bitfld.long 0x04 12. " CHX_SW_COMWAKE_PI      ,CHX_SW_COMWAKE_PI" "0,1"
bitfld.long 0x04 8.--11. "                  CHX_PHY_ALIGN_NUM_CNT    ,Number of ALIGN primitive pairs that are inserted by the PHY interface block into the output stream" "1 pair,2 pairs,3 pairs,4 pairs,5 pairs,6 pairs,7 pairs,8 pairs,9 pairs,10 pairs,11 pairs,12 pairs,13 pairs,14 pairs,15 pairs,16 pairs"
hexmask.long.byte 0x04 0.--7. 1. "    CHX_PHY_ALIGN_DWORD_CNT ,Number of DWORDs sent before the required align pairs"
group.long 0x714++0x03
line.long 0x00 "PRBS_CHX,Control bits for the IOBIST PRBS generator and checker"
hexmask.long.word 0x00 16.--31. 1. " ERROR_COUNT            ,ERROR_COUNT"
rbitfld.long 0x00 15. "               LOCKED                   ,LOCKED" "0,1"
rbitfld.long 0x00 14. "           ERROR                   ,ERROR" "0,1"
textline "                           "
bitfld.long 0x00 12. " HOT_RESET              ,HOT_RESET" "0,1"
bitfld.long 0x00 10. "                  PI_LOOPBACK              ,PI_LOOPBACK" "0,1"
hexmask.long.word 0x00 0.--9. 1. "           SEED                    ,SEED"
sif cpuis("TEGRAX1")||cpuis("TEGRAX1")
group.long 0x718++0x03
line.long 0x00 "CHX_PHY_CTRL23,SATA PHY Control Register"
bitfld.long 0x00 16. " RX_EOM_DONE              ,RX_EOM_DONE" "0,1"
hexmask.long.word 0x00 0.--15. 1. " RX_EOM_STATUS            ,RX_EOM_STATUS"
endif
group.long 0x750++0x03
line.long 0x00 "CHX_LINK0,CHX_LINK0"
bitfld.long 0x00 2. " IDDQ_ON_OFFLINE        ,IDDQ_ON_OFFLINE" "NO,YES"
bitfld.long 0x00 1. "                CONT_DISABLE             ,CONT primitive in the SATA TX: Disable" "NO,YES"
bitfld.long 0x00 0. "         SCRAM_DIS               ,Data scrambling in the SATA Link layer: Disable" "NO,YES"
textline "                           "
width 27.
group.long 0x790++0x0B
line.long 0x00 "CHX_AHCI_PORT_PXTFD_BKDR,Backdoor register for PXTFD of the PSM registers"
hexmask.long.byte 0x00 8.--15. 1. " ERR                ,ERR"
bitfld.long 0x00 7. "           STS_BSY                      ,STS_BSY" "CLEARED,SET"
bitfld.long 0x00 6. "      STS_DRDY              ,STS_DRDY" "CLEARED,SET"
textline "                                    "
bitfld.long 0x00 5. " STS_DF             ,STS_DF" "CLEARED,SET"
bitfld.long 0x00 4. "      STS_CS                       ,STS_CS" "CLEARED,SET"
bitfld.long 0x00 3. "      STS_DRQ               ,STS_DRQ" "CLEARED,SET"
textline "                                    "
bitfld.long 0x00 1.--2. " STS_2_1            ,STS_2_1" "0,1,2,3"
bitfld.long 0x00 0. "            STS_ERR                      ,STS_ERR" "CLEARED,SET"
line.long 0x04 "CHX_AHCI_PORT_PXSIG_BKDR,Backdoor register for PXSIG of the PSM registers"
hexmask.long.byte 0x04 24.--31. 1. " LBA_HIGH           ,LBA_HIGH"
hexmask.long.byte 0x04 16.--23. 1. "           LBA_MID                      ,LBA_MID"
hexmask.long.byte 0x04 8.--15. 1. "           LBA_LOW               ,LBA_LOW"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " SECTOR_CNT         ,SECTOR_CNT"
line.long 0x08 "CHX_AHCI_PORT_PXSSTS_BKDR,Backdoor register for PXSSTS_SPD of the PSM registers"
bitfld.long 0x08 8.--11. " IPM                ,IPM" "NO_DEV,,,,,,SLUMBER,,DEVSLEEP,?..."
bitfld.long 0x08 4.--7. "     SPD                          ,SPD" "NO_DEV,GEN1,GEN2,GEN3,?..."
bitfld.long 0x08 0.--3. "       DET                   ,DET" "NO_DEV,?..."
group.long 0x7F0++0x03
line.long 0x00 "CHX_GLUE,CHX_GLUE"
bitfld.long 0x00 0. " ATAPI_BLINK_EN     ,LED_ACTIVE signal qualifier" "0,1"
rgroup.long 0xAC0++0x03
line.long 0x00 "INTR,Serial ATA Reserved Register"
bitfld.long 0x00 31. " SEC_INTR           ,Secondary Interrupt pending status" "NOT_PENDING,PENDING"
bitfld.long 0x00 30. "  PRI_INTR                     ,Primary Interrupt pending status" "NOT_PENDING,PENDING"
group.long 0xC00++0x07
line.long 0x00 "EMU1,Serial ATA Control Register"
bitfld.long 0x00 28.--31. " PHY_UART_TIMEOUT   ,PHY_UART_TIMEOUT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 26. "           PHY_USE_RBC1                 ,PHY_USE_RBC1" "NO,YES"
bitfld.long 0x00 25. "          PHY_ABSORB_ALIGN_PRIM ,PHY_ABSORB_ALIGN_PRIM" "NO,YES"
textline "                                    "
bitfld.long 0x00 24. " PHY_BYPASS_EN      ,PHY_BYPASS_EN" "NO,YES"
hexmask.long.byte 0x00 16.--23. 1. "          PHY_UART_SAMPLE              ,PHY_UART_SAMPLE"
hexmask.long.byte 0x00 8.--15. 1. "           PHY_UART_DIV          ,PHY_UART_DIV"
textline "                                    "
bitfld.long 0x00 6. " PHY_PM_EN          ,PHY_PM_EN" "NO,YES"
bitfld.long 0x00 5. "          PHY_TXCLK_EARLY              ,PHY_TXCLK_EARLY" "NO,YES"
bitfld.long 0x00 4. "          PHY_DATA_EARLY        ,PHY_DATA_EARLY" "NO,YES"
textline "                                    "
rbitfld.long 0x00 1.--3. " PHY_SEL            ,PHY_SEL" "NOTHING,MARVELL,SI,NVDA_EXT,NVDA_INT,?..."
bitfld.long 0x00 0. "     RESET_ON_COMRESET            ,RESET_ON_COMRESET" "NO,YES"
line.long 0x04 "EMU2,Serial ATA Backdoor Class Code Register"
bitfld.long 0x04 31. " RETRY_CTL_FIS_SRST ,RETRY_CTL_FIS_SRST" "0,1"
bitfld.long 0x04 24.--26. "            AHCI_DEBUG_PORT_SEL          ,AHCI_DEBUG_PORT_SEL" "ZERO,ONE,TWO,THREE,?..."
tree.end
width 0x0B
tree.end
tree "AUX Registers"
base ad:0x03501100
width 17.
group.long 0x08++0x07
line.long 0x00 "MISC_CNTL_1,Misc Control 1 Register"
bitfld.long 0x00 19. " AUX_RX_IDLE_STATUS_MASK             ,AUX Rx idle status input mask" "Not masked,Masked"
bitfld.long 0x00 18. "     AUX_OR_CORE_IDLE_STATUS_SEL     ,Interrupt generation Rx idle status source select" "AUX,CORE"
sif !cpuis("TEGRAX1")
textline "                          "
bitfld.long 0x00 17. " DEVSLP_OVERRIDE                     ,SATA core DEVSLP output override enable" "Disabled,Enabled"
bitfld.long 0x00 16. "       DSP_SUPPORT                     ,Device sleep support" "Not supported,Supported"
textline "                          "
bitfld.long 0x00 15. " DESO_SUPPORT                        ,Capability to enter DEVSLP from state" "Any,Slumber"
bitfld.long 0x00 14. "        SADM_SUPPORT                    ,SATA core capability to support hardware assertion of the DEVSLP" "Not supported,Supported"
endif
textline "                          "
bitfld.long 0x00 13. " SDS_SUPPORT                         ,SATA core device sleep support" "Not supported,Supported"
bitfld.long 0x00 12. "  RX_STAT_IDLE_MASK               ,Mask the Rx stat idle input to the SATA core" "Not masked,Masked"
sif !cpuis("TEGRAX1")
textline "                          "
rbitfld.long 0x00 11. " SATA2IPSM_DEVSLP                    ,SATA link DEVSLP state" "Disabled,Enabled"
endif
textline "                          "
rbitfld.long 0x00 9.--10. " SATA2IPSM_ST                        ,SATA link partial/slumber modes indication" "0,1,2,3"
bitfld.long 0x00 8. "              NVA2SATA_OOB_ON_SCONTROL_SPD_WR ,OOB and through speed negotiation on SCONTROL SPD write" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 7. " NVA2SATA_OOB_ON_POR                 ,Automatic OOB sequence on coming out of reset" "Disabled,Enabled"
rbitfld.long 0x00 5.--6. "       L0_RX_IDLE_T_SAX                ,L0 Rx idle T value from the SATA controller" "0,1,2,3"
textline "                          "
bitfld.long 0x00 3.--4. " L0_RX_IDLE_T_NPG                    ,L0 Rx idle T value for the SATA PHY from APB misc" "0,1,2,3"
bitfld.long 0x00 2. "              L0_RX_IDLE_T_MUX                ,Select L0 Rx idle T driving source for SATA PHY" "SATA controller,APB misc"
textline "                          "
bitfld.long 0x00 1. " PMU2SATA_ACCLMTR_TRIG               ,External accelerometer trigger enable" "Disabled,Enabled"
bitfld.long 0x00 0. "       DEVICE_DIS_SATA0                ,Serial ATA interface 0 disable" "No,Yes"
line.long 0x04 "RX_STAT_INT,Rx Stat Int Register"
sif cpuis("TEGRAX2")
bitfld.long 0x04 11. " SATA_AUX_RX_STAT_INT_DISABLE        ,SATA AUX Rx stat interrupt disable" "No,Yes"
rbitfld.long 0x04 10. "            SATA_L0_AUX_RX_STAT_IDLE        ,SATA PAD L0 AUX Rx idle status status" "Active,Idle"
textline "                          "
setclrfld.long 0x04 9. 0x08 3. 0x0C 3. " SATA_AUX_RX_STAT_INT_STATUS_SET/CLR ,SATA Rx stat interrupt status from SATA PAD VAUX portion" "No interrupt,Interrupt"
textline "                          "
endif
sif !cpuis("TEGRAX1")
bitfld.long 0x04 8. " SATA_DEVSLP_INT_DISABLE             ,SATA DEVSLP interrupt disable" "No,Yes"
rbitfld.long 0x04 7. "            SATA_DEVSLP                     ,SATA DEVSLP state interrupt status" "No interrupt,Interrupt"
textline "                          "
setclrfld.long 0x04 6. 0x08 2. 0x0C 2. " SATA_DEVSLP_INT_STATUS_SET/CLR      ,SATA DEVSLP state interrupt status" "No interrupt,Interrupt"
endif
textline "                          "
bitfld.long 0x04 5. " SATA_DEV_ATTEN_INT_DISABLE          ,SATA device attention interrupt disable" "No,Yes"
rbitfld.long 0x04 4. "            SATA_DEVICE_ATTENTION           ,SATA device attention status" "Cleared,Asserted"
setclrfld.long 0x04 3. 0x08 1. 0x0C 1. "         SATA_DEV_ATTEN_INT_STATUS_SET/CLR ,SATA device attention interrupt status from GPIO" "No interrupt,Interrupt"
textline "                          "
sif !cpuis("TEGRAX2")
bitfld.long 0x04 2. " SATA_RX_STAT_INT_DISABLE            ,SATA Rx stat interrupt disable" "No,Yes"
textline "                          "
rbitfld.long 0x04 1. " SATA_L0_RX_STAT_IDLE                ,SATA PAD L0 Rx stat idle status" "Idle,Active"
endif
setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " SATA_RX_STAT_INT_STATUS_SET/CLR     ,SATA Rx stat interrupt status from the SATA PAD" "No interrupt,Interrupt"
group.long 0x18++0x1B
line.long 0x00 "SPARE_CFG0,Spare CFG0 Register"
bitfld.long 0x00 14. " MDAT_TIMER_AFTER_PG_VALID           ,MDAT timer value valid" "Invalid,Valid"
bitfld.long 0x00 8.--13. "        MDAT_TIMER_AFTER_PG             ,MDAT timer value to be updated by the SW before power-ungating SATA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rbitfld.long 0x00 0.--5. "               MDAT_TIMER_BEFORE_PG              ,MDAT timer value to be updated by the SW before power-gating SATA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "SPARE_CFG1,Spare CFG1 Register"
line.long 0x08 "PAD_PLL_CTRL,SATA PAD PLL Control Register"
bitfld.long 0x08 28.--29. " PLL1_REFCLK_NDIV                    ,Select feedback divider for PLL" "0,1,2,3"
rbitfld.long 0x08 27. "              PLL1_LOCKDET                    ,PLL1 locked" "Not locked,Locked"
bitfld.long 0x08 24. "       PLL1_MODE                         ,PLL1 mode" "0,1"
textline "                          "
bitfld.long 0x08 20.--21. " PLL0_REFCLK_NDIV                    ,Select feedback divider for PLL" "0,1,2,3"
rbitfld.long 0x08 19. "              PLL0_LOCKDET                    ,PLL0 locked" "Not locked,Locked"
bitfld.long 0x08 16. "       PLL0_MODE                         ,PLL0 mode" "0,1"
textline "                          "
bitfld.long 0x08 12.--15. " REFCLK_SEL                          ,Reference clock select" "Internal CML,Internal CMOS,External,External,?..."
bitfld.long 0x08 11. "  REFCLK_TERM100                  ,REFCLK TERM100" "0,1"
bitfld.long 0x08 9. "                PLL_CKBUFPD_OVRD                  ,PLL CKBUFPD override" "No override,Override"
textline "                          "
bitfld.long 0x08 8. " PLL_CKBUFPD_M                       ,PLL CKBUFPD M" "0,1"
bitfld.long 0x08 7. "              PLL_CKBUFPD_BL                  ,PLL CKBUFPD BL" "0,1"
bitfld.long 0x08 6. "                PLL_CKBUFPD_BR                    ,PLL CKBUFPD BR" "0,1"
textline "                          "
bitfld.long 0x08 5. " PLL_CKBUFPD_TL                      ,PLL CKBUFPD TL" "0,1"
bitfld.long 0x08 4. "              PLL_CKBUFPD_TR                  ,PLL CKBUFPD TR" "0,1"
bitfld.long 0x08 2. "                PLL_EMULATION_RSTN                ,Digital reset for clock divider during emulation mode" "Reset,No reset"
line.long 0x0C "PAD_PLL_CTRL_1,PAD PLL Control 1 Register"
bitfld.long 0x0C 20.--23. " PLL1_CP_CNTL                        ,Charge-pump current control for PLL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16.--19. "             PLL0_CP_CNTL                    ,Charge-pump current control for PLL0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 15. "               PLL_BYPASS_EN                     ,Bypass PLL serial output clocks with input reference clock" "Not bypassed,Bypassed"
textline "                          "
bitfld.long 0x0C 13. " PLL_EMULATION_ON                    ,Enable clock bypass for emulation mode" "Disabled,Enabled"
bitfld.long 0x0C 12. "       TCLKOUT_EN                      ,Enable test clock output PADs TSTCLKP/N" "Disabled,Enabled"
bitfld.long 0x0C 8.--11. "         TCLKOUT_SEL                       ,Select internal clock source to bring out through the TSTCLKP/N PADs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x0C 7. " XDIGCLK4P5_EN                       ,Enable XDIGCLK4P5 clock output to core" "Disabled,Enabled"
bitfld.long 0x0C 6. "       REFCLKBUF_EN                    ,Enable REFCLKBUF clock output to core" "Disabled,Enabled"
bitfld.long 0x0C 5. "         TXCLKREF_EN                       ,Enable TXCLKREF clock to core" "Disabled,Enabled"
textline "                          "
bitfld.long 0x0C 4. " TXCLKREF_SEL                        ,Select the post divider for TXCLKREF clock" "0,1"
bitfld.long 0x0C 3. "              XDIGCLK_EN                      ,Enable XDIGCLK output clock" "Disabled,Enabled"
bitfld.long 0x0C 0.--2. "         XDIGCLK_SEL                       ,Select the output frequency of XDIGCLK" "0,1,2,3,4,5,6,7"
line.long 0x10 "PAD_PLL_CTRL_2,PAD PLL Control 2 Register"
bitfld.long 0x10 28.--31. " PLL_TEMP_CNTL                       ,PLL TEMP control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 18.--23. "             PLL_BW_CNTL                     ,PLL BW control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 16.--17. "               PLL_BGAP_CNTL                     ,PLL BGAP control" "0,1,2,3"
textline "                          "
rbitfld.long 0x10 15. " RCAL_DONE                           ,Status signal to indicate calibration status" "Not done,Done"
bitfld.long 0x10 14. "       RCAL_RESET                      ,Reset the resistor calibration logic" "No reset,Reset"
rbitfld.long 0x10 8.--12. "         RCAL_VAL                          ,Setting of current active resistor calibration code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                          "
bitfld.long 0x10 7. " RCAL_BYPASS                         ,Bypass resistor calibration logic" "Not bypassed,Bypassed"
bitfld.long 0x10 0.--4. "   RCAL_CODE                       ,Sets resistor calibration code when logic is bypassed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "PAD_PLL_CTRL_3,PAD PLL Control 3 Register"
hexmask.long.word 0x14 0.--11. 1. " PLL_MISC_CNTL                       ,PLL MISC control"
line.long 0x18 "PAD_L0_AUX_CTRL,PAD L0 AUX Control Register"
rbitfld.long 0x18 9. " AUX_RX_IDLE_STATUS                  ,AUX Rx idle status" "0,1"
rbitfld.long 0x18 8. "              AUX_TX_RDET_STATUS              ,AUX Tx RDET status" "0,1"
bitfld.long 0x18 5. "                AUX_HOLD_EN                       ,AUX hold enable" "Disabled,Enabled"
textline "                          "
bitfld.long 0x18 4. " AUX_RX_IDLE_MODE                    ,AUX Rx idle mode" "0,1"
bitfld.long 0x18 3. "              AUX_RX_IDLE_EN                  ,AUX Rx idle enable" "Disabled,Enabled"
bitfld.long 0x18 2. "         AUX_RX_TERM_EN                    ,AUX Rx term enable" "Disabled,Enabled"
textline "                          "
bitfld.long 0x18 1. " AUX_TX_RDET_EN                      ,AUX Tx RDET enable" "Disabled,Enabled"
bitfld.long 0x18 0. "       AUX_TX_TERM_EN                  ,AUX Tx term enable" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "PCIe (PCI EXPRESS CONTROLLER)"
tree "PCIE0"
base ad:0x10000000
width 11.
tree "PCI Compatible Configuration Registers"
rgroup.long 0x00++0x03
line.long 0x00 "DEV_ID,Device ID And Vendor ID Register"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID          ,Identify the particular device"
hexmask.long.word 0x00 0.--15. 1. "             VENDOR_ID        ,Identify manufacturer of the device"
group.long 0x04++0x03
line.long 0x00 "DEV_CTRL,Command And Status Register"
eventfld.long 0x00 31. " DETECTED_PERR      ,Primary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x00 30. "       SIGNALED_SERR    ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active"
eventfld.long 0x00 29. "     RECEIVED_MASTER   ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x00 28. " RECEIVED_TARGET    ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 27. "      SIGNALED_TARGET  ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
rbitfld.long 0x00 20. " CAPLIST            ,Device configuration space includes a capabilities list" "Not present,Present"
rbitfld.long 0x00 19. "      INTR_STATUS      ,INTx interrupt message is pending internally to the device" "Not active,Active"
bitfld.long 0x00 10. "     INTR_DISABLE      ,Ability of the device to generate INTx interrupt messages" "No,Yes"
textline "                    "
bitfld.long 0x00 8. " SERR               ,SERR enable bit" "Disabled,Enabled"
bitfld.long 0x00 6. "         PERR             ,Parity Error Response bit" "Disabled,Enabled"
bitfld.long 0x00 2. "       BUS_MASTER        ,Ability of the root complex to issue memory and I/O read/write  requests" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 1. " MEMORY_SPACE       ,Respond to memory space accesses on the primary interface" "Disabled,Enabled"
bitfld.long 0x00 0. "         IO_SPACE         ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "REV_CC,Revision ID And Class Code Registers"
hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE         ,Generic function of the device"
hexmask.long.byte 0x00 0.--7. 1. "           REVISION_ID      ,Device specific revision identifier"
group.long 0x0C++0x03
line.long 0x00 "MISC_1,MISC 1 Register"
rbitfld.long 0x00 23. " HEADER_TYPE1       ,Identifies a multi-function device" "Single function,Multi function"
hexmask.long.byte 0x00 16.--22. 1. "  HEADER_TYPE0     ,Specifies the layout of bytes 10h through 3Fh"
hexmask.long.byte 0x00 0.--7. 1. "             CACHE_LINE_SIZE   ,Cache line size"
group.long 0x18++0x1B
line.long 0x00 "BN_LT,Bus Number And Latency Timer Register"
hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER     ,Subordinate bus number"
hexmask.long.byte 0x00 8.--15. 1. "               SEC_BUS_NUMBER   ,The secondary bus number"
hexmask.long.byte 0x00 0.--7. 1. "             PRI_BUS_NUMBER    ,The primary bus number"
line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register"
eventfld.long 0x04 31. " DETECTED_PERR      ,Secondary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x04 30. "       RECEIVED_SERR    ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active"
eventfld.long 0x04 29. "     RECEIVED_MASTER   ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x04 28. " RECEIVED_TARGET    ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 27. "      SIGNALED_TARGET  ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
bitfld.long 0x04 12.--15. " IO_LIMIT           ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k"
rbitfld.long 0x04 8.--11. "              IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..."
bitfld.long 0x04 4.--7. "             IO_BASE           ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k"
textline "                    "
rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT    ,Identifies the I/O addressing support" "16,32,?..."
line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register"
hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT          ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit"
hexmask.long.word 0x08 4.--15. 0x10 "             MEM_BASE         ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address"
line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register"
hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit"
rbitfld.long 0x0C 16.--19. "             L64BIT           ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
hexmask.long.word 0x0C 4.--15. 0x10 "  PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address"
textline "                    "
bitfld.long 0x0C 0.--3. " B64BIT             ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register"
line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register"
line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register"
hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS   ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit"
hexmask.long.word 0x18 0.--15. 1. "             BASE_UPPER_BITS  ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address"
rgroup.long 0x34++0x07
line.long 0x00 "CAP_PTR,Capabilities Pointer"
hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR    ,Offset into configuration space where the capabilities list begins"
group.long 0x3C++0x03
line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers"
bitfld.long 0x00 22. " SB_RESET           ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled"
bitfld.long 0x00 20. "         VGA_16BITIO      ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled"
bitfld.long 0x00 19. "       VGA_ADDRESS       ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 18. " ISA_ADDRESS        ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled"
bitfld.long 0x00 17. "         SERR_FORWARD     ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled"
bitfld.long 0x00 16. "       PERR_RESP         ,Response to poisoned TLPs" "Disabled,Enabled"
textline "                    "
hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN           ,Contains the interrupt pin the device (or device function) uses"
hexmask.long.byte 0x00 0.--7. 1. "               INTR_LINE        ,Contains the interrupt routing information"
tree.end
tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers"
width 6.
rgroup.long 0x40++0x07
line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0"
hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR        ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID         ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge"
line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1"
hexmask.long.word 0x04 16.--31. 1. " SSID            ,Identifies the particular add-in card or subsystem"
hexmask.long.word 0x04 0.--15. 1. "           SSVID          ,Identifies the manufacturer of the add-in card or subsystem"
tree.end
tree "PCI Power Management Capability Structure Registers"
rgroup.long 0x48++0x03
line.long 0x00 "PM_0,Power Management Register 0"
bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 30. "  D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 29. "  D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 28. "  D1_SUPPORT  ,Power states in which the function may assert PME?..." "Not supported,Supported"
textline "               "
bitfld.long 0x00 27. " D0_SUPPORT      ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 26. "  D2_SUPPORT     ,D2 power management state support" "Not supported,Supported"
bitfld.long 0x00 25. "  D1_SUPPORT ,D1 power management state support" "Not supported,Supported"
bitfld.long 0x00 22.--24. "  AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA"
textline "               "
bitfld.long 0x00 21. " DEV_SPEC_INIT   ,Device specific initialization bit" "Not needed,Needed"
bitfld.long 0x00 16.--18. "     PCIPM_REV      ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..."
hexmask.long.byte 0x00 8.--15. 1. "        NEXT_PTR   ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID      ,Detect the presence of the power management capability registers in a PCI to PCI bridge"
group.long 0x4C++0x03
line.long 0x00 "PM_1,Power Management Register 1"
eventfld.long 0x00 15. " PME_STATUS      ,Assert the PME# signal independent of the state  of the PME_En bit" "Not active,Active"
bitfld.long 0x00 8. "     PME            ,Assert PME?..." "Disabled,Enabled"
bitfld.long 0x00 0.--1. "       PWR_STATE  ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot"
tree.end
tree "PCI MSI Capability Structure Registers"
width 16.
group.long 0x50++0x0F
line.long 0x00 "MSI_CTRL,MSI Control Registers"
rbitfld.long 0x00 23. " 64BIT_CAP     ,Capability of generating a 64-bit message address" "Not capable,Capable"
bitfld.long 0x00 20.--22. "   MULT_EN      ,Number of allocated messages" "0,2,4,8,?..."
rbitfld.long 0x00 17.--19. "         MULT_CAP ,Number of requested messages" "0,2,?..."
bitfld.long 0x00 16. "   CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "  NEXT_PTR ,Points to the next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge"
line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register"
hexmask.long 0x04 2.--31. 0x04 " DWORD         ,Bits 31:2 of the address"
line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " DATA          ,MSI message data"
tree.end
sif (cpuis("TEGRAX2"))
tree "PCI MSI Map Register"
group.long 0x60++0x0B
line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register"
rbitfld.long 0x00 27.--31. " CAP_TYPE      ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..."
bitfld.long 0x00 16. "  XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 0x01 "  CAP_PTR  ,Pointer to the next capability in the list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID   ,Capability ID for HyperTransport technology devices"
line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register"
hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field"
line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register"
tree.end
endif
tree "PCI Express Capability Structure Registers"
width 26.
rgroup.long 0x80++0x07
line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register"
bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER            ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x00 24. " SLOT_IMPLEMENTED                    ,PCI express capability slot implemented" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE                    ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..."
textline "                                   "
bitfld.long 0x00 16.--19. " VERSION                             ,PCI express capability version number" ",Version 1,Version 2,?..."
textline "                                   "
hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR            ,The offset to the next PCI capability structure"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID                  ,Indicates PCI express capability structure"
line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register"
bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE     ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE     ,Specifies the upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING            ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY      ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us"
textline "                                   "
bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY     ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us"
textline "                                   "
bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE             ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field"
textline "                                   "
bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED         ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits"
textline "                                   "
bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE                    ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
group.long 0x88++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers"
rbitfld.long 0x00 21. " TRANSACTIONS_PENDING                ,Transactions pending" "Completed,Pending"
textline "                                   "
rbitfld.long 0x00 20. " AUX_POWER_DETECTED                  ,AUX power detected" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED             ,Unsupported request" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " FATAL_ERROR_DETECTED                ,Fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED            ,Non-fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " CORR_ERROR_DETECTED                 ,Correctable errors" "Not detected,Detected"
textline "                                   "
bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE               ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 11. " ENABLE_NO_SNOOP                     ,No snoop bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE           ,AUX power PM enable" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE            ,Phantom functions" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE           ,8-bit tag field" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE                    ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING             ,Relaxed ordering bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE         ,Reporting of unsupported requests" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE        ,Reporting of fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE    ,Reporting of non-fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE         ,Reporting of correctable errors" "Disabled,Enabled"
textline "                                   "
rgroup.long 0x8C++0x03
line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER                         ,PCI express port number"
textline "                                   "
bitfld.long 0x00 21. " BW_NOTIFY                           ,Bandwidth notify" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 20. " LINKACTV_REPORTING                  ,Link active reporting" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP              ,Detecting and reporting a surprise down error condition" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 18. " CLOCK_PM                            ,Component tolerates the removal of any reference clock" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY                     ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us"
textline "                                   "
bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY                    ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..."
textline "                                   "
bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT        ,Level of active state power management supported" ",L0s Entry,,L0s and L1"
textline "                                   "
bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH                      ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,?..."
else
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..."
endif
textline "                                   "
group.long 0x90++0x03
line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register"
eventfld.long 0x00 31. " AUTO_BANDWIDTH                      ,Auto bandwidth" "Disabled,Enabled"
textline "                                   "
eventfld.long 0x00 30. " BW_MANAGEMENT                       ,Bandwidth management" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 29. " DL_LINK_ACTIVE                      ,Data link control and management state machine" "Not active,Active"
textline "                                   "
rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG                   ,Component uses platform reference clock" "Platform clock,Independent"
textline "                                   "
rbitfld.long 0x00 27. " LINK_TRAINING                       ,Link training" "Completed,In progress"
textline "                                   "
rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH                      ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
rbitfld.long 0x00 16.--19. " LINK_SPEED                          ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..."
textline "                                   "
bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN               ,Auto bandwidth interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN                ,Bandwidth management interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE               ,Hardware auto width disable" "No,Yes"
textline "                                   "
rbitfld.long 0x00 8. " CLOCK_PM                            ,Clock PM" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " EXTENDED_SYNCH                      ,Forces extended transmission" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION          ,Common clock configuration" "Common reference clock,Asynchrous reference clock"
textline "                                   "
rbitfld.long 0x00 5. " RETRAIN_LINK                        ,Link retraining" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " LINK_DISABLE                        ,Disabling the Link" "No,Yes"
textline "                                   "
rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY            ,RCB support capabilities" "64 byte,128 byte"
textline "                                   "
bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL        ,Level of active state PM supported" ",L0s Entry,,L0s and L1"
rgroup.long 0x94++0x03
line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER                ,Physical slot number attached to this port"
textline "                                   "
bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT            ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported"
textline "                                   "
bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE              ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE              ,Upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x00 6. " HOT_PLUG_CAPABLE                    ,Supporting Hot-plug operations" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                   ,Hot-plug surprise" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 2. " MRL_SENSOR_PRESENT                  ,MRL sensor" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT            ,Power controller" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not Implemented,Implemented"
group.long 0x98++0x0B
line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register"
eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED              ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE   ,Electromechanical interlock" "Disengaged,Engaged"
textline "                                   "
rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE               ,Presence of a card in the slot" "Slot empty,Card present"
textline "                                   "
rbitfld.long 0x00 21. " MRL_SENSOR_STATE                    ,MRL sensor status" "MRL Closed,MRL Open"
textline "                                   "
eventfld.long 0x00 20. " COMMAND_COMPLETED                   ,Hot-plug controller completed an issued command" "Not completed,Completed"
textline "                                   "
eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED             ,Presence Detect change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " MRL_SENSOR_CHANGED                  ,MRL Sensor state change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " POWER_FAULT_DETECTED                ,Power fault" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED                 ,Attention button" "Not pressed,Pressed"
textline "                                   "
bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE       ,Data Link Layer Link Active field" "Not changed,Changed"
textline "                                   "
rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported"
textline "                                   "
bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL            ,Power state of the slot" "Power on,Power off"
textline "                                   "
bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL             ,Current state of the Power Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL              ,Current state of the Attention Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE           ,Generation of hot plug interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE  ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE      ,Presence detect changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE    ,MRL sensor changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE         ,Power fault event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE          ,Attention button pressed event interrupt" "Disabled,Enabled"
line.long 0x04 "RCR,Root Control Register"
bitfld.long 0x04 3. " PME_INT                             ,PME interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 2. " SERR_FAT                            ,Generating system error if a fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 1. " SERR_NONFAT                         ,Generating system error if a non-fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 0. " SERR_COR                            ,System error if a correctable error is reported" "Disabled,Enabled"
line.long 0x08 "RSR,Root Status Register"
rbitfld.long 0x08 17. " PMEPEND                             ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending"
textline "                                   "
eventfld.long 0x08 16. " PMESTAT                             ,PME was asserted by the requester ID" "Not active,Active"
textline "                                   "
hexmask.long.word 0x08 0.--15. 1. " REQID                               ,PCI requester ID of the last PME requester"
rgroup.long 0xA4++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
bitfld.long 0x00 11. " LTR_MECH_SUP                        ,LTR Capability support" "Unsupported,Supported"
textline "                                   "
endif
bitfld.long 0x00 4. " CPL_TO_DIS_SUP                      ,Support disabling the completion timeout mechanism" "Unsupported,Supported"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP                   ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xA8++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2"
bitfld.long 0x00 4. " CPL_TO_DISABLE                      ,Disables completion timeout" "No,Yes"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_VALUE                        ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..."
group.long 0xB0++0x03
line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register"
rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL            ,Current deemphasis level" "6,3.5"
textline "                                   "
bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS               ,Compliance deemphasis" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " COMPLIANCE_SOS                      ,Compliance SOS" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE           ,Transmission of the modified compliance pattern" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN                     ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..."
textline "                                   "
rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS               ,Level of de-emphasis" "-6dB,-3.5dB"
textline "                                   "
rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE               ,Link speed change disable" "No,Yes"
textline "                                   "
bitfld.long 0x00 4. " ENTER_COMPLIANCE                    ,Forces link to enter compliance mode" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED                   ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..."
tree.end
tree "Error Reporting Capability Registers"
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR      ,Next PTR"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " ID            ,ID"
else
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " ID            ,ID"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR      ,Next PTR"
endif
group.long 0x104++0x0B
line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register"
eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "    ECRC_ERR        ,ECRC error status" "No error,Error"
textline "                             "
eventfld.long 0x00 18. " MF_TLP        ,Malformed TLP status" "False,True"
eventfld.long 0x00 17. "       RCV_OVFL        ,Receiver overflow status" "No overflow,Overflow"
textline "                             "
eventfld.long 0x00 16. " UNEXP_COMP    ,Unexpected completion status" "False,True"
eventfld.long 0x00 15. "       COMP_ABORT      ,Completion abort status" "Not aborted,Aborted"
textline "                             "
eventfld.long 0x00 14. " COMP_TO       ,Completion timeout status" "No timeout,Timeout"
eventfld.long 0x00 13. "  FC_PROTO_ERR    ,Flow control protocol error status" "No error,Error"
textline "                             "
eventfld.long 0x00 12. " POS_TLP       ,Poisoned TLP status" "False,True"
eventfld.long 0x00 4. "       DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error"
textline "                             "
rbitfld.long 0x00 0. " TRAINING_ERR  ,Training error status" "No error,Error"
line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "  ECRC_ERR        ,ECRC error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 18. " MF_TLP        ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "  RCV_OVFL        ,Receiver overflow mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 16. " UNEXP_COMP    ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "  COMP_ABORT      ,Completion abort mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 14. " COMP_TO       ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "  PROTO_ERR       ,Flow control protocol error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 12. " POS_TLP       ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "  DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked"
textline "                             "
rbitfld.long 0x04 0. " TRAINING_ERR  ,Training error mask" "Not masked,Masked"
line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register"
bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal"
bitfld.long 0x08 19. "   ECRC_ERR        ,ECRC error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 18. " MF_TLP        ,Malformed TLP" "Non-fatal,Fatal"
bitfld.long 0x08 17. "   RCV_OVFL        ,Receiver overflow" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 16. " UNEXP_COMP    ,Unexpected completion" "Non-fatal,Fatal"
bitfld.long 0x08 15. "   COMP_ABORT      ,Completion abort" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 14. " COMP_TO       ,Completion timeout" "Non-fatal,Fatal"
bitfld.long 0x08 13. "   PROTO_ERR       ,Flow control protocol error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 12. " POS_TLP       ,Poisoned TLP" "Non-fatal,Fatal"
bitfld.long 0x08 4. "   DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal"
textline "                             "
rbitfld.long 0x08 0. " TRAINING_ERR  ,Training error" "Non-fatal,Fatal"
group.long 0x110++0x03
line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register"
eventfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF status" "Not masked,Masked"
eventfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover status" "Not masked,Masked"
eventfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 6. " BAD_TLP       ,Bad TLP status" "Not masked,Masked"
eventfld.long 0x00 0. "  RCV_ERR         ,Receiver error status" "Not masked,Masked"
group.long 0x114++0x03
line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register"
bitfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF mask" "Not masked,Masked"
bitfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover mask" "Not masked,Masked"
bitfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 6. " BAD_TLP       ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x00 0. "  RCV_ERR         ,Receiver error mask" "Not masked,Masked"
textline "                             "
width 26.
group.long 0x118++0x03
line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register"
bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled"
rbitfld.long 0x00 7. "  ECRC_CHK_CAP ,ECRC CHK CAP" "False,True"
textline "                                   "
bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled"
rbitfld.long 0x00 5. "  ECRC_GEN_CAP ,ECRC GEN CAP" "False,True"
textline "                                   "
rbitfld.long 0x00 0.--4. " ERR_PTR     ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0xF
line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register"
line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register"
line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register"
line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register"
textline "                                   "
width 20.
group.long 0x12C++0x0B
line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register"
bitfld.long 0x00 2. " FATAL_ERR_RPT_EN     ,Fatal error RPT enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " COR_ERR_RPT_EN       ,Correctable error RPT enable" "Disabled,Enabled"
line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register"
rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FATAL_RCVD          ,Fatal uncorrectable error messages" "Not received,Received"
textline "                             "
eventfld.long 0x04 5. " NONFATAL_RCVD        ,Non-fatal uncorrectable error messages" "Not received,Received"
eventfld.long 0x04 4. "  FIRST_FATAL_RCVD    ,First uncorrectable error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 3. " MULT_UNCOR_RCVD      ,Error is received and UNCOR_RCVD is already set" "False,True"
eventfld.long 0x04 2. "         STS_UNCOR_RCVD      ,Error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 1. " MULT_COR_RCVD        ,Correctable error message is received and COR_RCVD is already set" "False,True"
eventfld.long 0x04 0. "         COR_RCVD            ,Correctable error" "Not received,Received"
line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register"
hexmask.long.word 0x08 16.--31. 1. " ERR_COR              ,Requestor ID of first correctable error in root error status register "
hexmask.long.word 0x08 0.--15. 1. "          ERR_UNCOR           ,Requestor ID of first uncorrectable error in root error status register "
textline "                             "
tree.end
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
tree "PCI L1 PM Substate Capability Registers"
rgroup.long 0x140++0x07
line.long 0x00 "EXT_CAP,Extended Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP          ,Offset to the next PCI express capability structure"
bitfld.long 0x00 16.--19. "      EXT_CAP_VERSION               ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID                ,PCI-SIG defined ID number that indicates the nature and format of the extended capability"
line.long 0x04 "CAP,Capability Register"
bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE         ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 16.--17. "        CAP_T_PWRON_SCALE             ,Specifies the scale used for this port" "2 us,10 us,100 us,?..."
textline "                             "
hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME       ,Time (in us) required for this port to re-establish common mode"
bitfld.long 0x04 4. "        CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED   ,ASPM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 2. "  CAP_ASPM_L1_2_SUPPORTED       ,ASPM L1.2 is is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 0. "  CAP_PCI_PM_L1_2_SUPPORTED     ,PCI-PM L1.2 is supported" "Disabled,Enabled"
group.long 0x148++0x07
line.long 0x00 "CTRL1,Control 1 Register"
bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE      ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 16.--25. 1. "         LTR1_2_THRESH_VAL             ,Threshold value"
textline "                             "
hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME           ,Restore time"
bitfld.long 0x00 3. "        ASPM_L1_1_EN                  ,ASPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 2. " ASPM_L1_2_EN              ,ASPM L1.2 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  PCIPM_L1_1_EN                 ,PCIPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " PCIPM_L1_2_EN             ,PCIPM L1.2 enable" "Disabled,Enabled"
line.long 0x04 "CTRL2,Control 2 Register"
bitfld.long 0x04 3.--7. " T_PWRON_VALUE             ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--1. "        T_PWRON_SCALE                 ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..."
tree.end
endif
tree "NVIDIA Private Registers"
width 20.
group.long 0x494++0x03
line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer"
hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT   ,Replay timer limit"
hexmask.long.word 0x00 10.--18. 1. "      GEN2_ACK_TIMER_LIMIT          ,ACK timer limit"
textline "                             "
hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD  ,Update FC frequency"
bitfld.long 0x00 0. "      GEN2_DL_TIMERS_DISABLE        ,Enables the Gen2 DL timer settings" "No,Yes"
textline "                             "
width 34.
sif (cpuis("TEGRAX1"))
rgroup.long 0xC10++0x0F
line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL"
hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP    ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP"
textline "                                           "
hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP       ,T_PCIE2_RP_LTR_REP_VAL_SNOOP"
line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT"
bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE"
line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT"
bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE"
line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT"
bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET  ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE  ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE"
textline "                                           "
elif cpuis("TEGRAX2")
width 27.
group.long 0xC00++0x0F
line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register"
bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK   ,Refclk on with pad PLL lock" "Not locked,Locked"
bitfld.long 0x00 25. "           REFCLK_ON_WITH_PLLE_LOCK      ,Refclk on with PLLE lock" "Not locked,Locked"
textline "                                    "
bitfld.long 0x00 24. " HIDE_CAP                      ,Hide capability of L1 PM substates" "Not hidden,Hidden"
bitfld.long 0x00 19.--23. "           T_PWRON_VALUE                 ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 16.--17. " T_PWRON_SCALE                 ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..."
hexmask.long.byte 0x00 8.--15. 1. "               CM_RESTORE_TIME               ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN"
textline "                                    "
bitfld.long 0x00 4. " L1_PM_SUBSTATES               ,L1 PM Substates support enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             ASPM_L1_1                     ,ASPM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " ASPM_L1_2                     ,ASPM L1.2 support enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             PCI_PM_L1_1                   ,PCI-PM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " PCI_PM_L1_2                   ,PCI-PM L1.2 support enable" "Disabled,Enabled"
line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register"
bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2            ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled"
hexmask.long.word 0x04 13.--21. 1. "             CHK_CLKREQ_ASSERTED_DLY       ,Amount of time the DUT waits in L1.2"
textline "                                    "
hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY                 ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle"
line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register"
bitfld.long 0x08 21.--24. " MICROSECOND_COMP              ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 13.--20. 1. "                   MICROSECOND                   ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m"
textline "                                    "
hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY                    ,T L1.2 delay diagnostic"
line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register"
hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON               ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 17. "                 L11_T_REFCLK_ON_ENABLE        ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON               ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 3. "                 PCIPM_L1_2                    ,PCIMPM L1.2 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 2. " ASPM_L1_2                     ,ASPM L1.2 functionality enable" "Disabled,Enabled"
bitfld.long 0x0C 1. "             PCIPM_L1_1                    ,PCIPM L1.1 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 0. " ASPM_L1_1                     ,ASPM L1.1 functionality enable" "Disabled,Enabled"
rgroup.long 0xC10++0x03
line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register"
hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP                      ,Value for no snoop"
hexmask.long.word 0x00 0.--15. 1. "                 SNOOP                         ,Value for snoop"
group.long 0xC14++0x17
line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register"
bitfld.long 0x00 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x00 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x00 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.1 state"
line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register"
bitfld.long 0x04 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x04 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x04 0.--15. 1. " VALUE                         ,Number of times the link entered L1.2 ENTRY state"
line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register"
bitfld.long 0x08 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x08 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x08 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.2 ENTRY state"
line.long 0x0C "LTR_OVERRIDE,LTR Override Register"
hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP                      ,LTR override no snoop value"
hexmask.long.word 0x0C 0.--15. 1. "                 SNOOP                         ,LTR override snoop value"
line.long 0x10 "L1SS_SPARE,L1SS Spare Register"
hexmask.long.word 0x10 18.--31. 1. " SPARE2                        ,Spare 2"
eventfld.long 0x10 17. "                 LTR_MSG_RCV_STS               ,LTR MSG RCV STS" "No effect,Cleared"
textline "                                    "
bitfld.long 0x10 16. " LTR_MSG_INT_EN                ,LTR MSG INT enable" "Disabled,Enabled"
hexmask.long.word 0x10 2.--15. 1. "             SPARE1                        ,Spare 1"
textline "                                    "
bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN      ,LTR override no snoop enable" "Disabled,Enabled"
bitfld.long 0x10 0. "             LTR_OVERRIDE_SNOOP_EN         ,LTR override snoop enable" "Disabled,Enabled"
line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register"
bitfld.long 0x14 22. " PRI_CLK                       ,PRI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 21. "             TMS0_UFPCI_CLK                ,TMS0 UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 20. " TMS0_DFPCI_CLK                ,TMS0 DFPCI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 19. "             TMS0C2_XTXCLK1X               ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 18. " TMS0C2_XCLK                   ,TMS0C2 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 17. "             TMS0C1_XTXCLK1X               ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 16. " TMS0C1_XCLK                   ,TMS0C1 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 15. "             TMS0C0_XTXCLK1X               ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 14. " TMS0C0_XCLK                   ,TMS0C0 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 13. "             TMSC0_XCLK                    ,TMSC0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 12. " T0C2_PCA_XCLK                 ,T0C2 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 11. "             T0C2_PCA_UFPCI_CLK            ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 10. " T0C1_PCA_XCLK                 ,T0C1 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 9. "             T0C1_PCA_UFPCI_CLK            ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 8. " T0C0_PCA_XCLK                 ,T0C0 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 7. "             T0C0_PCA_UFPCI_CLK            ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 6. " GRP2_XTXCLK1X                 ,GRP2 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 5. "             GRP2_XCLK                     ,GRP2 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 4. " GRP1_XTXCLK1X                 ,GRP1 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 3. "             GRP1_XCLK                     ,GRP1 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 2. " GRP0_XTXCLK1X                 ,GRP0 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 1. "             GRP0_XCLK                     ,GRP0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 0. " CLK25M                        ,CLK25M enable" "Disabled,Enabled"
group.long 0xD00++0x1B
line.long 0x00 "DBG0,Debug 0"
line.long 0x04 "DBG1,Debug 1"
line.long 0x08 "DBG2,Debug 2"
line.long 0x0C "DBG3,Debug 3"
line.long 0x10 "DBG4,Debug 4"
line.long 0x14 "DBG5,Debug 5"
line.long 0x18 "DBG6,Debug 6"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD1C++0x03
line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO"
group.long 0xD20++0x1B
line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI"
line.long 0x04 "LANE_DBG0,Lane Debug 0"
line.long 0x08 "LANE_DBG1,Lane Debug 1"
line.long 0x0C "LANE_DBG2,Lane Debug 2"
line.long 0x10 "LANE_DBG3,Lane Debug 3"
line.long 0x14 "LANE_DBG4,Lane Debug 4"
line.long 0x18 "LANE_DBG5,Lane Debug 5"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD3C++0x07
line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value"
line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value"
group.long 0xD44++0x0B
line.long 0x00 "LINK_DBG0,Link Debug 0"
line.long 0x04 "LINK_DBG1,Link Debug 1"
line.long 0x08 "LINK_DBG2,Link Debug 2"
bitfld.long 0x08 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x08 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x08 29. " CTL                           ,Control" "0,1"
rgroup.long 0xD50++0x07
line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value"
line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value"
endif
width 27.
group.long 0xD5C++0x03
line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces"
bitfld.long 0x00 8. " UFA2WRR_PWTOP                 ,UFA2WRR PWTOP enable" "Disabled,Enabled"
bitfld.long 0x00 7. "             UBFI2DFI_P2P                  ,UBFI2DFI P2P enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 6. " TXBA2DFI_WR                   ,TXBA2DFI WR enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             CMDQ2UFARB                    ,CMDQ2UFARB enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " UBFI2DFI_NTT                  ,UBFI2DFI NTT enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PCA                           ,PCA enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " DFIREQ                        ,DFIREQ enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             DFIRSP                        ,DFIRSP enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " DFI2UBFI                      ,DFI2UBFI enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xD60++0x07
line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1"
bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO           ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed"
bitfld.long 0x00 24. "          L02RCVRY_TS_DET               ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE       ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed"
bitfld.long 0x00 22. "          L02RCVRY_8B10B_ERR            ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed"
bitfld.long 0x00 20. "          L02RCVRY_DL_RETRAIN           ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 19. " L02RCVRY_LPBK                 ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
bitfld.long 0x00 18. "          L02RCVRY_SPEEDCHANGE          ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE          ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed"
bitfld.long 0x00 16. "          L02RCVRY_LINK_RETRAIN         ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST   ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST   ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
bitfld.long 0x00 2.--5. "             CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
textline "                                    "
bitfld.long 0x00 1. " RX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             TX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2"
bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR      ,REPLA timer expired error" "No error,Error"
bitfld.long 0x04 30. "             SA_ERR                        ,SA error" "No error,Error"
textline "                                    "
bitfld.long 0x04 29. " DESKEW_ERR                    ,DESKEW error" "No error,Error"
bitfld.long 0x04 28. "             TRAINING_ERR                  ,Training error" "No error,Error"
textline "                                    "
bitfld.long 0x04 27. " DPLLP_CRC_ERR                 ,DPLLP CRC error" "No error,Error"
bitfld.long 0x04 26. "             8B10B_ERR                     ,8B10B error" "No error,Error"
textline "                                    "
bitfld.long 0x04 25. " REPLAY_STARTED_ERR            ,REPLAY started error" "No error,Error"
bitfld.long 0x04 24. "             ROLLOVER_ERR                  ,ROLLOVER error" "No error,Error"
textline "                                    "
bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR             ,PWH update FC error" "No error,Error"
bitfld.long 0x04 22. "             PWH_TOO_MANY_CREDITS_ERR      ,PWH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR             ,PWD update FC error" "No error,Error"
bitfld.long 0x04 20. "             PWD_TOO_MANY_CREDITS_ERR      ,PWD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR             ,NPH update FC error" "No error,Error"
bitfld.long 0x04 18. "             NPH_TOO_MANY_CREDITS_ERR      ,NPH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR             ,NPD update FC error" "No error,Error"
bitfld.long 0x04 16. "             NPD_TOO_MANY_CREDITS_ERR      ,NPD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 15. " CH_UPDATE_FC_ERR              ,CH update FC error" "No error,Error"
bitfld.long 0x04 14. "             CH_TOO_MANY_CREDITS_ERR       ,CH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 13. " CD_UPDATE_FC_ERR              ,CD update FC error" "No error,Error"
bitfld.long 0x04 12. "             CD_TOO_MANY_CREDITS_ERR       ,CD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR       ,REC overflow ISOPW data error" "No error,Error"
bitfld.long 0x04 10. "             REC_OVFL_ISOPW_HDR_ERR        ,REC overflow ISOPW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR        ,REC overflow ISONP HDR error" "No error,Error"
bitfld.long 0x04 8. "             REC_OVFL_CPL_DATA_ERR         ,REC overflow CPL data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR          ,REC overflow PW data error" "No error,Error"
bitfld.long 0x04 6. "             REC_OVFL_NP_DATA_ERR          ,REC overflow NP data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR          ,REC overflow CPL HDR error" "No error,Error"
bitfld.long 0x04 4. "             REC_OVFL_PW_HDR_ERR           ,REC overflow PW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR           ,REC_OVFL_NP_HDR_ERR error" "No error,Error"
bitfld.long 0x04 2. "             FRAMING_ERR                   ,Framing error" "No error,Error"
textline "                                    "
bitfld.long 0x04 1. " SEQ_ERR                       ,SEQ error" "No error,Error"
bitfld.long 0x04 0. "             LCRC_ERR                      ,LCRC error" "No error,Error"
rgroup.long 0xD68++0x03
line.long 0x00 "XP_DEBUG,XP Debug"
bitfld.long 0x00 0.--1. " RX_CAL_STATUS                 ,Receiver CAL status" "Idle,Pending,Done,Disabled"
endif
tree.end
tree "Vendor-Defined Registers"
width 20.
group.long 0xE00++0x2B
line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit"
hexmask.long.byte 0x00 16.--23. 1. " CPL                       ,Completion header buffer size"
hexmask.long.byte 0x00 8.--15. 1. "        PW                      ,Posted write header buffer size"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " NP                        ,Non-posted header buffer size"
line.long 0x04 "RX_DATA_LIMIT,RX Data Limit"
hexmask.long.byte 0x04 20.--27. 1. " CPL                       ,Completion data buffer size"
hexmask.long.word 0x04 8.--19. 1. "        PW                      ,Posted write data buffer size"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " NP                        ,Non-posted write header buffer size"
line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x08 24.--31. 1. " NPT                       ,TX HDR limit NPT"
textline "                             "
hexmask.long.byte 0x08 16.--23. 1. " CPL                       ,Size of the downstream completions header buffer"
else
hexmask.long.byte 0x08 16.--23. 1. " NP                        ,Size of the downstream non posted header buffer"
endif
hexmask.long.byte 0x08 8.--15. 1. "        PW                      ,Size of the downstream posted writes header buffer"
textline "                             "
hexmask.long.byte 0x08 0.--7. 1. " NP                        ,Size of the downstream non posted header buffer"
line.long 0x0C "TX_DATA_LIMIT,TX Data Limit"
hexmask.long.byte 0x0C 8.--15. 1. " PW                        ,Size of the downstream Posted Writes Data Buffer"
hexmask.long.byte 0x0C 0.--7. 1. "        NP                      ,Size of the downstream Non Posted Data Buffer"
line.long 0x10 "UFPCI,Upstream FPCI Control Register"
bitfld.long 0x10 23.--27. " ISO_WEIGHT                ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 22. "        ISO_CONTROL_ENABLE      ,ISO control enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x10 21. " ISOPW2HPISO               ,Convert posted writes" "Disabled,Enabled"
bitfld.long 0x10 20. "  ISONP2HPISO             ,Convert non-posted reads" "Disabled,Enabled"
textline "                             "
hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD           ,Timers are reset when they hit the value"
bitfld.long 0x10 10.--11. "        WRR_GRANT_BURST         ,Time for arbitration within a TMS" "0,1,2,3"
textline "                             "
bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 0.--4. "        PW_STARV_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "MISC0,Miscellaneous Register 0"
bitfld.long 0x14 31. " SHORT_RXL_TIMER           ,Completion timeout feature in RXL test" "Disabled,Enabled"
bitfld.long 0x14 30. "  P2P_SMALL_ISA_HOLE      ,P2P settings control" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 29. " P2P_F                     ,Transactions (64'hF_XXXX)" "0,1"
bitfld.long 0x14 28. "         P2P_E                   ,Transactions (64'hE_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 27. " P2P_D                     ,Transactions (64'hD_XXXX)" "0,1"
bitfld.long 0x14 26. "         P2P_C                   ,Transactions (64'hC_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 25. " P2P_B                     ,Transactions (64'hB_XXXX)" "0,1"
bitfld.long 0x14 24. "         P2P_A                   ,Transactions (64'hA_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 23. " NISONC2HPISO              ,Upgrade to HPISO Read" "Disabled,Enabled"
bitfld.long 0x14 21. "  AUTO_XCLK_FREQ_EN       ,XCLK frequency dynamic switch" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 20. " RXL_CLEAR_DROP            ,Receiver DROP ALL status clear" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x14 4.--19. 1. "  ISO_PW_ENABLE[1]        ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP"
endif
textline "                             "
bitfld.long 0x14 3. " ISO_PW_ENABLE             ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 2. " ISO_NP_ENABLE             ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
bitfld.long 0x14 1. "  NATIVE_P2P_ENABLE       ,Enables native peer2peer transactions" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 0. " ENABLE_CLUMPING           ,Enables unitid clumping" "Disabled,Enabled"
line.long 0x18 "TXBA0,TXBA0 Register"
hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY       ,Replay timer expiry"
bitfld.long 0x18 12. "      USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW      ,Merge completions upto 64DW payloads" "Disabled,Enabled"
bitfld.long 0x18 10. "  CMPL_MERGE_UPTO_32DW    ,Merge completions upto 32DW payloads" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 9. " CMPL_MERGE_DISABLE        ,Disables completion merging" "No,Yes"
hexmask.long.word 0x18 0.--8. 1. "       REPLAY_BUF_LIMIT        ,Replay buffer limit"
line.long 0x1C "TXBA1,TXBA1 Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD           ,Merge threshold"
else
hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD           ,Merge threshold"
textfld "  "
endif
bitfld.long 0x1C 4.--7. "      CM_OVER_PW_BURST        ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
sif (cpuis("TEGRAX2"))
bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register"
hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH          ,NPD UNRET THRESH"
hexmask.long.byte 0x20 16.--23. 1. "        NPH_UNRET_THRESH        ,NPH UNRET THRESH"
textline "                             "
hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH          ,PWD UNRET THRESH"
hexmask.long.byte 0x20 0.--7. 1. "        PWH_UNRET_THRESH        ,PWH UNRET THRESH"
line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register"
hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2          ,Time to wait for pads to change speed from Gen1 to Gen2"
hexmask.long.word 0x24 8.--23. 1. "        PAD_PWRUP_CM            ,Time to power up pads (no common-mode voltage during power down)"
textline "                             "
hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP                 ,Time to power up pads (common-mode voltage during power down)"
line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register"
hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
hexmask.long.byte 0x28 16.--23. 1. "        RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
textline "                             "
hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1          ,Wait time for pads to change speed from Gen2 to Gen1"
rgroup.long 0xE34++0x03
line.long 0x00 "PRBS,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " LOCKED                    ,Locks lanes onto the incoming PRBS pattern"
hexmask.long.word 0x00 0.--15. 1. "      ERR_COUNT_OVERFLOW      ,Number of bit mismatches during PRBS run"
group.long 0xE38++0x03
line.long 0x00 "PRBS_ERR,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " COUNT                     ,Number of bit errors detected in the incoming PRBS stream"
bitfld.long 0x00 0.--3. "      SELECT                  ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "   "
width 22.
group.long 0xE3C++0x27
line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0"
hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED                       ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x00 0.--15. 1. "             L0_LPBK                                  ,Infer E-Idle after this amount of time while in L0 or loopback"
line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1"
hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2                        ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x04 0.--15. 1. "             UNSUC_SPEED_GEN1                         ,Infer E-Idle after this amount of time while in recovery"
line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register"
eventfld.long 0x08 31. " LINKFSM[31]                             ,LINKFSM31" "Init,Clear"
eventfld.long 0x08 30. "            [30]                                     ,LINKFSM30" "Init,Clear"
textline "                               "
eventfld.long 0x08 29. "        [29]                             ,LINKFSM29" "Init,Clear"
eventfld.long 0x08 28. "            [28]                                     ,LINKFSM28" "Init,Clear"
textline "                               "
eventfld.long 0x08 27. "        [27]                             ,LINKFSM27" "Init,Clear"
eventfld.long 0x08 26. "            [26]                                     ,LINKFSM26" "Init,Clear"
textline "                               "
eventfld.long 0x08 25. "        [25]                             ,LINKFSM25" "Init,Clear"
eventfld.long 0x08 24. "            [24]                                     ,LINKFSM24" "Init,Clear"
textline "                               "
eventfld.long 0x08 23. "        [23]                             ,LINKFSM23" "Init,Clear"
eventfld.long 0x08 22. "            [22]                                     ,LINKFSM22" "Init,Clear"
textline "                               "
eventfld.long 0x08 21. "        [21]                             ,LINKFSM21" "Init,Clear"
eventfld.long 0x08 20. "            [20]                                     ,LINKFSM20" "Init,Clear"
textline "                               "
eventfld.long 0x08 19. "        [19]                             ,LINKFSM19" "Init,Clear"
eventfld.long 0x08 18. "            [18]                                     ,LINKFSM18" "Init,Clear"
textline "                               "
eventfld.long 0x08 17. "        [17]                             ,LINKFSM17" "Init,Clear"
eventfld.long 0x08 16. "            [16]                                     ,LINKFSM16" "Init,Clear"
textline "                               "
eventfld.long 0x08 15. "        [15]                             ,LINKFSM15" "Init,Clear"
eventfld.long 0x08 14. "            [14]                                     ,LINKFSM14" "Init,Clear"
textline "                               "
eventfld.long 0x08 13. "        [13]                             ,LINKFSM13" "Init,Clear"
eventfld.long 0x08 12. "            [12]                                     ,LINKFSM12" "Init,Clear"
textline "                               "
eventfld.long 0x08 11. "        [11]                             ,LINKFSM11" "Init,Clear"
eventfld.long 0x08 10. "            [10]                                     ,LINKFSM10" "Init,Clear"
textline "                               "
eventfld.long 0x08 9. "        [9]                              ,LINKFSM9" "Init,Clear"
eventfld.long 0x08 8. "            [8]                                      ,LINKFSM8" "Init,Clear"
textline "                               "
eventfld.long 0x08 7. "        [7]                              ,LINKFSM7" "Init,Clear"
eventfld.long 0x08 6. "            [6]                                      ,LINKFSM6" "Init,Clear"
textline "                               "
eventfld.long 0x08 5. "        [5]                              ,LINKFSM5" "Init,Clear"
eventfld.long 0x08 4. "            [4]                                      ,LINKFSM4" "Init,Clear"
textline "                               "
eventfld.long 0x08 3. "        [3]                              ,LINKFSM3" "Init,Clear"
eventfld.long 0x08 2. "            [2]                                      ,LINKFSM2" "Init,Clear"
textline "                               "
eventfld.long 0x08 1. "        [1]                              ,LINKFSM1" "Init,Clear"
eventfld.long 0x08 0. "            [0]                                      ,LINKFSM0" "Init,Clear"
line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register"
eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR                ,Replay timer expired error" "No error,Error"
eventfld.long 0x0C 30. "         SA_ERR                                   ,SA error" "No error,Error"
textline "                               "
eventfld.long 0x0C 29. " DESKEW_ERR                              ,DESKEW error" "No error,Error"
eventfld.long 0x0C 28. "         TRAINING_ERR                             ,Training error" "No error,Error"
textline "                               "
eventfld.long 0x0C 27. " DLLP_CRC_ERR                            ,DLLP CRC error" "No error,Error"
eventfld.long 0x0C 26. "         8B10B_ERR                                ,8B10B error" "No error,Error"
textline "                               "
eventfld.long 0x0C 25. " REPLAY_STARTED_ERR                      ,Replay started error" "No error,Error"
eventfld.long 0x0C 24. "         REPLAY_ROLLOVER_ERR                      ,Replay rollover error" "No error,Error"
textline "                               "
eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR                       ,PWH update FC error" "No error,Error"
eventfld.long 0x0C 22. "         PWH_TOO_MANY_CREDITS_ERR                 ,PWH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR                       ,PWD update FC error" "No error,Error"
eventfld.long 0x0C 20. "         PWD_TOO_MANY_CREDITS_ERR                 ,PWD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR                       ,NPH update FC error" "No error,Error"
eventfld.long 0x0C 18. "         NPH_TOO_MANY_CREDITS_ERR                 ,NPH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR                       ,NPD update FC error" "No error,Error"
eventfld.long 0x0C 16. "         NPD_TOO_MANY_CREDITS_ERR                 ,NPD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR                        ,CH update FC error" "No error,Error"
eventfld.long 0x0C 14. "         CH_TOO_MANY_CREDITS_ERR                  ,CH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR                        ,CD update FC error" "No error,Error"
eventfld.long 0x0C 12. "         CD_TOO_MANY_CREDITS_ERR                  ,CD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR                 ,REC overflow ISOPW data error" "No error,Error"
eventfld.long 0x0C 10. "         REC_OVFL_ISOPW_HDR_ERR                   ,REC overflow ISOPW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR                  ,REC overflow ISONP HDR error" "No error,Error"
eventfld.long 0x0C 8. "         REC_OVFL_CPL_DATA_ERR                    ,REC overflow CPL data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR                    ,REC overflow PW data error" "No error,Error"
eventfld.long 0x0C 6. "         REC_OVFL_NP_DATA_ERR                     ,REC overflow NP data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR                    ,REC overflow CPL HDR error" "No error,Error"
eventfld.long 0x0C 4. "         REC_OVFL_PW_HDR_ERR                      ,REC overflow PW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR                     ,REC overflow NP HDR error" "No error,Error"
eventfld.long 0x0C 2. "         FRAMING_ERR                              ,Framing error" "No error,Error"
textline "                               "
eventfld.long 0x0C 1. " SEQ_ERR                                 ,SEQ error" "No error,Error"
eventfld.long 0x0C 0. "         LCRC_ERR                                 ,LCRC error" "No error,Error"
line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register"
bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN             ,Replay timer expired error enable" "Disabled,Enabled"
bitfld.long 0x10 30. "         SA_ERR_EN                                ,SA error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 27. " DLLP_CRC_ERR_EN                         ,DLLP CRC error enable" "Disabled,Enabled"
bitfld.long 0x10 26. "         8B10B_ERR_EN                             ,8B10B error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN                  ,Replay rollover error enable" "Disabled,Enabled"
bitfld.long 0x10 23. "         PWH_UPDATE_FC_ERR_EN                     ,PWH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 21. "         PWD_UPDATE_FC_ERR_EN                     ,PWD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 19. "         NPH_UPDATE_FC_ERR_EN                     ,NPH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN             ,NPH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 17. "         NPD_UPDATE_FC_ERR_EN                     ,NPD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN             ,NPD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 15. "         CH_UPDATE_FC_ERR_EN                      ,CH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN              ,CH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 13. "         CD_UPDATE_FC_ERR_EN                      ,CD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN              ,CD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 11. "         DLL_PROTOCOL_ERR_EN                      ,DLL protocol error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 2. " FRAMING_ERR_EN                          ,Framing error enable" "Disabled,Enabled"
bitfld.long 0x10 1. "         SEQ_ERR_EN                               ,SEQ error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 0. " LCRC_ERR_EN                             ,LCRC error enable" "Disabled,Enabled"
line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register"
bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR                    ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 8.--10. "                TRIG_PTX_LTSSM_MINOR                     ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR                        ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 3. "               TRIG_ON_EVENT                            ,Trigger on event" "Not triggered,Triggered"
textline "                               "
bitfld.long 0x14 2. " CLEAR_RAM                               ,Clear RAM" "Not cleared,Cleared"
bitfld.long 0x14 1. "      WRAP_EN                                  ,Wrap enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x14 0. " STORE_EN                                ,Store enable" "Disabled,Enabled"
line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register"
rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR                         ,PRX LTSSM minor" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 16.--18. "                PTX_LTSSM_MINOR                          ,PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
rbitfld.long 0x18 12.--15. " LTSSM_MAJOR                             ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x18 11. "               READ_DATA_VALID                          ,Read data valid" "Invalid,Valid"
textline "                               "
bitfld.long 0x18 6.--10. " READ_ADDR                               ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x18 1.--5. "               WRITE_PTR                                ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
rbitfld.long 0x18 0. " RAM_FULL                                ,All entries in RAM has been written" "Not full,Full"
line.long 0x1C "PG,PCIe Power Gate Register"
bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN                 ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled"
eventfld.long 0x1C 1. "         RCVD_PME_TO_ACK                          ,Root port received a PME TO ACK TLP" "Init,Clear"
textline "                               "
bitfld.long 0x1C 0. " SEND_PME_TO_MSG                         ,Send a PME TO message downstream" "Idle,Send now"
line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0"
hexmask.long.word 0x20 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
hexmask.long.word 0x20 2.--15. 0x04 "             BASE                                     ,Base address for the variable range positive decode addresses"
textline "                               "
bitfld.long 0x20 0. " ENABLE                                  ,Enable" "Disabled,Enabled"
line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1"
hexmask.long.word 0x24 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
textline "                               "
hexmask.long.word 0x24 2.--15. 0x04 " BASE                                    ,Base address for the variable range positive decode addresses"
bitfld.long 0x24 0. "             ENABLE                                   ,Enable" "Disabled,Enabled"
sif (cpuis("TEGRAX1"))
group.long 0xE80++0x1F
line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "          T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C     ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3"
textline "                               "
bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C    ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3"
bitfld.long 0x00 12.--15. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C      ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C     ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C       ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C      ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3"
hexmask.long.word 0x04 0.--15. 1. "          T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C          ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xEA0++0x1B
line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2"
hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C          ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C"
hexmask.long.word 0x04 0.--15. 1. "             T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xF00++0x0B
line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)"
bitfld.long 0x00 31. " FORCE_COMPLIANCE                        ,Force compliance" "Disabled,Enabled"
rbitfld.long 0x00 30. "         DL_UP                                    ,Status of data link layer in XP" "Down,Up"
textline "                               "
bitfld.long 0x00 29. " INTERLEAVE_DLLPS                        ,Interleave DLLPS" "Disabled,Enabled"
bitfld.long 0x00 28. "         OPPORTUNISTIC_UPDATEFC                   ,DL will send any pending UpdateFC packet" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 27. " OPPORTUNISTIC_ACK                       ,DL will send pending Acks" "Disabled,Enabled"
bitfld.long 0x00 26. "         TRAIN_ERR_ENABLE                         ,Enables reporting of training errors" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD                     ,Override for the UpdateFC frequency"
hexmask.long.word 0x00 2.--17. 1. "               PRBS_STAT                                ,Results of loopback mode testing"
textline "                               "
bitfld.long 0x00 1. " PRBS_EN                                 ,Enables the root port as loopback master" "Disabled,Enabled"
sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x00 0. " EMULATION                               ,Enables emulation mode operation" "Disabled,Enabled"
endif
line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)"
bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY                         ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us"
bitfld.long 0x04 28. "       FORCE_DOWNSTREAM_NO_SNOOP                ,Force downstream no snoop" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH                   ,Force upstream non-coherent" "Disabled,Enabled"
bitfld.long 0x04 26. "         NP_REQ_TIMEOUT                           ,Disable downstream NP request timeout" "No,Yes"
textline "                               "
bitfld.long 0x04 23. " IGNORE_L0S                              ,Ignore L0S" "No,Yes"
bitfld.long 0x04 22. "              DONT_MERGE_PMASNAK                       ,Don't merge PMASNAK" "Merged,Not merged"
textline "                               "
bitfld.long 0x04 21. " L1_ASPM_SUPPORT                         ,Link capability register L1 ASPM support" "Not supported,Supported"
bitfld.long 0x04 20. "    L23_READY_NO_D3                          ,L23 ready no D3" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 19. " ACK_L1_NO_WAIT                          ,ACK L1 no wait" "Disabled,Enabled"
hexmask.long.word 0x04 10.--18. 1. "         ACK_TIMER_LIMIT                          ,Overrides the Ack timer limit for this root port"
textline "                               "
bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES         ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled"
rbitfld.long 0x04 7. "         RNCTRL_EN                                ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 6. " GEN2_LINK_UPGRADE                       ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "         RNCTRL_MAXWIDTH                          ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)"
hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE                         ,L0S update wake"
hexmask.long.word 0x08 8.--17. 1. "               L0S_THRESHOLD                            ,Controls the idle time required for TxL0s entry from L0"
textline "                               "
hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE                            ,L0S ACK wake"
sif (cpuis("TEGRAX1"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI                            ,N100MS_DFPCI"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,MICROSECOND"
elif (cpuis("TEGRAX2"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)"
hexmask.long.word 0x00 20.--31. 1. "  100MS_DFPCI                            ,Number of Dfpci_clk clocks in a given 100ms interval"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,Various timers required by PCI-express specification"
group.long 0xF14++0x07
line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)"
bitfld.long 0x00 29.--31. " ISO2TC_MAP                              ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7"
line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT"
hexmask.long.word 0x04 4.--15. 1. " PERIOD                                  ,Defines period (in microseconds) for the purpose of throttling"
bitfld.long 0x04 1.--3. "             DUTY_CYCLE                               ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x04 0. " ENABLE                                  ,Enables throttling of PCIe traffic" "Disabled,Enabled"
else
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT                         ,VEND_XV_TIMEOUT"
endif
group.long 0xF20++0x03
line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 18. "             NO_CMD_COMPLETED_SUPPORT                 ,No CMD completed support" "Not supported,Supported"
textline "                               "
bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT           ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "      SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
bitfld.long 0x00 6. "               HOT_PLUG_CAPABLE                         ,Supporting hot-plug operations" "Not capable,Capable"
textline "                               "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                       ,Hot-plug surprise" "Disabled,Enabled"
bitfld.long 0x00 4. "         POWER_INDICATOR_PRESENT                  ,Power indicator" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT             ,Attention Indicator" "Not implemented,Implemented"
bitfld.long 0x00 2. "  MRL_SENSOR_PRESENT                       ,MRL Sensor" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT                ,Power Controller" "Not implemented,Implemented"
bitfld.long 0x00 0. "  ATTENTION_BUTTON_PRESENT                 ,Attention Button" "Not implemented,Implemented"
else
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 15.--16. "             SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
endif
sif (cpuis("TEGRAX1"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,ADVANCE_BY_2_CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK_SCHEDULE_CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2_READ_FIX_EN" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,MICROSECOND_ENABLE" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,MICROSECOND_LIMIT"
elif (cpuis("TEGRAX2"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,RP XP Reference Register"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,Advanced by 2 CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK schedule CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK NPT empty CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2 read fix enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,Microsecond enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,Counter value to be used to reset the one microsecond counter used for update FC scheduling"
group.long 0xF44++0x03
line.long 0x00 "VEND_CYA0,Vendor CYA0 Register"
bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE                    ,Force retry possible" "No,Yes"
bitfld.long 0x00 29. "              UP_NC2C                                  ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 28. " DROP_VDM_TYPE1                          ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled"
bitfld.long 0x00 27. "         DROP_NV_VDM_TYPE1                        ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL                   ,Credits for the VDM packet dropped release enable" "Disabled,Enabled"
bitfld.long 0x00 25. "         LTR_EN                                   ,Hide LTR capability enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 24. " ALLOW_ALL_DS_RO                         ,Allow all DS RO" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "         NATIVE_P2P_STARVE_COUNT                  ,Native P2P starve count"
textline "                               "
bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH                   ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "               FINISH_PKT_ON_RCVRY_EN                   ,Finish packet on recovery enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE                     ,UR PW drop all mode" "No,Yes"
bitfld.long 0x00 9. "              DROP_ALL_MODE                            ,Drop all mode" "No,Yes"
textline "                               "
bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE                        ,Max payload size" "INIT,,,,,4KB,,Auto"
bitfld.long 0x00 5. "             ADR64                                    ,64-bit addressing mode" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " IGNORE_BME                              ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored"
bitfld.long 0x00 3. "      UFPCI_BLOCK_B2B_NP                       ,UFPCI block back-to-back NP" "No,Yes"
textline "                               "
bitfld.long 0x00 2. " GPU_NISONC2HPISO                        ,GPU NISONC2HPISO" "Disabled,Enabled"
bitfld.long 0x00 1. "         PASSPW_RO                                ,PASSPW RO" "No,Yes"
textline "                               "
bitfld.long 0x00 0. " REL_CREDIT_UR_PW                        ,Credits for the ur_pw received release" "No,Yes"
else
group.long 0xF34++0x0F
line.long 0x00 "ECTL_2_R1,ECTL_2_R1"
hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.byte 0x00 8.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
textline "                               "
hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C                             ,CDR_CNTL_1C"
line.long 0x04 "ECTL_3_R1,ECTL_3_R1"
bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C                          ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--4. "               TX_PEAK_1C                               ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "ECTL_2_R2,ECTL_2_R2"
hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.word 0x08 0.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
line.long 0x0C "ECTL_3_R2,ECTL_3_R2"
bitfld.long 0x0C 24.--27. " PRE_SEL1_1C                             ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16.--20. "               SEL1_1C                                  ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
bitfld.long 0x0C 8.--11. " PRE_SEL0_1C                             ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--4. "               SEL0_1C                                  ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xF48++0x07
line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)"
bitfld.long 0x00 21. " POLLING_RESET_FIX_EN                    ,Polling reset fix enable" "Disabled,Enabled"
bitfld.long 0x00 20. "         HOTPLUG_IN_TRAFFIC_EN                    ,Hotplug in traffic enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " NISO2ISO                                ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled"
bitfld.long 0x00 18. "         ALLOW_UPSTREAM_CMPL_OVERTAKE_PW          ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH                     ,Split ARB block coherent" "Disabled,Enabled"
bitfld.long 0x00 16. "         HIDE_MSIMAP                              ,Hide MSIMAP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " LINKACTV_REPORTING                      ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "         P2P_ISO2NIS                              ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 13. " ERPT                                    ,ERPT" "Disabled,Enabled"
bitfld.long 0x00 12. "         HIDE_MSI_CAP                             ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " ACCEPT_MSGD1                            ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "         TC2ISO_MAP                               ,TC2ISO MAP" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY                      ,P2P block P2P only" "Disabled,Enabled"
line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)"
bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE           ,Goto detect on surprise EIDLE" "Disabled,Enabled"
bitfld.long 0x04 29. "         ENABLE_SERR_REPORTING                    ,Enable SERR reporting" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE              ,Goto L1 L2 after DLLP done" "Disabled,Enabled"
bitfld.long 0x04 27. "         CTRL_IGNORE_LPBK_EXIT                    ,Control ignore LPBK exit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY                   ,Control relax LPBK entry" "Disabled,Enabled"
bitfld.long 0x04 25. "         CTRL_FORCE_PRBS_RST                      ,Control force PRBS reset" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN          ,Force Deemphasis advertised enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 23. " POWER_UP_BYPASS                         ,Power up bypass" "No bypass,Bypass"
endif
textline "                               "
bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN            ,Force reciver compliance enable" "Disabled,Enabled"
bitfld.long 0x04 21. "         FORCE_COMPLIANCE_GEN2_SPEED_EN           ,Force compliance GEN2 speed enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE     ,Force compliance and advertise mode" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE  ,Preserve TX packet during speed change" "Not preserved,Preserved"
bitfld.long 0x04 18. "    GEN2_EXIT_USE_STAT_IDLE                  ,GEN2 exit use status idle" "Not idle,Idle"
textline "                               "
bitfld.long 0x04 17. " GEN2_LOOPBACK                           ,GEN2 loopback" "0,1"
bitfld.long 0x04 16. "                SA_EXTRA_RESET_EN_RANGE                  ,SA extra reset enable range" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE                      ,Control TX PTRN range"
bitfld.long 0x04 4.--5. "             TEST_MODE_RANGE                          ,Test mode range" "0,1,2,3"
textline "                               "
bitfld.long 0x04 3. " NOSCRAMBLE_RANGE                        ,No scramble range" "0,1"
bitfld.long 0x04 2. "                EIDLE_DATA_RANGE                         ,EIDLE data range" "0,1"
textline "                               "
bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE                    ,EIDLE override range" "0,1"
bitfld.long 0x04 0. "                RDET_BYPASS_RANGE                        ,RDET bypass range" "0,1"
endif
textline "                               "
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
width 22.
group.long 0xF50++0x03
line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)"
bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ  ,Idle mode L1 clock request" "0,1"
bitfld.long 0x00 30. "         IDLE_MODE_DYNAMIC         ,Idle mode dynamic" "0,1"
textline "                               "
bitfld.long 0x00 29. " IDLE_MODE_L1         ,Idle mode L1" "0,1"
bitfld.long 0x00 28. "         XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x00 18.--27. 1. " MICROSECOND          ,Various timers required by PCI-express specification"
bitfld.long 0x00 16.--17. "      SLEEP_MODE_L1_CLKREQ      ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 15. " L1_CLKREQ            ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 8.--14. 1. " MINIMUM              ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again"
textline "                               "
bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC   ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 3.--4. " SLEEP_MODE_L1        ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 2. " DISABLED             ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 1. " DYNAMIC              ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 0. " L1                   ,Enable analog pads to power down when in L1 state" "Disabled,Enabled"
endif
textline "     "
width 22.
group.long 0xF54++0x07
line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)"
hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START      ,TS detect start"
hexmask.long.byte 0x00 16.--23. 1. "        FTS_DETECT_START          ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE         ,N_FTS value advertised by the remote device"
hexmask.long.byte 0x00 0.--7. 1. "        N_FTS                     ,N_FTS value that we advertise to the device on the other side of the link"
line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0"
bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 24. "       FAILED_L0S_EXITS_LC       ,Failed L0S exits LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 20. " NAKS_RCVD_INF        ,NAKs received counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 16. "       NAKS_RCVD_LC              ,NAKS received LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 12. " CRC_ERRORS_INF       ,CRC error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 8. "       CRC_ERRORS_LC             ,Current value from the CRC error counter" "No effect,Clear"
textline "                               "
bitfld.long 0x04 4. " 8B10B_ERRORS_INF     ,8b/10b error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 0. "       8B10B_ERRORS_LC           ,Current value from the 8b/10b error counter" "No effect,Clear"
rgroup.long 0xF5C++0x07
line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS     ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
hexmask.long.byte 0x00 16.--23. 1. "        NAKS_RCVD                 ,Counts the number of NAKs received from the endpoint in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS           ,Counts the number of CRC errors detected in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        8B10B_ERRORS              ,Counts the number of 8b/10b errors detected in one microsecond"
else
hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS         ,Counts the number of 8b/10b errors detected in one microsecond"
hexmask.long.byte 0x00 16.--23. 1. "        CRC_ERRORS                ,Counts the number of CRC errors detected in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD            ,Counts the number of NAKs received from the endpoint in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        FAILED_L0S_EXITS          ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
endif
line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register"
hexmask.long.byte 0x04 16.--23. 1. " REPLAY               ,Counts number of times TXBA replays"
hexmask.long.byte 0x04 8.--15. 1. "        BAD_TLP                   ,Counts bad tlps reported by RXL"
textline "                               "
hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR             ,Counts LCRCL Errors reported by RXL"
textline "                               "
width 28.
group.long 0xF64++0x0B
line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)"
hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE                  ,Mute idle"
line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)"
bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE         ,8B10B feature enable" "Disabled,Enabled"
hexmask.long.word 0x04 20.--30. 1. "     8B10B_ERROR_WINDOW          ,CPrograms the time frame in multiples of 1 microsecond"
textline "                                     "
hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD      ,Programs the 8b10b error threshold"
line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)"
rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE        ,Gen2 link width up-configure capability" "Not capable,Capable"
bitfld.long 0x08 30. "  REV2P0_COMPLIANCE_DIS       ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 29. " EIDLE_INFERENCE_EN         ,Disable electrical idle inference" "No,Yes"
bitfld.long 0x08 28. "          SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     RECOVERY_SPEED_TIMEOUT_ADJ  ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS              ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 19. "           DEEMPHASIS_STRAP            ,DEEMPHASIS_STRAP" "-6db,-3.5db"
textline "                                     "
bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS         ,Forces root port to use de-emphasis value" "Disabled,Enabled"
bitfld.long 0x08 17. "     POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 16. " AUTONOMOUS_CHANGE          ,Autonomous change" "No,Yes"
rbitfld.long 0x08 12.--15. "          DATA_RATE_SUPPORTED_REMOTE  ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED        ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "           TARGET_LINK_SPEED           ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE         ,TX_MARGIN_OVERRIDE" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 2. "     CYA_DEEMPHASIS_OVERRIDE     ,CYA deemphasis override" "No override,Override"
endif
bitfld.long 0x08 1. "     ADVERTISED_RATE_CHANGE      ,ADVERTISED_RATE_CHANGE" "No effect,Change"
textline "                                     "
bitfld.long 0x08 0. " SPEED_CHANGE               ,Link speed negotiation procedure" "No effect,Change"
group.long 0xF74++0x03
line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup"
hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD       ,Time to hold CDR at reset in Recovery"
sif (cpuis("TEGRAX2"))
group.long 0xF78++0x03
line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown"
hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND                ,Number of xclks in 1 microsecond when running at gen2 speed"
endif
group.long 0xF84++0x03
line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery"
textline "                                     "
width 30.
sif (cpuis("TEGRAX2"))
rgroup.long 0xF88++0x07
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR"
line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side"
rgroup.long 0xF94++0x0B
line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read"
line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery"
line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery"
bitfld.long 0x08 8. " REASON                          ,Reason" "All,Error"
textline "                                       "
hexmask.long.byte 0x08 0.--7. 1. " VALUE                           ,Value"
else
rgroup.long 0xF88++0x13
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR"
line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side"
line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side"
line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read"
line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery"
group.long 0xF9C++0x03
line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery"
bitfld.long 0x00 8. " REASON                          ,REASON" "All,Error"
textline "                                       "
hexmask.long.byte 0x00 0.--7. 1. " VALUE                           ,VALUE"
endif
rgroup.long 0xFA0++0x07
line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1"
line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only"
group.long 0xFA8++0x07
line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)"
bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY             ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8"
textline "                                       "
bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG     ,Ignore upstream attention button" "Not ignored,Ignored"
textline "                                       "
bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS         ,Unblock up transaction" "Blocked,Unblocked"
textline "                                       "
bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR    ,Block all upstream transaction after an error" "Enabled,Disabled"
textline "                                       "
bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS       ,HW auto width disable disable" "False,True"
textline "                                       "
bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS        ,BW management INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS       ,Auto bandwidth INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS              ,Auto bandwidth disable" "False,True"
textline "                                       "
bitfld.long 0x00 16. " BW_MANAGEMENT_DIS               ,BW management disable" "False,True"
textline "                                       "
bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP       ,Shadow link BW notify capable" "Disabled,Enabled"
textline "                                       "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
else
rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
endif
textline "                                       "
bitfld.long 0x00 11. " SLOT_IMPLEMENTED                ,Slot implemented" "Not implemented,Implemented"
textline "                                       "
eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME             ,Error STS hotplug PME" "No error,Error"
textline "                                       "
eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI             ,Error STS hotplug NMI" "No error,Error"
textline "                                       "
bitfld.long 0x00 7. " PCA_ENABLE                      ,Enable/disable the PCA in any TMS" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " GEN2_SPEED_DISABLE              ,Gen 2 protocol speed disable" "No,Yes"
textline "                                       "
bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE           ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes"
textline "                                       "
bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit"
textline "                                       "
bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE              ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes"
line.long 0x04 "PRIV_XP_CONFIG,Private XP Config"
bitfld.long 0x04 0.--1. " LOW_PWR_DURATION                ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle"
textline "                                            "
width 35.
rgroup.long 0xFB0++0x03
line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
textline "                                            "
sif (cpuis("TEGRAX2"))
rgroup.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
else
group.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
endif
textline "                              "
group.long 0xFB8++0x03
line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B      ,UI window for electrical idle exit not detected in the Recover"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. "   TIMEOUT_A      ,UI window for COM not detected in the Recovery"
textline "                              "
width 25.
sif (cpuis("TEGRAX2"))
group.long 0xFBC++0x03
line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register"
hexmask.long.word 0x00 16.--31. 1. " COMMAND                                             ,Command"
hexmask.long.byte 0x00 8.--15. 1. "         STATE         ,State"
textline "                                  "
eventfld.long 0x00 7. " STATE_CHANGE7                                       ,State change 7" "Not changed,Changed"
eventfld.long 0x00 6. "  STATE_CHANGE6 ,State change 6" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 5. " STATE_CHANGE5                                       ,State change 5" "Not changed,Changed"
eventfld.long 0x00 4. "  STATE_CHANGE4 ,State change 4" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 3. " STATE_CHANGE3                                       ,State change 3" "Not changed,Changed"
eventfld.long 0x00 2. "  STATE_CHANGE2 ,State change 2" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 1. " STATE_CHANGE1                                       ,State change 1" "Not changed,Changed"
eventfld.long 0x00 0. "  STATE_CHANGE0 ,State change 0" "Not changed,Changed"
group.long 0xFC4++0x07
line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1"
bitfld.long 0x00 28.--31. " LANE_15                                             ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "           LANE_14       ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20.--23. " LANE_13                                             ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "           LANE_12       ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 12.--15. " LANE_11                                             ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "           LANE_10       ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 4.--7. " LANE_9                                              ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "           LANE_8        ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1"
hexmask.long.word 0x04 16.--31. 1. " SSID                                                ,SSID"
hexmask.long.word 0x04 0.--15. 1. "         SSVID         ,SSVID"
endif
sif (!cpuis("TEGRAX2"))
group.long 0xFC8++0x0B
line.long 0x00 "VEND_SHADOW,Shadow register of SS_1"
hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID                                           ,SS_1_SSID"
textline "                                  "
hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID                                          ,SS_1_SSVID"
line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x04 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 24.--29. " CODE3                                               ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 16.--21. " CODE2                                               ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 8.--13. " CODE1                                               ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 0.--5. " CODE0                                               ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..."
line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x08 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x08 24.--29. " CODE7                                               ,CODE7" "Mobile,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 16.--21. " CODE6                                               ,CODE6" "Init,,Mobile,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 8.--13. " CODE5                                               ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 0.--5. " CODE4                                               ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..."
endif
textline "                                  "
sif (cpuis("TEGRAK1"))
group.long 0xFD4++0x03
line.long 0x00 "ECTL_1_R1,ECTL_1_R1"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xFD8++0x03
line.long 0x00 "ECTL_1_R2,ECTL_1_R2"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xFDC++0x07
line.long 0x00 "TIMEOUT2,Timeout 2 Register"
bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME                                 ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "PRIV_MISC,Private Miscellaneous Register"
bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE                                ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD                                 ,Number of contiguous nbref_clks (25MHz) after clamping"
textline "                                  "
bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE                               ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD                            ,Number of contiguous nbref_clks (12MHz) after clamping"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x04 4. " USE_EXT_CLKREQ                                      ,Use EXT CLKREQ" "Not used,Used"
endif
textline "                                  "
bitfld.long 0x04 0.--3. " PRSNT_MAP                                           ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xFE4++0x03
line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register"
bitfld.long 0x00 31. " OVERRIDE_JTAG                                       ,Internal JTAG register override" "No override,Override"
textline "                                  "
bitfld.long 0x00 4.--7. " TX_CHAR_SPEED                                       ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..."
textline "                                  "
bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE                                    ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced"
textline "                                  "
bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT                                   ,Transition from E-idle to compliance pattern" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY                                  ,Transition from compliance pattern to E-idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " SHORT_LINK_TIMERS                                   ,Shortened timers in LINK" "Disabled,Enabled"
endif
group.long 0xFE8++0x03
line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register"
hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT                                      ,Specifies number of misaligned COM symbols"
group.long 0xFEC++0x03
line.long 0x00 "XP_CTL_1,Control Registers Used In XP"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP                        ,Initiated wake one TLP" "Disabled,Enabled"
textline "                                  "
endif
sif (cpuis("TEGRAX1"))
bitfld.long 0x00 29.--30. " SPARE                                               ,SPARE" "0,1,2,3"
textline "                                  "
else
bitfld.long 0x00 28.--30. " SPARE                                               ,Spare" "0,1,2,3,4,5,6,7"
textline "                                  "
endif
bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION                         ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 26. " NEW_IOBIST_CTRL                                     ,Enable control signals from iobist" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 25. " OLD_IOBIST_EN                                       ,When set will enable old iobist,else it will enable new iobist" "New,Old"
textline "                                  "
bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER                                 ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS                          ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes"
textline "                                  "
bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION                 ,LTSSM enable deskew in recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP                                 ,Bypass config powerup" "0,1"
textline "                                  "
bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR                              ,Reset TS control on error" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG                       ,RX EIDLE exit timer in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG                               ,Force reset in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL                               ,Link resize powerdown control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S                         ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN                    ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY                      ,Preserve TX packet on recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT                    ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed"
textline "                                  "
bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY                                    ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1                                ,LWLO HUNT on bad TS1" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG                                  ,Enables symbol alignment" "Disabled,Enabled"
group.long 0xFF0++0x0F
line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon"
hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS                                       ,Number of EIE symbols sent in L1 Beacon Entry/Exist state"
textline "                                  "
bitfld.long 0x00 1. " TX_BYP_CTRL                                         ,TX bypass control" "Only L0,All Lanes"
textline "                                  "
bitfld.long 0x00 0. " EN                                                  ,Enable" "Disabled,Enabled"
line.long 0x04 "TIMEOUT3,Timeout 3 Register"
hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME                                    ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state"
textline "                                  "
bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
sif cpuis("TEGRAX2")
bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS                      ,Loopback rate deemph check disable" "No,Yes"
textline "                                  "
endif
bitfld.long 0x08 23. " RX_CAL_EN                                           ,Hardware RX calibration in UPHY enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 22. " AUX_RX_IDLE_EN                                      ,RX idle enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN                             ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT                     ,Wait for lockdet during L1 exit" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT                        ,Holdoff counter limit for counter that was added in ECO 351987"
textline "                                  "
bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS                           ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK                             ,Relaxed unexpected completion" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE                           ,Loopback force nonscramble enable" "Disabled,Enabled"
textline "                                  "
endif
bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM               ,Config link start require PAD lane num" "0,1"
textline "                                  "
hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD                             ,Maximum amount of time spent in loopback"
line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)"
hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK                                  ,Each bit represent the corresponding logical lane"
tree.end
width 0x0B
tree.end
tree "PCIE1"
base ad:0x40000000
width 11.
tree "PCI Compatible Configuration Registers"
rgroup.long 0x00++0x03
line.long 0x00 "DEV_ID,Device ID And Vendor ID Register"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID          ,Identify the particular device"
hexmask.long.word 0x00 0.--15. 1. "             VENDOR_ID        ,Identify manufacturer of the device"
group.long 0x04++0x03
line.long 0x00 "DEV_CTRL,Command And Status Register"
eventfld.long 0x00 31. " DETECTED_PERR      ,Primary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x00 30. "       SIGNALED_SERR    ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active"
eventfld.long 0x00 29. "     RECEIVED_MASTER   ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x00 28. " RECEIVED_TARGET    ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 27. "      SIGNALED_TARGET  ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
rbitfld.long 0x00 20. " CAPLIST            ,Device configuration space includes a capabilities list" "Not present,Present"
rbitfld.long 0x00 19. "      INTR_STATUS      ,INTx interrupt message is pending internally to the device" "Not active,Active"
bitfld.long 0x00 10. "     INTR_DISABLE      ,Ability of the device to generate INTx interrupt messages" "No,Yes"
textline "                    "
bitfld.long 0x00 8. " SERR               ,SERR enable bit" "Disabled,Enabled"
bitfld.long 0x00 6. "         PERR             ,Parity Error Response bit" "Disabled,Enabled"
bitfld.long 0x00 2. "       BUS_MASTER        ,Ability of the root complex to issue memory and I/O read/write  requests" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 1. " MEMORY_SPACE       ,Respond to memory space accesses on the primary interface" "Disabled,Enabled"
bitfld.long 0x00 0. "         IO_SPACE         ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "REV_CC,Revision ID And Class Code Registers"
hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE         ,Generic function of the device"
hexmask.long.byte 0x00 0.--7. 1. "           REVISION_ID      ,Device specific revision identifier"
group.long 0x0C++0x03
line.long 0x00 "MISC_1,MISC 1 Register"
rbitfld.long 0x00 23. " HEADER_TYPE1       ,Identifies a multi-function device" "Single function,Multi function"
hexmask.long.byte 0x00 16.--22. 1. "  HEADER_TYPE0     ,Specifies the layout of bytes 10h through 3Fh"
hexmask.long.byte 0x00 0.--7. 1. "             CACHE_LINE_SIZE   ,Cache line size"
group.long 0x18++0x1B
line.long 0x00 "BN_LT,Bus Number And Latency Timer Register"
hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER     ,Subordinate bus number"
hexmask.long.byte 0x00 8.--15. 1. "               SEC_BUS_NUMBER   ,The secondary bus number"
hexmask.long.byte 0x00 0.--7. 1. "             PRI_BUS_NUMBER    ,The primary bus number"
line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register"
eventfld.long 0x04 31. " DETECTED_PERR      ,Secondary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x04 30. "       RECEIVED_SERR    ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active"
eventfld.long 0x04 29. "     RECEIVED_MASTER   ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x04 28. " RECEIVED_TARGET    ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 27. "      SIGNALED_TARGET  ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
bitfld.long 0x04 12.--15. " IO_LIMIT           ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k"
rbitfld.long 0x04 8.--11. "              IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..."
bitfld.long 0x04 4.--7. "             IO_BASE           ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k"
textline "                    "
rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT    ,Identifies the I/O addressing support" "16,32,?..."
line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register"
hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT          ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit"
hexmask.long.word 0x08 4.--15. 0x10 "             MEM_BASE         ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address"
line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register"
hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit"
rbitfld.long 0x0C 16.--19. "             L64BIT           ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
hexmask.long.word 0x0C 4.--15. 0x10 "  PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address"
textline "                    "
bitfld.long 0x0C 0.--3. " B64BIT             ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register"
line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register"
line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register"
hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS   ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit"
hexmask.long.word 0x18 0.--15. 1. "             BASE_UPPER_BITS  ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address"
rgroup.long 0x34++0x07
line.long 0x00 "CAP_PTR,Capabilities Pointer"
hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR    ,Offset into configuration space where the capabilities list begins"
group.long 0x3C++0x03
line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers"
bitfld.long 0x00 22. " SB_RESET           ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled"
bitfld.long 0x00 20. "         VGA_16BITIO      ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled"
bitfld.long 0x00 19. "       VGA_ADDRESS       ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 18. " ISA_ADDRESS        ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled"
bitfld.long 0x00 17. "         SERR_FORWARD     ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled"
bitfld.long 0x00 16. "       PERR_RESP         ,Response to poisoned TLPs" "Disabled,Enabled"
textline "                    "
hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN           ,Contains the interrupt pin the device (or device function) uses"
hexmask.long.byte 0x00 0.--7. 1. "               INTR_LINE        ,Contains the interrupt routing information"
tree.end
tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers"
width 6.
rgroup.long 0x40++0x07
line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0"
hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR        ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID         ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge"
line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1"
hexmask.long.word 0x04 16.--31. 1. " SSID            ,Identifies the particular add-in card or subsystem"
hexmask.long.word 0x04 0.--15. 1. "           SSVID          ,Identifies the manufacturer of the add-in card or subsystem"
tree.end
tree "PCI Power Management Capability Structure Registers"
rgroup.long 0x48++0x03
line.long 0x00 "PM_0,Power Management Register 0"
bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 30. "  D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 29. "  D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 28. "  D1_SUPPORT  ,Power states in which the function may assert PME?..." "Not supported,Supported"
textline "               "
bitfld.long 0x00 27. " D0_SUPPORT      ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 26. "  D2_SUPPORT     ,D2 power management state support" "Not supported,Supported"
bitfld.long 0x00 25. "  D1_SUPPORT ,D1 power management state support" "Not supported,Supported"
bitfld.long 0x00 22.--24. "  AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA"
textline "               "
bitfld.long 0x00 21. " DEV_SPEC_INIT   ,Device specific initialization bit" "Not needed,Needed"
bitfld.long 0x00 16.--18. "     PCIPM_REV      ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..."
hexmask.long.byte 0x00 8.--15. 1. "        NEXT_PTR   ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID      ,Detect the presence of the power management capability registers in a PCI to PCI bridge"
group.long 0x4C++0x03
line.long 0x00 "PM_1,Power Management Register 1"
eventfld.long 0x00 15. " PME_STATUS      ,Assert the PME# signal independent of the state  of the PME_En bit" "Not active,Active"
bitfld.long 0x00 8. "     PME            ,Assert PME?..." "Disabled,Enabled"
bitfld.long 0x00 0.--1. "       PWR_STATE  ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot"
tree.end
tree "PCI MSI Capability Structure Registers"
width 16.
group.long 0x50++0x0F
line.long 0x00 "MSI_CTRL,MSI Control Registers"
rbitfld.long 0x00 23. " 64BIT_CAP     ,Capability of generating a 64-bit message address" "Not capable,Capable"
bitfld.long 0x00 20.--22. "   MULT_EN      ,Number of allocated messages" "0,2,4,8,?..."
rbitfld.long 0x00 17.--19. "         MULT_CAP ,Number of requested messages" "0,2,?..."
bitfld.long 0x00 16. "   CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "  NEXT_PTR ,Points to the next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge"
line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register"
hexmask.long 0x04 2.--31. 0x04 " DWORD         ,Bits 31:2 of the address"
line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " DATA          ,MSI message data"
tree.end
sif (cpuis("TEGRAX2"))
tree "PCI MSI Map Register"
group.long 0x60++0x0B
line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register"
rbitfld.long 0x00 27.--31. " CAP_TYPE      ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..."
bitfld.long 0x00 16. "  XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 0x01 "  CAP_PTR  ,Pointer to the next capability in the list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID   ,Capability ID for HyperTransport technology devices"
line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register"
hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field"
line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register"
tree.end
endif
tree "PCI Express Capability Structure Registers"
width 26.
rgroup.long 0x80++0x07
line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register"
bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER            ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x00 24. " SLOT_IMPLEMENTED                    ,PCI express capability slot implemented" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE                    ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..."
textline "                                   "
bitfld.long 0x00 16.--19. " VERSION                             ,PCI express capability version number" ",Version 1,Version 2,?..."
textline "                                   "
hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR            ,The offset to the next PCI capability structure"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID                  ,Indicates PCI express capability structure"
line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register"
bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE     ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE     ,Specifies the upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING            ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY      ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us"
textline "                                   "
bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY     ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us"
textline "                                   "
bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE             ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field"
textline "                                   "
bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED         ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits"
textline "                                   "
bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE                    ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
group.long 0x88++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers"
rbitfld.long 0x00 21. " TRANSACTIONS_PENDING                ,Transactions pending" "Completed,Pending"
textline "                                   "
rbitfld.long 0x00 20. " AUX_POWER_DETECTED                  ,AUX power detected" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED             ,Unsupported request" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " FATAL_ERROR_DETECTED                ,Fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED            ,Non-fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " CORR_ERROR_DETECTED                 ,Correctable errors" "Not detected,Detected"
textline "                                   "
bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE               ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 11. " ENABLE_NO_SNOOP                     ,No snoop bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE           ,AUX power PM enable" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE            ,Phantom functions" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE           ,8-bit tag field" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE                    ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING             ,Relaxed ordering bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE         ,Reporting of unsupported requests" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE        ,Reporting of fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE    ,Reporting of non-fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE         ,Reporting of correctable errors" "Disabled,Enabled"
textline "                                   "
rgroup.long 0x8C++0x03
line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER                         ,PCI express port number"
textline "                                   "
bitfld.long 0x00 21. " BW_NOTIFY                           ,Bandwidth notify" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 20. " LINKACTV_REPORTING                  ,Link active reporting" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP              ,Detecting and reporting a surprise down error condition" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 18. " CLOCK_PM                            ,Component tolerates the removal of any reference clock" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY                     ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us"
textline "                                   "
bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY                    ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..."
textline "                                   "
bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT        ,Level of active state power management supported" ",L0s Entry,,L0s and L1"
textline "                                   "
bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH                      ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,?..."
else
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..."
endif
textline "                                   "
group.long 0x90++0x03
line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register"
eventfld.long 0x00 31. " AUTO_BANDWIDTH                      ,Auto bandwidth" "Disabled,Enabled"
textline "                                   "
eventfld.long 0x00 30. " BW_MANAGEMENT                       ,Bandwidth management" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 29. " DL_LINK_ACTIVE                      ,Data link control and management state machine" "Not active,Active"
textline "                                   "
rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG                   ,Component uses platform reference clock" "Platform clock,Independent"
textline "                                   "
rbitfld.long 0x00 27. " LINK_TRAINING                       ,Link training" "Completed,In progress"
textline "                                   "
rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH                      ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
rbitfld.long 0x00 16.--19. " LINK_SPEED                          ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..."
textline "                                   "
bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN               ,Auto bandwidth interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN                ,Bandwidth management interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE               ,Hardware auto width disable" "No,Yes"
textline "                                   "
rbitfld.long 0x00 8. " CLOCK_PM                            ,Clock PM" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " EXTENDED_SYNCH                      ,Forces extended transmission" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION          ,Common clock configuration" "Common reference clock,Asynchrous reference clock"
textline "                                   "
rbitfld.long 0x00 5. " RETRAIN_LINK                        ,Link retraining" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " LINK_DISABLE                        ,Disabling the Link" "No,Yes"
textline "                                   "
rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY            ,RCB support capabilities" "64 byte,128 byte"
textline "                                   "
bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL        ,Level of active state PM supported" ",L0s Entry,,L0s and L1"
rgroup.long 0x94++0x03
line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER                ,Physical slot number attached to this port"
textline "                                   "
bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT            ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported"
textline "                                   "
bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE              ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE              ,Upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x00 6. " HOT_PLUG_CAPABLE                    ,Supporting Hot-plug operations" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                   ,Hot-plug surprise" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 2. " MRL_SENSOR_PRESENT                  ,MRL sensor" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT            ,Power controller" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not Implemented,Implemented"
group.long 0x98++0x0B
line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register"
eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED              ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE   ,Electromechanical interlock" "Disengaged,Engaged"
textline "                                   "
rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE               ,Presence of a card in the slot" "Slot empty,Card present"
textline "                                   "
rbitfld.long 0x00 21. " MRL_SENSOR_STATE                    ,MRL sensor status" "MRL Closed,MRL Open"
textline "                                   "
eventfld.long 0x00 20. " COMMAND_COMPLETED                   ,Hot-plug controller completed an issued command" "Not completed,Completed"
textline "                                   "
eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED             ,Presence Detect change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " MRL_SENSOR_CHANGED                  ,MRL Sensor state change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " POWER_FAULT_DETECTED                ,Power fault" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED                 ,Attention button" "Not pressed,Pressed"
textline "                                   "
bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE       ,Data Link Layer Link Active field" "Not changed,Changed"
textline "                                   "
rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported"
textline "                                   "
bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL            ,Power state of the slot" "Power on,Power off"
textline "                                   "
bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL             ,Current state of the Power Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL              ,Current state of the Attention Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE           ,Generation of hot plug interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE  ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE      ,Presence detect changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE    ,MRL sensor changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE         ,Power fault event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE          ,Attention button pressed event interrupt" "Disabled,Enabled"
line.long 0x04 "RCR,Root Control Register"
bitfld.long 0x04 3. " PME_INT                             ,PME interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 2. " SERR_FAT                            ,Generating system error if a fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 1. " SERR_NONFAT                         ,Generating system error if a non-fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 0. " SERR_COR                            ,System error if a correctable error is reported" "Disabled,Enabled"
line.long 0x08 "RSR,Root Status Register"
rbitfld.long 0x08 17. " PMEPEND                             ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending"
textline "                                   "
eventfld.long 0x08 16. " PMESTAT                             ,PME was asserted by the requester ID" "Not active,Active"
textline "                                   "
hexmask.long.word 0x08 0.--15. 1. " REQID                               ,PCI requester ID of the last PME requester"
rgroup.long 0xA4++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
bitfld.long 0x00 11. " LTR_MECH_SUP                        ,LTR Capability support" "Unsupported,Supported"
textline "                                   "
endif
bitfld.long 0x00 4. " CPL_TO_DIS_SUP                      ,Support disabling the completion timeout mechanism" "Unsupported,Supported"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP                   ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xA8++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2"
bitfld.long 0x00 4. " CPL_TO_DISABLE                      ,Disables completion timeout" "No,Yes"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_VALUE                        ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..."
group.long 0xB0++0x03
line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register"
rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL            ,Current deemphasis level" "6,3.5"
textline "                                   "
bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS               ,Compliance deemphasis" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " COMPLIANCE_SOS                      ,Compliance SOS" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE           ,Transmission of the modified compliance pattern" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN                     ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..."
textline "                                   "
rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS               ,Level of de-emphasis" "-6dB,-3.5dB"
textline "                                   "
rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE               ,Link speed change disable" "No,Yes"
textline "                                   "
bitfld.long 0x00 4. " ENTER_COMPLIANCE                    ,Forces link to enter compliance mode" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED                   ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..."
tree.end
tree "Error Reporting Capability Registers"
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR      ,Next PTR"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " ID            ,ID"
else
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " ID            ,ID"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR      ,Next PTR"
endif
group.long 0x104++0x0B
line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register"
eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "    ECRC_ERR        ,ECRC error status" "No error,Error"
textline "                             "
eventfld.long 0x00 18. " MF_TLP        ,Malformed TLP status" "False,True"
eventfld.long 0x00 17. "       RCV_OVFL        ,Receiver overflow status" "No overflow,Overflow"
textline "                             "
eventfld.long 0x00 16. " UNEXP_COMP    ,Unexpected completion status" "False,True"
eventfld.long 0x00 15. "       COMP_ABORT      ,Completion abort status" "Not aborted,Aborted"
textline "                             "
eventfld.long 0x00 14. " COMP_TO       ,Completion timeout status" "No timeout,Timeout"
eventfld.long 0x00 13. "  FC_PROTO_ERR    ,Flow control protocol error status" "No error,Error"
textline "                             "
eventfld.long 0x00 12. " POS_TLP       ,Poisoned TLP status" "False,True"
eventfld.long 0x00 4. "       DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error"
textline "                             "
rbitfld.long 0x00 0. " TRAINING_ERR  ,Training error status" "No error,Error"
line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "  ECRC_ERR        ,ECRC error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 18. " MF_TLP        ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "  RCV_OVFL        ,Receiver overflow mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 16. " UNEXP_COMP    ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "  COMP_ABORT      ,Completion abort mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 14. " COMP_TO       ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "  PROTO_ERR       ,Flow control protocol error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 12. " POS_TLP       ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "  DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked"
textline "                             "
rbitfld.long 0x04 0. " TRAINING_ERR  ,Training error mask" "Not masked,Masked"
line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register"
bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal"
bitfld.long 0x08 19. "   ECRC_ERR        ,ECRC error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 18. " MF_TLP        ,Malformed TLP" "Non-fatal,Fatal"
bitfld.long 0x08 17. "   RCV_OVFL        ,Receiver overflow" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 16. " UNEXP_COMP    ,Unexpected completion" "Non-fatal,Fatal"
bitfld.long 0x08 15. "   COMP_ABORT      ,Completion abort" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 14. " COMP_TO       ,Completion timeout" "Non-fatal,Fatal"
bitfld.long 0x08 13. "   PROTO_ERR       ,Flow control protocol error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 12. " POS_TLP       ,Poisoned TLP" "Non-fatal,Fatal"
bitfld.long 0x08 4. "   DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal"
textline "                             "
rbitfld.long 0x08 0. " TRAINING_ERR  ,Training error" "Non-fatal,Fatal"
group.long 0x110++0x03
line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register"
eventfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF status" "Not masked,Masked"
eventfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover status" "Not masked,Masked"
eventfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 6. " BAD_TLP       ,Bad TLP status" "Not masked,Masked"
eventfld.long 0x00 0. "  RCV_ERR         ,Receiver error status" "Not masked,Masked"
group.long 0x114++0x03
line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register"
bitfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF mask" "Not masked,Masked"
bitfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover mask" "Not masked,Masked"
bitfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 6. " BAD_TLP       ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x00 0. "  RCV_ERR         ,Receiver error mask" "Not masked,Masked"
textline "                             "
width 26.
group.long 0x118++0x03
line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register"
bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled"
rbitfld.long 0x00 7. "  ECRC_CHK_CAP ,ECRC CHK CAP" "False,True"
textline "                                   "
bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled"
rbitfld.long 0x00 5. "  ECRC_GEN_CAP ,ECRC GEN CAP" "False,True"
textline "                                   "
rbitfld.long 0x00 0.--4. " ERR_PTR     ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0xF
line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register"
line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register"
line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register"
line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register"
textline "                                   "
width 20.
group.long 0x12C++0x0B
line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register"
bitfld.long 0x00 2. " FATAL_ERR_RPT_EN     ,Fatal error RPT enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " COR_ERR_RPT_EN       ,Correctable error RPT enable" "Disabled,Enabled"
line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register"
rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FATAL_RCVD          ,Fatal uncorrectable error messages" "Not received,Received"
textline "                             "
eventfld.long 0x04 5. " NONFATAL_RCVD        ,Non-fatal uncorrectable error messages" "Not received,Received"
eventfld.long 0x04 4. "  FIRST_FATAL_RCVD    ,First uncorrectable error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 3. " MULT_UNCOR_RCVD      ,Error is received and UNCOR_RCVD is already set" "False,True"
eventfld.long 0x04 2. "         STS_UNCOR_RCVD      ,Error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 1. " MULT_COR_RCVD        ,Correctable error message is received and COR_RCVD is already set" "False,True"
eventfld.long 0x04 0. "         COR_RCVD            ,Correctable error" "Not received,Received"
line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register"
hexmask.long.word 0x08 16.--31. 1. " ERR_COR              ,Requestor ID of first correctable error in root error status register "
hexmask.long.word 0x08 0.--15. 1. "          ERR_UNCOR           ,Requestor ID of first uncorrectable error in root error status register "
textline "                             "
tree.end
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
tree "PCI L1 PM Substate Capability Registers"
rgroup.long 0x140++0x07
line.long 0x00 "EXT_CAP,Extended Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP          ,Offset to the next PCI express capability structure"
bitfld.long 0x00 16.--19. "      EXT_CAP_VERSION               ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID                ,PCI-SIG defined ID number that indicates the nature and format of the extended capability"
line.long 0x04 "CAP,Capability Register"
bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE         ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 16.--17. "        CAP_T_PWRON_SCALE             ,Specifies the scale used for this port" "2 us,10 us,100 us,?..."
textline "                             "
hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME       ,Time (in us) required for this port to re-establish common mode"
bitfld.long 0x04 4. "        CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED   ,ASPM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 2. "  CAP_ASPM_L1_2_SUPPORTED       ,ASPM L1.2 is is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 0. "  CAP_PCI_PM_L1_2_SUPPORTED     ,PCI-PM L1.2 is supported" "Disabled,Enabled"
group.long 0x148++0x07
line.long 0x00 "CTRL1,Control 1 Register"
bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE      ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 16.--25. 1. "         LTR1_2_THRESH_VAL             ,Threshold value"
textline "                             "
hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME           ,Restore time"
bitfld.long 0x00 3. "        ASPM_L1_1_EN                  ,ASPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 2. " ASPM_L1_2_EN              ,ASPM L1.2 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  PCIPM_L1_1_EN                 ,PCIPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " PCIPM_L1_2_EN             ,PCIPM L1.2 enable" "Disabled,Enabled"
line.long 0x04 "CTRL2,Control 2 Register"
bitfld.long 0x04 3.--7. " T_PWRON_VALUE             ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--1. "        T_PWRON_SCALE                 ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..."
tree.end
endif
tree "NVIDIA Private Registers"
width 20.
group.long 0x494++0x03
line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer"
hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT   ,Replay timer limit"
hexmask.long.word 0x00 10.--18. 1. "      GEN2_ACK_TIMER_LIMIT          ,ACK timer limit"
textline "                             "
hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD  ,Update FC frequency"
bitfld.long 0x00 0. "      GEN2_DL_TIMERS_DISABLE        ,Enables the Gen2 DL timer settings" "No,Yes"
textline "                             "
width 34.
sif (cpuis("TEGRAX1"))
rgroup.long 0xC10++0x0F
line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL"
hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP    ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP"
textline "                                           "
hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP       ,T_PCIE2_RP_LTR_REP_VAL_SNOOP"
line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT"
bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE"
line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT"
bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE"
line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT"
bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET  ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE  ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE"
textline "                                           "
elif cpuis("TEGRAX2")
width 27.
group.long 0xC00++0x0F
line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register"
bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK   ,Refclk on with pad PLL lock" "Not locked,Locked"
bitfld.long 0x00 25. "           REFCLK_ON_WITH_PLLE_LOCK      ,Refclk on with PLLE lock" "Not locked,Locked"
textline "                                    "
bitfld.long 0x00 24. " HIDE_CAP                      ,Hide capability of L1 PM substates" "Not hidden,Hidden"
bitfld.long 0x00 19.--23. "           T_PWRON_VALUE                 ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 16.--17. " T_PWRON_SCALE                 ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..."
hexmask.long.byte 0x00 8.--15. 1. "               CM_RESTORE_TIME               ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN"
textline "                                    "
bitfld.long 0x00 4. " L1_PM_SUBSTATES               ,L1 PM Substates support enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             ASPM_L1_1                     ,ASPM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " ASPM_L1_2                     ,ASPM L1.2 support enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             PCI_PM_L1_1                   ,PCI-PM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " PCI_PM_L1_2                   ,PCI-PM L1.2 support enable" "Disabled,Enabled"
line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register"
bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2            ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled"
hexmask.long.word 0x04 13.--21. 1. "             CHK_CLKREQ_ASSERTED_DLY       ,Amount of time the DUT waits in L1.2"
textline "                                    "
hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY                 ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle"
line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register"
bitfld.long 0x08 21.--24. " MICROSECOND_COMP              ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 13.--20. 1. "                   MICROSECOND                   ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m"
textline "                                    "
hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY                    ,T L1.2 delay diagnostic"
line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register"
hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON               ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 17. "                 L11_T_REFCLK_ON_ENABLE        ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON               ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 3. "                 PCIPM_L1_2                    ,PCIMPM L1.2 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 2. " ASPM_L1_2                     ,ASPM L1.2 functionality enable" "Disabled,Enabled"
bitfld.long 0x0C 1. "             PCIPM_L1_1                    ,PCIPM L1.1 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 0. " ASPM_L1_1                     ,ASPM L1.1 functionality enable" "Disabled,Enabled"
rgroup.long 0xC10++0x03
line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register"
hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP                      ,Value for no snoop"
hexmask.long.word 0x00 0.--15. 1. "                 SNOOP                         ,Value for snoop"
group.long 0xC14++0x17
line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register"
bitfld.long 0x00 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x00 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x00 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.1 state"
line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register"
bitfld.long 0x04 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x04 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x04 0.--15. 1. " VALUE                         ,Number of times the link entered L1.2 ENTRY state"
line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register"
bitfld.long 0x08 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x08 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x08 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.2 ENTRY state"
line.long 0x0C "LTR_OVERRIDE,LTR Override Register"
hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP                      ,LTR override no snoop value"
hexmask.long.word 0x0C 0.--15. 1. "                 SNOOP                         ,LTR override snoop value"
line.long 0x10 "L1SS_SPARE,L1SS Spare Register"
hexmask.long.word 0x10 18.--31. 1. " SPARE2                        ,Spare 2"
eventfld.long 0x10 17. "                 LTR_MSG_RCV_STS               ,LTR MSG RCV STS" "No effect,Cleared"
textline "                                    "
bitfld.long 0x10 16. " LTR_MSG_INT_EN                ,LTR MSG INT enable" "Disabled,Enabled"
hexmask.long.word 0x10 2.--15. 1. "             SPARE1                        ,Spare 1"
textline "                                    "
bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN      ,LTR override no snoop enable" "Disabled,Enabled"
bitfld.long 0x10 0. "             LTR_OVERRIDE_SNOOP_EN         ,LTR override snoop enable" "Disabled,Enabled"
line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register"
bitfld.long 0x14 22. " PRI_CLK                       ,PRI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 21. "             TMS0_UFPCI_CLK                ,TMS0 UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 20. " TMS0_DFPCI_CLK                ,TMS0 DFPCI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 19. "             TMS0C2_XTXCLK1X               ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 18. " TMS0C2_XCLK                   ,TMS0C2 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 17. "             TMS0C1_XTXCLK1X               ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 16. " TMS0C1_XCLK                   ,TMS0C1 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 15. "             TMS0C0_XTXCLK1X               ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 14. " TMS0C0_XCLK                   ,TMS0C0 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 13. "             TMSC0_XCLK                    ,TMSC0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 12. " T0C2_PCA_XCLK                 ,T0C2 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 11. "             T0C2_PCA_UFPCI_CLK            ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 10. " T0C1_PCA_XCLK                 ,T0C1 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 9. "             T0C1_PCA_UFPCI_CLK            ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 8. " T0C0_PCA_XCLK                 ,T0C0 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 7. "             T0C0_PCA_UFPCI_CLK            ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 6. " GRP2_XTXCLK1X                 ,GRP2 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 5. "             GRP2_XCLK                     ,GRP2 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 4. " GRP1_XTXCLK1X                 ,GRP1 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 3. "             GRP1_XCLK                     ,GRP1 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 2. " GRP0_XTXCLK1X                 ,GRP0 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 1. "             GRP0_XCLK                     ,GRP0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 0. " CLK25M                        ,CLK25M enable" "Disabled,Enabled"
group.long 0xD00++0x1B
line.long 0x00 "DBG0,Debug 0"
line.long 0x04 "DBG1,Debug 1"
line.long 0x08 "DBG2,Debug 2"
line.long 0x0C "DBG3,Debug 3"
line.long 0x10 "DBG4,Debug 4"
line.long 0x14 "DBG5,Debug 5"
line.long 0x18 "DBG6,Debug 6"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD1C++0x03
line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO"
group.long 0xD20++0x1B
line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI"
line.long 0x04 "LANE_DBG0,Lane Debug 0"
line.long 0x08 "LANE_DBG1,Lane Debug 1"
line.long 0x0C "LANE_DBG2,Lane Debug 2"
line.long 0x10 "LANE_DBG3,Lane Debug 3"
line.long 0x14 "LANE_DBG4,Lane Debug 4"
line.long 0x18 "LANE_DBG5,Lane Debug 5"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD3C++0x07
line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value"
line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value"
group.long 0xD44++0x0B
line.long 0x00 "LINK_DBG0,Link Debug 0"
line.long 0x04 "LINK_DBG1,Link Debug 1"
line.long 0x08 "LINK_DBG2,Link Debug 2"
bitfld.long 0x08 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x08 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x08 29. " CTL                           ,Control" "0,1"
rgroup.long 0xD50++0x07
line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value"
line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value"
endif
width 27.
group.long 0xD5C++0x03
line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces"
bitfld.long 0x00 8. " UFA2WRR_PWTOP                 ,UFA2WRR PWTOP enable" "Disabled,Enabled"
bitfld.long 0x00 7. "             UBFI2DFI_P2P                  ,UBFI2DFI P2P enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 6. " TXBA2DFI_WR                   ,TXBA2DFI WR enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             CMDQ2UFARB                    ,CMDQ2UFARB enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " UBFI2DFI_NTT                  ,UBFI2DFI NTT enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PCA                           ,PCA enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " DFIREQ                        ,DFIREQ enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             DFIRSP                        ,DFIRSP enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " DFI2UBFI                      ,DFI2UBFI enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xD60++0x07
line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1"
bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO           ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed"
bitfld.long 0x00 24. "          L02RCVRY_TS_DET               ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE       ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed"
bitfld.long 0x00 22. "          L02RCVRY_8B10B_ERR            ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed"
bitfld.long 0x00 20. "          L02RCVRY_DL_RETRAIN           ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 19. " L02RCVRY_LPBK                 ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
bitfld.long 0x00 18. "          L02RCVRY_SPEEDCHANGE          ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE          ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed"
bitfld.long 0x00 16. "          L02RCVRY_LINK_RETRAIN         ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST   ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST   ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
bitfld.long 0x00 2.--5. "             CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
textline "                                    "
bitfld.long 0x00 1. " RX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             TX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2"
bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR      ,REPLA timer expired error" "No error,Error"
bitfld.long 0x04 30. "             SA_ERR                        ,SA error" "No error,Error"
textline "                                    "
bitfld.long 0x04 29. " DESKEW_ERR                    ,DESKEW error" "No error,Error"
bitfld.long 0x04 28. "             TRAINING_ERR                  ,Training error" "No error,Error"
textline "                                    "
bitfld.long 0x04 27. " DPLLP_CRC_ERR                 ,DPLLP CRC error" "No error,Error"
bitfld.long 0x04 26. "             8B10B_ERR                     ,8B10B error" "No error,Error"
textline "                                    "
bitfld.long 0x04 25. " REPLAY_STARTED_ERR            ,REPLAY started error" "No error,Error"
bitfld.long 0x04 24. "             ROLLOVER_ERR                  ,ROLLOVER error" "No error,Error"
textline "                                    "
bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR             ,PWH update FC error" "No error,Error"
bitfld.long 0x04 22. "             PWH_TOO_MANY_CREDITS_ERR      ,PWH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR             ,PWD update FC error" "No error,Error"
bitfld.long 0x04 20. "             PWD_TOO_MANY_CREDITS_ERR      ,PWD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR             ,NPH update FC error" "No error,Error"
bitfld.long 0x04 18. "             NPH_TOO_MANY_CREDITS_ERR      ,NPH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR             ,NPD update FC error" "No error,Error"
bitfld.long 0x04 16. "             NPD_TOO_MANY_CREDITS_ERR      ,NPD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 15. " CH_UPDATE_FC_ERR              ,CH update FC error" "No error,Error"
bitfld.long 0x04 14. "             CH_TOO_MANY_CREDITS_ERR       ,CH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 13. " CD_UPDATE_FC_ERR              ,CD update FC error" "No error,Error"
bitfld.long 0x04 12. "             CD_TOO_MANY_CREDITS_ERR       ,CD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR       ,REC overflow ISOPW data error" "No error,Error"
bitfld.long 0x04 10. "             REC_OVFL_ISOPW_HDR_ERR        ,REC overflow ISOPW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR        ,REC overflow ISONP HDR error" "No error,Error"
bitfld.long 0x04 8. "             REC_OVFL_CPL_DATA_ERR         ,REC overflow CPL data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR          ,REC overflow PW data error" "No error,Error"
bitfld.long 0x04 6. "             REC_OVFL_NP_DATA_ERR          ,REC overflow NP data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR          ,REC overflow CPL HDR error" "No error,Error"
bitfld.long 0x04 4. "             REC_OVFL_PW_HDR_ERR           ,REC overflow PW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR           ,REC_OVFL_NP_HDR_ERR error" "No error,Error"
bitfld.long 0x04 2. "             FRAMING_ERR                   ,Framing error" "No error,Error"
textline "                                    "
bitfld.long 0x04 1. " SEQ_ERR                       ,SEQ error" "No error,Error"
bitfld.long 0x04 0. "             LCRC_ERR                      ,LCRC error" "No error,Error"
rgroup.long 0xD68++0x03
line.long 0x00 "XP_DEBUG,XP Debug"
bitfld.long 0x00 0.--1. " RX_CAL_STATUS                 ,Receiver CAL status" "Idle,Pending,Done,Disabled"
endif
tree.end
tree "Vendor-Defined Registers"
width 20.
group.long 0xE00++0x2B
line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit"
hexmask.long.byte 0x00 16.--23. 1. " CPL                       ,Completion header buffer size"
hexmask.long.byte 0x00 8.--15. 1. "        PW                      ,Posted write header buffer size"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " NP                        ,Non-posted header buffer size"
line.long 0x04 "RX_DATA_LIMIT,RX Data Limit"
hexmask.long.byte 0x04 20.--27. 1. " CPL                       ,Completion data buffer size"
hexmask.long.word 0x04 8.--19. 1. "        PW                      ,Posted write data buffer size"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " NP                        ,Non-posted write header buffer size"
line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x08 24.--31. 1. " NPT                       ,TX HDR limit NPT"
textline "                             "
hexmask.long.byte 0x08 16.--23. 1. " CPL                       ,Size of the downstream completions header buffer"
else
hexmask.long.byte 0x08 16.--23. 1. " NP                        ,Size of the downstream non posted header buffer"
endif
hexmask.long.byte 0x08 8.--15. 1. "        PW                      ,Size of the downstream posted writes header buffer"
textline "                             "
hexmask.long.byte 0x08 0.--7. 1. " NP                        ,Size of the downstream non posted header buffer"
line.long 0x0C "TX_DATA_LIMIT,TX Data Limit"
hexmask.long.byte 0x0C 8.--15. 1. " PW                        ,Size of the downstream Posted Writes Data Buffer"
hexmask.long.byte 0x0C 0.--7. 1. "        NP                      ,Size of the downstream Non Posted Data Buffer"
line.long 0x10 "UFPCI,Upstream FPCI Control Register"
bitfld.long 0x10 23.--27. " ISO_WEIGHT                ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 22. "        ISO_CONTROL_ENABLE      ,ISO control enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x10 21. " ISOPW2HPISO               ,Convert posted writes" "Disabled,Enabled"
bitfld.long 0x10 20. "  ISONP2HPISO             ,Convert non-posted reads" "Disabled,Enabled"
textline "                             "
hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD           ,Timers are reset when they hit the value"
bitfld.long 0x10 10.--11. "        WRR_GRANT_BURST         ,Time for arbitration within a TMS" "0,1,2,3"
textline "                             "
bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 0.--4. "        PW_STARV_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "MISC0,Miscellaneous Register 0"
bitfld.long 0x14 31. " SHORT_RXL_TIMER           ,Completion timeout feature in RXL test" "Disabled,Enabled"
bitfld.long 0x14 30. "  P2P_SMALL_ISA_HOLE      ,P2P settings control" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 29. " P2P_F                     ,Transactions (64'hF_XXXX)" "0,1"
bitfld.long 0x14 28. "         P2P_E                   ,Transactions (64'hE_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 27. " P2P_D                     ,Transactions (64'hD_XXXX)" "0,1"
bitfld.long 0x14 26. "         P2P_C                   ,Transactions (64'hC_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 25. " P2P_B                     ,Transactions (64'hB_XXXX)" "0,1"
bitfld.long 0x14 24. "         P2P_A                   ,Transactions (64'hA_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 23. " NISONC2HPISO              ,Upgrade to HPISO Read" "Disabled,Enabled"
bitfld.long 0x14 21. "  AUTO_XCLK_FREQ_EN       ,XCLK frequency dynamic switch" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 20. " RXL_CLEAR_DROP            ,Receiver DROP ALL status clear" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x14 4.--19. 1. "  ISO_PW_ENABLE[1]        ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP"
endif
textline "                             "
bitfld.long 0x14 3. " ISO_PW_ENABLE             ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 2. " ISO_NP_ENABLE             ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
bitfld.long 0x14 1. "  NATIVE_P2P_ENABLE       ,Enables native peer2peer transactions" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 0. " ENABLE_CLUMPING           ,Enables unitid clumping" "Disabled,Enabled"
line.long 0x18 "TXBA0,TXBA0 Register"
hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY       ,Replay timer expiry"
bitfld.long 0x18 12. "      USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW      ,Merge completions upto 64DW payloads" "Disabled,Enabled"
bitfld.long 0x18 10. "  CMPL_MERGE_UPTO_32DW    ,Merge completions upto 32DW payloads" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 9. " CMPL_MERGE_DISABLE        ,Disables completion merging" "No,Yes"
hexmask.long.word 0x18 0.--8. 1. "       REPLAY_BUF_LIMIT        ,Replay buffer limit"
line.long 0x1C "TXBA1,TXBA1 Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD           ,Merge threshold"
else
hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD           ,Merge threshold"
textfld "  "
endif
bitfld.long 0x1C 4.--7. "      CM_OVER_PW_BURST        ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
sif (cpuis("TEGRAX2"))
bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register"
hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH          ,NPD UNRET THRESH"
hexmask.long.byte 0x20 16.--23. 1. "        NPH_UNRET_THRESH        ,NPH UNRET THRESH"
textline "                             "
hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH          ,PWD UNRET THRESH"
hexmask.long.byte 0x20 0.--7. 1. "        PWH_UNRET_THRESH        ,PWH UNRET THRESH"
line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register"
hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2          ,Time to wait for pads to change speed from Gen1 to Gen2"
hexmask.long.word 0x24 8.--23. 1. "        PAD_PWRUP_CM            ,Time to power up pads (no common-mode voltage during power down)"
textline "                             "
hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP                 ,Time to power up pads (common-mode voltage during power down)"
line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register"
hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
hexmask.long.byte 0x28 16.--23. 1. "        RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
textline "                             "
hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1          ,Wait time for pads to change speed from Gen2 to Gen1"
rgroup.long 0xE34++0x03
line.long 0x00 "PRBS,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " LOCKED                    ,Locks lanes onto the incoming PRBS pattern"
hexmask.long.word 0x00 0.--15. 1. "      ERR_COUNT_OVERFLOW      ,Number of bit mismatches during PRBS run"
group.long 0xE38++0x03
line.long 0x00 "PRBS_ERR,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " COUNT                     ,Number of bit errors detected in the incoming PRBS stream"
bitfld.long 0x00 0.--3. "      SELECT                  ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "   "
width 22.
group.long 0xE3C++0x27
line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0"
hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED                       ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x00 0.--15. 1. "             L0_LPBK                                  ,Infer E-Idle after this amount of time while in L0 or loopback"
line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1"
hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2                        ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x04 0.--15. 1. "             UNSUC_SPEED_GEN1                         ,Infer E-Idle after this amount of time while in recovery"
line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register"
eventfld.long 0x08 31. " LINKFSM[31]                             ,LINKFSM31" "Init,Clear"
eventfld.long 0x08 30. "            [30]                                     ,LINKFSM30" "Init,Clear"
textline "                               "
eventfld.long 0x08 29. "        [29]                             ,LINKFSM29" "Init,Clear"
eventfld.long 0x08 28. "            [28]                                     ,LINKFSM28" "Init,Clear"
textline "                               "
eventfld.long 0x08 27. "        [27]                             ,LINKFSM27" "Init,Clear"
eventfld.long 0x08 26. "            [26]                                     ,LINKFSM26" "Init,Clear"
textline "                               "
eventfld.long 0x08 25. "        [25]                             ,LINKFSM25" "Init,Clear"
eventfld.long 0x08 24. "            [24]                                     ,LINKFSM24" "Init,Clear"
textline "                               "
eventfld.long 0x08 23. "        [23]                             ,LINKFSM23" "Init,Clear"
eventfld.long 0x08 22. "            [22]                                     ,LINKFSM22" "Init,Clear"
textline "                               "
eventfld.long 0x08 21. "        [21]                             ,LINKFSM21" "Init,Clear"
eventfld.long 0x08 20. "            [20]                                     ,LINKFSM20" "Init,Clear"
textline "                               "
eventfld.long 0x08 19. "        [19]                             ,LINKFSM19" "Init,Clear"
eventfld.long 0x08 18. "            [18]                                     ,LINKFSM18" "Init,Clear"
textline "                               "
eventfld.long 0x08 17. "        [17]                             ,LINKFSM17" "Init,Clear"
eventfld.long 0x08 16. "            [16]                                     ,LINKFSM16" "Init,Clear"
textline "                               "
eventfld.long 0x08 15. "        [15]                             ,LINKFSM15" "Init,Clear"
eventfld.long 0x08 14. "            [14]                                     ,LINKFSM14" "Init,Clear"
textline "                               "
eventfld.long 0x08 13. "        [13]                             ,LINKFSM13" "Init,Clear"
eventfld.long 0x08 12. "            [12]                                     ,LINKFSM12" "Init,Clear"
textline "                               "
eventfld.long 0x08 11. "        [11]                             ,LINKFSM11" "Init,Clear"
eventfld.long 0x08 10. "            [10]                                     ,LINKFSM10" "Init,Clear"
textline "                               "
eventfld.long 0x08 9. "        [9]                              ,LINKFSM9" "Init,Clear"
eventfld.long 0x08 8. "            [8]                                      ,LINKFSM8" "Init,Clear"
textline "                               "
eventfld.long 0x08 7. "        [7]                              ,LINKFSM7" "Init,Clear"
eventfld.long 0x08 6. "            [6]                                      ,LINKFSM6" "Init,Clear"
textline "                               "
eventfld.long 0x08 5. "        [5]                              ,LINKFSM5" "Init,Clear"
eventfld.long 0x08 4. "            [4]                                      ,LINKFSM4" "Init,Clear"
textline "                               "
eventfld.long 0x08 3. "        [3]                              ,LINKFSM3" "Init,Clear"
eventfld.long 0x08 2. "            [2]                                      ,LINKFSM2" "Init,Clear"
textline "                               "
eventfld.long 0x08 1. "        [1]                              ,LINKFSM1" "Init,Clear"
eventfld.long 0x08 0. "            [0]                                      ,LINKFSM0" "Init,Clear"
line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register"
eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR                ,Replay timer expired error" "No error,Error"
eventfld.long 0x0C 30. "         SA_ERR                                   ,SA error" "No error,Error"
textline "                               "
eventfld.long 0x0C 29. " DESKEW_ERR                              ,DESKEW error" "No error,Error"
eventfld.long 0x0C 28. "         TRAINING_ERR                             ,Training error" "No error,Error"
textline "                               "
eventfld.long 0x0C 27. " DLLP_CRC_ERR                            ,DLLP CRC error" "No error,Error"
eventfld.long 0x0C 26. "         8B10B_ERR                                ,8B10B error" "No error,Error"
textline "                               "
eventfld.long 0x0C 25. " REPLAY_STARTED_ERR                      ,Replay started error" "No error,Error"
eventfld.long 0x0C 24. "         REPLAY_ROLLOVER_ERR                      ,Replay rollover error" "No error,Error"
textline "                               "
eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR                       ,PWH update FC error" "No error,Error"
eventfld.long 0x0C 22. "         PWH_TOO_MANY_CREDITS_ERR                 ,PWH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR                       ,PWD update FC error" "No error,Error"
eventfld.long 0x0C 20. "         PWD_TOO_MANY_CREDITS_ERR                 ,PWD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR                       ,NPH update FC error" "No error,Error"
eventfld.long 0x0C 18. "         NPH_TOO_MANY_CREDITS_ERR                 ,NPH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR                       ,NPD update FC error" "No error,Error"
eventfld.long 0x0C 16. "         NPD_TOO_MANY_CREDITS_ERR                 ,NPD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR                        ,CH update FC error" "No error,Error"
eventfld.long 0x0C 14. "         CH_TOO_MANY_CREDITS_ERR                  ,CH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR                        ,CD update FC error" "No error,Error"
eventfld.long 0x0C 12. "         CD_TOO_MANY_CREDITS_ERR                  ,CD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR                 ,REC overflow ISOPW data error" "No error,Error"
eventfld.long 0x0C 10. "         REC_OVFL_ISOPW_HDR_ERR                   ,REC overflow ISOPW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR                  ,REC overflow ISONP HDR error" "No error,Error"
eventfld.long 0x0C 8. "         REC_OVFL_CPL_DATA_ERR                    ,REC overflow CPL data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR                    ,REC overflow PW data error" "No error,Error"
eventfld.long 0x0C 6. "         REC_OVFL_NP_DATA_ERR                     ,REC overflow NP data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR                    ,REC overflow CPL HDR error" "No error,Error"
eventfld.long 0x0C 4. "         REC_OVFL_PW_HDR_ERR                      ,REC overflow PW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR                     ,REC overflow NP HDR error" "No error,Error"
eventfld.long 0x0C 2. "         FRAMING_ERR                              ,Framing error" "No error,Error"
textline "                               "
eventfld.long 0x0C 1. " SEQ_ERR                                 ,SEQ error" "No error,Error"
eventfld.long 0x0C 0. "         LCRC_ERR                                 ,LCRC error" "No error,Error"
line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register"
bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN             ,Replay timer expired error enable" "Disabled,Enabled"
bitfld.long 0x10 30. "         SA_ERR_EN                                ,SA error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 27. " DLLP_CRC_ERR_EN                         ,DLLP CRC error enable" "Disabled,Enabled"
bitfld.long 0x10 26. "         8B10B_ERR_EN                             ,8B10B error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN                  ,Replay rollover error enable" "Disabled,Enabled"
bitfld.long 0x10 23. "         PWH_UPDATE_FC_ERR_EN                     ,PWH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 21. "         PWD_UPDATE_FC_ERR_EN                     ,PWD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 19. "         NPH_UPDATE_FC_ERR_EN                     ,NPH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN             ,NPH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 17. "         NPD_UPDATE_FC_ERR_EN                     ,NPD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN             ,NPD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 15. "         CH_UPDATE_FC_ERR_EN                      ,CH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN              ,CH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 13. "         CD_UPDATE_FC_ERR_EN                      ,CD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN              ,CD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 11. "         DLL_PROTOCOL_ERR_EN                      ,DLL protocol error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 2. " FRAMING_ERR_EN                          ,Framing error enable" "Disabled,Enabled"
bitfld.long 0x10 1. "         SEQ_ERR_EN                               ,SEQ error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 0. " LCRC_ERR_EN                             ,LCRC error enable" "Disabled,Enabled"
line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register"
bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR                    ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 8.--10. "                TRIG_PTX_LTSSM_MINOR                     ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR                        ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 3. "               TRIG_ON_EVENT                            ,Trigger on event" "Not triggered,Triggered"
textline "                               "
bitfld.long 0x14 2. " CLEAR_RAM                               ,Clear RAM" "Not cleared,Cleared"
bitfld.long 0x14 1. "      WRAP_EN                                  ,Wrap enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x14 0. " STORE_EN                                ,Store enable" "Disabled,Enabled"
line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register"
rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR                         ,PRX LTSSM minor" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 16.--18. "                PTX_LTSSM_MINOR                          ,PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
rbitfld.long 0x18 12.--15. " LTSSM_MAJOR                             ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x18 11. "               READ_DATA_VALID                          ,Read data valid" "Invalid,Valid"
textline "                               "
bitfld.long 0x18 6.--10. " READ_ADDR                               ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x18 1.--5. "               WRITE_PTR                                ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
rbitfld.long 0x18 0. " RAM_FULL                                ,All entries in RAM has been written" "Not full,Full"
line.long 0x1C "PG,PCIe Power Gate Register"
bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN                 ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled"
eventfld.long 0x1C 1. "         RCVD_PME_TO_ACK                          ,Root port received a PME TO ACK TLP" "Init,Clear"
textline "                               "
bitfld.long 0x1C 0. " SEND_PME_TO_MSG                         ,Send a PME TO message downstream" "Idle,Send now"
line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0"
hexmask.long.word 0x20 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
hexmask.long.word 0x20 2.--15. 0x04 "             BASE                                     ,Base address for the variable range positive decode addresses"
textline "                               "
bitfld.long 0x20 0. " ENABLE                                  ,Enable" "Disabled,Enabled"
line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1"
hexmask.long.word 0x24 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
textline "                               "
hexmask.long.word 0x24 2.--15. 0x04 " BASE                                    ,Base address for the variable range positive decode addresses"
bitfld.long 0x24 0. "             ENABLE                                   ,Enable" "Disabled,Enabled"
sif (cpuis("TEGRAX1"))
group.long 0xE80++0x1F
line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "          T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C     ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3"
textline "                               "
bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C    ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3"
bitfld.long 0x00 12.--15. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C      ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C     ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C       ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C      ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3"
hexmask.long.word 0x04 0.--15. 1. "          T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C          ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xEA0++0x1B
line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2"
hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C          ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C"
hexmask.long.word 0x04 0.--15. 1. "             T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xF00++0x0B
line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)"
bitfld.long 0x00 31. " FORCE_COMPLIANCE                        ,Force compliance" "Disabled,Enabled"
rbitfld.long 0x00 30. "         DL_UP                                    ,Status of data link layer in XP" "Down,Up"
textline "                               "
bitfld.long 0x00 29. " INTERLEAVE_DLLPS                        ,Interleave DLLPS" "Disabled,Enabled"
bitfld.long 0x00 28. "         OPPORTUNISTIC_UPDATEFC                   ,DL will send any pending UpdateFC packet" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 27. " OPPORTUNISTIC_ACK                       ,DL will send pending Acks" "Disabled,Enabled"
bitfld.long 0x00 26. "         TRAIN_ERR_ENABLE                         ,Enables reporting of training errors" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD                     ,Override for the UpdateFC frequency"
hexmask.long.word 0x00 2.--17. 1. "               PRBS_STAT                                ,Results of loopback mode testing"
textline "                               "
bitfld.long 0x00 1. " PRBS_EN                                 ,Enables the root port as loopback master" "Disabled,Enabled"
sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x00 0. " EMULATION                               ,Enables emulation mode operation" "Disabled,Enabled"
endif
line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)"
bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY                         ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us"
bitfld.long 0x04 28. "       FORCE_DOWNSTREAM_NO_SNOOP                ,Force downstream no snoop" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH                   ,Force upstream non-coherent" "Disabled,Enabled"
bitfld.long 0x04 26. "         NP_REQ_TIMEOUT                           ,Disable downstream NP request timeout" "No,Yes"
textline "                               "
bitfld.long 0x04 23. " IGNORE_L0S                              ,Ignore L0S" "No,Yes"
bitfld.long 0x04 22. "              DONT_MERGE_PMASNAK                       ,Don't merge PMASNAK" "Merged,Not merged"
textline "                               "
bitfld.long 0x04 21. " L1_ASPM_SUPPORT                         ,Link capability register L1 ASPM support" "Not supported,Supported"
bitfld.long 0x04 20. "    L23_READY_NO_D3                          ,L23 ready no D3" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 19. " ACK_L1_NO_WAIT                          ,ACK L1 no wait" "Disabled,Enabled"
hexmask.long.word 0x04 10.--18. 1. "         ACK_TIMER_LIMIT                          ,Overrides the Ack timer limit for this root port"
textline "                               "
bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES         ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled"
rbitfld.long 0x04 7. "         RNCTRL_EN                                ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 6. " GEN2_LINK_UPGRADE                       ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "         RNCTRL_MAXWIDTH                          ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)"
hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE                         ,L0S update wake"
hexmask.long.word 0x08 8.--17. 1. "               L0S_THRESHOLD                            ,Controls the idle time required for TxL0s entry from L0"
textline "                               "
hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE                            ,L0S ACK wake"
sif (cpuis("TEGRAX1"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI                            ,N100MS_DFPCI"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,MICROSECOND"
elif (cpuis("TEGRAX2"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)"
hexmask.long.word 0x00 20.--31. 1. "  100MS_DFPCI                            ,Number of Dfpci_clk clocks in a given 100ms interval"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,Various timers required by PCI-express specification"
group.long 0xF14++0x07
line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)"
bitfld.long 0x00 29.--31. " ISO2TC_MAP                              ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7"
line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT"
hexmask.long.word 0x04 4.--15. 1. " PERIOD                                  ,Defines period (in microseconds) for the purpose of throttling"
bitfld.long 0x04 1.--3. "             DUTY_CYCLE                               ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x04 0. " ENABLE                                  ,Enables throttling of PCIe traffic" "Disabled,Enabled"
else
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT                         ,VEND_XV_TIMEOUT"
endif
group.long 0xF20++0x03
line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 18. "             NO_CMD_COMPLETED_SUPPORT                 ,No CMD completed support" "Not supported,Supported"
textline "                               "
bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT           ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "      SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
bitfld.long 0x00 6. "               HOT_PLUG_CAPABLE                         ,Supporting hot-plug operations" "Not capable,Capable"
textline "                               "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                       ,Hot-plug surprise" "Disabled,Enabled"
bitfld.long 0x00 4. "         POWER_INDICATOR_PRESENT                  ,Power indicator" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT             ,Attention Indicator" "Not implemented,Implemented"
bitfld.long 0x00 2. "  MRL_SENSOR_PRESENT                       ,MRL Sensor" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT                ,Power Controller" "Not implemented,Implemented"
bitfld.long 0x00 0. "  ATTENTION_BUTTON_PRESENT                 ,Attention Button" "Not implemented,Implemented"
else
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 15.--16. "             SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
endif
sif (cpuis("TEGRAX1"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,ADVANCE_BY_2_CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK_SCHEDULE_CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2_READ_FIX_EN" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,MICROSECOND_ENABLE" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,MICROSECOND_LIMIT"
elif (cpuis("TEGRAX2"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,RP XP Reference Register"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,Advanced by 2 CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK schedule CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK NPT empty CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2 read fix enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,Microsecond enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,Counter value to be used to reset the one microsecond counter used for update FC scheduling"
group.long 0xF44++0x03
line.long 0x00 "VEND_CYA0,Vendor CYA0 Register"
bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE                    ,Force retry possible" "No,Yes"
bitfld.long 0x00 29. "              UP_NC2C                                  ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 28. " DROP_VDM_TYPE1                          ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled"
bitfld.long 0x00 27. "         DROP_NV_VDM_TYPE1                        ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL                   ,Credits for the VDM packet dropped release enable" "Disabled,Enabled"
bitfld.long 0x00 25. "         LTR_EN                                   ,Hide LTR capability enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 24. " ALLOW_ALL_DS_RO                         ,Allow all DS RO" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "         NATIVE_P2P_STARVE_COUNT                  ,Native P2P starve count"
textline "                               "
bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH                   ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "               FINISH_PKT_ON_RCVRY_EN                   ,Finish packet on recovery enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE                     ,UR PW drop all mode" "No,Yes"
bitfld.long 0x00 9. "              DROP_ALL_MODE                            ,Drop all mode" "No,Yes"
textline "                               "
bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE                        ,Max payload size" "INIT,,,,,4KB,,Auto"
bitfld.long 0x00 5. "             ADR64                                    ,64-bit addressing mode" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " IGNORE_BME                              ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored"
bitfld.long 0x00 3. "      UFPCI_BLOCK_B2B_NP                       ,UFPCI block back-to-back NP" "No,Yes"
textline "                               "
bitfld.long 0x00 2. " GPU_NISONC2HPISO                        ,GPU NISONC2HPISO" "Disabled,Enabled"
bitfld.long 0x00 1. "         PASSPW_RO                                ,PASSPW RO" "No,Yes"
textline "                               "
bitfld.long 0x00 0. " REL_CREDIT_UR_PW                        ,Credits for the ur_pw received release" "No,Yes"
else
group.long 0xF34++0x0F
line.long 0x00 "ECTL_2_R1,ECTL_2_R1"
hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.byte 0x00 8.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
textline "                               "
hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C                             ,CDR_CNTL_1C"
line.long 0x04 "ECTL_3_R1,ECTL_3_R1"
bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C                          ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--4. "               TX_PEAK_1C                               ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "ECTL_2_R2,ECTL_2_R2"
hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.word 0x08 0.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
line.long 0x0C "ECTL_3_R2,ECTL_3_R2"
bitfld.long 0x0C 24.--27. " PRE_SEL1_1C                             ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16.--20. "               SEL1_1C                                  ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
bitfld.long 0x0C 8.--11. " PRE_SEL0_1C                             ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--4. "               SEL0_1C                                  ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xF48++0x07
line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)"
bitfld.long 0x00 21. " POLLING_RESET_FIX_EN                    ,Polling reset fix enable" "Disabled,Enabled"
bitfld.long 0x00 20. "         HOTPLUG_IN_TRAFFIC_EN                    ,Hotplug in traffic enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " NISO2ISO                                ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled"
bitfld.long 0x00 18. "         ALLOW_UPSTREAM_CMPL_OVERTAKE_PW          ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH                     ,Split ARB block coherent" "Disabled,Enabled"
bitfld.long 0x00 16. "         HIDE_MSIMAP                              ,Hide MSIMAP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " LINKACTV_REPORTING                      ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "         P2P_ISO2NIS                              ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 13. " ERPT                                    ,ERPT" "Disabled,Enabled"
bitfld.long 0x00 12. "         HIDE_MSI_CAP                             ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " ACCEPT_MSGD1                            ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "         TC2ISO_MAP                               ,TC2ISO MAP" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY                      ,P2P block P2P only" "Disabled,Enabled"
line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)"
bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE           ,Goto detect on surprise EIDLE" "Disabled,Enabled"
bitfld.long 0x04 29. "         ENABLE_SERR_REPORTING                    ,Enable SERR reporting" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE              ,Goto L1 L2 after DLLP done" "Disabled,Enabled"
bitfld.long 0x04 27. "         CTRL_IGNORE_LPBK_EXIT                    ,Control ignore LPBK exit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY                   ,Control relax LPBK entry" "Disabled,Enabled"
bitfld.long 0x04 25. "         CTRL_FORCE_PRBS_RST                      ,Control force PRBS reset" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN          ,Force Deemphasis advertised enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 23. " POWER_UP_BYPASS                         ,Power up bypass" "No bypass,Bypass"
endif
textline "                               "
bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN            ,Force reciver compliance enable" "Disabled,Enabled"
bitfld.long 0x04 21. "         FORCE_COMPLIANCE_GEN2_SPEED_EN           ,Force compliance GEN2 speed enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE     ,Force compliance and advertise mode" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE  ,Preserve TX packet during speed change" "Not preserved,Preserved"
bitfld.long 0x04 18. "    GEN2_EXIT_USE_STAT_IDLE                  ,GEN2 exit use status idle" "Not idle,Idle"
textline "                               "
bitfld.long 0x04 17. " GEN2_LOOPBACK                           ,GEN2 loopback" "0,1"
bitfld.long 0x04 16. "                SA_EXTRA_RESET_EN_RANGE                  ,SA extra reset enable range" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE                      ,Control TX PTRN range"
bitfld.long 0x04 4.--5. "             TEST_MODE_RANGE                          ,Test mode range" "0,1,2,3"
textline "                               "
bitfld.long 0x04 3. " NOSCRAMBLE_RANGE                        ,No scramble range" "0,1"
bitfld.long 0x04 2. "                EIDLE_DATA_RANGE                         ,EIDLE data range" "0,1"
textline "                               "
bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE                    ,EIDLE override range" "0,1"
bitfld.long 0x04 0. "                RDET_BYPASS_RANGE                        ,RDET bypass range" "0,1"
endif
textline "                               "
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
width 22.
group.long 0xF50++0x03
line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)"
bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ  ,Idle mode L1 clock request" "0,1"
bitfld.long 0x00 30. "         IDLE_MODE_DYNAMIC         ,Idle mode dynamic" "0,1"
textline "                               "
bitfld.long 0x00 29. " IDLE_MODE_L1         ,Idle mode L1" "0,1"
bitfld.long 0x00 28. "         XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x00 18.--27. 1. " MICROSECOND          ,Various timers required by PCI-express specification"
bitfld.long 0x00 16.--17. "      SLEEP_MODE_L1_CLKREQ      ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 15. " L1_CLKREQ            ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 8.--14. 1. " MINIMUM              ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again"
textline "                               "
bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC   ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 3.--4. " SLEEP_MODE_L1        ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 2. " DISABLED             ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 1. " DYNAMIC              ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 0. " L1                   ,Enable analog pads to power down when in L1 state" "Disabled,Enabled"
endif
textline "     "
width 22.
group.long 0xF54++0x07
line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)"
hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START      ,TS detect start"
hexmask.long.byte 0x00 16.--23. 1. "        FTS_DETECT_START          ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE         ,N_FTS value advertised by the remote device"
hexmask.long.byte 0x00 0.--7. 1. "        N_FTS                     ,N_FTS value that we advertise to the device on the other side of the link"
line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0"
bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 24. "       FAILED_L0S_EXITS_LC       ,Failed L0S exits LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 20. " NAKS_RCVD_INF        ,NAKs received counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 16. "       NAKS_RCVD_LC              ,NAKS received LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 12. " CRC_ERRORS_INF       ,CRC error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 8. "       CRC_ERRORS_LC             ,Current value from the CRC error counter" "No effect,Clear"
textline "                               "
bitfld.long 0x04 4. " 8B10B_ERRORS_INF     ,8b/10b error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 0. "       8B10B_ERRORS_LC           ,Current value from the 8b/10b error counter" "No effect,Clear"
rgroup.long 0xF5C++0x07
line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS     ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
hexmask.long.byte 0x00 16.--23. 1. "        NAKS_RCVD                 ,Counts the number of NAKs received from the endpoint in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS           ,Counts the number of CRC errors detected in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        8B10B_ERRORS              ,Counts the number of 8b/10b errors detected in one microsecond"
else
hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS         ,Counts the number of 8b/10b errors detected in one microsecond"
hexmask.long.byte 0x00 16.--23. 1. "        CRC_ERRORS                ,Counts the number of CRC errors detected in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD            ,Counts the number of NAKs received from the endpoint in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        FAILED_L0S_EXITS          ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
endif
line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register"
hexmask.long.byte 0x04 16.--23. 1. " REPLAY               ,Counts number of times TXBA replays"
hexmask.long.byte 0x04 8.--15. 1. "        BAD_TLP                   ,Counts bad tlps reported by RXL"
textline "                               "
hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR             ,Counts LCRCL Errors reported by RXL"
textline "                               "
width 28.
group.long 0xF64++0x0B
line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)"
hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE                  ,Mute idle"
line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)"
bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE         ,8B10B feature enable" "Disabled,Enabled"
hexmask.long.word 0x04 20.--30. 1. "     8B10B_ERROR_WINDOW          ,CPrograms the time frame in multiples of 1 microsecond"
textline "                                     "
hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD      ,Programs the 8b10b error threshold"
line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)"
rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE        ,Gen2 link width up-configure capability" "Not capable,Capable"
bitfld.long 0x08 30. "  REV2P0_COMPLIANCE_DIS       ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 29. " EIDLE_INFERENCE_EN         ,Disable electrical idle inference" "No,Yes"
bitfld.long 0x08 28. "          SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     RECOVERY_SPEED_TIMEOUT_ADJ  ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS              ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 19. "           DEEMPHASIS_STRAP            ,DEEMPHASIS_STRAP" "-6db,-3.5db"
textline "                                     "
bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS         ,Forces root port to use de-emphasis value" "Disabled,Enabled"
bitfld.long 0x08 17. "     POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 16. " AUTONOMOUS_CHANGE          ,Autonomous change" "No,Yes"
rbitfld.long 0x08 12.--15. "          DATA_RATE_SUPPORTED_REMOTE  ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED        ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "           TARGET_LINK_SPEED           ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE         ,TX_MARGIN_OVERRIDE" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 2. "     CYA_DEEMPHASIS_OVERRIDE     ,CYA deemphasis override" "No override,Override"
endif
bitfld.long 0x08 1. "     ADVERTISED_RATE_CHANGE      ,ADVERTISED_RATE_CHANGE" "No effect,Change"
textline "                                     "
bitfld.long 0x08 0. " SPEED_CHANGE               ,Link speed negotiation procedure" "No effect,Change"
group.long 0xF74++0x03
line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup"
hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD       ,Time to hold CDR at reset in Recovery"
sif (cpuis("TEGRAX2"))
group.long 0xF78++0x03
line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown"
hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND                ,Number of xclks in 1 microsecond when running at gen2 speed"
endif
group.long 0xF84++0x03
line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery"
textline "                                     "
width 30.
sif (cpuis("TEGRAX2"))
rgroup.long 0xF88++0x07
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR"
line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side"
rgroup.long 0xF94++0x0B
line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read"
line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery"
line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery"
bitfld.long 0x08 8. " REASON                          ,Reason" "All,Error"
textline "                                       "
hexmask.long.byte 0x08 0.--7. 1. " VALUE                           ,Value"
else
rgroup.long 0xF88++0x13
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR"
line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side"
line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side"
line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read"
line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery"
group.long 0xF9C++0x03
line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery"
bitfld.long 0x00 8. " REASON                          ,REASON" "All,Error"
textline "                                       "
hexmask.long.byte 0x00 0.--7. 1. " VALUE                           ,VALUE"
endif
rgroup.long 0xFA0++0x07
line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1"
line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only"
group.long 0xFA8++0x07
line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)"
bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY             ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8"
textline "                                       "
bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG     ,Ignore upstream attention button" "Not ignored,Ignored"
textline "                                       "
bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS         ,Unblock up transaction" "Blocked,Unblocked"
textline "                                       "
bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR    ,Block all upstream transaction after an error" "Enabled,Disabled"
textline "                                       "
bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS       ,HW auto width disable disable" "False,True"
textline "                                       "
bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS        ,BW management INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS       ,Auto bandwidth INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS              ,Auto bandwidth disable" "False,True"
textline "                                       "
bitfld.long 0x00 16. " BW_MANAGEMENT_DIS               ,BW management disable" "False,True"
textline "                                       "
bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP       ,Shadow link BW notify capable" "Disabled,Enabled"
textline "                                       "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
else
rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
endif
textline "                                       "
bitfld.long 0x00 11. " SLOT_IMPLEMENTED                ,Slot implemented" "Not implemented,Implemented"
textline "                                       "
eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME             ,Error STS hotplug PME" "No error,Error"
textline "                                       "
eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI             ,Error STS hotplug NMI" "No error,Error"
textline "                                       "
bitfld.long 0x00 7. " PCA_ENABLE                      ,Enable/disable the PCA in any TMS" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " GEN2_SPEED_DISABLE              ,Gen 2 protocol speed disable" "No,Yes"
textline "                                       "
bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE           ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes"
textline "                                       "
bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit"
textline "                                       "
bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE              ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes"
line.long 0x04 "PRIV_XP_CONFIG,Private XP Config"
bitfld.long 0x04 0.--1. " LOW_PWR_DURATION                ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle"
textline "                                            "
width 35.
rgroup.long 0xFB0++0x03
line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
textline "                                            "
sif (cpuis("TEGRAX2"))
rgroup.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
else
group.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
endif
textline "                              "
group.long 0xFB8++0x03
line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B      ,UI window for electrical idle exit not detected in the Recover"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. "   TIMEOUT_A      ,UI window for COM not detected in the Recovery"
textline "                              "
width 25.
sif (cpuis("TEGRAX2"))
group.long 0xFBC++0x03
line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register"
hexmask.long.word 0x00 16.--31. 1. " COMMAND                                             ,Command"
hexmask.long.byte 0x00 8.--15. 1. "         STATE         ,State"
textline "                                  "
eventfld.long 0x00 7. " STATE_CHANGE7                                       ,State change 7" "Not changed,Changed"
eventfld.long 0x00 6. "  STATE_CHANGE6 ,State change 6" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 5. " STATE_CHANGE5                                       ,State change 5" "Not changed,Changed"
eventfld.long 0x00 4. "  STATE_CHANGE4 ,State change 4" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 3. " STATE_CHANGE3                                       ,State change 3" "Not changed,Changed"
eventfld.long 0x00 2. "  STATE_CHANGE2 ,State change 2" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 1. " STATE_CHANGE1                                       ,State change 1" "Not changed,Changed"
eventfld.long 0x00 0. "  STATE_CHANGE0 ,State change 0" "Not changed,Changed"
group.long 0xFC4++0x07
line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1"
bitfld.long 0x00 28.--31. " LANE_15                                             ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "           LANE_14       ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20.--23. " LANE_13                                             ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "           LANE_12       ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 12.--15. " LANE_11                                             ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "           LANE_10       ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 4.--7. " LANE_9                                              ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "           LANE_8        ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1"
hexmask.long.word 0x04 16.--31. 1. " SSID                                                ,SSID"
hexmask.long.word 0x04 0.--15. 1. "         SSVID         ,SSVID"
endif
sif (!cpuis("TEGRAX2"))
group.long 0xFC8++0x0B
line.long 0x00 "VEND_SHADOW,Shadow register of SS_1"
hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID                                           ,SS_1_SSID"
textline "                                  "
hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID                                          ,SS_1_SSVID"
line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x04 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 24.--29. " CODE3                                               ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 16.--21. " CODE2                                               ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 8.--13. " CODE1                                               ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 0.--5. " CODE0                                               ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..."
line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x08 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x08 24.--29. " CODE7                                               ,CODE7" "Mobile,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 16.--21. " CODE6                                               ,CODE6" "Init,,Mobile,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 8.--13. " CODE5                                               ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 0.--5. " CODE4                                               ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..."
endif
textline "                                  "
sif (cpuis("TEGRAK1"))
group.long 0xFD4++0x03
line.long 0x00 "ECTL_1_R1,ECTL_1_R1"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xFD8++0x03
line.long 0x00 "ECTL_1_R2,ECTL_1_R2"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xFDC++0x07
line.long 0x00 "TIMEOUT2,Timeout 2 Register"
bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME                                 ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "PRIV_MISC,Private Miscellaneous Register"
bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE                                ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD                                 ,Number of contiguous nbref_clks (25MHz) after clamping"
textline "                                  "
bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE                               ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD                            ,Number of contiguous nbref_clks (12MHz) after clamping"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x04 4. " USE_EXT_CLKREQ                                      ,Use EXT CLKREQ" "Not used,Used"
endif
textline "                                  "
bitfld.long 0x04 0.--3. " PRSNT_MAP                                           ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xFE4++0x03
line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register"
bitfld.long 0x00 31. " OVERRIDE_JTAG                                       ,Internal JTAG register override" "No override,Override"
textline "                                  "
bitfld.long 0x00 4.--7. " TX_CHAR_SPEED                                       ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..."
textline "                                  "
bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE                                    ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced"
textline "                                  "
bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT                                   ,Transition from E-idle to compliance pattern" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY                                  ,Transition from compliance pattern to E-idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " SHORT_LINK_TIMERS                                   ,Shortened timers in LINK" "Disabled,Enabled"
endif
group.long 0xFE8++0x03
line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register"
hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT                                      ,Specifies number of misaligned COM symbols"
group.long 0xFEC++0x03
line.long 0x00 "XP_CTL_1,Control Registers Used In XP"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP                        ,Initiated wake one TLP" "Disabled,Enabled"
textline "                                  "
endif
sif (cpuis("TEGRAX1"))
bitfld.long 0x00 29.--30. " SPARE                                               ,SPARE" "0,1,2,3"
textline "                                  "
else
bitfld.long 0x00 28.--30. " SPARE                                               ,Spare" "0,1,2,3,4,5,6,7"
textline "                                  "
endif
bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION                         ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 26. " NEW_IOBIST_CTRL                                     ,Enable control signals from iobist" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 25. " OLD_IOBIST_EN                                       ,When set will enable old iobist,else it will enable new iobist" "New,Old"
textline "                                  "
bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER                                 ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS                          ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes"
textline "                                  "
bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION                 ,LTSSM enable deskew in recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP                                 ,Bypass config powerup" "0,1"
textline "                                  "
bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR                              ,Reset TS control on error" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG                       ,RX EIDLE exit timer in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG                               ,Force reset in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL                               ,Link resize powerdown control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S                         ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN                    ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY                      ,Preserve TX packet on recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT                    ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed"
textline "                                  "
bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY                                    ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1                                ,LWLO HUNT on bad TS1" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG                                  ,Enables symbol alignment" "Disabled,Enabled"
group.long 0xFF0++0x0F
line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon"
hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS                                       ,Number of EIE symbols sent in L1 Beacon Entry/Exist state"
textline "                                  "
bitfld.long 0x00 1. " TX_BYP_CTRL                                         ,TX bypass control" "Only L0,All Lanes"
textline "                                  "
bitfld.long 0x00 0. " EN                                                  ,Enable" "Disabled,Enabled"
line.long 0x04 "TIMEOUT3,Timeout 3 Register"
hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME                                    ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state"
textline "                                  "
bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
sif cpuis("TEGRAX2")
bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS                      ,Loopback rate deemph check disable" "No,Yes"
textline "                                  "
endif
bitfld.long 0x08 23. " RX_CAL_EN                                           ,Hardware RX calibration in UPHY enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 22. " AUX_RX_IDLE_EN                                      ,RX idle enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN                             ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT                     ,Wait for lockdet during L1 exit" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT                        ,Holdoff counter limit for counter that was added in ECO 351987"
textline "                                  "
bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS                           ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK                             ,Relaxed unexpected completion" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE                           ,Loopback force nonscramble enable" "Disabled,Enabled"
textline "                                  "
endif
bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM               ,Config link start require PAD lane num" "0,1"
textline "                                  "
hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD                             ,Maximum amount of time spent in loopback"
line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)"
hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK                                  ,Each bit represent the corresponding logical lane"
tree.end
width 0x0B
tree.end
tree "PCIE2"
base ad:0x60000000
width 11.
tree "PCI Compatible Configuration Registers"
rgroup.long 0x00++0x03
line.long 0x00 "DEV_ID,Device ID And Vendor ID Register"
hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID          ,Identify the particular device"
hexmask.long.word 0x00 0.--15. 1. "             VENDOR_ID        ,Identify manufacturer of the device"
group.long 0x04++0x03
line.long 0x00 "DEV_CTRL,Command And Status Register"
eventfld.long 0x00 31. " DETECTED_PERR      ,Primary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x00 30. "       SIGNALED_SERR    ,ERR_FATAL or ERR_NONFATAL message from primary side device" "Not active,Active"
eventfld.long 0x00 29. "     RECEIVED_MASTER   ,Primary side requestor receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x00 28. " RECEIVED_TARGET    ,Primary side requestor receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 27. "      SIGNALED_TARGET  ,Primary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x00 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
rbitfld.long 0x00 20. " CAPLIST            ,Device configuration space includes a capabilities list" "Not present,Present"
rbitfld.long 0x00 19. "      INTR_STATUS      ,INTx interrupt message is pending internally to the device" "Not active,Active"
bitfld.long 0x00 10. "     INTR_DISABLE      ,Ability of the device to generate INTx interrupt messages" "No,Yes"
textline "                    "
bitfld.long 0x00 8. " SERR               ,SERR enable bit" "Disabled,Enabled"
bitfld.long 0x00 6. "         PERR             ,Parity Error Response bit" "Disabled,Enabled"
bitfld.long 0x00 2. "       BUS_MASTER        ,Ability of the root complex to issue memory and I/O read/write  requests" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 1. " MEMORY_SPACE       ,Respond to memory space accesses on the primary interface" "Disabled,Enabled"
bitfld.long 0x00 0. "         IO_SPACE         ,Respond to I/O space accesses on the primary interface" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "REV_CC,Revision ID And Class Code Registers"
hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE         ,Generic function of the device"
hexmask.long.byte 0x00 0.--7. 1. "           REVISION_ID      ,Device specific revision identifier"
group.long 0x0C++0x03
line.long 0x00 "MISC_1,MISC 1 Register"
rbitfld.long 0x00 23. " HEADER_TYPE1       ,Identifies a multi-function device" "Single function,Multi function"
hexmask.long.byte 0x00 16.--22. 1. "  HEADER_TYPE0     ,Specifies the layout of bytes 10h through 3Fh"
hexmask.long.byte 0x00 0.--7. 1. "             CACHE_LINE_SIZE   ,Cache line size"
group.long 0x18++0x1B
line.long 0x00 "BN_LT,Bus Number And Latency Timer Register"
hexmask.long.byte 0x00 16.--23. 1. " SUB_BUS_NUMBER     ,Subordinate bus number"
hexmask.long.byte 0x00 8.--15. 1. "               SEC_BUS_NUMBER   ,The secondary bus number"
hexmask.long.byte 0x00 0.--7. 1. "             PRI_BUS_NUMBER    ,The primary bus number"
line.long 0x04 "IO_BL_SS,I/O Base/Limit And Secondary Status Register"
eventfld.long 0x04 31. " DETECTED_PERR      ,Secondary side device receives a poisoned TLP" "Not active,Active"
eventfld.long 0x04 30. "       RECEIVED_SERR    ,Secondary side device receives an ERR_FATAL or ERR_NONFATAL message" "Not active,Active"
eventfld.long 0x04 29. "     RECEIVED_MASTER   ,Secondary side device receives a completion with unsupported request completion status" "Not aborted,Aborted"
textline "                    "
eventfld.long 0x04 28. " RECEIVED_TARGET    ,Secondary side device receives a completion with completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 27. "      SIGNALED_TARGET  ,Secondary side device completes a request using completer abort completion status" "Not aborted,Aborted"
eventfld.long 0x04 24. "    MASTER_DATA_PERR  ,Master data parity error bit" "Not active,Active"
textline "                    "
bitfld.long 0x04 12.--15. " IO_LIMIT           ,Corresponds to address bits AD[15:12] of the I/O limit" "0,256,512,,,,,,,,,,,,,64k"
rbitfld.long 0x04 8.--11. "              IO_LIMIT_SUPPORT ,Identifies the I/O addressing support" "16,32,?..."
bitfld.long 0x04 4.--7. "             IO_BASE           ,Corresponds to address bits AD[15:12] of the I/O base address" "0,256,512,,,,,,,,,,,,,64k"
textline "                    "
rbitfld.long 0x04 0.--3. " IO_BASE_SUPPORT    ,Identifies the I/O addressing support" "16,32,?..."
line.long 0x08 "MEM_BL,Memory Base And Memory Limit Register"
hexmask.long.word 0x08 20.--31. 0x10 " MEM_LIMIT          ,Corresponds to address bits AD[31:20] of the memory-mapped I/O limit"
hexmask.long.word 0x08 4.--15. 0x10 "             MEM_BASE         ,Corresponds to address bits AD[31:20] of the memory-mapped I/O base address"
line.long 0x0C "PRE_BL,Prefetchable Memory Base/Limit Register"
hexmask.long.word 0x0C 20.--31. 0x10 " PREFETCH_MEM_LIMIT ,Corresponds to address bits AD[31:20] of the prefetchable memory limit"
rbitfld.long 0x0C 16.--19. "             L64BIT           ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
hexmask.long.word 0x0C 4.--15. 0x10 "  PREFETCH_MEM_BASE ,corresponds to address bits AD[31:20] of the prefetchable memory base address"
textline "                    "
bitfld.long 0x0C 0.--3. " B64BIT             ,Identifies the prefetchable memory addressing support" "Not supported,Supported,?..."
line.long 0x10 "PRE_BU32,Prefetchable Memory Base Upper 32 Bits Register"
line.long 0x14 "PRE_LU32,Prefetchable Memory Limit Upper 32 Bits Register"
line.long 0x18 "IO_BL_U16,I/O Base/Limit Upper 16 Bits Register"
hexmask.long.word 0x18 16.--31. 1. " LIMIT_UPPER_BITS   ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O limit"
hexmask.long.word 0x18 0.--15. 1. "             BASE_UPPER_BITS  ,specifies the upper 16 bits,corresponding to AD[31:16],of the 32-bit I/O base address"
rgroup.long 0x34++0x07
line.long 0x00 "CAP_PTR,Capabilities Pointer"
hexmask.long.byte 0x00 0.--7. 0x01 " CAP_PTR_CAP_PTR    ,Offset into configuration space where the capabilities list begins"
group.long 0x3C++0x03
line.long 0x00 "INTR_BCR,Interrupt Bridge Control Registers"
bitfld.long 0x00 22. " SB_RESET           ,Triggers a hot reset on the corresponding PCI express port" "Disabled,Enabled"
bitfld.long 0x00 20. "         VGA_16BITIO      ,Full 16-bit decode of IO address range for VGA" "Disabled,Enabled"
bitfld.long 0x00 19. "       VGA_ADDRESS       ,P2P bridge will claim all of the legacy VGA addresses" "Disabled,Enabled"
textline "                    "
bitfld.long 0x00 18. " ISA_ADDRESS        ,Modifies the response by the bridge to ISA I/O addresses" "Disabled,Enabled"
bitfld.long 0x00 17. "         SERR_FORWARD     ,Forwarding of ERR_COR/ERR_NONFATAL and ERR_FATAL from secondary to primary" "Disabled,Enabled"
bitfld.long 0x00 16. "       PERR_RESP         ,Response to poisoned TLPs" "Disabled,Enabled"
textline "                    "
hexmask.long.byte 0x00 8.--15. 1. " INTR_PIN           ,Contains the interrupt pin the device (or device function) uses"
hexmask.long.byte 0x00 0.--7. 1. "               INTR_LINE        ,Contains the interrupt routing information"
tree.end
tree "PCI Subsystem ID And Subsystem Vendor ID Capability Registers"
width 6.
rgroup.long 0x40++0x07
line.long 0x00 "SS_0,Subsystem ID/Vendor ID Capability Register 0"
hexmask.long.byte 0x00 8.--15. 1. " NEXT_PTR        ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID         ,Detect the presence of the SSID/SSVID registers in a PCI-to-PCI bridge"
line.long 0x04 "SS_1,Subsystem ID/Vendor ID Capability Register 1"
hexmask.long.word 0x04 16.--31. 1. " SSID            ,Identifies the particular add-in card or subsystem"
hexmask.long.word 0x04 0.--15. 1. "           SSVID          ,Identifies the manufacturer of the add-in card or subsystem"
tree.end
tree "PCI Power Management Capability Structure Registers"
rgroup.long 0x48++0x03
line.long 0x00 "PM_0,Power Management Register 0"
bitfld.long 0x00 31. " D3_COLD_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 30. "  D3_HOT_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 29. "  D2_SUPPORT ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 28. "  D1_SUPPORT  ,Power states in which the function may assert PME?..." "Not supported,Supported"
textline "               "
bitfld.long 0x00 27. " D0_SUPPORT      ,Power states in which the function may assert PME?..." "Not supported,Supported"
bitfld.long 0x00 26. "  D2_SUPPORT     ,D2 power management state support" "Not supported,Supported"
bitfld.long 0x00 25. "  D1_SUPPORT ,D1 power management state support" "Not supported,Supported"
bitfld.long 0x00 22.--24. "  AUX_CURRENT ,3.3Vaux auxiliary current requirements for the PCI function" "0,55 mA,100 mA,160 mA,220 mA,270 mA,320 mA,375 mA"
textline "               "
bitfld.long 0x00 21. " DEV_SPEC_INIT   ,Device specific initialization bit" "Not needed,Needed"
bitfld.long 0x00 16.--18. "     PCIPM_REV      ,Revision of the PCI power management interface specification" ",,Rev 1.1,Rev 1.2,?..."
hexmask.long.byte 0x00 8.--15. 1. "        NEXT_PTR   ,Points to the next capabilities list item"
hexmask.long.byte 0x00 0.--7. 1. "             CAP_ID      ,Detect the presence of the power management capability registers in a PCI to PCI bridge"
group.long 0x4C++0x03
line.long 0x00 "PM_1,Power Management Register 1"
eventfld.long 0x00 15. " PME_STATUS      ,Assert the PME# signal independent of the state  of the PME_En bit" "Not active,Active"
bitfld.long 0x00 8. "     PME            ,Assert PME?..." "Disabled,Enabled"
bitfld.long 0x00 0.--1. "       PWR_STATE  ,Determine the current power state of a function and to set the function into a new power state" "D0,D1,D2,D3hot"
tree.end
tree "PCI MSI Capability Structure Registers"
width 16.
group.long 0x50++0x0F
line.long 0x00 "MSI_CTRL,MSI Control Registers"
rbitfld.long 0x00 23. " 64BIT_CAP     ,Capability of generating a 64-bit message address" "Not capable,Capable"
bitfld.long 0x00 20.--22. "   MULT_EN      ,Number of allocated messages" "0,2,4,8,?..."
rbitfld.long 0x00 17.--19. "         MULT_CAP ,Number of requested messages" "0,2,?..."
bitfld.long 0x00 16. "   CTRL_MSI ,Permission to use message signaled interrupt to request service" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "  NEXT_PTR ,Points to the next item in the capabilities list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID ,Detect the presence of the Message Signaled Interrupt Capability registers in a PCI-to-PCI bridge"
line.long 0x04 "MSI_LOW_ADDR,MSI Message Lower Address Register"
hexmask.long 0x04 2.--31. 0x04 " DWORD         ,Bits 31:2 of the address"
line.long 0x08 "MSI_UPPER_ADDR,MSI Message Upper Address Register"
line.long 0x0C "MSI_DATA,MSI Message Data Register"
hexmask.long.word 0x0C 0.--15. 1. " DATA          ,MSI message data"
tree.end
sif (cpuis("TEGRAX2"))
tree "PCI MSI Map Register"
group.long 0x60++0x0B
line.long 0x00 "MSI_MAP_0,MSI MAP Capability Register"
rbitfld.long 0x00 27.--31. " CAP_TYPE      ,Capability type for MSI Mapping Capability block" ",,,,,,,,,,,,,,,,,,,,,CAP_TYPE_MSI,?..."
bitfld.long 0x00 16. "  XLATE_ENABLE ,Global enable for MSI translation" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 0x01 "  CAP_PTR  ,Pointer to the next capability in the list"
hexmask.long.byte 0x00 0.--7. 1. "  CAP_ID   ,Capability ID for HyperTransport technology devices"
line.long 0x04 "MSI_MAP_1,MSI MAP Lower Address Register"
hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_LOWER ,Lower [31:0] bit address field"
line.long 0x08 "MSI_MAP_2,MSI MAP Upper Address Register"
tree.end
endif
tree "PCI Express Capability Structure Registers"
width 26.
rgroup.long 0x80++0x07
line.long 0x00 "PCI_EXPRESS_CAPABILITY,PCI Express Capability List Register"
bitfld.long 0x00 25.--29. " INTERRUPT_MESSAGE_NUMBER            ,PCI express capability interrupt message number " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                   "
bitfld.long 0x00 24. " SLOT_IMPLEMENTED                    ,PCI express capability slot implemented" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 20.--23. " DEVICE_PORT_TYPE                    ,PCI express capability device port type" "PCI express endpoint device,Legacy PCI express endpoint device,,,Root port of PCI express root complex,Upstream port of PCI express switch,Downstream port of PCI express switch,PCI express to PCI/PCI-X bridge,PCI/PCI-X to PCI express bridge,?..."
textline "                                   "
bitfld.long 0x00 16.--19. " VERSION                             ,PCI express capability version number" ",Version 1,Version 2,?..."
textline "                                   "
hexmask.long.byte 0x00 8.--15. 1. " LIST_NEXT_CAPABILITY_PTR            ,The offset to the next PCI capability structure"
textline "                                   "
hexmask.long.byte 0x00 0.--7. 1. " LIST_CAPABILITY_ID                  ,Indicates PCI express capability structure"
line.long 0x04 "DEVICE_CAPABILITY,Device Capabilities Register"
bitfld.long 0x04 26.--27. " CAPTURED_SLOT_POWER_LIMIT_SCALE     ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x04 18.--25. 1. " CAPTURED_SLOT_POWER_LIMIT_VALUE     ,Specifies the upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x04 15. " ROLE_BASED_ERR_REPORTING            ,Device implements the functionality originally defined in the error reporting ECN" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 14. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 13. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 12. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x04 9.--11. " ENDPOINT_L1_ACCEPTABLE_LATENCY      ,Acceptable latency due to the transition from L1 state to the L0 state" "<1 us,1 us - 2 us,2 us -4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us-64 us,> 64 us"
textline "                                   "
bitfld.long 0x04 6.--8. " ENDPOINT_L0S_ACCEPTABLE_LATENCY     ,Acceptable total latency due to the transition from L1 state to the L0 state" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1. us,1 us - 2 us,2 us-4us,> 4 us"
textline "                                   "
bitfld.long 0x04 5. " EXTENDED_TAG_FIELD_SIZE             ,Maximum supported size of the tag field" "5-bit tag field,8-bit tag field"
textline "                                   "
bitfld.long 0x04 3.--4. " PHANTOM_FUNCTIONS_SUPPORTED         ,Phantom functions support" "No bits used,First MSB used,First two MSB used,Three bits"
textline "                                   "
bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE                    ,Maximum payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
group.long 0x88++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS,Device Control/Status Registers"
rbitfld.long 0x00 21. " TRANSACTIONS_PENDING                ,Transactions pending" "Completed,Pending"
textline "                                   "
rbitfld.long 0x00 20. " AUX_POWER_DETECTED                  ,AUX power detected" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 19. " UNSUPP_REQUEST_DETECTED             ,Unsupported request" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " FATAL_ERROR_DETECTED                ,Fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " NON_FATAL_ERROR_DETECTED            ,Non-fatal error" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " CORR_ERROR_DETECTED                 ,Correctable errors" "Not detected,Detected"
textline "                                   "
bitfld.long 0x00 12.--14. " MAX_READ_REQUEST_SIZE               ,Maximum read request size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 11. " ENABLE_NO_SNOOP                     ,No snoop bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " AUXILLARY_POWER_PM_ENABLE           ,AUX power PM enable" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 9. " PHANTOM_FUNCTIONS_ENABLE            ,Phantom functions" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 8. " EXTENDED_TAG_FIELD_ENABLE           ,8-bit tag field" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 5.--7. " MAX_PAYLOAD_SIZE                    ,Maximum TLP payload size" "128B,256B,512B,1024B,2048B,4096B,?..."
textline "                                   "
bitfld.long 0x00 4. " ENABLE_RELAXED_ORDERING             ,Relaxed ordering bit" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " UNSUPP_REQ_REPORTING_ENABLE         ,Reporting of unsupported requests" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " FATAL_ERROR_REPORTING_ENABLE        ,Reporting of fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " NON_FATAL_ERROR_REPORTING_ENABLE    ,Reporting of non-fatal errors" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " CORR_ERROR_REPORTING_ENABLE         ,Reporting of correctable errors" "Disabled,Enabled"
textline "                                   "
rgroup.long 0x8C++0x03
line.long 0x00 "LINK_CAPABILITIES,Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER                         ,PCI express port number"
textline "                                   "
bitfld.long 0x00 21. " BW_NOTIFY                           ,Bandwidth notify" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 20. " LINKACTV_REPORTING                  ,Link active reporting" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 19. " SURPRISE_DOWN_ERPT_CAP              ,Detecting and reporting a surprise down error condition" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 18. " CLOCK_PM                            ,Component tolerates the removal of any reference clock" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 15.--17. " L1_EXIT_LATENCY                     ,L1 exit latency" "< 1 us,1 us - 2 us,2 us - 4 us,4 us - 8 us,8 us - 16 us,16 us - 32 us,32 us - 64 us,> 64 us"
textline "                                   "
bitfld.long 0x00 12.--14. " L0S_EXIT_LATENCY                    ,L0s exit latency" "< 64 ns,64 ns - 128 ns,128 ns - 256 ns,256 ns - 512 ns,512 ns - 1 us,1 us - 2 us,2 us - 4us,?..."
textline "                                   "
bitfld.long 0x00 10.--11. " ACTIVE_STATE_LINK_PM_SUPPORT        ,Level of active state power management supported" ",L0s Entry,,L0s and L1"
textline "                                   "
bitfld.long 0x00 4.--9. " MAX_LINK_WIDTH                      ,Maximum width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,?..."
else
bitfld.long 0x00 0.--3. " MAX_LINK_SPEED                      ,Maximum Link speed" ",2.5 Gb/s Link,5.0 Gb/s Link,?..."
endif
textline "                                   "
group.long 0x90++0x03
line.long 0x00 "LINK_CONTROL_STATUS,Link Control/Status Register"
eventfld.long 0x00 31. " AUTO_BANDWIDTH                      ,Auto bandwidth" "Disabled,Enabled"
textline "                                   "
eventfld.long 0x00 30. " BW_MANAGEMENT                       ,Bandwidth management" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 29. " DL_LINK_ACTIVE                      ,Data link control and management state machine" "Not active,Active"
textline "                                   "
rbitfld.long 0x00 28. " SLOT_CLOCK_CONFIG                   ,Component uses platform reference clock" "Platform clock,Independent"
textline "                                   "
rbitfld.long 0x00 27. " LINK_TRAINING                       ,Link training" "Completed,In progress"
textline "                                   "
rbitfld.long 0x00 20.--25. " NEG_LINK_WIDTH                      ,Negotiated width" ",x1,x2,,x4,,,,x8,,,,x12,,,,x16,,,,,,,,,,,,,,,,x32,?..."
textline "                                   "
rbitfld.long 0x00 16.--19. " LINK_SPEED                          ,Negotiated Link Speed" ",2.5 Gb/s,5.0 Gb/s,?..."
textline "                                   "
bitfld.long 0x00 11. " AUTO_BANDWIDTH_INT_EN               ,Auto bandwidth interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " BW_MANAGEMENT_INT_EN                ,Bandwidth management interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 9. " HW_AUTO_WIDTH_DISABLE               ,Hardware auto width disable" "No,Yes"
textline "                                   "
rbitfld.long 0x00 8. " CLOCK_PM                            ,Clock PM" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7. " EXTENDED_SYNCH                      ,Forces extended transmission" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 6. " COMMON_CLOCK_CONFIGURATION          ,Common clock configuration" "Common reference clock,Asynchrous reference clock"
textline "                                   "
rbitfld.long 0x00 5. " RETRAIN_LINK                        ,Link retraining" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " LINK_DISABLE                        ,Disabling the Link" "No,Yes"
textline "                                   "
rbitfld.long 0x00 3. " READ_COMPLETION_BOUNDARY            ,RCB support capabilities" "64 byte,128 byte"
textline "                                   "
bitfld.long 0x00 0.--1. " ACTIVE_STATE_LINK_PM_CONTROL        ,Level of active state PM supported" ",L0s Entry,,L0s and L1"
rgroup.long 0x94++0x03
line.long 0x00 "SLOT_CAPABILITIES,Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 0x08 " PHYSICAL_SLOT_NUMBER                ,Physical slot number attached to this port"
textline "                                   "
bitfld.long 0x00 18. " NO_CMD_COMPLETED_SUPPORT            ,Notification when an issued command is completed by the hot plug controller" "Supported,Not supported"
textline "                                   "
bitfld.long 0x00 17. " ELECTROMECHANICAL_INTERLOCK_PRESENT ,Electro mechanical interlock mechanism" "Not implemented,Implemented"
textline "                                   "
bitfld.long 0x00 15.--16. " SLOT_POWER_LIMIT_SCALE              ,Scale used for the slot power limit value" "1.0x,0.1x,0.01x,0.001x"
textline "                                   "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE              ,Upper limit on power supplied by slot"
textline "                                   "
bitfld.long 0x00 6. " HOT_PLUG_CAPABLE                    ,Supporting Hot-plug operations" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                   ,Hot-plug surprise" "Not capable,Capable"
textline "                                   "
bitfld.long 0x00 4. " POWER_INDICATOR_PRESENT             ,Power indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT         ,Attention indicator" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 2. " MRL_SENSOR_PRESENT                  ,MRL sensor" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT            ,Power controller" "Not Implemented,Implemented"
textline "                                   "
bitfld.long 0x00 0. " ATTENTION_BUTTON_PRESENT            ,Attention button" "Not Implemented,Implemented"
group.long 0x98++0x0B
line.long 0x00 "SLOT_CONTROL_STATUS,Slot Control/Status Register"
eventfld.long 0x00 24. " DL_LAYER_STATE_CHANGED              ,Notification when Data Link Layer Active field is changed" "Disabled,Enabled"
textline "                                   "
rbitfld.long 0x00 23. " ELECTROMECHANICAL_INTERLOCK_STATE   ,Electromechanical interlock" "Disengaged,Engaged"
textline "                                   "
rbitfld.long 0x00 22. " PRESENCE_DETECT_STATE               ,Presence of a card in the slot" "Slot empty,Card present"
textline "                                   "
rbitfld.long 0x00 21. " MRL_SENSOR_STATE                    ,MRL sensor status" "MRL Closed,MRL Open"
textline "                                   "
eventfld.long 0x00 20. " COMMAND_COMPLETED                   ,Hot-plug controller completed an issued command" "Not completed,Completed"
textline "                                   "
eventfld.long 0x00 19. " PRESENCE_DETECT_CHANGED             ,Presence Detect change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 18. " MRL_SENSOR_CHANGED                  ,MRL Sensor state change" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 17. " POWER_FAULT_DETECTED                ,Power fault" "Not detected,Detected"
textline "                                   "
eventfld.long 0x00 16. " ATTN_BUTTON_PRESSED                 ,Attention button" "Not pressed,Pressed"
textline "                                   "
bitfld.long 0x00 12. " DL_LAYER_STATE_CHANGED_ENABLE       ,Data Link Layer Link Active field" "Not changed,Changed"
textline "                                   "
rbitfld.long 0x00 11. " ELECTROMECHANICAL_INTERLOCK_CONTROL ,Electromechanical interlock mechanism" "Not supported,Supported"
textline "                                   "
bitfld.long 0x00 10. " POWER_CONTROLLER_CONTROL            ,Power state of the slot" "Power on,Power off"
textline "                                   "
bitfld.long 0x00 8.--9. " POWER_INDICATOR_CONTROL             ,Current state of the Power Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 6.--7. " ATTN_INDICATOR_CONTROL              ,Current state of the Attention Indicator" ",On,Blink,Off"
textline "                                   "
bitfld.long 0x00 5. " HOT_PLUG_INTERRUPT_ENABLE           ,Generation of hot plug interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 4. " COMMAND_COMPLETED_INTERRUPT_ENABLE  ,Generation of hot plug interrupt when a command is completed" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 3. " PRESENCE_DETECT_CHANGED_ENABLE      ,Presence detect changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 2. " STATUS_MRL_SENSOR_CHANGED_ENABLE    ,MRL sensor changed event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 1. " POWER_FAULT_DETECTED_ENABLE         ,Power fault event interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0. " ATTN_BUTTON_PRESSED_ENABLE          ,Attention button pressed event interrupt" "Disabled,Enabled"
line.long 0x04 "RCR,Root Control Register"
bitfld.long 0x04 3. " PME_INT                             ,PME interrupt" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 2. " SERR_FAT                            ,Generating system error if a fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 1. " SERR_NONFAT                         ,Generating system error if a non-fatal error is reported" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x04 0. " SERR_COR                            ,System error if a correctable error is reported" "Disabled,Enabled"
line.long 0x08 "RSR,Root Status Register"
rbitfld.long 0x08 17. " PMEPEND                             ,Another PME is pending when the PMESTAT bit is set" "Not pending,Pending"
textline "                                   "
eventfld.long 0x08 16. " PMESTAT                             ,PME was asserted by the requester ID" "Not active,Active"
textline "                                   "
hexmask.long.word 0x08 0.--15. 1. " REQID                               ,PCI requester ID of the last PME requester"
rgroup.long 0xA4++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,Root Capabilities Register 2"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
bitfld.long 0x00 11. " LTR_MECH_SUP                        ,LTR Capability support" "Unsupported,Supported"
textline "                                   "
endif
bitfld.long 0x00 4. " CPL_TO_DIS_SUP                      ,Support disabling the completion timeout mechanism" "Unsupported,Supported"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_RANGES_SUP                   ,Completion timeout ranges supported by the root port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xA8++0x03
line.long 0x00 "DEVICE_CONTROL_STATUS_2,Device Control/Status Register 2"
bitfld.long 0x00 4. " CPL_TO_DISABLE                      ,Disables completion timeout" "No,Yes"
textline "                                   "
bitfld.long 0x00 0.--3. " CPL_TO_VALUE                        ,Completion timeout ranges supported by the root port" "Default,Range A LO,Range A HI,,,Range B LO,Range B HI,?..."
group.long 0xB0++0x03
line.long 0x00 "LINK_CONTROL_STATUS_2,Link Control Status Register"
rbitfld.long 0x00 16. " CURRENT_DEEMPHASIS_LEVEL            ,Current deemphasis level" "6,3.5"
textline "                                   "
bitfld.long 0x00 12. " COMPLIANCE_DEEMPHASIS               ,Compliance deemphasis" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 11. " COMPLIANCE_SOS                      ,Compliance SOS" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 10. " ENTER_MODIFIED_COMPLIANCE           ,Transmission of the modified compliance pattern" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 7.--9. " TRANSMIT_MARGIN                     ,Value of the non-deemphasized voltage level (Full-swing/Half swing)" "800-1200mV/400-600mV,600-800mV/300-400mV,400-600mV/200-300mV,200-400mV/100-200mV,?..."
textline "                                   "
rbitfld.long 0x00 6. " SELECTABLE_DEEMPHASIS               ,Level of de-emphasis" "-6dB,-3.5dB"
textline "                                   "
rbitfld.long 0x00 5. " HW_AUTO_SPEED_DISABLE               ,Link speed change disable" "No,Yes"
textline "                                   "
bitfld.long 0x00 4. " ENTER_COMPLIANCE                    ,Forces link to enter compliance mode" "Disabled,Enabled"
textline "                                   "
bitfld.long 0x00 0.--3. " TARGET_LINK_SPEED                   ,Upper limit on the link operational speed" ",2.5Gb/s,5Gb/s,?..."
tree.end
tree "Error Reporting Capability Registers"
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " NEXT_PTR      ,Next PTR"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " ID            ,ID"
else
rgroup.long 0x100++0x03
line.long 0x00 "ERPTCAP,Advanced Error Reporting Enhanced Capability Header Register"
hexmask.long.word 0x00 20.--31. 1. " ID            ,ID"
bitfld.long 0x00 16.--19. "        VERSION         ,Version" "Version 0,Version 1,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " NEXT_PTR      ,Next PTR"
endif
group.long 0x104++0x0B
line.long 0x00 "ERPTCAP_UCERR,Uncorrectable Error Status Register"
eventfld.long 0x00 20. " UNSUP_REQ_ERR ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "    ECRC_ERR        ,ECRC error status" "No error,Error"
textline "                             "
eventfld.long 0x00 18. " MF_TLP        ,Malformed TLP status" "False,True"
eventfld.long 0x00 17. "       RCV_OVFL        ,Receiver overflow status" "No overflow,Overflow"
textline "                             "
eventfld.long 0x00 16. " UNEXP_COMP    ,Unexpected completion status" "False,True"
eventfld.long 0x00 15. "       COMP_ABORT      ,Completion abort status" "Not aborted,Aborted"
textline "                             "
eventfld.long 0x00 14. " COMP_TO       ,Completion timeout status" "No timeout,Timeout"
eventfld.long 0x00 13. "  FC_PROTO_ERR    ,Flow control protocol error status" "No error,Error"
textline "                             "
eventfld.long 0x00 12. " POS_TLP       ,Poisoned TLP status" "False,True"
eventfld.long 0x00 4. "       DLINK_PROTO_ERR ,Data link protocol error status" "No error,Error"
textline "                             "
rbitfld.long 0x00 0. " TRAINING_ERR  ,Training error status" "No error,Error"
line.long 0x04 "ERPTCAP_UCERR_MK,Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UNSUP_REQ_ERR ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "  ECRC_ERR        ,ECRC error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 18. " MF_TLP        ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "  RCV_OVFL        ,Receiver overflow mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 16. " UNEXP_COMP    ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "  COMP_ABORT      ,Completion abort mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 14. " COMP_TO       ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "  PROTO_ERR       ,Flow control protocol error mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x04 12. " POS_TLP       ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "  DLINK_PROTO_ERR ,Data link protocol error mask" "Not masked,Masked"
textline "                             "
rbitfld.long 0x04 0. " TRAINING_ERR  ,Training error mask" "Not masked,Masked"
line.long 0x08 "ERPTCAP_UCERR_SEVR,Correctable Error Severity Register"
bitfld.long 0x08 20. " UNSUP_REQ_ERR ,Unsupported request error" "Non-fatal,Fatal"
bitfld.long 0x08 19. "   ECRC_ERR        ,ECRC error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 18. " MF_TLP        ,Malformed TLP" "Non-fatal,Fatal"
bitfld.long 0x08 17. "   RCV_OVFL        ,Receiver overflow" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 16. " UNEXP_COMP    ,Unexpected completion" "Non-fatal,Fatal"
bitfld.long 0x08 15. "   COMP_ABORT      ,Completion abort" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 14. " COMP_TO       ,Completion timeout" "Non-fatal,Fatal"
bitfld.long 0x08 13. "   PROTO_ERR       ,Flow control protocol error" "Non-fatal,Fatal"
textline "                             "
bitfld.long 0x08 12. " POS_TLP       ,Poisoned TLP" "Non-fatal,Fatal"
bitfld.long 0x08 4. "   DLINK_PROTO_ERR ,Data link protocol error" "Non-fatal,Fatal"
textline "                             "
rbitfld.long 0x08 0. " TRAINING_ERR  ,Training error" "Non-fatal,Fatal"
group.long 0x110++0x03
line.long 0x00 "ERPTCAP_CERR,Correctable Error Status Register"
eventfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF status" "Not masked,Masked"
eventfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover status" "Not masked,Masked"
eventfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP status" "Not masked,Masked"
textline "                             "
eventfld.long 0x00 6. " BAD_TLP       ,Bad TLP status" "Not masked,Masked"
eventfld.long 0x00 0. "  RCV_ERR         ,Receiver error status" "Not masked,Masked"
group.long 0x114++0x03
line.long 0x00 "ERPTCAP_CERR_MK,Correctable Error Mask Register"
bitfld.long 0x00 13. " ADVISORY_NF   ,ADVISORY NF mask" "Not masked,Masked"
bitfld.long 0x00 12. "  RPLY_TO         ,Replay timer timeout mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 8. " RPLY_RLOV     ,Replay NUM rollover mask" "Not masked,Masked"
bitfld.long 0x00 7. "  BAD_DLLP        ,Bad DLLP mask" "Not masked,Masked"
textline "                             "
bitfld.long 0x00 6. " BAD_TLP       ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x00 0. "  RCV_ERR         ,Receiver error mask" "Not masked,Masked"
textline "                             "
width 26.
group.long 0x118++0x03
line.long 0x00 "ERPTCAP_ADV_ERR_CAP_CNTL,Advanced Error Capabilities And Control Register"
bitfld.long 0x00 8. " ECRC_CHK_EN ,ECRC CHK EN" "Disabled,Enabled"
rbitfld.long 0x00 7. "  ECRC_CHK_CAP ,ECRC CHK CAP" "False,True"
textline "                                   "
bitfld.long 0x00 6. " ECRC_GEN_EN ,ECRC GEN EN" "Disabled,Enabled"
rbitfld.long 0x00 5. "  ECRC_GEN_CAP ,ECRC GEN CAP" "False,True"
textline "                                   "
rbitfld.long 0x00 0.--4. " ERR_PTR     ,ERR PTR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0xF
line.long 0x00 "ERPTCAP_HDR_LOG_DW0,Header Log Dword 0 Register"
line.long 0x04 "ERPTCAP_HDR_LOG_DW1,Header Log Dword 1 Register"
line.long 0x08 "ERPTCAP_HDR_LOG_DW2,Header Log Dword 2 Register"
line.long 0x0C "ERPTCAP_HDR_LOG_DW3,Header Log Dword 3 Register"
textline "                                   "
width 20.
group.long 0x12C++0x0B
line.long 0x00 "ERPTCAP_ERR_CMD,Root Error Command Register"
bitfld.long 0x00 2. " FATAL_ERR_RPT_EN     ,Fatal error RPT enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NONFATAL_ERR_RPT_EN ,Non fatal error RPT enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " COR_ERR_RPT_EN       ,Correctable error RPT enable" "Disabled,Enabled"
line.long 0x04 "ERPTCAP_ERR_STS,Root Error Status Register"
rbitfld.long 0x04 27.--31. " ADV_ERR_INTR_MSG_NUM ,Base and MSI message data offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FATAL_RCVD          ,Fatal uncorrectable error messages" "Not received,Received"
textline "                             "
eventfld.long 0x04 5. " NONFATAL_RCVD        ,Non-fatal uncorrectable error messages" "Not received,Received"
eventfld.long 0x04 4. "  FIRST_FATAL_RCVD    ,First uncorrectable error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 3. " MULT_UNCOR_RCVD      ,Error is received and UNCOR_RCVD is already set" "False,True"
eventfld.long 0x04 2. "         STS_UNCOR_RCVD      ,Error message" "Not received,Received"
textline "                             "
eventfld.long 0x04 1. " MULT_COR_RCVD        ,Correctable error message is received and COR_RCVD is already set" "False,True"
eventfld.long 0x04 0. "         COR_RCVD            ,Correctable error" "Not received,Received"
line.long 0x08 "ERPTCAP_ERR_ID,Error Source Identification Register"
hexmask.long.word 0x08 16.--31. 1. " ERR_COR              ,Requestor ID of first correctable error in root error status register "
hexmask.long.word 0x08 0.--15. 1. "          ERR_UNCOR           ,Requestor ID of first uncorrectable error in root error status register "
textline "                             "
tree.end
width 20.
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
tree "PCI L1 PM Substate Capability Registers"
rgroup.long 0x140++0x07
line.long 0x00 "EXT_CAP,Extended Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " EXT_CAP_NEXT_CAP          ,Offset to the next PCI express capability structure"
bitfld.long 0x00 16.--19. "      EXT_CAP_VERSION               ,PCI-SIG defined version number that indicates the version of the capability structure present" ",L1_SUBSTATES,?..."
textline "                             "
hexmask.long.word 0x00 0.--15. 1. " EXT_CAP_ID                ,PCI-SIG defined ID number that indicates the nature and format of the extended capability"
line.long 0x04 "CAP,Capability Register"
bitfld.long 0x04 19.--23. " CAP_T_PWRON_VALUE         ,Time (in us) that this Port requires the port on the opposite side of the link to wait" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 16.--17. "        CAP_T_PWRON_SCALE             ,Specifies the scale used for this port" "2 us,10 us,100 us,?..."
textline "                             "
hexmask.long.byte 0x04 8.--15. 1. " CAP_CM_RESTORE_TIME       ,Time (in us) required for this port to re-establish common mode"
bitfld.long 0x04 4. "        CAP_L1_PM_SUBSTATES_SUPPORTED ,L1 PM Substates is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 3. " CAP_ASPM_L1_1_SUPPORTED   ,ASPM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 2. "  CAP_ASPM_L1_2_SUPPORTED       ,ASPM L1.2 is is supported" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 1. " CAP_PCI_PM_L1_1_SUPPORTED ,PCI-PM L1.1 is supported" "Disabled,Enabled"
bitfld.long 0x04 0. "  CAP_PCI_PM_L1_2_SUPPORTED     ,PCI-PM L1.2 is supported" "Disabled,Enabled"
group.long 0x148++0x07
line.long 0x00 "CTRL1,Control 1 Register"
bitfld.long 0x00 29.--31. " LTR_L1_2_THRES_SCALE      ,Scale for value contained within the LTR_L1.2_THRESHOLD_Value" "0,1,2,3,4,5,6,7"
hexmask.long.word 0x00 16.--25. 1. "         LTR1_2_THRESH_VAL             ,Threshold value"
textline "                             "
hexmask.long.byte 0x00 8.--15. 1. " CM_RESTORE_TIME           ,Restore time"
bitfld.long 0x00 3. "        ASPM_L1_1_EN                  ,ASPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 2. " ASPM_L1_2_EN              ,ASPM L1.2 enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  PCIPM_L1_1_EN                 ,PCIPM L1.1 enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " PCIPM_L1_2_EN             ,PCIPM L1.2 enable" "Disabled,Enabled"
line.long 0x04 "CTRL2,Control 2 Register"
bitfld.long 0x04 3.--7. " T_PWRON_VALUE             ,Minimum amount of time (in us) that the Port must wait in L1.2.Exit after sampling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--1. "        T_PWRON_SCALE                 ,Scale used for the port T_POWER_ON Valuse field in the L1 PM Substates Capabilities register" "2 us,10 us,100 us,?..."
tree.end
endif
tree "NVIDIA Private Registers"
width 20.
group.long 0x494++0x03
line.long 0x00 "PRIV_XP_DL_0,Various Configurable Registers In The Data Link layer"
hexmask.long.word 0x00 19.--29. 1. " GEN2_REPLAY_TIMER_LIMIT   ,Replay timer limit"
hexmask.long.word 0x00 10.--18. 1. "      GEN2_ACK_TIMER_LIMIT          ,ACK timer limit"
textline "                             "
hexmask.long.word 0x00 1.--9. 1. " GEN2_UPDATE_FC_THRESHOLD  ,Update FC frequency"
bitfld.long 0x00 0. "      GEN2_DL_TIMERS_DISABLE        ,Enables the Gen2 DL timer settings" "No,Yes"
textline "                             "
width 34.
sif (cpuis("TEGRAX1"))
rgroup.long 0xC10++0x0F
line.long 0x00 "T_PCIE2_RP_LTR_REP_VAL,T_PCIE2_RP_LTR_REP_VAL"
hexmask.long.word 0x00 16.--31. 1. " T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP    ,T_PCIE2_RP_LTR_REP_VAL_NO_SNOOP"
textline "                                           "
hexmask.long.word 0x00 0.--15. 1. " T_PCIE2_RP_LTR_REP_VAL_SNOOP       ,T_PCIE2_RP_LTR_REP_VAL_SNOOP"
line.long 0x04 "T_PCIE2_RP_L1_1_ENTRY_COUNT,T_PCIE2_RP_L1_1_ENTRY_COUNT"
bitfld.long 0x04 31. " T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x04 30. " T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_1_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x04 0.--15. 1. " T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_1_ENTRY_COUNT_VALUE"
line.long 0x08 "T_PCIE2_RP_L1_2_ENTRY_COUNT,T_PCIE2_RP_L1_2_ENTRY_COUNT"
bitfld.long 0x08 31. " T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x08 30. " T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ENTRY_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x08 0.--15. 1. " T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE  ,T_PCIE2_RP_L1_2_ENTRY_COUNT_VALUE"
line.long 0x0C "T_PCIE2_RP_L1_2_ABORT_COUNT,T_PCIE2_RP_L1_2_ABORT_COUNT"
bitfld.long 0x0C 31. " T_PCIE2_RP_L1_2_ABORT_COUNT_RESET  ,T_PCIE2_RP_L1_2_ABORT_COUNT_RESET" "Done,Pending"
textline "                                           "
bitfld.long 0x0C 30. " T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE ,T_PCIE2_RP_L1_2_ABORT_COUNT_FREEZE" "Done,Pending"
textline "                                           "
hexmask.long.word 0x0C 0.--15. 1. " T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE  ,0 T_PCIE2_RP_L1_2_ABORT_COUNT_VALUE"
textline "                                           "
elif cpuis("TEGRAX2")
width 27.
group.long 0xC00++0x0F
line.long 0x00 "L1_PM_SUBSTATES_CYA,L1 PM Substates CYA Register"
bitfld.long 0x00 26. " REFCLK_ON_WITH_PAD_PLL_LOCK   ,Refclk on with pad PLL lock" "Not locked,Locked"
bitfld.long 0x00 25. "           REFCLK_ON_WITH_PLLE_LOCK      ,Refclk on with PLLE lock" "Not locked,Locked"
textline "                                    "
bitfld.long 0x00 24. " HIDE_CAP                      ,Hide capability of L1 PM substates" "Not hidden,Hidden"
bitfld.long 0x00 19.--23. "           T_PWRON_VALUE                 ,Time (in us) that this port requires the port on the opposite side of link to wait in L1.2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 16.--17. " T_PWRON_SCALE                 ,Specifies the scale used for the port T_POWER_ON value field in the L1 PM substates capabilities register" "2 us,10 us,100 us,?..."
hexmask.long.byte 0x00 8.--15. 1. "               CM_RESTORE_TIME               ,Time (in us) required for this port to re-establish common mode as described in table in the L1 PM substates ECN"
textline "                                    "
bitfld.long 0x00 4. " L1_PM_SUBSTATES               ,L1 PM Substates support enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             ASPM_L1_1                     ,ASPM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " ASPM_L1_2                     ,ASPM L1.2 support enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             PCI_PM_L1_1                   ,PCI-PM L1.1 support enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " PCI_PM_L1_2                   ,PCI-PM L1.2 support enable" "Disabled,Enabled"
line.long 0x04 "L1_PM_SUBSTATES_1_CYA,L1 PM Substates 1 CYA Register"
bitfld.long 0x04 22. " RX_TERM_EN_IN_L1_2            ,Receiver PAD termination when in L1.2 enable" "Disabled,Enabled"
hexmask.long.word 0x04 13.--21. 1. "             CHK_CLKREQ_ASSERTED_DLY       ,Amount of time the DUT waits in L1.2"
textline "                                    "
hexmask.long.word 0x04 0.--12. 1. " T_PWR_OFF_DLY                 ,T POWER ON DELY diagnostic amount of time the DUT waits in L1.2_entry before it enters L1.2_idle"
line.long 0x08 "L1_PM_SUBSTATES_2_CYA,L1 PM Substates 2 CYA Register"
bitfld.long 0x08 21.--24. " MICROSECOND_COMP              ,Compensation value of the crystal oscillator frequency in microsecond tick generator used for REFCLK_ON time and common-mode turn ON time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x08 13.--20. 1. "                   MICROSECOND                   ,Microsecond diagnostic bit number of clocks in a microsecond in clk25m"
textline "                                    "
hexmask.long.word 0x08 0.--12. 1. " T_L1_2_DLY                    ,T L1.2 delay diagnostic"
line.long 0x0C "L1_PM_SUBSTATES_3_CYA,L1 PM Substates 3 CYA Register"
hexmask.long.word 0x0C 18.--30. 1. " L11_T_REFCLK_ON               ,Number of microseconds the port must wait in L1.1 to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 17. "                 L11_T_REFCLK_ON_ENABLE        ,Refclk clock timer logic when in L1.1 after seeing deassertion of clkreq# enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.word 0x0C 4.--16. 1. " L12_T_REFCLK_ON               ,Number of microseconds the port must wait to enable refclk after clkreq# has been asserted"
bitfld.long 0x0C 3. "                 PCIPM_L1_2                    ,PCIMPM L1.2 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 2. " ASPM_L1_2                     ,ASPM L1.2 functionality enable" "Disabled,Enabled"
bitfld.long 0x0C 1. "             PCIPM_L1_1                    ,PCIPM L1.1 functionality enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x0C 0. " ASPM_L1_1                     ,ASPM L1.1 functionality enable" "Disabled,Enabled"
rgroup.long 0xC10++0x03
line.long 0x00 "LTR_REP_VAL,LTR Reported Value Register"
hexmask.long.word 0x00 16.--31. 1. " NO_SNOOP                      ,Value for no snoop"
hexmask.long.word 0x00 0.--15. 1. "                 SNOOP                         ,Value for snoop"
group.long 0xC14++0x17
line.long 0x00 "L1_1_ENTRY_COUNT,L1.1 Entry Count Register"
bitfld.long 0x00 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x00 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x00 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.1 state"
line.long 0x04 "L1_2_ENTRY_COUNT,L1.2 Entry Count Register"
bitfld.long 0x04 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x04 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x04 0.--15. 1. " VALUE                         ,Number of times the link entered L1.2 ENTRY state"
line.long 0x08 "L1_2_ABORT_COUNT,L1.2 Abort Count Register"
bitfld.long 0x08 31. " RESET                         ,VALUE reset" "No reset,Reset"
bitfld.long 0x08 30. "             FREEZE                        ,Freeze" "No freeze,Freeze"
textline "                                    "
hexmask.long.word 0x08 0.--15. 1. " VALUE                         ,Number of times the link entered the L1.2 ENTRY state"
line.long 0x0C "LTR_OVERRIDE,LTR Override Register"
hexmask.long.word 0x0C 16.--31. 1. " NO_SNOOP                      ,LTR override no snoop value"
hexmask.long.word 0x0C 0.--15. 1. "                 SNOOP                         ,LTR override snoop value"
line.long 0x10 "L1SS_SPARE,L1SS Spare Register"
hexmask.long.word 0x10 18.--31. 1. " SPARE2                        ,Spare 2"
eventfld.long 0x10 17. "                 LTR_MSG_RCV_STS               ,LTR MSG RCV STS" "No effect,Cleared"
textline "                                    "
bitfld.long 0x10 16. " LTR_MSG_INT_EN                ,LTR MSG INT enable" "Disabled,Enabled"
hexmask.long.word 0x10 2.--15. 1. "             SPARE1                        ,Spare 1"
textline "                                    "
bitfld.long 0x10 1. " LTR_OVERRIDE_NO_SNOOP_EN      ,LTR override no snoop enable" "Disabled,Enabled"
bitfld.long 0x10 0. "             LTR_OVERRIDE_SNOOP_EN         ,LTR override snoop enable" "Disabled,Enabled"
line.long 0x14 "SLCG_OVERRIDE_DIS_SLCG,SLCG Override Disable SLCG Register"
bitfld.long 0x14 22. " PRI_CLK                       ,PRI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 21. "             TMS0_UFPCI_CLK                ,TMS0 UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 20. " TMS0_DFPCI_CLK                ,TMS0 DFPCI CLK enable" "Disabled,Enabled"
bitfld.long 0x14 19. "             TMS0C2_XTXCLK1X               ,TMS0C2 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 18. " TMS0C2_XCLK                   ,TMS0C2 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 17. "             TMS0C1_XTXCLK1X               ,TMS0C1 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 16. " TMS0C1_XCLK                   ,TMS0C1 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 15. "             TMS0C0_XTXCLK1X               ,TMS0C0 XTXCLK1X enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 14. " TMS0C0_XCLK                   ,TMS0C0 XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 13. "             TMSC0_XCLK                    ,TMSC0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 12. " T0C2_PCA_XCLK                 ,T0C2 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 11. "             T0C2_PCA_UFPCI_CLK            ,T0C2 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 10. " T0C1_PCA_XCLK                 ,T0C1 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 9. "             T0C1_PCA_UFPCI_CLK            ,T0C1 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 8. " T0C0_PCA_XCLK                 ,T0C0 PCA XCLK enable" "Disabled,Enabled"
bitfld.long 0x14 7. "             T0C0_PCA_UFPCI_CLK            ,T0C0 PCA UFPCI CLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 6. " GRP2_XTXCLK1X                 ,GRP2 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 5. "             GRP2_XCLK                     ,GRP2 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 4. " GRP1_XTXCLK1X                 ,GRP1 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 3. "             GRP1_XCLK                     ,GRP1 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 2. " GRP0_XTXCLK1X                 ,GRP0 XTXCLK1X enable" "Disabled,Enabled"
bitfld.long 0x14 1. "             GRP0_XCLK                     ,GRP0 XCLK enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x14 0. " CLK25M                        ,CLK25M enable" "Disabled,Enabled"
group.long 0xD00++0x1B
line.long 0x00 "DBG0,Debug 0"
line.long 0x04 "DBG1,Debug 1"
line.long 0x08 "DBG2,Debug 2"
line.long 0x0C "DBG3,Debug 3"
line.long 0x10 "DBG4,Debug 4"
line.long 0x14 "DBG5,Debug 5"
line.long 0x18 "DBG6,Debug 6"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD1C++0x03
line.long 0x00 "DBG_RD_BACK_LO,Debug RD Back LO"
group.long 0xD20++0x1B
line.long 0x00 "DBG_RD_BACK_HI,Debug RD Back HI"
line.long 0x04 "LANE_DBG0,Lane Debug 0"
line.long 0x08 "LANE_DBG1,Lane Debug 1"
line.long 0x0C "LANE_DBG2,Lane Debug 2"
line.long 0x10 "LANE_DBG3,Lane Debug 3"
line.long 0x14 "LANE_DBG4,Lane Debug 4"
line.long 0x18 "LANE_DBG5,Lane Debug 5"
bitfld.long 0x18 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x18 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
hexmask.long 0x18 0.--29. 1. " CTL                           ,Control"
rgroup.long 0xD3C++0x07
line.long 0x00 "LANE_DBG_RD_BACK_LO_VALUE,Lane Debug RD Back LO Value"
line.long 0x04 "LANE_DBG_RD_BACK_HI_VALUE,Lane Debug RD Back HI Value"
group.long 0xD44++0x0B
line.long 0x00 "LINK_DBG0,Link Debug 0"
line.long 0x04 "LINK_DBG1,Link Debug 1"
line.long 0x08 "LINK_DBG2,Link Debug 2"
bitfld.long 0x08 31. " LOW_POWER_MODE                ,Low power mode" "Disabled,Enabled"
bitfld.long 0x08 30. "             CG_EN                         ,CG enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x08 29. " CTL                           ,Control" "0,1"
rgroup.long 0xD50++0x07
line.long 0x00 "LINK_DBG_RD_BACK_LO_VALUE,Link Debug RD Back LO Value"
line.long 0x04 "LINK_DBG_RD_BACK_HI_VALUE,Link Debug RD Back HI Value"
endif
width 27.
group.long 0xD5C++0x03
line.long 0x00 "PIPE_CTL,Controls (enabling /disabling) the pipelines added to meet timing on various interfaces"
bitfld.long 0x00 8. " UFA2WRR_PWTOP                 ,UFA2WRR PWTOP enable" "Disabled,Enabled"
bitfld.long 0x00 7. "             UBFI2DFI_P2P                  ,UBFI2DFI P2P enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 6. " TXBA2DFI_WR                   ,TXBA2DFI WR enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             CMDQ2UFARB                    ,CMDQ2UFARB enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " UBFI2DFI_NTT                  ,UBFI2DFI NTT enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PCA                           ,PCA enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " DFIREQ                        ,DFIREQ enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             DFIRSP                        ,DFIRSP enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " DFI2UBFI                      ,DFI2UBFI enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0xD60++0x07
line.long 0x00 "XP_BUST_TRIG1,XP Bust Trigger 1"
bitfld.long 0x00 25. " L02RCVRY_L0S_FTS_TO           ,Allows bus tracer trigger when getting FTS timeout in L0.0s" "Not allowed,Allowed"
bitfld.long 0x00 24. "          L02RCVRY_TS_DET               ,Allows bus tracer trigger when receiving TS in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 23. " L02RCVRY_SURPRISE_EIDLE       ,Allows bus tracer trigger when seeing surprise eidle in L0" "Not allowed,Allowed"
bitfld.long 0x00 22. "          L02RCVRY_8B10B_ERR            ,Allows bus tracer trigger when receiving 8b10b error in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 21. " L02RCVRY_ADVERTISEDRATECHANGE ,Allows bus tracer trigger at advertised rate change in L0" "Not allowed,Allowed"
bitfld.long 0x00 20. "          L02RCVRY_DL_RETRAIN           ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 19. " L02RCVRY_LPBK                 ,Allows bus tracer trigger at dl retrain in L0" "Not allowed,Allowed"
bitfld.long 0x00 18. "          L02RCVRY_SPEEDCHANGE          ,Allows bus tracer trigger at speed change in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 17. " L02RCVRY_WIDTHCHANGE          ,Allows bus tracer trigger at width change in L0" "Not allowed,Allowed"
bitfld.long 0x00 16. "          L02RCVRY_LINK_RETRAIN         ,Allows bus tracer trigger at link retraining in L0" "Not allowed,Allowed"
textline "                                    "
bitfld.long 0x00 13.--15. " CUST_TRANSITION_TO_MINOR_ST   ,Mirror TO state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 10.--12. " CUST_TRANSITION_FROM_MINOR_ST ,Mirror FROM state of custom transition [Detect/Polling/Config/Recovery/L0/L1/L2/LoopBack/HotReset/Disabled/TXCHAR]" "Quiet/Active/Link start/RCVRLOCK/Normal/Entry/Entry/Entry/TS1/TS1/Active,Active/Config/Link accept/RCVRCFG/Entry/WAITRX/WAITRX/Active/Up check DN hold/Down wait/Compliance,Retry/Idle/Lane accept/Speed/Idle/Idle/Transmitwake/Idle/-/Entry/Eidle entry,Wait/-/Lane wait/Idle/Wait/Wait/Idle/Exit/-/Down/Eidle idle,Entry/Compliance/Idle/-/FTS/PWRUP/-/Speed/-/-/Eidle exit,-/CSpeed/PWRUP/-/PWRUP/Beacon entry/-/-/-/-/-,-/-/Complete/-/-/Beacon exit/-/Pre speed/-/-/-,-/-/-/Finish PKT/-/-/-/-/-/-/-"
textline "                                    "
bitfld.long 0x00 6.--9. " CUST_TRANSITION_TO_MAJOR_ST   ,Major TO state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
bitfld.long 0x00 2.--5. "             CUST_TRANSITION_FROM_MAJOR_ST ,Major FROM state of the custom transition" "DETECT,POLLING,CONFIG,,L0,L1,L2,RECOVERY,LOOPBACK,HOTRESET,DISABLED,TXCHAR,?..."
textline "                                    "
bitfld.long 0x00 1. " RX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             TX_EN                         ,Bus tracer trigger receive enable" "Disabled,Enabled"
line.long 0x04 "XP_BUST_TRIG2,XP BUST Trigger 2"
bitfld.long 0x04 31. " REPLAY_TIMER_EXPIRED_ERR      ,REPLA timer expired error" "No error,Error"
bitfld.long 0x04 30. "             SA_ERR                        ,SA error" "No error,Error"
textline "                                    "
bitfld.long 0x04 29. " DESKEW_ERR                    ,DESKEW error" "No error,Error"
bitfld.long 0x04 28. "             TRAINING_ERR                  ,Training error" "No error,Error"
textline "                                    "
bitfld.long 0x04 27. " DPLLP_CRC_ERR                 ,DPLLP CRC error" "No error,Error"
bitfld.long 0x04 26. "             8B10B_ERR                     ,8B10B error" "No error,Error"
textline "                                    "
bitfld.long 0x04 25. " REPLAY_STARTED_ERR            ,REPLAY started error" "No error,Error"
bitfld.long 0x04 24. "             ROLLOVER_ERR                  ,ROLLOVER error" "No error,Error"
textline "                                    "
bitfld.long 0x04 23. " PWH_UPDATE_FC_ERR             ,PWH update FC error" "No error,Error"
bitfld.long 0x04 22. "             PWH_TOO_MANY_CREDITS_ERR      ,PWH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 21. " PWD_UPDATE_FC_ERR             ,PWD update FC error" "No error,Error"
bitfld.long 0x04 20. "             PWD_TOO_MANY_CREDITS_ERR      ,PWD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 19. " NPH_UPDATE_FC_ERR             ,NPH update FC error" "No error,Error"
bitfld.long 0x04 18. "             NPH_TOO_MANY_CREDITS_ERR      ,NPH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 17. " NPD_UPDATE_FC_ERR             ,NPD update FC error" "No error,Error"
bitfld.long 0x04 16. "             NPD_TOO_MANY_CREDITS_ERR      ,NPD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 15. " CH_UPDATE_FC_ERR              ,CH update FC error" "No error,Error"
bitfld.long 0x04 14. "             CH_TOO_MANY_CREDITS_ERR       ,CH too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 13. " CD_UPDATE_FC_ERR              ,CD update FC error" "No error,Error"
bitfld.long 0x04 12. "             CD_TOO_MANY_CREDITS_ERR       ,CD too many credits error" "No error,Error"
textline "                                    "
bitfld.long 0x04 11. " REC_OVFL_ISOPW_DATA_ERR       ,REC overflow ISOPW data error" "No error,Error"
bitfld.long 0x04 10. "             REC_OVFL_ISOPW_HDR_ERR        ,REC overflow ISOPW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 9. " REC_OVFL_ISONP_HDR_ERR        ,REC overflow ISONP HDR error" "No error,Error"
bitfld.long 0x04 8. "             REC_OVFL_CPL_DATA_ERR         ,REC overflow CPL data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 7. " REC_OVFL_PW_DATA_ERR          ,REC overflow PW data error" "No error,Error"
bitfld.long 0x04 6. "             REC_OVFL_NP_DATA_ERR          ,REC overflow NP data error" "No error,Error"
textline "                                    "
bitfld.long 0x04 5. " REC_OVFL_CPL_HDR_ERR          ,REC overflow CPL HDR error" "No error,Error"
bitfld.long 0x04 4. "             REC_OVFL_PW_HDR_ERR           ,REC overflow PW HDR error" "No error,Error"
textline "                                    "
bitfld.long 0x04 3. " REC_OVFL_NP_HDR_ERR           ,REC_OVFL_NP_HDR_ERR error" "No error,Error"
bitfld.long 0x04 2. "             FRAMING_ERR                   ,Framing error" "No error,Error"
textline "                                    "
bitfld.long 0x04 1. " SEQ_ERR                       ,SEQ error" "No error,Error"
bitfld.long 0x04 0. "             LCRC_ERR                      ,LCRC error" "No error,Error"
rgroup.long 0xD68++0x03
line.long 0x00 "XP_DEBUG,XP Debug"
bitfld.long 0x00 0.--1. " RX_CAL_STATUS                 ,Receiver CAL status" "Idle,Pending,Done,Disabled"
endif
tree.end
tree "Vendor-Defined Registers"
width 20.
group.long 0xE00++0x2B
line.long 0x00 "RX_HDR_LIMIT,RX HDR Limit"
hexmask.long.byte 0x00 16.--23. 1. " CPL                       ,Completion header buffer size"
hexmask.long.byte 0x00 8.--15. 1. "        PW                      ,Posted write header buffer size"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " NP                        ,Non-posted header buffer size"
line.long 0x04 "RX_DATA_LIMIT,RX Data Limit"
hexmask.long.byte 0x04 20.--27. 1. " CPL                       ,Completion data buffer size"
hexmask.long.word 0x04 8.--19. 1. "        PW                      ,Posted write data buffer size"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " NP                        ,Non-posted write header buffer size"
line.long 0x08 "TX_HDR_LIMIT,TX HDR Limit"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x08 24.--31. 1. " NPT                       ,TX HDR limit NPT"
textline "                             "
hexmask.long.byte 0x08 16.--23. 1. " CPL                       ,Size of the downstream completions header buffer"
else
hexmask.long.byte 0x08 16.--23. 1. " NP                        ,Size of the downstream non posted header buffer"
endif
hexmask.long.byte 0x08 8.--15. 1. "        PW                      ,Size of the downstream posted writes header buffer"
textline "                             "
hexmask.long.byte 0x08 0.--7. 1. " NP                        ,Size of the downstream non posted header buffer"
line.long 0x0C "TX_DATA_LIMIT,TX Data Limit"
hexmask.long.byte 0x0C 8.--15. 1. " PW                        ,Size of the downstream Posted Writes Data Buffer"
hexmask.long.byte 0x0C 0.--7. 1. "        NP                      ,Size of the downstream Non Posted Data Buffer"
line.long 0x10 "UFPCI,Upstream FPCI Control Register"
bitfld.long 0x10 23.--27. " ISO_WEIGHT                ,ISO weight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 22. "        ISO_CONTROL_ENABLE      ,ISO control enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x10 21. " ISOPW2HPISO               ,Convert posted writes" "Disabled,Enabled"
bitfld.long 0x10 20. "  ISONP2HPISO             ,Convert non-posted reads" "Disabled,Enabled"
textline "                             "
hexmask.long.byte 0x10 12.--19. 1. " REQ_PEND_PERIOD           ,Timers are reset when they hit the value"
bitfld.long 0x10 10.--11. "        WRR_GRANT_BURST         ,Time for arbitration within a TMS" "0,1,2,3"
textline "                             "
bitfld.long 0x10 5.--9. " PW_PRI_OVR_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x10 0.--4. "        PW_STARV_COUNT          ,Number of grants" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x14 "MISC0,Miscellaneous Register 0"
bitfld.long 0x14 31. " SHORT_RXL_TIMER           ,Completion timeout feature in RXL test" "Disabled,Enabled"
bitfld.long 0x14 30. "  P2P_SMALL_ISA_HOLE      ,P2P settings control" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 29. " P2P_F                     ,Transactions (64'hF_XXXX)" "0,1"
bitfld.long 0x14 28. "         P2P_E                   ,Transactions (64'hE_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 27. " P2P_D                     ,Transactions (64'hD_XXXX)" "0,1"
bitfld.long 0x14 26. "         P2P_C                   ,Transactions (64'hC_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 25. " P2P_B                     ,Transactions (64'hB_XXXX)" "0,1"
bitfld.long 0x14 24. "         P2P_A                   ,Transactions (64'hA_XXXX)" "0,1"
textline "                             "
bitfld.long 0x14 23. " NISONC2HPISO              ,Upgrade to HPISO Read" "Disabled,Enabled"
bitfld.long 0x14 21. "  AUTO_XCLK_FREQ_EN       ,XCLK frequency dynamic switch" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 20. " RXL_CLEAR_DROP            ,Receiver DROP ALL status clear" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x14 4.--19. 1. "  ISO_PW_ENABLE[1]        ,Enables ISO PW [1] transactions for packets with TC >= TC2ISOMAP"
endif
textline "                             "
bitfld.long 0x14 3. " ISO_PW_ENABLE             ,Enables ISO PW transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 2. " ISO_NP_ENABLE             ,Enables ISO NP transactions for packets with TC >= TC2ISOMAP" "Disabled,Enabled"
bitfld.long 0x14 1. "  NATIVE_P2P_ENABLE       ,Enables native peer2peer transactions" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 0. " ENABLE_CLUMPING           ,Enables unitid clumping" "Disabled,Enabled"
line.long 0x18 "TXBA0,TXBA0 Register"
hexmask.long.word 0x18 16.--31. 1. " REPLAY_TIMER_EXPIRY       ,Replay timer expiry"
bitfld.long 0x18 12. "      USE_REPLAY_TIMER_OFFSET ,Use replay timer offset" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 11. " CMPL_MERGE_UPTO_64DW      ,Merge completions upto 64DW payloads" "Disabled,Enabled"
bitfld.long 0x18 10. "  CMPL_MERGE_UPTO_32DW    ,Merge completions upto 32DW payloads" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 9. " CMPL_MERGE_DISABLE        ,Disables completion merging" "No,Yes"
hexmask.long.word 0x18 0.--8. 1. "       REPLAY_BUF_LIMIT        ,Replay buffer limit"
line.long 0x1C "TXBA1,TXBA1 Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x1C 8.--16. 1. " MERGE_THRESHOLD           ,Merge threshold"
else
hexmask.long.byte 0x1C 8.--15. 1. " MERGE_THRESHOLD           ,Merge threshold"
textfld "  "
endif
bitfld.long 0x1C 4.--7. "      CM_OVER_PW_BURST        ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
sif (cpuis("TEGRAX2"))
bitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rbitfld.long 0x1C 0.--3. " PW_OVER_CM_BURST          ,Inputs into the downstream arbiter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
line.long 0x20 "FORCEFC,FC Priority Flip Threshold Register"
hexmask.long.byte 0x20 24.--31. 1. " NPD_UNRET_THRESH          ,NPD UNRET THRESH"
hexmask.long.byte 0x20 16.--23. 1. "        NPH_UNRET_THRESH        ,NPH UNRET THRESH"
textline "                             "
hexmask.long.byte 0x20 8.--15. 1. " PWD_UNRET_THRESH          ,PWD UNRET THRESH"
hexmask.long.byte 0x20 0.--7. 1. "        PWH_UNRET_THRESH        ,PWH UNRET THRESH"
line.long 0x24 "TIMEOUT0,LINK LTSSM Timeout 0 Register"
hexmask.long.byte 0x24 24.--31. 1. " PAD_SPDCHNG_GEN2          ,Time to wait for pads to change speed from Gen1 to Gen2"
hexmask.long.word 0x24 8.--23. 1. "        PAD_PWRUP_CM            ,Time to power up pads (no common-mode voltage during power down)"
textline "                             "
hexmask.long.byte 0x24 0.--7. 1. " PAD_PWRUP                 ,Time to power up pads (common-mode voltage during power down)"
line.long 0x28 "TIMEOUT1,LINK LTSSM Timeout 1. Register"
hexmask.long.byte 0x28 24.--31. 1. " RCVRY_SPD_UNSUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
hexmask.long.byte 0x28 16.--23. 1. "        RCVRY_SPD_SUCCESS_EIDLE ,Wait time in E-Idle after unsuccessful speed change"
textline "                             "
hexmask.long.word 0x28 0.--15. 1. " PAD_SPDCHNG_GEN1          ,Wait time for pads to change speed from Gen2 to Gen1"
rgroup.long 0xE34++0x03
line.long 0x00 "PRBS,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " LOCKED                    ,Locks lanes onto the incoming PRBS pattern"
hexmask.long.word 0x00 0.--15. 1. "      ERR_COUNT_OVERFLOW      ,Number of bit mismatches during PRBS run"
group.long 0xE38++0x03
line.long 0x00 "PRBS_ERR,PRBS Results Register"
hexmask.long.word 0x00 16.--31. 1. " COUNT                     ,Number of bit errors detected in the incoming PRBS stream"
bitfld.long 0x00 0.--3. "      SELECT                  ,Selects which lane number's Error Count shows up in the ERR_COUNT register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "   "
width 22.
group.long 0xE3C++0x27
line.long 0x00 "EIDLE_INFER_TO_0,EIDLE Inference Timeout Register 0"
hexmask.long.word 0x00 16.--31. 1. " RCVRCFG_SUC_SPEED                       ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x00 0.--15. 1. "             L0_LPBK                                  ,Infer E-Idle after this amount of time while in L0 or loopback"
line.long 0x04 "EIDLE_INFER_TO_1,EIDLE Inference Timeout Register 1"
hexmask.long.word 0x04 16.--31. 1. " UNSUC_SPEED_GEN2                        ,Infer E-Idle after this amount of time while in recovery"
hexmask.long.word 0x04 0.--15. 1. "             UNSUC_SPEED_GEN1                         ,Infer E-Idle after this amount of time while in recovery"
line.long 0x08 "LTSSM_DBGREG,LTSSM Debug Register"
eventfld.long 0x08 31. " LINKFSM[31]                             ,LINKFSM31" "Init,Clear"
eventfld.long 0x08 30. "            [30]                                     ,LINKFSM30" "Init,Clear"
textline "                               "
eventfld.long 0x08 29. "        [29]                             ,LINKFSM29" "Init,Clear"
eventfld.long 0x08 28. "            [28]                                     ,LINKFSM28" "Init,Clear"
textline "                               "
eventfld.long 0x08 27. "        [27]                             ,LINKFSM27" "Init,Clear"
eventfld.long 0x08 26. "            [26]                                     ,LINKFSM26" "Init,Clear"
textline "                               "
eventfld.long 0x08 25. "        [25]                             ,LINKFSM25" "Init,Clear"
eventfld.long 0x08 24. "            [24]                                     ,LINKFSM24" "Init,Clear"
textline "                               "
eventfld.long 0x08 23. "        [23]                             ,LINKFSM23" "Init,Clear"
eventfld.long 0x08 22. "            [22]                                     ,LINKFSM22" "Init,Clear"
textline "                               "
eventfld.long 0x08 21. "        [21]                             ,LINKFSM21" "Init,Clear"
eventfld.long 0x08 20. "            [20]                                     ,LINKFSM20" "Init,Clear"
textline "                               "
eventfld.long 0x08 19. "        [19]                             ,LINKFSM19" "Init,Clear"
eventfld.long 0x08 18. "            [18]                                     ,LINKFSM18" "Init,Clear"
textline "                               "
eventfld.long 0x08 17. "        [17]                             ,LINKFSM17" "Init,Clear"
eventfld.long 0x08 16. "            [16]                                     ,LINKFSM16" "Init,Clear"
textline "                               "
eventfld.long 0x08 15. "        [15]                             ,LINKFSM15" "Init,Clear"
eventfld.long 0x08 14. "            [14]                                     ,LINKFSM14" "Init,Clear"
textline "                               "
eventfld.long 0x08 13. "        [13]                             ,LINKFSM13" "Init,Clear"
eventfld.long 0x08 12. "            [12]                                     ,LINKFSM12" "Init,Clear"
textline "                               "
eventfld.long 0x08 11. "        [11]                             ,LINKFSM11" "Init,Clear"
eventfld.long 0x08 10. "            [10]                                     ,LINKFSM10" "Init,Clear"
textline "                               "
eventfld.long 0x08 9. "        [9]                              ,LINKFSM9" "Init,Clear"
eventfld.long 0x08 8. "            [8]                                      ,LINKFSM8" "Init,Clear"
textline "                               "
eventfld.long 0x08 7. "        [7]                              ,LINKFSM7" "Init,Clear"
eventfld.long 0x08 6. "            [6]                                      ,LINKFSM6" "Init,Clear"
textline "                               "
eventfld.long 0x08 5. "        [5]                              ,LINKFSM5" "Init,Clear"
eventfld.long 0x08 4. "            [4]                                      ,LINKFSM4" "Init,Clear"
textline "                               "
eventfld.long 0x08 3. "        [3]                              ,LINKFSM3" "Init,Clear"
eventfld.long 0x08 2. "            [2]                                      ,LINKFSM2" "Init,Clear"
textline "                               "
eventfld.long 0x08 1. "        [1]                              ,LINKFSM1" "Init,Clear"
eventfld.long 0x08 0. "            [0]                                      ,LINKFSM0" "Init,Clear"
line.long 0x0C "PRIV_ERRSTS,Detailed Private Error Status Register"
eventfld.long 0x0C 31. " REPLAY_TIMER_EXPIRED_ERR                ,Replay timer expired error" "No error,Error"
eventfld.long 0x0C 30. "         SA_ERR                                   ,SA error" "No error,Error"
textline "                               "
eventfld.long 0x0C 29. " DESKEW_ERR                              ,DESKEW error" "No error,Error"
eventfld.long 0x0C 28. "         TRAINING_ERR                             ,Training error" "No error,Error"
textline "                               "
eventfld.long 0x0C 27. " DLLP_CRC_ERR                            ,DLLP CRC error" "No error,Error"
eventfld.long 0x0C 26. "         8B10B_ERR                                ,8B10B error" "No error,Error"
textline "                               "
eventfld.long 0x0C 25. " REPLAY_STARTED_ERR                      ,Replay started error" "No error,Error"
eventfld.long 0x0C 24. "         REPLAY_ROLLOVER_ERR                      ,Replay rollover error" "No error,Error"
textline "                               "
eventfld.long 0x0C 23. " PWH_UPDATE_FC_ERR                       ,PWH update FC error" "No error,Error"
eventfld.long 0x0C 22. "         PWH_TOO_MANY_CREDITS_ERR                 ,PWH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 21. " PWD_UPDATE_FC_ERR                       ,PWD update FC error" "No error,Error"
eventfld.long 0x0C 20. "         PWD_TOO_MANY_CREDITS_ERR                 ,PWD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 19. " NPH_UPDATE_FC_ERR                       ,NPH update FC error" "No error,Error"
eventfld.long 0x0C 18. "         NPH_TOO_MANY_CREDITS_ERR                 ,NPH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 17. " NPD_UPDATE_FC_ERR                       ,NPD update FC error" "No error,Error"
eventfld.long 0x0C 16. "         NPD_TOO_MANY_CREDITS_ERR                 ,NPD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 15. " CH_UPDATE_FC_ERR                        ,CH update FC error" "No error,Error"
eventfld.long 0x0C 14. "         CH_TOO_MANY_CREDITS_ERR                  ,CH too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 13. " CD_UPDATE_FC_ERR                        ,CD update FC error" "No error,Error"
eventfld.long 0x0C 12. "         CD_TOO_MANY_CREDITS_ERR                  ,CD too many credits error" "No error,Error"
textline "                               "
eventfld.long 0x0C 11. " REC_OVFL_ISOPW_DATA_ERR                 ,REC overflow ISOPW data error" "No error,Error"
eventfld.long 0x0C 10. "         REC_OVFL_ISOPW_HDR_ERR                   ,REC overflow ISOPW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 9. " REC_OVFL_ISONP_HDR_ERR                  ,REC overflow ISONP HDR error" "No error,Error"
eventfld.long 0x0C 8. "         REC_OVFL_CPL_DATA_ERR                    ,REC overflow CPL data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 7. " REC_OVFL_PW_DATA_ERR                    ,REC overflow PW data error" "No error,Error"
eventfld.long 0x0C 6. "         REC_OVFL_NP_DATA_ERR                     ,REC overflow NP data error" "No error,Error"
textline "                               "
eventfld.long 0x0C 5. " REC_OVFL_CPL_HDR_ERR                    ,REC overflow CPL HDR error" "No error,Error"
eventfld.long 0x0C 4. "         REC_OVFL_PW_HDR_ERR                      ,REC overflow PW HDR error" "No error,Error"
textline "                               "
eventfld.long 0x0C 3. " REC_OVFL_NP_HDR_ERR                     ,REC overflow NP HDR error" "No error,Error"
eventfld.long 0x0C 2. "         FRAMING_ERR                              ,Framing error" "No error,Error"
textline "                               "
eventfld.long 0x0C 1. " SEQ_ERR                                 ,SEQ error" "No error,Error"
eventfld.long 0x0C 0. "         LCRC_ERR                                 ,LCRC error" "No error,Error"
line.long 0x10 "PRIV_ERRMSK,Detailed Private Error Mask Register"
bitfld.long 0x10 31. " REPLAY_TIMER_EXPIRED_ERR_EN             ,Replay timer expired error enable" "Disabled,Enabled"
bitfld.long 0x10 30. "         SA_ERR_EN                                ,SA error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 27. " DLLP_CRC_ERR_EN                         ,DLLP CRC error enable" "Disabled,Enabled"
bitfld.long 0x10 26. "         8B10B_ERR_EN                             ,8B10B error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 24. " REPLAY_ROLLOVER_ERR_EN                  ,Replay rollover error enable" "Disabled,Enabled"
bitfld.long 0x10 23. "         PWH_UPDATE_FC_ERR_EN                     ,PWH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 22. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 21. "         PWD_UPDATE_FC_ERR_EN                     ,PWD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 20. " PWD_TOO_MANY_CREDITS_ERR_EN             ,PWD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 19. "         NPH_UPDATE_FC_ERR_EN                     ,NPH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 18. " NPH_TOO_MANY_CREDITS_ERR_EN             ,NPH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 17. "         NPD_UPDATE_FC_ERR_EN                     ,NPD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 16. " NPD_TOO_MANY_CREDITS_ERR_EN             ,NPD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 15. "         CH_UPDATE_FC_ERR_EN                      ,CH update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 14. " CH_TOO_MANY_CREDITS_ERR_EN              ,CH too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 13. "         CD_UPDATE_FC_ERR_EN                      ,CD update FC error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 12. " CD_TOO_MANY_CREDITS_ERR_EN              ,CD too many credits error enable" "Disabled,Enabled"
bitfld.long 0x10 11. "         DLL_PROTOCOL_ERR_EN                      ,DLL protocol error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 2. " FRAMING_ERR_EN                          ,Framing error enable" "Disabled,Enabled"
bitfld.long 0x10 1. "         SEQ_ERR_EN                               ,SEQ error enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x10 0. " LCRC_ERR_EN                             ,LCRC error enable" "Disabled,Enabled"
line.long 0x14 "LTSSM_TRACE_CONTROL,LTSSM Trace Control Register"
bitfld.long 0x14 11.--13. " TRIG_PRX_LTSSM_MINOR                    ,Trigger PRX LTSSM minor" "0,1,2,3,4,5,6,7"
bitfld.long 0x14 8.--10. "                TRIG_PTX_LTSSM_MINOR                     ,Trigger PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x14 4.--7. " TRIG_LTSSM_MAJOR                        ,Trigger LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 3. "               TRIG_ON_EVENT                            ,Trigger on event" "Not triggered,Triggered"
textline "                               "
bitfld.long 0x14 2. " CLEAR_RAM                               ,Clear RAM" "Not cleared,Cleared"
bitfld.long 0x14 1. "      WRAP_EN                                  ,Wrap enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x14 0. " STORE_EN                                ,Store enable" "Disabled,Enabled"
line.long 0x18 "LTSSM_TRACE_STATUS,LTSSM Trace Status Register"
rbitfld.long 0x18 19.--21. " PRX_LTSSM_MINOR                         ,PRX LTSSM minor" "0,1,2,3,4,5,6,7"
rbitfld.long 0x18 16.--18. "                PTX_LTSSM_MINOR                          ,PTX LTSSM minor" "0,1,2,3,4,5,6,7"
textline "                               "
rbitfld.long 0x18 12.--15. " LTSSM_MAJOR                             ,LTSSM major" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x18 11. "               READ_DATA_VALID                          ,Read data valid" "Invalid,Valid"
textline "                               "
bitfld.long 0x18 6.--10. " READ_ADDR                               ,Read address to LTSSM trace RAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x18 1.--5. "               WRITE_PTR                                ,Current location of write pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
rbitfld.long 0x18 0. " RAM_FULL                                ,All entries in RAM has been written" "Not full,Full"
line.long 0x1C "PG,PCIe Power Gate Register"
bitfld.long 0x1C 2. " RCVD_PME_TO_ACK_INTR_EN                 ,Generation of interrupt on reception of PME TO ACK TLP" "Disabled,Enabled"
eventfld.long 0x1C 1. "         RCVD_PME_TO_ACK                          ,Root port received a PME TO ACK TLP" "Init,Clear"
textline "                               "
bitfld.long 0x1C 0. " SEND_PME_TO_MSG                         ,Send a PME TO message downstream" "Idle,Send now"
line.long 0x20 "VAR_RANGE0,PCIe Legacy I/O Decode Range Control Register 0"
hexmask.long.word 0x20 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
hexmask.long.word 0x20 2.--15. 0x04 "             BASE                                     ,Base address for the variable range positive decode addresses"
textline "                               "
bitfld.long 0x20 0. " ENABLE                                  ,Enable" "Disabled,Enabled"
line.long 0x24 "VAR_RANGE1,PCIe Legacy I/O Decode Range Control Register 1"
hexmask.long.word 0x24 18.--31. 0x04 " LIMIT                                   ,Top address for the variable range positive decode addresses"
textline "                               "
hexmask.long.word 0x24 2.--15. 0x04 " BASE                                    ,Base address for the variable range positive decode addresses"
bitfld.long 0x24 0. "             ENABLE                                   ,Enable" "Disabled,Enabled"
sif (cpuis("TEGRAX1"))
group.long 0xE80++0x1F
line.long 0x00 "T_PCIE2_RP_ECTL_1_R1,T_PCIE2_RP_ECTL_1_R1"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R1_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 18.--19. "          T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C     ,T_PCIE2_RP_ECTL_1_R1_RX_TERM_CTRL_1C" "DEFAULT,1,2,3"
textline "                               "
bitfld.long 0x00 16.--17. " T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C    ,T_PCIE2_RP_ECTL_1_R1_TX_TERM_CTRL_1C" "DEFAULT,1,2,3"
bitfld.long 0x00 12.--15. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C      ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_CTRL_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x00 8.--11. " T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C     ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_SLEW_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--5. "          T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C       ,T_PCIE2_RP_ECTL_1_R1_TX_DRV_AMP_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R1,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x04 18.--19. " T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C      ,T_PCIE2_RP_ECTL_2_R1_RX_IQ_CTRL_1C" "DEFAULT,1,2,3"
hexmask.long.word 0x04 0.--15. 1. "          T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C          ,T_PCIE2_RP_ECTL_2_R1_RX_CTLE_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R1,T_PCIE2_RP_ECTL_3_R1"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R1,T_PCIE2_RP_ECTL_4_R1"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R1_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R1_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R1,T_PCIE2_RP_ECTL_5_R1"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R1,T_PCIE2_RP_ECTL_6_R1"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_PRE_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C      ,T_PCIE2_RP_ECTL_7_R1_TX_DRV_POST_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xEA0++0x1B
line.long 0x00 "T_PCIE2_RP_ECTL_1_R2,T_PCIE2_RP_ECTL_1_R2"
bitfld.long 0x00 24.--27. " T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C         ,T_PCIE2_RP_ECTL_1_R2_RX_FELS_1C" "DEFAULT,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "T_PCIE2_RP_ECTL_2_R2,T_PCIE2_RP_ECTL_2_R2"
hexmask.long.word 0x04 16.--31. 1. " T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C          ,T_PCIE2_RP_ECTL_2_R2_RX_DFE_1C"
hexmask.long.word 0x04 0.--15. 1. "             T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C ,T_PCIE2_RP_ECTL_2_R2_CDR_CNTL_1C"
line.long 0x08 "T_PCIE2_RP_ECTL_3_R2,T_PCIE2_RP_ECTL_3_R2"
line.long 0x0C "T_PCIE2_RP_ECTL_4_R2,T_PCIE2_RP_ECTL_4_R2"
hexmask.long.word 0x0C 16.--31. 1. " T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C     ,T_PCIE2_RP_ECTL_4_R2_RX_CDR_CTRL_1C"
hexmask.long.byte 0x0C 0.--7. 1. "             T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C       ,T_PCIE2_RP_ECTL_4_R2_RX_PI_CTRL_1C"
line.long 0x10 "T_PCIE2_RP_ECTL_5_R2,T_PCIE2_RP_ECTL_5_R2"
line.long 0x14 "T_PCIE2_RP_ECTL_6_R2,T_PCIE2_RP_ECTL_6_R2"
line.long 0x18 "T_PCIE2_RP_ECTL_7_R1,T_PCIE2_RP_ECTL_7_R1"
bitfld.long 0x18 8.--13. " T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_PRE_SEL0_1C" "Default,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "          T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C ,T_PCIE2_RP_ECTL_7_R2_TX_DRV_POST_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Default,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xF00++0x0B
line.long 0x00 "VEND_XP,Vendor XP Register (NVIDIA's Implementation)"
bitfld.long 0x00 31. " FORCE_COMPLIANCE                        ,Force compliance" "Disabled,Enabled"
rbitfld.long 0x00 30. "         DL_UP                                    ,Status of data link layer in XP" "Down,Up"
textline "                               "
bitfld.long 0x00 29. " INTERLEAVE_DLLPS                        ,Interleave DLLPS" "Disabled,Enabled"
bitfld.long 0x00 28. "         OPPORTUNISTIC_UPDATEFC                   ,DL will send any pending UpdateFC packet" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 27. " OPPORTUNISTIC_ACK                       ,DL will send pending Acks" "Disabled,Enabled"
bitfld.long 0x00 26. "         TRAIN_ERR_ENABLE                         ,Enables reporting of training errors" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 18.--25. 1. " UPDATE_FC_THRESHOLD                     ,Override for the UpdateFC frequency"
hexmask.long.word 0x00 2.--17. 1. "               PRBS_STAT                                ,Results of loopback mode testing"
textline "                               "
bitfld.long 0x00 1. " PRBS_EN                                 ,Enables the root port as loopback master" "Disabled,Enabled"
sif (!cpuis("TEGRAX1")&&!cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x00 0. " EMULATION                               ,Enables emulation mode operation" "Disabled,Enabled"
endif
line.long 0x04 "VEND_XP1,Vendor XP Register 1 (NVIDIA's Implementation)"
bitfld.long 0x04 29.--31. " L1_EXIT_LATENCY                         ,L1 exit latency for the given PCI express link" "< 1us,1us - 2us,2us - 4us,4us - 8us,8us - 16us,16us -32us,32us-64us,> 64us"
bitfld.long 0x04 28. "       FORCE_DOWNSTREAM_NO_SNOOP                ,Force downstream no snoop" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 27. " FORCE_UPSTREAM_NONCOH                   ,Force upstream non-coherent" "Disabled,Enabled"
bitfld.long 0x04 26. "         NP_REQ_TIMEOUT                           ,Disable downstream NP request timeout" "No,Yes"
textline "                               "
bitfld.long 0x04 23. " IGNORE_L0S                              ,Ignore L0S" "No,Yes"
bitfld.long 0x04 22. "              DONT_MERGE_PMASNAK                       ,Don't merge PMASNAK" "Merged,Not merged"
textline "                               "
bitfld.long 0x04 21. " L1_ASPM_SUPPORT                         ,Link capability register L1 ASPM support" "Not supported,Supported"
bitfld.long 0x04 20. "    L23_READY_NO_D3                          ,L23 ready no D3" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 19. " ACK_L1_NO_WAIT                          ,ACK L1 no wait" "Disabled,Enabled"
hexmask.long.word 0x04 10.--18. 1. "         ACK_TIMER_LIMIT                          ,Overrides the Ack timer limit for this root port"
textline "                               "
bitfld.long 0x04 8. " RNCTRL_GEN2_WAIT_FOR_FIRST_EIES         ,RNCTRL GEN2 wait for first EIES" "Disabled,Enabled"
rbitfld.long 0x04 7. "         RNCTRL_EN                                ,Dynamic link width re-negotiation procedure in XP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 6. " GEN2_LINK_UPGRADE                       ,Selects the 2.0-compliant link width upgrade protocol" "Disabled,Enabled"
bitfld.long 0x04 0.--5. "         RNCTRL_MAXWIDTH                          ,Maximum link width required at the end of dynamic link width renegotiation process" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "VEND_XP2,Vendor XP Register 2 (NVIDIA's Implementation)"
hexmask.long.byte 0x08 24.--31. 1. " L0S_UPDATE_WAKE                         ,L0S update wake"
hexmask.long.word 0x08 8.--17. 1. "               L0S_THRESHOLD                            ,Controls the idle time required for TxL0s entry from L0"
textline "                               "
hexmask.long.byte 0x08 0.--7. 1. " L0S_ACK_WAKE                            ,L0S ACK wake"
sif (cpuis("TEGRAX1"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.word 0x00 20.--31. 1. " N100MS_DFPCI                            ,N100MS_DFPCI"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,MICROSECOND"
elif (cpuis("TEGRAX2"))
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Vendor XV Timeout Register (NVIDIA's Implementation)"
hexmask.long.word 0x00 20.--31. 1. "  100MS_DFPCI                            ,Number of Dfpci_clk clocks in a given 100ms interval"
hexmask.long.word 0x00 0.--9. 1. "             MICROSECOND                              ,Various timers required by PCI-express specification"
group.long 0xF14++0x07
line.long 0x00 "VEND_XV_CMN,Vendor XV CMN Register (NVIDIA's Implementation)"
bitfld.long 0x00 29.--31. " ISO2TC_MAP                              ,TC to be used for FPCI ISO transactions" "0,1,2,3,4,5,6,7"
line.long 0x04 "VEND_THERM_MGMT,Vendor THERM MGMT"
hexmask.long.word 0x04 4.--15. 1. " PERIOD                                  ,Defines period (in microseconds) for the purpose of throttling"
bitfld.long 0x04 1.--3. "             DUTY_CYCLE                               ,Defines fraction of PERIOD throttling is applied" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x04 0. " ENABLE                                  ,Enables throttling of PCIe traffic" "Disabled,Enabled"
else
group.long 0xF0C++0x03
line.long 0x00 "VEND_XV_TIMEOUT,Fields unique to NVIDIA's implementation of PCI Express devices"
hexmask.long.tbyte 0x00 0.--23. 1. " VEND_XV_TIMEOUT                         ,VEND_XV_TIMEOUT"
endif
group.long 0xF20++0x03
line.long 0x00 "VEND_SLOT_STRAP,Vendor Slot Capabilities Register"
sif (cpuis("TEGRAX2"))
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 18. "             NO_CMD_COMPLETED_SUPPORT                 ,No CMD completed support" "Not supported,Supported"
textline "                               "
bitfld.long 0x00 17. " ELECTROMECH_INTERLOCK_PRESENT           ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "      SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
bitfld.long 0x00 6. "               HOT_PLUG_CAPABLE                         ,Supporting hot-plug operations" "Not capable,Capable"
textline "                               "
bitfld.long 0x00 5. " HOT_PLUG_SURPRISE                       ,Hot-plug surprise" "Disabled,Enabled"
bitfld.long 0x00 4. "         POWER_INDICATOR_PRESENT                  ,Power indicator" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 3. " ATTENTION_INDICATOR_PRESENT             ,Attention Indicator" "Not implemented,Implemented"
bitfld.long 0x00 2. "  MRL_SENSOR_PRESENT                       ,MRL Sensor" "Not implemented,Implemented"
textline "                               "
bitfld.long 0x00 1. " POWER_CONTROLLER_PRESENT                ,Power Controller" "Not implemented,Implemented"
bitfld.long 0x00 0. "  ATTENTION_BUTTON_PRESENT                 ,Attention Button" "Not implemented,Implemented"
else
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER                    ,Physical slot number"
bitfld.long 0x00 15.--16. "             SLOT_POWER_LIMIT_SCALE                   ,Slot power limit scale" "0,1,2,3"
textline "                               "
hexmask.long.byte 0x00 7.--14. 1. " SLOT_POWER_LIMIT_VALUE                  ,Slot power limit value"
endif
sif (cpuis("TEGRAX1"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,This register contains diagnostic bits used in XP"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,ADVANCE_BY_2_CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK_SCHEDULE_CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK_NPT_EMPTY_CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2_READ_FIX_EN" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,MICROSECOND_ENABLE" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,MICROSECOND_LIMIT"
elif (cpuis("TEGRAX2"))
group.long 0xF30++0x03
line.long 0x00 "RP_XP_REF,RP XP Reference Register"
hexmask.long.tbyte 0x00 14.--31. 1. " CPL_TO_CUSTOM_VALUE                     ,User-specified value to use for completion timeout"
bitfld.long 0x00 13. "           CPL_TO_OVERRIDE                          ,Enables the user override mode for completion timeout" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 12. " ADVANCE_BY_2_CYA                        ,Advanced by 2 CYA" "Disabled,Enabled"
bitfld.long 0x00 11. "         NAK_SCHEDULE_CYA                         ,NAK schedule CYA" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " RXL2LINK_NPT_EMPTY_CYA                  ,RXL2LINK NPT empty CYA" "Disabled,Enabled"
bitfld.long 0x00 9. "         L2_READ_FIX_EN                           ,L2 read fix enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 8. " MICROSECOND_ENABLE                      ,Microsecond enable" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "         MICROSECOND_LIMIT                        ,Counter value to be used to reset the one microsecond counter used for update FC scheduling"
group.long 0xF44++0x03
line.long 0x00 "VEND_CYA0,Vendor CYA0 Register"
bitfld.long 0x00 30. " FORCE_RETRY_POSSIBLE                    ,Force retry possible" "No,Yes"
bitfld.long 0x00 29. "              UP_NC2C                                  ,Forces all upstream non-coherent traffic to coherent" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 28. " DROP_VDM_TYPE1                          ,VDM messages with vendor ID other than NVIDIA drop enable" "Disabled,Enabled"
bitfld.long 0x00 27. "         DROP_NV_VDM_TYPE1                        ,VDM messages with vendor ID NVIDIA(0x10DE) drop enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 26. " REL_CRDT_4PKT_DRP_RXL                   ,Credits for the VDM packet dropped release enable" "Disabled,Enabled"
bitfld.long 0x00 25. "         LTR_EN                                   ,Hide LTR capability enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 24. " ALLOW_ALL_DS_RO                         ,Allow all DS RO" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "         NATIVE_P2P_STARVE_COUNT                  ,Native P2P starve count"
textline "                               "
bitfld.long 0x00 12.--15. " DSK_RESET_PULSE_WIDTH                   ,Number of symbol times Deskewer should hold RX fifos in hot_reset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "               FINISH_PKT_ON_RCVRY_EN                   ,Finish packet on recovery enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 10. " UR_PW_DROP_ALL_MODE                     ,UR PW drop all mode" "No,Yes"
bitfld.long 0x00 9. "              DROP_ALL_MODE                            ,Drop all mode" "No,Yes"
textline "                               "
bitfld.long 0x00 6.--8. " MAX_PAYLOAD_SIZE                        ,Max payload size" "INIT,,,,,4KB,,Auto"
bitfld.long 0x00 5. "             ADR64                                    ,64-bit addressing mode" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " IGNORE_BME                              ,Ignores BMS and accepts upstream PCIe transactions" "Not ignored,Ignored"
bitfld.long 0x00 3. "      UFPCI_BLOCK_B2B_NP                       ,UFPCI block back-to-back NP" "No,Yes"
textline "                               "
bitfld.long 0x00 2. " GPU_NISONC2HPISO                        ,GPU NISONC2HPISO" "Disabled,Enabled"
bitfld.long 0x00 1. "         PASSPW_RO                                ,PASSPW RO" "No,Yes"
textline "                               "
bitfld.long 0x00 0. " REL_CREDIT_UR_PW                        ,Credits for the ur_pw received release" "No,Yes"
else
group.long 0xF34++0x0F
line.long 0x00 "ECTL_2_R1,ECTL_2_R1"
hexmask.long.word 0x00 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.byte 0x00 8.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
textline "                               "
hexmask.long.byte 0x00 0.--7. 1. " CDR_CNTL_1C                             ,CDR_CNTL_1C"
line.long 0x04 "ECTL_3_R1,ECTL_3_R1"
bitfld.long 0x04 8.--11. " TX_PEAK_PRE_1C                          ,TX_PEAK_PRE_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--4. "               TX_PEAK_1C                               ,TX_PEAK_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "ECTL_2_R2,ECTL_2_R2"
hexmask.long.word 0x08 16.--31. 1. " RX_DFE_1C                               ,RX_DFE_1C"
hexmask.long.word 0x08 0.--15. 1. "             RX_EQ_1C                                 ,RX_EQ_1C"
line.long 0x0C "ECTL_3_R2,ECTL_3_R2"
bitfld.long 0x0C 24.--27. " PRE_SEL1_1C                             ,PRE_SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 16.--20. "               SEL1_1C                                  ,SEL1_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                               "
bitfld.long 0x0C 8.--11. " PRE_SEL0_1C                             ,PRE_SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--4. "               SEL0_1C                                  ,SEL0_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0xF48++0x07
line.long 0x00 "VEND_CTL1,Vendor Control Register 1 (NVIDIA's Implementation)"
bitfld.long 0x00 21. " POLLING_RESET_FIX_EN                    ,Polling reset fix enable" "Disabled,Enabled"
bitfld.long 0x00 20. "         HOTPLUG_IN_TRAFFIC_EN                    ,Hotplug in traffic enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 19. " NISO2ISO                                ,All upstream non-ISO-PW and non-ISO-NP will be upgraded to ISO" "Disabled,Enabled"
bitfld.long 0x00 18. "         ALLOW_UPSTREAM_CMPL_OVERTAKE_PW          ,UBFI allows CPL bypass PW regardless of RO bit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 17. " SPLIT_ARB_BLOCK_COH                     ,Split ARB block coherent" "Disabled,Enabled"
bitfld.long 0x00 16. "         HIDE_MSIMAP                              ,Hide MSIMAP" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 15. " LINKACTV_REPORTING                      ,Setting the data link layer link active reporting capable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "         P2P_ISO2NIS                              ,Forces upstream peer-to-peer ISO requests to be peer-to-peer NONISO" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 13. " ERPT                                    ,ERPT" "Disabled,Enabled"
bitfld.long 0x00 12. "         HIDE_MSI_CAP                             ,Hides the entire MSI capability structure from the capabilities list" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 4. " ACCEPT_MSGD1                            ,Allows acceptance of NVIDIA specific vendor type message with data" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "         TC2ISO_MAP                               ,TC2ISO MAP" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x00 0. " P2P_BLOCK_P2P_ONLY                      ,P2P block P2P only" "Disabled,Enabled"
line.long 0x04 "VEND_XP_BIST,IOBIST And Characterization Control Register (NVIDIA's Implementation)"
bitfld.long 0x04 30. " GOTO_DETECT_ON_SURPRISE_EIDLE           ,Goto detect on surprise EIDLE" "Disabled,Enabled"
bitfld.long 0x04 29. "         ENABLE_SERR_REPORTING                    ,Enable SERR reporting" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 28. " GOTO_L1_L2_AFTER_DLLP_DONE              ,Goto L1 L2 after DLLP done" "Disabled,Enabled"
bitfld.long 0x04 27. "         CTRL_IGNORE_LPBK_EXIT                    ,Control ignore LPBK exit" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 26. " CTRL_RELAX_LPBK_ENTRY                   ,Control relax LPBK entry" "Disabled,Enabled"
bitfld.long 0x04 25. "         CTRL_FORCE_PRBS_RST                      ,Control force PRBS reset" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 24. " FORCE_DEEMPHASIS_ADVERTISED_EN          ,Force Deemphasis advertised enable" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 23. " POWER_UP_BYPASS                         ,Power up bypass" "No bypass,Bypass"
endif
textline "                               "
bitfld.long 0x04 22. " FORCE_RECEIVER_COMPLIANCE_EN            ,Force reciver compliance enable" "Disabled,Enabled"
bitfld.long 0x04 21. "         FORCE_COMPLIANCE_GEN2_SPEED_EN           ,Force compliance GEN2 speed enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x04 20. " FORCE_COMPLIANCE_AND_ADVERTISE_MODE     ,Force compliance and advertise mode" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                               "
bitfld.long 0x04 19. " PRESERVE_TX_PACKET_DURING_SPEED_CHANGE  ,Preserve TX packet during speed change" "Not preserved,Preserved"
bitfld.long 0x04 18. "    GEN2_EXIT_USE_STAT_IDLE                  ,GEN2 exit use status idle" "Not idle,Idle"
textline "                               "
bitfld.long 0x04 17. " GEN2_LOOPBACK                           ,GEN2 loopback" "0,1"
bitfld.long 0x04 16. "                SA_EXTRA_RESET_EN_RANGE                  ,SA extra reset enable range" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x04 6.--15. 1. " CTRL_TX_PTRN_RANGE                      ,Control TX PTRN range"
bitfld.long 0x04 4.--5. "             TEST_MODE_RANGE                          ,Test mode range" "0,1,2,3"
textline "                               "
bitfld.long 0x04 3. " NOSCRAMBLE_RANGE                        ,No scramble range" "0,1"
bitfld.long 0x04 2. "                EIDLE_DATA_RANGE                         ,EIDLE data range" "0,1"
textline "                               "
bitfld.long 0x04 1. " EIDLE_OVERRIDE_RANGE                    ,EIDLE override range" "0,1"
bitfld.long 0x04 0. "                RDET_BYPASS_RANGE                        ,RDET bypass range" "0,1"
endif
textline "                               "
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
width 22.
group.long 0xF50++0x03
line.long 0x00 "VEND_XP_PAD_PWRDN,Vendor XP PAD Powerdown (NVIDIA's Implementation)"
bitfld.long 0x00 31. " IDLE_MODE_L1_CLKREQ  ,Idle mode L1 clock request" "0,1"
bitfld.long 0x00 30. "         IDLE_MODE_DYNAMIC         ,Idle mode dynamic" "0,1"
textline "                               "
bitfld.long 0x00 29. " IDLE_MODE_L1         ,Idle mode L1" "0,1"
bitfld.long 0x00 28. "         XVR_USE_DFPCI_DATA_UNINTR ,XVR use DFPCI data UNINTR" "Disabled,Enabled"
textline "                               "
hexmask.long.word 0x00 18.--27. 1. " MICROSECOND          ,Various timers required by PCI-express specification"
bitfld.long 0x00 16.--17. "      SLEEP_MODE_L1_CLKREQ      ,Defines the 2-bit sleep-mode coding when clkreq is deasserted in L1" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 15. " L1_CLKREQ            ,Power down to SLEEP_MODE_L1_REQ enable" "Disabled,Enabled"
textline "                               "
hexmask.long.byte 0x00 8.--14. 1. " MINIMUM              ,Minimum number of Gen1 xclks(4ns) that analog pads must remain powered down (or up) before the LTSSM attempts to power them back up/down again"
textline "                               "
bitfld.long 0x00 5.--6. " SLEEP_MODE_DYNAMIC   ,2-bit sleep-mode coding in the pad when the lane shut down due to dynamic link downsizing" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 3.--4. " SLEEP_MODE_L1        ,2-bit sleep-mode coding in the pad when LTSSM is in the L1 state or DISABLED state" "L0,L1,L1P,L1PP"
textline "                               "
bitfld.long 0x00 2. " DISABLED             ,Enable analog pads to power down in the DISABLED_DOWN state" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 1. " DYNAMIC              ,Enable unused analog pads to power down after dynamic link width re-negotiation takes place" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 0. " L1                   ,Enable analog pads to power down when in L1 state" "Disabled,Enabled"
endif
textline "     "
width 22.
group.long 0xF54++0x07
line.long 0x00 "VEND_XP_FTS,Vendor XP FTS (NVIDIA's Implementation)"
hexmask.long.byte 0x00 24.--31. 1. " TS_DETECT_START      ,TS detect start"
hexmask.long.byte 0x00 16.--23. 1. "        FTS_DETECT_START          ,Number of symbol times we wait before the root port begins looking at FTS ordered sets when exiting L0s"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " N_FTS_REMOTE         ,N_FTS value advertised by the remote device"
hexmask.long.byte 0x00 0.--7. 1. "        N_FTS                     ,N_FTS value that we advertise to the device on the other side of the link"
line.long 0x04 "VEND_XP_STATS0,Vendor XP States Register 0"
bitfld.long 0x04 28. " FAILED_L0S_EXITS_INF ,Failed L0s exit counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 24. "       FAILED_L0S_EXITS_LC       ,Failed L0S exits LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 20. " NAKS_RCVD_INF        ,NAKs received counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 16. "       NAKS_RCVD_LC              ,NAKS received LC" "No effect,Clear"
textline "                               "
bitfld.long 0x04 12. " CRC_ERRORS_INF       ,CRC error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 8. "       CRC_ERRORS_LC             ,Current value from the CRC error counter" "No effect,Clear"
textline "                               "
bitfld.long 0x04 4. " 8B10B_ERRORS_INF     ,8b/10b error counter accumulates indefinitely" "No,Yes"
eventfld.long 0x04 0. "       8B10B_ERRORS_LC           ,Current value from the 8b/10b error counter" "No effect,Clear"
rgroup.long 0xF5C++0x07
line.long 0x00 "VEND_XP_STATS1,Vendor XP States Register 1"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x00 24.--31. 1. " FAILED_L0S_EXITS     ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
hexmask.long.byte 0x00 16.--23. 1. "        NAKS_RCVD                 ,Counts the number of NAKs received from the endpoint in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " CRC_ERRORS           ,Counts the number of CRC errors detected in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        8B10B_ERRORS              ,Counts the number of 8b/10b errors detected in one microsecond"
else
hexmask.long.byte 0x00 24.--31. 1. " 8B10B_ERRORS         ,Counts the number of 8b/10b errors detected in one microsecond"
hexmask.long.byte 0x00 16.--23. 1. "        CRC_ERRORS                ,Counts the number of CRC errors detected in 64 microseconds"
textline "                               "
hexmask.long.byte 0x00 8.--15. 1. " NAKS_RCVD            ,Counts the number of NAKs received from the endpoint in 64 microseconds"
hexmask.long.byte 0x00 0.--7. 1. "        FAILED_L0S_EXITS          ,Counts the number of times the RX side of the XP went into Recovery in one millisecond"
endif
line.long 0x04 "VEND_ERROR_COUNT,Vendor Error Count Register"
hexmask.long.byte 0x04 16.--23. 1. " REPLAY               ,Counts number of times TXBA replays"
hexmask.long.byte 0x04 8.--15. 1. "        BAD_TLP                   ,Counts bad tlps reported by RXL"
textline "                               "
hexmask.long.byte 0x04 0.--7. 1. " LCRC_ERR             ,Counts LCRCL Errors reported by RXL"
textline "                               "
width 28.
group.long 0xF64++0x0B
line.long 0x00 "CFG_MISC,Config Miscellaneous Register (NVIDIA's Implementation)"
hexmask.long.byte 0x00 0.--7. 1. " MUTE_IDLE                  ,Mute idle"
line.long 0x04 "PRIV_XP_INIT_RECOVERY,Private XP Initialize Recovery Register (NVIDIA's Implementation)"
bitfld.long 0x04 31. " 8B10B_ERROR_ENABLE         ,8B10B feature enable" "Disabled,Enabled"
hexmask.long.word 0x04 20.--30. 1. "     8B10B_ERROR_WINDOW          ,CPrograms the time frame in multiples of 1 microsecond"
textline "                                     "
hexmask.long.tbyte 0x04 0.--19. 1. " 8B10B_ERROR_THRESHOLD      ,Programs the 8b10b error threshold"
line.long 0x08 "PRIV_XP_LCTRL_2,Private XP LCTRL (NVIDIA's Implementation)"
rbitfld.long 0x08 31. " UPCONFIGURE_CAPABLE        ,Gen2 link width up-configure capability" "Not capable,Capable"
bitfld.long 0x08 30. "  REV2P0_COMPLIANCE_DIS       ,Disable advertising rev2.0 support and link width up-configure capability" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 29. " EIDLE_INFERENCE_EN         ,Disable electrical idle inference" "No,Yes"
bitfld.long 0x08 28. "          SURPRISE_IDLE_USE_STAT_IDLE ,Surprise idle use status idle" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 27. " ALLOW_SPEED_CHANGE_FROM_L1 ,Allow speed change to be initiated from the L1 or Rx_L0s link states" "Disabled,Enabled"
bitfld.long 0x08 24.--26. "     RECOVERY_SPEED_TIMEOUT_ADJ  ,Adjust minimum length of time the transmitter stays in idle in the Recover Sped state" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x08 20.--23. " N_EIE_SYMBOLS              ,Number of K28.7 symbols" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 19. "           DEEMPHASIS_STRAP            ,DEEMPHASIS_STRAP" "-6db,-3.5db"
textline "                                     "
bitfld.long 0x08 18. " ENFORCE_DEEMPHASIS         ,Forces root port to use de-emphasis value" "Disabled,Enabled"
bitfld.long 0x08 17. "     POLLING_PREDETERMINED_LANES ,Polling predetermined lanes" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x08 16. " AUTONOMOUS_CHANGE          ,Autonomous change" "No,Yes"
rbitfld.long 0x08 12.--15. "          DATA_RATE_SUPPORTED_REMOTE  ,Gen2 data rate supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 8.--11. " DATA_RATE_SUPPORTED        ,Supported link speed reported in the link capabilities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "           TARGET_LINK_SPEED           ,Specifies the link rate to change to" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.long 0x08 3. " TX_MARGIN_OVERRIDE         ,TX_MARGIN_OVERRIDE" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 2. "     CYA_DEEMPHASIS_OVERRIDE     ,CYA deemphasis override" "No override,Override"
endif
bitfld.long 0x08 1. "     ADVERTISED_RATE_CHANGE      ,ADVERTISED_RATE_CHANGE" "No effect,Change"
textline "                                     "
bitfld.long 0x08 0. " SPEED_CHANGE               ,Link speed negotiation procedure" "No effect,Change"
group.long 0xF74++0x03
line.long 0x00 "PRIV_XP_PAD_PWRUP,Private XP PAD_Powerup"
hexmask.long.byte 0x00 16.--23. 1. " PMRX_PWRUP_THRESHOLD       ,Time to hold CDR at reset in Recovery"
sif (cpuis("TEGRAX2"))
group.long 0xF78++0x03
line.long 0x00 "PRIV_XP_PAD_GEN2_PAD_PWRDN,Private XP PAD GEN2 PAD Powerdown"
hexmask.long.byte 0x00 16.--23. 1. " MICROSECOND                ,Number of xclks in 1 microsecond when running at gen2 speed"
endif
group.long 0xF84++0x03
line.long 0x00 "PRIV_XP_RECOVERY_REASONS,Register Records The Reasons We Went Into Recovery"
textline "                                     "
width 30.
sif (cpuis("TEGRAX2"))
rgroup.long 0xF88++0x07
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number Of RECOVERY STATE Entries In XP By The XVR"
line.long 0x04 "PRIV_XP_L0S_ENTRY_COUNT,Number Of Entries From L0 To L0s At ltssm Side"
rgroup.long 0xF94++0x0B
line.long 0x00 "PRIV_XP_L1_ENTRY_COUNT,Number Of Entries From L0 To L1 It Is Reset Whenever It Is Read"
line.long 0x04 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number Of Entries From L1 To Recovery"
line.long 0x08 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number Of Entries From L0 To Recovery"
bitfld.long 0x08 8. " REASON                          ,Reason" "All,Error"
textline "                                       "
hexmask.long.byte 0x08 0.--7. 1. " VALUE                           ,Value"
else
rgroup.long 0xF88++0x13
line.long 0x00 "PRIV_XP_RECOVERY_COUNT,Number of RECOVERY STATE entries in XP by the XVR"
line.long 0x04 "PRIV_XP_RX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm RX side"
line.long 0x08 "PRIV_XP_TX_L0S_ENTRY_COUNT,Number of entries from L0 to L0s at ltssm TX side"
line.long 0x0C "PRIV_XP_L1_ENTRY_COUNT,Number of entries from L0 to L1 It is reset whenever it is read"
line.long 0x10 "PRIV_XP_L1_TO_RECOVERY_COUNT,Number of entries from L1 to Recovery"
group.long 0xF9C++0x03
line.long 0x00 "PRIV_XP_L0_TO_RECOVERY_COUNT,Number of entries from L0 to Recovery"
bitfld.long 0x00 8. " REASON                          ,REASON" "All,Error"
textline "                                       "
hexmask.long.byte 0x00 0.--7. 1. " VALUE                           ,VALUE"
endif
rgroup.long 0xFA0++0x07
line.long 0x00 "PRIV_XP_L1P_ENTRY_COUNT,Number Of Entries From L0 To Deep L1"
line.long 0x04 "PRIV_XP_ASLM_COUNT,Number Of Switching Between X1 And X16 for Gen2 Only"
group.long 0xFA8++0x07
line.long 0x00 "VEND_CTL2,Vendor Control Register (Miscellaneous)"
bitfld.long 0x00 24. " COMPLIANCE_X8_DELAY             ,CTL for compliance delay pattern" "Wrap on n-1,Wrap on 8/16 mod 8"
textline "                                       "
bitfld.long 0x00 23. " IGNORE_ATTENTION_BUTTON_MSG     ,Ignore upstream attention button" "Not ignored,Ignored"
textline "                                       "
bitfld.long 0x00 22. " UNBLOCK_UP_TRANSACTIONS         ,Unblock up transaction" "Blocked,Unblocked"
textline "                                       "
bitfld.long 0x00 21. " BLOCK_UP_TRANSACTIONS_ON_ERR    ,Block all upstream transaction after an error" "Enabled,Disabled"
textline "                                       "
bitfld.long 0x00 20. " HW_AUTO_WIDTH_DISABLE_DIS       ,HW auto width disable disable" "False,True"
textline "                                       "
bitfld.long 0x00 19. " BW_MANAGEMENT_INT_EN_DIS        ,BW management INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 18. " AUTO_BANDWIDTH_INT_EN_DIS       ,Auto bandwidth INT enable disable" "False,True"
textline "                                       "
bitfld.long 0x00 17. " AUTO_BANDWIDTH_DIS              ,Auto bandwidth disable" "False,True"
textline "                                       "
bitfld.long 0x00 16. " BW_MANAGEMENT_DIS               ,BW management disable" "False,True"
textline "                                       "
bitfld.long 0x00 13. " SHADOW_LINK_BW_NOTIFY_CAP       ,Shadow link BW notify capable" "Disabled,Enabled"
textline "                                       "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
else
rbitfld.long 0x00 12. " GEN2_PROTOCOL_DISABLE           ,GEN2 protocol disable" "No,Yes"
endif
textline "                                       "
bitfld.long 0x00 11. " SLOT_IMPLEMENTED                ,Slot implemented" "Not implemented,Implemented"
textline "                                       "
eventfld.long 0x00 9. " ERR_STS_HOTPLUG_PME             ,Error STS hotplug PME" "No error,Error"
textline "                                       "
eventfld.long 0x00 8. " ERR_STS_HOTPLUG_NMI             ,Error STS hotplug NMI" "No error,Error"
textline "                                       "
bitfld.long 0x00 7. " PCA_ENABLE                      ,Enable/disable the PCA in any TMS" "Disabled,Enabled"
textline "                                       "
bitfld.long 0x00 5. " GEN2_SPEED_DISABLE              ,Gen 2 protocol speed disable" "No,Yes"
textline "                                       "
bitfld.long 0x00 4. " GEN2_PROTOCOL_DISABLE           ,Disable gen2 protocol and will force the use of Gen 1.1 protocol" "No,Yes"
textline "                                       "
bitfld.long 0x00 2. " DEV_CAP_EXTENDED_TAG_FIELD_SIZE ,DEV capable extended tag field size" "5bit,8bit"
textline "                                       "
bitfld.long 0x00 1. " DIS_MA_TA_EP_MERGE              ,Disables the logic which takes care of merging of EP/MA/TA" "No,Yes"
line.long 0x04 "PRIV_XP_CONFIG,Private XP Config"
bitfld.long 0x04 0.--1. " LOW_PWR_DURATION                ,information logging for the health and performance counters" "TX_L0S,RX_L0S,L1,Idle"
textline "                                            "
width 35.
rgroup.long 0xFB0++0x03
line.long 0x00 "PRIV_XP_DURATION_IN_LOW_PWR_100NS,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
textline "                                            "
sif (cpuis("TEGRAX2"))
rgroup.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
else
group.long 0xFB4++0x03
line.long 0x00 "PRIV_XP_SKP_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 13.--25. 1. " THRESHOLD_GEN2 ,Threshold GEN2"
hexmask.long.word 0x00 0.--12. 1. "  THRESHOLD ,Threshold"
endif
textline "                              "
group.long 0xFB8++0x03
line.long 0x00 "PRIV_XP_EIDLE_INFERENCE_TIMEOUT,Counts The Duration In Multiples Of 100ns For The Type Of Low Power Information"
hexmask.long.word 0x00 16.--31. 1. " TIMEOUT_B      ,UI window for electrical idle exit not detected in the Recover"
textline "                                          "
hexmask.long.word 0x00 0.--15. 1. "   TIMEOUT_A      ,UI window for COM not detected in the Recovery"
textline "                              "
width 25.
sif (cpuis("TEGRAX2"))
group.long 0xFBC++0x03
line.long 0x00 "SLOT_CONTROL_STATUS_HPC,Slot Control Status HPC Register"
hexmask.long.word 0x00 16.--31. 1. " COMMAND                                             ,Command"
hexmask.long.byte 0x00 8.--15. 1. "         STATE         ,State"
textline "                                  "
eventfld.long 0x00 7. " STATE_CHANGE7                                       ,State change 7" "Not changed,Changed"
eventfld.long 0x00 6. "  STATE_CHANGE6 ,State change 6" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 5. " STATE_CHANGE5                                       ,State change 5" "Not changed,Changed"
eventfld.long 0x00 4. "  STATE_CHANGE4 ,State change 4" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 3. " STATE_CHANGE3                                       ,State change 3" "Not changed,Changed"
eventfld.long 0x00 2. "  STATE_CHANGE2 ,State change 2" "Not changed,Changed"
textline "                                  "
eventfld.long 0x00 1. " STATE_CHANGE1                                       ,State change 1" "Not changed,Changed"
eventfld.long 0x00 0. "  STATE_CHANGE0 ,State change 0" "Not changed,Changed"
group.long 0xFC4++0x07
line.long 0x00 "VEND_XP_LANEMAP1,Vendor XP Lane MAP 1"
bitfld.long 0x00 28.--31. " LANE_15                                             ,Lane 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "           LANE_14       ,Lane 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20.--23. " LANE_13                                             ,Lane 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "           LANE_12       ,Lane 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 12.--15. " LANE_11                                             ,Lane 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "           LANE_10       ,Lane 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 4.--7. " LANE_9                                              ,Lane 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "           LANE_8        ,Lane 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "VEND_SS_1,Shadow Register Of SS 1"
hexmask.long.word 0x04 16.--31. 1. " SSID                                                ,SSID"
hexmask.long.word 0x04 0.--15. 1. "         SSVID         ,SSVID"
endif
sif (!cpuis("TEGRAX2"))
group.long 0xFC8++0x0B
line.long 0x00 "VEND_SHADOW,Shadow register of SS_1"
hexmask.long.word 0x00 16.--31. 1. " SS_1_SSID                                           ,SS_1_SSID"
textline "                                  "
hexmask.long.word 0x00 0.--15. 1. " SS_1_SSVID                                          ,SS_1_SSVID"
line.long 0x04 "TX_MARGIN_MAP0_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x04 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x04 24.--29. " CODE3                                               ,CODE3" "Init,,,,,,,,Mobile,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 16.--21. " CODE2                                               ,CODE2" "Init,,,,,,,,,,Mobile,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 8.--13. " CODE1                                               ,CODE1" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x04 0.--5. " CODE0                                               ,CODE0" "Init,,,,,,,,,,,,Mobile,,,,,,,,,,,,,,,,,,,,Desktop,?..."
line.long 0x08 "TX_MARGIN_MAP1_TX_AMP,Mapping of the Transmit Margin field in the Link Control 2 register"
bitfld.long 0x08 30.--31. " CTL                                                 ,CTL" "0,1,2,3"
textline "                                  "
bitfld.long 0x08 24.--29. " CODE7                                               ,CODE7" "Mobile,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 16.--21. " CODE6                                               ,CODE6" "Init,,Mobile,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 8.--13. " CODE5                                               ,CODE5" "Init,,,,Mobile,,,,,,,,Desktop,?..."
textline "                                  "
bitfld.long 0x08 0.--5. " CODE4                                               ,CODE4" "Init,,,,,,Mobile,,,,,,,,,,Desktop,?..."
endif
textline "                                  "
sif (cpuis("TEGRAK1"))
group.long 0xFD4++0x03
line.long 0x00 "ECTL_1_R1,ECTL_1_R1"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xFD8++0x03
line.long 0x00 "ECTL_1_R2,ECTL_1_R2"
bitfld.long 0x00 28.--31. " TX_DRV_CNTL_1C                                      ,TX_DRV_CNTL_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 20. " RX_QEYE_EN_1C                                       ,RX_ QEYE_EN_1C" "0,1"
textline "                                  "
bitfld.long 0x00 16.--18. " RX_WANDER_1C                                        ,RX_WANDER_1C" "0,1,2,3,4,5,6,7"
textline "                                  "
bitfld.long 0x00 14.--15. " RX_TERM_CNTL_1C                                     ,_RX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 12.--13. " TX_TERM_CNTL_1C                                     ,TX_TERM_CNTL_1C" "0,1,2,3"
textline "                                  "
bitfld.long 0x00 8.--11. " TX_CMADJ_1C                                         ,TX_CMADJ_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 0.--5. " TX_AMP_1C                                           ,TX_AMP_1C" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0xFDC++0x07
line.long 0x00 "TIMEOUT2,Timeout 2 Register"
bitfld.long 0x00 0.--4. " MIN_L1_L2_IDLE_TIME                                 ,Sets minimum amount of time we stay in L1/L2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "PRIV_MISC,Private Miscellaneous Register"
bitfld.long 0x04 31. " TMS_CLK_CLAMP_ENABLE                                ,Enables per-TMS XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 24.--30. 1. " CLK_CLAMP_THRESHOLD                                 ,Number of contiguous nbref_clks (25MHz) after clamping"
textline "                                  "
bitfld.long 0x04 23. " CTLR_CLK_CLAMP_ENABLE                               ,Enables per-controller XCLK/XTXCLK clamping" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x04 16.--22. 1. " CTLR_CLK_CLAMP_THRESHOLD                            ,Number of contiguous nbref_clks (12MHz) after clamping"
sif (cpuis("TEGRAX2"))
textline "                                  "
bitfld.long 0x04 4. " USE_EXT_CLKREQ                                      ,Use EXT CLKREQ" "Not used,Used"
endif
textline "                                  "
bitfld.long 0x04 0.--3. " PRSNT_MAP                                           ,PRSNT MAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
sif (cpuis("TEGRAX2"))
group.long 0xFE4++0x03
line.long 0x00 "BIST_CTRL_2,BIST Control 2 Register"
bitfld.long 0x00 31. " OVERRIDE_JTAG                                       ,Internal JTAG register override" "No override,Override"
textline "                                  "
bitfld.long 0x00 4.--7. " TX_CHAR_SPEED                                       ,Speed of TXCHAR output" ",2.5Gbps,5.0Gbps,?..."
textline "                                  "
bitfld.long 0x00 3. " TXCHAR_MIN_EIDLE                                    ,Force LTSSM to spend minimum time in E-idle" "Not forced,Forced"
textline "                                  "
bitfld.long 0x00 2. " TXCHAR_EIDLE_EXIT                                   ,Transition from E-idle to compliance pattern" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 1. " TXCHAR_EIDLE_ENTRY                                  ,Transition from compliance pattern to E-idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " SHORT_LINK_TIMERS                                   ,Shortened timers in LINK" "Disabled,Enabled"
endif
group.long 0xFE8++0x03
line.long 0x00 "VEND_XP3,Symbol Alignment Error Handling Register"
hexmask.long.byte 0x00 0.--7. 1. " SA_ERROR_LIMIT                                      ,Specifies number of misaligned COM symbols"
group.long 0xFEC++0x03
line.long 0x00 "XP_CTL_1,Control Registers Used In XP"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CYA_RP_INITIATED_WAKE_ON_TLP                        ,Initiated wake one TLP" "Disabled,Enabled"
textline "                                  "
endif
sif (cpuis("TEGRAX1"))
bitfld.long 0x00 29.--30. " SPARE                                               ,SPARE" "0,1,2,3"
textline "                                  "
else
bitfld.long 0x00 28.--30. " SPARE                                               ,Spare" "0,1,2,3,4,5,6,7"
textline "                                  "
endif
bitfld.long 0x00 27. " EXIT_L1_AT_CLKREQ_ASSERTION                         ,When set,ltssm will exit L1 when clkreq assertion happens" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 26. " NEW_IOBIST_CTRL                                     ,Enable control signals from iobist" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 25. " OLD_IOBIST_EN                                       ,When set will enable old iobist,else it will enable new iobist" "New,Old"
textline "                                  "
bitfld.long 0x00 19.--24. " EIOS_DEBOUNCE_TIMER                                 ,Number of xclk for which rx_data_en signals need to be deasserted before asserting it again" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                  "
bitfld.long 0x00 18. " DISABLE_RX_LANE_AFTER_EIOS                          ,Disable rx_lane_en after EIOS is seen in any of the enabled lane during recovery" "No,Yes"
textline "                                  "
bitfld.long 0x00 17. " ENABLE_DESKEW_FOR_SPDCH_NEGOTIATION                 ,LTSSM enable deskew in recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 16. " BYPASS_CONFIG_PWRUP                                 ,Bypass config powerup" "0,1"
textline "                                  "
bitfld.long 0x00 15. " RESET_TS_CTRL_ON_ERROR                              ,Reset TS control on error" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 14. " RX_EIDLE_EXIT_TIMER_IN_CONFIG                       ,RX EIDLE exit timer in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 13. " FORCE_RESET_IN_CONFIG                               ,Force reset in config" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 12. " LINK_RESIZE_PWRDN_CTL                               ,Link resize powerdown control" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 11. " ALLOW_SPEED_CHANGE_FROM_L0S                         ,When set,LTSSM will initiate link speed/width/advertised rate change" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 10. " PRESERVE_TX_PACKET_ON_DL_RETRAIN                    ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 9. " PRESERVE_TX_PACKET_ON_RECOVERY                      ,Preserve TX packet on recovery" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 8. " PRESERVE_TX_PACKET_ON_WIDTH_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 7. " PRESERVE_TX_PACKET_ON_SPEED_CHANGE                  ,When set,LTSSM will wait for framer to be idle" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 6. " RESET_LANE_ENABLE_ORIG_IN_DETECT                    ,allow lane_enable_original to be reset in Detect state" "Not allowed,Allowed"
textline "                                  "
bitfld.long 0x00 2.--5. " IDLE_TO_L0_DELAY                                    ,Number of clocks that the LTSSM will delay the transition from Recovery" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 1. " LWLO_HUNT_ON_BAD_TS1                                ,LWLO HUNT on bad TS1" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x00 0. " FORCE_SA_IN_CONFIG                                  ,Enables symbol alignment" "Disabled,Enabled"
group.long 0xFF0++0x0F
line.long 0x00 "PRIV_XP_L1BEACON,Private XP L1 Beacon"
hexmask.long.byte 0x00 2.--9. 1. " N_EIE_SYMBOLS                                       ,Number of EIE symbols sent in L1 Beacon Entry/Exist state"
textline "                                  "
bitfld.long 0x00 1. " TX_BYP_CTRL                                         ,TX bypass control" "Only L0,All Lanes"
textline "                                  "
bitfld.long 0x00 0. " EN                                                  ,Enable" "Disabled,Enabled"
line.long 0x04 "TIMEOUT3,Timeout 3 Register"
hexmask.long.byte 0x04 24.--31. 1. " RX_L0S_IDLE_TIME_GEN2                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 16.--23. 1. " RX_L0S_IDLE_TIME_GEN1                               ,Controls the amount of time LTSSM delays"
textline "                                  "
hexmask.long.byte 0x04 8.--15. 1. " TX_L0S_IDLE_TIME                                    ,Controls the minimum amount of time LTSSM stays in TX_L0S_IDLE state"
textline "                                  "
bitfld.long 0x04 4.--7. " RX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x04 0.--3. " TX_EIDLE_EXIT_DELAY                                 ,Controls the amount of time the LTSSM delays" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "RP_XP_CTL_2,XP Control 2 Register"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
sif cpuis("TEGRAX2")
bitfld.long 0x08 24. " LOOPBACK_RATE_DEEMPH_CHECK_DIS                      ,Loopback rate deemph check disable" "No,Yes"
textline "                                  "
endif
bitfld.long 0x08 23. " RX_CAL_EN                                           ,Hardware RX calibration in UPHY enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 22. " AUX_RX_IDLE_EN                                      ,RX idle enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 21. " OVERRIDE_AUX_RX_IDLE_EN                             ,Override for bit for AUX_RX_IDLE_EN enable" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 20. " WAIT_FOR_LOCKDET_DURING_L1_EXIT                     ,Wait for lockdet during L1 exit" "Disabled,Enabled"
textline "                                  "
hexmask.long.byte 0x08 12.--19. 1. " ECO351987_HOLDOFF_CNTR_LIMIT                        ,Holdoff counter limit for counter that was added in ECO 351987"
textline "                                  "
bitfld.long 0x08 11. " USE_QUALIFIED_TS_CTL_BITS                           ,Qualifies the training control bits in the transmitted TS1s/TS2s with the LTSSM state" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 10. " RELAXED_UNEXP_CPL_CHECK                             ,Relaxed unexpected completion" "Disabled,Enabled"
textline "                                  "
bitfld.long 0x08 9. " LOOPBACK_FORCE_NOSCRAMBLE                           ,Loopback force nonscramble enable" "Disabled,Enabled"
textline "                                  "
endif
bitfld.long 0x08 8. " CONFIG_LINKSTART_REQUIRE_PAD_LANE_NUM               ,Config link start require PAD lane num" "0,1"
textline "                                  "
hexmask.long.byte 0x08 0.--7. 1. " LOOPBACK_EXIT_THRESHOLD                             ,Maximum amount of time spent in loopback"
line.long 0x0C "VEND_XP_STATS2,Vendor XP States (NVIDIAs Implementation)"
hexmask.long.word 0x0C 0.--15. 1. " 8B10B_ERR_LANEMASK                                  ,Each bit represent the corresponding logical lane"
tree.end
width 0x0B
tree.end
tree "AFI"
base ad:0x10003800
width 18.
group.long 0x0++0x03
line.long 0x00 "AXI_BAR0_SZ_0,AXI BAR SIZE Register 0"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR0_SIZE   ,The size of the address range associated with BAR0"
group.long 0x4++0x03
line.long 0x00 "AXI_BAR1_SZ_0,AXI BAR SIZE Register 1"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR1_SIZE   ,The size of the address range associated with BAR1"
group.long 0x8++0x03
line.long 0x00 "AXI_BAR2_SZ_0,AXI BAR SIZE Register 2"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR2_SIZE   ,The size of the address range associated with BAR2"
group.long 0xC++0x03
line.long 0x00 "AXI_BAR3_SZ_0,AXI BAR SIZE Register 3"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR3_SIZE   ,The size of the address range associated with BAR3"
group.long 0x10++0x03
line.long 0x00 "AXI_BAR4_SZ_0,AXI BAR SIZE Register 4"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR4_SIZE   ,The size of the address range associated with BAR4"
group.long 0x14++0x03
line.long 0x00 "AXI_BAR5_SZ_0,AXI BAR SIZE Register 5"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR5_SIZE   ,The size of the address range associated with BAR5"
group.long 0x134++0x03
line.long 0x00 "AXI_BAR6_SZ_0,AXI BAR SIZE Register 6"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR6_SIZE   ,The size of the address range associated with BAR6"
group.long 0x138++0x03
line.long 0x00 "AXI_BAR7_SZ_0,AXI BAR SIZE Register 7"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR7_SIZE   ,The size of the address range associated with BAR7"
group.long 0x13C++0x03
line.long 0x00 "AXI_BAR8_SZ_0,AXI BAR SIZE Register 8"
hexmask.long.tbyte 0x00 0.--19. 1. " AXI_BAR8_SIZE   ,The size of the address range associated with BAR8"
group.long 0x18++0x03
line.long 0x00 "AXI_BAR0_START_0,AXI BAR START Registers, 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR0_START  ,The start of AXI address space for BAR0"
group.long 0x1C++0x03
line.long 0x00 "AXI_BAR1_START_0,AXI BAR START Registers, 1"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR1_START  ,The start of AXI address space for BAR1"
group.long 0x20++0x03
line.long 0x00 "AXI_BAR2_START_0,AXI BAR START Registers, 2"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR2_START  ,The start of AXI address space for BAR2"
group.long 0x24++0x03
line.long 0x00 "AXI_BAR3_START_0,AXI BAR START Registers, 3"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR3_START  ,The start of AXI address space for BAR3"
group.long 0x28++0x03
line.long 0x00 "AXI_BAR4_START_0,AXI BAR START Registers, 4"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR4_START  ,The start of AXI address space for BAR4"
group.long 0x2C++0x03
line.long 0x00 "AXI_BAR5_START_0,AXI BAR START Registers, 5"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR5_START  ,The start of AXI address space for BAR5"
group.long 0x140++0x03
line.long 0x00 "AXI_BAR6_START_0,AXI BAR START Registers, 6"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR6_START  ,The start of AXI address space for BAR6"
group.long 0x144++0x03
line.long 0x00 "AXI_BAR7_START_0,AXI BAR START Registers, 7"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR7_START  ,The start of AXI address space for BAR7"
group.long 0x148++0x03
line.long 0x00 "AXI_BAR8_START_0,AXI BAR START Registers, 8"
hexmask.long.tbyte 0x00 12.--31. 0x10 " AXI_BAR8_START  ,The start of AXI address space for BAR8"
group.long 0x30++0x03
line.long 0x00 "FPCI_BAR0_0,FPCI BAR Register 0"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR0_START ,The start of FPCI address space mapped into the BAR0 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR0_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x34++0x03
line.long 0x00 "FPCI_BAR1_0,FPCI BAR Register 1"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR1_START ,The start of FPCI address space mapped into the BAR1 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR1_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x38++0x03
line.long 0x00 "FPCI_BAR2_0,FPCI BAR Register 2"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR2_START ,The start of FPCI address space mapped into the BAR2 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR2_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x3C++0x03
line.long 0x00 "FPCI_BAR3_0,FPCI BAR Register 3"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR3_START ,The start of FPCI address space mapped into the BAR3 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR3_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x40++0x03
line.long 0x00 "FPCI_BAR4_0,FPCI BAR Register 4"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR4_START ,The start of FPCI address space mapped into the BAR4 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR4_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x44++0x03
line.long 0x00 "FPCI_BAR5_0,FPCI BAR Register 5"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR5_START ,The start of FPCI address space mapped into the BAR5 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR5_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x14C++0x03
line.long 0x00 "FPCI_BAR6_0,FPCI BAR Register 6"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR6_START ,The start of FPCI address space mapped into the BAR6 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR6_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x150++0x03
line.long 0x00 "FPCI_BAR7_0,FPCI BAR Register 7"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR7_START ,The start of FPCI address space mapped into the BAR7 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR7_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
group.long 0x154++0x03
line.long 0x00 "FPCI_BAR8_0,FPCI BAR Register 8"
hexmask.long 0x00 4.--31. 0x10 " FPCI_BAR8_START ,The start of FPCI address space mapped into the BAR8 range of PCI memory space"
bitfld.long 0x00 0. "  FPCI_BAR8_ACCESS_TYPE ,Indicates if the address region is memory mapped versus configuration or I/O space" "IO/config,Memory mapped"
textline "                           "
width 19.
sif cpuis("TEGRAX2")
group.long 0x60++0x03
line.long 0x00 "AFI_MSI_BAR_SZ_0,AFI MSI BAR SZ 0"
hexmask.long.tbyte 0x00 0.--19. 1. " MSI_BAR_SIZE       ,The size of the address range associated with MSI BAR is in 4K increments"
endif
group.long 0x64++0x07
line.long 0x00 "MSI_FPCI_BAR_ST_0,MSI FPCI BAR Start"
hexmask.long 0x00 4.--31. 1. " MSI_FPCI_BAR_START ,The start of upstream FPCI address space for MSI BAR"
line.long 0x04 "MSI_AXI_BAR_ST_0,MSI AXI BAR Start"
hexmask.long.tbyte 0x04 12.--31. 1. " MSI_AXI_BAR_START  ,The start of upstream AXI address space for MSI BAR"
textline "                            "
width 16.
group.long 0x6C++0x03
line.long 0x00 "MSI_VEC0_0,MSI Vector Register 0"
group.long 0x70++0x03
line.long 0x00 "MSI_VEC1_0,MSI Vector Register 1"
group.long 0x74++0x03
line.long 0x00 "MSI_VEC2_0,MSI Vector Register 2"
group.long 0x78++0x03
line.long 0x00 "MSI_VEC3_0,MSI Vector Register 3"
group.long 0x7C++0x03
line.long 0x00 "MSI_VEC4_0,MSI Vector Register 4"
group.long 0x80++0x03
line.long 0x00 "MSI_VEC5_0,MSI Vector Register 5"
group.long 0x84++0x03
line.long 0x00 "MSI_VEC6_0,MSI Vector Register 6"
group.long 0x88++0x03
line.long 0x00 "MSI_VEC7_0,MSI Vector Register 7"
group.long 0x8C++0x03
line.long 0x00 "MSI_EN_VEC0_0,MSI Enable Vector Register 0"
group.long 0x90++0x03
line.long 0x00 "MSI_EN_VEC1_0,MSI Enable Vector Register 1"
group.long 0x94++0x03
line.long 0x00 "MSI_EN_VEC2_0,MSI Enable Vector Register 2"
group.long 0x98++0x03
line.long 0x00 "MSI_EN_VEC3_0,MSI Enable Vector Register 3"
group.long 0x9C++0x03
line.long 0x00 "MSI_EN_VEC4_0,MSI Enable Vector Register 4"
group.long 0xA0++0x03
line.long 0x00 "MSI_EN_VEC5_0,MSI Enable Vector Register 5"
group.long 0xA4++0x03
line.long 0x00 "MSI_EN_VEC6_0,MSI Enable Vector Register 6"
group.long 0xA8++0x03
line.long 0x00 "MSI_EN_VEC7_0,MSI Enable Vector Register 7"
group.long 0xAC++0x03
line.long 0x00 "CONFIGURATION_0,AFI Configuration"
bitfld.long 0x00 31. " CLKEN_OVERRIDE       ,Override the clock enable in case of malfunction" "Disabled,Enabled"
textline "                         "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 23. " SPARSE_WSTRB         ,Diagnostic bit for enabling sparse WSTRB" "0,1"
bitfld.long 0x00 22. "            UNALIGNED_BYTE_ACCESS ,Diagnostic bit for unaligned byte access" "0,1"
bitfld.long 0x00 21. "            UPSTREAM_RAW_RESPAW_MSIAW ,Diagnostic bit for upstream RAW, RESPAW, MSIAW issue" "0,1"
textline "                         "
endif
bitfld.long 0x00 19. " PW_NO_DEVSEL_ERR_CYA ,Disable detection of DECERR due to no devsel" "No,Yes"
rbitfld.long 0x00 18. "          INITIATOR_READ_IDLE   ,Status reads on AFI upstream" "Busy,Idle"
rbitfld.long 0x00 17. "         INITIATOR_WRITE_IDLE      ,Status write on AFI upstream" "Busy,Idle"
textline "                         "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 16. " PE2_PRSNT_L_IN       ,Card is present in PCIe slot 2" "Present,Not present"
textline "                         "
endif
bitfld.long 0x00 15. " WDATA_LEAD_CYA       ,Enable handling of write data ahead of requests on mselect" "Disabled,Enabled"
bitfld.long 0x00 14. "     WR_INTRLV_CYA         ,Enable handling of interleaved write requests on mselect" "Disabled,Enabled"
textline "                         "
rbitfld.long 0x00 13. " PE1_PRSNT_L_IN       ,PCIe card present in slot 0" "Present,Not present"
rbitfld.long 0x00 12. "  PE0_PRSNT_L_IN        ,PCIe card present in slot 1" "Present,Not present"
rbitfld.long 0x00 11. "  TARGET_READ_IDLE          ,Status reads to AFI target" "Busy,Idle"
textline "                         "
rbitfld.long 0x00 10. " TARGET_WRITE_IDLE    ,Status write to AFI target" "Busy,Idle"
rbitfld.long 0x00 9. "         MSI_VEC_EMPTY         ,Provides status on MSI Vector registers" "No valid,Valid"
bitfld.long 0x00 7. "     UFPCI_MSIAW               ,MSI After Write ordering rule" "Default,MSI Interrupt"
textline "                         "
bitfld.long 0x00 6. " UFPCI_PWPASSPW       ,Input to upstream FPCI" "Not send,Send"
bitfld.long 0x00 5. "     UFPCI_PASSPW          ,Allow upstream FPCI reads to pass writes" "No Allowed,Allowed"
bitfld.long 0x00 4. "   UFPCI_PWPASSNPW           ,Allow upstream FPCI PWs to pass NPWs" "Not Allowed,Allowed"
textline "                         "
bitfld.long 0x00 3. " DFPCI_PWPASSNPW      ,Allow downstream FPCI PWs to pass NPWs" "Not Allowed,Allowed"
bitfld.long 0x00 2. "  DFPCI_RSPPASSPW       ,Allow downstream FPCI responses to pass writes" "Not allowed,Allowed"
bitfld.long 0x00 1. "  DFPCI_PASSPW              ,Allow downstream FPCI reads to pass writes" "Not Allowed,Allowed"
textline "                         "
bitfld.long 0x00 0. " EN_FPCI              ,FPCI device block Enable" "Disabled,Enabled"
textline "                         "
width 20.
group.long 0xb0++0x1B
line.long 0x00 "FPCI_ERROR_MASKS_0,FPCI Error Masks"
bitfld.long 0x00 2. " MASK_FPCI_MASTER_ABORT ,Allow FPCI error to be forwarded to AXI response on Master Abort error" "Return AXI OKAY,Forward error"
bitfld.long 0x00 1. "  MASK_FPCI_DATA_ERROR ,Allow FPCI error to be forwarded to AXI response on Data Error" "Return AXI OKAY,Forward error"
bitfld.long 0x00 0. "  MASK_FPCI_TARGET_ABORT ,Allows an FPCI error to be forwarded to AXI response on Target Abort error" "Return AXI OKAY,Forward error"
line.long 0x04 "INTR_MASK_0,Interrupt Masks"
bitfld.long 0x04 8. " MSI_MASK               ,MSI to MPCORE gated by mask" "Masked,Not masked"
bitfld.long 0x04 0. "       INT_MASK             ,Interrupt to MPCORE gated by mask" "Masked,Not masked"
textline "                             "
line.long 0x08 "INTR_CODE_0,Interrupt Code"
bitfld.long 0x08 0.--4. " INT_CODE           ,Interrupt Code" "Clear,AXI Slave error,AXI Decode error,PCIe target abort/data error,PCIe master abort,Write to NPW address region,PCIe 2.0 Sideband message,FPCI Decode error,AXI Decode error,FPCI Timeout,Slot Present Pin Change,Slot Clock Request Change,TMS Clock Clamp Change,TMS Ready for power down,Peer-to-peer error,?..."
line.long 0x0C "INTR_SIGNATURE_0,Interrupt Signature"
hexmask.long 0x0C 2.--31. 0x04 " INT_INFO           ,Interrupt info - For interrupt codes FPCI memory space or AXI space"
bitfld.long 0x0C 0. "  DIR            ,Indicates the direction of the AXI/FPCI transaction" "Write,Read"
line.long 0x10 "UPPER_FPCI_ADDR_0,Upper FPCI Address"
bitfld.long 0x10 16.--17. " P2P_ERR_RESP       ,This bits are for the captured endpoint device error response" "0,1,2,3"
hexmask.long.byte 0x10 0.--7. 0x01 "         INT_INFO_UPPER ,Upper byte of captured FPCI address"
line.long 0x14 "SM_INTR_ENABLE_0,Sideband Message Interrupt Enable"
sif cpuis("TEGRAX2")
bitfld.long 0x14 15. " ENABLE_MESSAGE[15] ,Interrupt message enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 14. "               [14] ,Interrupt(Root Port Interrupt Deassertion) message enable" "Disabled,Enabled"
else
bitfld.long 0x14 14. " ENABLE_MESSAGE[14] ,Interrupt(Root Port Interrupt Deassertion) message enable" "Disabled,Enabled"
endif
bitfld.long 0x14 13. "  [13]           ,Interrupt(Root Port Interrupt Assertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 12. "  [12] ,Hotplug SCI assertion message enable" "Disabled,Enabled"
bitfld.long 0x14 11. "  [11] ,PME assertion message enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 10. "               [10] ,Error(Uncorrectable Fatal Error) message enable" "Disabled,Enabled"
bitfld.long 0x14 9. "  [9]            ,Error(Uncorrectable Non-Fatal Error) message enable" "Disabled,Enabled"
bitfld.long 0x14 8. "  [8]  ,Interrupt(INTB Deassertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 7. "  [7]  ,Error(Correctable Error) message enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 6. "               [6]  ,Interrupt(INTD Deassertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 5. "  [5]            ,Interrupt(INTC Deassertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 4. "  [4]  ,Interrupt(INTA Deassertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 3. "  [3]  ,Interrupt(INTD Assertion) message enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x14 2. "               [2]  ,Interrupt(INTC Assertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 1. "  [1]            ,Interrupt(INTB Assertion) message enable" "Disabled,Enabled"
bitfld.long 0x14 0. "  [0]  ,Interrupt(INTA Assertion) message enable" "Disabled,Enabled"
textline "                             "
line.long 0x18 "AFI_INTR_ENABLE_0,AFI Interrupt Enable"
sif cpuis("TEGRAX2")
bitfld.long 0x18 13. " EN_FATAL_ERR                  ,Enable bit for fatal interrupt reporting to SCE master" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x18 12. " EN_P2P_ERR                    ,Enable bit for interrupt code 14" "Disabled,Enabled"
bitfld.long 0x18 11. "             EN_RDY4PD_SENSE            ,Enable bit for interrupt code 13" "Disabled,Enabled"
bitfld.long 0x18 10. "     EN_CLKCLAMP_SENSE             ,Enable bit for interrupt code 12" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 9. " EN_PE_CLKREQ_SENSE            ,Enable bit for interrupt code 11" "Disabled,Enabled"
bitfld.long 0x18 8. "             EN_PE_PRSNT_SENSE          ,Enable bit for interrupt code 10" "Disabled,Enabled"
bitfld.long 0x18 7. "     EN_FPCI_TIMEOUT               ,Enable bit for interrupt code 9" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 6. " EN_AXI_DECERR                 ,Enable bit for interrupt code 8" "Disabled,Enabled"
bitfld.long 0x18 5. "             EN_DFPCI_DECERR            ,Enable bit for interrupt code 7" "Disabled,Enabled"
bitfld.long 0x18 4. "     EN_TGT_WRERR                  ,Enable bit for interrupt code 5" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 3. " EN_TGT_DECERR                 ,Enable bit for interrupt code 4" "Disabled,Enabled"
bitfld.long 0x18 2. "             EN_TGT_SLVERR              ,Enable bit for interrupt code 3" "Disabled,Enabled"
bitfld.long 0x18 1. "     EN_INI_DECERR                 ,Enable bit for interrupt code 2" "Disabled,Enabled"
textline "                             "
bitfld.long 0x18 0. " EN_INI_SLVERR                 ,Enable bit for interrupt code 1" "Disabled,Enabled"
group.long 0xEC++0x07
line.long 0x00 "PCIE_THROTTLE_0,PCIe Throttle"
bitfld.long 0x00 31. " SM2PCIE_THROT_EN              ,Override THERM MGMT" "Disabled,Enabled"
hexmask.long.word 0x00 4.--15. 1. "             SM2PCIE_THROT_PERIOD       ,Override THERM MGMT period"
bitfld.long 0x00 0.--2. "         SM2PCIE_THROT_DUTY_CYCLE      ,Override THERM MGMT duty cycle" "0,1,2,3,4,5,6,7"
line.long 0x04 "PME_0,PCIe PME"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
rbitfld.long 0x04 15. " TMS0C22SM_PRESENCE_STATE      ,PCIe Link Presence State" "No,Yes"
rbitfld.long 0x04 14. "                  TMS0C22SM_PME_ACK          ,:PCIe Endpoint PME Ack" "No,Yes"
textline "                             "
rbitfld.long 0x04 13. " TMS0C22SM_PME                 ,PCIe Endpoint PME message" "No,Yes"
bitfld.long 0x04 12. "                  SM2TMS0C2_PME_TO           ,SM to PCIe PME Turn Off" "No,Yes"
textline "                             "
endif
rbitfld.long 0x04 11. " TMS0C12SM_PRESENCE_STATE      ,PCIe Link Presence State" "No,Yes"
rbitfld.long 0x04 10. "                  TMS0C12SM_PME_ACK          ,PCIe Endpoint PME Ack" "No,Yes"
rbitfld.long 0x04 9. "          TMS0C12SM_PME                 ,PCIe Endpoint PME message" "No,Yes"
textline "                             "
bitfld.long 0x04 8. " SM2TMS0C1_PME_TO              ,SM to PCIe PME Turn Off" "No,Yes"
rbitfld.long 0x04 6. "                  TMS0C02SM_PRESENCE_STATE   ,PCIe Link Presence State" "No,Yes"
rbitfld.long 0x04 5. "          TMS0C02SM_PME_ACK             ,PCIe Endpoint PME Ack" "No,Yes"
textline "                             "
rbitfld.long 0x04 4. " TMS0C02SM_PME                 ,PCIe Endpoint PME message" "No,Yes"
bitfld.long 0x04 0. "                  SM2TMS0C0_PME_TO           ,SM to PCIe PME Turn Off" "No,Yes"
rgroup.long 0xf4++0x03
line.long 0x00 "REQ_PENDING_0,Request Pending"
sif cpuis("TEGRAX2")
bitfld.long 0x00 11. " TMS0C22SM_NONISO_PENDING      ,Non-ISO request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 10. "          TMS0C22SM_ISO_PENDING      ,ISO request is pending from PCIE to FPCI" "Not pending,Pending"
textline "                             "
bitfld.long 0x00 9. " TMS0C22SM_NONCOH_REQUEST_PEND ,Non-coherent request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 8. "          TMS0C22SM_COH_REQUEST_PEND ,Coherent request is pending from PCIe to FPCI" "Not pending,Pending"
textline "                             "
endif
bitfld.long 0x00 7. " TMS0C12SM_NONISO_PENDING      ,Non-ISO request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 6. "          TMS0C12SM_ISO_PENDING      ,ISO request is pending from PCIE to FPCI" "Not pending,Pending"
bitfld.long 0x00 5. "  TMS0C12SM_NONCOH_REQUEST_PEND ,Non-coherent request is pending from PCIe to FPCI" "Not pending,Pending"
textline "                             "
bitfld.long 0x00 4. " TMS0C12SM_COH_REQUEST_PEND    ,Coherent request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 3. "          TMS0C02SM_NONISO_PENDING   ,Non-ISO request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 2. "  TMS0C02SM_ISO_PENDING         ,ISO request is pending from PCIe to FPCI" "Not pending,Pending"
textline "                             "
bitfld.long 0x00 1. " TMS0C02SM_NONCOH_REQUEST_PEND ,Non-coherent request is pending from PCIe to FPCI" "Not pending,Pending"
bitfld.long 0x00 0. "          TMS0C02SM_COH_REQUEST_PEND ,Coherent request is pending from PCIe to FPCI" "Not pending,Pending"
group.long 0xF8++0x13
line.long 0x00 "PCIE_CONFIG_0,PCIe Config"
sif cpuis("TEGRAX2")
bitfld.long 0x00 31. " PCIEC2_CLKREQ_GPIO            ,Whether CLKREQ is GPIO or not" "0,1"
bitfld.long 0x00 30. "                    PCIEC1_CLKREQ_GPIO         ,Whether CLKREQ is GPIO or not" "0,1"
textline "                             "
bitfld.long 0x00 29. " PCIEC0_CLKREQ_GPIO            ,Whether CLKREQ is GPIO or not" "0,1"
bitfld.long 0x00 24.--28. "                    UNITID_T0C2                ,T0C2 Upstream FPCI Unit ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                             "
bitfld.long 0x00 20.--23. " SM2TMS0_XBAR_CONFIG           ,SM configuration of PCIe crossbar" "x4_x1 configuration,x2_x1 configuration,x1_x1 configuration,?..."
else
bitfld.long 0x00 20.--23. " SM2TMS0_XBAR_CONFIG           ,SM configuration of PCIe crossbar" "x2_x1 configuration,x4_x1 configuration,?..."
endif
bitfld.long 0x00 12.--16. "  UNITID_T0C1                ,T0C1 Upstream FPCI Unit ID HyperTransport, upstream FPCI request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4.--8. "           UNITID_T0C0                   ,T0C0 Upstream FPCI Unit ID HyperTransport, upstream FPCI request" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                             "
sif cpuis("TEGRAX2")
bitfld.long 0x00 3. " PCIEC2_DISABLE_DEVICE         ,Disable PCIe Controller 2" "No,Yes"
textline "                             "
endif
bitfld.long 0x00 2. " PCIEC1_DISABLE_DEVICE         ,Disable PCIe Controller 1" "No,Yes"
bitfld.long 0x00 1. "                  PCIEC0_DISABLE_DEVICE      ,Disable PCIe Controller 0" "No,Yes"
bitfld.long 0x00 0. "          SM2TGIO_SLOT_EMPTY_PD_CYA     ,Indicates PCIe slot empty" "Not empty,Empty"
line.long 0x04 "REV_ID_0,Revision ID"
bitfld.long 0x04 1. " CFG_REVID_WRITE_ENABLE        ,Write Enable for PCI backdoor rev ID override value" "Disabled,Enabled"
bitfld.long 0x04 0. "             CFG_REVID_OVERRIDE         ,Override for PCI config revision ID read-only register" "No override,Override"
line.long 0x08 "TOM_0,Top of Memory Limit"
hexmask.long.word 0x08 16.--29. 1. " DLDT2ALL_TOM2                 ,Top of Memory Limit 2"
hexmask.long.word 0x08 0.--11. 1. "                 DLDT2ALL_TOM1              ,Top of Memory Limit 1"
line.long 0x0C "FUSE_0,PCIe Fuse"
sif cpuis("TEGRAX2")
bitfld.long 0x0C 12.--14. " FUSE_PCIE_WIDTH_T0C2          ,Configure PCIe 2" "x1,x2,x4,x8,x16,?..."
textline "                             "
endif
bitfld.long 0x0C 8.--10. " FUSE_PCIE_WIDTH_T0C1          ,Configure PCIe 1" "x1,x2,x4,x8,x16,?..."
bitfld.long 0x0C 4.--6. "                  FUSE_PCIE_WIDTH_T0C0       ,Configure PCIe 0" "x1,x2,x4,x8,x16,?..."
bitfld.long 0x0C 2. "          FUSE_PCIE_T0_GEN2_DIS         ,Disable Gen 2 capability of PCIe" "No,Yes"
textline "                             "
bitfld.long 0x0C 1. " FUSE_PCIE_SLI_DIS             ,Disable SLI capability for the GPU" "No,Yes"
textline "                             "
line.long 0x10 "PMU_0,PMU Interface"
rbitfld.long 0x10 24. " CTLR_T0_C1_2PMU_TOG        ,PMU toggle response from PCIe" "Not toggled,Toggled"
rbitfld.long 0x10 20.--23. "  CTLR_T0_C1_2PMU_STATUS              ,PMU Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x10 16. "  CTLR_T0_C0_2PMU_TOG                 ,PMU toggle response from PCIe" "Not toggled,Toggled"
textline "                             "
rbitfld.long 0x10 12.--15. " CTLR_T0_C0_2PMU_STATUS     ,PMU Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 8.--11. "           PMU2CTLR_T0_C1_LOAD_INDICATOR_SCALE ,PMU Load Indicator Scale for T0C1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 4.--7. "  PMU2CTLR_T0_C0_LOAD_INDICATOR_SCALE ,PMU Load Indicator Scale for T0C0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                             "
bitfld.long 0x10 0. " PMU2ALL_LI_UPDATE_FAST_TOG ,PMU Load Indicator Enable" "Disabled,Enabled"
textline "                             "
width 34.
group.long 0x10C++0x07
line.long 0x00 "PCIE_CLK_CONFIG_STATUS_0,PCIE2 CLK Config/Status"
rbitfld.long 0x00 24.--27. " PCIE2CLK_TMS0GRP2_PAD_MACRO_CLK_SEL  ,Clock select to pad macro" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                           "
rbitfld.long 0x00 20.--23. " PCIE2CLK_TMS0GRP1_PAD_MACRO_CLK_SEL  ,Clock select to pad macro" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 16.--19. "                PCIE2CLK_TMS0GRP0_PAD_MACRO_CLK_SEL  ,Clock select to pad macro" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                           "
sif cpuis("TEGRAX2")
rbitfld.long 0x00 15. " PCIE2CLK_TMS0C2_SEL_XTXCLK1X_GEN2    ,Request to select Gen2 speed clock for T0C2 XTXCLK1X" "No requested,Requested"
rbitfld.long 0x00 14. "      PCIE2CLK_TMS0C2_DIS_XTXCLK1X         ,Request to gate T0C2 XTXCLK1X" "No requested,Requested"
textline "                                           "
endif
rbitfld.long 0x00 13. " PCIE2CLK_TMS0C1_DIS_XTXCLK1X         ,Request to gate T0C1 XTXCLK1X" "No requested,Requested"
rbitfld.long 0x00 12. "      PCIE2CLK_TMS0C0_DIS_XTXCLK1X         ,Request to gate T0C0 XTXCLK1X" "No requested,Requested"
textline "                                           "
rbitfld.long 0x00 11. " PCIE2CLK_TMS0_CLAMP_CLK_L1           ,Request to gate TMS/FPCI clocks" "No requested,Requested"
rbitfld.long 0x00 10. "      PCIE2CLK_TMS0C1_SEL_XTXCLK1X_GEN2    ,Request to select Gen2 speed clock for T0C1 XTXCLK1X" "No requested,Requested"
textline "                                           "
rbitfld.long 0x00 9. " PCIE2CLK_TMS0C0_SEL_XTXCLK1X_GEN2    ,Request to select Gen2 speed clock for T0C0 XTXCLK1X" "No requested,Requested"
rbitfld.long 0x00 8. "      PCIE2CLK_TMS0_SEL_XCLK_GEN2          ,Request to select Gen2 speed clock for XCLK" "No requested,Requested"
textline "                                           "
sif cpuis("TEGRAX2")
bitfld.long 0x00 6. " CLK2PCIE_TMS0C2_OFF_XTXCLK1X         ,Acknowledge to disable T0C1 XTXCLK1X request" "Not acknowledged,Acknowledged"
bitfld.long 0x00 5. "  CLK2PCIE_TMS0C2_RDY_XTXCLK1X_GEN2    ,Acknowledge to select T0C1 XTXCLK1X Gen2 request" "Not acknowledged,Acknowledged"
textline "                                           "
endif
bitfld.long 0x00 4. " CLK2PCIE_TMS0C1_OFF_XTXCLK1X         ,Acknowledge to disable T0C1 XTXCLK1X request" "Not acknowledged,Acknowledged"
textline "                                           "
bitfld.long 0x00 3. " CLK2PCIE_TMS0C1_RDY_XTXCLK1X_GEN2    ,Acknowledge to select T0C1 XTXCLK1X Gen2 request" "Not acknowledged,Acknowledged"
bitfld.long 0x00 2. "  CLK2PCIE_TMS0C0_OFF_XTXCLK1X         ,Acknowledge to disable T0C0 XTXCLK1X" "Not acknowledged,Acknowledged"
textline "                                           "
bitfld.long 0x00 1. " CLK2PCIE_TMS0C0_RDY_XTXCLK1X_GEN2    ,Acknowledge to select T0C0 XTXCLK1X Gen2 request" "Not acknowledged,Acknowledged"
bitfld.long 0x00 0. "  CLK2PCIE_TMS0_RDY_XCLK_GEN2          ,Acknowledge to select XCLK Gen2 request" "Not acknowledged,Acknowledged"
line.long 0x04 "PEX0_CTRL_0,PCIe PHY And Sideband Signal Interface"
bitfld.long 0x04 4. " PEX0_REFCLK_OVERRIDE_EN              ,PEX0 enable to override refclk to be enabled always when PEX0_REFCLK_EN is set" "Disabled,Enabled"
bitfld.long 0x04 3. "          PEX0_REFCLK_EN                       ,PEX0 enable to clkout pad" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x04 1. " PEX0_CLKREQ_EN                       ,PEX0 enable clkreq to control clkout pad" "Disabled,Enabled"
bitfld.long 0x04 0. "          PEX0_REFCLK_EN                       ,PEX0 external pe0_rst_l register" "No reset,Reset"
rgroup.long 0x114++0x03
line.long 0x00 "PEX0_STATUS_0,PCIe PHY Status"
bitfld.long 0x00 0. " PEX0_CLKREQ_L                        ,Status of the PEX0 pe0_clkreq_l input" "0,1"
group.long 0x118++0x03
line.long 0x00 "PEX1_CTRL_0,PCIe PHY And Sideband Signal Interface"
bitfld.long 0x00 4. " PEX1_REFCLK_OVERRIDE_EN              ,PEX1 enable to override refclk to be enabled always when PEX1_REFCLK_EN is set" "Disabled,Enabled"
bitfld.long 0x00 3. "          PEX1_REFCLK_EN                       ,PEX1 enable to clkout pad" "Disabled,Enabled"
textline "                                           "
bitfld.long 0x00 1. " PEX1_CLKREQ_EN                       ,PEX1 enable clkreq to control clkout pad" "Disabled,Enabled"
bitfld.long 0x00 0. "          PEX1_RST_L                           ,PEX1 external pe1_rst_l register" "Disabled,Enabled"
rgroup.long 0x11C++0x03
line.long 0x00 "PEX0_STATUS_0,PCIe PHY Status"
bitfld.long 0x00 0. " PEX1_CLKREQ_L                        ,Status of the PEX1 pe1_clkreq_l input" "0,1"
textline "                                           "
rgroup.long 0x158++0x07
line.long 0x00 "INITIATOR_ISO_PW_RESP_PENDING_0,Initiator ISO PW Response Pending"
sif cpuis("TEGRAX2")
hexmask.long.byte 0x00 16.--23. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND_T0C2  ,Number of pending initiator ISO PW responses for controller 2"
textline "                                           "
endif
hexmask.long.byte 0x00 8.--15. 1. " NUM_INITIATOR_ISO_PW_RESP_PEND_T0C1  ,Number of pending initiator ISO PW responses for controller 1"
hexmask.long.byte 0x00 0.--7. 1. "                NUM_INITIATOR_ISO_PW_RESP_PEND_T0C0  ,Number of pending initiator ISO PW responses for controller 0"
line.long 0x04 "INITIATOR_NISO_PW_RESP_PENDING_0,Initiator Non-ISO PW Response Pending"
sif cpuis("TEGRAX2")
hexmask.long.byte 0x04 16.--23. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND_T0C2 ,Number of pending initiator ISO PW responses for controller 2"
textline "                                           "
endif
hexmask.long.byte 0x04 8.--15. 1. " NUM_INITIATOR_NISO_PW_RESP_PEND_T0C1 ,Number of pending initiator NISO PW responses for controller 1"
hexmask.long.byte 0x04 0.--7. 1. "                NUM_INITIATOR_NISO_PW_RESP_PEND_T0C0 ,Number of pending initiator NISO PW responses for controller 0"
textline "                                           "
width 22.
group.long 0x160++0x17
line.long 0x00 "PLLE_CONTROL_0,PLLE Controls"
bitfld.long 0x00 9. " BYPASS_PADS2PLLE_CONTROL      ,Overrides PCIe PADS CLKREQ control of the PLLE" "No override,Override"
bitfld.long 0x00 8. "   BYPASS_PCIE2PLLE_CONTROL            ,Overrides PCIe2 CLOCK CLAMP control of the PLLE" "No override,Override"
bitfld.long 0x00 1. "   PADS2PLLE_CONTROL_EN               ,PADS2PLLE Control enable" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 0. " PCIE2PLLE_CONTROL_EN          ,PCIE2PLLE Control enable" "Disabled,Enabled"
line.long 0x04 "BUST_CONTROL_0,Bus Trace Module Controls"
rbitfld.long 0x04 21. " PCIE_RXL_BUST_TRIG_OUT0_T0    ,Bus trigger from bus trace module in PCIE2" "No trigger,Trigger"
bitfld.long 0x04 20. "    TRACE_EXTERNAL_START                ,Start signal to bus trace module in PCIE2" "No trigger,Trigger"
bitfld.long 0x04 16.--17. "    PCIE_RXL_BUST_BUS_TRACE_MUX_SEL_T0 ,MUX select to bus trace module in PCIE2" "0,1,2,3"
textline "                               "
hexmask.long.word 0x04 0.--15. 1. " CHIP_ID                       ,Chip ID to bus trace module in PCIE2"
line.long 0x08 "PEXBIAS_CTRL_0,PEXBIAS_CTRL_0"
bitfld.long 0x08 0. " PEX_BIAS_PWRD                 ,PEX clock bias pad power down" "0,1"
line.long 0x0C "P2PBOM_CTRL_0,P2PBOM_CTRL_0"
hexmask.long.tbyte 0x0C 0.--19. 1. " P2P_BASE                      ,Peer-to-peer Bottom of Memory"
line.long 0x10 "P2PTOM_CTRL_0,P2PTOM_CTRL_0"
hexmask.long.tbyte 0x10 0.--19. 1. " P2P_LIMIT                     ,Peer-to-peer Top of Memory"
line.long 0x14 "CLKGATE_HYSTERESIS_0,Clock Gate Hysteresis"
hexmask.long.byte 0x14 0.--7. 1. " CLK_DISABLE_CNT               ,Number of AFI clock cycles to wait after clock gating criteria is met to disable the AFI/FPCI clocks"
group.long 0x180++0x0B
line.long 0x00 "SPARE_REG0_0,Spare Register"
line.long 0x04 "A2F_UFPCI_CFG0_0,UFPCI Configuration Register 0"
hexmask.long.byte 0x04 24.--31. 1. " STATIC_WAIT_IDLE_CNTR         ,Static wait idle control"
bitfld.long 0x04 16.--18. "            STATIC_UFPCI_UFA_STARVE_CNTR_PRI1   ,Static UFPCI UFA starve control PRI1" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 12.--15. "             STATIC_UFPCI_UFA_STARVE_CNTR_PRI0  ,Static UFPCI UFA starve control PRI0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                               "
bitfld.long 0x04 10.--11. " STATIC_UFPCI_RR_BURST_SZ_PRI1 ,Static_UFPCI RR burst SZ PRI1" "0,1,2,3"
bitfld.long 0x04 8.--9. "             STATIC_UFPCI_RR_BURST_SZ_PRI0       ,Static UFPCI RR burst SZ PRI0" "0,1,2,3"
bitfld.long 0x04 7. "             STATIC_WAIT_CLAMP_EN               ,Static wait clamp enable" "0,1"
textline "                               "
bitfld.long 0x04 6. " STATIC_UFPCI_UFA_DYN_BLOCK_EN ,Static UFPCI UFA DYN block enable" "0,1"
bitfld.long 0x04 5. "             STATIC_UFPCI_UFA_BLK_COHERENT       ,Static UFPCI UFA BLK coherent" "0,1"
bitfld.long 0x04 2.--4. "             STATIC_UFPCI_BLOCK_CMD_THRESHOLD   ,Static UFPCI block CMD threshold" "0,1,2,3,4,5,6,7"
textline "                               "
bitfld.long 0x04 1. " STATIC_CYA_UFA_ARB            ,Static CYA UFA ARB" "0,1"
bitfld.long 0x04 0. "             STATIC_CYA_BACK2BACK_UPSTREAM_BLOCK ,Static CYA back to back upstream block" "0,1"
line.long 0x08 "A2F_UFPCI_CFG1_0,UFPCI Configuration Register 1"
hexmask.long.byte 0x08 0.--7. 1. " STATIC_WAIT_UNCLAMP_CNTR      ,Static wait unclamp control"
textline "                               "
group.long 0x7CC++0x03
line.long 0x00 "AFI_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control And Clock Gating Control Register"
bitfld.long 0x00 20. " AFI_RCLK_OVR_MODE             ,RCLK override mode" "Legacy,ON"
bitfld.long 0x00 19. "        AFI_WCLK_OVR_MODE                   ,WCLK override mode" "Legacy,ON"
bitfld.long 0x00 18. "        AFI_CCLK_OVERRIDE                  ,Clock override" "Not override,Override"
textline "                               "
bitfld.long 0x00 17. " AFI_RCLK_OVERRIDE             ,Clock override" "Not override,Override"
bitfld.long 0x00 16. "  AFI_WCLK_OVERRIDE                   ,Clock override" "Not override,Override"
bitfld.long 0x00 3. "  AFI_MCCIF_RDCL_RDFAST              ,AFI_MCCIF_RDCL_RDFAST" "Disabled,Enabled"
textline "                               "
bitfld.long 0x00 2. " AFI_MCCIF_WRMC_CLLE2X         ,AFI_MCCIF_WRMC_CLLE2X" "Disabled,Enabled"
bitfld.long 0x00 1. "      AFI_MCCIF_RDMC_RDFAST               ,AFI_MCCIF_RDMC_RDFAST" "Disabled,Enabled"
bitfld.long 0x00 0. "      AFI_MCCIF_WRCL_MCLE2X              ,AFI_MCCIF_WRCL_MCLE2X" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree.open "Controller Area Network (CAN)"
tree "CAN1"
base ad:0x0C310000
width 19.
rgroup.long 0x1000++0x13
line.long 0x00 "IR,Interrupt Register Flags"
line.long 0x04 "TTIR,Interrupt Register Flags"
hexmask.long.tbyte 0x04 0.--18. 1. " TTIR    ,TTIR"
line.long 0x08 "TXBRP,TX Buffer Request Pending"
line.long 0x0C "FD_DATA,CAN FD Data Lines"
bitfld.long 0x0C 1. " TX      ,Indicates if the controller is transmitting FD data" "Not transmitted,Transmitted"
bitfld.long 0x0C 0. "  RX      ,Indicates if the controller is receiving FD data" "Not received,Received"
line.long 0x10 "STATUS_REGISTER0,Status Register"
bitfld.long 0x10 10.--12. " FE      ,Filter events" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 9. "                SOC     ,Related to time triggered protocol" "Not completed,Completed"
bitfld.long 0x10 8. "  TMP      ,Trigger mark protocol" "Not marked,Marked"
textline "                            "
bitfld.long 0x10 7. " RTP     ,Receive mark protocol" "Not marked,Marked"
bitfld.long 0x10 6. "       ASCM    ,Asynchronous serial communication multiplexer control" "0,1"
bitfld.long 0x10 5. "              ASCT     ,Asynchronous serial communication transmit control" "0,1"
textline "                            "
bitfld.long 0x10 4. " CCE     ,Reflects the status of CCCR" "0,1"
bitfld.long 0x10 3. "                SPT     ,A pulse is observed here at every sampling point" "0,1"
bitfld.long 0x10 2. "              MRX      ,Related to the clock calibration unit" "Not received,Received"
textline "                            "
bitfld.long 0x10 1. " CALF    ,Start and end of calibration field on the interface status" "Started,Ended"
bitfld.long 0x10 0. "          AFF     ,A pulse here indicates that acceptance filtering has been applied on the received message" "0,1"
group.long 0x1014++0x27
line.long 0x00 "CONTROL_REGISTER0,Control Register"
hexmask.long.word 0x00 16.--31. 1. " EXT_TS  ,External timestamp"
bitfld.long 0x00 3. "             COK     ,Indicates that calibration is completed" "Not completed,Completed"
bitfld.long 0x00 2. "  DIS_MORD ,Program to 1 to disable any modification on read" "On,Off"
textline "                            "
bitfld.long 0x00 1. " EVT     ,Programmable event trigger" "Not triggered,Triggered"
bitfld.long 0x00 0. "    SWT     ,Programmable stop watch trigger" "Not triggered,Triggered"
line.long 0x04 "DMA_INTF0,DMA Interface"
rbitfld.long 0x04 1. " DMA_REQ ,Debug message interface reflect REQ signal" "0,1"
bitfld.long 0x04 0. "                DMA_ACK ,Debug message interface control ACKL signal" "0,1"
line.long 0x08 "CLK_STOP,CLKSTOP Interface"
rbitfld.long 0x08 1. " ACK     ,Clock stop interface ACK is asserted once host clock stop request is processed" "Disabled,Enabled"
bitfld.long 0x08 0. "         REQ     ,Clock stop interface issues request to stop host clock" "Disabled,Enabled"
line.long 0x0C "HSM_MASK0,NVIDIA HSM Mask For IR"
line.long 0x10 "HSM_MASK1,NVIDIA HSM Mask For TTIR"
hexmask.long.tbyte 0x10 0.--18. 1. " TTIR    ,Reflects the status of the TTIR register"
line.long 0x14 "EXT_SYNC_SELECT,NVIDIA Event/Software Select"
bitfld.long 0x14 8.--12. " EVT_SEL ,Selects the source of the event signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 0.--4. "               SWT_SEL ,Selects the source of the software signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "HSM_SW_OVERRIDE,NVIDIA HSM Software Override"
bitfld.long 0x18 0. " OVRD    ,Software override to assert HSM error signals" "No override,Override"
width 0x0B
tree.end
tree "CAN2"
base ad:0x0C320000
width 19.
rgroup.long 0x1000++0x13
line.long 0x00 "IR,Interrupt Register Flags"
line.long 0x04 "TTIR,Interrupt Register Flags"
hexmask.long.tbyte 0x04 0.--18. 1. " TTIR    ,TTIR"
line.long 0x08 "TXBRP,TX Buffer Request Pending"
line.long 0x0C "FD_DATA,CAN FD Data Lines"
bitfld.long 0x0C 1. " TX      ,Indicates if the controller is transmitting FD data" "Not transmitted,Transmitted"
bitfld.long 0x0C 0. "  RX      ,Indicates if the controller is receiving FD data" "Not received,Received"
line.long 0x10 "STATUS_REGISTER0,Status Register"
bitfld.long 0x10 10.--12. " FE      ,Filter events" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 9. "                SOC     ,Related to time triggered protocol" "Not completed,Completed"
bitfld.long 0x10 8. "  TMP      ,Trigger mark protocol" "Not marked,Marked"
textline "                            "
bitfld.long 0x10 7. " RTP     ,Receive mark protocol" "Not marked,Marked"
bitfld.long 0x10 6. "       ASCM    ,Asynchronous serial communication multiplexer control" "0,1"
bitfld.long 0x10 5. "              ASCT     ,Asynchronous serial communication transmit control" "0,1"
textline "                            "
bitfld.long 0x10 4. " CCE     ,Reflects the status of CCCR" "0,1"
bitfld.long 0x10 3. "                SPT     ,A pulse is observed here at every sampling point" "0,1"
bitfld.long 0x10 2. "              MRX      ,Related to the clock calibration unit" "Not received,Received"
textline "                            "
bitfld.long 0x10 1. " CALF    ,Start and end of calibration field on the interface status" "Started,Ended"
bitfld.long 0x10 0. "          AFF     ,A pulse here indicates that acceptance filtering has been applied on the received message" "0,1"
group.long 0x1014++0x27
line.long 0x00 "CONTROL_REGISTER0,Control Register"
hexmask.long.word 0x00 16.--31. 1. " EXT_TS  ,External timestamp"
bitfld.long 0x00 3. "             COK     ,Indicates that calibration is completed" "Not completed,Completed"
bitfld.long 0x00 2. "  DIS_MORD ,Program to 1 to disable any modification on read" "On,Off"
textline "                            "
bitfld.long 0x00 1. " EVT     ,Programmable event trigger" "Not triggered,Triggered"
bitfld.long 0x00 0. "    SWT     ,Programmable stop watch trigger" "Not triggered,Triggered"
line.long 0x04 "DMA_INTF0,DMA Interface"
rbitfld.long 0x04 1. " DMA_REQ ,Debug message interface reflect REQ signal" "0,1"
bitfld.long 0x04 0. "                DMA_ACK ,Debug message interface control ACKL signal" "0,1"
line.long 0x08 "CLK_STOP,CLKSTOP Interface"
rbitfld.long 0x08 1. " ACK     ,Clock stop interface ACK is asserted once host clock stop request is processed" "Disabled,Enabled"
bitfld.long 0x08 0. "         REQ     ,Clock stop interface issues request to stop host clock" "Disabled,Enabled"
line.long 0x0C "HSM_MASK0,NVIDIA HSM Mask For IR"
line.long 0x10 "HSM_MASK1,NVIDIA HSM Mask For TTIR"
hexmask.long.tbyte 0x10 0.--18. 1. " TTIR    ,Reflects the status of the TTIR register"
line.long 0x14 "EXT_SYNC_SELECT,NVIDIA Event/Software Select"
bitfld.long 0x14 8.--12. " EVT_SEL ,Selects the source of the event signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x14 0.--4. "               SWT_SEL ,Selects the source of the software signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x18 "HSM_SW_OVERRIDE,NVIDIA HSM Software Override"
bitfld.long 0x18 0. " OVRD    ,Software override to assert HSM error signals" "No override,Override"
width 0x0B
tree.end
tree.end
tree.open "SD/MMC Controller"
tree "SDMMC-1"
base ad:0x03400000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE                  ,Override the SDR50_TUNING capabilities bit" "Normal,Override"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03400000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03400000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03400000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-1B"
base ad:0x03410000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE                  ,Override the SDR50_TUNING capabilities bit" "Normal,Override"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03410000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03410000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03410000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-2"
base ad:0x03420000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03420000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
bitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03420000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03420000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-2B"
base ad:0x03430000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03430000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
bitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03430000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03430000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-3"
base ad:0x03440000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE                  ,Override the SDR50_TUNING capabilities bit" "Normal,Override"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03440000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03440000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03440000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-3B"
base ad:0x03450000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 5. " SDR50_TUNING_OVERRIDE                  ,Override the SDR50_TUNING capabilities bit" "Normal,Override"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03450000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
else
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03450000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03450000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-4"
base ad:0x03460000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03460000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 24. " CQE_CLKEN_OVERRIDE                     ,Override for sdmmc_cqe_g_clk clken" "Normal,Override"
bitfld.long 0x04 23. "      CQE_DESC_PREFETCH_EN                ,Enables CQE task descriptors pre-fetch feature" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL reset duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when delay code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Config and Status Register"
rbitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
rbitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,MST_DLL_RST override enable" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,SLV_DLL_CLK_OUT_DIS override enable" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,MST_DLL_PWRDN override enable" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
else
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
bitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03460000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03460000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree "SDMMC-4B"
base ad:0x03470000
tree.open "Standard Registers"
width 27.
sif !cpuis("TEGRAX1")&&!cpuis("TEGRAX2")
rgroup.long 0x24++0x03
line.long 0x00 "PSR,Present State Register"
bitfld.long 0x00 25.--28. " DAT_7_4_LINE_LEVEL               ,This status reflects the DAT[7:4] lines state for debug" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
sif !cpuis("TEGRAX2")
group.long 0x30++0x0B
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. " BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
line.long 0x04 "ISTAER,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
line.long 0x08 "ISIGR,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
else
group.long 0x30++0x0B
line.long 0x00 "INTERRUPT_STATUS_0,Interrupt Status Register"
bitfld.long 0x00 31. " BOOT_ACK_ERR                     ,Boot ack status" "Not occurred,Occurred"
bitfld.long 0x00 30. "  BOOT_ACK_TIMEOUT_ERR  ,Boot Ack is not received" "Not occurred,Occurred"
textline "                                  "
bitfld.long 0x00 5. "   BUFFER_READ_READY                ,Buffer read ready" "NO_INT,GEN_INT"
line.long 0x04 "INTERRUPT_STATUS_ENABLE_0,Interrupt Status Enable Register"
bitfld.long 0x04 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor Ack_Timeout and Ack error status" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x04 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
line.long 0x08 "INTERRUPT_SIGNAL_ENABLE_0,Interrupt Signal Enable Register"
bitfld.long 0x08 30.--31. " VENDOR_SPECIFIC_ERR              ,Vendor specification error" "Neither,Ack_Timeout_Err,Ack_Err,Both"
textline "                                  "
bitfld.long 0x08 5. "   BUFFER_READ_READY                ,Buffer read ready" "Disabled,Enabled"
endif
sif cpuis("TEGRAX1")
group.long 0x3C++0x0B
line.long 0x00 "AUTO_CMD12_ERR_STATUS_0,Auto cmd12 err status 0"
bitfld.long 0x00 16.--18. " UHS_MODE_SEL                     ,UHS Mode Select" "LEGACY,HIGH,SDR50,SDR104,DDR50,HS400,?..."
endif
sif !cpuis("TEGRAX2")
group.long 0x50++0x03
line.long 0x00 "FER,Force Event Register"
bitfld.long 0x00 30.--31. " VENDOR_SPECIFIC_ERR_STATUS       ,Vendor specific error status" "No effect,ACK_TIMEOUT_ERR,ACK_ERR,Both"
endif
tree.end
tree.open "Vendor-Specific Registers"
width 27.
group.long 0x100++0x03
line.long 0x00 "VENDOR_CLOCK_CNTRL_0,Vendor Clock Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 29. " DIFF_CLK_SEL                           ,Selects differential CLK and DQS" "0,1"
bitfld.long 0x00 24.--28. "             TRIM_VAL                            ,Tap value for output data path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
endif
hexmask.long.byte 0x00 16.--23. 1. " TAP_VAL                                ,Tap value for input data path trimmer"
hexmask.long.byte 0x00 8.--15. 1. "            BASE_CLK_FREQ                       ,SD/MMC clock frequency"
textline "                                    "
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 6. " LEGACY_CLKEN_OVERRIDE                  ,Override for sdmmc_legacy_g_clk clken" "Normal,Override"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 4. " UHS2_CAPABILITY_OVERRIDE               ,Override the UHS-II capabilities bit" "Normal,Override"
textline "                                    "
endif
bitfld.long 0x00 3. " PADPIPE_CLKEN_OVERRIDE                 ,Override for padmacro and pipemacro clken" "Normal,Override"
textline "                                    "
bitfld.long 0x00 2. " SPI_MODE_CLKEN_OVERRIDE                ,Override for CLKEN during SPI_MODE during sw_reset" "Normal,Override"
bitfld.long 0x00 1. "      INPUT_IO_CLK                        ,Input I/O clock" "Feedback,Internal"
textline "                                    "
bitfld.long 0x00 0. " SDMMC_CLK                              ,Set when sdmmc_clk is supplied by the CAR module prior to sdmmc_clk switch OFF" "Disabled,Enabled"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
if (((d.l(ad:0x03470000+0x104))&0x40000000)==0x40000000)
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT ,Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 29. " USE_NCRC_FOR_WR_CRC_STATUS_TIMEOUT_VAL ,Uses data timeout value as wr CRC/NCRC status timeout value" "Disabled,Enabled"
bitfld.long 0x00 28. "      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,Allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 31. " ENHANCED_STROBE_MODE                   ,Enables enhanced strobe mode in HS400/HS667 mode" "Disabled,Enabled"
bitfld.long 0x00 30. "      USE_TMCLK_FOR_WR_CRC_STATUS_TIMEOUT , Uses TMCLK data timeout counter for generating wr_crc_status data-timeout" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. "                                                      USE_TMCLK_FOR_DATA_TIMEOUT          ,Uses TMCLK data timeout counter for generating legacy data timeout error" "Disabled,Enabled"
textline "                                    "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,This register field is used to load wait_cycles counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
bitfld.long 0x00 24.--27. " DEVICE_BUSY_WAIT_CYCLES                ,Busy should be sampled using clock instead DQS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
bitfld.long 0x00 23. "            ALLOW_CARD_CLK_STALLS_IN_WR         ,allows card clock stopping during transfer of data within a block in HIGH SPEED DDR/HS400 writes" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 22. " EMMC_IOBRICK_CLK_DATA                  ,Used to drive AP_CLK and AN_CLK input of iobrick" "Disabled,Enabled"
bitfld.long 0x00 21. "      QUALIFY_WITH_RD_DATA_VLD            ,Async FIFOs in both cmd_in and dat_in paths in padmacro" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN interrupt status" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,TUNING_SYS interrupt status" "No interrupt,Interrupt"
bitfld.long 0x00 8.--11. "  TUNING_ASYNC_FIFO_ADDNL_DELAY       ,DATA/CMD IB path uses async FIFO which contributes additional delay to CMD/RESP and WDATA/CRC token round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 6. " SD_BUS_POWER_ON_OFF_INT_ENABLE         ,SD_BUS_POWER_ON_OFF interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "      VOLT_SWITCH_INT_ENABLE              ,VOLT_SWITCH interrupt enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 4. " TUNING_SYS_INT_ENABLE                  ,TUNING_SYS interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 3. "      ASSERT_BUFF_RD_RDY_INT              ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 2. " IO_TRIM_BYPASS                         ,Override bit for selecting between core trimmer and I/O trimmer in IB clock path" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
rgroup.long 0x108++0x03
line.long 0x00 "VENDOR_ERR_INTR_STATUS_0,Legacy Interrupt Status Register"
bitfld.long 0x00 18. " SDMMC_LEGACY_CTLR_IDLE                 ,Indicates legacy SD interface controller is idle" "0,1"
bitfld.long 0x00 17. "             READ_DATA_TIMEOUT                   ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 16. " WRITE_CRC_STATUS_TIMEOUT               ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 15. "             WRITE_BUSY_TIMEOUT                  ,Valid when a data timeout error occurs" "0,1"
textline "                                    "
bitfld.long 0x00 14. " RESP_BUSY_TIMEOUT                      ,Valid when a data timeout error occurs" "0,1"
bitfld.long 0x00 13. "             SPI_WRITE_BUSY_TIMEOUT              ,SPI_WRITE_BUSY timeout" "0,1"
textline "                                    "
bitfld.long 0x00 12. " SPI_RX_START_TOKEN_TIMEOUT             ,SPI_RX_START_TOKEN timeout" "0,1"
bitfld.long 0x00 5.--8. "             SPI_DAT_ERR_TOKEN                   ,Data Error Token while read from card" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 0.--4. " SPI_DAT_RESPONSE                       ,Data Response while write to card" ",,,,,DATA_ACCEPTED,,,,,,CRC_ERR,,WRITE_ERR,?..."
else
group.long 0x104++0x03
line.long 0x00 "VENDOR_SYS_SW_CNTRL_0,Vendor System SW Control Register"
bitfld.long 0x00 14. " SD_BUS_POWER_ON_OFF_INT_STATUS         ,SD_BUS_POWER was changed" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  VOLT_SWITCH_INT_STATUS              ,VOLT_18_EN was changed" "No interrupt,Interrupt"
textline "                                    "
bitfld.long 0x00 12. " TUNING_SYS_INT_STATUS                  ,CMD19 was issued while EXECUTE_TUNING was set" "No interrupt,Interrupt"
bitfld.long 0x00 6. "  SD_BUS_POWER_ON_OFF_INT_ENABLE      ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 5. " VOLT_SWITCH_INT_ENABLE                 ,Enables a separate system interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "      TUNING_SYS_INT_ENABLE               ,Enables a separate system interrupt" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 3. " ASSERT_BUFF_RD_RDY_INT                 ,Used by the system software that implements the tuning procedure to signal to the standard SD driver that the tuning process has completed" "Disabled,Enabled"
bitfld.long 0x00 1. "      INT_MASK_WHILE_TUNING               ,Interrupt generation behavior is changed when a this bit is set" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " SPI_MODE                               ,SPI mode enable. Writing 1 will drive the CS low and writing 0 will deassert the CS signal" "Disabled,Enabled"
endif
group.long 0x10C++0x17
line.long 0x00 "VENDOR_CAP_OVERRIDES_0,Capabilities Override Bits"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
sif !cpuis("TEGRAX2")
bitfld.long 0x00 28. " CMD_QUEUING_MODE_EN                    ,Useful for eMMC5.x devices which support CMD queuing" "0,1"
textline "                                    "
endif
bitfld.long 0x00 8.--13. " DQS_TRIM_VAL                           ,Tap value for incoming DQS path trimmer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                    "
bitfld.long 0x00 3. " DRV_LPBK_CLK_ON_CMD_LINE               ,Loopback trimmed clock will be driven onto cmd line" "0,1"
textline "                                    "
endif
bitfld.long 0x00 2. " VOLTAGE_3_3_V_SUPPORT_OVERRIDE         ,Voltage support 3_3_V override" "Disabled,Enabled"
bitfld.long 0x00 1. "      VOLTAGE_3_0_V_SUPPORT_OVERRIDE      ,Voltage support 3_0_V override" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 0. " VOLTAGE_1_8_V_SUPPORT_OVERRIDE         ,Voltage support 1_8_V override" "Disabled,Enabled"
line.long 0x04 "VENDOR_BOOT_CNTRL_0,Vendor Boot Control Register"
bitfld.long 0x04 1. " BOOT_ACK                               ,Used to support Boot Option in MMC 4.3 version cards" "Disabled,Enabled"
bitfld.long 0x04 0. "      BOOT                                ,Boot Option 1" "Disabled,Enabled"
line.long 0x08 "VENDOR_BOOT_ACK_TIMEOUT_0,Vendor Boot Acknowledgement Timeout Register"
hexmask.long.tbyte 0x08 0.--19. 1. " VALUE                                  ,Boot Acknowledgment timeout value"
line.long 0x0C "VENDOR_BOOT_DAT_TIMEOUT_0,Boot Data Timeout Register"
hexmask.long 0x0C 0.--24. 1. " VALUE                                  ,Boot Data timeout value"
line.long 0x10 "VENDOR_DEBOUNCE_COUNT_0,Debounce Counter Value Register"
hexmask.long.tbyte 0x10 0.--23. 1. " VALUE                                  ,The number of 32KHz clock cycles is programmed to meet the debounce period of the card slot"
line.long 0x14 "VENDOR_MISC_CNTRL_0,Miscellaneous Vendor Control Register"
hexmask.long.word 0x14 16.--31. 1. " SDMMC_SPARE_1                          ,Spare register bits with reset value of 1"
hexmask.long.word 0x14 1.--15. 1. "          SDMMC_SPARE_0                       ,Spare register bits with reset value of 0x40"
textline "                                    "
bitfld.long 0x14 0. " ERASE_TIMEOUT_LIMIT                    ,Erase timeout value" "Finite,Infinite"
sif cpuis("TEGRAX2")
group.long 0x124++0x1F
line.long 0x00 "VENDOR_MISC_CNTRL1_0,Misc Vendor Control Register 1"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "VENDOR_MISC_CNTRL2_0,Misc Vendor Control Register 2"
bitfld.long 0x04 31. " VGPIO_MODE_EN                          ,VGPIO_MODE enable" "Disabled,Enabled"
bitfld.long 0x04 30. "      SDMMC_CLK_OVR_ON                    ,Master clk en Override bit for all SLCGs" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 29. " SD_CARD_DETECT_STATUS_N                ,SD card detect status n" "Detected,Not detected"
bitfld.long 0x04 28. "  SD_CARD_WP_STATUS                   ,SD card wp status" "Not protected,Protected"
textline "                                    "
bitfld.long 0x04 27. " CMD_TFIFO_HOT_RESET                    ,CMD TFIFO hot reset" "No reset,Reset"
bitfld.long 0x04 26. "      DAT_TFIFO_HOT_RESET                 ,DAT TFIFO hot reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x04 25. " ADMA3_CLKEN_OVERRIDE                   ,Override for sdmmc_adma3_g_clk clken" "Normal,Override"
textline "                                    "
bitfld.long 0x04 24. " CQE_CLKEN_OVERRIDE                     ,Override for sdmmc_cqe_g_clk clken" "Normal,Override"
bitfld.long 0x04 23. "      CQE_DESC_PREFETCH_EN                ,Enables CQE task descriptors pre-fetch feature" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 22. " ADMA3_DESC_PREFETCH_EN                 ,ADMA3 descriptors prefetch enable" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x04 21. " ADMA2_DESC_PREFETCH_EN                 ,ADMA2 descriptors prefetch enable" "Disabled,Enabled"
bitfld.long 0x04 16.--19. "      DATA_TIMEOUT_VAL_MULTIPLIER         ,Data timeout value multiplier" "No multiplier,?..."
textline "                                    "
bitfld.long 0x04 12.--15. " DAT_TUNING_ASYNC_FIFO_ADDNL_DELAY      ,Holds the additional delay in cycles which should be added to round trip delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "            ADDITIONAL_NCR_CYCLES               ,Additional NCR wait time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
else
group.long 0x124++0x1F
line.long 0x00 "MAX_CURR_OVER_0,Maximum Current Override 0 Register"
hexmask.long.byte 0x00 16.--23. 1. " OVERRIDE_FOR_1_8V                      ,Maximum override for 1.8V VDD1"
hexmask.long.byte 0x00 8.--15. 1. "            OVERRIDE_FOR_3_0V                   ,Maximum override for 3.0V VDD1"
textline "                                    "
hexmask.long.byte 0x00 0.--7. 1. " OVERRIDE_FOR_3_3V                      ,Maximum override for 3.3V VDD1"
line.long 0x04 "MAX_CURR_OVER_HI_0,Maximum Current Override High 0 Register"
hexmask.long.byte 0x04 0.--7. 1. " OVERRIDE_FOR_1_8V_VDD2                 ,Maximum override for 1.8V VDD2"
textline "                                    "
endif
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
group.long 0x1AC++0x03
line.long 0x00 "VENDOR_IO_TRIM_CNTRL_0,Vendor I/O Trimmer Control Register"
sif cpuis("TEGRAX2")
bitfld.long 0x00 6.--7. " TRIM_SEL_ATEST                         ,Select analog test signals to send to comp pad" "No used,Input,Output before analog mux,Output after analog mux"
textline "                                    "
endif
bitfld.long 0x00 5. " TRIM_PWRSAVE                           ,Enables power saving mode by clock gating the unused taps in delay chain" "No,Yes"
bitfld.long 0x00 3.--4. "                         SEL_VREF_LEVEL                       ,Selects Vref voltage level" "VREF_875_MV,VREF_900_MV,VREF_925_MV,VREF_950_MV"
textline "                                    "
bitfld.long 0x00 2. " SEL_VREG                               ,Select voltage supply for delay chain present in both Trimmer and DLLPROD value" "Regulated reference voltage,VAUXC"
bitfld.long 0x00 1. " SEL_VREF                             ,Select reference voltage for voltage regulator" "Bandgap Voltage Reference,Resistor divider voltage"
sif cpuis("TEGRAX2")
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL reset duration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when delay code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Config and Status Register"
rbitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
rbitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,MST_DLL_RST override enable" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,SLV_DLL_CLK_OUT_DIS override enable" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,MST_DLL_PWRDN override enable" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
else
group.long 0x1B0++0x0F
line.long 0x00 "VENDOR_DLLCAL_CFG_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x00 31. " CALIBRATE                              ,Used to start a DLL calibration process" "Not started,Started"
bitfld.long 0x00 25.--29. "                 END_COUNT                            ,Determines the end condition of the calibration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                    "
bitfld.long 0x00 24. " USE_STATIC_CYCLES                      ,Calibration will be stopped when num static cycles reaches END_COUNT" "Not stopped,Stopped"
bitfld.long 0x00 23. "                 IGNORE_START_TRIM                    ,Used to ignore the START_TRM value" "Not ignored,Ignored"
textline "                                    "
hexmask.long.byte 0x00 16.--22. 1. " START_TRIM                             ,Specifies the starting trimmer value to calibrate the with"
bitfld.long 0x00 12.--15. "                          FILTER_BITS                          ,LSB of the counter to use for updating the trimmer value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
bitfld.long 0x00 8.--11. " SAMPLE_COUNT                           ,Number of times the phase detector is sampled before going onto the next set of trimmer values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                          SAMPLE_DELAY                         ,Number of SDMMC host clks from changing the trimmer value"
line.long 0x04 "VENDOR_DLL_CTRL0_0,Vendor DLL Control Register 0"
bitfld.long 0x04 31. " MST_DLL_CLK_EN_OVERRIDE                ,Master DLL CLK_IN enable override" "Normal,Override"
bitfld.long 0x04 30. "                    TX_SLV_DLL_PWRSAVE                   ,Active low signal" "No clock,Clock"
textline "                                    "
bitfld.long 0x04 29. " RX_SLV_DLL_PWRSAVE                     ,Active low signal" "No clock,Clock"
hexmask.long.byte 0x04 22.--28. 1. "                    TX_SLV_DLL_DLY_CODE                  ,7-bit delay code to be applied to TX slave DLL"
textline "                                    "
hexmask.long.byte 0x04 15.--21. 1. " RX_SLV_DLL_DLY_CODE                    ,7-bit delay code to be applied to RX slave DLL"
bitfld.long 0x04 14. "                          DLLCAL_BYPASS                        ,DLL calibration bypass enable" "Disabled,Enabled"
textline "                                    "
hexmask.long.byte 0x04 7.--13. 1. " TX_DLY_CODE_OFFSET                     ,Two-s complement offset will be added to delay code generated by calibration controller and sent to TX slv DLL"
hexmask.long.byte 0x04 0.--6. 1. "                          RX_DLY_CODE_OFFSET                   ,Two-s complement offset will be added to delay code generated by calibration controller and sent to RX slv DLL"
line.long 0x08 "VENDOR_DLL_CTRL1_0,Vendor DLL Control Register 1"
hexmask.long.byte 0x08 24.--30. 1. " REQD_DELAY_STEPS_TX                    ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
hexmask.long.byte 0x08 16.--22. 1. "                          REQD_DELAY_STEPS_RX                  ,Delay required in steps of 1/64 UI - 0 to 63 steps MST DLL is half cycle locked"
textline "                                    "
bitfld.long 0x08 11.--15. " MST_DLL_RESET_TIME                     ,Master DLL CLK_IN enable override" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 7.--10. "                          SLV_DLL_SETTLE_TIME                  ,Slave DLL requires 4 cycles settle time when dly code is changed for providing stable output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                    "
hexmask.long.byte 0x08 0.--6. 1. " MST_DLL_DLY_CODE                       ,7-bit delay code (128 taps) to be applied to master DLL"
line.long 0x0C "VENDOR_DLLCAL_CFG_STA_0,Vendor DLL Calibration Configuration Register"
bitfld.long 0x0C 31. " DLL_CAL_ACTIVE                         ,Calibration process status software has to wait for DONE once calibrate bit is cleared and before starting data transfers on eMMC interface" "Done,Running"
bitfld.long 0x0C 30. "                     DLL_PD                               ,Master DLL Phase detector output" "0,1"
textline "                                    "
bitfld.long 0x0C 29. " MST_DLL_RST_OVERRIDE_EN                ,Master DLL reset is controlled by programming MST_DLL_RST/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 28. "                    MST_DLL_RST                          ,Master DLL reset" "No reset,Reset"
textline "                                    "
bitfld.long 0x0C 27. " SLV_DLL_CLK_OUT_DIS_OVERRIDE_EN        ,Slave DLL clk_out_dis is controlled by programming SLV_DLL_CLK_OUT_DIS/DLL controller" "Disabled,Enabled"
bitfld.long 0x0C 26. "                    SLV_DLL_CLK_OUT_DIS                  ,Slave DLL clock out disable" "No,Yes"
textline "                                    "
bitfld.long 0x0C 25. " MST_DLL_PWRDN_OVERRIDE_EN              ,Master DLL can be kept in power down mode by programming MST_DLL_PWRDN field" "Disabled,Enabled"
bitfld.long 0x0C 24. "                          MST_DLL_PWRDN                  ,Master DLL power down enable - active high control - used when MST_DLL_PWRDN_OVERRIDE_EN is set" "Power up,Power down"
textline "                                    "
hexmask.long.byte 0x0C 16.--22. 1. " TX_DLY_CODE_ADJ                        ,Delay code sent to TX slave DLL after applying offset"
hexmask.long.byte 0x0C 8.--14. 1. "                          RX_DLY_CODE_ADJ                      ,Delay code sent to RX slave DLL after applying offset"
textline "                                    "
hexmask.long.byte 0x0C 0.--6. 1. " DLY_CODE                               ,Holds delay code determined by calibration process which is sent to MST DLL during calibration"
endif
group.long 0x1C0++0x07
line.long 0x00 "VENDOR_TUNING_CNTRL0_0,Vendor Tuning Control 0 Register"
bitfld.long 0x00 30. " RD_DATA_CRC_ERR_EN                     ,Re-tuning request/tuning error is not generated on read data CRC error" "Disabled,Enabled"
bitfld.long 0x00 29. "                    WR_DATA_CRC_ERR_EN                   ,Re-tuning request/tuning error is not generated on write CRC error" "Disabled,Enabled"
textline "                                    "
bitfld.long 0x00 28. " CMD_CRC_ERR_EN                         ,Re-tuning request/tuning error is not generated on cmd CRC error" "Disabled,Enabled"
bitfld.long 0x00 27. "                    RETUNING_REQ_EN_ON_CRC_ERR_DETECTION ,Generates re-tuning request" "Not generated,Generated"
textline "                                    "
bitfld.long 0x00 26. " TUNING_ERR_EN_ON_CRC_ERR_DETECTION     ,Generates tuning error" "Not generated,Generated"
hexmask.long.byte 0x00 18.--25. 1. "               START_TAP_VAL                        ,Start tap value to be used by tuning"
textline "                                    "
bitfld.long 0x00 17. " TAP_VAL_UPDATED_BY_HW                  ,Software can choose to update the tap value by itself" "Not updated,Updated"
bitfld.long 0x00 13.--15. "                 NUM_TUNING_ITERATIONS                ,The number of tuning iterations to be used by tuning circuit" "TRIES_40,TRIES_64,TRIES_128,TRIES_192,TRIES_256,?..."
textline "                                    "
hexmask.long.byte 0x00 6.--12. 1. " MUL_M                                  ,Implements a multiplier"
bitfld.long 0x00 3.--5. "                          DIV_N                                ,Implements a divider" "1,2,4,8,16,32,64,128"
textline "                                    "
bitfld.long 0x00 0.--2. " TUNING_WORD_SEL                        ,Selects desired word from 256-bit tuning status bitmap status_word" "0,1,2,3,4,5,6,7"
line.long 0x04 "VENDOR_TUNING_CNTRL1_0,Vendor Tuning Control 1 Register"
bitfld.long 0x04 4.--6. " STEP_SIZE_SDR104_HS200                 ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 0.--2. "                           STEP_SIZE_SDR50                      ,TAP_VAL is incremented by step_size for every tuning iteration" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C8++0x07
line.long 0x00 "VENDOR_TUNING_STATUS0_0,Vendor Tuning Status 0 Register"
line.long 0x04 "VENDOR_TUNING_STATUS1_0,Vendor Tuning Status 1 Register"
hexmask.long.byte 0x04 24.--31. 1. " PASS_WINDOW_END_BEFORE_FINE_TUNING     , End tap value of best PASS window found by scan FSM"
hexmask.long.byte 0x04 16.--23. 1. "                          PASS_WINDOW_START_BEFORE_FINE_TUNING ,Start tap value of best PASS window found by scan FSM"
textline "                                    "
hexmask.long.byte 0x04 8.--15. 1. " PASS_WINDOW_END_AFTER_FINE_TUNING      ,End tap value of best PASS window after fine tuning"
hexmask.long.byte 0x04 0.--7. 1. "                          PASS_WINDOW_START_AFTER_FINE_TUNING  ,Start tap value of best PASS window after fine tuning"
textline "                                    "
endif
width 28.
group.long 0x1D0++0x0F
line.long 0x00 "VENDOR_CLK_GATE_HYST_CNT_0,Vendor Clock Gating Hysteresis Counter Initial Value"
bitfld.long 0x00 0.--5. " CLK_COUNT                    ,CLK count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "VENDOR_PRESET_VAL0_0,Vendor Preset Value Register 0"
hexmask.long.word 0x04 20.--29. 1. " SDCLK_FREQ_SEL_HIGH_SPEED    ,10-bit divider value to generate an SD clock in default speed mode (<50 MHz)"
hexmask.long.word 0x04 10.--19. 1. "          SDCLK_FREQ_SEL_DEFAULT           ,10-bit divider value to generate an SD clock in default speed mode (<25 MHz)"
textline "                                     "
hexmask.long.word 0x04 0.--9. 1. " SDCLK_FREQ_SEL_INIT          ,10-bit divider value to generate the desired SD clock frequency during initialization"
line.long 0x08 "VENDOR_PRESET_VAL1_0,Vendor Preset Value Register 1"
hexmask.long.word 0x08 20.--29. 1. " SDCLK_FREQ_SEL_SDR50         ,10-bit divider value to generate the SD clock in SDR50 mode"
hexmask.long.word 0x08 10.--19. 1. "          SDCLK_FREQ_SEL_SDR25             ,10-bit divider value to generate the SD clock in SDR25 mode"
textline "                                     "
hexmask.long.word 0x08 0.--9. 1. " SDCLK_FREQ_SEL_SDR12         ,10-bit divider value to generate the SD clock in SDR12 mode"
line.long 0x0C "VENDOR_PRESET_VAL2_0,Vendor Preset Value Register 2"
hexmask.long.word 0x0C 10.--19. 1. " SDCLK_FREQ_SEL_DDR50         ,10-bit divider value to generate the SD clock in DDR50 mode"
hexmask.long.word 0x0C 0.--9. 1. "          SDCLK_FREQ_SEL_SDR104            ,10-bit divider value to generate the SD clock in SDR104 mode"
sif cpuis("TEGRAX2")
if (((d.l(ad:0x03470000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_E_PBIAS_BUF             ,Enables internally generated bias levels for driver PMOS" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             COMP_PAD_DRVUP_OVR               ,Used to drive DRVUP input of COMP pad"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " COMP_PAD_DRVDN_OVR           ,Used to drive DRVDN input of COMP pad"
textline "                                     "
bitfld.long 0x00 11. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Select different bias levels for driver PMOS when E_PBIAS_BUF=1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
elif cpuis("TEGRAX1")
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 30. "      COMP_PAD_REG_ON                  ,Turns ON regulator in comp pad" "0,1"
textline "                                     "
bitfld.long 0x00 27.--28. " COMP_PAD_DRV_TYPE            ,Used to control drv_type input of BDSDMEMLVCOMP_C pad" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 10. " COMP_PAD_E_TEST_OUT          ,Used to control e_test_out input of COMP pad" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 4.--6. " COMP_PAD_TEST_SEL            ,Used to control test_sel input of COMP pad" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,Used to control vref_sel input of COMP pad" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
if (((d.l(ad:0x03470000+0x1E4))&0x20000000)==0x20000000)
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,Pu pad drv type" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,Pd pad drv type" "0,1,2,3"
bitfld.long 0x00 11. "             PU_PAD_E_TEST_OUT                ,Pu pad E test out" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,Pd pad E test out" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,pu pad test sel" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,Pd pad test sel" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,sdmmc2tmc cfg Sdmemcomp vref sel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x1E0++0x03
line.long 0x00 "SDMEMCOMPPADCTRL_0,SDMEMCOMP Pad Control Register"
bitfld.long 0x00 31. " PAD_E_INPUT_OR_E_PWRD        ,Used to control E_INPUT" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "      PU_PAD_DRV_TYPE                  ,PU PAD DRV TYPE" "0,1,2,3"
textline "                                     "
bitfld.long 0x00 27.--28. " PD_PAD_DRV_TYPE              ,PD PAD DRV TYPE" "0,1,2,3"
hexmask.long.byte 0x00 20.--26. 1. "             CFG_SDMEMCOMP_DRVUP              ,SDMMC pads drive up/down control"
textline "                                     "
hexmask.long.byte 0x00 12.--18. 1. " CFG_SDMEMCOMP_DRVDN          ,SDMMC pads drive up/down control"
bitfld.long 0x00 11. "            PU_PAD_E_TEST_OUT                ,PU PAD E TEST OUT" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 10. " PD_PAD_E_TEST_OUT            ,PD_PAD_E_TEST_OUT" "Disabled,Enabled"
bitfld.long 0x00 7.--9. "      PU_PAD_TEST_SEL                  ,PU PAD TEST SEL" "0,1,2,3,4,5,6,7"
textline "                                     "
bitfld.long 0x00 4.--6. " PD_PAD_TEST_SEL              ,PD PAD TEST SEL" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--3. "             SDMMC2TMC_CFG_SDMEMCOMP_VREF_SEL ,SDMMC2TMC CFG SDMEMCOMP VREF SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
endif
group.long 0x1E4++0x07
line.long 0x00 "AUTO_CAL_CFG_0,SDMEMCOMP Pad Auto-Calibration Settings"
bitfld.long 0x00 31. " AUTO_CAL_START               ,Calibration state machine" "Disabled,Enabled"
bitfld.long 0x00 30. "      AUTO_CAL_OVERRIDE                ,AUTOCAL override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 29. " AUTO_CAL_ENABLE              ,AUTOCAL enable" "Disabled,Enabled"
bitfld.long 0x00 28. "      AUTO_CAL_SLW_OVERRIDE            ,AUTOCAL slew rate override" "Normal,Override"
textline "                                     "
bitfld.long 0x00 16.--18. " AUTO_CAL_STEP                ,Calibration step interval" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x00 8.--14. 1. "             AUTO_CAL_PD_OFFSET               ,2's complement offset for pull-down value"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PU_OFFSET           ,2's complement offset for pull-up value"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
else
group.long 0x1E8++0x07
line.long 0x00 "AUTO_CAL_INTERVAL_0,SDMEMCOMP Pad Calibration Interval"
rgroup.long 0x1EC++0x03
line.long 0x00 "AUTO_CAL_STATUS_0,SDMEMCOMP Pad Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE              ,Auto cal active" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "      AUTO_CAL_PULLDOWN_ADJ            ,Pulldown code sent to pads"
textline "                                     "
hexmask.long.byte 0x00 16.--22. 1. " AUTO_CAL_PULLUP_ADJ          ,Pullup code sent to pads"
hexmask.long.byte 0x00 8.--14. 1. "            AUTO_CAL_PULLDOWN                ,Pulldown code generated by auto-calibration"
textline "                                     "
hexmask.long.byte 0x00 0.--6. 1. " AUTO_CAL_PULLUP              ,Pullup code generated by auto-calibration"
endif
sif cpuis("TEGRAX1")
group.long 0x1F0++0x07
line.long 0x00 "IO_SPARE_0,Memory Client Interface FIFO Control"
hexmask.long.word 0x00 16.--31. 1. " SPARE_OUT                    ,PROD value"
hexmask.long.word 0x00 0.--15. 1. "          SPARE_IN                         ,PROD value"
endif
sif cpuis("TEGRAX2")
textline "                                     "
group.long 0x1FC++0x0B
line.long 0x00 "CIF2AXI_CTRL_0,SD/MMC CIF2AXI Control Register"
hexmask.long.byte 0x00 8.--15. 1. " MC_WRITE_REQ_STREAM_ID         ,MC write transaction stream ID"
hexmask.long.byte 0x00 0.--7. 1. "          MC_READ_REQ_STREAM_ID            ,MC read transaction stream ID"
group.long 0x200++0x07
line.long 0x00 "TZ_DMA_CTRL_0,SD/MMC DMA Requests Security Attribute Control Register"
bitfld.long 0x00 1. " MC_WRITE_REQ_TZ_ACCESS_EN      ,MC_WRITE_REQ_TZ_ACCESS enable" "Disabled,Enabled"
bitfld.long 0x00 0. "    MC_READ_REQ_TZ_ACCESS_EN         ,MC_READ_REQ_TZ_ACCESS enable" "Disabled,Enabled"
line.long 0x04 "VENDOR_MISC_CNTRL3_0,Misc Vendor Control Register 3"
bitfld.long 0x04 30. " STOP_TRIM_IN_CLK_DURING_TUNING ,Stops rx clk trimmer and rx FIFOs input clock during tuning" "Not stopped,Stopped"
bitfld.long 0x04 24.--29. " TUNING_TRIMMER_RECOVERY_TIME     ,TUNING TRIMMER RECOVERY TIME" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                     "
hexmask.long.byte 0x04 8.--15. 1. " E_DIFF_DQ                      , Diff/Vref rx selection for DAT[7:0]"
bitfld.long 0x04 4. "          E_DIFF_CMD                       ,Diff/Vref rx selection for CMD" "Stopped,Not stopped"
textline "                                     "
bitfld.long 0x04 3. " DAT_OE_POSTAMBLE_EN            ,DAT pads output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 2. "    DAT_OE_PREAMBLE_EN               ,DAT pads output driver one cycle before enable" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x04 1. " CMD_OE_POSTAMBLE_EN            ,CMD pad output driver one cycle after disable" "Disabled,Enabled"
bitfld.long 0x04 0. "    CMD_OE_PREAMBLE_EN               ,CMD pad output driver one cycle before enable" "Disabled,Enabled"
group.long 0x20C++0x07
line.long 0x00 "VENDOR_MISC_CNTRL4_0,Misc Vendor Control Register 4"
hexmask.long.word 0x00 16.--31. 1. " SDMMC_SPARE3                   ,Spare register bits with reset value of 1"
hexmask.long.word 0x00 0.--15. 1. "        SDMMC_SPARE2                     ,Spare register bits with reset value of 0"
else
group.long 0x1F4++0x07
line.long 0x00 "SDMMC_MCCIF_FIFOCTRL_0,Memory Client Interface FIFO Control"
bitfld.long 0x00 20. " SDMMC_RCLK_OVR_MODE          ,SDMMC RCLK OVR MODE" "Disabled,Enabled"
bitfld.long 0x00 19. "      SDMMC_WCLK_OVR_MODE              ,SDMMC WCLK OVR MODE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 18. " SDMMC_CCLK_OVERRIDE          ,SDMMC CCLK OVERRIDE" "Disabled,Enabled"
bitfld.long 0x00 17. "      SDMMC_RCLK_OVERRIDE              ,SDMMC RCLK OVERRIDE" "Disabled,Enabled"
textline "                                     "
bitfld.long 0x00 16. " SDMMC_WCLK_OVERRIDE          ,SDMMC WCLK OVERRIDE" "Disabled,Enabled"
line.long 0x04 "TIMEOUT_WCOAL_SDMMC_0,Write Coalescing Time-Out Register"
hexmask.long.byte 0x04 0.--7. 1. " SDMMCW_WCOAL_TMVAL           ,SDMMCW WCOAL TMVAL"
endif
tree.end
width 0x0B
tree.end
tree.end
tree "I2C Controller"
tree "I2C1"
base ad:0x03160000
width 20.
if (((per.l(ad:0x03160000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x03160000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03160000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x03160000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x03160000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03160000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03160000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03160000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03160000+0x30))&0x01)==0x01)&&(((per.l(ad:0x03160000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C2"
base ad:0x0C240000
width 20.
if (((per.l(ad:0x0C240000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x0C240000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x0C240000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x0C240000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x0C240000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C240000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C240000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C240000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C240000+0x30))&0x01)==0x01)&&(((per.l(ad:0x0C240000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C3"
base ad:0x03180000
width 20.
if (((per.l(ad:0x03180000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x03180000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03180000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x03180000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x03180000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03180000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03180000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03180000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03180000+0x30))&0x01)==0x01)&&(((per.l(ad:0x03180000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C4"
base ad:0x03190000
width 20.
if (((per.l(ad:0x03190000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x03190000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03190000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x03190000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x03190000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03190000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03190000+0x30))&0x01)==0x00)&&(((per.l(ad:0x03190000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x03190000+0x30))&0x01)==0x01)&&(((per.l(ad:0x03190000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C5"
base ad:0x031A0000
width 20.
if (((per.l(ad:0x031A0000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x031A0000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x031A0000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x031A0000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x031A0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031A0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031A0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031A0000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031A0000+0x30))&0x01)==0x01)&&(((per.l(ad:0x031A0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C6"
base ad:0x031B0000
width 20.
if (((per.l(ad:0x031B0000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x031B0000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x031B0000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x031B0000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x031B0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031B0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031B0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031B0000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031B0000+0x30))&0x01)==0x01)&&(((per.l(ad:0x031B0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C7"
base ad:0x031C0000
width 20.
if (((per.l(ad:0x031C0000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x031C0000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x031C0000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x031C0000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x031C0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031C0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031C0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031C0000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031C0000+0x30))&0x01)==0x01)&&(((per.l(ad:0x031C0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C8"
base ad:0x0C250000
width 20.
if (((per.l(ad:0x0C250000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x0C250000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x0C250000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x0C250000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x0C250000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C250000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C250000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C250000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C250000+0x30))&0x01)==0x01)&&(((per.l(ad:0x0C250000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C9"
base ad:0x031E0000
width 20.
if (((per.l(ad:0x031E0000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x031E0000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x031E0000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x031E0000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x031E0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031E0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031E0000+0x30))&0x01)==0x00)&&(((per.l(ad:0x031E0000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x031E0000+0x30))&0x01)==0x01)&&(((per.l(ad:0x031E0000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree "I2C10"
base ad:0x0C230000
width 20.
if (((per.l(ad:0x0C230000))&0x10)==0x10)
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 7. "        CMD2                   ,Read/Write Command for Slave 2" "Write,Read"
bitfld.long 0x00 6. "              CMD1                ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
else
group.long 0x00++0x03
line.long 0x00 "CNFG_0,IC Controller Configuration Register"
sif cpuis("TEGRAX1")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Disabled,Enabled"
textline "                             "
elif cpuis("TEGRAX2")
bitfld.long 0x00 17. " MULTI_MASTER_MODE           ,Select single or multi master mode" "Single,Multi"
bitfld.long 0x00 16. "          HS_RND_TRIP_DLY_EFFECT ,Diagnostic bit to disable round trip delay effect on data rate in HS mode" "Disabled,Enabled"
textline "                             "
endif
bitfld.long 0x00 15. " MSTR_CLR_BUS_ON_TIMEOUT     ,I2C master force clock low on timeout" "Disabled,Enabled"
bitfld.long 0x00 12.--14. "        DEBOUNCE_CNT           ,De-bounce period for SDA and SCL lines" "No Debounce,2T,4T,6T,8T,10T,12T,14T"
textline "                             "
bitfld.long 0x00 11. " NEW_MASTER_FSM              ,Maintained for compatibility sake" "Disabled,Enabled"
bitfld.long 0x00 10. "        PACKET_MODE_EN         ,Initiate transfer in packet mode" "NOP,GO"
bitfld.long 0x00 9. "                SEND                ,Master initiates the transaction in normal mode" "NOP,GO"
textline "                             "
bitfld.long 0x00 8. " NOACK                       ,No ACK mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "        CMD1                   ,Read/Write Command for Slave 1" "Write,Read"
textline "                             "
bitfld.long 0x00 5. " START                       ,Send Start byte" "Disabled,Enabled"
bitfld.long 0x00 4. "        SLV2                   ,Enables a two slave transaction" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "           LENGTH              ,Number of bytes to be transmitted per transaction" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
textline "                             "
bitfld.long 0x00 0. " A_MOD                       ,7-bit or a 10-bit slave address" "7-bit address,10-bit address"
endif
if (((per.l(ad:0x0C230000))&0x01)==0x01)
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.word 0x00 0.--9. 1. " ADDR0                       ,I2C Slave-1 Address"
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.word 0x04 0.--9. 1. " ADDR1                       ,I2C Slave-2 Address"
else
group.long 0x04++0x07
line.long 0x00 "CMD_ADDR0_0,I2C Slave-1 Address"
hexmask.long.byte 0x00 1.--7. 1. " ADDR0                       ,I2C Slave-1 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x00 0. " CMD_ADDR0[0]                ,Indicates read/write transaction" "Write,Read"
endif
line.long 0x04 "CMD_ADDR1_0,I2C Slave-2 Address"
hexmask.long.byte 0x04 1.--7. 1. " ADDR1                       ,I2C Slave-2 Address"
sif (cpuis("TEGRAX1")||cpuis("TEGRAX2"))
textline "                             "
bitfld.long 0x04 0. " CMD_ADDR1[0]                ,Indicates read/write transaction" "Write,Read"
endif
endif
group.long 0x0C++0x07
line.long 0x00 "CMD_DATA1_0,I2C Controller Data 1 Transmit/Receive"
hexmask.long.byte 0x00 24.--31. 1. " DATA4                       ,Fourth data byte to be sent/received"
hexmask.long.byte 0x00 16.--23. 1. "              DATA3                  ,Third data byte to be sent/received"
hexmask.long.byte 0x00 8.--15. 1. "                 DATA2               ,Second data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " DATA1                       ,First data byte to be sent/received"
line.long 0x04 "CMD_DATA2_0,I2C Controller Data 2 Transmit/Receive"
hexmask.long.byte 0x04 24.--31. 1. " DATA8                       ,Eighth data byte to be sent/received"
hexmask.long.byte 0x04 16.--23. 1. "              DATA7                  ,Seventh data byte to be sent/received"
hexmask.long.byte 0x04 8.--15. 1. "                 DATA6               ,Sixth data byte to be sent/received"
textline "                             "
hexmask.long.byte 0x04 0.--7. 1. " DATA5                       ,Fifth data byte to be sent/received"
rgroup.long 0x1C++0x03
line.long 0x00 "STATUS_0,I2C Controller Master Status"
bitfld.long 0x00 8. " BUSY                        ,Master busy" "Not busy,Busy"
bitfld.long 0x00 4.--7. "        CMD2_STAT              ,Transaction for Slave 2" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
bitfld.long 0x00 0.--3. "  CMD1_STAT           ,Transaction for Slave 1" "Successful,NOACK for byte 1,NOACK for byte 2,NOACK for byte 3,NOACK for byte 4,NOACK for byte 5,NOACK for byte 6,NOACK for byte 7,NOACK for byte 8,NOACK for byte 9,NOACK for byte 10,?..."
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x0C230000+0x20))&0x100000)==0x100000)
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 21. " SLV_XFER_ERR_CLK_STRETCH_EN ,Enables the slave stretch I2C SCL line" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
textline "                             "
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid (write-only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
else
group.long 0x20++0x03
line.long 0x00 "SL_CNFG_0,I2C Controller Slave Configuration"
bitfld.long 0x00 20. " FIFO_XFER_EN                ,FIFO transfer enabled" "Disabled,Enabled"
hexmask.long.word 0x00 8.--19. 1. "        BUFFER_SIZE            ,Payload size in bytes"
bitfld.long 0x00 7. "               ACK_LAST_BYTE_VALID ,ACK the last byte valid(Write-Only)" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 6. " ACK_LAST_BYTE               ,ACK the last byte" "Disabled,Enabled"
bitfld.long 0x00 5. "        ACK_WITHHOLD_EN        ,Ack withhold feature enable" "Disabled,Enabled"
bitfld.long 0x00 4. "           PKT_MODE_EN         ,Packet mode enable" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 3. " ENABLE_SL                   ,Enable slave" "Disabled,Enabled"
bitfld.long 0x00 2. "        NEWSL                  ,Use new slave" "Disabled,Enabled"
bitfld.long 0x00 1. "           NACK                ,Disable Slave acknowledge -The slave will not acknowledge reception of address or data byte" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 0. " RESP                        ,Slave response to general call address" "Disabled,Enabled"
endif
group.long 0x24++0x03
line.long 0x00 "SL_RCVD_0,I2C Controller Slave Receive/Transmit Data"
hexmask.long.byte 0x00 0.--7. 1. " SL_DATA                     ,Slave received data"
if (((per.l(ad:0x0C230000+0x28))&0x80)==0x80)
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
hexmask.long.byte 0x00 8.--14. 1. " HW_MSTR_ADR                 ,Hardware master address received via general call addressing"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
else
group.long 0x28++0x03
line.long 0x00 "SL_STATUS_0,I2C Controller Slave Status"
textline "                             "
bitfld.long 0x00 7. " HW_MSTR_INT                 ,Interrupt generated by the slave when hardware master address is received" "No interrupt,Interrupt"
bitfld.long 0x00 6. "    REPROG_SL              ,Interrupt generated by the slave after the General Call Address is 0x04" "No interrupt,Interrupt"
bitfld.long 0x00 5. "       RST_SL              ,Interrupt generated by the slave after the General Call Address is 0x06" "No interrupt,Interrupt"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,Slave Transaction complete" "Completed,In progress"
bitfld.long 0x00 3. "     SL_IRQ                 ,Interrupt generated by slave" "Not interrupt,Interrupt"
bitfld.long 0x00 2. "      RCVD                ,New transaction received status" "Not occurred,Occurred"
textline "                             "
rbitfld.long 0x00 1. " RNW                         ,Slave transaction status" "Write,Read"
bitfld.long 0x00 0. "           ZA                     ,Zero address status" "No response,Response"
endif
group.long 0x2C++0x03
line.long 0x00 "SL_ADDR1_0,I2C Controller Slave Address 1 Register"
hexmask.long.byte 0x00 8.--15. 1. " SL_ADDR1                    ,Slave address 1 (for a 10-bit slave address: least significant 8 bits)"
hexmask.long.byte 0x00 0.--7. 1. "              SL_ADDR0               ,Slave address 0 (for a 10-bit slave address: least significant 8 bits)"
if (((per.l(ad:0x0C230000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C230000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C230000+0x30))&0x01)==0x00)&&(((per.l(ad:0x0C230000+0x30))&0x100)==0x100)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
elif (((per.l(ad:0x0C230000+0x30))&0x01)==0x01)&&(((per.l(ad:0x0C230000+0x30))&0x100)==0x00)
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
else
group.long 0x30++0x07
line.long 0x00 "SL_ADDR2_0,I2C Controller Slave Address 2 Register"
bitfld.long 0x00 16. " SELECT_SLAVE                ,Select slave" "ADDR0,ADDR1"
bitfld.long 0x00 9.--10. "           SL1_ADDR_HI            ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 8. " SL1_VLD                     ,Addressing mode" "7bit,10bit"
bitfld.long 0x00 1.--2. "           SL_ADDR_HI             ,Two most significant bits of the address" "00,01,10,11"
textline "                             "
bitfld.long 0x00 0. " VLD                         ,Addressing mode" "7bit,10bit"
endif
group.long 0x34++0x07
line.long 0x00 "TLOW_SEXT_0,I2C Controller SMBUS Timeout Thresholds"
bitfld.long 0x00 27. " RST_SL_ON_TIMEOUT           ,Reset Slave state machine on time-out" "Disabled,Enabled"
bitfld.long 0x00 26. "        TLOW_MEXT_EN           ,Enable TLOW_MEXT counter" "Disabled,Enabled"
bitfld.long 0x00 25. "           TLOW_SEXT_EN        ,Enable TLOW_SEXT counter" "Disabled,Enabled"
textline "                             "
bitfld.long 0x00 24. " TIMEOUT_EN                  ,Enable TIMEOUT counter" "Disabled,Enabled"
hexmask.long.byte 0x00 16.--23. 1. "        TLOW_MEXT              ,Cumulative clock low extend time (transfer period)"
hexmask.long.byte 0x00 8.--15. 1. "                 TLOW_SEXT           ,Cumulative clock low extend time (complete transfer)"
textline "                             "
hexmask.long.byte 0x00 0.--7. 1. " TIMEOUT                     ,Clock low timeout period in milliseconds"
group.long 0x3C++0x07
line.long 0x00 "SL_DELAY_COUNT_0,I2C Slave Controller Delay Count"
hexmask.long.word 0x00 0.--15. 1. " SL_DELAY_COUNT              ,Timing between address-data cycles or data-data cycles"
line.long 0x04 "SL_INT_MASK_0,I2C Controller Slave Mask"
bitfld.long 0x04 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Mask" "Disabled,Enabled"
bitfld.long 0x04 6. "        REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Mask" "Disabled,Enabled"
bitfld.long 0x04 5. "           RST_SL              ,RST_SL (General Call Address is 0x06) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 4. " END_TRANS                   ,END_TRANS (Transaction complete) Mask" "Disabled,Enabled"
bitfld.long 0x04 3. "        SL_IRQ                 ,SL_IRQ (Interrupt generated) Mask" "Disabled,Enabled"
bitfld.long 0x04 2. "           RCVD                ,RCVD (Transaction received) Mask" "Disabled,Enabled"
textline "                             "
bitfld.long 0x04 0. " ZA                          ,ZA (Zero address) Mask" "Disabled,Enabled"
rgroup.long 0x44++0x03
line.long 0x00 "SL_INT_SOURCE_0,I2C Controller Slave Interrupt Source"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
group.long 0x48++0x03
line.long 0x00 "SL_INT_SET_0,I2C Controller Slave Interrupt Set"
bitfld.long 0x00 7. " HW_MSTR_INT                 ,HW_MSTR_INT (Hardware master address is received) Source" "Unset,Set"
bitfld.long 0x00 6. "           REPROG_SL              ,REPROG_SL (General Call Address is 0x04) Source" "Unset,Set"
bitfld.long 0x00 5. "              RST_SL              ,RST_SL (General Call Address is 0x06) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 4. " END_TRANS                   ,END_TRANS (Transaction complete) Source" "Unset,Set"
bitfld.long 0x00 3. "           SL_IRQ                 ,SL_IRQ (Interrupt generated) Source" "Unset,Set"
bitfld.long 0x00 2. "              RCVD                ,RCVD (Transaction received) Source" "Unset,Set"
textline "                             "
bitfld.long 0x00 0. " ZA                          ,ZA (Zero address) Source" "Unset,Set"
tree "Packet Mode"
width 29.
group.long 0x50++0x0F
line.long 0x00 "TX_PACKET_FIFO_0,TX Packet FIFO"
rgroup.long 0x54++0x07
line.long 0x00 "RX_FIFO_0,Header or I2C Specific Header or Data"
line.long 0x04 "PACKET_TRANSFER_STATUS_0,I2C Packet Transfer Status"
bitfld.long 0x04 24. " TRANSFER_COMPLETE                ,The packet transfer for which last packet is set has been completed" "Unset,Set"
hexmask.long.byte 0x04 16.--23. 1. "                  TRANSFER_PKT_ID             ,The current packet ID for which the transaction is happening on the bus"
textline "                                      "
hexmask.long.word 0x04 4.--15. 1. " TRANSFER_BYTENUM                 ,The number of bytes transferred in the current packet"
bitfld.long 0x04 3. "                   NOACK_FOR_ADDR              ,No ACK received for the address byte" "ACK,No ACK"
textline "                                      "
bitfld.long 0x04 2. " NOACK_FOR_DATA                   ,No ACK received for the data byte" "ACK,No ACK"
bitfld.long 0x04 1. "                 ARB_LOST                    ,Arbitration lost for the current byte" "Not lost,Lost"
textline "                                      "
bitfld.long 0x04 0. " CONTROLLER_BUSY                  ,Controller is busy" "Not busy,Busy"
group.long 0x5C++0x03
line.long 0x00 "FIFO_CONTROL_0,I2C FIFO Control Register"
bitfld.long 0x00 13.--15. " SLV_TX_FIFO_TRIG                 ,Slave Transmit FIFO trigger" "1 word,2 words,?..."
bitfld.long 0x00 10.--12. "                SLV_RX_FIFO_TRIG            ,Slave Receive FIFO trigger" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 9. " SLV_TX_FIFO_FLUSH                ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 8. "              SLV_RX_FIFO_FLUSH           ,Flush the RX FIFO" "No effect,Flush"
textline "                                      "
bitfld.long 0x00 5.--7. " TX_FIFO_TRIG                     ,Transmit FIFO trigger level" "1 word,2 words,?..."
bitfld.long 0x00 2.--4. "                RX_FIFO_TRIG                ,Receive FIFO trigger level" "1 word,2 words,?..."
textline "                                      "
bitfld.long 0x00 1. " TX_FIFO_FLUSH                    ,Flush the TX FIFO" "No effect,Flush"
bitfld.long 0x00 0. "              RX_FIFO_FLUSH               ,Flush the RX FIFO" "No effect,Flush"
rgroup.long 0x60++0x03
line.long 0x00 "FIFO_STATUS_0,I2C FIFO Status Register"
bitfld.long 0x00 25. " SLV_XFER_ERR_REASON              ,Nature of the packet transfer error" "Terminated before end,Not terminated"
bitfld.long 0x00 20.--23. "  SLV_TX_FIFO_EMPTY_CNT       ,The number of slots that can be written to the slave TX" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 16.--19. " SLV_RX_FIFO_FULL_CNT             ,The number of slots to be read from the Slave RX" "RX FIFO empty,1 slot full,2 slots full,?..."
bitfld.long 0x00 4.--7. "          TX_FIFO_EMPTY_CNT           ,The number of slots that can be written to the TX FIFO" "TX FIFO Full,1 slot empty,2 slots empty,?..."
textline "                                      "
bitfld.long 0x00 0.--3. " RX_FIFO_FULL_CNT                 ,The number of slots to be read from the RX FIFO" "RX FIFO empty,1 slot full,2 slots full,?..."
textline "                                      "
group.long 0x64++0x03
line.long 0x00 "INTERRUPT_MASK_REGISTER_0,I2C Interrupt Mask Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD_INT_EN          ,SLV_ACK_WITHHELD (Withheld - waiting for sw explicit info about ACK) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "               SLV_RD2WR_INT_EN            ,SLV_RD2WR (Transaction switching from rd to wr) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD_INT_EN                 ,SLV_WR2RD (Transaction switching from wr to rd) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "               SLV_PKT_XFER_ERR_INT_EN     ,SLV_PKT_XFER_ERR (Request error) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is empty) Interrupt Enable" "Disabled,Enabled"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ_INT_EN         ,SLV_TX_BUFFER_REQ (Slave TX buffer is full) Interrupt Enable" "Disabled,Enabled"
endif
bitfld.long 0x00 23. "               SLV_RX_BUFFER_FILLED_INT_EN ,SLV_RX_BUFFER_FILLED (Slave Rx buffer is full) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE_INT_EN  ,SLV_PACKET_XFER_COMPLETE (Slave packet transfer complete) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 21. "               SLV_TFIFO_OVF_REQ_INT_EN    ,SLV_TFIFO_OVF_REQ (Slave TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF_REQ_INT_EN         ,SLV_RFIFO_UNF_REQ (Slave Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "               SLV_TFIFO_DATA_REQ_INT_EN   ,SLV_TFIFO_DATA_REQ (Slave TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ_INT_EN        ,SLV_RFIFO_DATA_REQ (Slave Rx FIFO data request) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 11. "               BUS_CLEAR_DONE_INT_EN       ,BUS_CLEAR_DONE (Bus clear done status) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,TLOW_MEXT_TIMEOUT_EN (SMBUS mext time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "               TLOW_SEXT_TIMEOUT_EN        ,TLOW_SEXT_TIMEOUT_EN (SMBUS sext time-out) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT_INT_EN                   ,TIMEOUT (SMBUS time-out) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "               PACKET_XFER_COMPLETE_INT_EN ,PACKET_XFER_COMPLETE (Packet has been transferred successfully) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE_INT_EN ,ALL_PACKETS_XFER_COMPLETE (All the packets transferred successfully) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "               TFIFO_OVF_INT_EN            ,TFIFO_OVF (TX FIFO overflow) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF_INT_EN                 ,RFIFO_UNF (Rx FIFO underflow) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "               NOACK_INT_EN                ,NOACK (No ACK from slave) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST_INT_EN                  ,ARB_LOST (Arbitration lost) Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "               TFIFO_DATA_REQ_INT_EN       ,TFIFO_DATA_REQ (TX FIFO data request) Interrupt Enable" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ_INT_EN            ,RFIFO_DATA_REQ (RX FIFO data request) Interrupt Enable" "Disabled,Enabled"
group.long 0x68++0x03
line.long 0x00 "INTERRUPT_STATUS_REGISTER_0,I2C Interrupt Status Register"
eventfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Withheld - Waiting for sw explicit info about ACK" "No interrupt,Interrupt"
eventfld.long 0x00 27. "           SLV_RD2WR                   ,Transaction switching from rd to wr" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd" "No interrupt,Interrupt"
eventfld.long 0x00 25. "           SLV_PKT_XFER_ERR            ,Request error" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty" "No interrupt,Interrupt"
else
eventfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full" "No interrupt,Interrupt"
endif
eventfld.long 0x00 23. "           SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete" "No interrupt,Interrupt"
eventfld.long 0x00 21. "           SLV_TFIFO_OVF               ,Slave TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 20. " SLV_RFIFO_UN                     ,Slave RX FIFO underflow" "No interrupt,Interrupt"
rbitfld.long 0x00 17. "           SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave Rx FIFO data request" "No interrupt,Interrupt"
eventfld.long 0x00 11. "           BUS_CLEAR_DONE              ,Bus clear done status" "No interrupt,Interrupt"
textline "                                      "
sif (cpuis("TEGRAX2"))
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out" "No interrupt,Interrupt"
else
eventfld.long 0x00 10. " TLOW_MEXT_TIMEOUT_EN             ,SMBUS mext time-out" "No interrupt,Interrupt"
eventfld.long 0x00 9. "           TLOW_SEXT_TIMEOUT_EN        ,SMBUS sext time-out" "No interrupt,Interrupt"
endif
textline "                                      "
eventfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out" "No interrupt,Interrupt"
eventfld.long 0x00 7. "           PACKET_XFER_COMPLETE        ,Packet has been transferred successfully" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully" "No interrupt,Interrupt"
eventfld.long 0x00 5. "           TFIFO_OVF                   ,TX FIFO overflow" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow" "No interrupt,Interrupt"
eventfld.long 0x00 3. "           NOACK                       ,No ACK from slave" "No interrupt,Interrupt"
textline "                                      "
eventfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost" "No interrupt,Interrupt"
rbitfld.long 0x00 1. "           TFIFO_DATA_REQ              ,TX FIFO data request" "No interrupt,Interrupt"
textline "                                      "
rbitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request" "No interrupt,Interrupt"
group.long 0x6C++0x03
line.long 0x00 "CLK_DIVISOR_REGISTER_0,I2C Clock Divisor Register"
hexmask.long.word 0x00 16.--31. 1. " I2C_CLK_DIVISOR_STD_FAST_MODE    ,Divisor - fast mode"
hexmask.long.word 0x00 0.--15. 1. "                   I2C_CLK_DIVISOR_HSMODE      ,Divisor - high speed mode"
rgroup.long 0x70++0x03
line.long 0x00 "INTERRUPT_SOURCE_REGISTER_0,I2C Interrupt Source Register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source" "Unset,Set"
bitfld.long 0x00 27. "                  SLV_RD2WR                   ,Transaction switching from rd to wr - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "Unset,Set"
bitfld.long 0x00 25. "                  SLV_PKT_XFER_ERR            ,Error occurred during slave xfer - source" "Unset,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "Unset,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "Unset,Set"
endif
bitfld.long 0x00 23. "                  SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "Unset,Set"
bitfld.long 0x00 21. "                  SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 17. "                  SLV_TFIFO_DATA_REQ          ,Slave TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 16. " SLV_RFIFO_DATA_REQ               ,Slave RX FIFO data request - source" "Unset,Set"
bitfld.long 0x00 11. "                  BUS_CLEAR_DONE              ,Bus clear done - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "Unset,Set"
bitfld.long 0x00 9. "                  TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "Unset,Set"
bitfld.long 0x00 7. "                  PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "Unset,Set"
bitfld.long 0x00 5. "                  TFIFO_OVF                   ,TX FIFO overflow - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "Unset,Set"
bitfld.long 0x00 3. "                  NOACK                       ,No ACK from slave - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "Unset,Set"
bitfld.long 0x00 1. "                  TFIFO_DATA_REQ              ,TX FIFO data request - source" "Unset,Set"
textline "                                      "
bitfld.long 0x00 0. " RFIFO_DATA_REQ                   ,RX FIFO data request - source" "Unset,Set"
group.long 0x74++0x07
line.long 0x00 "INTERRUPT_SET_REGISTER_0,I2C Interrupt Source register"
bitfld.long 0x00 28. " SLV_ACK_WITHHELD                 ,Waiting for sw explicit info about ack - source - source" "No effect,Set"
bitfld.long 0x00 27. "              SLV_RD2WR                   ,Transaction switching from rd to wr - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 26. " SLV_WR2RD                        ,Transaction switching from wr to rd - source" "No effect,Set"
bitfld.long 0x00 25. "              SLV_PKT_XFER_ERR            ,Error occurred during slave XFER - source" "No effect,Set"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is empty - source" "No effect,Set"
else
bitfld.long 0x00 24. " SLV_TX_BUFFER_REQ                ,Slave TX buffer is full - source" "No effect,Set"
endif
bitfld.long 0x00 23. "              SLV_RX_BUFFER_FILLED        ,Slave RX buffer is full - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 22. " SLV_PACKET_XFER_COMPLETE         ,Slave packet transfer complete - source" "No effect,Set"
bitfld.long 0x00 21. "              SLV_TFIFO_OVF               ,Slave TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 20. " SLV_RFIFO_UNF                    ,Slave RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 11. "              BUS_CLEAR_DONE              ,Bus clear done - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 10. " TLOW_MEXT_TIMEOUT                ,SMBUS mext time-out - source" "No effect,Set"
bitfld.long 0x00 9. "              TLOW_SEXT_TIMEOUT           ,SMBUS sext time-out - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 8. " TIMEOUT                          ,SMBUS time-out - source" "No effect,Set"
bitfld.long 0x00 7. "              PACKET_XFER_COMPLETE        ,Packet has been transferred successfully - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 6. " ALL_PACKETS_XFER_COMPLETE        ,All the packets transferred successfully - source" "No effect,Set"
bitfld.long 0x00 5. "              TFIFO_OVF                   ,TX FIFO overflow - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 4. " RFIFO_UNF                        ,RX FIFO underflow - source" "No effect,Set"
bitfld.long 0x00 3. "              NOACK                       ,No ACK from slave - source" "No effect,Set"
textline "                                      "
bitfld.long 0x00 2. " ARB_LOST                         ,Arbitration lost - source" "No effect,Set"
line.long 0x04 "SLV_TX_PACKET_FIFO_0,I2C Slave TX Packet FIFO"
rgroup.long 0x7C++0x07
line.long 0x00 "SLV_RX_FIFO_0,I2C Slave RX FIFO"
line.long 0x04 "SLV_PACKET_STATUS_0,I2C Slave Packet Status"
bitfld.long 0x04 25. " ACK_WITHHELD                     ,ACK is withheld for last byte and slave is waiting for host" "Bus is released,ACK is withheld"
bitfld.long 0x04 24. "        TRANSFER_COMPLETE           ,All the packets have been transferred successfully" "Not completed,Completed"
textline "                                      "
hexmask.long.byte 0x04 16.--23. 1. " TRANSFER_PKT_ID                  ,Current packet ID for which the transaction is happening"
hexmask.long.word 0x04 4.--15. 1. "                     TRANSFER_BYTENUM            ,Number of bytes transferred in the current packet"
group.long 0x84++0x03
line.long 0x00 "BUS_CLEAR_CONFIG_0,I2C Bus Clear Configure"
hexmask.long.byte 0x00 16.--23. 1. " BC_SCLK_THRESHOLD                ,Send the clock pulses until this threshold is met"
bitfld.long 0x00 2. "                     BC_STOP_COND                ,Bus clear operation" "No stopped,Stopped"
textline "                                      "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "THRESHOLD,IMMEDIATE"
else
bitfld.long 0x00 1. " BC_TERMINATE                     ,Terminate the bus clear operation" "IMMEDIATE,THRESHOLD"
endif
bitfld.long 0x00 0. "              BC_ENABLE                   ,Starts bus clear operation" "Disabled,Enabled"
rgroup.long 0x88++0x03
line.long 0x00 "BUS_CLEAR_STATUS_0,Bus Clear Status"
bitfld.long 0x00 0. " BC_STATUS                        ,Bus clear" "Not cleared,Cleared"
group.long 0x8C++0x03
line.long 0x00 "CONFIG_LOAD_0,Spare Register"
bitfld.long 0x00 2. " TIMEOUT_CONFIG_LOAD              ,Loads the timeout configuration" "Disabled,Enabled"
bitfld.long 0x00 1. "               SLV_CONFIG_LOAD             ,Loads the slave configuration" "Disabled,Enabled"
textline "                                      "
bitfld.long 0x00 0. " MSTR_CONFIG_LOAD                 ,Loads the master configuration" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
group.long 0x90++0x03
line.long 0x00 "CLKEN_OVERRIDE_0,I2C Clock Enable Override 0"
bitfld.long 0x00 4. " I2C_BUS_CLEAR_CLKEN_OVR          ,Override for 2nd level clock enable for I2C bus clear logic" "Gated,Always on"
bitfld.long 0x00 3. "              I2C_SLV_HIF_CLKEN_OVR       ,Override for 2nd level clock enable for I2C slave to host interface logic" "Gated,Always on"
textline "                                      "
bitfld.long 0x00 2. " I2C_SLV_CORE_CLKEN_OVR           ,Override for 2nd level clock enable for I2C slave core logic" "Gated,Always on"
bitfld.long 0x00 0. "              I2C_MST_CORE_CLKEN_OVR      ,Override for 2nd level clock enable for I2C master core logic" "Gated,Always on"
endif
group.long 0x94++0x0F
line.long 0x00 "INTERFACE_TIMING_0_0,Interface Timing Register 0"
bitfld.long 0x00 8.--13. " THIGH                            ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                     TLOW                        ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "INTERFACE_TIMING_1_0,Interface Timing Register 1"
bitfld.long 0x04 24.--29. " TBUF                             ,Bus free time between STOP and START conditions" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "                     TSU_STO                     ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x04 8.--13. " THD_STA                          ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                     TSU_STA                     ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "HS_INTERFACE_TIMING_0_0,HS Interface Timing Register 0"
bitfld.long 0x08 8.--13. " HS_THIGH                         ,High period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                     HS_TLOW                     ,Low period of the SCL clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "HS_INTERFACE_TIMING_1_0,HS Interface Timing Register 1"
bitfld.long 0x0C 16.--21. " HS_TSU_STO                       ,Setup time for STOP condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                     HS_THD_STA                  ,Hold time for a START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                      "
bitfld.long 0x0C 0.--5. " HS_TSU_STA                       ,Setup time for a Repeated START condition" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
sif !cpuis("TEGRAX1")
group.long 0xA8++0x07
line.long 0x00 "MASTER_RESET_CNTRL_0,I2C Master Reset Control Register"
bitfld.long 0x00 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
line.long 0x04 "SLV_RESET_CNTRL_0,I2C Slave Reset Control Register"
bitfld.long 0x04 0. " SOFT_RESET                       ,Soft reset" "Cleared,Asserted"
endif
tree.end
width 0x0B
tree.end
tree.end
tree "UART Controller"
tree "UARTA"
base ad:0x03100000
width 15.
if (((per.l((ad:0x03100000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTB"
base ad:0x03110000
width 15.
if (((per.l((ad:0x03110000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTC"
base ad:0x0C280000
width 15.
if (((per.l((ad:0x0C280000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTD"
base ad:0x03130000
width 15.
if (((per.l((ad:0x03130000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTE"
base ad:0x03140000
width 15.
if (((per.l((ad:0x03140000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTF"
base ad:0x03150000
width 15.
if (((per.l((ad:0x03150000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree "UARTG"
base ad:0x0C290000
width 15.
if (((per.l((ad:0x0C290000+0x0C)))&0x80)==0x00)
hgroup.long 0x00++0x03
hide.long 0x00 "RBR_A/THR_A,Receive/Transmit Holding Register"
in
textline "                        "
group.long 0x04++0x03
line.long 0x00 "IER_DLAB,Interrupt Enable Register"
bitfld.long 0x00 5. " IE_EORD         ,Interrupt enable for end of received data" "Disabled,Enabled"
bitfld.long 0x00 4. "                      IE_RX_TIMEOUT   ,Interrupt enable for Rx FIFO timeout" "Disabled,Enabled"
bitfld.long 0x00 3. "         IE_MSI          ,Interrupt enable for modem status interrupt" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 2. " IE_RXS          ,Interrupt enable for receiver line status interrupt" "Disabled,Enabled"
bitfld.long 0x00 1. "                      IE_THR          ,Interrupt enable for transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.long 0x00 0. "         IE_RHR          ,Interrupt enable for received data interrupt" "Disabled,Enabled"
rgroup.long 0x08++0x03
line.long 0x00 "IIR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " EN_FIFO         ,FIFO mode status" "Mode 16450,Mode 16550,?..."
textline "                        "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX holding register empty,RX data available,Overrun/parity/framing error,Eord_timeout_intr,,Rx_timeout_intr,?..."
else
bitfld.long 0x00 1.--3. " IS_PRI          ,Encoded interrupt ID" "Modem status,TX data available,RX data available,Overrun/parity/framing error,?..."
endif
textline "                        "
bitfld.long 0x00 0. " IS_STA          ,Interrupt pending" "No interrupt,Interrupt"
else
group.long 0x00++0x07
line.long 0x00 "THR_DLAB,UART Transmit Holding Register"
hexmask.long.byte 0x00 0.--7. 1. " DLL_A           ,Divisor latch LSB"
line.long 0x04 "IER_DLAB,Divisor Latch MSByte Register"
hexmask.long.byte 0x04 0.--7. 1. " DLM_A           ,Divisor latch MSB"
wgroup.long 0x08++0x03
line.long 0x00 "FCR,Interrupt Enable And Divisor Latch MSByte Registers"
bitfld.long 0x00 6.--7. " RX_TRIG         ,RX trigger" "FIFO count > 1,FIFO count > 4,FIFO count > 8,FIFO count > 16"
bitfld.long 0x00 4.--5. "               TX_TRIG         ,TX trigger" "FIFO count > 16,FIFO count > 8,FIFO count > 4,FIFO count > 1"
bitfld.long 0x00 3. "  DMA             ,DMA mode change" "No effect,Change"
textline "                        "
bitfld.long 0x00 2. " TX_CLR          ,Clears the contents of the transmit FIFO" "No effect,Clear"
bitfld.long 0x00 1. "                     RX_CLR          ,Clears the contents of the receive FIFO" "No effect,Clear"
bitfld.long 0x00 0. "        FCR_EN_FIFO     ,Enable the transmit and receive FIFO" "Disable,Enable"
endif
group.long 0x0C++0x07
line.long 0x00 "LCR,UART Line Control Register"
bitfld.long 0x00 7. " DLAB            ,Divisor latch access bit" "Disabled,Enabled"
bitfld.long 0x00 6. "                      SET_B           ,Set BREAK condition" "No break,Break"
bitfld.long 0x00 5. "         SET_P           ,Set parity to value in LCR" "No parity,Parity"
bitfld.long 0x00 4. "  EVEN            ,Even parity format" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " PAR             ,Parity sent" "No parity,Parity"
bitfld.long 0x00 2. "                     STOP            ,Stop bits" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "         WD_SIZE         ,Word length" "5 bit,6 bit,7 bit,8 bit"
line.long 0x04 "MCR,UART Modem Control Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x04 10. " OLD_SIR_DECODE  ,Diagnostics bit to use the required SIR decode path" "Disabled,Enabled"
bitfld.long 0x04 8.--9. "                      RI_POLARITY     ,RI modem status interrupt trigger edge selection" "Rising,Falling,Both,?..."
bitfld.long 0x04 7. "          DEL_QUAL_CTS_EN ,Diagnostics bit to use the old qualified CTS in TX state machine" "Disabled,Enabled"
textline "                        "
endif
bitfld.long 0x04 6. " RTS_EN          ,RTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 5. "                      CTS_EN          ,CTS hardware flow control enable" "Disabled,Enabled"
bitfld.long 0x04 4. "         LOOPBK          ,Internal loop back enable" "Disabled,Enabled"
bitfld.long 0x04 1. "   RTS             ,Force RTS" "Force hi,Force low"
textline "                        "
bitfld.long 0x04 0. " DTR             ,Force DTR" "Force hi,Force low"
rgroup.long 0x14++0x03
line.long 0x00 "LSR,UART Line Status Register"
sif cpuis("TEGRAX1")||cpuis("TEGRAX2")
bitfld.long 0x00 9. " RX_FIFO_EMPTY   ,Receiver FIFO status" "Not empty,Empty"
textline "                        "
endif
bitfld.long 0x00 8. " TX_FIFO_FULL    ,Transmitter FIFO full status" "Not full,Full"
bitfld.long 0x00 7. "                      FIFOE           ,Receive FIFO error" "No error,Error"
bitfld.long 0x00 6. "         TMTY            ,Transmit shift reg empty status" "Not empty,Empty"
bitfld.long 0x00 5. "  THRE            ,Transmit holding register is empty" "Full,Empty"
textline "                        "
bitfld.long 0x00 4. " BRK             ,BREAK condition detected on line" "No break,Break"
bitfld.long 0x00 3. "                      FERR            ,Framing error" "No error,Error"
bitfld.long 0x00 2. "         PERR            ,Parity error" "No error,Error"
bitfld.long 0x00 1. "   OVRF            ,Receiver overrun error" "No error,Error"
textline "                        "
bitfld.long 0x00 0. " RDR             ,Receiver data ready" "No data in FIFO,Data in FIFO"
group.long 0x18++0x13
line.long 0x00 "MSR,UART Modem Status Register"
bitfld.long 0x00 7. " CD              ,State of carrier detect pin" "Disabled,Enabled"
bitfld.long 0x00 6. "                      RI              ,State of ring indicator pin" "Disabled,Enabled"
bitfld.long 0x00 5. "         DSR             ,State of data set ready pin" "Disabled,Enabled"
bitfld.long 0x00 4. "   CTS             ,State of clear to send pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x00 3. " DCD             ,Change (Delta) in CD state detected" "Disabled,Enabled"
bitfld.long 0x00 2. "                      DRI             ,Change (Delta) in RI state detected" "Disabled,Enabled"
bitfld.long 0x00 1. "         DDSR            ,Change (Delta) in DSR state detected" "Disabled,Enabled"
bitfld.long 0x00 0. "   DCTS            ,Change (Delta) in CTS state detected" "Disabled,Enabled"
line.long 0x04 "SPR,UART Scratch Pad Register"
hexmask.long.byte 0x04 0.--7. 1. " SPR_A           ,Scratch pad"
line.long 0x08 "IRDA_CSR,UART IrDA Pulse Coding CSR Register"
bitfld.long 0x08 7. " SIR_A           ,Enable SIR coder" "Disabled,Enabled"
bitfld.long 0x08 6. "                      PWT_A           ,Baud pulse" "3/16,4/16"
bitfld.long 0x08 3. "             INVERT_RTS      ,Inverts the normally inactive high nRTS pin" "Disabled,Enabled"
textline "                        "
bitfld.long 0x08 2. " INVERT_CTS      ,Inverts the normally inactive high nCTS pin" "Disabled,Enabled"
bitfld.long 0x08 1. "                      INVERT_TXD      ,Inverts the normally inactive high TXD pin" "Disabled,Enabled"
bitfld.long 0x08 0. "         INVERT_RXD      ,Inverts the normally inactive high RXD pin" "Disabled,Enabled"
line.long 0x0C "RX_FIFO_CFG,UART RX FIFO Configuration Register"
bitfld.long 0x0C 7. " EN_RX_FIFO_TRIG ,Enable use of RX FIFO trigger count" "Disabled,Enabled"
bitfld.long 0x0C 0.--5. "                      RX_FIFO_TRIG    ,Set RX FIFO trigger level" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
line.long 0x10 "MIE,UART Modem Interrupt Enable Register"
bitfld.long 0x10 3. " DCD_INT_EN      ,Interrupt enable for change in CD state detected" "Disabled,Enabled"
bitfld.long 0x10 2. "                      DRI_INT_EN      ,Interrupt enable for change in RI state detected" "Disabled,Enabled"
bitfld.long 0x10 1. "         DDSR_INT_EN     ,Interrupt enable for change in DSR state detected" "Disabled,Enabled"
bitfld.long 0x10 0. "   DCTS_INT_EN     ,Interrupt enable for change in CTS state detected" "Disabled,Enabled"
rgroup.long 0x2C++0x03
line.long 0x00 "VENDOR_STATUS,UART Controller Status Register"
bitfld.long 0x00 24.--29. " TX_FIFO_COUNTER ,TX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "                            RX_FIFO_COUNTER ,RX FIFO current entries number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                        "
bitfld.long 0x00 3. " TX_OVERRUN      ,TX FIFO overrun" "No overrun,Overrun"
bitfld.long 0x00 2. "                    RX_OVERRUN      ,RX FIFO overrun" "No overrun,Overrun"
textline "                        "
sif cpuis("TEGRAX1")
bitfld.long 0x00 1. " UART_RX_IDLE    ,RX path idle status" "Busy,Idle"
bitfld.long 0x00 0. "                          UART_TX_IDLE    ,TX path idle status" "Busy,Idle"
endif
group.long 0x3C++0x03
line.long 0x00 "UART_ASR,UART Auto Sense Baud Register"
bitfld.long 0x00 31. " VALID           ,Counting the clocks between two successive clock edges finished" "Not finished,Finished"
bitfld.long 0x00 30. "                  BUSY            ,ASR busy" "Idle,Busy"
hexmask.long.byte 0x00 8.--15. 1. "             RX_RATE_SENSE_H ,High count of clock edges between two successive clock edges"
hexmask.long.byte 0x00 0.--7. 1. "         RX_RATE_SENSE_L ,Low count of clock edges between two successive clock edges"
width 0x0B
tree.end
tree.end
tree "SPI Controller"
tree "2B-1"
base ad:0x03210000
width 12.
if (((per.l(ad:0x03210000))&0x40000000)==(0x40000000))
if (((per.l(ad:0x03210000))&0x1F)==(0x03||0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
else
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03210000))&0x1F)==(0x3||0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
if (((per.l(ad:0x03210000))&0x1F)==(0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
endif
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x04++0x03
line.long 0x00 "COMMAND2_0,SPI Command2 Register"
bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
hgroup.long 0x04++0x03
hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)"
endif
width 19.
textline "                            "
group.long 0x08++0x03
line.long 0x00 "TIMING_REG1_0,CS Timing1 Register"
bitfld.long 0x00 28.--31. " CS_SETUP_TIME3               ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 24.--27. "  CS_HOLD_TIME3                ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 20.--23. "  CS_SETUP_TIME2             ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 16.--19. " CS_HOLD_TIME2                ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 12.--15. "  CS_SETUP_TIME1               ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 8.--11. "  CS_HOLD_TIME1              ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 4.--7. " CS_SETUP_TIME0               ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 0.--3. "  CS_HOLD_TIME0                ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
if (((per.l(ad:0x03210000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03210000))&0x80000000)==0x00)
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
else
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 21. "         CS_ACTIVE_BETWEEN_PACKETS2   ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
bitfld.long 0x00 13. "         CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
endif
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave Continuous Mode"
else
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave continuous mode"
hexmask.long.word 0x04 0.--15. 1. "               BLOCK_COUNT                ,Counts the number of packets in a transaction"
endif
textline "                            "
if (((per.l(ad:0x03210000))&0x40000000)==0x00)
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Indicates the number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Indicates the number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
else
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
endif
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO Overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
endif
rgroup.long 0x18++0x07
line.long 0x00 "TX_DATA_0,Transmit Data Register"
line.long 0x04 "RX_DATA_0,Receive Data Register"
group.long 0x20++0x03
line.long 0x00 "DMA_CTL_0,DMA Control Register"
bitfld.long 0x00 31. " DMA                          ,Enable DMA mode transfer" "Disabled,Enabled"
bitfld.long 0x00 30. "         CONST                        ,Enable continuous mode transfer" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                            "
bitfld.long 0x00 29. " PAUSE                        ,Pause feature enable" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x00 19.--20. " RX_TRIG                      ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words"
bitfld.long 0x00 15.--16. "         TX_TRIG                      ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words"
sif (cpuis("TEGRAX2"))
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
else
if (((per.l(ad:0x03210000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03210000))&0x80000000)==0x00)
hgroup.long 0x24++0x03
hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)"
else
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
endif
endif
group.long 0x108++0x03
line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register"
group.long 0x188++0x03
line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register"
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 29. " RDY_INTR_MASK                ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
bitfld.long 0x00 28. "         TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK      ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 25. "         RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
else
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 31. " CS_INTR_MASK                 ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled"
bitfld.long 0x00 30. "         FRAME_END_INTR_MASK          ,Interrupt enable mask bit for frame end" "Disabled,Enabled"
bitfld.long 0x00 29. "         RDY_INTR_MASK              ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x00 26. "         RX_FIFO_OVF_INTR_MASK      ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
endif
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 0.--7. 1. "               SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
else
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
endif
else
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x190++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7"
else
hgroup.long 0x190++0x03
hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)"
endif
endif
sif (cpuis("TEGRAX2"))
group.long 0x194++0x07
line.long 0x00 "MISC_0,Miscellaneous Register"
bitfld.long 0x00 31. " CLKEN_OVERRIDE               ,Override for spi_clk" "Gated,Not gated"
bitfld.long 0x00 30. "        EXT_CLK_EN                   ,External master clock gate" "Gated,Not gated"
line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register"
bitfld.long 0x04 31. " CS_FATAL_INTR_EN             ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled"
bitfld.long 0x04 30. "         FRAME_END_FATAL_INTR_EN      ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled"
bitfld.long 0x04 28. "         TX_FIFO_OVF_FATAL_INTR_EN  ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN    ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x04 26. "         RX_FIFO_OVF_FATAL_INTR_EN    ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x04 25. "         RX_FIFO_UNF_FATAL_INTR_EN  ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled"
endif
width 0x0B
tree.end
tree "2B-2"
base ad:0x0C260000
width 12.
if (((per.l(ad:0x0C260000))&0x40000000)==(0x40000000))
if (((per.l(ad:0x0C260000))&0x1F)==(0x03||0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
else
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x0C260000))&0x1F)==(0x3||0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
if (((per.l(ad:0x0C260000))&0x1F)==(0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
endif
if (((per.l(ad:0x0C260000))&0x40000000)==0x40000000)
group.long 0x04++0x03
line.long 0x00 "COMMAND2_0,SPI Command2 Register"
bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
hgroup.long 0x04++0x03
hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)"
endif
width 19.
textline "                            "
group.long 0x08++0x03
line.long 0x00 "TIMING_REG1_0,CS Timing1 Register"
bitfld.long 0x00 28.--31. " CS_SETUP_TIME3               ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 24.--27. "  CS_HOLD_TIME3                ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 20.--23. "  CS_SETUP_TIME2             ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 16.--19. " CS_HOLD_TIME2                ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 12.--15. "  CS_SETUP_TIME1               ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 8.--11. "  CS_HOLD_TIME1              ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 4.--7. " CS_SETUP_TIME0               ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 0.--3. "  CS_HOLD_TIME0                ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
if (((per.l(ad:0x0C260000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x0C260000))&0x80000000)==0x00)
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
else
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 21. "         CS_ACTIVE_BETWEEN_PACKETS2   ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
bitfld.long 0x00 13. "         CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
endif
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave Continuous Mode"
else
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave continuous mode"
hexmask.long.word 0x04 0.--15. 1. "               BLOCK_COUNT                ,Counts the number of packets in a transaction"
endif
textline "                            "
if (((per.l(ad:0x0C260000))&0x40000000)==0x00)
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Indicates the number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Indicates the number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
else
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
endif
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO Overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
endif
rgroup.long 0x18++0x07
line.long 0x00 "TX_DATA_0,Transmit Data Register"
line.long 0x04 "RX_DATA_0,Receive Data Register"
group.long 0x20++0x03
line.long 0x00 "DMA_CTL_0,DMA Control Register"
bitfld.long 0x00 31. " DMA                          ,Enable DMA mode transfer" "Disabled,Enabled"
bitfld.long 0x00 30. "         CONST                        ,Enable continuous mode transfer" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                            "
bitfld.long 0x00 29. " PAUSE                        ,Pause feature enable" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x00 19.--20. " RX_TRIG                      ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words"
bitfld.long 0x00 15.--16. "         TX_TRIG                      ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words"
sif (cpuis("TEGRAX2"))
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
else
if (((per.l(ad:0x0C260000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x0C260000))&0x80000000)==0x00)
hgroup.long 0x24++0x03
hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)"
else
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
endif
endif
group.long 0x108++0x03
line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register"
group.long 0x188++0x03
line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register"
if (((per.l(ad:0x0C260000))&0x40000000)==0x40000000)
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 29. " RDY_INTR_MASK                ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
bitfld.long 0x00 28. "         TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK      ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 25. "         RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
else
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 31. " CS_INTR_MASK                 ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled"
bitfld.long 0x00 30. "         FRAME_END_INTR_MASK          ,Interrupt enable mask bit for frame end" "Disabled,Enabled"
bitfld.long 0x00 29. "         RDY_INTR_MASK              ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x00 26. "         RX_FIFO_OVF_INTR_MASK      ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
endif
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x0C260000))&0x40000000)==0x40000000)
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 0.--7. 1. "               SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
else
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
endif
else
if (((per.l(ad:0x0C260000))&0x40000000)==0x40000000)
group.long 0x190++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7"
else
hgroup.long 0x190++0x03
hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)"
endif
endif
sif (cpuis("TEGRAX2"))
group.long 0x194++0x07
line.long 0x00 "MISC_0,Miscellaneous Register"
bitfld.long 0x00 31. " CLKEN_OVERRIDE               ,Override for spi_clk" "Gated,Not gated"
bitfld.long 0x00 30. "        EXT_CLK_EN                   ,External master clock gate" "Gated,Not gated"
line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register"
bitfld.long 0x04 31. " CS_FATAL_INTR_EN             ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled"
bitfld.long 0x04 30. "         FRAME_END_FATAL_INTR_EN      ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled"
bitfld.long 0x04 28. "         TX_FIFO_OVF_FATAL_INTR_EN  ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN    ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x04 26. "         RX_FIFO_OVF_FATAL_INTR_EN    ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x04 25. "         RX_FIFO_UNF_FATAL_INTR_EN  ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled"
endif
width 0x0B
tree.end
tree "2B-3"
base ad:0x03210000
width 12.
if (((per.l(ad:0x03210000))&0x40000000)==(0x40000000))
if (((per.l(ad:0x03210000))&0x1F)==(0x03||0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
else
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03210000))&0x1F)==(0x3||0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
if (((per.l(ad:0x03210000))&0x1F)==(0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
endif
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x04++0x03
line.long 0x00 "COMMAND2_0,SPI Command2 Register"
bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
hgroup.long 0x04++0x03
hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)"
endif
width 19.
textline "                            "
group.long 0x08++0x03
line.long 0x00 "TIMING_REG1_0,CS Timing1 Register"
bitfld.long 0x00 28.--31. " CS_SETUP_TIME3               ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 24.--27. "  CS_HOLD_TIME3                ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 20.--23. "  CS_SETUP_TIME2             ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 16.--19. " CS_HOLD_TIME2                ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 12.--15. "  CS_SETUP_TIME1               ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 8.--11. "  CS_HOLD_TIME1              ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 4.--7. " CS_SETUP_TIME0               ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 0.--3. "  CS_HOLD_TIME0                ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
if (((per.l(ad:0x03210000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03210000))&0x80000000)==0x00)
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
else
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 21. "         CS_ACTIVE_BETWEEN_PACKETS2   ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
bitfld.long 0x00 13. "         CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
endif
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave Continuous Mode"
else
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave continuous mode"
hexmask.long.word 0x04 0.--15. 1. "               BLOCK_COUNT                ,Counts the number of packets in a transaction"
endif
textline "                            "
if (((per.l(ad:0x03210000))&0x40000000)==0x00)
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Indicates the number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Indicates the number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
else
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
endif
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO Overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
endif
rgroup.long 0x18++0x07
line.long 0x00 "TX_DATA_0,Transmit Data Register"
line.long 0x04 "RX_DATA_0,Receive Data Register"
group.long 0x20++0x03
line.long 0x00 "DMA_CTL_0,DMA Control Register"
bitfld.long 0x00 31. " DMA                          ,Enable DMA mode transfer" "Disabled,Enabled"
bitfld.long 0x00 30. "         CONST                        ,Enable continuous mode transfer" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                            "
bitfld.long 0x00 29. " PAUSE                        ,Pause feature enable" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x00 19.--20. " RX_TRIG                      ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words"
bitfld.long 0x00 15.--16. "         TX_TRIG                      ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words"
sif (cpuis("TEGRAX2"))
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
else
if (((per.l(ad:0x03210000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03210000))&0x80000000)==0x00)
hgroup.long 0x24++0x03
hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)"
else
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
endif
endif
group.long 0x108++0x03
line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register"
group.long 0x188++0x03
line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register"
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 29. " RDY_INTR_MASK                ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
bitfld.long 0x00 28. "         TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK      ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 25. "         RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
else
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 31. " CS_INTR_MASK                 ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled"
bitfld.long 0x00 30. "         FRAME_END_INTR_MASK          ,Interrupt enable mask bit for frame end" "Disabled,Enabled"
bitfld.long 0x00 29. "         RDY_INTR_MASK              ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x00 26. "         RX_FIFO_OVF_INTR_MASK      ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
endif
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 0.--7. 1. "               SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
else
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
endif
else
if (((per.l(ad:0x03210000))&0x40000000)==0x40000000)
group.long 0x190++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7"
else
hgroup.long 0x190++0x03
hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)"
endif
endif
sif (cpuis("TEGRAX2"))
group.long 0x194++0x07
line.long 0x00 "MISC_0,Miscellaneous Register"
bitfld.long 0x00 31. " CLKEN_OVERRIDE               ,Override for spi_clk" "Gated,Not gated"
bitfld.long 0x00 30. "        EXT_CLK_EN                   ,External master clock gate" "Gated,Not gated"
line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register"
bitfld.long 0x04 31. " CS_FATAL_INTR_EN             ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled"
bitfld.long 0x04 30. "         FRAME_END_FATAL_INTR_EN      ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled"
bitfld.long 0x04 28. "         TX_FIFO_OVF_FATAL_INTR_EN  ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN    ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x04 26. "         RX_FIFO_OVF_FATAL_INTR_EN    ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x04 25. "         RX_FIFO_UNF_FATAL_INTR_EN  ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled"
endif
width 0x0B
tree.end
tree "2B-4"
base ad:0x03240000
width 12.
if (((per.l(ad:0x03240000))&0x40000000)==(0x40000000))
if (((per.l(ad:0x03240000))&0x1F)==(0x03||0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little Endian Bit Enable" "Disabled,Enabled"
else
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
endif
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
sif (cpuis("TEGRAX2"))
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
endif
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
else
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03240000))&0x1F)==(0x3||0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
bitfld.long 0x00 26.--27. " CS_SEL           ,Select a slave in the multi-slave environment" "CS0,CS1,CS2,CS3"
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" "Drive low,Drive high,Pull low,Pull high"
bitfld.long 0x00 17. "          BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 13. " BOTH_EN_BYTE     ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" "1 bit,2 bit,3 bit,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
else
if (((per.l(ad:0x03240000))&0x1F)==(0x7||0xF||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO Mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 5. "            PACKED           ,Packed mode enable bit" "Unpacked mode,Packed mode"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND_0,SPI Command1 Register"
bitfld.long 0x00 31. " PIO              ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "          MS               ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 28.--29. "              MODE             ,SPI interface clock mode" "Mode 0,Mode 1,Mode 2,Mode 3"
textline "                     "
textline "                     "
bitfld.long 0x00 25. " CS_POL_INACTIVE3 ,Inactive value of devices cs connected to CS3" "Low,High"
bitfld.long 0x00 24. "              CS_POL_INACTIVE2 ,Inactive value of devices cs connected to CS2" "Low,High"
bitfld.long 0x00 23. "                CS_POL_INACTIVE1 ,Inactive value of devices cs connected to CS1" "Low,High"
textline "                     "
bitfld.long 0x00 22. " CS_POL_INACTIVE0 ,Inactive value of devices cs connected to CS0" "Low,High"
bitfld.long 0x00 21. "              CS_SW_HW         ,CS control source" "Software,Hardware"
textline "                     "
bitfld.long 0x00 20. " CS_SW_VAL        ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "              IDLE_SDA         ,Inactive data signal format" ",,Extern pull-down,Extern pull-high"
bitfld.long 0x00 17. "    BIDIR            ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
bitfld.long 0x00 16. "  EN_LE_BIT        ,Little endian bit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 15. " EN_LE_BYTE       ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          BOTH_EN_BIT      ,Enable bit transmission/receipt on both MISO and MOSI at the same time" "Normal,Both"
textline "                     "
bitfld.long 0x00 12. " RX_EN            ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 11. "          TX_EN            ,Transmit enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0.--4. " BIT_LEN          ,Bit length in either packed or unpacked mode" ",,,,,,,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit,17 bit,18 bit,19 bit,20 bit,21 bit,22 bit,23 bit,24 bit,25 bit,26 bit,27 bit,28 bit,29 bit,30 bit,31 bit,32 bit"
endif
endif
endif
if (((per.l(ad:0x03240000))&0x40000000)==0x40000000)
group.long 0x04++0x03
line.long 0x00 "COMMAND2_0,SPI Command2 Register"
bitfld.long 0x00 6.--11. " TX_CLK_TAP_DELAY ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          RX_CLK_TAP_DELAY ,Delays the clock coming in from the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
hgroup.long 0x04++0x03
hide.long 0x00 "COMMAND2_0,SPI Command2 Register (Useful only in Master Mode)"
endif
width 19.
textline "                            "
group.long 0x08++0x03
line.long 0x00 "TIMING_REG1_0,CS Timing1 Register"
bitfld.long 0x00 28.--31. " CS_SETUP_TIME3               ,Specifies the setup time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 24.--27. "  CS_HOLD_TIME3                ,Specifies the hold time (delay) of the chip select CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 20.--23. "  CS_SETUP_TIME2             ,Specifies the setup time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 16.--19. " CS_HOLD_TIME2                ,Specifies the hold time (delay) of the chip select CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 12.--15. "  CS_SETUP_TIME1               ,Specifies the setup time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 8.--11. "  CS_HOLD_TIME1              ,Specifies the hold time (delay) of the chip select CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
textline "                            "
bitfld.long 0x00 4.--7. " CS_SETUP_TIME0               ,Specifies the setup time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
bitfld.long 0x00 0.--3. "  CS_HOLD_TIME0                ,Specifies the hold time (delay) of the chip select CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles"
if (((per.l(ad:0x03240000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03240000))&0x80000000)==0x00)
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA Mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
else
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 21. "         CS_ACTIVE_BETWEEN_PACKETS2   ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
bitfld.long 0x00 13. "         CS_ACTIVE_BETWEEN_PACKETS1 ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
endif
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave Continuous Mode"
else
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2_0,CS Timing2 Register"
bitfld.long 0x00 29. " CS_ACTIVE_BETWEEN_PACKETS3   ,Specifies if CS stays active between two packets on CS3" "Inactive,Active"
bitfld.long 0x00 24.--28. "         CYCLES_BETWEEN_PACKETS3      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS3" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 21. "  CS_ACTIVE_BETWEEN_PACKETS2 ,Specifies if CS stays active between two packets on CS2" "Inactive,Active"
textline "                            "
bitfld.long 0x00 16.--20. " CYCLES_BETWEEN_PACKETS2      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS2" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
bitfld.long 0x00 13. "  CS_ACTIVE_BETWEEN_PACKETS1   ,Specifies if CS stays active between two packets on CS1" "Inactive,Active"
bitfld.long 0x00 8.--12. "         CYCLES_BETWEEN_PACKETS1    ,Specifies the number of cycles in the PIO/DMA mode for communication on CS1" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
textline "                            "
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0   ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0      ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "No delay,2 clock cycles,3 clock cycles,4 clock cycles,5 clock cycles,6 clock cycles,7 clock cycles,8 clock cycles,9 clock cycles,10 clock cycles,11 clock cycles,12 clock cycles,13 clock cycles,14 clock cycles,15 clock cycles,16 clock cycles,17 clock cycles,18 clock cycles,19 clock cycles,20 clock cycles,21 clock cycles,22 clock cycles,23 clock cycles,24 clock cycles,25 clock cycles,26 clock cycles,27 clock cycles,28 clock cycles,29 clock cycles,30 clock cycles,31 clock cycles,32 clock cycles"
line.long 0x04 "TRANSFER_STATUS0,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                          ,Ready bit" "Not ready,Ready"
hexmask.long.byte 0x04 16.--23. 1. "        SLV_IDLE_COUNT               ,Slave continuous mode"
hexmask.long.word 0x04 0.--15. 1. "               BLOCK_COUNT                ,Counts the number of packets in a transaction"
endif
textline "                            "
if (((per.l(ad:0x03240000))&0x40000000)==0x00)
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Indicates the number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Indicates the number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
else
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS_0,Control/Status FIFO Status Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x00 31. " CS_INACTIVE                  ,CS deasserted error" "No error,Error"
endif
textline "                            "
bitfld.long 0x00 30. " FRAME_END                    ,Continuous mode is terminated" "No,Yes"
hexmask.long.byte 0x00 23.--29. 1. "              RX_FIFO_FULL_COUNT           ,Number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT        ,Number of slots in the transmit FIFO"
textline "                            "
bitfld.long 0x00 15. " RX_FIFO_FLUSH                ,Flush Rx FIFO" "In progress,Finished"
bitfld.long 0x00 14. "      TX_FIFO_FLUSH                ,Flush Tx FIFO" "In progress,Finished"
eventfld.long 0x00 8. "      ERR                        ,Error flag" "No error,Error"
textline "                            "
eventfld.long 0x00 7. " TX_FIFO_OVF                  ,TX FIFO Overflow" "No error,Error"
eventfld.long 0x00 6. "         TX_FIFO_UNR                  ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                ,RX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 4. " RX_FIFO_UNR                  ,RX FIFO underrun" "No error,Error"
rbitfld.long 0x00 3. "         TX_FIFO_FULL                 ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY              ,TX FIFO empty status" "Not empty,Empty"
textline "                            "
rbitfld.long 0x00 1. " RX_FIFO_FULL                 ,RX FIFO full status" "Not full,Full"
rbitfld.long 0x00 0. "         RX_FIFO_EMPTY                ,RX FIFO empty status" "Not empty,Empty"
endif
rgroup.long 0x18++0x07
line.long 0x00 "TX_DATA_0,Transmit Data Register"
line.long 0x04 "RX_DATA_0,Receive Data Register"
group.long 0x20++0x03
line.long 0x00 "DMA_CTL_0,DMA Control Register"
bitfld.long 0x00 31. " DMA                          ,Enable DMA mode transfer" "Disabled,Enabled"
bitfld.long 0x00 30. "         CONST                        ,Enable continuous mode transfer" "Disabled,Enabled"
sif (cpuis("TEGRAX2"))
textline "                            "
bitfld.long 0x00 29. " PAUSE                        ,Pause feature enable" "Disabled,Enabled"
endif
textline "                            "
bitfld.long 0x00 19.--20. " RX_TRIG                      ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words"
bitfld.long 0x00 15.--16. "         TX_TRIG                      ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words"
sif (cpuis("TEGRAX2"))
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
else
if (((per.l(ad:0x03240000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03240000))&0x80000000)==0x00)
hgroup.long 0x24++0x03
hide.long 0x00 "DMA_BLK_SIZE_0,Block Size Register (Useful only in PIO or DMA mode)"
else
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE_0,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " BLOCK_SIZE                   ,Size of data block to be transferred"
endif
endif
group.long 0x108++0x03
line.long 0x00 "TX_FIFO_0,TX FIFO Buffer Register"
group.long 0x188++0x03
line.long 0x00 "RX_FIFO_0,RX FIFO Buffer Register"
if (((per.l(ad:0x03240000))&0x40000000)==0x40000000)
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 29. " RDY_INTR_MASK                ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
bitfld.long 0x00 28. "         TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK      ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 25. "         RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
else
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK_0,Interrupt Mask Register"
bitfld.long 0x00 31. " CS_INTR_MASK                 ,Interrupt enable mask bit for CS deassertion" "Disabled,Enabled"
bitfld.long 0x00 30. "         FRAME_END_INTR_MASK          ,Interrupt enable mask bit for frame end" "Disabled,Enabled"
bitfld.long 0x00 29. "         RDY_INTR_MASK              ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 28. " TX_FIFO_OVF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "         TX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x00 26. "         RX_FIFO_OVF_INTR_MASK      ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 25. " RX_FIFO_UNF_INTR_MASK        ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
endif
sif (cpuis("TEGRAX2"))
if (((per.l(ad:0x03240000))&0x40000000)==0x40000000)
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 8.--15. 1. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 0.--7. 1. "               SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
else
group.long 0x18C++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
hexmask.long.byte 0x00 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x00 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3 ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x00 0.--7. 1. " SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
endif
else
if (((per.l(ad:0x03240000))&0x40000000)==0x40000000)
group.long 0x190++0x03
line.long 0x00 "SPARE_CTLR,Spare Control Register"
bitfld.long 0x00 8.--10. " SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7"
else
hgroup.long 0x190++0x03
hide.long 0x00 "SPARE_CTLR,Spare Control Register (Useful only in Master Mode)"
endif
endif
sif (cpuis("TEGRAX2"))
group.long 0x194++0x07
line.long 0x00 "MISC_0,Miscellaneous Register"
bitfld.long 0x00 31. " CLKEN_OVERRIDE               ,Override for spi_clk" "Gated,Not gated"
bitfld.long 0x00 30. "        EXT_CLK_EN                   ,External master clock gate" "Gated,Not gated"
line.long 0x04 "FATAL_INTR_EN_0,Fatal Interrupt Enable Register"
bitfld.long 0x04 31. " CS_FATAL_INTR_EN             ,Fatal interrupt enable bit for CS deassert in Slave Mode" "Disabled,Enabled"
bitfld.long 0x04 30. "         FRAME_END_FATAL_INTR_EN      ,Fatal interrupt enable for FRAME_END" "Disabled,Enabled"
bitfld.long 0x04 28. "         TX_FIFO_OVF_FATAL_INTR_EN  ,Fatal interrupt enable for TX_FIFO_OVF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 27. " TX_FIFO_UNF_FATAL_INTR_EN    ,Fatal interrupt enable for TX_FIFO_UNF" "Disabled,Enabled"
bitfld.long 0x04 26. "         RX_FIFO_OVF_FATAL_INTR_EN    ,Fatal interrupt enable for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x04 25. "         RX_FIFO_UNF_FATAL_INTR_EN  ,Fatal interrupt enable for RX_FIFO_UNF" "Disabled,Enabled"
endif
width 0x0B
tree.end
tree.end
tree "PWM Controller"
tree "PWM1"
base ad:0x03280000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM2"
base ad:0x03290000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM3"
base ad:0x032A0000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM4"
base ad:0x0C340000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM5"
base ad:0x032C0000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM6"
base ad:0x032D0000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM7"
base ad:0x032E0000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree "PWM8"
base ad:0x032F0000
width 16.
group.long 0x00++0x03
line.long 0x00 "CSR,Output Configuration Control Register"
bitfld.long 0x00 31. " ENB ,Enable Pulse width modulator" "Disabled,Enabled"
hexmask.long.word 0x00 16.--30. 1. "  PWM ,Pulse width"
hexmask.long.word 0x00 0.--12. 1. "  PFM ,Frequency divider"
width 0xB
tree.end
tree.end
tree "Quad SPI"
base ad:0x03270000
width 19.
if (((per.l(ad:0x03270000))&0x200)==0x200)&&(((per.l(ad:0x03270000))&0x1F)==(0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND1,Command1 Register"
bitfld.long 0x00 31. " PIO                               ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "         MS                                ,Master/slave mode select" ",Master mode"
bitfld.long 0x00 28.--29. "     MODE                   ,QSPI interface clock mode" "Mode 0,?..."
textline "                            "
bitfld.long 0x00 26.--27. " CS_SEL                            ,Select a slave in the multi-slave environment" "CS0,?..."
bitfld.long 0x00 22. "              CS_POL_INACTIVE0                  ,Inactive value of devices CS connected to CS0" "Low,High"
bitfld.long 0x00 21. "            CS_SW_HW               ,CS control source" "Hardware,Software"
textline "                            "
bitfld.long 0x00 20. " CS_SW_VAL                         ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "             IDLE_SDA                          ,Inactive data signal format" "Drive low,Drive high,?..."
textline "                            "
bitfld.long 0x00 16. " EN_LE_BIT                         ,Little endian bit enable" "Disabled,Enabled"
bitfld.long 0x00 15. "         EN_LE_BYTE                        ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 12. "        RX_EN                  ,Receive enable" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " TX_EN                             ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 9. "         SDR_DDR_SEL                       ,Selects between SDR and DDR mode" "SDR,DDR"
bitfld.long 0x00 7.--8. "             INTERFACE_WIDTH        ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..."
textline "                            "
bitfld.long 0x00 5. " PACKED                            ,Packed mode enable bit" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 0.--4. " BIT_LEN                           ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit"
elif (((per.l(ad:0x03270000))&0x200)==0x00)&&(((per.l(ad:0x03270000))&0x1F)==(0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND1,Command1 Register"
bitfld.long 0x00 31. " PIO                               ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "         MS                                ,Master/slave mode select" ",Master mode"
bitfld.long 0x00 28.--29. "     MODE                   ,QSPI interface clock mode" "Mode 0,?..."
textline "                            "
bitfld.long 0x00 26.--27. " CS_SEL                            ,Select a slave in the multi-slave environment" "CS0,?..."
bitfld.long 0x00 22. "              CS_POL_INACTIVE0                  ,Inactive value of devices CS connected to CS0" "Low,High"
bitfld.long 0x00 21. "            CS_SW_HW               ,CS control source" "Hardware,Software"
textline "                            "
bitfld.long 0x00 20. " CS_SW_VAL                         ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "             IDLE_SDA                          ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "      BIDIR                  ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
textline "                            "
bitfld.long 0x00 16. " EN_LE_BIT                         ,Little endian bit enable" "Disabled,Enabled"
bitfld.long 0x00 15. "         EN_LE_BYTE                        ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 12. "        RX_EN                  ,Receive enable" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " TX_EN                             ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 9. "         SDR_DDR_SEL                       ,Selects between SDR and DDR mode" "SDR,DDR"
bitfld.long 0x00 7.--8. "             INTERFACE_WIDTH        ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..."
textline "                            "
bitfld.long 0x00 5. " PACKED                            ,Packed mode enable bit" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 0.--4. " BIT_LEN                           ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit"
elif (((per.l(ad:0x03270000))&0x200)==0x200)&&(((per.l(ad:0x03270000))&0x1F)!=(0x07||0x0F||0x1F))
group.long 0x00++0x03
line.long 0x00 "COMMAND1,Command1 Register"
bitfld.long 0x00 31. " PIO                               ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "         MS                                ,Master/slave mode select" ",Master mode"
bitfld.long 0x00 28.--29. "     MODE                   ,QSPI interface clock mode" "Mode 0,?..."
textline "                            "
bitfld.long 0x00 26.--27. " CS_SEL                            ,Select a slave in the multi-slave environment" "CS0,?..."
bitfld.long 0x00 22. "              CS_POL_INACTIVE0                  ,Inactive value of devices CS connected to CS0" "Low,High"
bitfld.long 0x00 21. "            CS_SW_HW               ,CS control source" "Hardware,Software"
textline "                            "
bitfld.long 0x00 20. " CS_SW_VAL                         ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "             IDLE_SDA                          ,Inactive data signal format" "Drive low,Drive high,?..."
textline "                            "
bitfld.long 0x00 16. " EN_LE_BIT                         ,Little endian bit enable" "Disabled,Enabled"
bitfld.long 0x00 15. "         EN_LE_BYTE                        ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 12. "        RX_EN                  ,Receive enable" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " TX_EN                             ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 9. "         SDR_DDR_SEL                       ,Selects between SDR and DDR mode" "SDR,DDR"
bitfld.long 0x00 7.--8. "             INTERFACE_WIDTH        ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 0.--4. " BIT_LEN                           ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit"
else
group.long 0x00++0x03
line.long 0x00 "COMMAND1,Command 1 Register"
bitfld.long 0x00 31. " PIO                               ,PIO mode" "Disabled,Enabled"
bitfld.long 0x00 30. "         MS                                ,Master/slave mode select" ",Master mode"
bitfld.long 0x00 28.--29. "     MODE                   ,QSPI interface clock mode" "Mode 0,?..."
textline "                            "
bitfld.long 0x00 26.--27. " CS_SEL                            ,Select a slave in the multi-slave environment" "CS0,?..."
bitfld.long 0x00 22. "              CS_POL_INACTIVE0                  ,Inactive value of devices CS connected to CS0" "Low,High"
bitfld.long 0x00 21. "            CS_SW_HW               ,CS control source" "Hardware,Software"
textline "                            "
bitfld.long 0x00 20. " CS_SW_VAL                         ,CS signal value" "Low,High"
bitfld.long 0x00 18.--19. "             IDLE_SDA                          ,Inactive data signal format" "Drive low,Drive high,?..."
bitfld.long 0x00 17. "      BIDIR                  ,Bidirectional transfer control bit" "Normal mode,Bidirectional mode"
textline "                            "
bitfld.long 0x00 16. " EN_LE_BIT                         ,Little endian bit enable" "Disabled,Enabled"
bitfld.long 0x00 15. "         EN_LE_BYTE                        ,Little endian byte enable" "Disabled,Enabled"
bitfld.long 0x00 12. "        RX_EN                  ,Receive enable" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 11. " TX_EN                             ,Transmit enable" "Disabled,Enabled"
bitfld.long 0x00 9. "         SDR_DDR_SEL                       ,Selects between SDR and DDR mode" "SDR,DDR"
bitfld.long 0x00 7.--8. "             INTERFACE_WIDTH        ,QSPI interface width" "Single bit mode,Dual mode,Quad mode,?..."
textline "                            "
textline "                            "
bitfld.long 0x00 0.--4. " BIT_LEN                           ,Number of bits in a packet to transmit/receive" ",,,,,,,8 bit,,,,,,,,16 bit,,,,,,,,,,,,,,,,32 bit"
endif
group.long 0x04++0x07
line.long 0x00 "COMMAND2,Command2 Register"
bitfld.long 0x00 10.--14. " TX_CLK_TAP_DELAY                  ,Delays the clock going out to the external device" "No delay,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.byte 0x00 0.--7. 1. "         RX_CLK_TAP_DELAY                  ,Delays the clock coming in from the external device"
line.long 0x04 "TIMING_REG1,CS Timing1 Register"
bitfld.long 0x04 4.--7. " CS_SETUP                          ,Specifies the setup time of the chip select CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles"
bitfld.long 0x04 0.--3. "    CS_HOLD                           ,Specifies the hold time of the chip select CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles"
if (((per.l(ad:0x03270000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03270000))&0x80000000)==0x00)
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2,CS Timing2 Register"
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0        ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
line.long 0x04 "TRANSFER_STATUS,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                               ,Ready bit" "Not ready,Ready"
else
group.long 0x0C++0x07
line.long 0x00 "TIMING_REG2,CS Timing2 Register"
bitfld.long 0x00 5. " CS_ACTIVE_BETWEEN_PACKETS0        ,Specifies if CS stays active between two packets on CS0" "Inactive,Active"
bitfld.long 0x00 0.--4. "         CYCLES_BETWEEN_PACKETS0           ,Specifies the number of cycles in the PIO/DMA mode for communication on CS0" "1 clk cycle,2 clk cycles,3 clk cycles,4 clk cycles,5 clk cycles,6 clk cycles,7 clk cycles,8 clk cycles,9 clk cycles,10 clk cycles,11 clk cycles,12 clk cycles,13 clk cycles,14 clk cycles,15 clk cycles,16 clk cycles,17 clk cycles,18 clk cycles,19 clk cycles,20 clk cycles,21 clk cycles,22 clk cycles,23 clk cycles,24 clk cycles,25 clk cycles,26 clk cycles,27 clk cycles,28 clk cycles,29 clk cycles,30 clk cycles,31 clk cycles,32 clk cycles"
line.long 0x04 "TRANSFER_STATUS,TRANSFER Status Register"
eventfld.long 0x04 30. " RDY                               ,Ready bit" "Not ready,Ready"
hexmask.long.word 0x04 0.--15. 1. "        BLOCK_COUNT                       ,Counts the number of packets in a transaction"
endif
group.long 0x14++0x03
line.long 0x00 "FIFO_STATUS,Control/status FIFO Status Register"
hexmask.long.byte 0x00 23.--29. 1. " RX_FIFO_FULL_COUNT                ,Number of slots in the receive FIFO"
hexmask.long.byte 0x00 16.--22. 1. "               TX_FIFO_EMPTY_COUNT               ,Number of slots in the transmit FIFO"
bitfld.long 0x00 15. "              RX_FIFO_FLUSH          ,Flush RX FIFO" "Not flushed,Flushed"
textline "                            "
bitfld.long 0x00 14. " TX_FIFO_FLUSH                     ,Flush TX FIFO" "Not flushed,Flushed"
eventfld.long 0x00 8. "      ERR                               ,Error flag" "No error,Error"
eventfld.long 0x00 7. "        TX_FIFO_OVF            ,TX FIFO overflow" "No error,Error"
textline "                            "
eventfld.long 0x00 6. " TX_FIFO_UNR                       ,TX FIFO underrun" "No error,Error"
eventfld.long 0x00 5. "         RX_FIFO_OVF                       ,RX FIFO overflow" "Not error,Error"
eventfld.long 0x00 4. "       RX_FIFO_UNR            ,RX FIFO underrun" "Not error,Error"
textline "                            "
rbitfld.long 0x00 3. " TX_FIFO_FULL                      ,TX FIFO full status" "Not full,Full"
rbitfld.long 0x00 2. "         TX_FIFO_EMPTY                     ,TX FIFO empty status" "Not empty,Empty"
rbitfld.long 0x00 1. "       RX_FIFO_FULL           ,RX FIFO full status" "Not full,Full"
textline "                            "
rbitfld.long 0x00 0. " RX_FIFO_EMPTY                     ,RX FIFO empty status" "Not empty,Empty"
textline "                            "
hgroup.long 0x18++0x03
hide.long 0x00 "TX_DATA,Transmit Data Register"
in
hgroup.long 0x1C++0x03
hide.long 0x00 "RX_DATA,Receive Data Register"
in
textline "                            "
group.long 0x20++0x03
line.long 0x00 "DMA_CTL,DMA Control Register"
bitfld.long 0x00 31. " DMA_EN                            ,Enable DMA mode transfer" "Disabled,Enabled"
bitfld.long 0x00 19.--20. "         RX_TRIG                           ,Receive FIFO trigger level" "1 word,4 words,8 words,16 words"
bitfld.long 0x00 15.--16. "        TX_TRIG                ,Transmit FIFO trigger level" "1 word,4 words,8 words,16 words"
if (((per.l(ad:0x03270000+0x20))&0x80000000)==0x00)&&(((per.l(ad:0x03270000))&0x80000000)==0x00)
hgroup.long 0x24++0x03
hide.long 0x00 "DMA_BLK_SIZE,Block Size Register"
else
group.long 0x24++0x03
line.long 0x00 "DMA_BLK_SIZE,Block Size Register"
hexmask.long.word 0x00 0.--15. 1. " DMA_BLOCK_SIZE                    ,Size of data block to be transferred"
endif
textline "                            "
hgroup.long 0x108++0x03
hide.long 0x00 "TX_FIFO,TX FIFO Buffer Register"
in
hgroup.long 0x188++0x03
hide.long 0x00 "RX_FIFO,RX FIFO Buffer Register"
in
textline "                            "
group.long 0x18C++0x0F
line.long 0x00 "INTR_MASK,Interrupt Mask Register"
bitfld.long 0x00 29. " RDY_INTR_MASK                     ,Interrupt enable mask bit for RDY" "Disabled,Enabled"
bitfld.long 0x00 28. "         TX_FIFO_OVF_INTR_MASK             ,Interrupt enable mask bit for TX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 27. "        TX_FIFO_UNF_INTR_MASK  ,Interrupt enable mask bit for TX_FIFO_UNF" "Disabled,Enabled"
textline "                            "
bitfld.long 0x00 26. " RX_FIFO_OVF_INTR_MASK             ,Interrupt enable mask bit for RX_FIFO_OVF" "Disabled,Enabled"
bitfld.long 0x00 25. "         RX_FIFO_UNF_INTR_MASK             ,Interrupt enable mask bit for RX_FIFO_UNF" "Disabled,Enabled"
line.long 0x04 "SPARE_CTLR,Spare Control Register"
sif (cpuis("TEGRAX2"))
hexmask.long.byte 0x04 24.--31. 1. " SPARE_CONTROL_REGISTER_BYTE4      ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x04 16.--23. 1. "               SPARE_CONTROL_REGISTER_BYTE3      ,Adjust the clock delay on internal registers"
textline "                            "
hexmask.long.byte 0x04 8.--15. 1. " QSPI_SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers"
hexmask.long.byte 0x04 0.--7. 1. "               QSPI_SPARE_CONTROL_REGISTER_BYTE1 ,Adjust the clock delay on internal registers"
else
bitfld.long 0x04 8.--10. " QSPI_SPARE_CONTROL_REGISTER_BYTE2 ,Adjust the clock delay on internal registers" "0,1,2,3,4,5,6,7"
endif
line.long 0x08 "MISC,Miscellaneous Register"
sif (cpuis("TEGRAX2"))
bitfld.long 0x08 31. " CLKEN_OVERRIDE                    ,Override for QSPI clock" "Disabled,Enabled"
textline "                            "
endif
hexmask.long.byte 0x08 0.--7. 1. " NUM_OF_DUMMY_CLK_CYCLES           ,Number of dummy cycles required in case of fast read commands"
line.long 0x0C "TIMING3,Timing3 Register"
bitfld.long 0x0C 24.--28. " DATA3_LINE_TAP_DELAY              ,Delays the data3 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 16.--20. "               DATA2_LINE_TAP_DELAY              ,Delays the data2 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                            "
bitfld.long 0x0C 8.--12. " DATA1_LINE_TAP_DELAY              ,Delays the data1 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x0C 0.--4. "               DATA0_LINE_TAP_DELAY              ,Delays the data0 coming in from the external device with these tap values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
sif (cpuis("TEGRAX2"))
group.long 0x19C++0x13
line.long 0x00 "CMB_SEQ_CMD,Combined Sequence Command Register"
hexmask.long.byte 0x00 0.--7. 1. " COMMAND_VALUE                     ,Command value that goes out to flash"
line.long 0x04 "CMB_SEQ_CMD_CFG,Combined Sequence Command Config Register"
bitfld.long 0x04 13.--14. " COMMAND_X1_X2_X4                  ,Interface width of CMD" "Single bit mode,Dual mode,Quad mode,?..."
bitfld.long 0x04 12. "  COMMAND_SDR_DDR                   ,Indicates whether CMD is in SDR or DDR mode" "SDR,DDR"
hexmask.long.byte 0x04 0.--7. 1. "             COMMAND_SIZE           ,Command size in bits"
line.long 0x08 "GLOBAL_CONFIG,Global Config Register"
bitfld.long 0x08 0. " CMB_SEQ_EN                        ,Combined sequence mode enable" "Disabled,Enabled"
line.long 0x0C "CMB_SEQ_ADDR,Combined Sequence Address Register"
line.long 0x10 "CMB_SEQ_ADDR_CFG,Combined Sequence Address Config Register"
bitfld.long 0x10 13.--14. " ADDRESS_X1_X2_X4                  ,Indicates interface width of ADDR" "Single bit mode,Dual mode,Quad mode,?..."
bitfld.long 0x10 12. "  ADDRESS_SDR_DDR                   ,Indicates whether ADDR is in SDR or DDR mode" "SDR,DDR"
hexmask.long.byte 0x10 0.--7. 1. "             ADDRESS_SIZE           ,Address size in bits"
group.long 0x1EC++0x0B
line.long 0x00 "QSPI_COMP_CONTROL,Comp Pad Control Register"
hexmask.long.byte 0x00 20.--26. 1. " COMP_PAD_DRVUP_OVR                ,Used to drive DRVUP input of COMP pad"
hexmask.long.byte 0x00 12.--18. 1. "               COMP_PAD_DRVDN_OVR                ,Used to drive DRVDN input of COMP pad"
bitfld.long 0x00 3.--6. "              QSPI_COMP_PAD_VREF_SEL ,Comp pad Vref select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                            "
bitfld.long 0x00 1. " QSPI_COMP_PAD_E_INPUT_OR_E_PWRD   ,Comp pad E input or E PWRD" "Start,Stop"
rbitfld.long 0x00 0. "            QSPI_COMP_CALIB_STATUS            ,Comp calibration status" "Not calibrated,Calibrated"
line.long 0x04 "AUTO_CAL_CONFIG,Pad Auto-Calibration Settings"
bitfld.long 0x04 31. " AUTO_CAL_START                    ,Calibration state machine status" "Stopped,Started"
bitfld.long 0x04 30. "          AUTO_CAL_OVERRIDE                 ,AUTOCAL override" "No override,Override"
bitfld.long 0x04 29. "     AUTO_CAL_ENABLE        ,AUTOCAL enable" "Disabled,Enabled"
textline "                            "
bitfld.long 0x04 28. " AUTO_CAL_SLW_OVERRIDE             ,AUTOCAL slew rate override" "No override,Override"
bitfld.long 0x04 16.--18. "      AUTO_CAL_STEP                     ,Calibration step interval (In microseconds)" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x04 8.--14. 1. "               AUTO_CAL_PD_OFFSET     ,2's complement offset for pull-down value"
textline "                            "
hexmask.long.byte 0x04 0.--6. 1. " AUTO_CAL_PU_OFFSET                ,2's complement offset for pull-up value"
line.long 0x08 "AUTO_CAL_INTERVAL,Pad Calibration Interval"
rgroup.long 0x1F8++0x03
line.long 0x00 "AUTO_CAL_STATUS,PAD Calibration Status"
bitfld.long 0x00 31. " AUTO_CAL_ACTIVE                   ,Auto calibration status" "Inactive,Active"
hexmask.long.byte 0x00 24.--30. 1. "         AUTO_CAL_PULLDOWN_ADJ             ,Pull-down code sent to pads"
hexmask.long.byte 0x00 16.--22. 1. "              AUTO_CAL_PULLUP_ADJ    ,Pull-up code sent to pads"
textline "                            "
hexmask.long.byte 0x00 8.--14. 1. " AUTO_CAL_PULLDOWN                 ,Pull-down code generated by auto-calibration"
hexmask.long.byte 0x00 0.--6. 1. "               AUTO_CAL_PULLUP                   ,Pull-up code generated by auto-calibration"
endif
width 0x0B
tree.end
tree "Fan Tachometer"
base ad:0x039C0000
width 11.
group.long 0x00++0x03
line.long 0x00 "FAN_TACH0,Fan Tachometer 0 Register"
bitfld.long 0x00 25.--26. " WIN_LENGTH ,Window length of the FAN TACH monitor" "One period,Two periods,Four periods,Eight periods"
bitfld.long 0x00 24. "  OVERFLOW ,Indicates that window period of the fan TACH input exceeds 524.288ms" "No overflow,Overflow"
hexmask.long.tbyte 0x00 0.--18. 1. "  PERIOD ,Window period of the fan tachometer input in units of 1 microsecond"
rgroup.long 0x04++0x03
line.long 0x00 "FAN_TACH1,Fan Tachometer 1 Register"
hexmask.long.tbyte 0x00 0.--18. 1. " HI         ,Indicates high time of fan tachometer input in units of 1 microsecond of every fan TACH monitor window"
width 0x0B
tree.end
textline "               "